OV - exec - Function __reset_field_kernel_module_MOD_reset_field_kernel._omp

	Function: __reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0	Module: exec	Source: reset_field_kernel.f90:47-63	Coverage (incl. loops): 5.17% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90: 47 - 63

--------------------------------------------------------------------------------

47:     !$OMP PARALLEL

48:     !$OMP DO

49:     DO k=y_min,y_max

50:     !$OMP SIMD

51:       DO j=x_min,x_max

52:         density0(j,k)=density1(j,k)

53:         energy0(j,k)=energy1(j,k)

54:       ENDDO

55:     ENDDO

56:     !$OMP END DO

57:

58:     !$OMP DO

59:     DO k=y_min,y_max+1

60:     !$OMP SIMD

61:       DO j=x_min,x_max+1

62:         xvel0(j,k)=xvel1(j,k)

63:         yvel0(j,k)=yvel1(j,k)

0x4423b0 PUSH	%RBP

0x4423b1 MOV	%RSP,%RBP

0x4423b4 PUSH	%R15

0x4423b6 PUSH	%R14

0x4423b8 PUSH	%R13

0x4423ba PUSH	%R12

0x4423bc PUSH	%RBX

0x4423bd MOV	%RDI,%RBX

0x4423c0 AND	$-0x40,%RSP

0x4423c4 SUB	$0xc0,%RSP

0x4423cb MOV	0xd0(%RDI),%RDX

0x4423d2 MOV	0xc8(%RDI),%RCX

0x4423d9 MOV	0xc0(%RDI),%RSI

0x4423e0 MOV	0xb8(%RDI),%R8

0x4423e7 MOV	0xb0(%RDI),%R9

0x4423ee MOV	0xa8(%RDI),%R10

0x4423f5 MOV	0xa0(%RDI),%R11

0x4423fc MOV	0xd8(%RDI),%RAX

0x442403 MOV	0x10(%RDI),%RDI

0x442407 MOV	%RDX,0x98(%RSP)

0x44240f MOV	%RCX,0x58(%RSP)

0x442414 MOV	%RSI,0x90(%RSP)

0x44241c MOV	%R8,0x50(%RSP)

0x442421 MOV	%R9,0x88(%RSP)

0x442429 MOV	%R10,0x48(%RSP)

0x44242e MOV	%R11,0x80(%RSP)

0x442436 MOV	%RAX,0x68(%RSP)

0x44243b MOV	(%RDI),%R13D

0x44243e CALL	402380 <@plt_start@+0x360>

0x442443 MOV	%EAX,%R14D

0x442446 CALL	4022f0 <@plt_start@+0x2d0>

0x44244b MOV	0x18(%RBX),%R15

0x44244f MOV	%EAX,%R12D

0x442452 MOV	(%R15),%EAX

0x442455 INC	%EAX

0x442457 SUB	%R13D,%EAX

0x44245a CLTD

0x44245b IDIV	%R14D

0x44245e CMP	%EDX,%R12D

0x442461 JL	442ffa

0x442467 MOV	%EAX,%ECX

0x442469 IMUL	%R12D,%ECX

0x44246d ADD	%ECX,%EDX

0x44246f ADD	%EDX,%EAX

0x442471 CMP	%EAX,%EDX

0x442473 JGE	4429c0

0x442479 MOV	(%RBX),%RSI

0x44247c MOV	0x8(%RBX),%R8

0x442480 VMOVQ	0x70(%RBX),%XMM6

0x442485 ADD	%R13D,%EAX

0x442488 ADD	%R13D,%EDX

0x44248b VMOVQ	0x60(%RBX),%XMM7

0x442490 MOV	%EAX,0xa0(%RSP)

0x442497 VMOVQ	0x90(%RBX),%XMM8

0x44249f MOVSXD	%EDX,%RAX

0x4424a2 VMOVQ	0x80(%RBX),%XMM9

0x4424aa VMOVQ	0x20(%RBX),%XMM0

0x4424af MOV	0x28(%RBX),%R15

0x4424b3 VMOVQ	0x38(%RBX),%XMM3

0x4424b8 VMOVQ	0x30(%RBX),%XMM4

0x4424bd MOVSXD	(%RSI),%R10

0x4424c0 MOV	(%R8),%R13D

0x4424c3 MOV	0x78(%RBX),%R8

0x4424c7 VMOVQ	%XMM6,%R9

0x4424cc IMUL	%RAX,%R9

0x4424d0 VMOVQ	%XMM7,%RDI

0x4424d5 VMOVQ	%XMM8,%RSI

0x4424da IMUL	%RAX,%RDI

0x4424de IMUL	%RAX,%RSI

0x4424e2 ADD	%R10,%R8

0x4424e5 LEA	0x1(%R13),%ECX

0x4424e9 MOV	%R10,%R11

0x4424ec MOV	%R13D,0x7c(%RSP)

0x4424f1 ADD	%R9,%R8

0x4424f4 MOV	0x68(%RBX),%R9

0x4424f8 MOV	%R10D,0x78(%RSP)

0x4424fd ADD	%R10,%R9

0x442500 ADD	%RDI,%R9

0x442503 MOV	0x98(%RBX),%RDI

0x44250a ADD	%R10,%RDI

0x44250d ADD	%RDI,%RSI

0x442510 VMOVQ	%XMM9,%RDI

0x442515 MOV	%RSI,0xb8(%RSP)

0x44251d MOV	0x88(%RBX),%RSI

0x442524 IMUL	%RDI,%RAX

0x442528 ADD	%R10,%RSI

0x44252b ADD	%RAX,%RSI

0x44252e MOV	%R13D,%EAX

0x442531 SUB	%R10D,%EAX

0x442534 MOV	%EAX,0xa8(%RSP)

0x44253b INC	%EAX

0x44253d CMP	%R13D,%R10D

0x442540 CMOVLE	%ECX,%R11D

0x442544 MOV	%R11D,%R13D

0x442547 JG	443034

0x44254d MOV	%EAX,%EDI

0x44254f MOV	%EAX,%R11D

0x442552 VMOVQ	%R10,%XMM2

0x442557 AND	$0x7,%EAX

0x44255a AND	$-0x8,%EDI

0x44255d MOV	%R15,%R10

0x442560 MOV	%R14D,0x64(%RSP)

0x442565 VMOVQ	%XMM0,%R15

0x44256a MOV	%EDI,0x74(%RSP)

0x44256e MOV	0xb8(%RSP),%RDI

0x442576 VMOVQ	%XMM3,%R14

0x44257b MOV	%EAX,0x70(%RSP)

0x44257f MOV	%R12D,0x44(%RSP)

0x442584 MOV	%R13D,0x40(%RSP)

0x442589 MOV	%RBX,0x38(%RSP)

0x44258e SHR	$0x3,%R11D

0x442592 SAL	$0x6,%R11

0x442596 MOV	%R11,0xb0(%RSP)

0x44259e XCHG	%AX,%AX

(353) 0x4425a0 CMPL	$0x6,0xa8(%RSP)

(353) 0x4425a8 JBE	442fd0

(353) 0x4425ae MOV	0xb0(%RSP),%RCX

(353) 0x4425b6 VMOVQ	%XMM4,%RAX

(353) 0x4425bb LEA	(%R10,%R8,8),%R13

(353) 0x4425bf LEA	(%R15,%R9,8),%R12

(353) 0x4425c3 LEA	(%RAX,%RSI,8),%R11

(353) 0x4425c7 XOR	%EAX,%EAX

(353) 0x4425c9 LEA	(%R14,%RDI,8),%RBX

(353) 0x4425cd SUB	$0x40,%RCX

(353) 0x4425d1 SHR	$0x6,%RCX

(353) 0x4425d5 INC	%RCX

(353) 0x4425d8 AND	$0x7,%ECX

(353) 0x4425db JE	442707

(353) 0x4425e1 CMP	$0x1,%RCX

(353) 0x4425e5 JE	4426d5

(353) 0x4425eb CMP	$0x2,%RCX

(353) 0x4425ef JE	4426b4

(353) 0x4425f5 CMP	$0x3,%RCX

(353) 0x4425f9 JE	442693

(353) 0x4425ff CMP	$0x4,%RCX

(353) 0x442603 JE	442672

(353) 0x442605 CMP	$0x5,%RCX

(353) 0x442609 JE	442651

(353) 0x44260b CMP	$0x6,%RCX

(353) 0x44260f JE	442630

(353) 0x442611 VMOVUPD	(%R13),%ZMM5

(353) 0x442618 MOV	$0x40,%EAX

(353) 0x44261d VMOVUPD	%ZMM5,(%R12)

(353) 0x442624 VMOVUPD	(%RBX),%ZMM1

(353) 0x44262a VMOVUPD	%ZMM1,(%R11)

(353) 0x442630 VMOVUPD	(%R13,%RAX,1),%ZMM10

(353) 0x442638 VMOVUPD	%ZMM10,(%R12,%RAX,1)

(353) 0x44263f VMOVUPD	(%RBX,%RAX,1),%ZMM11

(353) 0x442646 VMOVUPD	%ZMM11,(%R11,%RAX,1)

(353) 0x44264d ADD	$0x40,%RAX

(353) 0x442651 VMOVUPD	(%R13,%RAX,1),%ZMM12

(353) 0x442659 VMOVUPD	%ZMM12,(%R12,%RAX,1)

(353) 0x442660 VMOVUPD	(%RBX,%RAX,1),%ZMM13

(353) 0x442667 VMOVUPD	%ZMM13,(%R11,%RAX,1)

(353) 0x44266e ADD	$0x40,%RAX

(353) 0x442672 VMOVUPD	(%R13,%RAX,1),%ZMM14

(353) 0x44267a VMOVUPD	%ZMM14,(%R12,%RAX,1)

(353) 0x442681 VMOVUPD	(%RBX,%RAX,1),%ZMM15

(353) 0x442688 VMOVUPD	%ZMM15,(%R11,%RAX,1)

(353) 0x44268f ADD	$0x40,%RAX

(353) 0x442693 VMOVUPD	(%R13,%RAX,1),%ZMM0

(353) 0x44269b VMOVUPD	%ZMM0,(%R12,%RAX,1)

(353) 0x4426a2 VMOVUPD	(%RBX,%RAX,1),%ZMM3

(353) 0x4426a9 VMOVUPD	%ZMM3,(%R11,%RAX,1)

(353) 0x4426b0 ADD	$0x40,%RAX

(353) 0x4426b4 VMOVUPD	(%R13,%RAX,1),%ZMM5

(353) 0x4426bc VMOVUPD	%ZMM5,(%R12,%RAX,1)

(353) 0x4426c3 VMOVUPD	(%RBX,%RAX,1),%ZMM1

(353) 0x4426ca VMOVUPD	%ZMM1,(%R11,%RAX,1)

(353) 0x4426d1 ADD	$0x40,%RAX

(353) 0x4426d5 VMOVUPD	(%R13,%RAX,1),%ZMM10

(353) 0x4426dd MOV	0xb0(%RSP),%RCX

(353) 0x4426e5 VMOVUPD	%ZMM10,(%R12,%RAX,1)

(353) 0x4426ec VMOVUPD	(%RBX,%RAX,1),%ZMM11

(353) 0x4426f3 VMOVUPD	%ZMM11,(%R11,%RAX,1)

(353) 0x4426fa ADD	$0x40,%RAX

(353) 0x4426fe CMP	%RCX,%RAX

(353) 0x442701 JE	44281b

  (354) 0x442707 VMOVUPD	(%R13,%RAX,1),%ZMM12

  (354) 0x44270f VMOVUPD	%ZMM12,(%R12,%RAX,1)

  (354) 0x442716 VMOVUPD	(%RBX,%RAX,1),%ZMM13

  (354) 0x44271d VMOVUPD	%ZMM13,(%R11,%RAX,1)

  (354) 0x442724 VMOVUPD	0x40(%R13,%RAX,1),%ZMM14

  (354) 0x44272c VMOVUPD	%ZMM14,0x40(%R12,%RAX,1)

  (354) 0x442734 VMOVUPD	0x40(%RBX,%RAX,1),%ZMM15

  (354) 0x44273c VMOVUPD	%ZMM15,0x40(%R11,%RAX,1)

  (354) 0x442744 VMOVUPD	0x80(%R13,%RAX,1),%ZMM0

  (354) 0x44274c VMOVUPD	%ZMM0,0x80(%R12,%RAX,1)

  (354) 0x442754 VMOVUPD	0x80(%RBX,%RAX,1),%ZMM3

  (354) 0x44275c VMOVUPD	%ZMM3,0x80(%R11,%RAX,1)

  (354) 0x442764 VMOVUPD	0xc0(%R13,%RAX,1),%ZMM5

  (354) 0x44276c VMOVUPD	%ZMM5,0xc0(%R12,%RAX,1)

  (354) 0x442774 VMOVUPD	0xc0(%RBX,%RAX,1),%ZMM1

  (354) 0x44277c VMOVUPD	%ZMM1,0xc0(%R11,%RAX,1)

  (354) 0x442784 VMOVUPD	0x100(%R13,%RAX,1),%ZMM10

  (354) 0x44278c VMOVUPD	%ZMM10,0x100(%R12,%RAX,1)

  (354) 0x442794 VMOVUPD	0x100(%RBX,%RAX,1),%ZMM11

  (354) 0x44279c VMOVUPD	%ZMM11,0x100(%R11,%RAX,1)

  (354) 0x4427a4 VMOVUPD	0x140(%R13,%RAX,1),%ZMM12

  (354) 0x4427ac VMOVUPD	%ZMM12,0x140(%R12,%RAX,1)

  (354) 0x4427b4 VMOVUPD	0x140(%RBX,%RAX,1),%ZMM13

  (354) 0x4427bc VMOVUPD	%ZMM13,0x140(%R11,%RAX,1)

  (354) 0x4427c4 VMOVUPD	0x180(%R13,%RAX,1),%ZMM14

  (354) 0x4427cc VMOVUPD	%ZMM14,0x180(%R12,%RAX,1)

  (354) 0x4427d4 VMOVUPD	0x180(%RBX,%RAX,1),%ZMM15

  (354) 0x4427dc VMOVUPD	%ZMM15,0x180(%R11,%RAX,1)

  (354) 0x4427e4 VMOVUPD	0x1c0(%R13,%RAX,1),%ZMM0

  (354) 0x4427ec VMOVUPD	%ZMM0,0x1c0(%R12,%RAX,1)

  (354) 0x4427f4 VMOVUPD	0x1c0(%RBX,%RAX,1),%ZMM3

  (354) 0x4427fc VMOVUPD	%ZMM3,0x1c0(%R11,%RAX,1)

  (354) 0x442804 MOV	0xb0(%RSP),%RCX

  (354) 0x44280c ADD	$0x200,%RAX

  (354) 0x442812 CMP	%RCX,%RAX

  (354) 0x442815 JNE	442707

(353) 0x44281b MOV	0x74(%RSP),%R12D

(353) 0x442820 MOV	0x78(%RSP),%EBX

(353) 0x442824 MOV	0x70(%RSP),%R11D

(353) 0x442829 MOV	%R12D,%R13D

(353) 0x44282c ADD	%EBX,%R12D

(353) 0x44282f MOV	%R12D,0xb8(%RSP)

(353) 0x442837 TEST	%R11D,%R11D

(353) 0x44283a JE	442964

(353) 0x442840 MOV	0xa8(%RSP),%EAX

(353) 0x442847 SUB	%R13D,%EAX

(353) 0x44284a LEA	0x1(%RAX),%R12D

(353) 0x44284e CMP	$0x2,%EAX

(353) 0x442851 JBE	442898

(353) 0x442853 LEA	(%R8,%R13,1),%RCX

(353) 0x442857 LEA	(%R9,%R13,1),%RBX

(353) 0x44285b LEA	(%RDI,%R13,1),%R11

(353) 0x44285f VMOVQ	%XMM4,%RAX

(353) 0x442864 VMOVUPD	(%R10,%RCX,8),%YMM5

(353) 0x44286a ADD	%RSI,%R13

(353) 0x44286d VMOVUPD	%YMM5,(%R15,%RBX,8)

(353) 0x442873 VMOVUPD	(%R14,%R11,8),%YMM1

(353) 0x442879 VMOVUPD	%YMM1,(%RAX,%R13,8)

(353) 0x44287f MOV	%R12D,%R13D

(353) 0x442882 AND	$-0x4,%R13D

(353) 0x442886 ADD	%R13D,0xb8(%RSP)

(353) 0x44288e AND	$0x3,%R12D

(353) 0x442892 JE	442964

(353) 0x442898 VMOVQ	%XMM2,%RCX

(353) 0x44289d MOV	%R8,%R13

(353) 0x4428a0 MOV	%R9,%R12

(353) 0x4428a3 MOV	%RDI,%RBX

(353) 0x4428a6 MOV	%RSI,%R11

(353) 0x4428a9 SUB	%RCX,%R13

(353) 0x4428ac SUB	%RCX,%R12

(353) 0x4428af SUB	%RCX,%RBX

(353) 0x4428b2 SUB	%RCX,%R11

(353) 0x4428b5 MOVSXD	0xb8(%RSP),%RCX

(353) 0x4428bd LEA	(%R13,%RCX,1),%RAX

(353) 0x4428c2 VMOVSD	(%R10,%RAX,8),%XMM10

(353) 0x4428c8 LEA	(%R12,%RCX,1),%RAX

(353) 0x4428cc VMOVSD	%XMM10,(%R15,%RAX,8)

(353) 0x4428d2 LEA	(%RBX,%RCX,1),%RAX

(353) 0x4428d6 ADD	%R11,%RCX

(353) 0x4428d9 VMOVSD	(%R14,%RAX,8),%XMM11

(353) 0x4428df VMOVQ	%XMM4,%RAX

(353) 0x4428e4 VMOVSD	%XMM11,(%RAX,%RCX,8)

(353) 0x4428e9 MOV	0xb8(%RSP),%ECX

(353) 0x4428f0 LEA	0x1(%RCX),%EAX

(353) 0x4428f3 CMP	%EAX,0x7c(%RSP)

(353) 0x4428f7 JL	442964

(353) 0x4428f9 MOVSXD	%EAX,%RCX

(353) 0x4428fc LEA	(%R13,%RCX,1),%RAX

(353) 0x442901 VMOVSD	(%R10,%RAX,8),%XMM12

(353) 0x442907 LEA	(%R12,%RCX,1),%RAX

(353) 0x44290b VMOVSD	%XMM12,(%R15,%RAX,8)

(353) 0x442911 LEA	(%RBX,%RCX,1),%RAX

(353) 0x442915 ADD	%R11,%RCX

(353) 0x442918 VMOVSD	(%R14,%RAX,8),%XMM13

(353) 0x44291e VMOVQ	%XMM4,%RAX

(353) 0x442923 VMOVSD	%XMM13,(%RAX,%RCX,8)

(353) 0x442928 MOV	0xb8(%RSP),%EAX

(353) 0x44292f ADD	$0x2,%EAX

(353) 0x442932 CMP	%EAX,0x7c(%RSP)

(353) 0x442936 JL	442964

(353) 0x442938 CLTQ

(353) 0x44293a ADD	%RAX,%R13

(353) 0x44293d ADD	%RAX,%R12

(353) 0x442940 ADD	%RAX,%RBX

(353) 0x442943 ADD	%RAX,%R11

(353) 0x442946 VMOVSD	(%R10,%R13,8),%XMM14

(353) 0x44294c VMOVQ	%XMM4,%R13

(353) 0x442951 VMOVSD	%XMM14,(%R15,%R12,8)

(353) 0x442957 VMOVSD	(%R14,%RBX,8),%XMM15

(353) 0x44295d VMOVSD	%XMM15,(%R13,%R11,8)

(353) 0x442964 VMOVQ	%XMM6,%R12

(353) 0x442969 VMOVQ	%XMM7,%RBX

(353) 0x44296e INC	%EDX

(353) 0x442970 VMOVQ	%XMM8,%R11

(353) 0x442975 VMOVQ	%XMM9,%RCX

(353) 0x44297a ADD	%R12,%R8

(353) 0x44297d ADD	%RBX,%R9

(353) 0x442980 ADD	%R11,%RDI

(353) 0x442983 ADD	%RCX,%RSI

(353) 0x442986 CMP	%EDX,0xa0(%RSP)

(353) 0x44298d JG	4425a0

0x442993 MOV	0x64(%RSP),%R14D

0x442998 MOV	0x44(%RSP),%R12D

0x44299d MOV	0x40(%RSP),%R13D

0x4429a2 MOV	0x38(%RSP),%RBX

0x4429a7 VZEROUPPER

0x4429aa MOV	%R13D,0xb0(%RSP)

0x4429b2 MOV	0xb0(%RSP),%EDX

0x4429b9 MOV	%EDX,0xe0(%RBX)

0x4429bf NOP

0x4429c0 CALL	402370 <@plt_start@+0x350>

0x4429c5 MOV	0x18(%RBX),%R9

0x4429c9 MOV	0x10(%RBX),%R8

0x4429cd MOV	(%R9),%EAX

0x4429d0 MOV	(%R8),%ESI

0x4429d3 ADD	$0x2,%EAX

0x4429d6 SUB	%ESI,%EAX

0x4429d8 CLTD

0x4429d9 IDIV	%R14D

0x4429dc CMP	%EDX,%R12D

0x4429df JL	443003

0x4429e5 MOV	%R12D,%R9D

0x4429e8 IMUL	%EAX,%R9D

0x4429ec ADD	%EDX,%R9D

0x4429ef ADD	%R9D,%EAX

0x4429f2 CMP	%EAX,%R9D

0x4429f5 JGE	442f39

0x4429fb MOV	(%RBX),%RDI

0x4429fe ADD	%ESI,%EAX

0x442a00 ADD	%ESI,%R9D

0x442a03 MOV	0x88(%RSP),%RCX

0x442a0b MOV	0x80(%RSP),%RSI

0x442a13 MOV	0x50(%RSP),%R8

0x442a18 MOV	0x8(%RBX),%R15

0x442a1c MOVSXD	%R9D,%R13

0x442a1f MOV	0x90(%RSP),%RDX

0x442a27 MOV	%EAX,0x7c(%RSP)

0x442a2b MOV	0x98(%RSP),%RAX

0x442a33 VMOVQ	0x48(%RBX),%XMM4

0x442a38 VMOVQ	0x40(%RBX),%XMM6

0x442a3d VMOVQ	0x58(%RBX),%XMM7

0x442a42 MOVB	$0,0x50(%RSP)

0x442a47 VMOVQ	0x50(%RBX),%XMM8

0x442a4c MOVSXD	(%RDI),%R11

0x442a4f MOV	0x48(%RSP),%RDI

0x442a54 IMUL	%R13,%RCX

0x442a58 MOV	%RBX,0x48(%RSP)

0x442a5d MOV	(%R15),%R14D

0x442a60 IMUL	%R13,%RSI

0x442a64 IMUL	%R13,%RAX

0x442a68 IMUL	%RDX,%R13

0x442a6c ADD	%R11,%R8

0x442a6f ADD	%R11,%RDI

0x442a72 MOV	%R11,%R10

0x442a75 ADD	%RCX,%R8

0x442a78 ADD	%RSI,%RDI

0x442a7b MOV	0x58(%RSP),%RCX

0x442a80 MOV	0x68(%RSP),%RSI

0x442a85 LEA	0x2(%R14),%R12D

0x442a89 MOV	%R14D,0x64(%RSP)

0x442a8e SUB	%R11D,%R14D

0x442a91 LEA	0x1(%R14),%R15D

0x442a95 MOV	%R12D,0xb8(%RSP)

0x442a9d MOV	%R14D,0x68(%RSP)

0x442aa2 LEA	0x2(%R14),%R14D

0x442aa6 MOV	%R15D,0x78(%RSP)

0x442aab ADD	%R11,%RSI

0x442aae ADD	%R11,%RCX

0x442ab1 ADD	%R13,%RCX

0x442ab4 ADD	%RAX,%RSI

0x442ab7 CMP	%R12D,%R11D

0x442aba MOV	%R14D,%R13D

0x442abd CMOVGE	%R11D,%R12D

0x442ac1 AND	$-0x8,%R13D

0x442ac5 MOV	%R12D,0x58(%RSP)

0x442aca MOV	%R14D,%R12D

0x442acd AND	$0x7,%R14D

0x442ad1 MOV	%R13D,0x74(%RSP)

0x442ad6 SHR	$0x3,%R12D

0x442ada MOV	%R14D,0x70(%RSP)

0x442adf SAL	$0x6,%R12

0x442ae3 MOV	%R12,0xb0(%RSP)

0x442aeb VMOVQ	%XMM4,%R12

(350) 0x442af0 MOV	0xb8(%RSP),%EBX

(350) 0x442af7 CMP	%EBX,%R10D

(350) 0x442afa JGE	442ee0

(350) 0x442b00 CMPL	$0x6,0x78(%RSP)

(350) 0x442b05 JBE	442ff0

(350) 0x442b0b VMOVQ	%XMM7,%R13

(350) 0x442b10 VMOVQ	%XMM8,%RAX

(350) 0x442b15 LEA	(%R12,%R8,8),%R15

(350) 0x442b19 LEA	(%R13,%RSI,8),%RBX

(350) 0x442b1e MOV	0xb0(%RSP),%R13

(350) 0x442b26 VMOVQ	%XMM6,%R14

(350) 0x442b2b LEA	(%RAX,%RCX,8),%RDX

(350) 0x442b2f XOR	%EAX,%EAX

(350) 0x442b31 LEA	(%R14,%RDI,8),%R14

(350) 0x442b35 SUB	$0x40,%R13

(350) 0x442b39 SHR	$0x6,%R13

(350) 0x442b3d INC	%R13

(350) 0x442b40 AND	$0x7,%R13D

(350) 0x442b44 JE	442c48

(350) 0x442b4a CMP	$0x1,%R13

(350) 0x442b4e JE	442c1a

(350) 0x442b54 CMP	$0x2,%R13

(350) 0x442b58 JE	442bfa

(350) 0x442b5e CMP	$0x3,%R13

(350) 0x442b62 JE	442bda

(350) 0x442b64 CMP	$0x4,%R13

(350) 0x442b68 JE	442bba

(350) 0x442b6a CMP	$0x5,%R13

(350) 0x442b6e JE	442b9a

(350) 0x442b70 CMP	$0x6,%R13

(350) 0x442b74 JNE	442fa0

(350) 0x442b7a VMOVUPD	(%R15,%RAX,1),%ZMM0

(350) 0x442b81 VMOVUPD	%ZMM0,(%R14,%RAX,1)

(350) 0x442b88 VMOVUPD	(%RBX,%RAX,1),%ZMM3

(350) 0x442b8f VMOVUPD	%ZMM3,(%RDX,%RAX,1)

(350) 0x442b96 ADD	$0x40,%RAX

(350) 0x442b9a VMOVUPD	(%R15,%RAX,1),%ZMM5

(350) 0x442ba1 VMOVUPD	%ZMM5,(%R14,%RAX,1)

(350) 0x442ba8 VMOVUPD	(%RBX,%RAX,1),%ZMM1

(350) 0x442baf VMOVUPD	%ZMM1,(%RDX,%RAX,1)

(350) 0x442bb6 ADD	$0x40,%RAX

(350) 0x442bba VMOVUPD	(%R15,%RAX,1),%ZMM10

(350) 0x442bc1 VMOVUPD	%ZMM10,(%R14,%RAX,1)

(350) 0x442bc8 VMOVUPD	(%RBX,%RAX,1),%ZMM11

(350) 0x442bcf VMOVUPD	%ZMM11,(%RDX,%RAX,1)

(350) 0x442bd6 ADD	$0x40,%RAX

(350) 0x442bda VMOVUPD	(%R15,%RAX,1),%ZMM12

(350) 0x442be1 VMOVUPD	%ZMM12,(%R14,%RAX,1)

(350) 0x442be8 VMOVUPD	(%RBX,%RAX,1),%ZMM13

(350) 0x442bef VMOVUPD	%ZMM13,(%RDX,%RAX,1)

(350) 0x442bf6 ADD	$0x40,%RAX

(350) 0x442bfa VMOVUPD	(%R15,%RAX,1),%ZMM14

(350) 0x442c01 VMOVUPD	%ZMM14,(%R14,%RAX,1)

(350) 0x442c08 VMOVUPD	(%RBX,%RAX,1),%ZMM15

(350) 0x442c0f VMOVUPD	%ZMM15,(%RDX,%RAX,1)

(350) 0x442c16 ADD	$0x40,%RAX

(350) 0x442c1a VMOVUPD	(%R15,%RAX,1),%ZMM4

(350) 0x442c21 VMOVUPD	%ZMM4,(%R14,%RAX,1)

(350) 0x442c28 VMOVUPD	(%RBX,%RAX,1),%ZMM9

(350) 0x442c2f VMOVUPD	%ZMM9,(%RDX,%RAX,1)

(350) 0x442c36 ADD	$0x40,%RAX

(350) 0x442c3a CMP	%RAX,0xb0(%RSP)

(350) 0x442c42 JE	442d58

  (351) 0x442c48 VMOVUPD	(%R15,%RAX,1),%ZMM2

  (351) 0x442c4f VMOVUPD	%ZMM2,(%R14,%RAX,1)

  (351) 0x442c56 VMOVUPD	(%RBX,%RAX,1),%ZMM0

  (351) 0x442c5d VMOVUPD	%ZMM0,(%RDX,%RAX,1)

  (351) 0x442c64 VMOVUPD	0x40(%R15,%RAX,1),%ZMM3

  (351) 0x442c6c VMOVUPD	%ZMM3,0x40(%R14,%RAX,1)

  (351) 0x442c74 VMOVUPD	0x40(%RBX,%RAX,1),%ZMM5

  (351) 0x442c7c VMOVUPD	%ZMM5,0x40(%RDX,%RAX,1)

  (351) 0x442c84 VMOVUPD	0x80(%R15,%RAX,1),%ZMM1

  (351) 0x442c8c VMOVUPD	%ZMM1,0x80(%R14,%RAX,1)

  (351) 0x442c94 VMOVUPD	0x80(%RBX,%RAX,1),%ZMM10

  (351) 0x442c9c VMOVUPD	%ZMM10,0x80(%RDX,%RAX,1)

  (351) 0x442ca4 VMOVUPD	0xc0(%R15,%RAX,1),%ZMM11

  (351) 0x442cac VMOVUPD	%ZMM11,0xc0(%R14,%RAX,1)

  (351) 0x442cb4 VMOVUPD	0xc0(%RBX,%RAX,1),%ZMM12

  (351) 0x442cbc VMOVUPD	%ZMM12,0xc0(%RDX,%RAX,1)

  (351) 0x442cc4 VMOVUPD	0x100(%R15,%RAX,1),%ZMM13

  (351) 0x442ccc VMOVUPD	%ZMM13,0x100(%R14,%RAX,1)

  (351) 0x442cd4 VMOVUPD	0x100(%RBX,%RAX,1),%ZMM14

  (351) 0x442cdc VMOVUPD	%ZMM14,0x100(%RDX,%RAX,1)

  (351) 0x442ce4 VMOVUPD	0x140(%R15,%RAX,1),%ZMM15

  (351) 0x442cec VMOVUPD	%ZMM15,0x140(%R14,%RAX,1)

  (351) 0x442cf4 VMOVUPD	0x140(%RBX,%RAX,1),%ZMM4

  (351) 0x442cfc VMOVUPD	%ZMM4,0x140(%RDX,%RAX,1)

  (351) 0x442d04 VMOVUPD	0x180(%R15,%RAX,1),%ZMM9

  (351) 0x442d0c VMOVUPD	%ZMM9,0x180(%R14,%RAX,1)

  (351) 0x442d14 VMOVUPD	0x180(%RBX,%RAX,1),%ZMM2

  (351) 0x442d1c VMOVUPD	%ZMM2,0x180(%RDX,%RAX,1)

  (351) 0x442d24 VMOVUPD	0x1c0(%R15,%RAX,1),%ZMM0

  (351) 0x442d2c VMOVUPD	%ZMM0,0x1c0(%R14,%RAX,1)

  (351) 0x442d34 VMOVUPD	0x1c0(%RBX,%RAX,1),%ZMM3

  (351) 0x442d3c VMOVUPD	%ZMM3,0x1c0(%RDX,%RAX,1)

  (351) 0x442d44 ADD	$0x200,%RAX

  (351) 0x442d4a CMP	%RAX,0xb0(%RSP)

  (351) 0x442d52 JNE	442c48

(350) 0x442d58 MOV	0x74(%RSP),%EAX

(350) 0x442d5c MOV	0x70(%RSP),%R15D

(350) 0x442d61 MOV	%EAX,%EDX

(350) 0x442d63 ADD	%R10D,%EAX

(350) 0x442d66 TEST	%R15D,%R15D

(350) 0x442d69 JE	442ee0

(350) 0x442d6f MOV	0x68(%RSP),%R14D

(350) 0x442d74 SUB	%EDX,%R14D

(350) 0x442d77 LEA	0x2(%R14),%EBX

(350) 0x442d7b INC	%R14D

(350) 0x442d7e CMP	$0x2,%R14D

(350) 0x442d82 JBE	442dca

(350) 0x442d84 LEA	(%RDX,%R8,1),%R13

(350) 0x442d88 LEA	(%RDI,%RDX,1),%R14

(350) 0x442d8c VMOVQ	%XMM6,%R15

(350) 0x442d91 VMOVUPD	(%R12,%R13,8),%YMM5

(350) 0x442d97 LEA	(%RSI,%RDX,1),%R13

(350) 0x442d9b ADD	%RCX,%RDX

(350) 0x442d9e VMOVUPD	%YMM5,(%R15,%R14,8)

(350) 0x442da4 VMOVQ	%XMM7,%R14

(350) 0x442da9 VMOVQ	%XMM8,%R15

(350) 0x442dae VMOVUPD	(%R14,%R13,8),%YMM1

(350) 0x442db4 VMOVUPD	%YMM1,(%R15,%RDX,8)

(350) 0x442dba MOV	%EBX,%EDX

(350) 0x442dbc AND	$-0x4,%EDX

(350) 0x442dbf ADD	%EDX,%EAX

(350) 0x442dc1 AND	$0x3,%EBX

(350) 0x442dc4 JE	442ee0

(350) 0x442dca MOV	%R8,%R15

(350) 0x442dcd MOV	%RSI,%RBX

(350) 0x442dd0 MOVSXD	%EAX,%RDX

(350) 0x442dd3 MOV	%RDI,%R14

(350) 0x442dd6 SUB	%R11,%RBX

(350) 0x442dd9 SUB	%R11,%R15

(350) 0x442ddc MOV	%RCX,%R13

(350) 0x442ddf SUB	%R11,%R14

(350) 0x442de2 SUB	%R11,%R13

(350) 0x442de5 MOV	%RBX,0xa8(%RSP)

(350) 0x442ded LEA	(%RDX,%R15,1),%RBX

(350) 0x442df1 VMOVSD	(%R12,%RBX,8),%XMM10

(350) 0x442df7 MOV	%R13,0xa0(%RSP)

(350) 0x442dff VMOVQ	%XMM6,%RBX

(350) 0x442e04 LEA	(%RDX,%R14,1),%R13

(350) 0x442e08 VMOVSD	%XMM10,(%RBX,%R13,8)

(350) 0x442e0e MOV	0xa8(%RSP),%RBX

(350) 0x442e16 LEA	(%RDX,%RBX,1),%R13

(350) 0x442e1a VMOVQ	%XMM7,%RBX

(350) 0x442e1f VMOVSD	(%RBX,%R13,8),%XMM13

(350) 0x442e25 MOV	0xa0(%RSP),%RBX

(350) 0x442e2d VMOVQ	%XMM8,%R13

(350) 0x442e32 ADD	%RBX,%RDX

(350) 0x442e35 VMOVSD	%XMM13,(%R13,%RDX,8)

(350) 0x442e3c LEA	0x1(%RAX),%EDX

(350) 0x442e3f CMP	%EDX,0xb8(%RSP)

(350) 0x442e46 JLE	442ee0

(350) 0x442e4c MOVSXD	%EDX,%RDX

(350) 0x442e4f LEA	(%R15,%RDX,1),%RBX

(350) 0x442e53 LEA	(%R14,%RDX,1),%R13

(350) 0x442e57 VMOVSD	(%R12,%RBX,8),%XMM14

(350) 0x442e5d VMOVQ	%XMM6,%RBX

(350) 0x442e62 VMOVSD	%XMM14,(%RBX,%R13,8)

(350) 0x442e68 MOV	0xa8(%RSP),%RBX

(350) 0x442e70 LEA	(%RBX,%RDX,1),%R13

(350) 0x442e74 VMOVQ	%XMM7,%RBX

(350) 0x442e79 VMOVSD	(%RBX,%R13,8),%XMM9

(350) 0x442e7f MOV	0xa0(%RSP),%RBX

(350) 0x442e87 VMOVQ	%XMM8,%R13

(350) 0x442e8c ADD	%RBX,%RDX

(350) 0x442e8f VMOVSD	%XMM9,(%R13,%RDX,8)

(350) 0x442e96 CMP	%EAX,0x64(%RSP)

(350) 0x442e9a JLE	442ee0

(350) 0x442e9c ADD	$0x2,%EAX

(350) 0x442e9f MOV	0xa0(%RSP),%RBX

(350) 0x442ea7 VMOVQ	%XMM7,%RDX

(350) 0x442eac CLTQ

(350) 0x442eae ADD	%RAX,%R15

(350) 0x442eb1 ADD	%RAX,%R14

(350) 0x442eb4 VMOVSD	(%R12,%R15,8),%XMM2

(350) 0x442eba VMOVQ	%XMM6,%R15

(350) 0x442ebf VMOVSD	%XMM2,(%R15,%R14,8)

(350) 0x442ec5 MOV	0xa8(%RSP),%R14

(350) 0x442ecd ADD	%RAX,%R14

(350) 0x442ed0 ADD	%RBX,%RAX

(350) 0x442ed3 VMOVSD	(%RDX,%R14,8),%XMM0

(350) 0x442ed9 VMOVSD	%XMM0,(%R13,%RAX,8)

(350) 0x442ee0 MOV	0xb8(%RSP),%EAX

(350) 0x442ee7 INC	%R9D

(350) 0x442eea MOV	0x88(%RSP),%R15

(350) 0x442ef2 CMP	%EAX,%R10D

(350) 0x442ef5 JLE	442f50

(350) 0x442ef7 MOV	0x80(%RSP),%R14

(350) 0x442eff MOV	0x98(%RSP),%RDX

(350) 0x442f07 MOV	0x90(%RSP),%RBX

(350) 0x442f0f ADD	%R15,%R8

(350) 0x442f12 ADD	%R14,%RDI

(350) 0x442f15 ADD	%RDX,%RSI

(350) 0x442f18 ADD	%RBX,%RCX

(350) 0x442f1b CMP	%R9D,0x7c(%RSP)

(350) 0x442f20 JG	442af0

0x442f26 CMPB	$0,0x50(%RSP)

0x442f2b MOV	0x48(%RSP),%R11

0x442f30 JNE	44300c

0x442f36 VZEROUPPER

0x442f39 LEA	-0x28(%RBP),%RSP

0x442f3d POP	%RBX

0x442f3e POP	%R12

0x442f40 POP	%R13

0x442f42 POP	%R14

0x442f44 POP	%R15

0x442f46 POP	%RBP

0x442f47 RET

0x442f48 NOPL	(%RAX,%RAX,1)

(350) 0x442f50 MOV	0x80(%RSP),%R13

(350) 0x442f58 MOV	0x98(%RSP),%RAX

(350) 0x442f60 ADD	%R15,%R8

(350) 0x442f63 MOV	0x90(%RSP),%R15

(350) 0x442f6b ADD	%R13,%RDI

(350) 0x442f6e ADD	%RAX,%RSI

(350) 0x442f71 ADD	%R15,%RCX

(350) 0x442f74 CMP	%R9D,0x7c(%RSP)

(350) 0x442f79 JLE	44306b

(350) 0x442f7f MOV	0x58(%RSP),%R14D

(350) 0x442f84 MOVB	$0x1,0x50(%RSP)

(350) 0x442f89 MOV	%R14D,0x60(%RSP)

(350) 0x442f8e JMP	442af0

0x442f93 NOPW	%CS:(%RAX,%RAX,1)

0x442f9e XCHG	%AX,%AX

(350) 0x442fa0 VMOVUPD	(%R15),%ZMM9

(350) 0x442fa6 MOV	$0x40,%EAX

(350) 0x442fab VMOVUPD	%ZMM9,(%R14)

(350) 0x442fb1 VMOVUPD	(%RBX),%ZMM2

(350) 0x442fb7 VMOVUPD	%ZMM2,(%RDX)

(350) 0x442fbd JMP	442b7a

0x442fc2 NOPW	%CS:(%RAX,%RAX,1)

0x442fcd NOPL	(%RAX)

(353) 0x442fd0 MOV	0x78(%RSP),%EBX

(353) 0x442fd4 XOR	%R13D,%R13D

(353) 0x442fd7 MOV	%EBX,0xb8(%RSP)

(353) 0x442fde JMP	442840

0x442fe3 NOPW	%CS:(%RAX,%RAX,1)

0x442fee XCHG	%AX,%AX

(350) 0x442ff0 MOV	%R10D,%EAX

(350) 0x442ff3 XOR	%EDX,%EDX

(350) 0x442ff5 JMP	442d6f

0x442ffa INC	%EAX

0x442ffc XOR	%EDX,%EDX

0x442ffe JMP	442467

0x443003 INC	%EAX

0x443005 XOR	%EDX,%EDX

0x443007 JMP	4429e5

0x44300c MOV	0x60(%RSP),%R9D

0x443011 MOV	%R9D,0x58(%RSP)

0x443016 MOV	0x58(%RSP),%R10D

0x44301b MOV	%R10D,0xe0(%R11)

0x443022 VZEROUPPER

0x443025 LEA	-0x28(%RBP),%RSP

0x443029 POP	%RBX

0x44302a POP	%R12

0x44302c POP	%R13

0x44302e POP	%R14

0x443030 POP	%R15

0x443032 POP	%RBP

0x443033 RET

0x443034 XOR	%R10D,%R10D

0x443037 NOPW	(%RAX,%RAX,1)

(352) 0x443040 INC	%EDX

(352) 0x443042 CMP	%R13D,%ECX

(352) 0x443045 JE	443072

(352) 0x443047 CMP	%EDX,0xa0(%RSP)

(352) 0x44304e JG	443040

0x443050 TEST	%R10B,%R10B

0x443053 JE	4429c0

0x443059 MOV	0xb0(%RSP),%EDX

0x443060 MOV	%EDX,0xe0(%RBX)

0x443066 JMP	4429c0

0x44306b MOV	0x48(%RSP),%R11

0x443070 JMP	443016

(352) 0x443072 CMP	%EDX,0xa0(%RSP)

(352) 0x443079 JLE	4429aa

(352) 0x44307f MOV	$0x1,%R10D

(352) 0x443085 MOV	%ECX,0xb0(%RSP)

(352) 0x44308c JMP	443040

0x44308e XCHG	%AX,%AX

Coverage (%)	Name	Source Location	Module
►95.75+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►4.15+	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0
○	reset_field_kernel	reset_field_kernel.f90:70	exec
○	reset_field	reset_field.f90:41	exec
○	hydro	hydro.f90:70	exec
○	main	clover_leaf.f90:41	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.f90:41	exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_0

Source file and lines	reset_field_kernel.f90:47-63
Module	exec

The function is defined in /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:47-63.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 29.75 to 4.13 cycles (7.21x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)
To reference allocatable arrays, use "allocatable" instead of "pointer" pointers or qualify them with the "contiguous" attribute (Fortran 2008)
For structures, limit to one indirection. For example, use a_b%c instead of a%b%c with a_b set to a%b before this function

Vectorization

Your function is probably not vectorized. Only 9% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 29.75 to 1.47 cycles (20.20x speedup).

Details

Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): do i a(i)%x = b(i)%x (slow, non stride 1) => do i a%x(i) = b%x(i) (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

unknown: 3 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:48
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:48
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:50

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVGE: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:60
CMOVLE: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:50
IDIV: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:48
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:58

Conversion instructions

Detected expensive conversion instructions.

Details

CLTD: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:48
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:58

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 413 bytes. The binary function is storing 193 bytes.

General properties

nb instructions	244
nb uops	238
loop length	1033
used x86 registers	16
used mmx registers	0
used xmm registers	8
used ymm registers	0
used zmm registers	0
nb stack references	22

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	29.75 cycles
front end	29.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	16.00	16.00	16.00	16.00	16.00	16.00	24.75	24.75	24.75	24.75	0.00	0.00	0.00	0.00	3.50	3.50
cycles	16.00	16.00	16.00	16.00	16.00	16.00	24.75	24.75	24.75	24.75	0.00	0.00	0.00	0.00	3.50	3.50

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

12.00

Cycles summary

Front-end	29.75
Dispatch	24.75
DIV/SQRT	12.00
Overall L1	29.75

Vectorization ratios

all	3%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	10%

Vector efficiency ratios

all	9%
load	11%
store	8%
mul	9%
add-sub	9%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	6%
other	10%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 29.75 cycles. At this rate:

5% of peak load performance is reached (13.88 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
5% of peak store performance is reached (6.49 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 29.75 to 24.75 cycles (1.20x speedup).

ASM code

In the binary file, the address of the function is: 4423b0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RDI,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x40,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB $0xc0,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0xd0(%RDI),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0xc8(%RDI),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0xc0(%RDI),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xb8(%RDI),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xb0(%RDI),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xa8(%RDI),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xa0(%RDI),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xd8(%RDI),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%RDI),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDX,0x98(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RCX,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RSI,0x90(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R8,0x50(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R9,0x88(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R11,0x80(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RAX,0x68(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%RDI),%R13D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CALL 402380 <@plt_start@+0x360>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %EAX,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 4022f0 <@plt_start@+0x2d0>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV 0x18(%RBX),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %EAX,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV (%R15),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
INC %EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %R13D,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CLTD																				scal (6.3%)
IDIV %R14D	2	0	0	0	2	0	0	0	0	0	0	0	0	0	0	0	0	9-14	6	scal (6.3%)
CMP %EDX,%R12D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JL 442ffa <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xc4a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %EAX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
IMUL %R12D,%ECX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	scal (6.3%)
ADD %ECX,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
ADD %EDX,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %EAX,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JGE 4429c0 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x610>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV (%RBX),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x8(%RBX),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVQ 0x70(%RBX),%XMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
ADD %R13D,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %R13D,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
VMOVQ 0x60(%RBX),%XMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV %EAX,0xa0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
VMOVQ 0x90(%RBX),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOVSXD %EDX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VMOVQ 0x80(%RBX),%XMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ 0x20(%RBX),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV 0x28(%RBX),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVQ 0x38(%RBX),%XMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ 0x30(%RBX),%XMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOVSXD (%RSI),%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	N/A
MOV (%R8),%R13D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x78(%RBX),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVQ %XMM6,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
IMUL %RAX,%R9	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
VMOVQ %XMM7,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM8,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
IMUL %RAX,%RDI	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
IMUL %RAX,%RSI	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
ADD %R10,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA 0x1(%R13),%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R10,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R13D,0x7c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
ADD %R9,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x68(%RBX),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %R10D,0x78(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
ADD %R10,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %RDI,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x98(%RBX),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %R10,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %RDI,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VMOVQ %XMM9,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV %RSI,0xb8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x88(%RBX),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
IMUL %RDI,%RAX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
ADD %R10,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %RAX,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R13D,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %R10D,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %EAX,0xa8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
INC %EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %R13D,%R10D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
CMOVLE %ECX,%R11D	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV %R11D,%R13D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JG 443034 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xc84>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %EAX,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %EAX,%R11D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VMOVQ %R10,%XMM2	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
AND $0x7,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x8,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R15,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R14D,0x64(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
VMOVQ %XMM0,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV %EDI,0x74(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV 0xb8(%RSP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVQ %XMM3,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV %EAX,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %R12D,0x44(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %R13D,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %RBX,0x38(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
SHR $0x3,%R11D	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
SAL $0x6,%R11	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV %R11,0xb0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV 0x64(%RSP),%R14D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x44(%RSP),%R12D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOV 0x40(%RSP),%R13D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x38(%RSP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
MOV %R13D,0xb0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV 0xb0(%RSP),%EDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOV %EDX,0xe0(%RBX)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CALL 402370 <@plt_start@+0x350>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV 0x18(%RBX),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%RBX),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R9),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R8),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD $0x2,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %ESI,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CLTD																				scal (6.3%)
IDIV %R14D	2	0	0	0	2	0	0	0	0	0	0	0	0	0	0	0	0	9-14	6	scal (6.3%)
CMP %EDX,%R12D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JL 443003 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xc53>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %R12D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
IMUL %EAX,%R9D	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
ADD %EDX,%R9D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %R9D,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %EAX,%R9D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JGE 442f39 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xb89>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV (%RBX),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %ESI,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %ESI,%R9D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x88(%RSP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x80(%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x50(%RSP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x8(%RBX),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOVSXD %R9D,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x90(%RSP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV %EAX,0x7c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV 0x98(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVQ 0x48(%RBX),%XMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ 0x40(%RBX),%XMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ 0x58(%RBX),%XMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOVB $0,0x50(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (1.6%)
VMOVQ 0x50(%RBX),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOVSXD (%RDI),%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	N/A
MOV 0x48(%RSP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
IMUL %R13,%RCX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	scal (12.5%)
MOV %RBX,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%R15),%R14D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
IMUL %R13,%RSI	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
IMUL %R13,%RAX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
IMUL %RDX,%R13	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
ADD %R11,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %R11,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R11,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %RCX,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %RSI,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x58(%RSP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x68(%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA 0x2(%R14),%R12D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R14D,0x64(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
SUB %R11D,%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA 0x1(%R14),%R15D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R12D,0xb8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %R14D,0x68(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
LEA 0x2(%R14),%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R15D,0x78(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
ADD %R11,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %R11,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
ADD %R13,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
ADD %RAX,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %R12D,%R11D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV %R14D,%R13D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMOVGE %R11D,%R12D	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	scal (6.3%)
AND $-0x8,%R13D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R12D,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %R14D,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
AND $0x7,%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R13D,0x74(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
SHR $0x3,%R12D	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	scal (6.3%)
MOV %R14D,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
SAL $0x6,%R12	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
MOV %R12,0xb0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVQ %XMM4,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
CMPB $0,0x50(%RSP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (1.6%)
MOV 0x48(%RSP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JNE 44300c <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xc5c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
LEA -0x28(%RBP),%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
INC %EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
JMP 442467 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xb7>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
INC %EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
JMP 4429e5 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x635>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV 0x60(%RSP),%R9D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %R9D,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV 0x58(%RSP),%R10D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %R10D,0xe0(%R11)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
LEA -0x28(%RBP),%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
XOR %R10D,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
TEST %R10B,%R10B	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JE 4429c0 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x610>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0xb0(%RSP),%EDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOV %EDX,0xe0(%RBX)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
JMP 4429c0 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x610>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV 0x48(%RSP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JMP 443016 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xc66>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_0

Source file and lines	reset_field_kernel.f90:47-63
Module	exec

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 29.75 to 4.13 cycles (7.21x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)
To reference allocatable arrays, use "allocatable" instead of "pointer" pointers or qualify them with the "contiguous" attribute (Fortran 2008)
For structures, limit to one indirection. For example, use a_b%c instead of a%b%c with a_b set to a%b before this function

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): do i a(i)%x = b(i)%x (slow, non stride 1) => do i a%x(i) = b%x(i) (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

unknown: 3 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:48
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:48
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:50

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVGE: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:60
CMOVLE: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:50
IDIV: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:48
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:58

Conversion instructions

Detected expensive conversion instructions.

Details

CLTD: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:48
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:58

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 413 bytes. The binary function is storing 193 bytes.

General properties

nb instructions	244
nb uops	238
loop length	1033
used x86 registers	16
used mmx registers	0
used xmm registers	8
used ymm registers	0
used zmm registers	0
nb stack references	22

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	29.75 cycles
front end	29.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	16.00	16.00	16.00	16.00	16.00	16.00	24.75	24.75	24.75	24.75	0.00	0.00	0.00	0.00	3.50	3.50
cycles	16.00	16.00	16.00	16.00	16.00	16.00	24.75	24.75	24.75	24.75	0.00	0.00	0.00	0.00	3.50	3.50

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

12.00

Cycles summary

Front-end	29.75
Dispatch	24.75
DIV/SQRT	12.00
Overall L1	29.75

Vectorization ratios

all	3%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	10%

Vector efficiency ratios

all	9%
load	11%
store	8%
mul	9%
add-sub	9%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	6%
other	10%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 29.75 cycles. At this rate:

5% of peak load performance is reached (13.88 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
5% of peak store performance is reached (6.49 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 4423b0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RDI,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x40,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB $0xc0,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0xd0(%RDI),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0xc8(%RDI),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0xc0(%RDI),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xb8(%RDI),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xb0(%RDI),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xa8(%RDI),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xa0(%RDI),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xd8(%RDI),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%RDI),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDX,0x98(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RCX,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RSI,0x90(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R8,0x50(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R9,0x88(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R11,0x80(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RAX,0x68(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%RDI),%R13D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CALL 402380 <@plt_start@+0x360>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV %EAX,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CALL 4022f0 <@plt_start@+0x2d0>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV 0x18(%RBX),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %EAX,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV (%R15),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
INC %EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %R13D,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CLTD																				scal (6.3%)
IDIV %R14D	2	0	0	0	2	0	0	0	0	0	0	0	0	0	0	0	0	9-14	6	scal (6.3%)
CMP %EDX,%R12D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JL 442ffa <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xc4a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %EAX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
IMUL %R12D,%ECX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	scal (6.3%)
ADD %ECX,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
ADD %EDX,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %EAX,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JGE 4429c0 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x610>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV (%RBX),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x8(%RBX),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVQ 0x70(%RBX),%XMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
ADD %R13D,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %R13D,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
VMOVQ 0x60(%RBX),%XMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV %EAX,0xa0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
VMOVQ 0x90(%RBX),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOVSXD %EDX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VMOVQ 0x80(%RBX),%XMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ 0x20(%RBX),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOV 0x28(%RBX),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVQ 0x38(%RBX),%XMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ 0x30(%RBX),%XMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOVSXD (%RSI),%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	N/A
MOV (%R8),%R13D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x78(%RBX),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVQ %XMM6,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
IMUL %RAX,%R9	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
VMOVQ %XMM7,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVQ %XMM8,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
IMUL %RAX,%RDI	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
IMUL %RAX,%RSI	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
ADD %R10,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA 0x1(%R13),%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R10,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R13D,0x7c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
ADD %R9,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x68(%RBX),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %R10D,0x78(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
ADD %R10,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %RDI,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x98(%RBX),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %R10,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %RDI,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VMOVQ %XMM9,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV %RSI,0xb8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x88(%RBX),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
IMUL %RDI,%RAX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
ADD %R10,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %RAX,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R13D,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %R10D,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %EAX,0xa8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
INC %EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %R13D,%R10D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
CMOVLE %ECX,%R11D	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV %R11D,%R13D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JG 443034 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xc84>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %EAX,%EDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %EAX,%R11D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VMOVQ %R10,%XMM2	1	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
AND $0x7,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x8,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R15,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R14D,0x64(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
VMOVQ %XMM0,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV %EDI,0x74(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV 0xb8(%RSP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVQ %XMM3,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
MOV %EAX,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %R12D,0x44(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %R13D,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %RBX,0x38(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
SHR $0x3,%R11D	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
SAL $0x6,%R11	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV %R11,0xb0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV 0x64(%RSP),%R14D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x44(%RSP),%R12D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOV 0x40(%RSP),%R13D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x38(%RSP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
MOV %R13D,0xb0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV 0xb0(%RSP),%EDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOV %EDX,0xe0(%RBX)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CALL 402370 <@plt_start@+0x350>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV 0x18(%RBX),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%RBX),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R9),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R8),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD $0x2,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %ESI,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CLTD																				scal (6.3%)
IDIV %R14D	2	0	0	0	2	0	0	0	0	0	0	0	0	0	0	0	0	9-14	6	scal (6.3%)
CMP %EDX,%R12D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JL 443003 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xc53>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %R12D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
IMUL %EAX,%R9D	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
ADD %EDX,%R9D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %R9D,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %EAX,%R9D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JGE 442f39 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xb89>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV (%RBX),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD %ESI,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %ESI,%R9D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x88(%RSP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x80(%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x50(%RSP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x8(%RBX),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOVSXD %R9D,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x90(%RSP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV %EAX,0x7c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV 0x98(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VMOVQ 0x48(%RBX),%XMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ 0x40(%RBX),%XMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVQ 0x58(%RBX),%XMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOVB $0,0x50(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (1.6%)
VMOVQ 0x50(%RBX),%XMM8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOVSXD (%RDI),%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	N/A
MOV 0x48(%RSP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
IMUL %R13,%RCX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	scal (12.5%)
MOV %RBX,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%R15),%R14D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
IMUL %R13,%RSI	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
IMUL %R13,%RAX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
IMUL %RDX,%R13	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
ADD %R11,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %R11,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R11,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %RCX,%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %RSI,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x58(%RSP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x68(%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA 0x2(%R14),%R12D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R14D,0x64(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
SUB %R11D,%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA 0x1(%R14),%R15D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R12D,0xb8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %R14D,0x68(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
LEA 0x2(%R14),%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R15D,0x78(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
ADD %R11,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %R11,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
ADD %R13,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
ADD %RAX,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %R12D,%R11D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV %R14D,%R13D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMOVGE %R11D,%R12D	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	scal (6.3%)
AND $-0x8,%R13D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R12D,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %R14D,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
AND $0x7,%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R13D,0x74(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
SHR $0x3,%R12D	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	scal (6.3%)
MOV %R14D,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
SAL $0x6,%R12	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
MOV %R12,0xb0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVQ %XMM4,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
CMPB $0,0x50(%RSP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (1.6%)
MOV 0x48(%RSP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JNE 44300c <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xc5c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
LEA -0x28(%RBP),%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
INC %EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
JMP 442467 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xb7>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
INC %EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
JMP 4429e5 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x635>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV 0x60(%RSP),%R9D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %R9D,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV 0x58(%RSP),%R10D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %R10D,0xe0(%R11)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
LEA -0x28(%RBP),%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
XOR %R10D,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
TEST %R10B,%R10B	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JE 4429c0 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x610>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV 0xb0(%RSP),%EDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOV %EDX,0xe0(%RBX)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
JMP 4429c0 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x610>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV 0x48(%RSP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JMP 443016 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xc66>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0–	5.17	1.94
▼Loop 350 - reset_field_kernel.f90:47-63 - exec–	0.00	0.00
○Loop 351 - reset_field_kernel.f90:62-63 - exec	2.60	0.97
▼Loop 353 - reset_field_kernel.f90:50-53 - exec–	0.00	0.01
○Loop 354 - reset_field_kernel.f90:52-53 - exec	2.56	0.96
○Loop 352 - reset_field_kernel.f90:48-50 - exec	0.00	0.00

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