OV - exec - Function revert_kernel_module_mp_revert_kernel

	Function: revert_kernel_module_mp_revert_kernel_.DIR.OMP.PARALLEL.2	Module: exec	Source: revert_kernel.f90:41-51	Coverage (incl. loops): 2.41% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/revert_kernel.f90: 41 - 51

--------------------------------------------------------------------------------

41:     !$OMP PARALLEL

42:

43:     !$OMP DO

44:     DO k=y_min,y_max

45:     !$OMP SIMD

46:       DO j=x_min,x_max

47:         density1(j,k)=density0(j,k)

48:         energy1(j,k)=energy0(j,k)

49:       ENDDO

50:     ENDDO

51:   !$OMP END DO

0x432650 PUSH	%RBP

0x432651 MOV	%RSP,%RBP

0x432654 PUSH	%R15

0x432656 PUSH	%R14

0x432658 PUSH	%R13

0x43265a PUSH	%R12

0x43265c PUSH	%RBX

0x43265d SUB	$0xa8,%RSP

0x432664 MOV	%R9,-0x70(%RBP)

0x432668 MOV	%R8,-0x68(%RBP)

0x43266c MOV	%RCX,%R14

0x43266f MOV	%RDX,%R13

0x432672 MOV	0x58(%RBP),%RAX

0x432676 MOV	%RAX,-0xc8(%RBP)

0x43267d MOV	0x50(%RBP),%RAX

0x432681 MOV	%RAX,-0xc0(%RBP)

0x432688 MOV	0x48(%RBP),%RAX

0x43268c MOV	%RAX,-0xb8(%RBP)

0x432693 MOV	0x40(%RBP),%RAX

0x432697 MOV	%RAX,-0xb0(%RBP)

0x43269e MOV	0x38(%RBP),%R15

0x4326a2 MOV	0x30(%RBP),%RDX

0x4326a6 MOV	0x28(%RBP),%EBX

0x4326a9 MOV	0x20(%RBP),%EAX

0x4326ac SUB	%EBX,%EAX

0x4326ae MOV	0x18(%RBP),%RCX

0x4326b2 MOV	%RCX,-0x60(%RBP)

0x4326b6 MOV	0x10(%RBP),%RCX

0x4326ba MOV	%RCX,-0x58(%RBP)

0x4326be MOVL	$0,-0x4c(%RBP)

0x4326c5 JS	432731

0x4326c7 MOV	%RDX,-0x38(%RBP)

0x4326cb MOV	%RDI,-0x78(%RBP)

0x4326cf MOV	(%RDI),%ESI

0x4326d1 MOVL	$0,-0x30(%RBP)

0x4326d8 MOV	%EAX,-0x2c(%RBP)

0x4326db MOVL	$0x1,-0x48(%RBP)

0x4326e2 SUB	$0x8,%RSP

0x4326e6 LEA	-0x48(%RBP),%RAX

0x4326ea LEA	-0x4c(%RBP),%RCX

0x4326ee LEA	-0x30(%RBP),%R8

0x4326f2 LEA	-0x2c(%RBP),%R9

0x4326f6 MOV	$0x53a090,%EDI

0x4326fb MOV	%ESI,-0x44(%RBP)

0x4326fe MOV	$0x22,%EDX

0x432703 PUSH	$0x1

0x432705 PUSH	$0x1

0x432707 PUSH	%RAX

0x432708 CALL	404670 <__kmpc_for_static_init_4@plt>

0x43270d ADD	$0x20,%RSP

0x432711 MOV	-0x30(%RBP),%EAX

0x432714 MOV	-0x2c(%RBP),%R12D

0x432718 SUB	%EAX,%R12D

0x43271b JAE	43274e

0x43271d MOV	$0x53a0b0,%EDI

0x432722 MOV	-0x44(%RBP),%ESI

0x432725 VZEROUPPER

0x432728 CALL	404230 <__kmpc_for_static_fini@plt>

0x43272d MOV	-0x78(%RBP),%RDI

0x432731 MOV	(%RDI),%ESI

0x432733 MOV	$0x53a0d0,%EDI

0x432738 ADD	$0xa8,%RSP

0x43273f POP	%RBX

0x432740 POP	%R12

0x432742 POP	%R13

0x432744 POP	%R14

0x432746 POP	%R15

0x432748 POP	%RBP

0x432749 JMP	404740

0x43274e MOV	%R14,%RSI

0x432751 SAL	$0x20,%RSI

0x432755 MOV	$-0x200000000,%RDX

0x43275f LEA	(%RSI,%RDX,1),%RDI

0x432763 MOV	%RDI,%RCX

0x432766 SAR	$0x20,%RCX

0x43276a MOV	%RCX,-0x40(%RBP)

0x43276e SAL	$0x20,%R13

0x432772 ADD	%R13,%RDX

0x432775 MOVSXD	(%R15),%R9

0x432778 MOV	-0x38(%RBP),%RCX

0x43277c MOV	(%RCX),%R11D

0x43277f SUB	%R9D,%R11D

0x432782 LEA	0x1(%R11),%ECX

0x432786 CMP	$0x2,%ECX

0x432789 MOV	$0x1,%R8D

0x43278f CMOVGE	%ECX,%R8D

0x432793 MOV	%R8,-0x38(%RBP)

0x432797 AND	$0x7ffffffc,%R8D

0x43279e TEST	%RDI,%RDI

0x4327a1 MOV	$-0x1,%RCX

0x4327a8 CMOVNS	%RDI,%RCX

0x4327ac TEST	%RCX,%RCX

0x4327af MOV	$0x1,%R15D

0x4327b5 CMOVG	%R15,%RCX

0x4327b9 MOV	$0x200000000,%R14

0x4327c3 MOV	%R14,%R10

0x4327c6 SUB	%RSI,%R10

0x4327c9 CMP	%R10,%RDI

0x4327cc CMOVG	%RDI,%R10

0x4327d0 SHR	$0x20,%R10

0x4327d4 IMUL	%RCX,%R10

0x4327d8 LEA	(,%R9,8),%RDI

0x4327e0 SAL	$0x3,%R10

0x4327e4 SUB	%R10,%RDI

0x4327e7 MOV	$-0x1,%RCX

0x4327ee TEST	%RDX,%RDX

0x4327f1 CMOVNS	%RDX,%RCX

0x4327f5 TEST	%RCX,%RCX

0x4327f8 CMOVG	%R15,%RCX

0x4327fc SUB	%R13,%R14

0x4327ff CMP	%R14,%RDX

0x432802 CMOVG	%RDX,%R14

0x432806 MOV	-0x68(%RBP),%RDX

0x43280a ADD	%RDI,%RDX

0x43280d MOV	%RDX,-0x90(%RBP)

0x432814 SHR	$0x20,%R14

0x432818 IMUL	%RCX,%R14

0x43281c NEG	%R14

0x43281f MOV	%R14,-0xa8(%RBP)

0x432826 ADD	%EBX,%EAX

0x432828 MOV	-0x70(%RBP),%RCX

0x43282c ADD	%RDI,%RCX

0x43282f MOV	%RCX,-0x88(%RBP)

0x432836 MOV	-0x58(%RBP),%RCX

0x43283a ADD	%RDI,%RCX

0x43283d MOV	%RCX,-0x80(%RBP)

0x432841 ADD	-0x60(%RBP),%RDI

0x432845 MOV	%RDI,-0x98(%RBP)

0x43284c SUB	-0x40(%RBP),%R9

0x432850 MOV	%R9,-0x40(%RBP)

0x432854 MOV	%R11,%R9

0x432857 XOR	%EBX,%EBX

0x432859 MOV	%R11,-0xa0(%RBP)

0x432860 JMP	432880

0x432862 NOPW	%CS:(%RAX,%RAX,1)

(345) 0x432870 LEA	0x1(%RBX),%ECX

(345) 0x432873 INC	%EAX

(345) 0x432875 CMP	%R12D,%EBX

(345) 0x432878 MOV	%ECX,%EBX

(345) 0x43287a JE	43271d

(345) 0x432880 TEST	%R9D,%R9D

(345) 0x432883 JS	432870

(345) 0x432885 MOVSXD	%EAX,%R13

(345) 0x432888 ADD	-0xa8(%RBP),%R13

(345) 0x43288f MOV	-0xb0(%RBP),%RCX

(345) 0x432896 MOV	(%RCX),%RCX

(345) 0x432899 MOV	-0xb8(%RBP),%RDX

(345) 0x4328a0 MOV	(%RDX),%R11

(345) 0x4328a3 MOV	-0xc0(%RBP),%RDX

(345) 0x4328aa MOV	(%RDX),%R15

(345) 0x4328ad MOV	-0xc8(%RBP),%RDX

(345) 0x4328b4 MOV	(%RDX),%RDX

(345) 0x4328b7 TEST	%R8,%R8

(345) 0x4328ba JE	432940

(345) 0x4328c0 MOV	%R12D,%R9D

(345) 0x4328c3 MOV	%RDX,%RDI

(345) 0x4328c6 IMUL	%R13,%RDI

(345) 0x4328ca ADD	-0x90(%RBP),%RDI

(345) 0x4328d1 MOV	%R15,%R10

(345) 0x4328d4 IMUL	%R13,%R10

(345) 0x4328d8 ADD	-0x88(%RBP),%R10

(345) 0x4328df MOV	%R11,%R12

(345) 0x4328e2 IMUL	%R13,%R12

(345) 0x4328e6 ADD	-0x80(%RBP),%R12

(345) 0x4328ea MOV	%RCX,%R14

(345) 0x4328ed IMUL	%R13,%R14

(345) 0x4328f1 ADD	-0x98(%RBP),%R14

(345) 0x4328f8 XOR	%ESI,%ESI

(345) 0x4328fa NOPW	(%RAX,%RAX,1)

  (347) 0x432900 VMOVUPS	(%R14,%RSI,8),%YMM0

  (347) 0x432906 VMOVUPS	%YMM0,(%R12,%RSI,8)

  (347) 0x43290c VMOVUPS	(%R10,%RSI,8),%YMM0

  (347) 0x432912 VMOVUPS	%YMM0,(%RDI,%RSI,8)

  (347) 0x432917 ADD	$0x4,%RSI

  (347) 0x43291b CMP	%R8,%RSI

  (347) 0x43291e JB	432900

(345) 0x432920 MOV	%R8,%R10

(345) 0x432923 CMP	-0x38(%RBP),%R8

(345) 0x432927 MOV	%R9D,%R12D

(345) 0x43292a MOV	-0xa0(%RBP),%R9

(345) 0x432931 JE	432870

(345) 0x432937 JMP	432943

0x432939 NOPL	(%RAX)

(345) 0x432940 XOR	%R10D,%R10D

(345) 0x432943 MOV	-0x38(%RBP),%RDI

(345) 0x432947 SUB	%R10,%RDI

(345) 0x43294a IMUL	%R13,%R15

(345) 0x43294e ADD	-0x40(%RBP),%R10

(345) 0x432952 LEA	(%R15,%R10,8),%R15

(345) 0x432956 ADD	-0x70(%RBP),%R15

(345) 0x43295a IMUL	%R13,%RDX

(345) 0x43295e LEA	(%RDX,%R10,8),%RDX

(345) 0x432962 ADD	-0x68(%RBP),%RDX

(345) 0x432966 IMUL	%R13,%RCX

(345) 0x43296a LEA	(%RCX,%R10,8),%R14

(345) 0x43296e ADD	-0x60(%RBP),%R14

(345) 0x432972 IMUL	%R13,%R11

(345) 0x432976 LEA	(%R11,%R10,8),%RCX

(345) 0x43297a ADD	-0x58(%RBP),%RCX

(345) 0x43297e XOR	%ESI,%ESI

  (346) 0x432980 VMOVSD	(%R14,%RSI,8),%XMM0

  (346) 0x432986 VMOVSD	%XMM0,(%RCX,%RSI,8)

  (346) 0x43298b VMOVSD	(%R15,%RSI,8),%XMM0

  (346) 0x432991 VMOVSD	%XMM0,(%RDX,%RSI,8)

  (346) 0x432996 INC	%RSI

  (346) 0x432999 CMP	%RSI,%RDI

  (346) 0x43299c JNE	432980

(345) 0x43299e JMP	432870

0x4329a3 NOPW	%CS:(%RAX,%RAX,1)

0x4329ad NOPL	(%RAX)

Coverage (%)	Name	Source Location	Module
►50.93+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so
○	__kmp_launch_thread		libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]		libiomp5.so
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►36.87+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so
○	__kmp_launch_thread		libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]		libiomp5.so
►5.66+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so
○	__kmp_launch_thread		libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]		libiomp5.so
○	start_thread		libc.so.6
►4.08+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so
○	__kmp_fork_call		libiomp5.so
○	__kmpc_fork_call		libiomp5.so
○	revert_kernel	revert_kernel.f90:55	exec
○	revert	revert.f90:39	exec
○	pdv	PdV.f90:137	exec
○	hydro	hydro.f90:56	exec
○	main		exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start		exec
►2.36+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so
○	__kmp_launch_thread		libiomp5.so

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_0

Source file and lines	revert_kernel.f90:41-51
Module	exec

The function is defined in /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/revert_kernel.f90:41-51.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is probably not vectorized. Only 11% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 17.63 to 1.43 cycles (12.34x speedup).

Details

Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): do i a(i)%x = b(i)%x (slow, non stride 1) => do i a%x(i) = b%x(i) (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

__kmpc_for_static_fini@plt: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/revert_kernel.f90:51
__kmpc_for_static_init_4@plt: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/revert_kernel.f90:45

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVG: 4 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/revert_kernel.f90:44
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/revert_kernel.f90:44
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/revert_kernel.f90:44
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/revert_kernel.f90:44
CMOVGE: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/revert_kernel.f90:46

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 156 bytes. The binary function is storing 172 bytes.

General properties

nb instructions	138
nb uops	141
loop length	564
used x86 registers	16
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	32

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	17.63 cycles
front end	17.63 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	11.67	11.67	11.67	11.67	11.67	11.67	12.50	12.50	12.50	12.50	0.00	0.00	0.00	0.00	0.00	0.00
cycles	11.67	11.67	11.67	11.67	11.67	11.67	12.50	12.50	12.50	12.50	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	17.63
Dispatch	12.50
Overall L1	17.63

Vectorization ratios

all	1%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	4%

Vector efficiency ratios

all	11%
load	6%
store	11%
mul	12%
add-sub	11%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	11%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 17.63 cycles. At this rate:

3% of peak load performance is reached (8.85 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
7% of peak store performance is reached (9.76 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 17.63 to 12.50 cycles (1.41x speedup).

ASM code

In the binary file, the address of the function is: 432650

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0xa8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV %R9,-0x70(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R8,-0x68(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RCX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV %RDX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV 0x58(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,-0xc8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x50(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,-0xc0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x48(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,-0xb8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x40(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,-0xb0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x38(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x30(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x28(%RBP),%EBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
MOV 0x20(%RBP),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
SUB %EBX,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV 0x18(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0x58(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOVL $0,-0x4c(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
JS 432731 <revert_kernel_module_mp_revert_kernel_.DIR.OMP.PARALLEL.2+0xe1>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV %RDX,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RDI,-0x78(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOVL $0,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV %EAX,-0x2c(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOVL $0x1,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
LEA -0x48(%RBP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x4c(%RBP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x30(%RBP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x2c(%RBP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV $0x53a090,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %ESI,-0x44(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 404670 <__kmpc_for_static_init_4@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x30(%RBP),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV -0x2c(%RBP),%R12D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
SUB %EAX,%R12D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JAE 43274e <revert_kernel_module_mp_revert_kernel_.DIR.OMP.PARALLEL.2+0xfe>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV $0x53a0b0,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV -0x44(%RBP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 404230 <__kmpc_for_static_fini@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
MOV -0x78(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV $0x53a0d0,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
ADD $0xa8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 404740 <__kmpc_barrier@plt>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
MOV %R14,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SAL $0x20,%RSI	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.33	N/A
MOV $-0x200000000,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA (%RSI,%RDX,1),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %RDI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SAR $0x20,%RCX	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.33	N/A
MOV %RCX,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
SAL $0x20,%R13	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.33	scal (12.5%)
ADD %R13,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOVSXD (%R15),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	N/A
MOV -0x38(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RCX),%R11D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
SUB %R9D,%R11D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA 0x1(%R11),%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
CMP $0x2,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
MOV $0x1,%R8D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
CMOVGE %ECX,%R8D	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	1	0.33	scal (6.3%)
MOV %R8,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
AND $0x7ffffffc,%R8D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
TEST %RDI,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV $-0x1,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMOVNS %RDI,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
TEST %RCX,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV $0x1,%R15D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMOVG %R15,%RCX	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	1	0.33	N/A
MOV $0x200000000,%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV %R14,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
SUB %RSI,%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
CMP %R10,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
CMOVG %RDI,%R10	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	1	0.33	scal (12.5%)
SHR $0x20,%R10	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.33	scal (12.5%)
IMUL %RCX,%R10	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	scal (12.5%)
LEA (,%R9,8),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
SAL $0x3,%R10	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.33	scal (12.5%)
SUB %R10,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV $-0x1,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
TEST %RDX,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
CMOVNS %RDX,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
TEST %RCX,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
CMOVG %R15,%RCX	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	1	0.33	N/A
SUB %R13,%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
CMP %R14,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
CMOVG %RDX,%R14	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	1	0.33	scal (12.5%)
MOV -0x68(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
ADD %RDI,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RDX,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
SHR $0x20,%R14	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.33	scal (12.5%)
IMUL %RCX,%R14	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	scal (12.5%)
NEG %R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV %R14,-0xa8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
ADD %EBX,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV -0x70(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
ADD %RDI,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RCX,-0x88(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV -0x58(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
ADD %RDI,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RCX,-0x80(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
ADD -0x60(%RBP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	N/A
MOV %RDI,-0x98(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
SUB -0x40(%RBP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	N/A
MOV %R9,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R11,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %EBX,%EBX	1	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
MOV %R11,-0xa0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
JMP 432880 <revert_kernel_module_mp_revert_kernel_.DIR.OMP.PARALLEL.2+0x230>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_0

Source file and lines	revert_kernel.f90:41-51
Module	exec

gain
potential
hint
expert

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): do i a(i)%x = b(i)%x (slow, non stride 1) => do i a%x(i) = b%x(i) (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

__kmpc_for_static_fini@plt: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/revert_kernel.f90:51
__kmpc_for_static_init_4@plt: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/revert_kernel.f90:45

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVG: 4 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/revert_kernel.f90:44
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/revert_kernel.f90:44
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/revert_kernel.f90:44
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/revert_kernel.f90:44
CMOVGE: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/revert_kernel.f90:46

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 156 bytes. The binary function is storing 172 bytes.

General properties

nb instructions	138
nb uops	141
loop length	564
used x86 registers	16
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	32

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	17.63 cycles
front end	17.63 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	11.67	11.67	11.67	11.67	11.67	11.67	12.50	12.50	12.50	12.50	0.00	0.00	0.00	0.00	0.00	0.00
cycles	11.67	11.67	11.67	11.67	11.67	11.67	12.50	12.50	12.50	12.50	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	17.63
Dispatch	12.50
Overall L1	17.63

Vectorization ratios

all	1%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	4%

Vector efficiency ratios

all	11%
load	6%
store	11%
mul	12%
add-sub	11%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	11%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 17.63 cycles. At this rate:

3% of peak load performance is reached (8.85 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
7% of peak store performance is reached (9.76 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 432650

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0xa8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV %R9,-0x70(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R8,-0x68(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RCX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV %RDX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV 0x58(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,-0xc8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x50(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,-0xc0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x48(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,-0xb8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x40(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,-0xb0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x38(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x30(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x28(%RBP),%EBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
MOV 0x20(%RBP),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
SUB %EBX,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV 0x18(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0x58(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOVL $0,-0x4c(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
JS 432731 <revert_kernel_module_mp_revert_kernel_.DIR.OMP.PARALLEL.2+0xe1>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV %RDX,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RDI,-0x78(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOVL $0,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV %EAX,-0x2c(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOVL $0x1,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
LEA -0x48(%RBP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x4c(%RBP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x30(%RBP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x2c(%RBP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV $0x53a090,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %ESI,-0x44(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 404670 <__kmpc_for_static_init_4@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x30(%RBP),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV -0x2c(%RBP),%R12D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
SUB %EAX,%R12D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JAE 43274e <revert_kernel_module_mp_revert_kernel_.DIR.OMP.PARALLEL.2+0xfe>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV $0x53a0b0,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV -0x44(%RBP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 404230 <__kmpc_for_static_fini@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
MOV -0x78(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV $0x53a0d0,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
ADD $0xa8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 404740 <__kmpc_barrier@plt>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
MOV %R14,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SAL $0x20,%RSI	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.33	N/A
MOV $-0x200000000,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA (%RSI,%RDX,1),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %RDI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SAR $0x20,%RCX	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.33	N/A
MOV %RCX,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
SAL $0x20,%R13	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.33	scal (12.5%)
ADD %R13,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOVSXD (%R15),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	N/A
MOV -0x38(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RCX),%R11D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
SUB %R9D,%R11D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA 0x1(%R11),%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
CMP $0x2,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
MOV $0x1,%R8D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
CMOVGE %ECX,%R8D	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	1	0.33	scal (6.3%)
MOV %R8,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
AND $0x7ffffffc,%R8D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
TEST %RDI,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV $-0x1,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMOVNS %RDI,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
TEST %RCX,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV $0x1,%R15D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMOVG %R15,%RCX	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	1	0.33	N/A
MOV $0x200000000,%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV %R14,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
SUB %RSI,%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
CMP %R10,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
CMOVG %RDI,%R10	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	1	0.33	scal (12.5%)
SHR $0x20,%R10	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.33	scal (12.5%)
IMUL %RCX,%R10	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	scal (12.5%)
LEA (,%R9,8),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
SAL $0x3,%R10	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.33	scal (12.5%)
SUB %R10,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV $-0x1,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
TEST %RDX,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
CMOVNS %RDX,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
TEST %RCX,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
CMOVG %R15,%RCX	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	1	0.33	N/A
SUB %R13,%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
CMP %R14,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
CMOVG %RDX,%R14	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	1	0.33	scal (12.5%)
MOV -0x68(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
ADD %RDI,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RDX,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
SHR $0x20,%R14	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.33	scal (12.5%)
IMUL %RCX,%R14	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	scal (12.5%)
NEG %R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV %R14,-0xa8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
ADD %EBX,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV -0x70(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
ADD %RDI,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RCX,-0x88(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV -0x58(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
ADD %RDI,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RCX,-0x80(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
ADD -0x60(%RBP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	N/A
MOV %RDI,-0x98(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
SUB -0x40(%RBP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	N/A
MOV %R9,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R11,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XOR %EBX,%EBX	1	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
MOV %R11,-0xa0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
JMP 432880 <revert_kernel_module_mp_revert_kernel_.DIR.OMP.PARALLEL.2+0x230>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼revert_kernel_module_mp_revert_kernel_.DIR.OMP.PARALLEL.2–	2.41	0.96
▼Loop 345 - revert_kernel.f90:44-48 - exec–	0.00	0.01
○Loop 347 - revert_kernel.f90:46-48 - exec	2.41	0.95
○Loop 346 - revert_kernel.f90:46-48 - exec	0.00	0.00

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