| Loop Id: 51 | Module: exec | Source: accelerate_kernel.f90:63-75 [...] | Coverage: 5.29% |
|---|
| Loop Id: 51 | Module: exec | Source: accelerate_kernel.f90:63-75 [...] | Coverage: 5.29% |
|---|
0x224e20 VMOVUPD -0x8(%R9,%RCX,8),%ZMM4 [13] |
0x224e2b VMOVUPD (%R9,%RCX,8),%ZMM5 [13] |
0x224e32 VMOVUPD (%RAX,%RCX,8),%ZMM6 [2] |
0x224e39 VMOVUPD -0x8(%RAX,%RCX,8),%ZMM8 [2] |
0x224e44 VMOVUPD (%R12,%RCX,8),%ZMM7 [10] |
0x224e4b VMOVUPD -0x8(%RBX,%RCX,8),%ZMM10 [15] |
0x224e56 VMOVUPD (%RBX,%RCX,8),%ZMM11 [15] |
0x224e5d VMOVUPD (%R13,%RCX,8),%ZMM9 [11] |
0x224e65 VMOVUPD (%R14,%RCX,8),%ZMM13 [8] |
0x224e6c MOV 0xb8(%RSP),%R11 [14] |
0x224e74 VMOVUPD -0x8(%R8,%RCX,8),%ZMM16 [12] |
0x224e7f VMULPD -0x8(%RSI,%RCX,8),%ZMM4,%ZMM4 [9] |
0x224e8a VMULPD (%RSI,%RCX,8),%ZMM5,%ZMM5 [9] |
0x224e91 VMULPD (%RDX,%RCX,8),%ZMM6,%ZMM6 [16] |
0x224e98 VSUBPD %ZMM10,%ZMM11,%ZMM12 |
0x224e9e VADDPD %ZMM5,%ZMM4,%ZMM4 |
0x224ea4 VMULPD -0x8(%RDX,%RCX,8),%ZMM8,%ZMM5 [16] |
0x224eaf VMULPD %ZMM13,%ZMM12,%ZMM12 |
0x224eb5 VADDPD %ZMM5,%ZMM6,%ZMM5 |
0x224ebb VMOVUPD -0x8(%R12,%RCX,8),%ZMM6 [10] |
0x224ec6 VADDPD %ZMM5,%ZMM4,%ZMM4 |
0x224ecc VMOVUPD (%R11,%RCX,8),%ZMM5 [7] |
0x224ed3 MOV 0xc8(%RSP),%R11 [14] |
0x224edb VMULPD %ZMM3,%ZMM4,%ZMM4 |
0x224ee1 VSUBPD %ZMM6,%ZMM7,%ZMM8 |
0x224ee7 VSUBPD %ZMM6,%ZMM10,%ZMM6 |
0x224eed VMOVUPD -0x8(%R10,%RCX,8),%ZMM10 [1] |
0x224ef8 VSUBPD %ZMM7,%ZMM11,%ZMM7 |
0x224efe VMOVUPD (%R11,%RCX,8),%ZMM14 [6] |
0x224f05 MOV 0xd0(%RSP),%R11 [14] |
0x224f0d VDIVPD %ZMM4,%ZMM0,%ZMM4 |
0x224f13 VMULPD %ZMM9,%ZMM8,%ZMM8 |
0x224f19 VMOVUPD (%R11,%RCX,8),%ZMM17 [5] |
0x224f20 VADDPD %ZMM12,%ZMM8,%ZMM8 |
0x224f26 VMOVUPD (%R10,%RCX,8),%ZMM12 [1] |
0x224f2d VMULPD %ZMM10,%ZMM6,%ZMM6 |
0x224f33 VMULPD %ZMM12,%ZMM7,%ZMM7 |
0x224f39 VMULPD %ZMM8,%ZMM4,%ZMM8 |
0x224f3f VADDPD %ZMM7,%ZMM6,%ZMM6 |
0x224f45 VMOVUPD -0x8(%R11,%RCX,8),%ZMM7 [5] |
0x224f50 VSUBPD %ZMM8,%ZMM5,%ZMM5 |
0x224f56 MOV 0xa8(%RSP),%R11 [14] |
0x224f5e VMULPD %ZMM6,%ZMM4,%ZMM6 |
0x224f64 VSUBPD %ZMM6,%ZMM14,%ZMM6 |
0x224f6a VMOVUPD (%R8,%RCX,8),%ZMM14 [12] |
0x224f71 VSUBPD %ZMM7,%ZMM17,%ZMM11 |
0x224f77 VSUBPD %ZMM7,%ZMM16,%ZMM7 |
0x224f7d VMULPD %ZMM11,%ZMM9,%ZMM9 |
0x224f83 VSUBPD %ZMM16,%ZMM14,%ZMM15 |
0x224f89 VSUBPD %ZMM17,%ZMM14,%ZMM8 |
0x224f8f VMULPD %ZMM15,%ZMM13,%ZMM13 |
0x224f95 VADDPD %ZMM13,%ZMM9,%ZMM9 |
0x224f9b VMULPD %ZMM9,%ZMM4,%ZMM9 |
0x224fa1 VSUBPD %ZMM9,%ZMM5,%ZMM5 |
0x224fa7 VMOVUPD %ZMM5,(%R11,%RCX,8) [4] |
0x224fae VMULPD %ZMM7,%ZMM10,%ZMM5 |
0x224fb4 VMULPD %ZMM8,%ZMM12,%ZMM7 |
0x224fba MOV 0xc0(%RSP),%R11 [14] |
0x224fc2 VADDPD %ZMM5,%ZMM7,%ZMM5 |
0x224fc8 VMULPD %ZMM5,%ZMM4,%ZMM4 |
0x224fce VSUBPD %ZMM4,%ZMM6,%ZMM4 |
0x224fd4 VMOVUPD %ZMM4,(%R11,%RCX,8) [3] |
0x224fdb ADD $0x8,%RCX |
0x224fdf CMP %RCX,%RBP |
0x224fe2 JNE 224e20 |
/home/eoseret/qaas_runs_ZEN5/174-049-0948/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/accelerate_kernel.f90: 63 - 75 |
-------------------------------------------------------------------------------- |
63: stepbymass_s=halfdt/((density0(j-1,k-1)*volume(j-1,k-1) & |
[...] |
69: xvel1(j,k)=xvel0(j,k)-stepbymass_s*(xarea(j ,k )*(pressure(j ,k )-pressure(j-1,k )) & |
70: +xarea(j ,k-1)*(pressure(j ,k-1)-pressure(j-1,k-1))) |
71: yvel1(j,k)=yvel0(j,k)-stepbymass_s*(yarea(j ,k )*(pressure(j ,k )-pressure(j ,k-1)) & |
72: +yarea(j-1,k )*(pressure(j-1,k )-pressure(j-1,k-1))) |
73: xvel1(j,k)=xvel1(j,k)-stepbymass_s*(xarea(j ,k )*(viscosity(j ,k )-viscosity(j-1,k )) & |
74: +xarea(j ,k-1)*(viscosity(j ,k-1)-viscosity(j-1,k-1))) |
75: yvel1(j,k)=yvel1(j,k)-stepbymass_s*(yarea(j ,k )*(viscosity(j ,k )-viscosity(j ,k-1)) & |
| Coverage (%) | Name | Source Location | Module |
|---|
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 1.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.06 |
| Bottlenecks | P12, P13, |
| Function | __nv_accelerate_kernel_module_accelerate_kernel__PARALLEL_F2L57_1 |
| Source | accelerate_kernel.f90:63-63,accelerate_kernel.f90:69-75 |
| Source loop unroll info | unrolled by 8 |
| Source loop unroll confidence level | max |
| Unroll/vectorization loop type | main |
| Unroll factor | 8 |
| CQA cycles | 9.50 |
| CQA cycles if no scalar integer | 9.50 |
| CQA cycles if FP arith vectorized | 9.50 |
| CQA cycles if fully vectorized | 9.50 |
| Front-end cycles | 8.00 |
| P0 cycles | 0.33 |
| P1 cycles | 0.33 |
| P2 cycles | 0.33 |
| P3 cycles | 0.33 |
| P4 cycles | 0.33 |
| P5 cycles | 0.33 |
| P6 cycles | 7.25 |
| P7 cycles | 7.25 |
| P8 cycles | 7.25 |
| P9 cycles | 7.25 |
| P10 cycles | 9.00 |
| P11 cycles | 9.00 |
| P12 cycles | 9.50 |
| P13 cycles | 9.50 |
| P14 cycles | 1.00 |
| P15 cycles | 1.00 |
| DIV/SQRT cycles | 4.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 65.00 |
| Nb uops | 64.00 |
| Nb loads | 27.00 |
| Nb stores | 2.00 |
| Nb stack references | 5.00 |
| FLOP/cycle | 31.16 |
| Nb FLOP add-sub | 152.00 |
| Nb FLOP mul | 136.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 8.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 165.89 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 1448.00 |
| Bytes stored | 128.00 |
| Stride 0 | 1.00 |
| Stride 1 | 6.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 100.00 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | 100.00 |
| Vectorization ratio add_sub | 100.00 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | 100.00 |
| Vectorization ratio other | NA |
| Vector-efficiency ratio all | 100.00 |
| Vector-efficiency ratio load | 100.00 |
| Vector-efficiency ratio store | 100.00 |
| Vector-efficiency ratio mul | 100.00 |
| Vector-efficiency ratio add_sub | 100.00 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | 100.00 |
| Vector-efficiency ratio other | NA |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 1.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.06 |
| Bottlenecks | P12, P13, |
| Function | __nv_accelerate_kernel_module_accelerate_kernel__PARALLEL_F2L57_1 |
| Source | accelerate_kernel.f90:63-63,accelerate_kernel.f90:69-75 |
| Source loop unroll info | unrolled by 8 |
| Source loop unroll confidence level | max |
| Unroll/vectorization loop type | main |
| Unroll factor | 8 |
| CQA cycles | 9.50 |
| CQA cycles if no scalar integer | 9.50 |
| CQA cycles if FP arith vectorized | 9.50 |
| CQA cycles if fully vectorized | 9.50 |
| Front-end cycles | 8.00 |
| P0 cycles | 0.33 |
| P1 cycles | 0.33 |
| P2 cycles | 0.33 |
| P3 cycles | 0.33 |
| P4 cycles | 0.33 |
| P5 cycles | 0.33 |
| P6 cycles | 7.25 |
| P7 cycles | 7.25 |
| P8 cycles | 7.25 |
| P9 cycles | 7.25 |
| P10 cycles | 9.00 |
| P11 cycles | 9.00 |
| P12 cycles | 9.50 |
| P13 cycles | 9.50 |
| P14 cycles | 1.00 |
| P15 cycles | 1.00 |
| DIV/SQRT cycles | 4.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 65.00 |
| Nb uops | 64.00 |
| Nb loads | 27.00 |
| Nb stores | 2.00 |
| Nb stack references | 5.00 |
| FLOP/cycle | 31.16 |
| Nb FLOP add-sub | 152.00 |
| Nb FLOP mul | 136.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 8.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 165.89 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 1448.00 |
| Bytes stored | 128.00 |
| Stride 0 | 1.00 |
| Stride 1 | 6.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 100.00 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | 100.00 |
| Vectorization ratio add_sub | 100.00 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | 100.00 |
| Vectorization ratio other | NA |
| Vector-efficiency ratio all | 100.00 |
| Vector-efficiency ratio load | 100.00 |
| Vector-efficiency ratio store | 100.00 |
| Vector-efficiency ratio mul | 100.00 |
| Vector-efficiency ratio add_sub | 100.00 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | 100.00 |
| Vector-efficiency ratio other | NA |
| Path / |
| Function | __nv_accelerate_kernel_module_accelerate_kernel__PARALLEL_F2L57_1 |
| Source file and lines | accelerate_kernel.f90:63-75 |
| Module | exec |
 |
| nb instructions | 65 |
| nb uops | 64 |
| loop length | 456 |
| used x86 registers | 14 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 0 |
| used zmm registers | 16 |
| nb stack references | 5 |
| ADD-SUB / MUL ratio | 1.12 |
| micro-operation queue | 8.00 cycles |
| front end | 8.00 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 7.25 | 7.25 | 7.25 | 7.25 | 9.00 | 9.00 | 9.50 | 9.50 | 1.00 | 1.00 |
| cycles | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 7.25 | 7.25 | 7.25 | 7.25 | 9.00 | 9.00 | 9.50 | 9.50 | 1.00 | 1.00 |
| Cycles executing div or sqrt instructions | 4.00 |
| Longest recurrence chain latency (RecMII) | 1.00 |
| Front-end | 8.00 |
| Dispatch | 9.50 |
| DIV/SQRT | 4.00 |
| Data deps. | 1.00 |
| Overall L1 | 9.50 |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | 100% |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | 100% |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | 100% |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | 100% |
| other | NA (no other vectorizable/vectorized instructions) |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VMOVUPD -0x8(%R9,%RCX,8),%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD (%R9,%RCX,8),%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD (%RAX,%RCX,8),%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD -0x8(%RAX,%RCX,8),%ZMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD (%R12,%RCX,8),%ZMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD -0x8(%RBX,%RCX,8),%ZMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD (%RBX,%RCX,8),%ZMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD (%R13,%RCX,8),%ZMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD (%R14,%RCX,8),%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| MOV 0xb8(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | N/A |
| VMOVUPD -0x8(%R8,%RCX,8),%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD -0x8(%RSI,%RCX,8),%ZMM4,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD (%RSI,%RCX,8),%ZMM5,%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD (%RDX,%RCX,8),%ZMM6,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM10,%ZMM11,%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VADDPD %ZMM5,%ZMM4,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMULPD -0x8(%RDX,%RCX,8),%ZMM8,%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD %ZMM13,%ZMM12,%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VADDPD %ZMM5,%ZMM6,%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMOVUPD -0x8(%R12,%RCX,8),%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VADDPD %ZMM5,%ZMM4,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMOVUPD (%R11,%RCX,8),%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| MOV 0xc8(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | N/A |
| VMULPD %ZMM3,%ZMM4,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM6,%ZMM7,%ZMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM6,%ZMM10,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMOVUPD -0x8(%R10,%RCX,8),%ZMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM7,%ZMM11,%ZMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMOVUPD (%R11,%RCX,8),%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| MOV 0xd0(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | N/A |
| VDIVPD %ZMM4,%ZMM0,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 4 | vect (100.0%) |
| VMULPD %ZMM9,%ZMM8,%ZMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD (%R11,%RCX,8),%ZMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VADDPD %ZMM12,%ZMM8,%ZMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMOVUPD (%R10,%RCX,8),%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD %ZMM10,%ZMM6,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD %ZMM12,%ZMM7,%ZMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD %ZMM8,%ZMM4,%ZMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VADDPD %ZMM7,%ZMM6,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMOVUPD -0x8(%R11,%RCX,8),%ZMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM8,%ZMM5,%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| MOV 0xa8(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | N/A |
| VMULPD %ZMM6,%ZMM4,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM6,%ZMM14,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMOVUPD (%R8,%RCX,8),%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM7,%ZMM17,%ZMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM7,%ZMM16,%ZMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMULPD %ZMM11,%ZMM9,%ZMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM16,%ZMM14,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM17,%ZMM14,%ZMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMULPD %ZMM15,%ZMM13,%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VADDPD %ZMM13,%ZMM9,%ZMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMULPD %ZMM9,%ZMM4,%ZMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM9,%ZMM5,%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMOVUPD %ZMM5,(%R11,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| VMULPD %ZMM7,%ZMM10,%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD %ZMM8,%ZMM12,%ZMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| MOV 0xc0(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | N/A |
| VADDPD %ZMM5,%ZMM7,%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMULPD %ZMM5,%ZMM4,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM4,%ZMM6,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMOVUPD %ZMM4,(%R11,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| ADD $0x8,%RCX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| CMP %RCX,%RBP | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| JNE 224e20 <__nv_accelerate_kernel_module_accelerate_kernel__PARALLEL_F2L57_1_+0x720> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
| Function | __nv_accelerate_kernel_module_accelerate_kernel__PARALLEL_F2L57_1 |
| Source file and lines | accelerate_kernel.f90:63-75 |
| Module | exec |
|
| nb instructions | 65 |
| nb uops | 64 |
| loop length | 456 |
| used x86 registers | 14 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 0 |
| used zmm registers | 16 |
| nb stack references | 5 |
| ADD-SUB / MUL ratio | 1.12 |
| micro-operation queue | 8.00 cycles |
| front end | 8.00 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 7.25 | 7.25 | 7.25 | 7.25 | 9.00 | 9.00 | 9.50 | 9.50 | 1.00 | 1.00 |
| cycles | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 7.25 | 7.25 | 7.25 | 7.25 | 9.00 | 9.00 | 9.50 | 9.50 | 1.00 | 1.00 |
| Cycles executing div or sqrt instructions | 4.00 |
| Longest recurrence chain latency (RecMII) | 1.00 |
| Front-end | 8.00 |
| Dispatch | 9.50 |
| DIV/SQRT | 4.00 |
| Data deps. | 1.00 |
| Overall L1 | 9.50 |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | 100% |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | 100% |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | 100% |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | 100% |
| other | NA (no other vectorizable/vectorized instructions) |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VMOVUPD -0x8(%R9,%RCX,8),%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD (%R9,%RCX,8),%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD (%RAX,%RCX,8),%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD -0x8(%RAX,%RCX,8),%ZMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD (%R12,%RCX,8),%ZMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD -0x8(%RBX,%RCX,8),%ZMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD (%RBX,%RCX,8),%ZMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD (%R13,%RCX,8),%ZMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD (%R14,%RCX,8),%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| MOV 0xb8(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | N/A |
| VMOVUPD -0x8(%R8,%RCX,8),%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD -0x8(%RSI,%RCX,8),%ZMM4,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD (%RSI,%RCX,8),%ZMM5,%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD (%RDX,%RCX,8),%ZMM6,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM10,%ZMM11,%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VADDPD %ZMM5,%ZMM4,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMULPD -0x8(%RDX,%RCX,8),%ZMM8,%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD %ZMM13,%ZMM12,%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VADDPD %ZMM5,%ZMM6,%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMOVUPD -0x8(%R12,%RCX,8),%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VADDPD %ZMM5,%ZMM4,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMOVUPD (%R11,%RCX,8),%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| MOV 0xc8(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | N/A |
| VMULPD %ZMM3,%ZMM4,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM6,%ZMM7,%ZMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM6,%ZMM10,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMOVUPD -0x8(%R10,%RCX,8),%ZMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM7,%ZMM11,%ZMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMOVUPD (%R11,%RCX,8),%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| MOV 0xd0(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | N/A |
| VDIVPD %ZMM4,%ZMM0,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 4 | vect (100.0%) |
| VMULPD %ZMM9,%ZMM8,%ZMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD (%R11,%RCX,8),%ZMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VADDPD %ZMM12,%ZMM8,%ZMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMOVUPD (%R10,%RCX,8),%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD %ZMM10,%ZMM6,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD %ZMM12,%ZMM7,%ZMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD %ZMM8,%ZMM4,%ZMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VADDPD %ZMM7,%ZMM6,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMOVUPD -0x8(%R11,%RCX,8),%ZMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM8,%ZMM5,%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| MOV 0xa8(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | N/A |
| VMULPD %ZMM6,%ZMM4,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM6,%ZMM14,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMOVUPD (%R8,%RCX,8),%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM7,%ZMM17,%ZMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM7,%ZMM16,%ZMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMULPD %ZMM11,%ZMM9,%ZMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM16,%ZMM14,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM17,%ZMM14,%ZMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMULPD %ZMM15,%ZMM13,%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VADDPD %ZMM13,%ZMM9,%ZMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMULPD %ZMM9,%ZMM4,%ZMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM9,%ZMM5,%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMOVUPD %ZMM5,(%R11,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| VMULPD %ZMM7,%ZMM10,%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD %ZMM8,%ZMM12,%ZMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| MOV 0xc0(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | N/A |
| VADDPD %ZMM5,%ZMM7,%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMULPD %ZMM5,%ZMM4,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM4,%ZMM6,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMOVUPD %ZMM4,(%R11,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| ADD $0x8,%RCX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| CMP %RCX,%RBP | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| JNE 224e20 <__nv_accelerate_kernel_module_accelerate_kernel__PARALLEL_F2L57_1_+0x720> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |