Function: __pack_kernel_module_MOD_clover_unpack_message_left._omp_fn.0.lto_priv.0 | Module: exec | Source: pack_kernel.f90:108-113 | Coverage: 0.01% |
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Function: __pack_kernel_module_MOD_clover_unpack_message_left._omp_fn.0.lto_priv.0 | Module: exec | Source: pack_kernel.f90:108-113 | Coverage: 0.01% |
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/beegfs/hackathon/users/eoseret/qaas_runs/170-861-0321/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/pack_kernel.f90: 108 - 113 |
-------------------------------------------------------------------------------- |
108: !$OMP PARALLEL DO PRIVATE(index) |
109: DO k=y_min-depth,y_max+y_inc+depth |
110: !$OMP SIMD |
111: DO j=1,depth |
112: index= buffer_offset + j+(k+depth-1)*depth |
113: field(x_min-j,k)=left_rcv_buffer(index) |
0x42ebf0 PUSH %RBP |
0x42ebf1 MOV %RSP,%RBP |
0x42ebf4 PUSH %R15 |
0x42ebf6 PUSH %R14 |
0x42ebf8 PUSH %R13 |
0x42ebfa PUSH %R12 |
0x42ebfc PUSH %RBX |
0x42ebfd SUB $0x98,%RSP |
0x42ec04 MOV 0x28(%RDI),%RDX |
0x42ec08 MOV 0x48(%RDI),%RAX |
0x42ec0c MOV 0x20(%RDI),%RCX |
0x42ec10 MOV 0x54(%RDI),%R14D |
0x42ec14 MOV 0x40(%RDI),%RBX |
0x42ec18 MOV 0x30(%RDI),%R12 |
0x42ec1c MOV %RDI,-0x40(%RBP) |
0x42ec20 MOV %RDX,-0x78(%RBP) |
0x42ec24 MOV %RCX,-0x48(%RBP) |
0x42ec28 MOV %RAX,-0x38(%RBP) |
0x42ec2c CALL 402080 <@plt_start@+0x60> |
0x42ec31 MOV %EAX,%R13D |
0x42ec34 CALL 402180 <@plt_start@+0x160> |
0x42ec39 MOV -0x40(%RBP),%RSI |
0x42ec3d MOV %EAX,%EDI |
0x42ec3f MOV 0x58(%RSI),%EAX |
0x42ec42 INC %EAX |
0x42ec44 SUB %R14D,%EAX |
0x42ec47 CLTD |
0x42ec48 IDIV %R13D |
0x42ec4b CMP %EDX,%EDI |
0x42ec4d JL 42f18c |
0x42ec53 IMUL %EAX,%EDI |
0x42ec56 ADD %EDX,%EDI |
0x42ec58 ADD %EDI,%EAX |
0x42ec5a CMP %EAX,%EDI |
0x42ec5c JGE 42f160 |
0x42ec62 MOV 0x8(%RSI),%R8 |
0x42ec66 MOV -0x48(%RBP),%RDX |
0x42ec6a ADD %R14D,%EDI |
0x42ec6d ADD %R14D,%EAX |
0x42ec70 MOV -0x78(%RBP),%R14 |
0x42ec74 MOVSXD %EDI,%R11 |
0x42ec77 MOV %EDI,-0x50(%RBP) |
0x42ec7a MOV %EAX,-0x94(%RBP) |
0x42ec80 VMOVQ 0x10(%RSI),%XMM11 |
0x42ec85 VMOVQ 0x38(%RSI),%XMM0 |
0x42ec8a LEA (,%RBX,8),%R13 |
0x42ec92 MOVB $0,-0x59(%RBP) |
0x42ec96 VMOVQ (%RSI),%XMM8 |
0x42ec9a VMOVQ 0x18(%RSI),%XMM2 |
0x42ec9f MOV %RSI,-0xc0(%RBP) |
0x42eca6 MOV (%R8),%R15D |
0x42eca9 MOV %RDX,%RAX |
0x42ecac IMUL $-0x28,%RDX,%R8 |
0x42ecb0 VMOVQ %R13,%XMM1 |
0x42ecb5 IMUL %R14,%R11 |
0x42ecb9 NEG %RAX |
0x42ecbc MOV %RBX,%R13 |
0x42ecbf LEA (,%RAX,8),%R14 |
0x42ecc7 SAL $0x4,%R13 |
0x42eccb VMOVQ %R8,%XMM10 |
0x42ecd0 LEA -0x1(%RDI,%R15,1),%R10D |
0x42ecd5 MOV %RBX,%RDI |
0x42ecd8 LEA -0x1(%R15),%R9D |
0x42ecdc MOV %R15D,%ECX |
0x42ecdf SAL $0x5,%RDI |
0x42ece3 MOV %R9D,-0xa4(%RBP) |
0x42ecea IMUL %R15D,%R10D |
0x42ecee MOV %RAX,%R9 |
0x42ecf1 MOV %RDI,-0xb0(%RBP) |
0x42ecf8 MOV %RAX,%RDI |
0x42ecfb SAL $0x5,%RAX |
0x42ecff SHR $0x3,%ECX |
0x42ed02 MOV %RAX,-0x88(%RBP) |
0x42ed09 MOV %R10D,-0x40(%RBP) |
0x42ed0d SAL $0x4,%RDI |
0x42ed11 MOV %ECX,-0x4c(%RBP) |
0x42ed14 MOV %R15D,%EAX |
0x42ed17 MOV %RBX,%R10 |
0x42ed1a MOV %RDI,%RCX |
0x42ed1d ADD %R11,%R12 |
0x42ed20 AND $-0x8,%EAX |
0x42ed23 NEG %RCX |
0x42ed26 XOR %R8D,%R8D |
0x42ed29 LEA (%RBX,%RBX,2),%R11 |
0x42ed2d SAL $0x6,%R10 |
0x42ed31 MOV %EAX,-0xa8(%RBP) |
0x42ed37 MOV %RCX,-0x80(%RBP) |
0x42ed3b MOV %RDI,-0x70(%RBP) |
0x42ed3f INC %EAX |
0x42ed41 LEA (,%R11,8),%RDX |
0x42ed49 SAL $0x6,%R9 |
0x42ed4d MOV %EAX,-0xb4(%RBP) |
0x42ed53 MOV %RDX,-0x68(%RBP) |
0x42ed57 TEST %R15D,%R15D |
0x42ed5a CMOVNS %R15D,%R8D |
0x42ed5e INC %R8D |
0x42ed61 MOV %R8D,-0x98(%RBP) |
0x42ed68 NOPL (%RAX,%RAX,1) |
(190) 0x42ed70 TEST %R15D,%R15D |
(190) 0x42ed73 JLE 42f10b |
(190) 0x42ed79 VMOVQ %XMM11,%RSI |
(190) 0x42ed7e VMOVQ %XMM8,%RDX |
(190) 0x42ed83 CMPL $0x6,-0xa4(%RBP) |
(190) 0x42ed8a MOVSXD (%RSI),%R11 |
(190) 0x42ed8d MOV (%RDX),%EDI |
(190) 0x42ed8f MOV %R11D,-0x54(%RBP) |
(190) 0x42ed93 MOV %EDI,-0x58(%RBP) |
(190) 0x42ed96 JBE 42f180 |
(190) 0x42ed9c MOVSXD -0x40(%RBP),%R8 |
(190) 0x42eda0 MOV -0x38(%RBP),%RSI |
(190) 0x42eda4 MOV -0x48(%RBP),%RAX |
(190) 0x42eda8 MOVSXD %EDI,%RDI |
(190) 0x42edab VMOVQ %XMM0,%RDX |
(190) 0x42edb0 DEC %RDI |
(190) 0x42edb3 VMOVQ %XMM2,%RCX |
(190) 0x42edb8 LEA 0x1(%R11,%R8,1),%R11 |
(190) 0x42edbd IMUL %RAX,%RDI |
(190) 0x42edc1 VMOVQ %XMM10,%RAX |
(190) 0x42edc6 IMUL %RBX,%R11 |
(190) 0x42edca ADD %R12,%RDI |
(190) 0x42edcd ADD %RSI,%R11 |
(190) 0x42edd0 LEA (%RCX,%RDI,8),%RCX |
(190) 0x42edd4 LEA (%RDX,%R11,8),%RSI |
(190) 0x42edd8 MOV -0xb0(%RBP),%R11 |
(190) 0x42eddf ADD %RCX,%RAX |
(190) 0x42ede2 MOV %RCX,-0x90(%RBP) |
(190) 0x42ede9 LEA (%RSI,%R11,1),%RDX |
(190) 0x42eded XOR %R11D,%R11D |
(190) 0x42edf0 TESTB $0x1,-0x4c(%RBP) |
(190) 0x42edf4 JE 42ee86 |
(190) 0x42edfa MOV -0x68(%RBP),%R8 |
(190) 0x42edfe MOV -0x90(%RBP),%RDI |
(190) 0x42ee05 MOV -0x70(%RBP),%R11 |
(190) 0x42ee09 VMOVSD (%RSI),%XMM14 |
(190) 0x42ee0d VMOVSD (%RSI,%RBX,8),%XMM13 |
(190) 0x42ee12 VMOVSD (%RSI,%R13,1),%XMM12 |
(190) 0x42ee18 VMOVSD (%RDX),%XMM7 |
(190) 0x42ee1c VMOVSD (%RDX,%RBX,8),%XMM6 |
(190) 0x42ee21 VMOVSD (%RDX,%R13,1),%XMM5 |
(190) 0x42ee27 ADD %R9,%RCX |
(190) 0x42ee2a VMOVSD (%RSI,%R8,1),%XMM9 |
(190) 0x42ee30 VMOVSD (%RDX,%R8,1),%XMM4 |
(190) 0x42ee36 MOV -0x80(%RBP),%R8 |
(190) 0x42ee3a VMOVSD %XMM14,(%RDI) |
(190) 0x42ee3e VMOVSD %XMM13,(%RDI,%R14,1) |
(190) 0x42ee44 VMOVSD %XMM12,(%RDI,%R11,1) |
(190) 0x42ee4a ADD %R10,%RSI |
(190) 0x42ee4d ADD %R10,%RDX |
(190) 0x42ee50 VMOVSD %XMM9,(%RAX,%R8,1) |
(190) 0x42ee56 MOV -0x88(%RBP),%R8 |
(190) 0x42ee5d VMOVSD %XMM7,(%RDI,%R8,1) |
(190) 0x42ee63 VMOVSD %XMM6,(%RAX) |
(190) 0x42ee67 VMOVSD %XMM5,(%RAX,%R14,1) |
(190) 0x42ee6d VMOVSD %XMM4,(%RAX,%R11,1) |
(190) 0x42ee73 ADD %R9,%RAX |
(190) 0x42ee76 CMPL $0x1,-0x4c(%RBP) |
(190) 0x42ee7a MOV $0x1,%R11D |
(190) 0x42ee80 JE 42ef8b |
(190) 0x42ee86 MOV %R15D,-0x90(%RBP) |
(190) 0x42ee8d MOV %R12,-0xa0(%RBP) |
(190) 0x42ee94 MOV -0x68(%RBP),%RDI |
(190) 0x42ee98 MOV -0x80(%RBP),%R12 |
(190) 0x42ee9c MOV -0x70(%RBP),%R8 |
(190) 0x42eea0 MOV -0x88(%RBP),%R15 |
(191) 0x42eea7 VMOVSD (%RSI),%XMM15 |
(191) 0x42eeab VMOVSD (%RSI,%RBX,8),%XMM14 |
(191) 0x42eeb0 VMOVSD (%RSI,%R13,1),%XMM13 |
(191) 0x42eeb6 VMOVSD (%RSI,%RDI,1),%XMM12 |
(191) 0x42eebb VMOVSD (%RDX),%XMM9 |
(191) 0x42eebf VMOVSD (%RDX,%RBX,8),%XMM7 |
(191) 0x42eec4 VMOVSD (%RDX,%R13,1),%XMM6 |
(191) 0x42eeca VMOVSD (%RDX,%RDI,1),%XMM3 |
(191) 0x42eecf ADD %R10,%RSI |
(191) 0x42eed2 VMOVSD %XMM15,(%RCX) |
(191) 0x42eed6 ADD %R10,%RDX |
(191) 0x42eed9 VMOVSD %XMM14,(%RCX,%R14,1) |
(191) 0x42eedf VMOVSD %XMM13,(%RCX,%R8,1) |
(191) 0x42eee5 VMOVSD %XMM12,(%RAX,%R12,1) |
(191) 0x42eeeb VMOVSD %XMM9,(%RCX,%R15,1) |
(191) 0x42eef1 VMOVSD %XMM7,(%RAX) |
(191) 0x42eef5 ADD %R9,%RCX |
(191) 0x42eef8 VMOVSD %XMM6,(%RAX,%R14,1) |
(191) 0x42eefe VMOVSD %XMM3,(%RAX,%R8,1) |
(191) 0x42ef04 ADD %R9,%RAX |
(191) 0x42ef07 VMOVSD (%RSI),%XMM15 |
(191) 0x42ef0b VMOVSD (%RSI,%RBX,8),%XMM14 |
(191) 0x42ef10 VMOVSD (%RSI,%R13,1),%XMM13 |
(191) 0x42ef16 VMOVSD (%RSI,%RDI,1),%XMM12 |
(191) 0x42ef1b VMOVSD (%RDX),%XMM9 |
(191) 0x42ef1f VMOVSD (%RDX,%RBX,8),%XMM5 |
(191) 0x42ef24 VMOVSD (%RDX,%R13,1),%XMM4 |
(191) 0x42ef2a VMOVSD (%RDX,%RDI,1),%XMM7 |
(191) 0x42ef2f ADD $0x2,%R11D |
(191) 0x42ef33 VMOVSD %XMM15,(%RCX) |
(191) 0x42ef37 ADD %R10,%RSI |
(191) 0x42ef3a VMOVSD %XMM14,(%RCX,%R14,1) |
(191) 0x42ef40 ADD %R10,%RDX |
(191) 0x42ef43 VMOVSD %XMM13,(%RCX,%R8,1) |
(191) 0x42ef49 VMOVSD %XMM12,(%RAX,%R12,1) |
(191) 0x42ef4f VMOVSD %XMM9,(%RCX,%R15,1) |
(191) 0x42ef55 VMOVSD %XMM5,(%RAX) |
(191) 0x42ef59 ADD %R9,%RCX |
(191) 0x42ef5c VMOVSD %XMM4,(%RAX,%R14,1) |
(191) 0x42ef62 VMOVSD %XMM7,(%RAX,%R8,1) |
(191) 0x42ef68 ADD %R9,%RAX |
(191) 0x42ef6b CMP %R11D,-0x4c(%RBP) |
(191) 0x42ef6f JNE 42eea7 |
(190) 0x42ef75 MOV -0x90(%RBP),%R15D |
(190) 0x42ef7c MOV -0xa0(%RBP),%R12 |
(190) 0x42ef83 MOV %RDI,-0x68(%RBP) |
(190) 0x42ef87 MOV %R8,-0x70(%RBP) |
(190) 0x42ef8b MOV -0xa8(%RBP),%EAX |
(190) 0x42ef91 CMP %R15D,%EAX |
(190) 0x42ef94 JE 42f10b |
(190) 0x42ef9a MOV -0xb4(%RBP),%ECX |
(190) 0x42efa0 MOV %R15D,%ESI |
(190) 0x42efa3 SUB %EAX,%ESI |
(190) 0x42efa5 LEA -0x1(%RSI),%EDX |
(190) 0x42efa8 CMP $0x2,%EDX |
(190) 0x42efab JBE 42f04b |
(190) 0x42efb1 MOV %EAX,%R11D |
(190) 0x42efb4 MOVSXD -0x54(%RBP),%RDI |
(190) 0x42efb8 MOVSXD -0x40(%RBP),%RAX |
(190) 0x42efbc MOV %RBX,%RDX |
(190) 0x42efbf IMUL %R11,%RDX |
(190) 0x42efc3 IMUL %R14,%R11 |
(190) 0x42efc7 LEA 0x1(%RDI,%RAX,1),%R8 |
(190) 0x42efcc MOV -0x38(%RBP),%RDI |
(190) 0x42efd0 VMOVQ %XMM0,%RAX |
(190) 0x42efd5 IMUL %RBX,%R8 |
(190) 0x42efd9 ADD %R8,%RDI |
(190) 0x42efdc ADD %RDI,%RDX |
(190) 0x42efdf MOV -0x48(%RBP),%RDI |
(190) 0x42efe3 LEA (%RAX,%RDX,8),%R8 |
(190) 0x42efe7 MOVSXD -0x58(%RBP),%RDX |
(190) 0x42efeb VMOVQ %XMM2,%RAX |
(190) 0x42eff0 VMOVSD (%R8),%XMM3 |
(190) 0x42eff5 DEC %RDX |
(190) 0x42eff8 IMUL %RDI,%RDX |
(190) 0x42effc ADD %R12,%RDX |
(190) 0x42efff LEA (%R11,%RDX,8),%R11 |
(190) 0x42f003 VMOVQ %XMM1,%RDX |
(190) 0x42f008 ADD %RDX,%R8 |
(190) 0x42f00b ADD %RAX,%R11 |
(190) 0x42f00e VMOVSD (%R8),%XMM6 |
(190) 0x42f013 ADD %RDX,%R8 |
(190) 0x42f016 VMOVSD (%R8),%XMM15 |
(190) 0x42f01b VMOVSD (%R8,%RDX,1),%XMM14 |
(190) 0x42f021 VMOVSD %XMM3,(%R11) |
(190) 0x42f026 ADD %R14,%R11 |
(190) 0x42f029 VMOVSD %XMM6,(%R11) |
(190) 0x42f02e ADD %R14,%R11 |
(190) 0x42f031 VMOVSD %XMM15,(%R11) |
(190) 0x42f036 VMOVSD %XMM14,(%R11,%R14,1) |
(190) 0x42f03c TEST $0x3,%SIL |
(190) 0x42f040 JE 42f10b |
(190) 0x42f046 AND $-0x4,%ESI |
(190) 0x42f049 ADD %ESI,%ECX |
(190) 0x42f04b MOV -0x54(%RBP),%EDI |
(190) 0x42f04e MOV -0x40(%RBP),%R11D |
(190) 0x42f052 MOV -0x38(%RBP),%RSI |
(190) 0x42f056 VMOVQ %XMM0,%R8 |
(190) 0x42f05b MOV -0x48(%RBP),%RDX |
(190) 0x42f05f LEA (%RDI,%RCX,1),%EAX |
(190) 0x42f062 ADD %R11D,%EAX |
(190) 0x42f065 CLTQ |
(190) 0x42f067 IMUL %RBX,%RAX |
(190) 0x42f06b ADD %RSI,%RAX |
(190) 0x42f06e MOV -0x58(%RBP),%ESI |
(190) 0x42f071 VMOVSD (%R8,%RAX,8),%XMM13 |
(190) 0x42f077 VMOVQ %XMM2,%R8 |
(190) 0x42f07c MOV %ESI,%EAX |
(190) 0x42f07e SUB %ECX,%EAX |
(190) 0x42f080 CLTQ |
(190) 0x42f082 IMUL %RDX,%RAX |
(190) 0x42f086 LEA 0x1(%RCX),%EDX |
(190) 0x42f089 ADD %R12,%RAX |
(190) 0x42f08c VMOVSD %XMM13,(%R8,%RAX,8) |
(190) 0x42f092 CMP %EDX,%R15D |
(190) 0x42f095 JL 42f10b |
(190) 0x42f097 LEA (%RDI,%RDX,1),%EAX |
(190) 0x42f09a MOV -0x38(%RBP),%R8 |
(190) 0x42f09e ADD $0x2,%ECX |
(190) 0x42f0a1 ADD %R11D,%EAX |
(190) 0x42f0a4 CLTQ |
(190) 0x42f0a6 IMUL %RBX,%RAX |
(190) 0x42f0aa ADD %R8,%RAX |
(190) 0x42f0ad VMOVQ %XMM0,%R8 |
(190) 0x42f0b2 VMOVSD (%R8,%RAX,8),%XMM12 |
(190) 0x42f0b8 MOV %ESI,%EAX |
(190) 0x42f0ba VMOVQ %XMM2,%R8 |
(190) 0x42f0bf SUB %EDX,%EAX |
(190) 0x42f0c1 MOV -0x48(%RBP),%RDX |
(190) 0x42f0c5 CLTQ |
(190) 0x42f0c7 IMUL %RDX,%RAX |
(190) 0x42f0cb ADD %R12,%RAX |
(190) 0x42f0ce VMOVSD %XMM12,(%R8,%RAX,8) |
(190) 0x42f0d4 CMP %ECX,%R15D |
(190) 0x42f0d7 JL 42f10b |
(190) 0x42f0d9 MOV %EDI,%EAX |
(190) 0x42f0db MOV -0x38(%RBP),%RDI |
(190) 0x42f0df ADD %ECX,%EAX |
(190) 0x42f0e1 ADD %R11D,%EAX |
(190) 0x42f0e4 VMOVQ %XMM0,%R11 |
(190) 0x42f0e9 CLTQ |
(190) 0x42f0eb IMUL %RBX,%RAX |
(190) 0x42f0ef ADD %RDI,%RAX |
(190) 0x42f0f2 VMOVSD (%R11,%RAX,8),%XMM9 |
(190) 0x42f0f8 MOV %ESI,%EAX |
(190) 0x42f0fa SUB %ECX,%EAX |
(190) 0x42f0fc CLTQ |
(190) 0x42f0fe IMUL %RDX,%RAX |
(190) 0x42f102 ADD %R12,%RAX |
(190) 0x42f105 VMOVSD %XMM9,(%R8,%RAX,8) |
(190) 0x42f10b MOV -0x60(%RBP),%ESI |
(190) 0x42f10e MOVZX -0x59(%RBP),%EDX |
(190) 0x42f112 TEST %R15D,%R15D |
(190) 0x42f115 MOV -0x78(%RBP),%RDI |
(190) 0x42f119 CMOVNS -0x98(%RBP),%ESI |
(190) 0x42f120 MOV $0x1,%R8D |
(190) 0x42f126 CMOVNS %R8D,%EDX |
(190) 0x42f12a INCL -0x50(%RBP) |
(190) 0x42f12d MOV -0x50(%RBP),%R11D |
(190) 0x42f131 ADD %RDI,%R12 |
(190) 0x42f134 MOV %ESI,-0x60(%RBP) |
(190) 0x42f137 MOV %DL,-0x59(%RBP) |
(190) 0x42f13a ADD %R15D,-0x40(%RBP) |
(190) 0x42f13e CMP %R11D,-0x94(%RBP) |
(190) 0x42f145 JG 42ed70 |
0x42f14b CMPB $0,-0x59(%RBP) |
0x42f14f MOV -0xc0(%RBP),%RBX |
0x42f156 JE 42f160 |
0x42f158 MOV -0x60(%RBP),%R10D |
0x42f15c MOV %R10D,0x50(%RBX) |
0x42f160 ADD $0x98,%RSP |
0x42f167 POP %RBX |
0x42f168 POP %R12 |
0x42f16a POP %R13 |
0x42f16c POP %R14 |
0x42f16e POP %R15 |
0x42f170 POP %RBP |
0x42f171 RET |
0x42f172 NOPW %CS:(%RAX,%RAX,1) |
0x42f17d NOPL (%RAX) |
(190) 0x42f180 XOR %EAX,%EAX |
(190) 0x42f182 MOV $0x1,%ECX |
(190) 0x42f187 JMP 42efa0 |
0x42f18c INC %EAX |
0x42f18e XOR %EDX,%EDX |
0x42f190 JMP 42ec53 |
0x42f195 NOPW %CS:(%RAX,%RAX,1) |
Path / |
Source file and lines | pack_kernel.f90:108-113 |
Module | exec |
nb instructions | 117 |
nb uops | 116 |
loop length | 457 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 6 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 19 |
micro-operation queue | 19.33 cycles |
front end | 19.33 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 11.25 | 11.25 | 11.00 | 11.00 | 4.50 | 14.00 | 14.00 | 14.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
cycles | 11.25 | 11.25 | 11.00 | 11.00 | 4.50 | 14.00 | 14.00 | 14.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | 6.00 |
Front-end | 19.33 |
Dispatch | 14.00 |
DIV/SQRT | 6.00 |
Overall L1 | 19.33 |
all | 0% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 9% |
load | 10% |
store | 9% |
mul | 6% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 9% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SUB $0x98,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV 0x28(%RDI),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x48(%RDI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x20(%RDI),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x54(%RDI),%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x40(%RDI),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x30(%RDI),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RDI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RDX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RCX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RAX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CALL 402080 <@plt_start@+0x60> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %EAX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 402180 <@plt_start@+0x160> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x40(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x58(%RSI),%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
INC %EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %R14D,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CLTD | |||||||||||||||||
IDIV %R13D | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-14 | 6 |
CMP %EDX,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JL 42f18c <__pack_kernel_module_MOD_clover_unpack_message_left._omp_fn.0.lto_priv.0+0x59c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
IMUL %EAX,%EDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %EDI,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %EAX,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JGE 42f160 <__pack_kernel_module_MOD_clover_unpack_message_left._omp_fn.0.lto_priv.0+0x570> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV 0x8(%RSI),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
ADD %R14D,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %R14D,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV -0x78(%RBP),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOVSXD %EDI,%R11 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %EDI,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %EAX,-0x94(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVQ 0x10(%RSI),%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVQ 0x38(%RSI),%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA (,%RBX,8),%R13 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVB $0,-0x59(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVQ (%RSI),%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVQ 0x18(%RSI),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RSI,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%R8),%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
IMUL $-0x28,%RDX,%R8 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVQ %R13,%XMM1 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
IMUL %R14,%R11 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
NEG %RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RBX,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (,%RAX,8),%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SAL $0x4,%R13 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVQ %R8,%XMM10 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
LEA -0x1(%RDI,%R15,1),%R10D | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x1(%R15),%R9D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R15D,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x5,%RDI | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R9D,-0xa4(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
IMUL %R15D,%R10D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDI,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x5,%RAX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SHR $0x3,%ECX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RAX,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R10D,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SAL $0x4,%RDI | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %ECX,-0x4c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R15D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDI,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %R11,%R12 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
AND $-0x8,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
NEG %RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
LEA (%RBX,%RBX,2),%R11 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SAL $0x6,%R10 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %EAX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RCX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RDI,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (,%R11,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SAL $0x6,%R9 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %EAX,-0xb4(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RDX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
TEST %R15D,%R15D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMOVNS %R15D,%R8D | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
INC %R8D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8D,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
CMPB $0,-0x59(%RBP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
MOV -0xc0(%RBP),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
JE 42f160 <__pack_kernel_module_MOD_clover_unpack_message_left._omp_fn.0.lto_priv.0+0x570> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x60(%RBP),%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %R10D,0x50(%RBX) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD $0x98,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
POP %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
RET | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
INC %EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 42ec53 <__pack_kernel_module_MOD_clover_unpack_message_left._omp_fn.0.lto_priv.0+0x63> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
Source file and lines | pack_kernel.f90:108-113 |
Module | exec |
nb instructions | 117 |
nb uops | 116 |
loop length | 457 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 6 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 19 |
micro-operation queue | 19.33 cycles |
front end | 19.33 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 11.25 | 11.25 | 11.00 | 11.00 | 4.50 | 14.00 | 14.00 | 14.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
cycles | 11.25 | 11.25 | 11.00 | 11.00 | 4.50 | 14.00 | 14.00 | 14.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | 6.00 |
Front-end | 19.33 |
Dispatch | 14.00 |
DIV/SQRT | 6.00 |
Overall L1 | 19.33 |
all | 0% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 9% |
load | 10% |
store | 9% |
mul | 6% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 9% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SUB $0x98,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV 0x28(%RDI),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x48(%RDI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x20(%RDI),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x54(%RDI),%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x40(%RDI),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x30(%RDI),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RDI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RDX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RCX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RAX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CALL 402080 <@plt_start@+0x60> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %EAX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 402180 <@plt_start@+0x160> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x40(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x58(%RSI),%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
INC %EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %R14D,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CLTD | |||||||||||||||||
IDIV %R13D | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-14 | 6 |
CMP %EDX,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JL 42f18c <__pack_kernel_module_MOD_clover_unpack_message_left._omp_fn.0.lto_priv.0+0x59c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
IMUL %EAX,%EDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %EDI,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %EAX,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JGE 42f160 <__pack_kernel_module_MOD_clover_unpack_message_left._omp_fn.0.lto_priv.0+0x570> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV 0x8(%RSI),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
ADD %R14D,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %R14D,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV -0x78(%RBP),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOVSXD %EDI,%R11 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %EDI,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %EAX,-0x94(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVQ 0x10(%RSI),%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVQ 0x38(%RSI),%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA (,%RBX,8),%R13 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVB $0,-0x59(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVQ (%RSI),%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVQ 0x18(%RSI),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RSI,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%R8),%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
IMUL $-0x28,%RDX,%R8 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVQ %R13,%XMM1 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
IMUL %R14,%R11 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
NEG %RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RBX,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (,%RAX,8),%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SAL $0x4,%R13 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVQ %R8,%XMM10 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
LEA -0x1(%RDI,%R15,1),%R10D | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x1(%R15),%R9D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R15D,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x5,%RDI | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R9D,-0xa4(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
IMUL %R15D,%R10D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDI,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x5,%RAX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SHR $0x3,%ECX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RAX,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R10D,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SAL $0x4,%RDI | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %ECX,-0x4c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R15D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDI,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %R11,%R12 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
AND $-0x8,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
NEG %RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
LEA (%RBX,%RBX,2),%R11 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SAL $0x6,%R10 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %EAX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RCX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RDI,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (,%R11,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SAL $0x6,%R9 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %EAX,-0xb4(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RDX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
TEST %R15D,%R15D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMOVNS %R15D,%R8D | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
INC %R8D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8D,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
CMPB $0,-0x59(%RBP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
MOV -0xc0(%RBP),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
JE 42f160 <__pack_kernel_module_MOD_clover_unpack_message_left._omp_fn.0.lto_priv.0+0x570> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x60(%RBP),%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %R10D,0x50(%RBX) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD $0x98,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
POP %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
RET | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
INC %EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 42ec53 <__pack_kernel_module_MOD_clover_unpack_message_left._omp_fn.0.lto_priv.0+0x63> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼__pack_kernel_module_MOD_clover_unpack_message_left._omp_fn.0.lto_priv.0– | 0.01 | 0.01 |
▼Loop 190 - pack_kernel.f90:110-113 - exec– | 0.01 | 0.01 |
○Loop 191 - pack_kernel.f90:113-113 - exec | 0 | 0 |