Loop Id: 105 | Module: exec | Source: advec_mom_kernel.f90:172-240 [...] | Coverage: 0.02% |
---|
Loop Id: 105 | Module: exec | Source: advec_mom_kernel.f90:172-240 [...] | Coverage: 0.02% |
---|
0x420350 MOV 0x120(%RSP),%EDI |
0x420357 MOV %R11D,0x140(%RSP) |
0x42035f MOV %R11D,0x148(%RSP) |
0x420367 CMP %EDI,%EDX |
0x420369 JG 420558 |
0x42036f MOV 0x120(%RSP),%R9D |
0x420377 MOVSXD %EDX,%RCX |
0x42037a MOV %R11D,%EAX |
0x42037d LEA -0x1(%R11),%RSI |
0x420381 SUB $0x2,%EAX |
0x420384 MOV %R11,0x170(%RSP) |
0x42038c LEA 0x1(%RCX),%RBX |
0x420390 MOV %R8,%R11 |
0x420393 MOV %RSI,0x158(%RSP) |
0x42039b VXORPD %XMM7,%XMM7,%XMM7 |
0x42039f MOV %EAX,0x150(%RSP) |
0x4203a6 MOV %EDX,0x118(%RSP) |
0x4203ad SUB %EDX,%R9D |
0x4203b0 LEA 0x1(%RCX,%R9,1),%R15 |
0x4203b5 MOV %R12,%R9 |
0x4203b8 MOV %R10,%R12 |
0x4203bb VMOVQ %XMM21,%R10 |
0x4203c1 VMOVQ %R15,%XMM20 |
0x4203c7 JMP 420501 |
(106) 0x4203d0 MOVSXD 0x150(%RSP),%R15 |
(106) 0x4203d8 MOV 0x170(%RSP),%RDI |
(106) 0x4203e0 MOV 0x158(%RSP),%RDX |
(106) 0x4203e8 MOV %R15D,%EAX |
(106) 0x4203eb MOV 0x178(%RSP),%R8 |
(106) 0x4203f3 MOV 0x168(%RSP),%RSI |
(106) 0x4203fb CLTQ |
(106) 0x4203fd IMUL %R13,%RDI |
(106) 0x420401 VMOVSD (%R9),%XMM4 |
(106) 0x420406 IMUL %R13,%RAX |
(106) 0x42040a IMUL %RDX,%R8 |
(106) 0x42040e ADD %RCX,%RSI |
(106) 0x420411 IMUL %R13,%RDX |
(106) 0x420415 ADD %R8,%RSI |
(106) 0x420418 MOV 0x160(%RSP),%R8 |
(106) 0x420420 VMOVSD (%R10,%RSI,8),%XMM6 |
(106) 0x420426 ADD %RCX,%R8 |
(106) 0x420429 ADD %R8,%RDX |
(106) 0x42042c ADD %R8,%RAX |
(106) 0x42042f ADD %RDI,%R8 |
(106) 0x420432 VMOVSD (%R14,%RDX,8),%XMM0 |
(106) 0x420438 VMOVSD (%R14,%R8,8),%XMM3 |
(106) 0x42043e VSUBSD (%R14,%RAX,8),%XMM0,%XMM2 |
(106) 0x420444 VSUBSD %XMM0,%XMM3,%XMM1 |
(106) 0x420448 VMULSD %XMM2,%XMM1,%XMM3 |
(106) 0x42044c VCOMISD %XMM7,%XMM3 |
(106) 0x420450 JBE 4204e6 |
(106) 0x420456 VCOMISD %XMM1,%XMM7 |
(106) 0x42045a JAE 422060 |
(106) 0x420460 VMOVSD %XMM11,%XMM11,%XMM3 |
(106) 0x420464 VMOVSD %XMM11,%XMM11,%XMM18 |
(106) 0x42046a VUNPCKLPD %XMM2,%XMM1,%XMM1 |
(106) 0x42046e MOV 0x138(%RSP),%RDX |
(106) 0x420476 VANDPD %XMM14,%XMM5,%XMM17 |
(106) 0x42047c VMOVDDUP 0x6ea4c(%RIP),%XMM2 |
(106) 0x420484 VDIVSD %XMM6,%XMM17,%XMM19 |
(106) 0x42048a VANDPD %XMM2,%XMM1,%XMM2 |
(106) 0x42048e VMOVDDUP %XMM19,%XMM6 |
(106) 0x420494 VADDSUBPD %XMM6,%XMM8,%XMM1 |
(106) 0x420498 VMOVQ %XMM12,%RDI |
(106) 0x42049d VSUBSD %XMM19,%XMM3,%XMM3 |
(106) 0x4204a3 VMULSD %XMM18,%XMM3,%XMM3 |
(106) 0x4204a9 VMULPD %XMM2,%XMM1,%XMM1 |
(106) 0x4204ad ADD %RDX,%R15 |
(106) 0x4204b0 VMOVHPD (%RDI,%R15,8),%XMM4,%XMM6 |
(106) 0x4204b6 VMULSD %XMM13,%XMM4,%XMM4 |
(106) 0x4204bb VDIVPD %XMM6,%XMM1,%XMM1 |
(106) 0x4204bf VMOVSD %XMM2,%XMM2,%XMM6 |
(106) 0x4204c3 VUNPCKHPD %XMM2,%XMM2,%XMM2 |
(106) 0x4204c7 VUNPCKHPD %XMM1,%XMM1,%XMM16 |
(106) 0x4204cd VADDPD %XMM1,%XMM16,%XMM22 |
(106) 0x4204d3 VMULSD %XMM22,%XMM4,%XMM1 |
(106) 0x4204d9 VMINSD %XMM2,%XMM6,%XMM4 |
(106) 0x4204dd VMINSD %XMM4,%XMM1,%XMM1 |
(106) 0x4204e1 VFMADD231SD %XMM1,%XMM3,%XMM0 |
(106) 0x4204e6 VMOVQ %XMM20,%R15 |
(106) 0x4204ec VMULSD %XMM5,%XMM0,%XMM5 |
(106) 0x4204f0 VMOVSD %XMM5,(%R12,%RCX,8) |
(106) 0x4204f6 MOV %RBX,%RCX |
(106) 0x4204f9 CMP %R15,%RBX |
(106) 0x4204fc JE 420540 |
(106) 0x4204fe INC %RBX |
(106) 0x420501 VMOVSD (%R11,%RCX,8),%XMM5 |
(106) 0x420507 VCOMISD %XMM5,%XMM7 |
(106) 0x42050b JBE 4203d0 |
(106) 0x420511 MOV 0x140(%RSP),%EAX |
(106) 0x420518 MOV 0x170(%RSP),%RDX |
(106) 0x420520 MOV 0x158(%RSP),%RDI |
(106) 0x420528 MOVSXD 0x148(%RSP),%R15 |
(106) 0x420530 INC %EAX |
(106) 0x420532 JMP 4203eb |
0x420540 MOV %R11,%R8 |
0x420543 MOV 0x118(%RSP),%EDX |
0x42054a MOV 0x170(%RSP),%R11 |
0x420552 MOV %R12,%R10 |
0x420555 MOV %R9,%R12 |
0x420558 INC %R11 |
0x42055b VMOVQ %XMM9,%RBX |
0x420560 VMOVQ %XMM10,%R9 |
0x420565 ADD $0x8,%R12 |
0x420569 ADD %RBX,%R10 |
0x42056c ADD %R9,%R8 |
0x42056f LEA -0x1(%R11),%ESI |
0x420573 CMP %ESI,0x108(%RSP) |
0x42057a JG 420350 |
(106) 0x422060 MOV 0x6cf01(%RIP),%RAX |
(106) 0x422067 VMOVSD %XMM15,%XMM15,%XMM18 |
(106) 0x42206d VMOVQ %RAX,%XMM3 |
(106) 0x422072 JMP 42046a |
/beegfs/hackathon/users/eoseret/qaas_runs/170-861-0321/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/advec_mom_kernel.f90: 172 - 240 |
-------------------------------------------------------------------------------- |
172: IF(vdiffdw.LE.0.0) wind=-1.0_8 |
[...] |
214: DO j=x_min,x_max+1 |
215: IF(node_flux(j,k).LT.0.0)THEN |
216: upwind=k+2 |
217: donor=k+1 |
218: downwind=k |
219: dif=donor |
220: ELSE |
221: upwind=k-1 |
[...] |
227: sigma=ABS(node_flux(j,k))/(node_mass_pre(j,donor)) |
228: width=celldy(k) |
229: vdiffuw=vel1(j,donor)-vel1(j,upwind) |
230: vdiffdw=vel1(j,downwind)-vel1(j,donor) |
231: limiter=0.0 |
232: IF(vdiffuw*vdiffdw.GT.0.0)THEN |
233: auw=ABS(vdiffuw) |
234: adw=ABS(vdiffdw) |
235: wind=1.0_8 |
236: IF(vdiffdw.LE.0.0) wind=-1.0_8 |
237: limiter=wind*MIN(width*((2.0_8-sigma)*adw/width+(1.0_8+sigma)*auw/celldy(dif))/6.0_8,auw,adw) |
238: ENDIF |
239: advec_vel_s=vel1(j,donor)+(1.0_8-sigma)*limiter |
240: mom_flux(j,k)=advec_vel_s*node_flux(j,k) |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 4.22 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 14.14 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.58 |
Bottlenecks | micro-operation queue, |
Function | __advec_mom_kernel_mod_MOD_advec_mom_kernel._omp_fn.0 |
Source | advec_mom_kernel.f90:214-216,advec_mom_kernel.f90:221-221 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 6.33 |
CQA cycles if no scalar integer | 1.50 |
CQA cycles if FP arith vectorized | 6.33 |
CQA cycles if fully vectorized | 0.45 |
Front-end cycles | 6.33 |
DIV/SQRT cycles | 3.75 |
P0 cycles | 3.75 |
P1 cycles | 3.50 |
P2 cycles | 3.50 |
P3 cycles | 1.50 |
P4 cycles | 4.00 |
P5 cycles | 4.00 |
P6 cycles | 4.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 0.00 |
P10 cycles | 0.00 |
P11 cycles | 1.50 |
P12 cycles | 1.50 |
P13 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 38.00 |
Nb uops | 38.00 |
Nb loads | 6.00 |
Nb stores | 6.00 |
Nb stack references | 8.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 8.84 |
Bytes prefetched | 0.00 |
Bytes loaded | 24.00 |
Bytes stored | 32.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 4.35 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 9.09 |
Vector-efficiency ratio all | 10.60 |
Vector-efficiency ratio load | 6.25 |
Vector-efficiency ratio store | 8.33 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 10.94 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 4.22 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 14.14 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.58 |
Bottlenecks | micro-operation queue, |
Function | __advec_mom_kernel_mod_MOD_advec_mom_kernel._omp_fn.0 |
Source | advec_mom_kernel.f90:214-216,advec_mom_kernel.f90:221-221 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 6.33 |
CQA cycles if no scalar integer | 1.50 |
CQA cycles if FP arith vectorized | 6.33 |
CQA cycles if fully vectorized | 0.45 |
Front-end cycles | 6.33 |
DIV/SQRT cycles | 3.75 |
P0 cycles | 3.75 |
P1 cycles | 3.50 |
P2 cycles | 3.50 |
P3 cycles | 1.50 |
P4 cycles | 4.00 |
P5 cycles | 4.00 |
P6 cycles | 4.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 0.00 |
P10 cycles | 0.00 |
P11 cycles | 1.50 |
P12 cycles | 1.50 |
P13 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 38.00 |
Nb uops | 38.00 |
Nb loads | 6.00 |
Nb stores | 6.00 |
Nb stack references | 8.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 8.84 |
Bytes prefetched | 0.00 |
Bytes loaded | 24.00 |
Bytes stored | 32.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 4.35 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 9.09 |
Vector-efficiency ratio all | 10.60 |
Vector-efficiency ratio load | 6.25 |
Vector-efficiency ratio store | 8.33 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 10.94 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Path / |
Function | __advec_mom_kernel_mod_MOD_advec_mom_kernel._omp_fn.0 |
Source file and lines | advec_mom_kernel.f90:172-240 |
Module | exec |
nb instructions | 38 |
nb uops | 38 |
loop length | 188 |
used x86 registers | 13 |
used mmx registers | 0 |
used xmm registers | 5 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 8 |
micro-operation queue | 6.33 cycles |
front end | 6.33 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 3.75 | 3.75 | 3.50 | 3.50 | 1.50 | 4.00 | 4.00 | 4.00 | 0.00 | 0.00 | 0.00 | 0.00 | 1.50 | 1.50 |
cycles | 3.75 | 3.75 | 3.50 | 3.50 | 1.50 | 4.00 | 4.00 | 4.00 | 0.00 | 0.00 | 0.00 | 0.00 | 1.50 | 1.50 |
Cycles executing div or sqrt instructions | NA |
Front-end | 6.33 |
Dispatch | 4.00 |
Overall L1 | 6.33 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 100% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 4% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 9% |
all | 9% |
load | 6% |
store | 8% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 10% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 25% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 10% |
load | 6% |
store | 8% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 10% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV 0x120(%RSP),%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %R11D,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R11D,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %EDI,%EDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JG 420558 <__advec_mom_kernel_mod_MOD_advec_mom_kernel._omp_fn.0+0x1d18> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV 0x120(%RSP),%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOVSXD %EDX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R11D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x1(%R11),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB $0x2,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R11,0x170(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
LEA 0x1(%RCX),%RBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RSI,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VXORPD %XMM7,%XMM7,%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EAX,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %EDX,0x118(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SUB %EDX,%R9D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA 0x1(%RCX,%R9,1),%R15 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MOV %R12,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R10,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVQ %XMM21,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMOVQ %R15,%XMM20 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
JMP 420501 <__advec_mom_kernel_mod_MOD_advec_mom_kernel._omp_fn.0+0x1cc1> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV %R11,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x118(%RSP),%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x170(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %R12,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R9,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %R11 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVQ %XMM9,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMOVQ %XMM10,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
ADD $0x8,%R12 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %RBX,%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %R9,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA -0x1(%R11),%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %ESI,0x108(%RSP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JG 420350 <__advec_mom_kernel_mod_MOD_advec_mom_kernel._omp_fn.0+0x1b10> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
Function | __advec_mom_kernel_mod_MOD_advec_mom_kernel._omp_fn.0 |
Source file and lines | advec_mom_kernel.f90:172-240 |
Module | exec |
nb instructions | 38 |
nb uops | 38 |
loop length | 188 |
used x86 registers | 13 |
used mmx registers | 0 |
used xmm registers | 5 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 8 |
micro-operation queue | 6.33 cycles |
front end | 6.33 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 3.75 | 3.75 | 3.50 | 3.50 | 1.50 | 4.00 | 4.00 | 4.00 | 0.00 | 0.00 | 0.00 | 0.00 | 1.50 | 1.50 |
cycles | 3.75 | 3.75 | 3.50 | 3.50 | 1.50 | 4.00 | 4.00 | 4.00 | 0.00 | 0.00 | 0.00 | 0.00 | 1.50 | 1.50 |
Cycles executing div or sqrt instructions | NA |
Front-end | 6.33 |
Dispatch | 4.00 |
Overall L1 | 6.33 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 100% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 4% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 9% |
all | 9% |
load | 6% |
store | 8% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 10% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 25% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 10% |
load | 6% |
store | 8% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 10% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV 0x120(%RSP),%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %R11D,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R11D,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %EDI,%EDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JG 420558 <__advec_mom_kernel_mod_MOD_advec_mom_kernel._omp_fn.0+0x1d18> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV 0x120(%RSP),%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOVSXD %EDX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R11D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x1(%R11),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB $0x2,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R11,0x170(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
LEA 0x1(%RCX),%RBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RSI,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VXORPD %XMM7,%XMM7,%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EAX,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %EDX,0x118(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SUB %EDX,%R9D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA 0x1(%RCX,%R9,1),%R15 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MOV %R12,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R10,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVQ %XMM21,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMOVQ %R15,%XMM20 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
JMP 420501 <__advec_mom_kernel_mod_MOD_advec_mom_kernel._omp_fn.0+0x1cc1> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV %R11,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x118(%RSP),%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x170(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %R12,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R9,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %R11 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVQ %XMM9,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMOVQ %XMM10,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
ADD $0x8,%R12 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %RBX,%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %R9,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA -0x1(%R11),%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %ESI,0x108(%RSP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JG 420350 <__advec_mom_kernel_mod_MOD_advec_mom_kernel._omp_fn.0+0x1b10> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |