Loop Id: 127 | Module: exec | Source: advec_cell_kernel.f90:83-157 [...] | Coverage: 3.41% |
---|
Loop Id: 127 | Module: exec | Source: advec_cell_kernel.f90:83-157 [...] | Coverage: 3.41% |
---|
0x428990 MOV 0x2a0(%RSP),%R12 [1] |
0x428998 VMOVUPD (%R12,%RDX,8),%YMM11 [9] |
0x42899e VCMPPD $0x1,%YMM11,%YMM10,%K1 |
0x4289a5 LEA (%R8,%RDX,1),%R12D |
0x4289a9 VPBROADCASTD %R12D,%XMM3 |
0x4289af VPBROADCASTQ %RDX,%YMM1 |
0x4289b5 VPADDQ %YMM1,%YMM7,%YMM1 |
0x4289b9 VPMOVQD %YMM1,%XMM1 |
0x4289bf VPADDD %XMM18,%XMM3,%XMM4 |
0x4289c5 VPBLENDMD %XMM1,%XMM4,%XMM5{%K1} |
0x4289cb VMOVDQA32 %XMM4,%XMM1{%K1} |
0x4289d1 VPMOVSXDQ %XMM1,%YMM1 |
0x4289d6 VPSUBQ %YMM8,%YMM1,%YMM2 |
0x4289db LEA (%R13,%R14,1),%R12 |
0x4289e0 KXNORW %K0,%K0,%K2 |
0x4289e4 VPXOR %XMM1,%XMM1,%XMM1 |
0x4289e8 VGATHERQPD (%R12,%YMM2,8),%YMM1{%K2} [10] |
0x4289ef VPADDD %XMM17,%XMM3,%XMM6 |
0x4289f5 VPMINSD %XMM0,%XMM6,%XMM6 |
0x4289fa VMOVDQA64 %XMM6,%XMM20 |
0x428a00 VMOVDQA32 %XMM4,%XMM6{%K1} |
0x428a06 VPMOVSXDQ %XMM6,%YMM4 |
0x428a0b VPSUBQ %YMM8,%YMM4,%YMM4 |
0x428a10 KXNORW %K0,%K0,%K2 |
0x428a14 VPXOR %XMM6,%XMM6,%XMM6 |
0x428a18 VGATHERQPD (%R10,%YMM4,8),%YMM6{%K2} [5] |
0x428a1f VPADDD %XMM19,%XMM3,%XMM20{%K1} |
0x428a25 VANDPD %YMM12,%YMM11,%YMM3 |
0x428a2a VMOVUPD (%R9,%RDX,8),%YMM4 [6] |
0x428a30 LEA (%RSI,%R15,1),%R12 |
0x428a34 KXNORW %K0,%K0,%K1 |
0x428a38 VXORPD %XMM21,%XMM21,%XMM21 |
0x428a3e VGATHERQPD (%R12,%YMM2,8),%YMM21{%K1} [3] |
0x428a45 VDIVPD %YMM1,%YMM3,%YMM3 |
0x428a49 VFMADD213PD %YMM4,%YMM3,%YMM4 |
0x428a4e VDIVPD %YMM6,%YMM4,%YMM4 |
0x428a52 VPMOVSXDQ %XMM20,%YMM6 |
0x428a58 VPSUBQ %YMM8,%YMM6,%YMM6 |
0x428a5d KXNORW %K0,%K0,%K1 |
0x428a61 VPXORD %XMM20,%XMM20,%XMM20 |
0x428a67 VGATHERQPD (%R12,%YMM6,8),%YMM20{%K1} [13] |
0x428a6e VSUBPD %YMM3,%YMM14,%YMM23 |
0x428a74 VSUBPD %YMM20,%YMM21,%YMM20 |
0x428a7a VPMOVSXDQ %XMM5,%YMM5 |
0x428a7f VPSUBQ %YMM8,%YMM5,%YMM5 |
0x428a84 KXNORW %K0,%K0,%K1 |
0x428a88 VXORPD %XMM24,%XMM24,%XMM24 |
0x428a8e VGATHERQPD (%R12,%YMM5,8),%YMM24{%K1} [8] |
0x428a95 VSUBPD %YMM21,%YMM24,%YMM24 |
0x428a9b VMULPD %YMM20,%YMM24,%YMM26 |
0x428aa1 VCMPPD $0x1,%YMM26,%YMM10,%K1 |
0x428aa8 VSUBPD %YMM3,%YMM13,%YMM3 |
0x428aac VCMPPD $0x2,%YMM10,%YMM24,%K2 |
0x428ab3 VXORPD %YMM15,%YMM3,%YMM3{%K2} |
0x428ab9 VANDPD %YMM12,%YMM20,%YMM20 |
0x428abf VANDPD %YMM12,%YMM24,%YMM24 |
0x428ac5 VMULPD %YMM4,%YMM20,%YMM26 |
0x428acb VFMADD231PD %YMM23,%YMM24,%YMM26 |
0x428ad1 VMULPD %YMM16,%YMM26,%YMM26 |
0x428ad7 VMINPD %YMM26,%YMM24,%YMM24 |
0x428add VMINPD %YMM24,%YMM20,%YMM20 |
0x428ae3 VMOVAPD %YMM21,%YMM24 |
0x428ae9 VFMADD231PD %YMM3,%YMM20,%YMM24{%K1} |
0x428aef VMULPD %YMM11,%YMM24,%YMM3 |
0x428af5 VMOVUPD %YMM3,(%RAX,%RDX,8) [11] |
0x428afa LEA (%R11,%RBX,1),%R12 |
0x428afe KXNORW %K0,%K0,%K1 |
0x428b02 VXORPD %XMM11,%XMM11,%XMM11 |
0x428b07 VGATHERQPD (%R12,%YMM2,8),%YMM11{%K1} [2] |
0x428b0e KXNORW %K0,%K0,%K1 |
0x428b12 VXORPD %XMM2,%XMM2,%XMM2 |
0x428b16 VGATHERQPD (%R12,%YMM6,8),%YMM2{%K1} [12] |
0x428b1d KXNORW %K0,%K0,%K1 |
0x428b21 VXORPD %XMM6,%XMM6,%XMM6 |
0x428b25 VGATHERQPD (%R12,%YMM5,8),%YMM6{%K1} [7] |
0x428b2c VMULPD %YMM1,%YMM21,%YMM1 |
0x428b32 VSUBPD %YMM2,%YMM11,%YMM2 |
0x428b36 VSUBPD %YMM11,%YMM6,%YMM5 |
0x428b3b VMULPD %YMM2,%YMM5,%YMM6 |
0x428b3f VCMPPD $0x1,%YMM6,%YMM10,%K1 |
0x428b46 VANDPD %YMM3,%YMM12,%YMM6 |
0x428b4a VDIVPD %YMM1,%YMM6,%YMM1 |
0x428b4e VSUBPD %YMM1,%YMM13,%YMM1 |
0x428b52 VCMPPD $0x2,%YMM10,%YMM5,%K2 |
0x428b59 VXORPD %YMM15,%YMM1,%YMM1{%K2} |
0x428b5f VANDPD %YMM2,%YMM12,%YMM2 |
0x428b63 VANDPD %YMM5,%YMM12,%YMM5 |
0x428b67 VMULPD %YMM4,%YMM2,%YMM4 |
0x428b6b VFMADD231PD %YMM23,%YMM5,%YMM4 |
0x428b71 VMULPD %YMM16,%YMM4,%YMM4 |
0x428b77 VMINPD %YMM4,%YMM5,%YMM4 |
0x428b7b VMINPD %YMM4,%YMM2,%YMM2 |
0x428b7f VFMADD231PD %YMM1,%YMM2,%YMM11{%K1} |
0x428b85 VMULPD %YMM3,%YMM11,%YMM1 |
0x428b89 VMOVUPD %YMM1,(%RCX,%RDX,8) [4] |
0x428b8e ADD $0x4,%RDX |
0x428b92 CMP %RDI,%RDX |
0x428b95 JBE 428990 |
/scratch_na/users/xoserete/qaas_runs/171-419-3245/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/advec_cell_kernel.f90: 83 - 157 |
-------------------------------------------------------------------------------- |
83: IF(dir.EQ.g_xdir) THEN |
[...] |
112: IF(vol_flux_x(j,k).GT.0.0)THEN |
[...] |
118: upwind =MIN(j+1,x_max+2) |
[...] |
124: sigmat=ABS(vol_flux_x(j,k))/pre_vol(donor,k) |
125: sigma3=(1.0_8+sigmat)*(vertexdx(j)/vertexdx(dif)) |
126: sigma4=2.0_8-sigmat |
127: |
128: sigma=sigmat |
129: sigmav=sigmat |
130: |
131: diffuw=density1(donor,k)-density1(upwind,k) |
132: diffdw=density1(downwind,k)-density1(donor,k) |
133: wind=1.0_8 |
134: IF(diffdw.LE.0.0) wind=-1.0_8 |
135: IF(diffuw*diffdw.GT.0.0)THEN |
136: limiter=(1.0_8-sigmav)*wind*MIN(ABS(diffuw),ABS(diffdw)& |
137: ,one_by_six*(sigma3*ABS(diffuw)+sigma4*ABS(diffdw))) |
138: ELSE |
139: limiter=0.0 |
140: ENDIF |
141: mass_flux_x(j,k)=vol_flux_x(j,k)*(density1(donor,k)+limiter) |
142: |
143: sigmam=ABS(mass_flux_x(j,k))/(density1(donor,k)*pre_vol(donor,k)) |
144: diffuw=energy1(donor,k)-energy1(upwind,k) |
145: diffdw=energy1(downwind,k)-energy1(donor,k) |
146: wind=1.0_8 |
147: IF(diffdw.LE.0.0) wind=-1.0_8 |
148: IF(diffuw*diffdw.GT.0.0)THEN |
149: limiter=(1.0_8-sigmam)*wind*MIN(ABS(diffuw),ABS(diffdw)& |
150: ,one_by_six*(sigma3*ABS(diffuw)+sigma4*ABS(diffdw))) |
151: ELSE |
152: limiter=0.0 |
153: ENDIF |
154: |
155: ener_flux(j,k)=mass_flux_x(j,k)*(energy1(donor,k)+limiter) |
156: |
157: ENDDO |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_invoke_task_func | libiomp5.so |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.10 |
CQA speedup if FP arith vectorized | 1.27 |
CQA speedup if fully vectorized | 1.27 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.01 |
Bottlenecks | P0, |
Function | advec_cell_kernel_.DIR.OMP.PARALLEL.2 |
Source | advec_cell_kernel.f90:83-83,advec_cell_kernel.f90:112-112,advec_cell_kernel.f90:118-118,advec_cell_kernel.f90:124-157 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 30.50 |
CQA cycles if no scalar integer | 27.83 |
CQA cycles if FP arith vectorized | 24.00 |
CQA cycles if fully vectorized | 24.00 |
Front-end cycles | 21.50 |
DIV/SQRT cycles | 30.50 |
P0 cycles | 30.17 |
P1 cycles | 11.67 |
P2 cycles | 11.67 |
P3 cycles | 1.00 |
P4 cycles | 30.33 |
P5 cycles | 1.00 |
P6 cycles | 1.00 |
P7 cycles | 1.00 |
P8 cycles | 1.00 |
P9 cycles | 1.00 |
P10 cycles | 11.67 |
P11 cycles | 24.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 33.44 - 112.99 |
Stall cycles (UFS) | 13.82 - 93.37 |
Nb insns | 98.00 |
Nb uops | 129.00 |
Nb loads | 11.00 |
Nb stores | 2.00 |
Nb stack references | 1.00 |
FLOP/cycle | 3.80 |
Nb FLOP add-sub | 28.00 |
Nb FLOP mul | 36.00 |
Nb FLOP fma | 20.00 |
Nb FLOP div | 12.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 12.85 |
Bytes prefetched | 0.00 |
Bytes loaded | 328.00 |
Bytes stored | 64.00 |
Stride 0 | 1.00 |
Stride 1 | 3.00 |
Stride n | 0.00 |
Stride unknown | 4.00 |
Stride indirect | 1.00 |
Vectorization ratio all | 97.56 |
Vectorization ratio load | 100.00 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | 100.00 |
Vectorization ratio other | 95.65 |
Vector-efficiency ratio all | 42.91 |
Vector-efficiency ratio load | 50.00 |
Vector-efficiency ratio store | 50.00 |
Vector-efficiency ratio mul | 50.00 |
Vector-efficiency ratio add_sub | 45.00 |
Vector-efficiency ratio fma | 50.00 |
Vector-efficiency ratio div_sqrt | 50.00 |
Vector-efficiency ratio other | 38.99 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.10 |
CQA speedup if FP arith vectorized | 1.27 |
CQA speedup if fully vectorized | 1.27 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.01 |
Bottlenecks | P0, |
Function | advec_cell_kernel_.DIR.OMP.PARALLEL.2 |
Source | advec_cell_kernel.f90:83-83,advec_cell_kernel.f90:112-112,advec_cell_kernel.f90:118-118,advec_cell_kernel.f90:124-157 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 30.50 |
CQA cycles if no scalar integer | 27.83 |
CQA cycles if FP arith vectorized | 24.00 |
CQA cycles if fully vectorized | 24.00 |
Front-end cycles | 21.50 |
DIV/SQRT cycles | 30.50 |
P0 cycles | 30.17 |
P1 cycles | 11.67 |
P2 cycles | 11.67 |
P3 cycles | 1.00 |
P4 cycles | 30.33 |
P5 cycles | 1.00 |
P6 cycles | 1.00 |
P7 cycles | 1.00 |
P8 cycles | 1.00 |
P9 cycles | 1.00 |
P10 cycles | 11.67 |
P11 cycles | 24.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 33.44 - 112.99 |
Stall cycles (UFS) | 13.82 - 93.37 |
Nb insns | 98.00 |
Nb uops | 129.00 |
Nb loads | 11.00 |
Nb stores | 2.00 |
Nb stack references | 1.00 |
FLOP/cycle | 3.80 |
Nb FLOP add-sub | 28.00 |
Nb FLOP mul | 36.00 |
Nb FLOP fma | 20.00 |
Nb FLOP div | 12.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 12.85 |
Bytes prefetched | 0.00 |
Bytes loaded | 328.00 |
Bytes stored | 64.00 |
Stride 0 | 1.00 |
Stride 1 | 3.00 |
Stride n | 0.00 |
Stride unknown | 4.00 |
Stride indirect | 1.00 |
Vectorization ratio all | 97.56 |
Vectorization ratio load | 100.00 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | 100.00 |
Vectorization ratio other | 95.65 |
Vector-efficiency ratio all | 42.91 |
Vector-efficiency ratio load | 50.00 |
Vector-efficiency ratio store | 50.00 |
Vector-efficiency ratio mul | 50.00 |
Vector-efficiency ratio add_sub | 45.00 |
Vector-efficiency ratio fma | 50.00 |
Vector-efficiency ratio div_sqrt | 50.00 |
Vector-efficiency ratio other | 38.99 |
Path / |
Function | advec_cell_kernel_.DIR.OMP.PARALLEL.2 |
Source file and lines | advec_cell_kernel.f90:83-157 |
Module | exec |
nb instructions | 98 |
nb uops | 129 |
loop length | 523 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 14 |
used ymm registers | 20 |
used zmm registers | 0 |
nb stack references | 1 |
ADD-SUB / MUL ratio | 0.78 |
micro-operation queue | 21.50 cycles |
front end | 21.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 30.50 | 30.17 | 11.67 | 11.67 | 1.00 | 30.33 | 1.00 | 1.00 | 1.00 | 1.00 | 1.00 | 11.67 |
cycles | 30.50 | 30.17 | 11.67 | 11.67 | 1.00 | 30.33 | 1.00 | 1.00 | 1.00 | 1.00 | 1.00 | 11.67 |
Cycles executing div or sqrt instructions | 24.00 |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 33.44-112.99 |
Stall cycles | 13.82-93.37 |
RS full (events) | 16.96-0.67 |
PRF_FLOAT full (events) | 7.21-99.73 |
Front-end | 21.50 |
Dispatch | 30.50 |
DIV/SQRT | 24.00 |
Data deps. | 1.00 |
Overall L1 | 30.50 |
all | 91% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 86% |
all | 100% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 100% |
all | 97% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 95% |
all | 30% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 40% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 24% |
all | 47% |
load | 50% |
store | 50% |
mul | 50% |
add-sub | 50% |
fma | 50% |
div/sqrt | 50% |
other | 45% |
all | 42% |
load | 50% |
store | 50% |
mul | 50% |
add-sub | 45% |
fma | 50% |
div/sqrt | 50% |
other | 38% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV 0x2a0(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVUPD (%R12,%RDX,8),%YMM11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VCMPPD $0x1,%YMM11,%YMM10,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%R8,%RDX,1),%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
VPBROADCASTD %R12D,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %RDX,%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPADDQ %YMM1,%YMM7,%YMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPMOVQD %YMM1,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPADDD %XMM18,%XMM3,%XMM4 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPBLENDMD %XMM1,%XMM4,%XMM5{%K1} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMOVDQA32 %XMM4,%XMM1{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VPMOVSXDQ %XMM1,%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %YMM8,%YMM1,%YMM2 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
LEA (%R13,%R14,1),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KXNORW %K0,%K0,%K2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VPXOR %XMM1,%XMM1,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VGATHERQPD (%R12,%YMM2,8),%YMM1{%K2} | 5 | 1 | 1 | 1.33 | 1.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
VPADDD %XMM17,%XMM3,%XMM6 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPMINSD %XMM0,%XMM6,%XMM6 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVDQA64 %XMM6,%XMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VMOVDQA32 %XMM4,%XMM6{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VPMOVSXDQ %XMM6,%YMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %YMM8,%YMM4,%YMM4 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
KXNORW %K0,%K0,%K2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VPXOR %XMM6,%XMM6,%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VGATHERQPD (%R10,%YMM4,8),%YMM6{%K2} | 5 | 1 | 1 | 1.33 | 1.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
VPADDD %XMM19,%XMM3,%XMM20{%K1} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VANDPD %YMM12,%YMM11,%YMM3 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMOVUPD (%R9,%RDX,8),%YMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
LEA (%RSI,%R15,1),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KXNORW %K0,%K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VXORPD %XMM21,%XMM21,%XMM21 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VGATHERQPD (%R12,%YMM2,8),%YMM21{%K1} | 5 | 1 | 1 | 1.33 | 1.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
VDIVPD %YMM1,%YMM3,%YMM3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
VFMADD213PD %YMM4,%YMM3,%YMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VDIVPD %YMM6,%YMM4,%YMM4 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
VPMOVSXDQ %XMM20,%YMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %YMM8,%YMM6,%YMM6 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
KXNORW %K0,%K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VPXORD %XMM20,%XMM20,%XMM20 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VGATHERQPD (%R12,%YMM6,8),%YMM20{%K1} | 5 | 1 | 1 | 1.33 | 1.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
VSUBPD %YMM3,%YMM14,%YMM23 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VSUBPD %YMM20,%YMM21,%YMM20 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPMOVSXDQ %XMM5,%YMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %YMM8,%YMM5,%YMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
KXNORW %K0,%K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VXORPD %XMM24,%XMM24,%XMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VGATHERQPD (%R12,%YMM5,8),%YMM24{%K1} | 5 | 1 | 1 | 1.33 | 1.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
VSUBPD %YMM21,%YMM24,%YMM24 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %YMM20,%YMM24,%YMM26 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPPD $0x1,%YMM26,%YMM10,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VSUBPD %YMM3,%YMM13,%YMM3 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VCMPPD $0x2,%YMM10,%YMM24,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VXORPD %YMM15,%YMM3,%YMM3{%K2} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VANDPD %YMM12,%YMM20,%YMM20 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VANDPD %YMM12,%YMM24,%YMM24 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMULPD %YMM4,%YMM20,%YMM26 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231PD %YMM23,%YMM24,%YMM26 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %YMM16,%YMM26,%YMM26 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMINPD %YMM26,%YMM24,%YMM24 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMINPD %YMM24,%YMM20,%YMM20 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVAPD %YMM21,%YMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VFMADD231PD %YMM3,%YMM20,%YMM24{%K1} | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %YMM11,%YMM24,%YMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD %YMM3,(%RAX,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
LEA (%R11,%RBX,1),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KXNORW %K0,%K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VXORPD %XMM11,%XMM11,%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VGATHERQPD (%R12,%YMM2,8),%YMM11{%K1} | 5 | 1 | 1 | 1.33 | 1.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
KXNORW %K0,%K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VXORPD %XMM2,%XMM2,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VGATHERQPD (%R12,%YMM6,8),%YMM2{%K1} | 5 | 1 | 1 | 1.33 | 1.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
KXNORW %K0,%K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VXORPD %XMM6,%XMM6,%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VGATHERQPD (%R12,%YMM5,8),%YMM6{%K1} | 5 | 1 | 1 | 1.33 | 1.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
VMULPD %YMM1,%YMM21,%YMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VSUBPD %YMM2,%YMM11,%YMM2 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VSUBPD %YMM11,%YMM6,%YMM5 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %YMM2,%YMM5,%YMM6 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPPD $0x1,%YMM6,%YMM10,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VANDPD %YMM3,%YMM12,%YMM6 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VDIVPD %YMM1,%YMM6,%YMM1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
VSUBPD %YMM1,%YMM13,%YMM1 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VCMPPD $0x2,%YMM10,%YMM5,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VXORPD %YMM15,%YMM1,%YMM1{%K2} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VANDPD %YMM2,%YMM12,%YMM2 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VANDPD %YMM5,%YMM12,%YMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMULPD %YMM4,%YMM2,%YMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231PD %YMM23,%YMM5,%YMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %YMM16,%YMM4,%YMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMINPD %YMM4,%YMM5,%YMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMINPD %YMM4,%YMM2,%YMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231PD %YMM1,%YMM2,%YMM11{%K1} | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %YMM3,%YMM11,%YMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD %YMM1,(%RCX,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
ADD $0x4,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 428990 <advec_cell_kernel_module_mp_advec_cell_kernel_.DIR.OMP.PARALLEL.2+0x2d30> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
Function | advec_cell_kernel_.DIR.OMP.PARALLEL.2 |
Source file and lines | advec_cell_kernel.f90:83-157 |
Module | exec |
nb instructions | 98 |
nb uops | 129 |
loop length | 523 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 14 |
used ymm registers | 20 |
used zmm registers | 0 |
nb stack references | 1 |
ADD-SUB / MUL ratio | 0.78 |
micro-operation queue | 21.50 cycles |
front end | 21.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 30.50 | 30.17 | 11.67 | 11.67 | 1.00 | 30.33 | 1.00 | 1.00 | 1.00 | 1.00 | 1.00 | 11.67 |
cycles | 30.50 | 30.17 | 11.67 | 11.67 | 1.00 | 30.33 | 1.00 | 1.00 | 1.00 | 1.00 | 1.00 | 11.67 |
Cycles executing div or sqrt instructions | 24.00 |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 33.44-112.99 |
Stall cycles | 13.82-93.37 |
RS full (events) | 16.96-0.67 |
PRF_FLOAT full (events) | 7.21-99.73 |
Front-end | 21.50 |
Dispatch | 30.50 |
DIV/SQRT | 24.00 |
Data deps. | 1.00 |
Overall L1 | 30.50 |
all | 91% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 86% |
all | 100% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 100% |
all | 97% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 95% |
all | 30% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 40% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 24% |
all | 47% |
load | 50% |
store | 50% |
mul | 50% |
add-sub | 50% |
fma | 50% |
div/sqrt | 50% |
other | 45% |
all | 42% |
load | 50% |
store | 50% |
mul | 50% |
add-sub | 45% |
fma | 50% |
div/sqrt | 50% |
other | 38% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV 0x2a0(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVUPD (%R12,%RDX,8),%YMM11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VCMPPD $0x1,%YMM11,%YMM10,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%R8,%RDX,1),%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
VPBROADCASTD %R12D,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %RDX,%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPADDQ %YMM1,%YMM7,%YMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPMOVQD %YMM1,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPADDD %XMM18,%XMM3,%XMM4 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPBLENDMD %XMM1,%XMM4,%XMM5{%K1} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMOVDQA32 %XMM4,%XMM1{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VPMOVSXDQ %XMM1,%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %YMM8,%YMM1,%YMM2 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
LEA (%R13,%R14,1),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KXNORW %K0,%K0,%K2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VPXOR %XMM1,%XMM1,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VGATHERQPD (%R12,%YMM2,8),%YMM1{%K2} | 5 | 1 | 1 | 1.33 | 1.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
VPADDD %XMM17,%XMM3,%XMM6 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPMINSD %XMM0,%XMM6,%XMM6 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVDQA64 %XMM6,%XMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VMOVDQA32 %XMM4,%XMM6{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VPMOVSXDQ %XMM6,%YMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %YMM8,%YMM4,%YMM4 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
KXNORW %K0,%K0,%K2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VPXOR %XMM6,%XMM6,%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VGATHERQPD (%R10,%YMM4,8),%YMM6{%K2} | 5 | 1 | 1 | 1.33 | 1.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
VPADDD %XMM19,%XMM3,%XMM20{%K1} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VANDPD %YMM12,%YMM11,%YMM3 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMOVUPD (%R9,%RDX,8),%YMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
LEA (%RSI,%R15,1),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KXNORW %K0,%K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VXORPD %XMM21,%XMM21,%XMM21 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VGATHERQPD (%R12,%YMM2,8),%YMM21{%K1} | 5 | 1 | 1 | 1.33 | 1.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
VDIVPD %YMM1,%YMM3,%YMM3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
VFMADD213PD %YMM4,%YMM3,%YMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VDIVPD %YMM6,%YMM4,%YMM4 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
VPMOVSXDQ %XMM20,%YMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %YMM8,%YMM6,%YMM6 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
KXNORW %K0,%K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VPXORD %XMM20,%XMM20,%XMM20 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VGATHERQPD (%R12,%YMM6,8),%YMM20{%K1} | 5 | 1 | 1 | 1.33 | 1.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
VSUBPD %YMM3,%YMM14,%YMM23 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VSUBPD %YMM20,%YMM21,%YMM20 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPMOVSXDQ %XMM5,%YMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %YMM8,%YMM5,%YMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
KXNORW %K0,%K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VXORPD %XMM24,%XMM24,%XMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VGATHERQPD (%R12,%YMM5,8),%YMM24{%K1} | 5 | 1 | 1 | 1.33 | 1.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
VSUBPD %YMM21,%YMM24,%YMM24 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %YMM20,%YMM24,%YMM26 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPPD $0x1,%YMM26,%YMM10,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VSUBPD %YMM3,%YMM13,%YMM3 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VCMPPD $0x2,%YMM10,%YMM24,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VXORPD %YMM15,%YMM3,%YMM3{%K2} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VANDPD %YMM12,%YMM20,%YMM20 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VANDPD %YMM12,%YMM24,%YMM24 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMULPD %YMM4,%YMM20,%YMM26 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231PD %YMM23,%YMM24,%YMM26 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %YMM16,%YMM26,%YMM26 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMINPD %YMM26,%YMM24,%YMM24 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMINPD %YMM24,%YMM20,%YMM20 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVAPD %YMM21,%YMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VFMADD231PD %YMM3,%YMM20,%YMM24{%K1} | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %YMM11,%YMM24,%YMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD %YMM3,(%RAX,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
LEA (%R11,%RBX,1),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KXNORW %K0,%K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VXORPD %XMM11,%XMM11,%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VGATHERQPD (%R12,%YMM2,8),%YMM11{%K1} | 5 | 1 | 1 | 1.33 | 1.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
KXNORW %K0,%K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VXORPD %XMM2,%XMM2,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VGATHERQPD (%R12,%YMM6,8),%YMM2{%K1} | 5 | 1 | 1 | 1.33 | 1.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
KXNORW %K0,%K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VXORPD %XMM6,%XMM6,%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VGATHERQPD (%R12,%YMM5,8),%YMM6{%K1} | 5 | 1 | 1 | 1.33 | 1.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
VMULPD %YMM1,%YMM21,%YMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VSUBPD %YMM2,%YMM11,%YMM2 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VSUBPD %YMM11,%YMM6,%YMM5 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %YMM2,%YMM5,%YMM6 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPPD $0x1,%YMM6,%YMM10,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VANDPD %YMM3,%YMM12,%YMM6 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VDIVPD %YMM1,%YMM6,%YMM1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
VSUBPD %YMM1,%YMM13,%YMM1 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VCMPPD $0x2,%YMM10,%YMM5,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VXORPD %YMM15,%YMM1,%YMM1{%K2} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VANDPD %YMM2,%YMM12,%YMM2 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VANDPD %YMM5,%YMM12,%YMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMULPD %YMM4,%YMM2,%YMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231PD %YMM23,%YMM5,%YMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %YMM16,%YMM4,%YMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMINPD %YMM4,%YMM5,%YMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMINPD %YMM4,%YMM2,%YMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231PD %YMM1,%YMM2,%YMM11{%K1} | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %YMM3,%YMM11,%YMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD %YMM1,(%RCX,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
ADD $0x4,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 428990 <advec_cell_kernel_module_mp_advec_cell_kernel_.DIR.OMP.PARALLEL.2+0x2d30> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |