Function: clover_unpack_message_right._omp_fn.0 | Module: exec | Source: pack_kernel.f90:202-207 | Coverage: 0.03% |
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Function: clover_unpack_message_right._omp_fn.0 | Module: exec | Source: pack_kernel.f90:202-207 | Coverage: 0.03% |
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/scratch_na/users/xoserete/qaas_runs/171-419-3245/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/pack_kernel.f90: 202 - 207 |
-------------------------------------------------------------------------------- |
202: !$OMP PARALLEL DO PRIVATE(index) |
203: DO k=y_min-depth,y_max+y_inc+depth |
204: !$OMP SIMD |
205: DO j=1,depth |
206: index= buffer_offset + j+(k+depth-1)*depth |
207: field(x_max+x_inc+j,k)=right_rcv_buffer(index) |
0x456440 PUSH %RBP |
0x456441 MOV %RSP,%RBP |
0x456444 PUSH %R15 |
0x456446 MOV %RDI,%R15 |
0x456449 PUSH %R14 |
0x45644b PUSH %R13 |
0x45644d PUSH %R12 |
0x45644f PUSH %RBX |
0x456450 AND $-0x40,%RSP |
0x456454 SUB $0xc0,%RSP |
0x45645b MOV 0x48(%RDI),%RDX |
0x45645f MOV 0x54(%RDI),%EAX |
0x456462 MOV 0x30(%RDI),%RCX |
0x456466 MOV 0x28(%RDI),%RSI |
0x45646a MOV 0x58(%RDI),%R13D |
0x45646e MOV 0x40(%RDI),%RBX |
0x456472 MOV %RDX,0xb0(%RSP) |
0x45647a MOV 0x20(%RDI),%R12 |
0x45647e MOV %RCX,0xa8(%RSP) |
0x456486 MOV %RSI,0xa0(%RSP) |
0x45648e MOV %EAX,0x84(%RSP) |
0x456495 CALL 402080 <@plt_start@+0x60> |
0x45649a MOV %EAX,%R14D |
0x45649d CALL 402180 <@plt_start@+0x160> |
0x4564a2 MOV %EAX,%EDI |
0x4564a4 MOV 0x5c(%R15),%EAX |
0x4564a8 INC %EAX |
0x4564aa SUB %R13D,%EAX |
0x4564ad CLTD |
0x4564ae IDIV %R14D |
0x4564b1 CMP %EDX,%EDI |
0x4564b3 JL 456907 |
0x4564b9 IMUL %EAX,%EDI |
0x4564bc ADD %EDX,%EDI |
0x4564be ADD %EDI,%EAX |
0x4564c0 CMP %EAX,%EDI |
0x4564c2 JGE 4568a5 |
0x4564c8 ADD %R13D,%EAX |
0x4564cb CMP $0x1,%R12 |
0x4564cf LEA (%R13,%RDI,1),%R8D |
0x4564d4 MOV 0x8(%R15),%R9 |
0x4564d8 SETNE %R13B |
0x4564dc CMP $0x1,%RBX |
0x4564e0 MOV 0x10(%R15),%R10 |
0x4564e4 MOV (%R15),%R11 |
0x4564e7 SETNE %CL |
0x4564ea MOV %R8D,0xbc(%RSP) |
0x4564f2 MOV 0x38(%R15),%R14 |
0x4564f6 OR %CL,%R13B |
0x4564f9 MOV %EAX,0xb8(%RSP) |
0x456500 MOV 0x18(%R15),%R8 |
0x456504 MOV %R10,0x90(%RSP) |
0x45650c MOV (%R9),%EAX |
0x45650f MOV %R11,0x88(%RSP) |
0x456517 MOV %R13B,0x5f(%RSP) |
0x45651c JNE 456910 |
0x456522 MOVSXD 0xbc(%RSP),%R9 |
0x45652a MOV 0xa0(%RSP),%R12 |
0x456532 LEA -0x1(%RAX),%EBX |
0x456535 MOV %EAX,%EDX |
0x456537 MOV 0xa8(%RSP),%R13 |
0x45653f MOV %EAX,%ESI |
0x456541 SHR $0x3,%EDX |
0x456544 XOR %ECX,%ECX |
0x456546 LEA (%R9,%RBX,1),%R10D |
0x45654a AND $-0x8,%ESI |
0x45654d SAL $0x6,%RDX |
0x456551 MOV %EBX,0x78(%RSP) |
0x456555 IMUL %R12,%R9 |
0x456559 MOVSXD 0x84(%RSP),%RBX |
0x456561 MOV 0xb0(%RSP),%R11 |
0x456569 MOV %ESI,0x70(%RSP) |
0x45656d IMUL %EAX,%R10D |
0x456571 INC %ESI |
0x456573 MOV %RDX,0xa8(%RSP) |
0x45657b MOV %RBX,0x98(%RSP) |
0x456583 ADD %R13,%R9 |
0x456586 TEST %EAX,%EAX |
0x456588 MOV %ESI,0x80(%RSP) |
0x45658f CMOVNS %EAX,%ECX |
0x456592 INC %R11 |
0x456595 INC %RBX |
0x456598 MOV %R11,0x68(%RSP) |
0x45659d LEA 0x1(%RCX),%EDI |
0x4565a0 MOV %RBX,0x60(%RSP) |
0x4565a5 MOV %EDI,0x58(%RSP) |
0x4565a9 NOPL (%RAX) |
(310) 0x4565b0 TEST %EAX,%EAX |
(310) 0x4565b2 JLE 45686e |
(310) 0x4565b8 MOV 0x90(%RSP),%R12 |
(310) 0x4565c0 MOV 0x88(%RSP),%R13 |
(310) 0x4565c8 CMPL $0x6,0x78(%RSP) |
(310) 0x4565cd MOV (%R12),%EDI |
(310) 0x4565d1 MOV (%R13),%R11D |
(310) 0x4565d5 JBE 4568fb |
(310) 0x4565db MOV 0x68(%RSP),%RBX |
(310) 0x4565e0 MOVSXD %EDI,%RSI |
(310) 0x4565e3 MOV 0x60(%RSP),%RCX |
(310) 0x4565e8 MOVSXD %R11D,%RDX |
(310) 0x4565eb MOVSXD %R10D,%R12 |
(310) 0x4565ee ADD %RBX,%RSI |
(310) 0x4565f1 MOV 0xa8(%RSP),%RBX |
(310) 0x4565f9 ADD %RCX,%RDX |
(310) 0x4565fc ADD %R12,%RSI |
(310) 0x4565ff ADD %R9,%RDX |
(310) 0x456602 XOR %R12D,%R12D |
(310) 0x456605 SUB $0x40,%RBX |
(310) 0x456609 LEA (%R14,%RSI,8),%R13 |
(310) 0x45660d LEA (%R8,%RDX,8),%RSI |
(310) 0x456611 SHR $0x6,%RBX |
(310) 0x456615 INC %RBX |
(310) 0x456618 AND $0x7,%EBX |
(310) 0x45661b JE 4566dc |
(310) 0x456621 CMP $0x1,%RBX |
(310) 0x456625 JE 4566bb |
(310) 0x45662b CMP $0x2,%RBX |
(310) 0x45662f JE 4566a8 |
(310) 0x456631 CMP $0x3,%RBX |
(310) 0x456635 JE 456695 |
(310) 0x456637 CMP $0x4,%RBX |
(310) 0x45663b JE 456682 |
(310) 0x45663d CMP $0x5,%RBX |
(310) 0x456641 JE 45666f |
(310) 0x456643 CMP $0x6,%RBX |
(310) 0x456647 JE 45665c |
(310) 0x456649 VMOVUPD (%R13),%ZMM15 |
(310) 0x456650 MOV $0x40,%R12D |
(310) 0x456656 VMOVUPD %ZMM15,(%RSI) |
(310) 0x45665c VMOVUPD (%R13,%R12,1),%ZMM7 |
(310) 0x456664 VMOVUPD %ZMM7,(%RSI,%R12,1) |
(310) 0x45666b ADD $0x40,%R12 |
(310) 0x45666f VMOVUPD (%R13,%R12,1),%ZMM6 |
(310) 0x456677 VMOVUPD %ZMM6,(%RSI,%R12,1) |
(310) 0x45667e ADD $0x40,%R12 |
(310) 0x456682 VMOVUPD (%R13,%R12,1),%ZMM5 |
(310) 0x45668a VMOVUPD %ZMM5,(%RSI,%R12,1) |
(310) 0x456691 ADD $0x40,%R12 |
(310) 0x456695 VMOVUPD (%R13,%R12,1),%ZMM4 |
(310) 0x45669d VMOVUPD %ZMM4,(%RSI,%R12,1) |
(310) 0x4566a4 ADD $0x40,%R12 |
(310) 0x4566a8 VMOVUPD (%R13,%R12,1),%ZMM3 |
(310) 0x4566b0 VMOVUPD %ZMM3,(%RSI,%R12,1) |
(310) 0x4566b7 ADD $0x40,%R12 |
(310) 0x4566bb VMOVUPD (%R13,%R12,1),%ZMM2 |
(310) 0x4566c3 VMOVUPD %ZMM2,(%RSI,%R12,1) |
(310) 0x4566ca ADD $0x40,%R12 |
(310) 0x4566ce CMP %R12,0xa8(%RSP) |
(310) 0x4566d6 JE 456770 |
(311) 0x4566dc VMOVUPD (%R13,%R12,1),%ZMM1 |
(311) 0x4566e4 VMOVUPD %ZMM1,(%RSI,%R12,1) |
(311) 0x4566eb VMOVUPD 0x40(%R13,%R12,1),%ZMM0 |
(311) 0x4566f3 VMOVUPD %ZMM0,0x40(%RSI,%R12,1) |
(311) 0x4566fb VMOVUPD 0x80(%R13,%R12,1),%ZMM8 |
(311) 0x456703 VMOVUPD %ZMM8,0x80(%RSI,%R12,1) |
(311) 0x45670b VMOVUPD 0xc0(%R13,%R12,1),%ZMM9 |
(311) 0x456713 VMOVUPD %ZMM9,0xc0(%RSI,%R12,1) |
(311) 0x45671b VMOVUPD 0x100(%R13,%R12,1),%ZMM10 |
(311) 0x456723 VMOVUPD %ZMM10,0x100(%RSI,%R12,1) |
(311) 0x45672b VMOVUPD 0x140(%R13,%R12,1),%ZMM11 |
(311) 0x456733 VMOVUPD %ZMM11,0x140(%RSI,%R12,1) |
(311) 0x45673b VMOVUPD 0x180(%R13,%R12,1),%ZMM12 |
(311) 0x456743 VMOVUPD %ZMM12,0x180(%RSI,%R12,1) |
(311) 0x45674b VMOVUPD 0x1c0(%R13,%R12,1),%ZMM13 |
(311) 0x456753 VMOVUPD %ZMM13,0x1c0(%RSI,%R12,1) |
(311) 0x45675b ADD $0x200,%R12 |
(311) 0x456762 CMP %R12,0xa8(%RSP) |
(311) 0x45676a JNE 4566dc |
(310) 0x456770 MOV 0x70(%RSP),%R13D |
(310) 0x456775 CMP %EAX,%R13D |
(310) 0x456778 JE 45686e |
(310) 0x45677e MOV 0x80(%RSP),%ECX |
(310) 0x456785 MOV %R13D,%EDX |
(310) 0x456788 MOV %EAX,%R12D |
(310) 0x45678b SUB %EDX,%R12D |
(310) 0x45678e LEA -0x1(%R12),%ESI |
(310) 0x456793 CMP $0x2,%ESI |
(310) 0x456796 JBE 4567e5 |
(310) 0x456798 MOV 0xb0(%RSP),%R13 |
(310) 0x4567a0 MOVSXD %EDI,%RSI |
(310) 0x4567a3 MOVSXD %R10D,%RBX |
(310) 0x4567a6 ADD %RDX,%R13 |
(310) 0x4567a9 ADD %R9,%RDX |
(310) 0x4567ac ADD %R13,%RSI |
(310) 0x4567af MOVSXD %R11D,%R13 |
(310) 0x4567b2 LEA 0x1(%RBX,%RSI,1),%RSI |
(310) 0x4567b7 MOV 0x98(%RSP),%RBX |
(310) 0x4567bf VMOVUPD (%R14,%RSI,8),%YMM14 |
(310) 0x4567c5 MOV %R12D,%ESI |
(310) 0x4567c8 ADD %RBX,%RDX |
(310) 0x4567cb AND $-0x4,%ESI |
(310) 0x4567ce LEA 0x1(%R13,%RDX,1),%RDX |
(310) 0x4567d3 ADD %ESI,%ECX |
(310) 0x4567d5 AND $0x3,%R12D |
(310) 0x4567d9 VMOVUPD %YMM14,(%R8,%RDX,8) |
(310) 0x4567df JE 45686e |
(310) 0x4567e5 MOV 0x84(%RSP),%R12D |
(310) 0x4567ed LEA (%RDI,%RCX,1),%R13D |
(310) 0x4567f1 MOV 0xb0(%RSP),%RBX |
(310) 0x4567f9 ADD %R10D,%R13D |
(310) 0x4567fc ADD %R12D,%R11D |
(310) 0x4567ff MOVSXD %R13D,%RDX |
(310) 0x456802 LEA 0x1(%RCX),%R13D |
(310) 0x456806 ADD %RBX,%RDX |
(310) 0x456809 LEA (%R11,%RCX,1),%ESI |
(310) 0x45680d VMOVSD (%R14,%RDX,8),%XMM15 |
(310) 0x456813 MOVSXD %ESI,%R12 |
(310) 0x456816 ADD %R9,%R12 |
(310) 0x456819 VMOVSD %XMM15,(%R8,%R12,8) |
(310) 0x45681f CMP %R13D,%EAX |
(310) 0x456822 JL 45686e |
(310) 0x456824 LEA (%RDI,%R13,1),%EDX |
(310) 0x456828 ADD %R11D,%R13D |
(310) 0x45682b ADD $0x2,%ECX |
(310) 0x45682e ADD %R10D,%EDX |
(310) 0x456831 MOVSXD %R13D,%R12 |
(310) 0x456834 MOVSXD %EDX,%RSI |
(310) 0x456837 ADD %R9,%R12 |
(310) 0x45683a ADD %RBX,%RSI |
(310) 0x45683d VMOVSD (%R14,%RSI,8),%XMM7 |
(310) 0x456843 VMOVSD %XMM7,(%R8,%R12,8) |
(310) 0x456849 CMP %ECX,%EAX |
(310) 0x45684b JL 45686e |
(310) 0x45684d LEA (%RCX,%RDI,1),%EDI |
(310) 0x456850 ADD %R11D,%ECX |
(310) 0x456853 ADD %R10D,%EDI |
(310) 0x456856 MOVSXD %ECX,%R11 |
(310) 0x456859 MOVSXD %EDI,%R13 |
(310) 0x45685c ADD %R9,%R11 |
(310) 0x45685f ADD %RBX,%R13 |
(310) 0x456862 VMOVSD (%R14,%R13,8),%XMM6 |
(310) 0x456868 VMOVSD %XMM6,(%R8,%R11,8) |
(310) 0x45686e INCL 0xbc(%RSP) |
(310) 0x456875 MOV 0xa0(%RSP),%RBX |
(310) 0x45687d ADD %EAX,%R10D |
(310) 0x456880 ADD %RBX,%R9 |
(310) 0x456883 MOV 0xbc(%RSP),%ECX |
(310) 0x45688a TEST %EAX,%EAX |
(310) 0x45688c JNS 4568e0 |
(310) 0x45688e CMP %ECX,0xb8(%RSP) |
(310) 0x456895 JG 4565b0 |
0x45689b VZEROUPPER |
0x45689e CMPB $0,0x5f(%RSP) |
0x4568a3 JNE 4568c1 |
0x4568a5 LEA -0x28(%RBP),%RSP |
0x4568a9 POP %RBX |
0x4568aa POP %R12 |
0x4568ac POP %R13 |
0x4568ae POP %R14 |
0x4568b0 POP %R15 |
0x4568b2 POP %RBP |
0x4568b3 RET |
0x4568b4 VZEROUPPER |
0x4568b7 MOV 0x58(%RSP),%R14D |
0x4568bc MOV %R14D,0x54(%RSP) |
0x4568c1 MOV 0x54(%RSP),%EAX |
0x4568c5 MOV %EAX,0x50(%R15) |
0x4568c9 LEA -0x28(%RBP),%RSP |
0x4568cd POP %RBX |
0x4568ce POP %R12 |
0x4568d0 POP %R13 |
0x4568d2 POP %R14 |
0x4568d4 POP %R15 |
0x4568d6 POP %RBP |
0x4568d7 RET |
0x4568d8 NOPL (%RAX,%RAX,1) |
(310) 0x4568e0 CMP %ECX,0xb8(%RSP) |
(310) 0x4568e7 JLE 4568b4 |
(310) 0x4568e9 MOV 0x58(%RSP),%EDX |
(310) 0x4568ed MOVB $0x1,0x5f(%RSP) |
(310) 0x4568f2 MOV %EDX,0x54(%RSP) |
(310) 0x4568f6 JMP 4565b0 |
(310) 0x4568fb XOR %EDX,%EDX |
(310) 0x4568fd MOV $0x1,%ECX |
(310) 0x456902 JMP 456788 |
0x456907 INC %EAX |
0x456909 XOR %EDX,%EDX |
0x45690b JMP 4564b9 |
0x456910 MOV 0xbc(%RSP),%EDI |
0x456917 MOV 0xa0(%RSP),%R10 |
0x45691f LEA -0x1(%RAX),%ESI |
0x456922 LEA (,%RBX,8),%RCX |
0x45692a KXORB %K0,%K0,%K0 |
0x45692e MOV 0xa8(%RSP),%R11 |
0x456936 MOV %ESI,0x50(%RSP) |
0x45693a MOV %EAX,%R13D |
0x45693d MOVSXD %EDI,%R9 |
0x456940 LEA (%RDI,%RSI,1),%EDX |
0x456943 LEA (,%R12,8),%RDI |
0x45694b MOV %RCX,0x40(%RSP) |
0x456950 IMUL %R10,%R9 |
0x456954 MOV %RDI,0x48(%RSP) |
0x456959 MOV %EAX,%EDI |
0x45695b MOV %RBX,%RSI |
0x45695e IMUL %EAX,%EDX |
0x456961 AND $-0x8,%EDI |
0x456964 MOV %R12,%R10 |
0x456967 MOV %RBX,%RCX |
0x45696a SHR $0x3,%R13D |
0x45696e SAL $0x6,%RSI |
0x456972 MOV %EDI,0x24(%RSP) |
0x456976 INC %EDI |
0x456978 SAL $0x6,%R10 |
0x45697c ADD %R9,%R11 |
0x45697f MOV %R12,%R9 |
0x456982 SAL $0x4,%RCX |
0x456986 SAL $0x5,%R9 |
0x45698a MOV %EDX,0x98(%RSP) |
0x456991 MOV %RBX,%RDX |
0x456994 SAL $0x5,%RDX |
0x456998 MOV %R9,0x18(%RSP) |
0x45699d MOV %R12,%R9 |
0x4569a0 SAL $0x4,%R9 |
0x4569a4 MOV %RDX,0x10(%RSP) |
0x4569a9 XOR %EDX,%EDX |
0x4569ab TEST %EAX,%EAX |
0x4569ad CMOVNS %EAX,%EDX |
0x4569b0 MOV %EDI,0x20(%RSP) |
0x4569b4 MOV %R8,0x70(%RSP) |
0x4569b9 LEA 0x1(%RDX),%EDI |
0x4569bc MOV %R10,0x38(%RSP) |
0x4569c1 MOV %EDI,0x58(%RSP) |
0x4569c5 MOV %R9,0x30(%RSP) |
0x4569ca MOV %R11,0xa8(%RSP) |
0x4569d2 LEA (%RBX,%RBX,2),%R11 |
0x4569d6 MOV %R13D,0x68(%RSP) |
0x4569db LEA (%R12,%R12,2),%R13 |
0x4569df LEA (,%R11,8),%R11 |
0x4569e7 MOV %R14,0x78(%RSP) |
0x4569ec LEA (,%R13,8),%R13 |
0x4569f4 MOV %RCX,%R14 |
0x4569f7 MOV %R15,0x8(%RSP) |
0x4569fc MOV %RSI,%R15 |
0x4569ff NOP |
(308) 0x456a00 TEST %EAX,%EAX |
(308) 0x456a02 JLE 456d56 |
(308) 0x456a08 MOV 0x90(%RSP),%R8 |
(308) 0x456a10 MOV 0x88(%RSP),%RCX |
(308) 0x456a18 MOV 0x84(%RSP),%ESI |
(308) 0x456a1f MOV (%R8),%R10D |
(308) 0x456a22 ADD (%RCX),%ESI |
(308) 0x456a24 CMPL $0x6,0x50(%RSP) |
(308) 0x456a29 MOV %R10D,0x60(%RSP) |
(308) 0x456a2e MOV %ESI,0x80(%RSP) |
(308) 0x456a35 JBE 456e52 |
(308) 0x456a3b MOVSXD 0x98(%RSP),%RDX |
(308) 0x456a43 MOVSXD %R10D,%R9 |
(308) 0x456a46 MOV 0xb0(%RSP),%R10 |
(308) 0x456a4e MOV 0x78(%RSP),%RCX |
(308) 0x456a53 LEA 0x1(%R9,%RDX,1),%R8 |
(308) 0x456a58 MOVSXD %ESI,%RDX |
(308) 0x456a5b MOV 0xa8(%RSP),%RSI |
(308) 0x456a63 IMUL %RBX,%R8 |
(308) 0x456a67 INC %RDX |
(308) 0x456a6a IMUL %R12,%RDX |
(308) 0x456a6e ADD %R10,%R8 |
(308) 0x456a71 LEA (%RCX,%R8,8),%RDI |
(308) 0x456a75 MOV 0x70(%RSP),%R8 |
(308) 0x456a7a ADD %RSI,%RDX |
(308) 0x456a7d MOV 0x10(%RSP),%RCX |
(308) 0x456a82 LEA (%R8,%RDX,8),%RSI |
(308) 0x456a86 MOV 0x18(%RSP),%RDX |
(308) 0x456a8b ADD %RDI,%RCX |
(308) 0x456a8e XOR %R8D,%R8D |
(308) 0x456a91 MOV %RSI,0x28(%RSP) |
(308) 0x456a96 ADD %RSI,%RDX |
(308) 0x456a99 TESTB $0x1,0x68(%RSP) |
(308) 0x456a9e JNE 456da2 |
(308) 0x456aa4 MOV 0x38(%RSP),%R10 |
(308) 0x456aa9 MOV 0x30(%RSP),%R9 |
(308) 0x456aae MOV %EAX,0x28(%RSP) |
(308) 0x456ab2 NOPW (%RAX,%RAX,1) |
(309) 0x456ab8 VMOVSD (%RDI),%XMM8 |
(309) 0x456abc VMOVSD (%RDI,%RBX,8),%XMM9 |
(309) 0x456ac1 ADD $0x2,%R8D |
(309) 0x456ac5 VMOVSD (%RDI,%R14,1),%XMM10 |
(309) 0x456acb VMOVSD (%RDI,%R11,1),%XMM11 |
(309) 0x456ad1 ADD %R15,%RDI |
(309) 0x456ad4 VMOVSD (%RCX),%XMM12 |
(309) 0x456ad8 VMOVSD (%RCX,%RBX,8),%XMM13 |
(309) 0x456add VMOVSD (%RCX,%R14,1),%XMM14 |
(309) 0x456ae3 VMOVSD (%RCX,%R11,1),%XMM15 |
(309) 0x456ae9 VMOVSD %XMM8,(%RSI) |
(309) 0x456aed ADD %R15,%RCX |
(309) 0x456af0 VMOVSD %XMM9,(%RSI,%R12,8) |
(309) 0x456af6 VMOVSD %XMM10,(%RSI,%R9,1) |
(309) 0x456afc VMOVSD %XMM11,(%RSI,%R13,1) |
(309) 0x456b02 ADD %R10,%RSI |
(309) 0x456b05 VMOVSD %XMM12,(%RDX) |
(309) 0x456b09 VMOVSD %XMM13,(%RDX,%R12,8) |
(309) 0x456b0f VMOVSD %XMM14,(%RDX,%R9,1) |
(309) 0x456b15 VMOVSD %XMM15,(%RDX,%R13,1) |
(309) 0x456b1b ADD %R10,%RDX |
(309) 0x456b1e VMOVSD (%RDI),%XMM7 |
(309) 0x456b22 VMOVSD (%RDI,%RBX,8),%XMM6 |
(309) 0x456b27 VMOVSD (%RDI,%R14,1),%XMM5 |
(309) 0x456b2d VMOVSD (%RDI,%R11,1),%XMM4 |
(309) 0x456b33 ADD %R15,%RDI |
(309) 0x456b36 VMOVSD (%RCX),%XMM3 |
(309) 0x456b3a VMOVSD (%RCX,%RBX,8),%XMM2 |
(309) 0x456b3f VMOVSD (%RCX,%R14,1),%XMM1 |
(309) 0x456b45 VMOVSD (%RCX,%R11,1),%XMM0 |
(309) 0x456b4b VMOVSD %XMM7,(%RSI) |
(309) 0x456b4f ADD %R15,%RCX |
(309) 0x456b52 VMOVSD %XMM6,(%RSI,%R12,8) |
(309) 0x456b58 VMOVSD %XMM5,(%RSI,%R9,1) |
(309) 0x456b5e VMOVSD %XMM4,(%RSI,%R13,1) |
(309) 0x456b64 ADD %R10,%RSI |
(309) 0x456b67 VMOVSD %XMM3,(%RDX) |
(309) 0x456b6b VMOVSD %XMM2,(%RDX,%R12,8) |
(309) 0x456b71 VMOVSD %XMM1,(%RDX,%R9,1) |
(309) 0x456b77 VMOVSD %XMM0,(%RDX,%R13,1) |
(309) 0x456b7d MOV 0x68(%RSP),%EAX |
(309) 0x456b81 ADD %R10,%RDX |
(309) 0x456b84 CMP %EAX,%R8D |
(309) 0x456b87 JNE 456ab8 |
(308) 0x456b8d MOV %R10,0x38(%RSP) |
(308) 0x456b92 MOV 0x28(%RSP),%EAX |
(308) 0x456b96 MOV %R9,0x30(%RSP) |
(308) 0x456b9b MOV 0x24(%RSP),%EDI |
(308) 0x456b9f CMP %EAX,%EDI |
(308) 0x456ba1 JE 456d56 |
(308) 0x456ba7 MOV 0x20(%RSP),%ESI |
(308) 0x456bab MOV %EAX,%R8D |
(308) 0x456bae SUB %EDI,%R8D |
(308) 0x456bb1 LEA -0x1(%R8),%EDX |
(308) 0x456bb5 CMP $0x2,%EDX |
(308) 0x456bb8 JBE 456c6d |
(308) 0x456bbe MOVSXD 0x60(%RSP),%R9 |
(308) 0x456bc3 MOVSXD 0x98(%RSP),%RCX |
(308) 0x456bcb MOV 0xb0(%RSP),%RDX |
(308) 0x456bd3 LEA 0x1(%R9,%RCX,1),%R10 |
(308) 0x456bd8 MOV %RBX,%R9 |
(308) 0x456bdb MOV 0x78(%RSP),%RCX |
(308) 0x456be0 IMUL %RBX,%R10 |
(308) 0x456be4 IMUL %RDI,%R9 |
(308) 0x456be8 IMUL %R12,%RDI |
(308) 0x456bec ADD %RDX,%R10 |
(308) 0x456bef MOVSXD 0x80(%RSP),%RDX |
(308) 0x456bf7 ADD %R9,%R10 |
(308) 0x456bfa MOV 0xa8(%RSP),%R9 |
(308) 0x456c02 INC %RDX |
(308) 0x456c05 LEA (%RCX,%R10,8),%R10 |
(308) 0x456c09 IMUL %R12,%RDX |
(308) 0x456c0d VMOVSD (%R10),%XMM8 |
(308) 0x456c12 ADD %R9,%RDX |
(308) 0x456c15 MOV %R8D,%R9D |
(308) 0x456c18 ADD %RDI,%RDX |
(308) 0x456c1b MOV 0x70(%RSP),%RDI |
(308) 0x456c20 AND $-0x4,%R9D |
(308) 0x456c24 ADD %R9D,%ESI |
(308) 0x456c27 LEA (%RDI,%RDX,8),%RCX |
(308) 0x456c2b MOV 0x40(%RSP),%RDX |
(308) 0x456c30 ADD %RDX,%R10 |
(308) 0x456c33 VMOVSD (%R10),%XMM9 |
(308) 0x456c38 ADD %RDX,%R10 |
(308) 0x456c3b VMOVSD (%R10),%XMM10 |
(308) 0x456c40 VMOVSD (%R10,%RDX,1),%XMM11 |
(308) 0x456c46 VMOVSD %XMM8,(%RCX) |
(308) 0x456c4a MOV 0x48(%RSP),%R10 |
(308) 0x456c4f ADD %R10,%RCX |
(308) 0x456c52 VMOVSD %XMM9,(%RCX) |
(308) 0x456c56 ADD %R10,%RCX |
(308) 0x456c59 AND $0x3,%R8D |
(308) 0x456c5d VMOVSD %XMM10,(%RCX) |
(308) 0x456c61 VMOVSD %XMM11,(%RCX,%R10,1) |
(308) 0x456c67 JE 456d56 |
(308) 0x456c6d MOV 0x60(%RSP),%EDI |
(308) 0x456c71 MOV 0x98(%RSP),%R9D |
(308) 0x456c79 MOV 0xb0(%RSP),%RCX |
(308) 0x456c81 MOV 0x78(%RSP),%R10 |
(308) 0x456c86 LEA (%RDI,%RSI,1),%R8D |
(308) 0x456c8a ADD %R9D,%R8D |
(308) 0x456c8d MOVSXD %R8D,%RDX |
(308) 0x456c90 MOV 0x80(%RSP),%R8D |
(308) 0x456c98 IMUL %RBX,%RDX |
(308) 0x456c9c ADD %RCX,%RDX |
(308) 0x456c9f MOV 0xa8(%RSP),%RCX |
(308) 0x456ca7 VMOVSD (%R10,%RDX,8),%XMM12 |
(308) 0x456cad LEA (%R8,%RSI,1),%EDX |
(308) 0x456cb1 MOV 0x70(%RSP),%R10 |
(308) 0x456cb6 MOVSXD %EDX,%RDX |
(308) 0x456cb9 IMUL %R12,%RDX |
(308) 0x456cbd ADD %RCX,%RDX |
(308) 0x456cc0 VMOVSD %XMM12,(%R10,%RDX,8) |
(308) 0x456cc6 LEA 0x1(%RSI),%EDX |
(308) 0x456cc9 CMP %EDX,%EAX |
(308) 0x456ccb JL 456d56 |
(308) 0x456cd1 LEA (%RDI,%RDX,1),%ECX |
(308) 0x456cd4 MOV 0xb0(%RSP),%R10 |
(308) 0x456cdc ADD %R8D,%EDX |
(308) 0x456cdf ADD $0x2,%ESI |
(308) 0x456ce2 ADD %R9D,%ECX |
(308) 0x456ce5 MOVSXD %EDX,%RDX |
(308) 0x456ce8 MOVSXD %ECX,%RCX |
(308) 0x456ceb IMUL %R12,%RDX |
(308) 0x456cef IMUL %RBX,%RCX |
(308) 0x456cf3 ADD %R10,%RCX |
(308) 0x456cf6 MOV 0x78(%RSP),%R10 |
(308) 0x456cfb VMOVSD (%R10,%RCX,8),%XMM13 |
(308) 0x456d01 MOV %R8D,%ECX |
(308) 0x456d04 MOV 0xa8(%RSP),%R8 |
(308) 0x456d0c MOV 0x70(%RSP),%R10 |
(308) 0x456d11 ADD %R8,%RDX |
(308) 0x456d14 VMOVSD %XMM13,(%R10,%RDX,8) |
(308) 0x456d1a CMP %ESI,%EAX |
(308) 0x456d1c JL 456d56 |
(308) 0x456d1e ADD %ESI,%EDI |
(308) 0x456d20 ADD %ESI,%ECX |
(308) 0x456d22 MOV 0xb0(%RSP),%RDX |
(308) 0x456d2a MOV 0x78(%RSP),%R10 |
(308) 0x456d2f ADD %R9D,%EDI |
(308) 0x456d32 MOVSXD %ECX,%RSI |
(308) 0x456d35 MOV 0x70(%RSP),%RCX |
(308) 0x456d3a MOVSXD %EDI,%R9 |
(308) 0x456d3d IMUL %R12,%RSI |
(308) 0x456d41 IMUL %RBX,%R9 |
(308) 0x456d45 ADD %R8,%RSI |
(308) 0x456d48 ADD %RDX,%R9 |
(308) 0x456d4b VMOVSD (%R10,%R9,8),%XMM14 |
(308) 0x456d51 VMOVSD %XMM14,(%RCX,%RSI,8) |
(308) 0x456d56 INCL 0xbc(%RSP) |
(308) 0x456d5d MOV 0xa0(%RSP),%RDI |
(308) 0x456d65 ADD %EAX,0x98(%RSP) |
(308) 0x456d6c ADD %RDI,0xa8(%RSP) |
(308) 0x456d74 MOV 0xbc(%RSP),%R8D |
(308) 0x456d7c TEST %EAX,%EAX |
(308) 0x456d7e JNS 456e33 |
(308) 0x456d84 CMP %R8D,0xb8(%RSP) |
(308) 0x456d8c JG 456a00 |
0x456d92 MOV 0x8(%RSP),%R15 |
0x456d97 KMOVB %K0,0x5f(%RSP) |
0x456d9d JMP 45689e |
(308) 0x456da2 VMOVSD (%RDI),%XMM7 |
(308) 0x456da6 VMOVSD (%RDI,%RBX,8),%XMM6 |
(308) 0x456dab MOV $0x1,%R8D |
(308) 0x456db1 VMOVSD (%RDI,%R14,1),%XMM5 |
(308) 0x456db7 VMOVSD (%RDI,%R11,1),%XMM4 |
(308) 0x456dbd ADD %R15,%RDI |
(308) 0x456dc0 VMOVSD (%RCX),%XMM3 |
(308) 0x456dc4 VMOVSD (%RCX,%RBX,8),%XMM2 |
(308) 0x456dc9 VMOVSD (%RCX,%R14,1),%XMM1 |
(308) 0x456dcf VMOVSD (%RCX,%R11,1),%XMM0 |
(308) 0x456dd5 VMOVSD %XMM7,(%RSI) |
(308) 0x456dd9 ADD %R15,%RCX |
(308) 0x456ddc MOV 0x38(%RSP),%R9 |
(308) 0x456de1 MOV 0x30(%RSP),%R10 |
(308) 0x456de6 VMOVSD %XMM6,(%RSI,%R12,8) |
(308) 0x456dec VMOVSD %XMM5,(%RSI,%R10,1) |
(308) 0x456df2 VMOVSD %XMM4,(%RSI,%R13,1) |
(308) 0x456df8 ADD %R9,%RSI |
(308) 0x456dfb VMOVSD %XMM3,(%RDX) |
(308) 0x456dff VMOVSD %XMM2,(%RDX,%R12,8) |
(308) 0x456e05 VMOVSD %XMM1,(%RDX,%R10,1) |
(308) 0x456e0b VMOVSD %XMM0,(%RDX,%R13,1) |
(308) 0x456e11 ADD %R9,%RDX |
(308) 0x456e14 MOV 0x68(%RSP),%R9D |
(308) 0x456e19 CMP %R9D,%R8D |
(308) 0x456e1c JE 456b9b |
(308) 0x456e22 MOV %R10,%R9 |
(308) 0x456e25 MOV %EAX,0x28(%RSP) |
(308) 0x456e29 MOV 0x38(%RSP),%R10 |
(308) 0x456e2e JMP 456ab8 |
(308) 0x456e33 CMP %R8D,0xb8(%RSP) |
(308) 0x456e3b JLE 456e5e |
(308) 0x456e3d MOV 0x58(%RSP),%R9D |
(308) 0x456e42 KMOVB 0x5f(%RSP),%K0 |
(308) 0x456e48 MOV %R9D,0x54(%RSP) |
(308) 0x456e4d JMP 456a00 |
(308) 0x456e52 XOR %EDI,%EDI |
(308) 0x456e54 MOV $0x1,%ESI |
(308) 0x456e59 JMP 456bab |
0x456e5e MOV 0x8(%RSP),%R15 |
0x456e63 JMP 4568b7 |
0x456e68 NOPL (%RAX,%RAX,1) |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
○94.12 | gomp_thread_start | team.c:130 | libgomp.so.1.0.0 |
○5.49 | GOMP_parallel | libgomp.h:985 | libgomp.so.1.0.0 |
Path / |
Source file and lines | pack_kernel.f90:202-207 |
Module | exec |
nb instructions | 177 |
nb uops | 184 |
loop length | 720 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 28 |
micro-operation queue | 30.67 cycles |
front end | 30.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 11.90 | 11.80 | 13.67 | 13.67 | 22.00 | 11.87 | 11.70 | 22.00 | 22.00 | 22.00 | 11.73 | 13.67 |
cycles | 11.90 | 14.13 | 13.67 | 13.67 | 22.00 | 11.87 | 11.70 | 22.00 | 22.00 | 22.00 | 11.73 | 13.67 |
Cycles executing div or sqrt instructions | 6.00 |
FE+BE cycles | 29.95-29.98 |
Stall cycles | 0.00 |
Front-end | 30.67 |
Dispatch | 22.00 |
DIV/SQRT | 6.00 |
Overall L1 | 30.67 |
all | 3% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 15% |
all | 10% |
load | 9% |
store | 9% |
mul | 6% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RDI,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0xc0,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x48(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x54(%RDI),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RDI),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RDI),%R13D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RDI),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x84(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 402080 <@plt_start@+0x60> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 402180 <@plt_start@+0x160> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x5c(%R15),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %R13D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R14D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
CMP %EDX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 456907 <__pack_kernel_module_MOD_clover_unpack_message_right._omp_fn.0+0x4c7> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %EAX,%EDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %EDI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 4568a5 <__pack_kernel_module_MOD_clover_unpack_message_right._omp_fn.0+0x465> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %R13D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0x1,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%R13,%RDI,1),%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV 0x8(%R15),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SETNE %R13B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP $0x1,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x10(%R15),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R15),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SETNE %CL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R8D,0xbc(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%R15),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
OR %CL,%R13B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EAX,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%R15),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R9),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13B,0x5f(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JNE 456910 <__pack_kernel_module_MOD_clover_unpack_message_right._omp_fn.0+0x4d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOVSXD 0xbc(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xa0(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x1(%RAX),%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EAX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xa8(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x3,%EDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R9,%RBX,1),%R10D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
AND $-0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SAL $0x6,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %EBX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R12,%R9 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOVSXD 0x84(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb0(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %ESI,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %EAX,%R10D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
INC %ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R13,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST %EAX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV %ESI,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMOVNS %EAX,%ECX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
INC %R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
INC %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R11,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x1(%RCX),%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RBX,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CMPB $0,0x5f(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 4568c1 <__pack_kernel_module_MOD_clover_unpack_message_right._omp_fn.0+0x481> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV 0x58(%RSP),%R14D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14D,0x54(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x54(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x50(%R15) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4564b9 <__pack_kernel_module_MOD_clover_unpack_message_right._omp_fn.0+0x79> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV 0xbc(%RSP),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xa0(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x1(%RAX),%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (,%RBX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KXORB %K0,%K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV 0xa8(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %ESI,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOVSXD %EDI,%R9 | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
LEA (%RDI,%RSI,1),%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (,%R12,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RCX,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R10,%R9 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RDI,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RBX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %EAX,%EDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
AND $-0x8,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R12,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RBX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x3,%R13D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SAL $0x6,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %EDI,0x24(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SAL $0x6,%R10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
ADD %R9,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R12,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x4,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SAL $0x5,%R9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %EDX,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x5,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R9,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x4,%R9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RDX,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
TEST %EAX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
CMOVNS %EAX,%EDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %EDI,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x1(%RDX),%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R10,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RBX,%RBX,2),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R13D,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R12,%R12,2),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (,%R11,8),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R14,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%R13,8),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RCX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R15,0x8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x8(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
KMOVB %K0,0x5f(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
JMP 45689e <__pack_kernel_module_MOD_clover_unpack_message_right._omp_fn.0+0x45e> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV 0x8(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4568b7 <__pack_kernel_module_MOD_clover_unpack_message_right._omp_fn.0+0x477> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | pack_kernel.f90:202-207 |
Module | exec |
nb instructions | 177 |
nb uops | 184 |
loop length | 720 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 28 |
micro-operation queue | 30.67 cycles |
front end | 30.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 11.90 | 11.80 | 13.67 | 13.67 | 22.00 | 11.87 | 11.70 | 22.00 | 22.00 | 22.00 | 11.73 | 13.67 |
cycles | 11.90 | 14.13 | 13.67 | 13.67 | 22.00 | 11.87 | 11.70 | 22.00 | 22.00 | 22.00 | 11.73 | 13.67 |
Cycles executing div or sqrt instructions | 6.00 |
FE+BE cycles | 29.95-29.98 |
Stall cycles | 0.00 |
Front-end | 30.67 |
Dispatch | 22.00 |
DIV/SQRT | 6.00 |
Overall L1 | 30.67 |
all | 3% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 15% |
all | 10% |
load | 9% |
store | 9% |
mul | 6% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RDI,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0xc0,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x48(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x54(%RDI),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RDI),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RDI),%R13D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RDI),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x84(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 402080 <@plt_start@+0x60> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 402180 <@plt_start@+0x160> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x5c(%R15),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %R13D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R14D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
CMP %EDX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 456907 <__pack_kernel_module_MOD_clover_unpack_message_right._omp_fn.0+0x4c7> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %EAX,%EDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %EDI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 4568a5 <__pack_kernel_module_MOD_clover_unpack_message_right._omp_fn.0+0x465> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %R13D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0x1,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%R13,%RDI,1),%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV 0x8(%R15),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SETNE %R13B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP $0x1,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x10(%R15),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R15),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SETNE %CL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R8D,0xbc(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%R15),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
OR %CL,%R13B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EAX,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%R15),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R9),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13B,0x5f(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JNE 456910 <__pack_kernel_module_MOD_clover_unpack_message_right._omp_fn.0+0x4d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOVSXD 0xbc(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xa0(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x1(%RAX),%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EAX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xa8(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x3,%EDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R9,%RBX,1),%R10D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
AND $-0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SAL $0x6,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %EBX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R12,%R9 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOVSXD 0x84(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb0(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %ESI,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %EAX,%R10D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
INC %ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R13,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST %EAX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV %ESI,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMOVNS %EAX,%ECX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
INC %R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
INC %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R11,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x1(%RCX),%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RBX,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CMPB $0,0x5f(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 4568c1 <__pack_kernel_module_MOD_clover_unpack_message_right._omp_fn.0+0x481> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV 0x58(%RSP),%R14D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14D,0x54(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x54(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x50(%R15) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4564b9 <__pack_kernel_module_MOD_clover_unpack_message_right._omp_fn.0+0x79> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV 0xbc(%RSP),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xa0(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x1(%RAX),%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (,%RBX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KXORB %K0,%K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV 0xa8(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %ESI,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOVSXD %EDI,%R9 | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
LEA (%RDI,%RSI,1),%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (,%R12,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RCX,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R10,%R9 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RDI,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RBX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %EAX,%EDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
AND $-0x8,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R12,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RBX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x3,%R13D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SAL $0x6,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %EDI,0x24(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SAL $0x6,%R10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
ADD %R9,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R12,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x4,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SAL $0x5,%R9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %EDX,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x5,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R9,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x4,%R9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RDX,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
TEST %EAX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
CMOVNS %EAX,%EDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %EDI,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x1(%RDX),%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R10,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RBX,%RBX,2),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R13D,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R12,%R12,2),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (,%R11,8),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R14,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%R13,8),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RCX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R15,0x8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x8(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
KMOVB %K0,0x5f(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
JMP 45689e <__pack_kernel_module_MOD_clover_unpack_message_right._omp_fn.0+0x45e> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV 0x8(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4568b7 <__pack_kernel_module_MOD_clover_unpack_message_right._omp_fn.0+0x477> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼clover_unpack_message_right._omp_fn.0– | 0.03 | 0.01 |
▼Loop 310 - pack_kernel.f90:202-207 - exec– | 0.03 | 0.02 |
○Loop 311 - pack_kernel.f90:207-207 - exec | 0 | 0 |
▼Loop 308 - pack_kernel.f90:206-207 - exec– | 0 | 0 |
○Loop 309 - pack_kernel.f90:207-207 - exec | 0 | 0 |