Loop Id: 216 | Module: exec | Source: PdV_kernel.f90:69-99 [...] | Coverage: 5.2% |
---|
Loop Id: 216 | Module: exec | Source: PdV_kernel.f90:69-99 [...] | Coverage: 5.2% |
---|
0x42c810 VMOVUPD -0x8(%R8,%RSI,8),%ZMM22 [5] |
0x42c81b VMOVUPD (%R8,%RSI,8),%ZMM23 [5] |
0x42c822 VADDPD -0x8(%RDI,%RSI,8),%ZMM22,%ZMM22 [9] |
0x42c82d VMULPD -0x8(%RAX,%RSI,8),%ZMM21,%ZMM24 [2] |
0x42c838 VADDPD (%RDI,%RSI,8),%ZMM23,%ZMM23 [9] |
0x42c83f VMULPD (%RAX,%RSI,8),%ZMM21,%ZMM25 [2] |
0x42c846 VMOVUPD (%R14,%RSI,8),%ZMM26 [7] |
0x42c84d VADDPD -0x8(%R14,%RSI,8),%ZMM26,%ZMM26 [7] |
0x42c858 VMULPD (%RDX,%RSI,8),%ZMM21,%ZMM27 [10] |
0x42c85f VMULPD %ZMM26,%ZMM27,%ZMM26 |
0x42c865 VFMADD231PD %ZMM24,%ZMM22,%ZMM26 |
0x42c86b VMOVUPD (%R11,%RSI,8),%ZMM22 [13] |
0x42c872 VADDPD -0x8(%R11,%RSI,8),%ZMM22,%ZMM22 [13] |
0x42c87d VMULPD (%R9,%RSI,8),%ZMM21,%ZMM24 [11] |
0x42c884 VFNMADD231PD %ZMM25,%ZMM23,%ZMM26 |
0x42c88a VFMSUB213PD %ZMM26,%ZMM22,%ZMM24 |
0x42c890 VMOVUPD (%R13,%RSI,8),%ZMM22 [1] |
0x42c898 VMOVUPD (%R10,%RSI,8),%ZMM23 [12] |
0x42c89f VADDPD (%R15,%RSI,8),%ZMM23,%ZMM23 [14] |
0x42c8a6 VMULPD %ZMM23,%ZMM24,%ZMM23 |
0x42c8ac VMULPD (%RBX,%RSI,8),%ZMM22,%ZMM25 [15] |
0x42c8b3 VDIVPD %ZMM25,%ZMM23,%ZMM23 |
0x42c8b9 VADDPD %ZMM22,%ZMM24,%ZMM22 |
0x42c8bf VMOVUPD (%R12,%RSI,8),%ZMM24 [8] |
0x42c8c6 VSUBPD %ZMM23,%ZMM24,%ZMM23 |
0x42c8cc VDIVPD %ZMM22,%ZMM25,%ZMM22 |
0x42c8d2 MOV 0xd8(%RSP),%RCX [4] |
0x42c8da VMOVUPD %ZMM23,(%RCX,%RSI,8) [6] |
0x42c8e1 MOV 0xe0(%RSP),%RCX [4] |
0x42c8e9 VMOVUPD %ZMM22,(%RCX,%RSI,8) [3] |
0x42c8f0 ADD $0x8,%RSI |
0x42c8f4 CMP 0x20(%RSP),%RSI [4] |
0x42c8f9 JB 42c810 |
/scratch_na/users/xoserete/qaas_runs/171-419-3245/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/PdV_kernel.f90: 69 - 99 |
-------------------------------------------------------------------------------- |
69: IF(predict)THEN |
[...] |
75: DO j=x_min,x_max |
76: |
77: left_flux= (xarea(j ,k )*(xvel0(j ,k )+xvel0(j ,k+1) & |
78: +xvel0(j ,k )+xvel0(j ,k+1)))*0.25_8*dt*0.5 |
79: right_flux= (xarea(j+1,k )*(xvel0(j+1,k )+xvel0(j+1,k+1) & |
80: +xvel0(j+1,k )+xvel0(j+1,k+1)))*0.25_8*dt*0.5 |
81: bottom_flux=(yarea(j ,k )*(yvel0(j ,k )+yvel0(j+1,k ) & |
82: +yvel0(j ,k )+yvel0(j+1,k )))*0.25_8*dt*0.5 |
83: top_flux= (yarea(j ,k+1)*(yvel0(j ,k+1)+yvel0(j+1,k+1) & |
84: +yvel0(j ,k+1)+yvel0(j+1,k+1)))*0.25_8*dt*0.5 |
85: total_flux=right_flux-left_flux+top_flux-bottom_flux |
86: |
87: volume_change_s=volume(j,k)/(volume(j,k)+total_flux) |
[...] |
95: energy_change=(pressure(j,k)/density0(j,k)+viscosity(j,k)/density0(j,k))*total_flux*recip_volume |
96: |
97: energy1(j,k)=energy0(j,k)-energy_change |
98: |
99: density1(j,k)=density0(j,k)*volume_change_s |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_invoke_task_func | libiomp5.so |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 2.78 |
Bottlenecks | P0, |
Function | pdv_kernel_.DIR.OMP.PARALLEL.2 |
Source | PdV_kernel.f90:69-69,PdV_kernel.f90:75-87,PdV_kernel.f90:95-99 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 32.00 |
CQA cycles if no scalar integer | 32.00 |
CQA cycles if FP arith vectorized | 32.00 |
CQA cycles if fully vectorized | 32.00 |
Front-end cycles | 7.67 |
DIV/SQRT cycles | 11.50 |
P0 cycles | 8.50 |
P1 cycles | 6.67 |
P2 cycles | 6.67 |
P3 cycles | 1.00 |
P4 cycles | 11.50 |
P5 cycles | 1.00 |
P6 cycles | 1.00 |
P7 cycles | 1.00 |
P8 cycles | 1.00 |
P9 cycles | 0.00 |
P10 cycles | 6.67 |
P11 cycles | 32.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 32.46 - 32.52 |
Stall cycles (UFS) | 24.07 - 24.13 |
Nb insns | 33.00 |
Nb uops | 36.00 |
Nb loads | 20.00 |
Nb stores | 2.00 |
Nb stack references | 3.00 |
FLOP/cycle | 5.50 |
Nb FLOP add-sub | 56.00 |
Nb FLOP mul | 56.00 |
Nb FLOP fma | 24.00 |
Nb FLOP div | 16.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 38.75 |
Bytes prefetched | 0.00 |
Bytes loaded | 1112.00 |
Bytes stored | 128.00 |
Stride 0 | 1.00 |
Stride 1 | 7.00 |
Stride n | 6.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 100.00 |
Vectorization ratio load | 100.00 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | 100.00 |
Vectorization ratio other | NA |
Vector-efficiency ratio all | 100.00 |
Vector-efficiency ratio load | 100.00 |
Vector-efficiency ratio store | 100.00 |
Vector-efficiency ratio mul | 100.00 |
Vector-efficiency ratio add_sub | 100.00 |
Vector-efficiency ratio fma | 100.00 |
Vector-efficiency ratio div_sqrt | 100.00 |
Vector-efficiency ratio other | NA |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 2.78 |
Bottlenecks | P0, |
Function | pdv_kernel_.DIR.OMP.PARALLEL.2 |
Source | PdV_kernel.f90:69-69,PdV_kernel.f90:75-87,PdV_kernel.f90:95-99 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 32.00 |
CQA cycles if no scalar integer | 32.00 |
CQA cycles if FP arith vectorized | 32.00 |
CQA cycles if fully vectorized | 32.00 |
Front-end cycles | 7.67 |
DIV/SQRT cycles | 11.50 |
P0 cycles | 8.50 |
P1 cycles | 6.67 |
P2 cycles | 6.67 |
P3 cycles | 1.00 |
P4 cycles | 11.50 |
P5 cycles | 1.00 |
P6 cycles | 1.00 |
P7 cycles | 1.00 |
P8 cycles | 1.00 |
P9 cycles | 0.00 |
P10 cycles | 6.67 |
P11 cycles | 32.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 32.46 - 32.52 |
Stall cycles (UFS) | 24.07 - 24.13 |
Nb insns | 33.00 |
Nb uops | 36.00 |
Nb loads | 20.00 |
Nb stores | 2.00 |
Nb stack references | 3.00 |
FLOP/cycle | 5.50 |
Nb FLOP add-sub | 56.00 |
Nb FLOP mul | 56.00 |
Nb FLOP fma | 24.00 |
Nb FLOP div | 16.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 38.75 |
Bytes prefetched | 0.00 |
Bytes loaded | 1112.00 |
Bytes stored | 128.00 |
Stride 0 | 1.00 |
Stride 1 | 7.00 |
Stride n | 6.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 100.00 |
Vectorization ratio load | 100.00 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | 100.00 |
Vectorization ratio other | NA |
Vector-efficiency ratio all | 100.00 |
Vector-efficiency ratio load | 100.00 |
Vector-efficiency ratio store | 100.00 |
Vector-efficiency ratio mul | 100.00 |
Vector-efficiency ratio add_sub | 100.00 |
Vector-efficiency ratio fma | 100.00 |
Vector-efficiency ratio div_sqrt | 100.00 |
Vector-efficiency ratio other | NA |
Path / |
Function | pdv_kernel_.DIR.OMP.PARALLEL.2 |
Source file and lines | PdV_kernel.f90:69-99 |
Module | exec |
nb instructions | 33 |
nb uops | 36 |
loop length | 239 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 7 |
nb stack references | 3 |
ADD-SUB / MUL ratio | 1.00 |
micro-operation queue | 7.67 cycles |
front end | 7.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 11.50 | 0.00 | 6.67 | 6.67 | 1.00 | 11.50 | 1.00 | 1.00 | 1.00 | 1.00 | 0.00 | 6.67 |
cycles | 11.50 | 8.50 | 6.67 | 6.67 | 1.00 | 11.50 | 1.00 | 1.00 | 1.00 | 1.00 | 0.00 | 6.67 |
Cycles executing div or sqrt instructions | 32.00 |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 32.46-32.52 |
Stall cycles | 24.07-24.13 |
LB full (events) | 25.72-25.78 |
Front-end | 7.67 |
Dispatch | 11.50 |
DIV/SQRT | 32.00 |
Data deps. | 1.00 |
Overall L1 | 32.00 |
all | 100% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | NA (no other vectorizable/vectorized instructions) |
all | 100% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | NA (no other vectorizable/vectorized instructions) |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VMOVUPD -0x8(%R8,%RSI,8),%ZMM22 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVUPD (%R8,%RSI,8),%ZMM23 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VADDPD -0x8(%RDI,%RSI,8),%ZMM22,%ZMM22 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VMULPD -0x8(%RAX,%RSI,8),%ZMM21,%ZMM24 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VADDPD (%RDI,%RSI,8),%ZMM23,%ZMM23 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VMULPD (%RAX,%RSI,8),%ZMM21,%ZMM25 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD (%R14,%RSI,8),%ZMM26 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VADDPD -0x8(%R14,%RSI,8),%ZMM26,%ZMM26 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VMULPD (%RDX,%RSI,8),%ZMM21,%ZMM27 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMULPD %ZMM26,%ZMM27,%ZMM26 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231PD %ZMM24,%ZMM22,%ZMM26 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD (%R11,%RSI,8),%ZMM22 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VADDPD -0x8(%R11,%RSI,8),%ZMM22,%ZMM22 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VMULPD (%R9,%RSI,8),%ZMM21,%ZMM24 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VFNMADD231PD %ZMM25,%ZMM23,%ZMM26 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMSUB213PD %ZMM26,%ZMM22,%ZMM24 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD (%R13,%RSI,8),%ZMM22 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVUPD (%R10,%RSI,8),%ZMM23 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VADDPD (%R15,%RSI,8),%ZMM23,%ZMM23 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VMULPD %ZMM23,%ZMM24,%ZMM23 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD (%RBX,%RSI,8),%ZMM22,%ZMM25 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VDIVPD %ZMM25,%ZMM23,%ZMM23 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VADDPD %ZMM22,%ZMM24,%ZMM22 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVUPD (%R12,%RSI,8),%ZMM24 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VSUBPD %ZMM23,%ZMM24,%ZMM23 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VDIVPD %ZMM22,%ZMM25,%ZMM22 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
MOV 0xd8(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVUPD %ZMM23,(%RCX,%RSI,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0xe0(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVUPD %ZMM22,(%RCX,%RSI,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
ADD $0x8,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP 0x20(%RSP),%RSI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JB 42c810 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x10d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
Function | pdv_kernel_.DIR.OMP.PARALLEL.2 |
Source file and lines | PdV_kernel.f90:69-99 |
Module | exec |
nb instructions | 33 |
nb uops | 36 |
loop length | 239 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 7 |
nb stack references | 3 |
ADD-SUB / MUL ratio | 1.00 |
micro-operation queue | 7.67 cycles |
front end | 7.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 11.50 | 0.00 | 6.67 | 6.67 | 1.00 | 11.50 | 1.00 | 1.00 | 1.00 | 1.00 | 0.00 | 6.67 |
cycles | 11.50 | 8.50 | 6.67 | 6.67 | 1.00 | 11.50 | 1.00 | 1.00 | 1.00 | 1.00 | 0.00 | 6.67 |
Cycles executing div or sqrt instructions | 32.00 |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 32.46-32.52 |
Stall cycles | 24.07-24.13 |
LB full (events) | 25.72-25.78 |
Front-end | 7.67 |
Dispatch | 11.50 |
DIV/SQRT | 32.00 |
Data deps. | 1.00 |
Overall L1 | 32.00 |
all | 100% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | NA (no other vectorizable/vectorized instructions) |
all | 100% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | NA (no other vectorizable/vectorized instructions) |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VMOVUPD -0x8(%R8,%RSI,8),%ZMM22 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVUPD (%R8,%RSI,8),%ZMM23 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VADDPD -0x8(%RDI,%RSI,8),%ZMM22,%ZMM22 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VMULPD -0x8(%RAX,%RSI,8),%ZMM21,%ZMM24 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VADDPD (%RDI,%RSI,8),%ZMM23,%ZMM23 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VMULPD (%RAX,%RSI,8),%ZMM21,%ZMM25 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD (%R14,%RSI,8),%ZMM26 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VADDPD -0x8(%R14,%RSI,8),%ZMM26,%ZMM26 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VMULPD (%RDX,%RSI,8),%ZMM21,%ZMM27 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMULPD %ZMM26,%ZMM27,%ZMM26 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231PD %ZMM24,%ZMM22,%ZMM26 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD (%R11,%RSI,8),%ZMM22 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VADDPD -0x8(%R11,%RSI,8),%ZMM22,%ZMM22 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VMULPD (%R9,%RSI,8),%ZMM21,%ZMM24 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VFNMADD231PD %ZMM25,%ZMM23,%ZMM26 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMSUB213PD %ZMM26,%ZMM22,%ZMM24 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD (%R13,%RSI,8),%ZMM22 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVUPD (%R10,%RSI,8),%ZMM23 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VADDPD (%R15,%RSI,8),%ZMM23,%ZMM23 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VMULPD %ZMM23,%ZMM24,%ZMM23 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD (%RBX,%RSI,8),%ZMM22,%ZMM25 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VDIVPD %ZMM25,%ZMM23,%ZMM23 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VADDPD %ZMM22,%ZMM24,%ZMM22 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVUPD (%R12,%RSI,8),%ZMM24 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VSUBPD %ZMM23,%ZMM24,%ZMM23 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VDIVPD %ZMM22,%ZMM25,%ZMM22 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
MOV 0xd8(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVUPD %ZMM23,(%RCX,%RSI,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0xe0(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVUPD %ZMM22,(%RCX,%RSI,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
ADD $0x8,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP 0x20(%RSP),%RSI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JB 42c810 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x10d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |