Function: calc_dt_kernel_.DIR.OMP.PARALLEL.2 | Module: exec | Source: calc_dt_kernel.f90:89-133 | Coverage: 4.54% |
---|
Function: calc_dt_kernel_.DIR.OMP.PARALLEL.2 | Module: exec | Source: calc_dt_kernel.f90:89-133 | Coverage: 4.54% |
---|
/scratch_na/users/xoserete/qaas_runs/171-419-3245/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/calc_dt_kernel.f90: 89 - 133 |
-------------------------------------------------------------------------------- |
89: !$OMP PARALLEL |
90: |
91: !$OMP DO PRIVATE(dsx,dsy,cc,dv1,dv2,div,dtct,dtut,dtvt,dtdivt) REDUCTION(MIN : dt_min_val) |
92: DO k=y_min,y_max |
93: !$OMP SIMD |
94: DO j=x_min,x_max |
95: |
96: dsx=celldx(j) |
97: dsy=celldy(k) |
98: |
99: cc=soundspeed(j,k)*soundspeed(j,k) |
100: cc=cc+2.0_8*viscosity_a(j,k)/density0(j,k) |
101: cc=MAX(SQRT(cc),g_small) |
102: |
103: dtct=dtc_safe*MIN(dsx,dsy)/cc |
104: |
105: div=0.0 |
106: |
107: dv1=(xvel0(j ,k)+xvel0(j ,k+1))*xarea(j ,k) |
108: dv2=(xvel0(j+1,k)+xvel0(j+1,k+1))*xarea(j+1,k) |
109: |
110: div=div+dv2-dv1 |
111: |
112: dtut=dtu_safe*2.0_8*volume(j,k)/MAX(ABS(dv1),ABS(dv2),g_small*volume(j,k)) |
113: |
114: dv1=(yvel0(j,k )+yvel0(j+1,k ))*yarea(j,k ) |
115: dv2=(yvel0(j,k+1)+yvel0(j+1,k+1))*yarea(j,k+1) |
116: |
117: div=div+dv2-dv1 |
118: |
119: dtvt=dtv_safe*2.0_8*volume(j,k)/MAX(ABS(dv1),ABS(dv2),g_small*volume(j,k)) |
120: |
121: div=div/(2.0_8*volume(j,k)) |
122: |
123: IF(div.LT.-g_small)THEN |
124: dtdivt=dtdiv_safe*(-1.0_8/div) |
125: ELSE |
126: dtdivt=g_big |
127: ENDIF |
128: |
129: dt_min_val=MIN(dt_min_val,dtct,dtut,dtvt,dtdivt) |
130: |
131: ENDDO |
132: ENDDO |
133: !$OMP END DO |
0x433f50 PUSH %RBP |
0x433f51 MOV %RSP,%RBP |
0x433f54 PUSH %R15 |
0x433f56 PUSH %R14 |
0x433f58 PUSH %R13 |
0x433f5a PUSH %R12 |
0x433f5c PUSH %RBX |
0x433f5d SUB $0x188,%RSP |
0x433f64 MOV 0xa0(%RBP),%EBX |
0x433f6a MOV 0x98(%RBP),%EAX |
0x433f70 SUB %EBX,%EAX |
0x433f72 MOVL $0,-0x5c(%RBP) |
0x433f79 JS 434066 |
0x433f7f MOV %R9,%R12 |
0x433f82 MOV %RCX,%R15 |
0x433f85 MOV %RDI,-0x68(%RBP) |
0x433f89 MOV (%RDI),%ESI |
0x433f8b MOVL $0,-0x30(%RBP) |
0x433f92 MOV %EAX,-0x2c(%RBP) |
0x433f95 MOVL $0x1,-0x58(%RBP) |
0x433f9c SUB $0x8,%RSP |
0x433fa0 LEA -0x58(%RBP),%RAX |
0x433fa4 LEA -0x5c(%RBP),%RCX |
0x433fa8 LEA -0x30(%RBP),%R8 |
0x433fac LEA -0x2c(%RBP),%R9 |
0x433fb0 MOV $0x7343d0,%EDI |
0x433fb5 MOV %ESI,-0x4c(%RBP) |
0x433fb8 MOV $0x22,%EDX |
0x433fbd PUSH $0x1 |
0x433fbf PUSH $0x1 |
0x433fc1 PUSH %RAX |
0x433fc2 CALL 404520 <__kmpc_for_static_init_4@plt> |
0x433fc7 ADD $0x20,%RSP |
0x433fcb MOV -0x30(%RBP),%ESI |
0x433fce MOV -0x2c(%RBP),%EAX |
0x433fd1 SUB %ESI,%EAX |
0x433fd3 MOV %EAX,-0x50(%RBP) |
0x433fd6 JAE 434084 |
0x433fdc VMOVSD 0xc2a8c(%RIP),%XMM10 |
0x433fe4 VMOVSD %XMM10,-0x88(%RBP) |
0x433fec MOV $0x7343f0,%EDI |
0x433ff1 MOV -0x4c(%RBP),%ESI |
0x433ff4 VZEROUPPER |
0x433ff7 CALL 404110 <__kmpc_for_static_fini@plt> |
0x433ffc MOV -0x68(%RBP),%RBX |
0x434000 MOV (%RBX),%ESI |
0x434002 SUB $0x8,%RSP |
0x434006 MOV $0x78d1a0,%RAX |
0x43400d LEA -0x88(%RBP),%R8 |
0x434014 MOV $0x734410,%EDI |
0x434019 MOV $0x433f40,%R9D |
0x43401f MOV $0x1,%EDX |
0x434024 MOV $0x8,%ECX |
0x434029 PUSH %RAX |
0x43402a CALL 404710 <__kmpc_reduce@plt> |
0x43402f MOV %RBX,%RDI |
0x434032 ADD $0x10,%RSP |
0x434036 CMP $0x1,%EAX |
0x434039 JNE 434066 |
0x43403b VMOVSD -0x88(%RBP),%XMM0 |
0x434043 MOV 0x10(%RBP),%RAX |
0x434047 VMINSD (%RAX),%XMM0,%XMM0 |
0x43404b VMOVSD %XMM0,(%RAX) |
0x43404f MOV (%RDI),%ESI |
0x434051 MOV $0x78d1a0,%RDX |
0x434058 MOV $0x734430,%EDI |
0x43405d CALL 404880 <__kmpc_end_reduce@plt> |
0x434062 MOV -0x68(%RBP),%RDI |
0x434066 MOV (%RDI),%ESI |
0x434068 MOV $0x734450,%EDI |
0x43406d CALL 4045e0 <__kmpc_barrier@plt> |
0x434072 ADD $0x188,%RSP |
0x434079 POP %RBX |
0x43407a POP %R12 |
0x43407c POP %R13 |
0x43407e POP %R14 |
0x434080 POP %R15 |
0x434082 POP %RBP |
0x434083 RET |
0x434084 MOV 0xb0(%RBP),%RAX |
0x43408b MOV 0xa8(%RBP),%RCX |
0x434092 MOV 0x58(%RBP),%RDI |
0x434096 MOVSXD (%RAX),%R8 |
0x434099 MOV (%RCX),%ECX |
0x43409b SUB %R8D,%ECX |
0x43409e ADD %EBX,%ESI |
0x4340a0 LEA -0x2(%R15),%EAX |
0x4340a4 CLTQ |
0x4340a6 MOV %RAX,-0x138(%RBP) |
0x4340ad MOV %RCX,-0x180(%RBP) |
0x4340b4 LEA 0x1(%RCX),%EAX |
0x4340b7 CMP $0x2,%EAX |
0x4340ba MOV $0x1,%ECX |
0x4340bf CMOVGE %EAX,%ECX |
0x4340c2 MOV %RCX,-0x78(%RBP) |
0x4340c6 AND $0x7ffffffc,%ECX |
0x4340cc MOV %RCX,-0x48(%RBP) |
0x4340d0 MOVSXD %R12D,%RDX |
0x4340d3 LEA -0x2(%RDX),%RAX |
0x4340d7 MOV %RAX,-0x110(%RBP) |
0x4340de MOVSXD %R15D,%RCX |
0x4340e1 MOV %R8,-0x118(%RBP) |
0x4340e8 LEA (,%R8,8),%RAX |
0x4340f0 SAL $0x3,%RDX |
0x4340f4 SUB %RDX,%RAX |
0x4340f7 MOV $0x3,%R8D |
0x4340fd SUB %RCX,%R8 |
0x434100 MOV %R8,-0x130(%RBP) |
0x434107 MOV $0x18,%R8D |
0x43410d SUB %RDX,%R8 |
0x434110 MOV $0x10,%R9D |
0x434116 SUB %RDX,%R9 |
0x434119 MOV $0x2,%EDX |
0x43411e SUB %RCX,%RDX |
0x434121 MOV %RDX,-0x128(%RBP) |
0x434128 ADD $-0x2,%RCX |
0x43412c MOV %RCX,-0x70(%RBP) |
0x434130 LEA (%RDI,%RAX,1),%RCX |
0x434134 ADD $0x10,%RCX |
0x434138 MOV %RCX,-0xc8(%RBP) |
0x43413f ADD %R9,%RDI |
0x434142 MOV %RDI,-0x120(%RBP) |
0x434149 MOV 0x40(%RBP),%RCX |
0x43414d LEA (%RCX,%RAX,1),%RDX |
0x434151 ADD $0x10,%RDX |
0x434155 MOV %RDX,-0xc0(%RBP) |
0x43415c ADD %R9,%RCX |
0x43415f MOV %RCX,-0xf8(%RBP) |
0x434166 MOV 0x38(%RBP),%RCX |
0x43416a LEA (%RCX,%RAX,1),%RDX |
0x43416e ADD $0x10,%RDX |
0x434172 MOV %RDX,-0xb8(%RBP) |
0x434179 ADD %R9,%RCX |
0x43417c MOV %RCX,-0xf0(%RBP) |
0x434183 MOV 0x30(%RBP),%RCX |
0x434187 LEA (%RCX,%RAX,1),%RDX |
0x43418b ADD $0x10,%RDX |
0x43418f MOV %RDX,-0xb0(%RBP) |
0x434196 ADD %R9,%RCX |
0x434199 MOV %RCX,-0xe8(%RBP) |
0x4341a0 MOV 0x28(%RBP),%RCX |
0x4341a4 LEA (%RCX,%RAX,1),%RDX |
0x4341a8 ADD $0x10,%RDX |
0x4341ac MOV %RDX,-0xa8(%RBP) |
0x4341b3 ADD %R9,%RCX |
0x4341b6 MOV %RCX,-0xe0(%RBP) |
0x4341bd MOV 0x50(%RBP),%RCX |
0x4341c1 ADD %RCX,%R9 |
0x4341c4 MOV %R9,-0x100(%RBP) |
0x4341cb ADD %RAX,%RCX |
0x4341ce ADD $0x10,%RCX |
0x4341d2 MOV %RCX,-0x1b0(%RBP) |
0x4341d9 MOV 0x60(%RBP),%RCX |
0x4341dd MOV 0x20(%RBP),%RDX |
0x4341e1 MOV 0x18(%RBP),%RDI |
0x4341e5 LEA 0x18(%RDI,%RAX,1),%R9 |
0x4341ea MOV %R9,-0xa0(%RBP) |
0x4341f1 LEA 0x18(%RCX,%RAX,1),%R9 |
0x4341f6 MOV %R9,-0x98(%RBP) |
0x4341fd LEA 0x18(%RDX,%RAX,1),%RAX |
0x434202 MOV %RAX,-0x90(%RBP) |
0x434209 LEA (%RDI,%R8,1),%RAX |
0x43420d MOV %RAX,-0xd8(%RBP) |
0x434214 LEA (%RCX,%R8,1),%RAX |
0x434218 MOV %RAX,-0xd0(%RBP) |
0x43421f ADD %RDX,%R8 |
0x434222 MOV %R8,-0x108(%RBP) |
0x434229 VMOVSD 0xc283f(%RIP),%XMM10 |
0x434231 VMOVDDUP 0xbf46f(%RIP),%XMM0 |
0x434239 VMOVDDUP 0xbe167(%RIP),%XMM1 |
0x434241 VBROADCASTSD 0xbe15e(%RIP),%YMM2 |
0x43424a VBROADCASTSD 0xbf455(%RIP),%YMM3 |
0x434253 XOR %EDX,%EDX |
0x434255 MOV %ESI,%ECX |
0x434257 MOV %RSI,-0x188(%RBP) |
0x43425e JMP 434281 |
(251) 0x434260 MOV -0x1a8(%RBP),%RDX |
(251) 0x434267 LEA 0x1(%RDX),%EAX |
(251) 0x43426a MOV -0x54(%RBP),%ECX |
(251) 0x43426d INC %ECX |
(251) 0x43426f CMP -0x50(%RBP),%EDX |
(251) 0x434272 MOV %EAX,%EDX |
(251) 0x434274 MOV -0x188(%RBP),%RSI |
(251) 0x43427b JE 433fe4 |
(251) 0x434281 CMPL $0,-0x180(%RBP) |
(251) 0x434288 MOV %ECX,-0x54(%RBP) |
(251) 0x43428b MOV %RDX,-0x1a8(%RBP) |
(251) 0x434292 JS 434260 |
(251) 0x434294 MOVSXD %ECX,%RBX |
(251) 0x434297 MOV -0x130(%RBP),%RAX |
(251) 0x43429e LEA (%RAX,%RBX,1),%R10 |
(251) 0x4342a2 ADD -0x128(%RBP),%RBX |
(251) 0x4342a9 LEA (%RSI,%RDX,1),%EAX |
(251) 0x4342ac MOVSXD %EAX,%RDI |
(251) 0x4342af MOV %RDI,%RAX |
(251) 0x4342b2 SUB -0x138(%RBP),%RAX |
(251) 0x4342b9 MOV 0x48(%RBP),%RCX |
(251) 0x4342bd VMOVSD (%RCX,%RAX,8),%XMM4 |
(251) 0x4342c2 MOV 0xb8(%RBP),%RAX |
(251) 0x4342c9 MOV (%RAX),%RCX |
(251) 0x4342cc MOV 0xc0(%RBP),%RAX |
(251) 0x4342d3 MOV (%RAX),%R9 |
(251) 0x4342d6 MOV 0x90(%RBP),%RAX |
(251) 0x4342dd VMOVSD (%RAX),%XMM5 |
(251) 0x4342e1 MOV 0x80(%RBP),%RAX |
(251) 0x4342e8 VMOVSD (%RAX),%XMM6 |
(251) 0x4342ec MOV 0xc8(%RBP),%RAX |
(251) 0x4342f3 MOV (%RAX),%RSI |
(251) 0x4342f6 MOV 0xd0(%RBP),%RAX |
(251) 0x4342fd MOV (%RAX),%R12 |
(251) 0x434300 MOV 0xd8(%RBP),%RAX |
(251) 0x434307 MOV (%RAX),%R15 |
(251) 0x43430a MOV 0x78(%RBP),%RAX |
(251) 0x43430e VMOVSD (%RAX),%XMM7 |
(251) 0x434312 MOV 0xe0(%RBP),%RAX |
(251) 0x434319 MOV (%RAX),%R13 |
(251) 0x43431c MOV 0xe8(%RBP),%RAX |
(251) 0x434323 MOV (%RAX),%R11 |
(251) 0x434326 MOV 0xf0(%RBP),%RAX |
(251) 0x43432d MOV (%RAX),%R14 |
(251) 0x434330 MOV 0x70(%RBP),%RAX |
(251) 0x434334 VMOVSD (%RAX),%XMM8 |
(251) 0x434338 VXORPD %XMM0,%XMM5,%XMM9 |
(251) 0x43433c CMPQ $0,-0x48(%RBP) |
(251) 0x434341 MOV %RCX,-0x80(%RBP) |
(251) 0x434345 MOV %R9,-0x1a0(%RBP) |
(251) 0x43434c MOV %RSI,-0x198(%RBP) |
(251) 0x434353 MOV %R13,-0x190(%RBP) |
(251) 0x43435a JE 4346d0 |
(251) 0x434360 VBROADCASTSD %XMM10,%YMM10 |
(251) 0x434365 SUB -0x70(%RBP),%RDI |
(251) 0x434369 VBROADCASTSD %XMM5,%YMM11 |
(251) 0x43436e VBROADCASTSD %XMM4,%YMM12 |
(251) 0x434373 VBROADCASTSD %XMM6,%YMM13 |
(251) 0x434378 LEA 0x1(%RDI),%RCX |
(251) 0x43437c MOV %R12,%RAX |
(251) 0x43437f IMUL %RCX,%RAX |
(251) 0x434383 MOV %RAX,-0x150(%RBP) |
(251) 0x43438a MOV %R12,%RAX |
(251) 0x43438d IMUL %RDI,%RAX |
(251) 0x434391 MOV %RAX,-0x140(%RBP) |
(251) 0x434398 MOV %R15,%RAX |
(251) 0x43439b IMUL %RDI,%RAX |
(251) 0x43439f MOV %RAX,-0x158(%RBP) |
(251) 0x4343a6 VBROADCASTSD %XMM7,%YMM14 |
(251) 0x4343ab IMUL %R11,%RDI |
(251) 0x4343af MOV %RDI,-0x148(%RBP) |
(251) 0x4343b6 IMUL %R11,%RCX |
(251) 0x4343ba MOV %RCX,-0x38(%RBP) |
(251) 0x4343be VBROADCASTSD %XMM8,%YMM15 |
(251) 0x4343c3 VBROADCASTSD %XMM9,%YMM16 |
(251) 0x4343c9 MOV %R11,%R8 |
(251) 0x4343cc IMUL %R10,%R8 |
(251) 0x4343d0 MOV -0xa0(%RBP),%RAX |
(251) 0x4343d7 ADD %RAX,%R8 |
(251) 0x4343da MOV %R11,-0x160(%RBP) |
(251) 0x4343e1 IMUL %RBX,%R11 |
(251) 0x4343e5 ADD %RAX,%R11 |
(251) 0x4343e8 MOV %R15,-0x170(%RBP) |
(251) 0x4343ef MOV %R15,%RDX |
(251) 0x4343f2 IMUL %RBX,%RDX |
(251) 0x4343f6 ADD -0x98(%RBP),%RDX |
(251) 0x4343fd MOV %R13,%R15 |
(251) 0x434400 MOV %R12,%R13 |
(251) 0x434403 IMUL %RBX,%R13 |
(251) 0x434407 MOV -0x90(%RBP),%RAX |
(251) 0x43440e ADD %RAX,%R13 |
(251) 0x434411 MOV %R12,-0x178(%RBP) |
(251) 0x434418 MOV %R12,%RCX |
(251) 0x43441b IMUL %R10,%RCX |
(251) 0x43441f ADD %RAX,%RCX |
(251) 0x434422 MOV %R14,%RDI |
(251) 0x434425 MOV %R10,-0x40(%RBP) |
(251) 0x434429 IMUL %R10,%RDI |
(251) 0x43442d MOV -0xc8(%RBP),%RAX |
(251) 0x434434 ADD %RAX,%RDI |
(251) 0x434437 MOV %R14,-0x168(%RBP) |
(251) 0x43443e IMUL %RBX,%R14 |
(251) 0x434442 ADD %RAX,%R14 |
(251) 0x434445 MOV %R15,%RAX |
(251) 0x434448 IMUL %RBX,%RAX |
(251) 0x43444c ADD -0xc0(%RBP),%RAX |
(251) 0x434453 IMUL %RBX,%RSI |
(251) 0x434457 ADD -0xb8(%RBP),%RSI |
(251) 0x43445e IMUL %RBX,%R9 |
(251) 0x434462 ADD -0xb0(%RBP),%R9 |
(251) 0x434469 MOV -0x80(%RBP),%R15 |
(251) 0x43446d IMUL %RBX,%R15 |
(251) 0x434471 ADD -0xa8(%RBP),%R15 |
(251) 0x434478 XOR %R10D,%R10D |
(251) 0x43447b JMP 434559 |
(253) 0x434480 MOV -0x1b0(%RBP),%R12 |
(253) 0x434487 VMOVUPD (%R12,%R10,8),%YMM26 |
(253) 0x43448e VMINPD %YMM12,%YMM26,%YMM26 |
(253) 0x434494 VMULPD %YMM26,%YMM13,%YMM26 |
(253) 0x43449a VMOVUPD (%R15,%R10,8),%YMM27 |
(253) 0x4344a1 VMOVUPD (%R9,%R10,8),%YMM28 |
(253) 0x4344a8 VADDPD %YMM28,%YMM28,%YMM28 |
(253) 0x4344ae VDIVPD (%RSI,%R10,8),%YMM28,%YMM28 |
(253) 0x4344b5 VFMADD231PD %YMM27,%YMM27,%YMM28 |
(253) 0x4344bb VSQRTPD %YMM28,%YMM27 |
(253) 0x4344c1 VMAXPD %YMM11,%YMM27,%YMM27 |
(253) 0x4344c7 VDIVPD %YMM27,%YMM26,%YMM26 |
(253) 0x4344cd VMULPD %YMM14,%YMM18,%YMM27 |
(253) 0x4344d3 VANDPD %YMM2,%YMM19,%YMM19 |
(253) 0x4344d9 VANDPD %YMM2,%YMM21,%YMM21 |
(253) 0x4344df VMULPD %YMM11,%YMM22,%YMM22 |
(253) 0x4344e5 VMAXPD %YMM22,%YMM21,%YMM21 |
(253) 0x4344eb VMAXPD %YMM21,%YMM19,%YMM19 |
(253) 0x4344f1 VDIVPD %YMM19,%YMM27,%YMM19 |
(253) 0x4344f7 VMULPD %YMM15,%YMM18,%YMM18 |
(253) 0x4344fd VANDPD %YMM2,%YMM20,%YMM20 |
(253) 0x434503 VANDPD %YMM2,%YMM23,%YMM21 |
(253) 0x434509 VMAXPD %YMM22,%YMM21,%YMM21 |
(253) 0x43450f VMAXPD %YMM21,%YMM20,%YMM20 |
(253) 0x434515 VDIVPD %YMM20,%YMM18,%YMM18 |
(253) 0x43451b VBROADCASTSD %XMM25,%YMM20 |
(253) 0x434521 VXORPD %YMM3,%YMM20,%YMM20 |
(253) 0x434527 VBROADCASTSD %XMM24,%YMM21 |
(253) 0x43452d VDIVPD %YMM17,%YMM20,%YMM21{%K1} |
(253) 0x434533 VMINPD %YMM21,%YMM18,%YMM17 |
(253) 0x434539 VMINPD %YMM17,%YMM19,%YMM17 |
(253) 0x43453f VMINPD %YMM17,%YMM26,%YMM17 |
(253) 0x434545 VMINPD %YMM17,%YMM10,%YMM10 |
(253) 0x43454b ADD $0x4,%R10 |
(253) 0x43454f CMP -0x48(%RBP),%R10 |
(253) 0x434553 JAE 434630 |
(253) 0x434559 VMOVUPD -0x8(%RCX,%R10,8),%YMM17 |
(253) 0x434564 VMOVUPD (%RCX,%R10,8),%YMM18 |
(253) 0x43456b VADDPD -0x8(%R13,%R10,8),%YMM17,%YMM17 |
(253) 0x434576 VMULPD -0x8(%RDX,%R10,8),%YMM17,%YMM19 |
(253) 0x434581 VADDPD (%R13,%R10,8),%YMM18,%YMM17 |
(253) 0x434589 VMULPD (%RDX,%R10,8),%YMM17,%YMM21 |
(253) 0x434590 VMOVUPD (%RAX,%R10,8),%YMM22 |
(253) 0x434597 VADDPD %YMM22,%YMM22,%YMM18 |
(253) 0x43459d VMOVUPD (%R11,%R10,8),%YMM17 |
(253) 0x4345a4 VADDPD -0x8(%R11,%R10,8),%YMM17,%YMM17 |
(253) 0x4345af VMULPD (%R14,%R10,8),%YMM17,%YMM20 |
(253) 0x4345b6 VMOVUPD (%R8,%R10,8),%YMM17 |
(253) 0x4345bd VADDPD -0x8(%R8,%R10,8),%YMM17,%YMM17 |
(253) 0x4345c8 VMULPD (%RDI,%R10,8),%YMM17,%YMM23 |
(253) 0x4345cf VADDPD %YMM20,%YMM19,%YMM17 |
(253) 0x4345d5 VSUBPD %YMM17,%YMM21,%YMM17 |
(253) 0x4345db VADDPD %YMM23,%YMM17,%YMM17 |
(253) 0x4345e1 VDIVPD %YMM18,%YMM17,%YMM17 |
(253) 0x4345e7 VCMPPD $0x5,%YMM16,%YMM17,%K0 |
(253) 0x4345ee KORTESTB %K0,%K0 |
(253) 0x4345f2 JE 434602 |
(253) 0x4345f4 MOV 0x88(%RBP),%R12 |
(253) 0x4345fb VMOVSD (%R12),%XMM24 |
(253) 0x434602 VCMPPD $0x1,%YMM16,%YMM17,%K1 |
(253) 0x434609 KORTESTB %K1,%K1 |
(253) 0x43460d JE 434480 |
(253) 0x434613 MOV 0x68(%RBP),%R12 |
(253) 0x434617 VMOVSD (%R12),%XMM25 |
(253) 0x43461e JMP 434480 |
0x434623 NOPW %CS:(%RAX,%RAX,1) |
(251) 0x434630 VSHUFPD $0x1,%XMM10,%XMM10,%XMM11 |
(251) 0x434636 VMINSD %XMM10,%XMM11,%XMM12 |
(251) 0x43463b VCMPSD $0x3,%XMM10,%XMM10,%K1 |
(251) 0x434642 VMOVSD %XMM11,%XMM12,%XMM12{%K1} |
(251) 0x434648 VCMPSD $0x3,%XMM12,%XMM12,%K1 |
(251) 0x43464f VEXTRACTF128 $0x1,%YMM10,%XMM10 |
(251) 0x434655 VMINSD %XMM12,%XMM10,%XMM11 |
(251) 0x43465a VMOVSD %XMM10,%XMM11,%XMM11{%K1} |
(251) 0x434660 VCMPSD $0x3,%XMM11,%XMM11,%K1 |
(251) 0x434667 VSHUFPD $0x1,%XMM10,%XMM10,%XMM12 |
(251) 0x43466d VMINSD %XMM11,%XMM12,%XMM10 |
(251) 0x434672 VMOVSD %XMM12,%XMM10,%XMM10{%K1} |
(251) 0x434678 MOV -0x48(%RBP),%RCX |
(251) 0x43467c MOV %RCX,%RAX |
(251) 0x43467f CMP -0x78(%RBP),%RCX |
(251) 0x434683 MOV -0x40(%RBP),%R10 |
(251) 0x434687 MOV -0x178(%RBP),%R12 |
(251) 0x43468e MOV -0x170(%RBP),%R15 |
(251) 0x434695 MOV -0x168(%RBP),%R14 |
(251) 0x43469c MOV -0x160(%RBP),%R11 |
(251) 0x4346a3 MOV -0x158(%RBP),%RDI |
(251) 0x4346aa MOV -0x150(%RBP),%R8 |
(251) 0x4346b1 MOV -0x148(%RBP),%R9 |
(251) 0x4346b8 MOV -0x140(%RBP),%R13 |
(251) 0x4346bf JE 434260 |
(251) 0x4346c5 JMP 4346fb |
0x4346c7 NOPW (%RAX,%RAX,1) |
(251) 0x4346d0 SUB -0x70(%RBP),%RDI |
(251) 0x4346d4 MOV %R11,%R9 |
(251) 0x4346d7 IMUL %RDI,%R9 |
(251) 0x4346db LEA 0x1(%RDI),%R8 |
(251) 0x4346df MOV %R11,%RAX |
(251) 0x4346e2 IMUL %R8,%RAX |
(251) 0x4346e6 MOV %RAX,-0x38(%RBP) |
(251) 0x4346ea MOV %R12,%R13 |
(251) 0x4346ed IMUL %RDI,%R13 |
(251) 0x4346f1 IMUL %R12,%R8 |
(251) 0x4346f5 IMUL %R15,%RDI |
(251) 0x4346f9 XOR %EAX,%EAX |
(251) 0x4346fb MOV 0x18(%RBP),%RDX |
(251) 0x4346ff ADD %RDX,%R9 |
(251) 0x434702 MOV -0x118(%RBP),%RCX |
(251) 0x434709 LEA (%RCX,%RAX,1),%RSI |
(251) 0x43470d MOV %RSI,%RCX |
(251) 0x434710 SUB -0x110(%RBP),%RCX |
(251) 0x434717 VMOVSD (%R9,%RCX,8),%XMM11 |
(251) 0x43471d MOV -0x38(%RBP),%R9 |
(251) 0x434721 ADD %RDX,%R9 |
(251) 0x434724 VMOVSD (%R9,%RCX,8),%XMM12 |
(251) 0x43472a MOV 0x20(%RBP),%RDX |
(251) 0x43472e ADD %RDX,%R8 |
(251) 0x434731 VMOVSD (%R8,%RCX,8),%XMM13 |
(251) 0x434737 ADD %RDX,%R13 |
(251) 0x43473a VADDSD (%R13,%RCX,8),%XMM13,%XMM13 |
(251) 0x434741 ADD 0x60(%RBP),%RDI |
(251) 0x434745 VMULSD (%RDI,%RCX,8),%XMM13,%XMM13 |
(251) 0x43474a MOV -0x78(%RBP),%RCX |
(251) 0x43474e SUB %RAX,%RCX |
(251) 0x434751 MOV %RCX,-0x38(%RBP) |
(251) 0x434755 MOV %R11,%RCX |
(251) 0x434758 IMUL %R10,%RCX |
(251) 0x43475c IMUL %RBX,%R11 |
(251) 0x434760 IMUL %RBX,%R15 |
(251) 0x434764 MOV %R12,%R9 |
(251) 0x434767 IMUL %R10,%R9 |
(251) 0x43476b IMUL %RBX,%R12 |
(251) 0x43476f IMUL %R14,%R10 |
(251) 0x434773 MOV %R10,-0x40(%RBP) |
(251) 0x434777 IMUL %RBX,%R14 |
(251) 0x43477b MOV -0x190(%RBP),%R10 |
(251) 0x434782 IMUL %RBX,%R10 |
(251) 0x434786 MOV %R14,%R13 |
(251) 0x434789 MOV -0x198(%RBP),%R14 |
(251) 0x434790 IMUL %RBX,%R14 |
(251) 0x434794 MOV -0x1a0(%RBP),%RDX |
(251) 0x43479b IMUL %RBX,%RDX |
(251) 0x43479f MOV -0x80(%RBP),%RAX |
(251) 0x4347a3 IMUL %RBX,%RAX |
(251) 0x4347a7 LEA (%RCX,%RSI,8),%RCX |
(251) 0x4347ab LEA (%R11,%RSI,8),%RDI |
(251) 0x4347af LEA (%R15,%RSI,8),%R8 |
(251) 0x4347b3 LEA (%R9,%RSI,8),%R9 |
(251) 0x4347b7 LEA (%R12,%RSI,8),%R11 |
(251) 0x4347bb MOV -0x40(%RBP),%RBX |
(251) 0x4347bf LEA (%RBX,%RSI,8),%RBX |
(251) 0x4347c3 LEA (%R13,%RSI,8),%R15 |
(251) 0x4347c8 LEA (%R10,%RSI,8),%R12 |
(251) 0x4347cc LEA (%R14,%RSI,8),%R14 |
(251) 0x4347d0 LEA (%RDX,%RSI,8),%R13 |
(251) 0x4347d4 LEA (%RAX,%RSI,8),%RAX |
(251) 0x4347d8 MOV -0x100(%RBP),%R10 |
(251) 0x4347df LEA (%R10,%RSI,8),%RSI |
(251) 0x4347e3 MOV -0xd8(%RBP),%R10 |
(251) 0x4347ea ADD %R10,%RCX |
(251) 0x4347ed ADD %R10,%RDI |
(251) 0x4347f0 ADD -0xd0(%RBP),%R8 |
(251) 0x4347f7 MOV -0x108(%RBP),%R10 |
(251) 0x4347fe ADD %R10,%R9 |
(251) 0x434801 ADD %R10,%R11 |
(251) 0x434804 MOV -0x120(%RBP),%R10 |
(251) 0x43480b ADD %R10,%RBX |
(251) 0x43480e ADD %R10,%R15 |
(251) 0x434811 ADD -0xf8(%RBP),%R12 |
(251) 0x434818 ADD -0xf0(%RBP),%R14 |
(251) 0x43481f ADD -0xe8(%RBP),%R13 |
(251) 0x434826 ADD -0xe0(%RBP),%RAX |
(251) 0x43482d XOR %R10D,%R10D |
(251) 0x434830 JMP 434906 |
0x434835 NOPW %CS:(%RAX,%RAX,1) |
(252) 0x434840 MOV 0x88(%RBP),%RDX |
(252) 0x434847 VMOVSD (%RDX),%XMM19 |
(252) 0x43484d VMOVSD (%RSI,%R10,8),%XMM20 |
(252) 0x434854 VMOVSD (%RAX,%R10,8),%XMM21 |
(252) 0x43485b VMOVSD (%R13,%R10,8),%XMM22 |
(252) 0x434863 VADDSD %XMM22,%XMM22,%XMM22 |
(252) 0x434869 VDIVSD (%R14,%R10,8),%XMM22,%XMM22 |
(252) 0x434870 VFMADD231SD %XMM21,%XMM21,%XMM22 |
(252) 0x434876 VSQRTSD %XMM22,%XMM22,%XMM21 |
(252) 0x43487c VMAXSD %XMM5,%XMM21,%XMM21 |
(252) 0x434882 VMINSD %XMM4,%XMM20,%XMM20 |
(252) 0x434888 VMULSD %XMM20,%XMM6,%XMM20 |
(252) 0x43488e VDIVSD %XMM21,%XMM20,%XMM20 |
(252) 0x434894 VMULSD %XMM7,%XMM18,%XMM21 |
(252) 0x43489a VANDPD %XMM1,%XMM13,%XMM13 |
(252) 0x43489e VANDPD %XMM1,%XMM14,%XMM22 |
(252) 0x4348a4 VMULSD %XMM5,%XMM15,%XMM15 |
(252) 0x4348a8 VMAXSD %XMM15,%XMM22,%XMM22 |
(252) 0x4348ae VMAXSD %XMM22,%XMM13,%XMM13 |
(252) 0x4348b4 VDIVSD %XMM13,%XMM21,%XMM13 |
(252) 0x4348ba VMULSD %XMM8,%XMM18,%XMM18 |
(252) 0x4348c0 VANDPD %XMM1,%XMM16,%XMM16 |
(252) 0x4348c6 VANDPD %XMM1,%XMM17,%XMM17 |
(252) 0x4348cc VMAXSD %XMM15,%XMM17,%XMM15 |
(252) 0x4348d2 VMAXSD %XMM15,%XMM16,%XMM15 |
(252) 0x4348d8 VDIVSD %XMM15,%XMM18,%XMM15 |
(252) 0x4348de VMINSD %XMM19,%XMM15,%XMM15 |
(252) 0x4348e4 VMINSD %XMM15,%XMM13,%XMM13 |
(252) 0x4348e9 VMINSD %XMM13,%XMM20,%XMM13 |
(252) 0x4348ef VMINSD %XMM13,%XMM10,%XMM10 |
(252) 0x4348f4 INC %R10 |
(252) 0x4348f7 VMOVAPD %XMM14,%XMM13 |
(252) 0x4348fc CMP %R10,-0x38(%RBP) |
(252) 0x434900 JE 434260 |
(252) 0x434906 VMOVSD (%R9,%R10,8),%XMM14 |
(252) 0x43490c VADDSD (%R11,%R10,8),%XMM14,%XMM14 |
(252) 0x434912 VMULSD (%R8,%R10,8),%XMM14,%XMM14 |
(252) 0x434918 VMOVSD (%R12,%R10,8),%XMM15 |
(252) 0x43491e VMOVAPD %XMM11,%XMM16 |
(252) 0x434924 VMOVSD (%RDI,%R10,8),%XMM11 |
(252) 0x43492a VADDSD %XMM16,%XMM11,%XMM16 |
(252) 0x434930 VMULSD (%R15,%R10,8),%XMM16,%XMM16 |
(252) 0x434937 VMOVAPD %XMM12,%XMM17 |
(252) 0x43493d VMOVSD (%RCX,%R10,8),%XMM12 |
(252) 0x434943 VADDSD %XMM17,%XMM12,%XMM17 |
(252) 0x434949 VMULSD (%RBX,%R10,8),%XMM17,%XMM17 |
(252) 0x434950 VADDSD %XMM15,%XMM15,%XMM18 |
(252) 0x434956 VADDSD %XMM16,%XMM13,%XMM19 |
(252) 0x43495c VSUBSD %XMM19,%XMM14,%XMM19 |
(252) 0x434962 VADDSD %XMM17,%XMM19,%XMM19 |
(252) 0x434968 VDIVSD %XMM18,%XMM19,%XMM19 |
(252) 0x43496e VUCOMISD %XMM19,%XMM9 |
(252) 0x434974 JBE 434840 |
(252) 0x43497a MOV 0x68(%RBP),%RDX |
(252) 0x43497e VMOVSD (%RDX),%XMM20 |
(252) 0x434984 VXORPD %XMM0,%XMM20,%XMM20 |
(252) 0x43498a VDIVSD %XMM19,%XMM20,%XMM19 |
(252) 0x434990 JMP 43484d |
0x434995 NOPW %CS:(%RAX,%RAX,1) |
0x43499f NOP |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_invoke_task_func | libiomp5.so |
Path / |
Source file and lines | calc_dt_kernel.f90:89-133 |
Module | exec |
nb instructions | 181 |
nb uops | 187 |
loop length | 828 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 3 |
used ymm registers | 2 |
used zmm registers | 0 |
nb stack references | 50 |
micro-operation queue | 31.17 cycles |
front end | 31.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 10.70 | 10.60 | 13.33 | 13.33 | 26.00 | 10.67 | 10.50 | 26.00 | 26.00 | 26.00 | 10.53 | 13.33 |
cycles | 10.70 | 12.17 | 13.33 | 13.33 | 26.00 | 10.67 | 10.50 | 26.00 | 26.00 | 26.00 | 10.53 | 13.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 30.32-30.38 |
Stall cycles | 0.00 |
Front-end | 31.17 |
Dispatch | 26.00 |
Overall L1 | 31.17 |
all | 1% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 14% |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 1% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 10% |
all | 10% |
load | 6% |
store | 11% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 11% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 10% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
all | 11% |
load | 9% |
store | 11% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 11% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x188,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0xa0(%RBP),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x98(%RBP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOVL $0,-0x5c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JS 434066 <calc_dt_kernel_module_mp_calc_dt_kernel_.DIR.OMP.PARALLEL.2+0x116> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R9,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDI,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,-0x2c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0x1,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x58(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x5c(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x30(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x2c(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x7343d0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,-0x4c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 404520 <__kmpc_for_static_init_4@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x30(%RBP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x2c(%RBP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %ESI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EAX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 434084 <calc_dt_kernel_module_mp_calc_dt_kernel_.DIR.OMP.PARALLEL.2+0x134> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVSD 0xc2a8c(%RIP),%XMM10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD %XMM10,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x7343f0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x4c(%RBP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 404110 <__kmpc_for_static_fini@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x68(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x78d1a0,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x88(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x734410,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x433f40,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x1,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x8,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 404710 <__kmpc_reduce@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD $0x10,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 434066 <calc_dt_kernel_module_mp_calc_dt_kernel_.DIR.OMP.PARALLEL.2+0x116> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVSD -0x88(%RBP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMINSD (%RAX),%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVSD %XMM0,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x78d1a0,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x734430,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 404880 <__kmpc_end_reduce@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x68(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x734450,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4045e0 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x188,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
MOV 0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xa8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD (%RAX),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %R8D,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %EBX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x2(%R15),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CLTQ | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
MOV %RAX,-0x138(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x180(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x1(%RCX),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP $0x2,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x1,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVGE %EAX,%ECX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
AND $0x7ffffffc,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RCX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD %R12D,%RDX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
LEA -0x2(%RDX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0x110(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD %R15D,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV %R8,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%R8,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x3,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SUB %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x3,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RCX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x18,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RDX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x10,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RDX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x2,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RCX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD $-0x2,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RDI,%RAX,1),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x10,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,-0xc8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R9,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDI,-0x120(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RCX,%RAX,1),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x10,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDX,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R9,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,-0xf8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RCX,%RAX,1),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x10,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDX,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R9,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RCX,%RAX,1),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x10,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDX,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R9,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,-0xe8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RCX,%RAX,1),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x10,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R9,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,-0xe0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R9,-0x100(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD $0x10,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,-0x1b0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x18(%RDI,%RAX,1),%R9 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R9,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x18(%RCX,%RAX,1),%R9 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R9,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x18(%RDX,%RAX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RDI,%R8,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0xd8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RCX,%R8,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0xd0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RDX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8,-0x108(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0xc283f(%RIP),%XMM10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDDUP 0xbf46f(%RIP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDDUP 0xbe167(%RIP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VBROADCASTSD 0xbe15e(%RIP),%YMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VBROADCASTSD 0xbf455(%RIP),%YMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %ESI,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RSI,-0x188(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 434281 <calc_dt_kernel_module_mp_calc_dt_kernel_.DIR.OMP.PARALLEL.2+0x331> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | calc_dt_kernel.f90:89-133 |
Module | exec |
nb instructions | 181 |
nb uops | 187 |
loop length | 828 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 3 |
used ymm registers | 2 |
used zmm registers | 0 |
nb stack references | 50 |
micro-operation queue | 31.17 cycles |
front end | 31.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 10.70 | 10.60 | 13.33 | 13.33 | 26.00 | 10.67 | 10.50 | 26.00 | 26.00 | 26.00 | 10.53 | 13.33 |
cycles | 10.70 | 12.17 | 13.33 | 13.33 | 26.00 | 10.67 | 10.50 | 26.00 | 26.00 | 26.00 | 10.53 | 13.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 30.32-30.38 |
Stall cycles | 0.00 |
Front-end | 31.17 |
Dispatch | 26.00 |
Overall L1 | 31.17 |
all | 1% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 14% |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 1% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 10% |
all | 10% |
load | 6% |
store | 11% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 11% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 10% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
all | 11% |
load | 9% |
store | 11% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 11% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x188,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0xa0(%RBP),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x98(%RBP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOVL $0,-0x5c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JS 434066 <calc_dt_kernel_module_mp_calc_dt_kernel_.DIR.OMP.PARALLEL.2+0x116> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R9,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDI,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,-0x2c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0x1,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x58(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x5c(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x30(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x2c(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x7343d0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,-0x4c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 404520 <__kmpc_for_static_init_4@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x30(%RBP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x2c(%RBP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %ESI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EAX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 434084 <calc_dt_kernel_module_mp_calc_dt_kernel_.DIR.OMP.PARALLEL.2+0x134> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVSD 0xc2a8c(%RIP),%XMM10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD %XMM10,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x7343f0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x4c(%RBP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 404110 <__kmpc_for_static_fini@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x68(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x78d1a0,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x88(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x734410,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x433f40,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x1,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x8,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 404710 <__kmpc_reduce@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD $0x10,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 434066 <calc_dt_kernel_module_mp_calc_dt_kernel_.DIR.OMP.PARALLEL.2+0x116> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVSD -0x88(%RBP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMINSD (%RAX),%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVSD %XMM0,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x78d1a0,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x734430,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 404880 <__kmpc_end_reduce@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x68(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x734450,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4045e0 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x188,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
MOV 0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xa8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD (%RAX),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %R8D,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %EBX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x2(%R15),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CLTQ | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
MOV %RAX,-0x138(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x180(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x1(%RCX),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP $0x2,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x1,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVGE %EAX,%ECX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
AND $0x7ffffffc,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RCX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD %R12D,%RDX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
LEA -0x2(%RDX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0x110(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD %R15D,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV %R8,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%R8,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x3,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SUB %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x3,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RCX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x18,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RDX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x10,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RDX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x2,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RCX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD $-0x2,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RDI,%RAX,1),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x10,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,-0xc8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R9,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDI,-0x120(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RCX,%RAX,1),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x10,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDX,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R9,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,-0xf8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RCX,%RAX,1),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x10,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDX,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R9,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RCX,%RAX,1),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x10,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDX,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R9,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,-0xe8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RCX,%RAX,1),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x10,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R9,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,-0xe0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R9,-0x100(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD $0x10,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,-0x1b0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x18(%RDI,%RAX,1),%R9 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R9,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x18(%RCX,%RAX,1),%R9 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R9,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x18(%RDX,%RAX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RDI,%R8,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0xd8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RCX,%R8,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0xd0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RDX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8,-0x108(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0xc283f(%RIP),%XMM10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDDUP 0xbf46f(%RIP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDDUP 0xbe167(%RIP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VBROADCASTSD 0xbe15e(%RIP),%YMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VBROADCASTSD 0xbf455(%RIP),%YMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %ESI,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RSI,-0x188(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 434281 <calc_dt_kernel_module_mp_calc_dt_kernel_.DIR.OMP.PARALLEL.2+0x331> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼calc_dt_kernel_.DIR.OMP.PARALLEL.2– | 4.54 | 1.46 |
▼Loop 251 - calc_dt_kernel.f90:92-129 - exec– | 0 | 0 |
○Loop 253 - calc_dt_kernel.f90:92-129 - exec | 4.54 | 1.45 |
○Loop 252 - calc_dt_kernel.f90:94-129 - exec | 0 | 0 |