Function: __pack_kernel_module_MOD_clover_pack_message_right._omp_fn.0.lto_priv.0 | Module: exec | Source: pack_kernel.f90:155-160 | Coverage: 0.03% |
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Function: __pack_kernel_module_MOD_clover_pack_message_right._omp_fn.0.lto_priv.0 | Module: exec | Source: pack_kernel.f90:155-160 | Coverage: 0.03% |
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/home/eoseret/qaas_runs_CPU_9468/171-137-7698/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/pack_kernel.f90: 155 - 160 |
-------------------------------------------------------------------------------- |
155: !$OMP PARALLEL DO PRIVATE(index) |
156: DO k=y_min-depth,y_max+y_inc+depth |
157: !$OMP SIMD |
158: DO j=1,depth |
159: index= buffer_offset + j+(k+depth-1)*depth |
160: right_snd_buffer(index)=field(x_max+1-j,k) |
0x42a2b0 PUSH %RBP |
0x42a2b1 MOV %RSP,%RBP |
0x42a2b4 PUSH %R15 |
0x42a2b6 PUSH %R14 |
0x42a2b8 PUSH %R13 |
0x42a2ba PUSH %R12 |
0x42a2bc PUSH %RBX |
0x42a2bd SUB $0xa8,%RSP |
0x42a2c4 MOV %RDI,-0x38(%RBP) |
0x42a2c8 MOV 0x28(%RDI),%RDX |
0x42a2cc MOV 0x48(%RDI),%RAX |
0x42a2d0 MOV 0x54(%RDI),%R12D |
0x42a2d4 MOV 0x40(%RDI),%RBX |
0x42a2d8 MOV 0x30(%RDI),%R14 |
0x42a2dc MOV 0x20(%RDI),%R15 |
0x42a2e0 MOV %RDX,-0x80(%RBP) |
0x42a2e4 MOV %RAX,-0x40(%RBP) |
0x42a2e8 CALL 402080 <@plt_start@+0x60> |
0x42a2ed MOV %EAX,%R13D |
0x42a2f0 CALL 402180 <@plt_start@+0x160> |
0x42a2f5 MOV -0x38(%RBP),%RSI |
0x42a2f9 MOV %EAX,%ECX |
0x42a2fb MOV 0x58(%RSI),%EAX |
0x42a2fe INC %EAX |
0x42a300 SUB %R12D,%EAX |
0x42a303 CLTD |
0x42a304 IDIV %R13D |
0x42a307 CMP %EDX,%ECX |
0x42a309 JL 42a7c4 |
0x42a30f IMUL %EAX,%ECX |
0x42a312 ADD %EDX,%ECX |
0x42a314 ADD %ECX,%EAX |
0x42a316 CMP %EAX,%ECX |
0x42a318 JGE 42a7a0 |
0x42a31e ADD %R12D,%EAX |
0x42a321 LEA (%R12,%RCX,1),%EDI |
0x42a325 MOV 0x8(%RSI),%R8 |
0x42a329 MOV 0x10(%RSI),%R9 |
0x42a32d KXORB %K0,%K0,%K0 |
0x42a331 MOVSXD %EDI,%RCX |
0x42a334 MOV (%RSI),%R10 |
0x42a337 MOV 0x18(%RSI),%R13 |
0x42a33b MOV %EAX,-0x8c(%RBP) |
0x42a341 MOV -0x80(%RBP),%RAX |
0x42a345 MOV (%R8),%R12D |
0x42a348 MOV %R9,-0x98(%RBP) |
0x42a34f MOV %EDI,-0x48(%RBP) |
0x42a352 MOV 0x38(%RSI),%R11 |
0x42a356 IMUL %RAX,%RCX |
0x42a35a MOV %R10,-0xa0(%RBP) |
0x42a361 MOV %RBX,%RAX |
0x42a364 MOV %R12D,%EDX |
0x42a367 SAL $0x5,%RAX |
0x42a36b SHR $0x2,%EDX |
0x42a36e MOV %R12D,-0x44(%RBP) |
0x42a372 MOV %RAX,-0x70(%RBP) |
0x42a376 MOV %R12D,%EAX |
0x42a379 LEA (%RCX,%R14,1),%R9 |
0x42a37d LEA -0x1(%R12),%R14D |
0x42a382 AND $-0x4,%EAX |
0x42a385 MOV %EDX,-0x54(%RBP) |
0x42a388 LEA (%RDI,%R14,1),%R10D |
0x42a38c MOV %R15,%RDI |
0x42a38f MOV %R14D,-0xa4(%RBP) |
0x42a396 MOV %RBX,%RDX |
0x42a399 NEG %RDI |
0x42a39c LEA (,%RBX,8),%R14 |
0x42a3a4 SAL $0x4,%RDX |
0x42a3a8 MOV %EAX,-0xa8(%RBP) |
0x42a3ae LEA (,%RDI,8),%RCX |
0x42a3b6 MOV %RDI,%R8 |
0x42a3b9 INC %EAX |
0x42a3bb SAL $0x4,%RDI |
0x42a3bf MOV %RCX,-0x50(%RBP) |
0x42a3c3 IMUL %R12D,%R10D |
0x42a3c7 LEA (%RBX,%RBX,2),%RCX |
0x42a3cb SAL $0x5,%R8 |
0x42a3cf SAL $0x3,%RCX |
0x42a3d3 MOV %R14,-0x88(%RBP) |
0x42a3da XOR %R14D,%R14D |
0x42a3dd TEST %R12D,%R12D |
0x42a3e0 CMOVNS %R12D,%R14D |
0x42a3e4 MOV %RDX,-0x68(%RBP) |
0x42a3e8 MOV $0x1,%R12D |
0x42a3ee MOV %RCX,-0x78(%RBP) |
0x42a3f2 KMOVB %R12D,%K1 |
0x42a3f7 INC %R14D |
0x42a3fa MOV %EAX,-0xc0(%RBP) |
0x42a400 MOV %RDI,-0x60(%RBP) |
0x42a404 MOV %R14D,-0x90(%RBP) |
0x42a40b MOV -0x40(%RBP),%R14 |
0x42a40f MOV %RSI,-0xc8(%RBP) |
0x42a416 MOV %R13,%RSI |
0x42a419 NOPL (%RAX) |
(185) 0x42a420 MOV -0x44(%RBP),%R13D |
(185) 0x42a424 TEST %R13D,%R13D |
(185) 0x42a427 JLE 42a74c |
(185) 0x42a42d MOV -0xa0(%RBP),%RCX |
(185) 0x42a434 MOV -0x98(%RBP),%RDI |
(185) 0x42a43b CMPL $0x2,-0xa4(%RBP) |
(185) 0x42a442 MOV (%RCX),%R13D |
(185) 0x42a445 MOV (%RDI),%EDX |
(185) 0x42a447 LEA 0x1(%R13),%EAX |
(185) 0x42a44b MOV %EDX,-0x38(%RBP) |
(185) 0x42a44e MOV %EAX,-0x40(%RBP) |
(185) 0x42a451 JBE 42a7b8 |
(185) 0x42a457 MOVSXD %EDX,%RDI |
(185) 0x42a45a MOVSXD %R10D,%RCX |
(185) 0x42a45d MOVSXD %R13D,%R12 |
(185) 0x42a460 MOV -0x50(%RBP),%RAX |
(185) 0x42a464 IMUL %R15,%R12 |
(185) 0x42a468 LEA 0x1(%RDI,%RCX,1),%RDX |
(185) 0x42a46d MOV -0x54(%RBP),%EDI |
(185) 0x42a470 IMUL %RBX,%RDX |
(185) 0x42a474 ADD %R9,%R12 |
(185) 0x42a477 LEA (%RSI,%R12,8),%R12 |
(185) 0x42a47b ADD %R14,%RDX |
(185) 0x42a47e LEA (%R12,%RAX,1),%RCX |
(185) 0x42a482 MOV %R12,-0xb0(%RBP) |
(185) 0x42a489 LEA (%R11,%RDX,8),%RDX |
(185) 0x42a48d XOR %EAX,%EAX |
(185) 0x42a48f AND $0x3,%EDI |
(185) 0x42a492 JE 42a57f |
(185) 0x42a498 CMP $0x1,%EDI |
(185) 0x42a49b JE 42a533 |
(185) 0x42a4a1 CMP $0x2,%EDI |
(185) 0x42a4a4 JE 42a4f0 |
(185) 0x42a4a6 MOV -0xb0(%RBP),%RAX |
(185) 0x42a4ad MOV -0x60(%RBP),%RDI |
(185) 0x42a4b1 ADD %R8,%R12 |
(185) 0x42a4b4 VMOVSD (%RCX),%XMM2 |
(185) 0x42a4b8 VMOVSD (%RAX,%RDI,1),%XMM1 |
(185) 0x42a4bd VMOVSD (%RCX,%RDI,1),%XMM0 |
(185) 0x42a4c2 ADD %R8,%RCX |
(185) 0x42a4c5 VMOVSD (%RAX),%XMM3 |
(185) 0x42a4c9 MOV -0x78(%RBP),%RDI |
(185) 0x42a4cd MOV -0x68(%RBP),%RAX |
(185) 0x42a4d1 VMOVSD %XMM3,(%RDX) |
(185) 0x42a4d5 VMOVSD %XMM2,(%RDX,%RBX,8) |
(185) 0x42a4da VMOVSD %XMM1,(%RDX,%RAX,1) |
(185) 0x42a4df MOV $0x1,%EAX |
(185) 0x42a4e4 VMOVSD %XMM0,(%RDX,%RDI,1) |
(185) 0x42a4e9 MOV -0x70(%RBP),%RDI |
(185) 0x42a4ed ADD %RDI,%RDX |
(185) 0x42a4f0 MOV -0x60(%RBP),%RDI |
(185) 0x42a4f4 VMOVSD (%R12),%XMM4 |
(185) 0x42a4fa INC %EAX |
(185) 0x42a4fc VMOVSD (%RCX),%XMM5 |
(185) 0x42a500 VMOVSD (%R12,%RDI,1),%XMM6 |
(185) 0x42a506 VMOVSD (%RCX,%RDI,1),%XMM7 |
(185) 0x42a50b VMOVSD %XMM4,(%RDX) |
(185) 0x42a50f ADD %R8,%R12 |
(185) 0x42a512 MOV -0x68(%RBP),%RDI |
(185) 0x42a516 VMOVSD %XMM5,(%RDX,%RBX,8) |
(185) 0x42a51b ADD %R8,%RCX |
(185) 0x42a51e VMOVSD %XMM6,(%RDX,%RDI,1) |
(185) 0x42a523 MOV -0x78(%RBP),%RDI |
(185) 0x42a527 VMOVSD %XMM7,(%RDX,%RDI,1) |
(185) 0x42a52c MOV -0x70(%RBP),%RDI |
(185) 0x42a530 ADD %RDI,%RDX |
(185) 0x42a533 MOV -0x60(%RBP),%RDI |
(185) 0x42a537 VMOVSD (%R12),%XMM8 |
(185) 0x42a53d INC %EAX |
(185) 0x42a53f VMOVSD (%RCX),%XMM9 |
(185) 0x42a543 VMOVSD (%R12,%RDI,1),%XMM10 |
(185) 0x42a549 VMOVSD (%RCX,%RDI,1),%XMM11 |
(185) 0x42a54e VMOVSD %XMM8,(%RDX) |
(185) 0x42a552 ADD %R8,%R12 |
(185) 0x42a555 MOV -0x68(%RBP),%RDI |
(185) 0x42a559 VMOVSD %XMM9,(%RDX,%RBX,8) |
(185) 0x42a55e ADD %R8,%RCX |
(185) 0x42a561 VMOVSD %XMM10,(%RDX,%RDI,1) |
(185) 0x42a566 MOV -0x78(%RBP),%RDI |
(185) 0x42a56a VMOVSD %XMM11,(%RDX,%RDI,1) |
(185) 0x42a56f MOV -0x70(%RBP),%RDI |
(185) 0x42a573 ADD %RDI,%RDX |
(185) 0x42a576 CMP %EAX,-0x54(%RBP) |
(185) 0x42a579 JE 42a691 |
(185) 0x42a57f MOV %RSI,-0xb0(%RBP) |
(185) 0x42a586 MOV -0x60(%RBP),%RDI |
(185) 0x42a58a MOV %R9,-0xb8(%RBP) |
(185) 0x42a591 MOV -0x68(%RBP),%RSI |
(185) 0x42a595 MOV %R10D,-0xbc(%RBP) |
(185) 0x42a59c MOV -0x70(%RBP),%R9 |
(185) 0x42a5a0 MOV -0x78(%RBP),%R10 |
(186) 0x42a5a4 VMOVSD (%R12),%XMM12 |
(186) 0x42a5aa VMOVSD (%RCX),%XMM13 |
(186) 0x42a5ae ADD $0x4,%EAX |
(186) 0x42a5b1 VMOVSD (%R12,%RDI,1),%XMM14 |
(186) 0x42a5b7 VMOVSD (%RCX,%RDI,1),%XMM15 |
(186) 0x42a5bc ADD %R8,%R12 |
(186) 0x42a5bf ADD %R8,%RCX |
(186) 0x42a5c2 VMOVSD %XMM12,(%RDX) |
(186) 0x42a5c6 VMOVSD %XMM13,(%RDX,%RBX,8) |
(186) 0x42a5cb VMOVSD %XMM14,(%RDX,%RSI,1) |
(186) 0x42a5d0 VMOVSD %XMM15,(%RDX,%R10,1) |
(186) 0x42a5d6 ADD %R9,%RDX |
(186) 0x42a5d9 VMOVSD (%R12),%XMM3 |
(186) 0x42a5df VMOVSD (%RCX),%XMM2 |
(186) 0x42a5e3 VMOVSD (%R12,%RDI,1),%XMM1 |
(186) 0x42a5e9 VMOVSD (%RCX,%RDI,1),%XMM0 |
(186) 0x42a5ee ADD %R8,%R12 |
(186) 0x42a5f1 ADD %R8,%RCX |
(186) 0x42a5f4 VMOVSD %XMM3,(%RDX) |
(186) 0x42a5f8 VMOVSD %XMM2,(%RDX,%RBX,8) |
(186) 0x42a5fd VMOVSD %XMM1,(%RDX,%RSI,1) |
(186) 0x42a602 VMOVSD %XMM0,(%RDX,%R10,1) |
(186) 0x42a608 ADD %R9,%RDX |
(186) 0x42a60b VMOVSD (%R12),%XMM4 |
(186) 0x42a611 VMOVSD (%RCX),%XMM5 |
(186) 0x42a615 VMOVSD (%R12,%RDI,1),%XMM6 |
(186) 0x42a61b VMOVSD (%RCX,%RDI,1),%XMM7 |
(186) 0x42a620 ADD %R8,%R12 |
(186) 0x42a623 ADD %R8,%RCX |
(186) 0x42a626 VMOVSD %XMM4,(%RDX) |
(186) 0x42a62a VMOVSD %XMM5,(%RDX,%RBX,8) |
(186) 0x42a62f VMOVSD %XMM6,(%RDX,%RSI,1) |
(186) 0x42a634 VMOVSD %XMM7,(%RDX,%R10,1) |
(186) 0x42a63a ADD %R9,%RDX |
(186) 0x42a63d VMOVSD (%R12),%XMM8 |
(186) 0x42a643 VMOVSD (%RCX),%XMM9 |
(186) 0x42a647 VMOVSD (%R12,%RDI,1),%XMM10 |
(186) 0x42a64d VMOVSD (%RCX,%RDI,1),%XMM11 |
(186) 0x42a652 ADD %R8,%R12 |
(186) 0x42a655 ADD %R8,%RCX |
(186) 0x42a658 VMOVSD %XMM8,(%RDX) |
(186) 0x42a65c VMOVSD %XMM9,(%RDX,%RBX,8) |
(186) 0x42a661 VMOVSD %XMM10,(%RDX,%RSI,1) |
(186) 0x42a666 VMOVSD %XMM11,(%RDX,%R10,1) |
(186) 0x42a66c ADD %R9,%RDX |
(186) 0x42a66f CMP %EAX,-0x54(%RBP) |
(186) 0x42a672 JNE 42a5a4 |
(185) 0x42a678 MOV -0xb0(%RBP),%RSI |
(185) 0x42a67f MOV -0xb8(%RBP),%R9 |
(185) 0x42a686 MOV %RDI,-0x60(%RBP) |
(185) 0x42a68a MOV -0xbc(%RBP),%R10D |
(185) 0x42a691 MOV -0xa8(%RBP),%R12D |
(185) 0x42a698 MOV -0x44(%RBP),%EDX |
(185) 0x42a69b CMP %EDX,%R12D |
(185) 0x42a69e JE 42a74c |
(185) 0x42a6a4 MOV -0xc0(%RBP),%EAX |
(185) 0x42a6aa MOV %R12D,%EDX |
(185) 0x42a6ad MOV -0x44(%RBP),%R12D |
(185) 0x42a6b1 SUB %EDX,%R12D |
(185) 0x42a6b4 CMP $0x1,%R12D |
(185) 0x42a6b8 JE 42a71c |
(185) 0x42a6ba MOVSXD %R13D,%RCX |
(185) 0x42a6bd MOV -0x50(%RBP),%R13 |
(185) 0x42a6c1 MOVSXD %R10D,%RDI |
(185) 0x42a6c4 IMUL %R15,%RCX |
(185) 0x42a6c8 IMUL %RDX,%R13 |
(185) 0x42a6cc IMUL %RBX,%RDX |
(185) 0x42a6d0 ADD %R9,%RCX |
(185) 0x42a6d3 LEA (%R13,%RCX,8),%RCX |
(185) 0x42a6d8 MOVSXD -0x38(%RBP),%R13 |
(185) 0x42a6dc ADD %RSI,%RCX |
(185) 0x42a6df LEA 0x1(%R13,%RDI,1),%R13 |
(185) 0x42a6e4 MOV -0x50(%RBP),%RDI |
(185) 0x42a6e8 VMOVSD (%RCX),%XMM12 |
(185) 0x42a6ec IMUL %RBX,%R13 |
(185) 0x42a6f0 VMOVSD (%RCX,%RDI,1),%XMM13 |
(185) 0x42a6f5 MOV -0x88(%RBP),%RCX |
(185) 0x42a6fc ADD %R14,%R13 |
(185) 0x42a6ff ADD %RDX,%R13 |
(185) 0x42a702 LEA (%R11,%R13,8),%RDX |
(185) 0x42a706 VMOVSD %XMM12,(%RDX) |
(185) 0x42a70a VMOVSD %XMM13,(%RDX,%RCX,1) |
(185) 0x42a70f TEST $0x1,%R12B |
(185) 0x42a713 JE 42a74c |
(185) 0x42a715 AND $-0x2,%R12D |
(185) 0x42a719 ADD %R12D,%EAX |
(185) 0x42a71c MOV -0x40(%RBP),%R12D |
(185) 0x42a720 MOV -0x38(%RBP),%EDX |
(185) 0x42a723 SUB %EAX,%R12D |
(185) 0x42a726 ADD %EAX,%EDX |
(185) 0x42a728 MOVSXD %R12D,%R13 |
(185) 0x42a72b MOV %EDX,%EAX |
(185) 0x42a72d IMUL %R15,%R13 |
(185) 0x42a731 ADD %R10D,%EAX |
(185) 0x42a734 CLTQ |
(185) 0x42a736 IMUL %RBX,%RAX |
(185) 0x42a73a ADD %R9,%R13 |
(185) 0x42a73d VMOVSD (%RSI,%R13,8),%XMM14 |
(185) 0x42a743 ADD %R14,%RAX |
(185) 0x42a746 VMOVSD %XMM14,(%R11,%RAX,8) |
(185) 0x42a74c MOV -0x44(%RBP),%ECX |
(185) 0x42a74f MOV -0x58(%RBP),%EDI |
(185) 0x42a752 KMOVB %K0,%R12D |
(185) 0x42a756 KMOVB %K1,%R13D |
(185) 0x42a75a MOV -0x80(%RBP),%RAX |
(185) 0x42a75e TEST %ECX,%ECX |
(185) 0x42a760 CMOVNS -0x90(%RBP),%EDI |
(185) 0x42a767 CMOVNS %R13D,%R12D |
(185) 0x42a76b INCL -0x48(%RBP) |
(185) 0x42a76e ADD %RAX,%R9 |
(185) 0x42a771 ADD %ECX,%R10D |
(185) 0x42a774 MOV %EDI,-0x58(%RBP) |
(185) 0x42a777 KMOVB %R12D,%K0 |
(185) 0x42a77c MOV -0x48(%RBP),%EDX |
(185) 0x42a77f CMP %EDX,-0x8c(%RBP) |
(185) 0x42a785 JG 42a420 |
0x42a78b MOV -0xc8(%RBP),%RBX |
0x42a792 KORTESTB %K0,%K0 |
0x42a796 JE 42a7a0 |
0x42a798 MOV -0x58(%RBP),%R15D |
0x42a79c MOV %R15D,0x50(%RBX) |
0x42a7a0 ADD $0xa8,%RSP |
0x42a7a7 POP %RBX |
0x42a7a8 POP %R12 |
0x42a7aa POP %R13 |
0x42a7ac POP %R14 |
0x42a7ae POP %R15 |
0x42a7b0 POP %RBP |
0x42a7b1 RET |
0x42a7b2 NOPW (%RAX,%RAX,1) |
(185) 0x42a7b8 XOR %EDX,%EDX |
(185) 0x42a7ba MOV $0x1,%EAX |
(185) 0x42a7bf JMP 42a6ad |
0x42a7c4 INC %EAX |
0x42a7c6 XOR %EDX,%EDX |
0x42a7c8 JMP 42a30f |
0x42a7cd NOPL (%RAX) |
Path / |
Source file and lines | pack_kernel.f90:155-160 |
Module | exec |
nb instructions | 112 |
nb uops | 117 |
loop length | 425 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 21 |
micro-operation queue | 19.50 cycles |
front end | 19.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 8.20 | 8.20 | 8.33 | 8.33 | 14.50 | 8.20 | 8.20 | 14.50 | 14.50 | 14.50 | 8.20 | 8.33 |
cycles | 8.20 | 10.13 | 8.33 | 8.33 | 14.50 | 8.20 | 8.20 | 14.50 | 14.50 | 14.50 | 8.20 | 8.33 |
Cycles executing div or sqrt instructions | 6.00 |
FE+BE cycles | 19.17-19.19 |
Stall cycles | 0.00 |
Front-end | 19.50 |
Dispatch | 14.50 |
DIV/SQRT | 6.00 |
Overall L1 | 19.50 |
all | 0% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 9% |
load | 11% |
store | 9% |
mul | 6% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 7% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0xa8,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDI,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x54(%RDI),%R12D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RDI),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RDI),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 402080 <@plt_start@+0x60> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 402180 <@plt_start@+0x160> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x38(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x58(%RSI),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %R12D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R13D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
CMP %EDX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 42a7c4 <__pack_kernel_module_MOD_clover_pack_message_right._omp_fn.0.lto_priv.0+0x514> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %EAX,%ECX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %ECX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 42a7a0 <__pack_kernel_module_MOD_clover_pack_message_right._omp_fn.0.lto_priv.0+0x4f0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %R12D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%R12,%RCX,1),%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV 0x8(%RSI),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RSI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
KXORB %K0,%K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOVSXD %EDI,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV (%RSI),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RSI),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,-0x8c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x80(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8),%R12D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RSI),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RAX,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R10,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R12D,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x5,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SHR $0x2,%EDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R12D,-0x44(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (%RCX,%R14,1),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x1(%R12),%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
AND $-0x4,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDX,-0x54(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RDI,%R14,1),%R10D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R14D,-0xa4(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NEG %RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (,%RBX,8),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x4,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %EAX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%RDI,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDI,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SAL $0x4,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RCX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R12D,%R10D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%RBX,%RBX,2),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x5,%R8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SAL $0x3,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R14,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %R14D,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
TEST %R12D,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
CMOVNS %R12D,%R14D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RDX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x1,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
KMOVB %R12D,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
INC %R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EAX,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R14D,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x40(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,-0xc8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xc8(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
KORTESTB %K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JE 42a7a0 <__pack_kernel_module_MOD_clover_pack_message_right._omp_fn.0.lto_priv.0+0x4f0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x58(%RBP),%R15D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R15D,0x50(%RBX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD $0xa8,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 42a30f <__pack_kernel_module_MOD_clover_pack_message_right._omp_fn.0.lto_priv.0+0x5f> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | pack_kernel.f90:155-160 |
Module | exec |
nb instructions | 112 |
nb uops | 117 |
loop length | 425 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 21 |
micro-operation queue | 19.50 cycles |
front end | 19.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 8.20 | 8.20 | 8.33 | 8.33 | 14.50 | 8.20 | 8.20 | 14.50 | 14.50 | 14.50 | 8.20 | 8.33 |
cycles | 8.20 | 10.13 | 8.33 | 8.33 | 14.50 | 8.20 | 8.20 | 14.50 | 14.50 | 14.50 | 8.20 | 8.33 |
Cycles executing div or sqrt instructions | 6.00 |
FE+BE cycles | 19.17-19.19 |
Stall cycles | 0.00 |
Front-end | 19.50 |
Dispatch | 14.50 |
DIV/SQRT | 6.00 |
Overall L1 | 19.50 |
all | 0% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 9% |
load | 11% |
store | 9% |
mul | 6% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 7% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0xa8,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDI,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x54(%RDI),%R12D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RDI),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RDI),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 402080 <@plt_start@+0x60> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 402180 <@plt_start@+0x160> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x38(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x58(%RSI),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %R12D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R13D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
CMP %EDX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 42a7c4 <__pack_kernel_module_MOD_clover_pack_message_right._omp_fn.0.lto_priv.0+0x514> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %EAX,%ECX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %ECX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 42a7a0 <__pack_kernel_module_MOD_clover_pack_message_right._omp_fn.0.lto_priv.0+0x4f0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %R12D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%R12,%RCX,1),%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV 0x8(%RSI),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RSI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
KXORB %K0,%K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOVSXD %EDI,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV (%RSI),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RSI),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,-0x8c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x80(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8),%R12D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RSI),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RAX,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R10,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R12D,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x5,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SHR $0x2,%EDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R12D,-0x44(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (%RCX,%R14,1),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x1(%R12),%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
AND $-0x4,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDX,-0x54(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RDI,%R14,1),%R10D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R14D,-0xa4(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NEG %RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (,%RBX,8),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x4,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %EAX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%RDI,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDI,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SAL $0x4,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RCX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R12D,%R10D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%RBX,%RBX,2),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x5,%R8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SAL $0x3,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R14,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %R14D,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
TEST %R12D,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
CMOVNS %R12D,%R14D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RDX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x1,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
KMOVB %R12D,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
INC %R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EAX,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R14D,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x40(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,-0xc8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xc8(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
KORTESTB %K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JE 42a7a0 <__pack_kernel_module_MOD_clover_pack_message_right._omp_fn.0.lto_priv.0+0x4f0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x58(%RBP),%R15D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R15D,0x50(%RBX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD $0xa8,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 42a30f <__pack_kernel_module_MOD_clover_pack_message_right._omp_fn.0.lto_priv.0+0x5f> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼__pack_kernel_module_MOD_clover_pack_message_right._omp_fn.0.lto_priv.0– | 0.03 | 0.01 |
▼Loop 185 - pack_kernel.f90:157-160 - exec– | 0.03 | 0.02 |
○Loop 186 - pack_kernel.f90:160-160 - exec | 0 | 0 |