Function: __pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0 | Module: exec | Source: pack_kernel.f90:61-66 | Coverage: 0.03% |
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Function: __pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0 | Module: exec | Source: pack_kernel.f90:61-66 | Coverage: 0.03% |
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/home/eoseret/qaas_runs_CPU_9468/171-137-7698/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/pack_kernel.f90: 61 - 66 |
-------------------------------------------------------------------------------- |
61: !$OMP PARALLEL DO PRIVATE(index) |
62: DO k=y_min-depth,y_max+y_inc+depth |
63: !$OMP SIMD |
64: DO j=1,depth |
65: index= buffer_offset + j+(k+depth-1)*depth |
66: left_snd_buffer(index)=field(x_min+x_inc-1+j,k) |
0x42acd0 PUSH %RBP |
0x42acd1 MOV %RSP,%RBP |
0x42acd4 PUSH %R15 |
0x42acd6 PUSH %R14 |
0x42acd8 PUSH %R13 |
0x42acda PUSH %R12 |
0x42acdc PUSH %RBX |
0x42acdd SUB $0xa8,%RSP |
0x42ace4 MOV %RDI,-0x38(%RBP) |
0x42ace8 MOV 0x30(%RDI),%RDX |
0x42acec MOV 0x54(%RDI),%EAX |
0x42acef MOV 0x28(%RDI),%RCX |
0x42acf3 MOV 0x58(%RDI),%R13D |
0x42acf7 MOV 0x48(%RDI),%R15 |
0x42acfb MOV 0x40(%RDI),%R12 |
0x42acff MOV %RDX,-0x48(%RBP) |
0x42ad03 MOV %RCX,-0x70(%RBP) |
0x42ad07 MOV 0x20(%RDI),%RBX |
0x42ad0b MOV %EAX,-0x8c(%RBP) |
0x42ad11 CALL 402080 <@plt_start@+0x60> |
0x42ad16 MOV %EAX,%R14D |
0x42ad19 CALL 402180 <@plt_start@+0x160> |
0x42ad1e MOV -0x38(%RBP),%R11 |
0x42ad22 MOV %EAX,%ESI |
0x42ad24 MOV 0x5c(%R11),%EAX |
0x42ad28 INC %EAX |
0x42ad2a SUB %R13D,%EAX |
0x42ad2d CLTD |
0x42ad2e IDIV %R14D |
0x42ad31 CMP %EDX,%ESI |
0x42ad33 JL 42b1dc |
0x42ad39 IMUL %EAX,%ESI |
0x42ad3c ADD %EDX,%ESI |
0x42ad3e ADD %ESI,%EAX |
0x42ad40 CMP %EAX,%ESI |
0x42ad42 JGE 42b1bd |
0x42ad48 MOV 0x8(%R11),%R8 |
0x42ad4c LEA (%R13,%RSI,1),%EDI |
0x42ad51 MOV -0x70(%RBP),%RSI |
0x42ad55 ADD %R13D,%EAX |
0x42ad58 KXORB %K0,%K0,%K0 |
0x42ad5c MOVSXD %EDI,%RCX |
0x42ad5f MOV 0x10(%R11),%R9 |
0x42ad63 MOV (%R11),%R10 |
0x42ad66 MOV %EAX,-0x84(%RBP) |
0x42ad6c MOV (%R8),%R13D |
0x42ad6f IMUL %RSI,%RCX |
0x42ad73 MOV -0x48(%RBP),%R8 |
0x42ad77 MOV %R12,%RSI |
0x42ad7a MOV %R9,-0x98(%RBP) |
0x42ad81 SAL $0x5,%RSI |
0x42ad85 MOV 0x38(%R11),%R14 |
0x42ad89 LEA -0x1(%R13),%EAX |
0x42ad8d MOV %R13D,%EDX |
0x42ad90 MOV %EDI,-0x40(%RBP) |
0x42ad93 LEA (%RDI,%RAX,1),%R9D |
0x42ad97 SHR $0x2,%EDX |
0x42ad9a MOV %EAX,-0x90(%RBP) |
0x42ada0 LEA (,%R12,8),%RAX |
0x42ada8 ADD %RCX,%R8 |
0x42adab MOV %EDX,-0x4c(%RBP) |
0x42adae LEA (,%RBX,8),%RCX |
0x42adb6 MOV %RBX,%RDX |
0x42adb9 MOV %RAX,-0x80(%RBP) |
0x42adbd MOV %R13D,%EAX |
0x42adc0 SAL $0x4,%RDX |
0x42adc4 MOV %RBX,%RDI |
0x42adc7 AND $-0x4,%EAX |
0x42adca MOV %RCX,-0x78(%RBP) |
0x42adce MOV %R12,%RCX |
0x42add1 SAL $0x5,%RDI |
0x42add5 MOV %RSI,-0x60(%RBP) |
0x42add9 IMUL %R13D,%R9D |
0x42addd LEA (%R12,%R12,2),%RSI |
0x42ade1 SAL $0x4,%RCX |
0x42ade5 SAL $0x3,%RSI |
0x42ade9 MOV %RDX,-0xb0(%RBP) |
0x42adf0 XOR %EDX,%EDX |
0x42adf2 MOV %EAX,-0xb4(%RBP) |
0x42adf8 INC %EAX |
0x42adfa TEST %R13D,%R13D |
0x42adfd CMOVNS %R13D,%EDX |
0x42ae01 MOV %RCX,-0x58(%RBP) |
0x42ae05 MOV %RSI,-0x68(%RBP) |
0x42ae09 INC %EDX |
0x42ae0b MOV %EAX,-0xc4(%RBP) |
0x42ae11 MOV %EDX,-0x88(%RBP) |
0x42ae17 MOV %RDI,-0x48(%RBP) |
0x42ae1b MOV %R11,-0xd0(%RBP) |
0x42ae22 MOV %R10,-0xa0(%RBP) |
0x42ae29 MOV 0x18(%R11),%R10 |
0x42ae2d MOV %R13D,-0x3c(%RBP) |
0x42ae31 MOV $0x1,%R13D |
0x42ae37 KMOVB %R13D,%K1 |
0x42ae3c NOPL (%RAX) |
(189) 0x42ae40 MOV -0x3c(%RBP),%R11D |
(189) 0x42ae44 TEST %R11D,%R11D |
(189) 0x42ae47 JLE 42b167 |
(189) 0x42ae4d MOV -0xa0(%RBP),%RCX |
(189) 0x42ae54 MOV -0x8c(%RBP),%R11D |
(189) 0x42ae5b MOV -0x98(%RBP),%RDI |
(189) 0x42ae62 ADD (%RCX),%R11D |
(189) 0x42ae65 CMPL $0x2,-0x90(%RBP) |
(189) 0x42ae6c LEA -0x1(%R11),%ESI |
(189) 0x42ae70 MOV (%RDI),%R13D |
(189) 0x42ae73 MOV %ESI,-0x38(%RBP) |
(189) 0x42ae76 JBE 42b1d0 |
(189) 0x42ae7c MOVSXD %R11D,%RDI |
(189) 0x42ae7f MOVSXD %R13D,%RCX |
(189) 0x42ae82 MOVSXD %R9D,%RDX |
(189) 0x42ae85 IMUL %RBX,%RDI |
(189) 0x42ae89 LEA 0x1(%RCX,%RDX,1),%RAX |
(189) 0x42ae8e XOR %ECX,%ECX |
(189) 0x42ae90 IMUL %R12,%RAX |
(189) 0x42ae94 ADD %R8,%RDI |
(189) 0x42ae97 LEA (%R10,%RDI,8),%RSI |
(189) 0x42ae9b MOV -0xb0(%RBP),%RDI |
(189) 0x42aea2 ADD %R15,%RAX |
(189) 0x42aea5 MOV %RSI,-0xa8(%RBP) |
(189) 0x42aeac LEA (%R14,%RAX,8),%RAX |
(189) 0x42aeb0 LEA (%RSI,%RDI,1),%RDX |
(189) 0x42aeb4 MOV -0x4c(%RBP),%EDI |
(189) 0x42aeb7 AND $0x3,%EDI |
(189) 0x42aeba JE 42afb0 |
(189) 0x42aec0 CMP $0x1,%EDI |
(189) 0x42aec3 JE 42af62 |
(189) 0x42aec9 CMP $0x2,%EDI |
(189) 0x42aecc JE 42af1d |
(189) 0x42aece MOV -0xa8(%RBP),%RCX |
(189) 0x42aed5 VMOVSD (%RDX),%XMM1 |
(189) 0x42aed9 MOV -0x58(%RBP),%RDI |
(189) 0x42aedd VMOVSD (%RDX,%RBX,8),%XMM0 |
(189) 0x42aee2 VMOVSD (%RCX),%XMM3 |
(189) 0x42aee6 VMOVSD (%RCX,%RBX,8),%XMM2 |
(189) 0x42aeeb MOV -0x68(%RBP),%RCX |
(189) 0x42aeef VMOVSD %XMM3,(%RAX) |
(189) 0x42aef3 VMOVSD %XMM2,(%RAX,%R12,8) |
(189) 0x42aef9 VMOVSD %XMM1,(%RAX,%RDI,1) |
(189) 0x42aefe MOV -0x48(%RBP),%RDI |
(189) 0x42af02 VMOVSD %XMM0,(%RAX,%RCX,1) |
(189) 0x42af07 MOV $0x1,%ECX |
(189) 0x42af0c ADD %RDI,%RSI |
(189) 0x42af0f MOV -0x60(%RBP),%RDI |
(189) 0x42af13 ADD %RDI,%RAX |
(189) 0x42af16 MOV -0x48(%RBP),%RDI |
(189) 0x42af1a ADD %RDI,%RDX |
(189) 0x42af1d VMOVSD (%RSI),%XMM4 |
(189) 0x42af21 VMOVSD (%RSI,%RBX,8),%XMM5 |
(189) 0x42af26 INC %ECX |
(189) 0x42af28 VMOVSD (%RDX),%XMM6 |
(189) 0x42af2c MOV -0x58(%RBP),%RDI |
(189) 0x42af30 VMOVSD (%RDX,%RBX,8),%XMM7 |
(189) 0x42af35 VMOVSD %XMM4,(%RAX) |
(189) 0x42af39 VMOVSD %XMM5,(%RAX,%R12,8) |
(189) 0x42af3f VMOVSD %XMM6,(%RAX,%RDI,1) |
(189) 0x42af44 MOV -0x68(%RBP),%RDI |
(189) 0x42af48 VMOVSD %XMM7,(%RAX,%RDI,1) |
(189) 0x42af4d MOV -0x48(%RBP),%RDI |
(189) 0x42af51 ADD %RDI,%RSI |
(189) 0x42af54 MOV -0x60(%RBP),%RDI |
(189) 0x42af58 ADD %RDI,%RAX |
(189) 0x42af5b MOV -0x48(%RBP),%RDI |
(189) 0x42af5f ADD %RDI,%RDX |
(189) 0x42af62 VMOVSD (%RSI),%XMM8 |
(189) 0x42af66 VMOVSD (%RSI,%RBX,8),%XMM9 |
(189) 0x42af6b INC %ECX |
(189) 0x42af6d VMOVSD (%RDX),%XMM10 |
(189) 0x42af71 MOV -0x58(%RBP),%RDI |
(189) 0x42af75 VMOVSD (%RDX,%RBX,8),%XMM11 |
(189) 0x42af7a VMOVSD %XMM8,(%RAX) |
(189) 0x42af7e VMOVSD %XMM9,(%RAX,%R12,8) |
(189) 0x42af84 VMOVSD %XMM10,(%RAX,%RDI,1) |
(189) 0x42af89 MOV -0x68(%RBP),%RDI |
(189) 0x42af8d VMOVSD %XMM11,(%RAX,%RDI,1) |
(189) 0x42af92 MOV -0x48(%RBP),%RDI |
(189) 0x42af96 ADD %RDI,%RSI |
(189) 0x42af99 MOV -0x60(%RBP),%RDI |
(189) 0x42af9d ADD %RDI,%RAX |
(189) 0x42afa0 MOV -0x48(%RBP),%RDI |
(189) 0x42afa4 ADD %RDI,%RDX |
(189) 0x42afa7 CMP %ECX,-0x4c(%RBP) |
(189) 0x42afaa JE 42b0be |
(189) 0x42afb0 MOV %R10,-0xa8(%RBP) |
(189) 0x42afb7 MOV -0x48(%RBP),%RDI |
(189) 0x42afbb MOV %R8,-0xc0(%RBP) |
(189) 0x42afc2 MOV -0x68(%RBP),%R10 |
(189) 0x42afc6 MOV %R9D,-0xb8(%RBP) |
(189) 0x42afcd MOV -0x58(%RBP),%R8 |
(189) 0x42afd1 MOV -0x60(%RBP),%R9 |
(190) 0x42afd5 VMOVSD (%RSI),%XMM12 |
(190) 0x42afd9 VMOVSD (%RSI,%RBX,8),%XMM13 |
(190) 0x42afde ADD %RDI,%RSI |
(190) 0x42afe1 ADD $0x4,%ECX |
(190) 0x42afe4 VMOVSD (%RDX),%XMM14 |
(190) 0x42afe8 VMOVSD (%RDX,%RBX,8),%XMM15 |
(190) 0x42afed ADD %RDI,%RDX |
(190) 0x42aff0 VMOVSD %XMM12,(%RAX) |
(190) 0x42aff4 VMOVSD %XMM13,(%RAX,%R12,8) |
(190) 0x42affa VMOVSD %XMM14,(%RAX,%R8,1) |
(190) 0x42b000 VMOVSD %XMM15,(%RAX,%R10,1) |
(190) 0x42b006 ADD %R9,%RAX |
(190) 0x42b009 VMOVSD (%RSI),%XMM3 |
(190) 0x42b00d VMOVSD (%RSI,%RBX,8),%XMM2 |
(190) 0x42b012 ADD %RDI,%RSI |
(190) 0x42b015 VMOVSD (%RDX),%XMM1 |
(190) 0x42b019 VMOVSD (%RDX,%RBX,8),%XMM0 |
(190) 0x42b01e ADD %RDI,%RDX |
(190) 0x42b021 VMOVSD %XMM3,(%RAX) |
(190) 0x42b025 VMOVSD %XMM2,(%RAX,%R12,8) |
(190) 0x42b02b VMOVSD %XMM1,(%RAX,%R8,1) |
(190) 0x42b031 VMOVSD %XMM0,(%RAX,%R10,1) |
(190) 0x42b037 ADD %R9,%RAX |
(190) 0x42b03a VMOVSD (%RSI),%XMM4 |
(190) 0x42b03e VMOVSD (%RSI,%RBX,8),%XMM5 |
(190) 0x42b043 ADD %RDI,%RSI |
(190) 0x42b046 VMOVSD (%RDX),%XMM6 |
(190) 0x42b04a VMOVSD (%RDX,%RBX,8),%XMM7 |
(190) 0x42b04f ADD %RDI,%RDX |
(190) 0x42b052 VMOVSD %XMM4,(%RAX) |
(190) 0x42b056 VMOVSD %XMM5,(%RAX,%R12,8) |
(190) 0x42b05c VMOVSD %XMM6,(%RAX,%R8,1) |
(190) 0x42b062 VMOVSD %XMM7,(%RAX,%R10,1) |
(190) 0x42b068 ADD %R9,%RAX |
(190) 0x42b06b VMOVSD (%RSI),%XMM8 |
(190) 0x42b06f VMOVSD (%RSI,%RBX,8),%XMM9 |
(190) 0x42b074 ADD %RDI,%RSI |
(190) 0x42b077 VMOVSD (%RDX),%XMM10 |
(190) 0x42b07b VMOVSD (%RDX,%RBX,8),%XMM11 |
(190) 0x42b080 ADD %RDI,%RDX |
(190) 0x42b083 VMOVSD %XMM8,(%RAX) |
(190) 0x42b087 VMOVSD %XMM9,(%RAX,%R12,8) |
(190) 0x42b08d VMOVSD %XMM10,(%RAX,%R8,1) |
(190) 0x42b093 VMOVSD %XMM11,(%RAX,%R10,1) |
(190) 0x42b099 ADD %R9,%RAX |
(190) 0x42b09c CMP %ECX,-0x4c(%RBP) |
(190) 0x42b09f JNE 42afd5 |
(189) 0x42b0a5 MOV -0xa8(%RBP),%R10 |
(189) 0x42b0ac MOV -0xc0(%RBP),%R8 |
(189) 0x42b0b3 MOV %RDI,-0x48(%RBP) |
(189) 0x42b0b7 MOV -0xb8(%RBP),%R9D |
(189) 0x42b0be MOV -0xb4(%RBP),%ESI |
(189) 0x42b0c4 MOV -0x3c(%RBP),%EAX |
(189) 0x42b0c7 CMP %EAX,%ESI |
(189) 0x42b0c9 JE 42b167 |
(189) 0x42b0cf MOV -0xc4(%RBP),%EAX |
(189) 0x42b0d5 MOV %ESI,%EDX |
(189) 0x42b0d7 MOV -0x3c(%RBP),%ECX |
(189) 0x42b0da SUB %EDX,%ECX |
(189) 0x42b0dc CMP $0x1,%ECX |
(189) 0x42b0df JE 42b13d |
(189) 0x42b0e1 MOVSXD %R11D,%RDI |
(189) 0x42b0e4 MOV %RBX,%R11 |
(189) 0x42b0e7 MOVSXD %R13D,%RSI |
(189) 0x42b0ea IMUL %RBX,%RDI |
(189) 0x42b0ee IMUL %RDX,%R11 |
(189) 0x42b0f2 IMUL %R12,%RDX |
(189) 0x42b0f6 ADD %R8,%RDI |
(189) 0x42b0f9 ADD %R11,%RDI |
(189) 0x42b0fc LEA (%R10,%RDI,8),%R11 |
(189) 0x42b100 MOVSXD %R9D,%RDI |
(189) 0x42b103 LEA 0x1(%RSI,%RDI,1),%RSI |
(189) 0x42b108 MOV -0x78(%RBP),%RDI |
(189) 0x42b10c VMOVSD (%R11),%XMM12 |
(189) 0x42b111 IMUL %R12,%RSI |
(189) 0x42b115 VMOVSD (%R11,%RDI,1),%XMM13 |
(189) 0x42b11b MOV -0x80(%RBP),%R11 |
(189) 0x42b11f ADD %R15,%RSI |
(189) 0x42b122 ADD %RDX,%RSI |
(189) 0x42b125 LEA (%R14,%RSI,8),%RDX |
(189) 0x42b129 VMOVSD %XMM12,(%RDX) |
(189) 0x42b12d VMOVSD %XMM13,(%RDX,%R11,1) |
(189) 0x42b133 TEST $0x1,%CL |
(189) 0x42b136 JE 42b167 |
(189) 0x42b138 AND $-0x2,%ECX |
(189) 0x42b13b ADD %ECX,%EAX |
(189) 0x42b13d MOV -0x38(%RBP),%ECX |
(189) 0x42b140 ADD %EAX,%ECX |
(189) 0x42b142 ADD %R13D,%EAX |
(189) 0x42b145 MOVSXD %ECX,%RSI |
(189) 0x42b148 ADD %R9D,%EAX |
(189) 0x42b14b IMUL %RBX,%RSI |
(189) 0x42b14f CLTQ |
(189) 0x42b151 IMUL %R12,%RAX |
(189) 0x42b155 ADD %R8,%RSI |
(189) 0x42b158 VMOVSD (%R10,%RSI,8),%XMM14 |
(189) 0x42b15e ADD %R15,%RAX |
(189) 0x42b161 VMOVSD %XMM14,(%R14,%RAX,8) |
(189) 0x42b167 MOV -0x3c(%RBP),%R13D |
(189) 0x42b16b MOV -0x50(%RBP),%EAX |
(189) 0x42b16e KMOVB %K0,%EDX |
(189) 0x42b172 KMOVB %K1,%EDI |
(189) 0x42b176 MOV -0x70(%RBP),%RCX |
(189) 0x42b17a TEST %R13D,%R13D |
(189) 0x42b17d CMOVNS -0x88(%RBP),%EAX |
(189) 0x42b184 CMOVNS %EDI,%EDX |
(189) 0x42b187 INCL -0x40(%RBP) |
(189) 0x42b18a ADD %RCX,%R8 |
(189) 0x42b18d ADD %R13D,%R9D |
(189) 0x42b190 MOV %EAX,-0x50(%RBP) |
(189) 0x42b193 KMOVB %EDX,%K0 |
(189) 0x42b197 MOV -0x40(%RBP),%R11D |
(189) 0x42b19b CMP %R11D,-0x84(%RBP) |
(189) 0x42b1a2 JG 42ae40 |
0x42b1a8 MOV -0xd0(%RBP),%R15 |
0x42b1af KORTESTB %K0,%K0 |
0x42b1b3 JE 42b1bd |
0x42b1b5 MOV -0x50(%RBP),%R12D |
0x42b1b9 MOV %R12D,0x50(%R15) |
0x42b1bd ADD $0xa8,%RSP |
0x42b1c4 POP %RBX |
0x42b1c5 POP %R12 |
0x42b1c7 POP %R13 |
0x42b1c9 POP %R14 |
0x42b1cb POP %R15 |
0x42b1cd POP %RBP |
0x42b1ce RET |
0x42b1cf NOP |
(189) 0x42b1d0 XOR %EDX,%EDX |
(189) 0x42b1d2 MOV $0x1,%EAX |
(189) 0x42b1d7 JMP 42b0d7 |
0x42b1dc INC %EAX |
0x42b1de XOR %EDX,%EDX |
0x42b1e0 JMP 42ad39 |
0x42b1e5 NOPW %CS:(%RAX,%RAX,1) |
Path / |
Source file and lines | pack_kernel.f90:61-66 |
Module | exec |
nb instructions | 113 |
nb uops | 118 |
loop length | 428 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 22 |
micro-operation queue | 19.67 cycles |
front end | 19.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 8.20 | 8.20 | 8.67 | 8.67 | 15.50 | 8.20 | 8.20 | 15.50 | 15.50 | 15.50 | 8.20 | 8.67 |
cycles | 8.20 | 10.13 | 8.67 | 8.67 | 15.50 | 8.20 | 8.20 | 15.50 | 15.50 | 15.50 | 8.20 | 8.67 |
Cycles executing div or sqrt instructions | 6.00 |
FE+BE cycles | 19.34-19.36 |
Stall cycles | 0.00 |
Front-end | 19.67 |
Dispatch | 15.50 |
DIV/SQRT | 6.00 |
Overall L1 | 19.67 |
all | 0% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 9% |
load | 12% |
store | 9% |
mul | 9% |
add-sub | 10% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 8% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0xa8,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDI,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x54(%RDI),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RDI),%R13D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%RDI),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RDI),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,-0x8c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 402080 <@plt_start@+0x60> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 402180 <@plt_start@+0x160> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x38(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x5c(%R11),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %R13D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R14D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
CMP %EDX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 42b1dc <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x50c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %EAX,%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %ESI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 42b1bd <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x4ed> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x8(%R11),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R13,%RSI,1),%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV -0x70(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R13D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
KXORB %K0,%K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOVSXD %EDI,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV 0x10(%R11),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R11),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,-0x84(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R8),%R13D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RSI,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0x48(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R9,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SAL $0x5,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV 0x38(%R11),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x1(%R13),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R13D,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EDI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RDI,%RAX,1),%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x2,%EDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %EAX,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%R12,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RCX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDX,-0x4c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%RBX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RAX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x4,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RCX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x5,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RSI,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R13D,%R9D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%R12,%R12,2),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x4,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SAL $0x3,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RDX,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EAX,-0xb4(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST %R13D,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
CMOVNS %R13D,%EDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EAX,-0xc4(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDX,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,-0xd0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%R11),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13D,-0x3c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x1,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
KMOVB %R13D,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xd0(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
KORTESTB %K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JE 42b1bd <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x4ed> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x50(%RBP),%R12D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12D,0x50(%R15) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD $0xa8,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 42ad39 <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x69> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | pack_kernel.f90:61-66 |
Module | exec |
nb instructions | 113 |
nb uops | 118 |
loop length | 428 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 22 |
micro-operation queue | 19.67 cycles |
front end | 19.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 8.20 | 8.20 | 8.67 | 8.67 | 15.50 | 8.20 | 8.20 | 15.50 | 15.50 | 15.50 | 8.20 | 8.67 |
cycles | 8.20 | 10.13 | 8.67 | 8.67 | 15.50 | 8.20 | 8.20 | 15.50 | 15.50 | 15.50 | 8.20 | 8.67 |
Cycles executing div or sqrt instructions | 6.00 |
FE+BE cycles | 19.34-19.36 |
Stall cycles | 0.00 |
Front-end | 19.67 |
Dispatch | 15.50 |
DIV/SQRT | 6.00 |
Overall L1 | 19.67 |
all | 0% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 9% |
load | 12% |
store | 9% |
mul | 9% |
add-sub | 10% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 8% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0xa8,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDI,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x54(%RDI),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RDI),%R13D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%RDI),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RDI),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,-0x8c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 402080 <@plt_start@+0x60> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 402180 <@plt_start@+0x160> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x38(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x5c(%R11),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %R13D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R14D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
CMP %EDX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 42b1dc <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x50c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %EAX,%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %ESI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 42b1bd <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x4ed> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x8(%R11),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R13,%RSI,1),%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV -0x70(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R13D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
KXORB %K0,%K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOVSXD %EDI,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV 0x10(%R11),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R11),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,-0x84(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R8),%R13D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RSI,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0x48(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R9,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SAL $0x5,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV 0x38(%R11),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x1(%R13),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R13D,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EDI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RDI,%RAX,1),%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x2,%EDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %EAX,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%R12,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RCX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDX,-0x4c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%RBX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RAX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x4,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RCX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x5,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RSI,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R13D,%R9D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%R12,%R12,2),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x4,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SAL $0x3,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RDX,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EAX,-0xb4(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST %R13D,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
CMOVNS %R13D,%EDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EAX,-0xc4(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDX,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,-0xd0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%R11),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13D,-0x3c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x1,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
KMOVB %R13D,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xd0(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
KORTESTB %K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JE 42b1bd <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x4ed> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x50(%RBP),%R12D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12D,0x50(%R15) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD $0xa8,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 42ad39 <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x69> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0– | 0.03 | 0.01 |
▼Loop 189 - pack_kernel.f90:63-66 - exec– | 0.03 | 0.02 |
○Loop 190 - pack_kernel.f90:66-66 - exec | 0 | 0 |