Loop Id: 344 | Module: exec | Source: flux_calc_kernel.f90:56-60 | Coverage: 4.47% |
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Loop Id: 344 | Module: exec | Source: flux_calc_kernel.f90:56-60 | Coverage: 4.47% |
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0x4421e0 VMULPD (%R10,%RCX,8),%ZMM12,%ZMM13 [5] |
0x4421e7 VMOVUPD (%R9,%RCX,8),%ZMM14 [3] |
0x4421ee VADDPD (%R15,%RCX,8),%ZMM14,%ZMM14 [6] |
0x4421f5 VADDPD (%R13,%RCX,8),%ZMM14,%ZMM14 [10] |
0x4421fd VADDPD (%RDX,%RCX,8),%ZMM14,%ZMM14 [4] |
0x442204 VMULPD %ZMM14,%ZMM13,%ZMM13 |
0x44220a VMOVUPD %ZMM13,(%RBX,%RCX,8) [7] |
0x442211 VMULPD (%R8,%RCX,8),%ZMM12,%ZMM13 [2] |
0x442218 VMOVUPD (%RDI,%RCX,8),%ZMM14 [1] |
0x44221f VADDPD -0x8(%RDI,%RCX,8),%ZMM14,%ZMM14 [1] |
0x44222a VADDPD -0x8(%RAX,%RCX,8),%ZMM14,%ZMM14 [8] |
0x442235 VADDPD (%RAX,%RCX,8),%ZMM14,%ZMM14 [8] |
0x44223c VMULPD %ZMM14,%ZMM13,%ZMM13 |
0x442242 VMOVUPD %ZMM13,(%R12,%RCX,8) [9] |
0x442249 ADD $0x8,%RCX |
0x44224d CMP %R11,%RCX |
0x442250 JB 4421e0 |
/home/eoseret/qaas_runs_CPU_9468/171-137-7698/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/flux_calc_kernel.f90: 56 - 60 |
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56: DO j=x_min,x_max+1 |
57: vol_flux_x(j,k)=0.25_8*dt*xarea(j,k) & |
58: *(xvel0(j,k)+xvel0(j,k+1)+xvel1(j,k)+xvel1(j,k+1)) |
59: vol_flux_y(j,k)=0.25_8*dt*yarea(j,k) & |
60: *(yvel0(j,k)+yvel0(j+1,k)+yvel1(j,k)+yvel1(j+1,k)) |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.25 |
Bottlenecks | P0, P1, P5, |
Function | flux_calc_kernel_.DIR.OMP.PARALLEL.2 |
Source | flux_calc_kernel.f90:56-60 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 5.00 |
CQA cycles if no scalar integer | 5.00 |
CQA cycles if FP arith vectorized | 5.00 |
CQA cycles if fully vectorized | 5.00 |
Front-end cycles | 4.00 |
DIV/SQRT cycles | 5.00 |
P0 cycles | 5.00 |
P1 cycles | 3.33 |
P2 cycles | 3.33 |
P3 cycles | 1.00 |
P4 cycles | 5.00 |
P5 cycles | 1.00 |
P6 cycles | 1.00 |
P7 cycles | 1.00 |
P8 cycles | 1.00 |
P9 cycles | 0.00 |
P10 cycles | 3.33 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 5.24 |
Stall cycles (UFS) | 0.49 |
Nb insns | 17.00 |
Nb uops | 16.00 |
Nb loads | 10.00 |
Nb stores | 2.00 |
Nb stack references | 0.00 |
FLOP/cycle | 16.00 |
Nb FLOP add-sub | 48.00 |
Nb FLOP mul | 32.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 153.60 |
Bytes prefetched | 0.00 |
Bytes loaded | 640.00 |
Bytes stored | 128.00 |
Stride 0 | 0.00 |
Stride 1 | 8.00 |
Stride n | 2.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 100.00 |
Vectorization ratio load | 100.00 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | NA |
Vector-efficiency ratio all | 100.00 |
Vector-efficiency ratio load | 100.00 |
Vector-efficiency ratio store | 100.00 |
Vector-efficiency ratio mul | 100.00 |
Vector-efficiency ratio add_sub | 100.00 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | NA |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.25 |
Bottlenecks | P0, P1, P5, |
Function | flux_calc_kernel_.DIR.OMP.PARALLEL.2 |
Source | flux_calc_kernel.f90:56-60 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 5.00 |
CQA cycles if no scalar integer | 5.00 |
CQA cycles if FP arith vectorized | 5.00 |
CQA cycles if fully vectorized | 5.00 |
Front-end cycles | 4.00 |
DIV/SQRT cycles | 5.00 |
P0 cycles | 5.00 |
P1 cycles | 3.33 |
P2 cycles | 3.33 |
P3 cycles | 1.00 |
P4 cycles | 5.00 |
P5 cycles | 1.00 |
P6 cycles | 1.00 |
P7 cycles | 1.00 |
P8 cycles | 1.00 |
P9 cycles | 0.00 |
P10 cycles | 3.33 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 5.24 |
Stall cycles (UFS) | 0.49 |
Nb insns | 17.00 |
Nb uops | 16.00 |
Nb loads | 10.00 |
Nb stores | 2.00 |
Nb stack references | 0.00 |
FLOP/cycle | 16.00 |
Nb FLOP add-sub | 48.00 |
Nb FLOP mul | 32.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 153.60 |
Bytes prefetched | 0.00 |
Bytes loaded | 640.00 |
Bytes stored | 128.00 |
Stride 0 | 0.00 |
Stride 1 | 8.00 |
Stride n | 2.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 100.00 |
Vectorization ratio load | 100.00 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | NA |
Vector-efficiency ratio all | 100.00 |
Vector-efficiency ratio load | 100.00 |
Vector-efficiency ratio store | 100.00 |
Vector-efficiency ratio mul | 100.00 |
Vector-efficiency ratio add_sub | 100.00 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | NA |
Path / |
Function | flux_calc_kernel_.DIR.OMP.PARALLEL.2 |
Source file and lines | flux_calc_kernel.f90:56-60 |
Module | exec |
nb instructions | 17 |
nb uops | 16 |
loop length | 114 |
used x86 registers | 12 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 3 |
nb stack references | 0 |
ADD-SUB / MUL ratio | 1.50 |
micro-operation queue | 4.00 cycles |
front end | 4.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 5.00 | 0.00 | 3.33 | 3.33 | 1.00 | 5.00 | 1.00 | 1.00 | 1.00 | 1.00 | 0.00 | 3.33 |
cycles | 5.00 | 5.00 | 3.33 | 3.33 | 1.00 | 5.00 | 1.00 | 1.00 | 1.00 | 1.00 | 0.00 | 3.33 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 5.24 |
Stall cycles | 0.49 |
RS full (events) | 1.51 |
Front-end | 4.00 |
Dispatch | 5.00 |
Data deps. | 1.00 |
Overall L1 | 5.00 |
all | 100% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 100% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VMULPD (%R10,%RCX,8),%ZMM12,%ZMM13 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD (%R9,%RCX,8),%ZMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VADDPD (%R15,%RCX,8),%ZMM14,%ZMM14 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VADDPD (%R13,%RCX,8),%ZMM14,%ZMM14 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VADDPD (%RDX,%RCX,8),%ZMM14,%ZMM14 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VMULPD %ZMM14,%ZMM13,%ZMM13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD %ZMM13,(%RBX,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMULPD (%R8,%RCX,8),%ZMM12,%ZMM13 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD (%RDI,%RCX,8),%ZMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VADDPD -0x8(%RDI,%RCX,8),%ZMM14,%ZMM14 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VADDPD -0x8(%RAX,%RCX,8),%ZMM14,%ZMM14 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VADDPD (%RAX,%RCX,8),%ZMM14,%ZMM14 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VMULPD %ZMM14,%ZMM13,%ZMM13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD %ZMM13,(%R12,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
ADD $0x8,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %R11,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 4421e0 <flux_calc_kernel_module_mp_flux_calc_kernel_.DIR.OMP.PARALLEL.2+0x5e0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
Function | flux_calc_kernel_.DIR.OMP.PARALLEL.2 |
Source file and lines | flux_calc_kernel.f90:56-60 |
Module | exec |
nb instructions | 17 |
nb uops | 16 |
loop length | 114 |
used x86 registers | 12 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 3 |
nb stack references | 0 |
ADD-SUB / MUL ratio | 1.50 |
micro-operation queue | 4.00 cycles |
front end | 4.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 5.00 | 0.00 | 3.33 | 3.33 | 1.00 | 5.00 | 1.00 | 1.00 | 1.00 | 1.00 | 0.00 | 3.33 |
cycles | 5.00 | 5.00 | 3.33 | 3.33 | 1.00 | 5.00 | 1.00 | 1.00 | 1.00 | 1.00 | 0.00 | 3.33 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 5.24 |
Stall cycles | 0.49 |
RS full (events) | 1.51 |
Front-end | 4.00 |
Dispatch | 5.00 |
Data deps. | 1.00 |
Overall L1 | 5.00 |
all | 100% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 100% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VMULPD (%R10,%RCX,8),%ZMM12,%ZMM13 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD (%R9,%RCX,8),%ZMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VADDPD (%R15,%RCX,8),%ZMM14,%ZMM14 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VADDPD (%R13,%RCX,8),%ZMM14,%ZMM14 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VADDPD (%RDX,%RCX,8),%ZMM14,%ZMM14 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VMULPD %ZMM14,%ZMM13,%ZMM13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD %ZMM13,(%RBX,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMULPD (%R8,%RCX,8),%ZMM12,%ZMM13 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD (%RDI,%RCX,8),%ZMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VADDPD -0x8(%RDI,%RCX,8),%ZMM14,%ZMM14 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VADDPD -0x8(%RAX,%RCX,8),%ZMM14,%ZMM14 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VADDPD (%RAX,%RCX,8),%ZMM14,%ZMM14 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VMULPD %ZMM14,%ZMM13,%ZMM13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD %ZMM13,(%R12,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
ADD $0x8,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %R11,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 4421e0 <flux_calc_kernel_module_mp_flux_calc_kernel_.DIR.OMP.PARALLEL.2+0x5e0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |