Function: __generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0 | Module: exec | Source: generate_chunk_kernel.f90:85-161 | Coverage: 0.03% |
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Function: __generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0 | Module: exec | Source: generate_chunk_kernel.f90:85-161 | Coverage: 0.03% |
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/home/eoseret/qaas_runs_CPU_9468/171-137-7698/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/generate_chunk_kernel.f90: 85 - 161 |
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85: !$OMP PARALLEL SHARED(x_cent,y_cent) |
86: !$OMP DO |
87: DO k=y_min-2,y_max+2 |
88: !$OMP SIMD |
89: DO j=x_min-2,x_max+2 |
90: energy0(j,k)=state_energy(1) |
91: ENDDO |
92: ENDDO |
93: !$OMP END DO |
94: !$OMP DO |
95: DO k=y_min-2,y_max+2 |
96: !$OMP SIMD |
97: DO j=x_min-2,x_max+2 |
98: density0(j,k)=state_density(1) |
99: ENDDO |
100: ENDDO |
101: !$OMP END DO |
102: !$OMP DO |
103: DO k=y_min-2,y_max+2 |
104: !$OMP SIMD |
105: DO j=x_min-2,x_max+2 |
106: xvel0(j,k)=state_xvel(1) |
107: ENDDO |
108: ENDDO |
109: !$OMP END DO |
110: !$OMP DO |
111: DO k=y_min-2,y_max+2 |
112: !$OMP SIMD |
113: DO j=x_min-2,x_max+2 |
114: yvel0(j,k)=state_yvel(1) |
115: ENDDO |
116: ENDDO |
117: !$OMP END DO |
118: |
119: DO state=2,number_of_states |
120: |
121: ! Could the velocity setting be thread unsafe? |
122: x_cent=state_xmin(state) |
123: y_cent=state_ymin(state) |
124: |
125: !$OMP DO PRIVATE(radius,jt,kt) |
126: DO k=y_min-2,y_max+2 |
127: !$OMP SIMD |
128: DO j=x_min-2,x_max+2 |
129: IF(state_geometry(state).EQ.g_rect ) THEN |
130: IF(vertexx(j+1).GE.state_xmin(state).AND.vertexx(j).LT.state_xmax(state)) THEN |
131: IF(vertexy(k+1).GE.state_ymin(state).AND.vertexy(k).LT.state_ymax(state)) THEN |
132: energy0(j,k)=state_energy(state) |
133: density0(j,k)=state_density(state) |
134: DO kt=k,k+1 |
135: DO jt=j,j+1 |
136: xvel0(jt,kt)=state_xvel(state) |
137: yvel0(jt,kt)=state_yvel(state) |
138: ENDDO |
139: ENDDO |
140: ENDIF |
141: ENDIF |
142: ELSEIF(state_geometry(state).EQ.g_circ ) THEN |
143: radius=SQRT((cellx(j)-x_cent)*(cellx(j)-x_cent)+(celly(k)-y_cent)*(celly(k)-y_cent)) |
144: IF(radius.LE.state_radius(state))THEN |
145: energy0(j,k)=state_energy(state) |
146: density0(j,k)=state_density(state) |
147: DO kt=k,k+1 |
148: DO jt=j,j+1 |
149: xvel0(jt,kt)=state_xvel(state) |
150: yvel0(jt,kt)=state_yvel(state) |
151: ENDDO |
152: ENDDO |
153: ENDIF |
154: ELSEIF(state_geometry(state).EQ.g_point) THEN |
155: IF(vertexx(j).EQ.x_cent .AND. vertexy(k).EQ.y_cent) THEN |
156: energy0(j,k)=state_energy(state) |
157: density0(j,k)=state_density(state) |
158: DO kt=k,k+1 |
159: DO jt=j,j+1 |
160: xvel0(jt,kt)=state_xvel(state) |
161: yvel0(jt,kt)=state_yvel(state) |
0x42f550 PUSH %RBP |
0x42f551 MOV %RSP,%RBP |
0x42f554 PUSH %R15 |
0x42f556 PUSH %R14 |
0x42f558 PUSH %R13 |
0x42f55a PUSH %R12 |
0x42f55c MOV %RDI,%R12 |
0x42f55f PUSH %RBX |
0x42f560 AND $-0x20,%RSP |
0x42f564 SUB $0x180,%RSP |
0x42f56b MOV 0x128(%RDI),%RAX |
0x42f572 MOV 0x120(%RDI),%RDX |
0x42f579 MOV 0x118(%RDI),%RCX |
0x42f580 MOV 0x108(%RDI),%RSI |
0x42f587 MOV 0x100(%RDI),%R8 |
0x42f58e MOV 0xf8(%RDI),%R9 |
0x42f595 MOV %RAX,0x48(%RSP) |
0x42f59a MOV 0xf0(%RDI),%R10 |
0x42f5a1 MOV 0xe8(%RDI),%R11 |
0x42f5a8 MOV %RDX,0x140(%RSP) |
0x42f5b0 MOV 0xe0(%RDI),%R13 |
0x42f5b7 MOV 0xd0(%RDI),%RDX |
0x42f5be MOV %RCX,0x40(%RSP) |
0x42f5c3 MOV 0xd8(%RDI),%RAX |
0x42f5ca MOV 0x110(%RDI),%RBX |
0x42f5d1 MOV %RSI,0x38(%RSP) |
0x42f5d6 MOV 0x10(%RDI),%RDI |
0x42f5da MOV %RDX,0x20(%RSP) |
0x42f5df MOV %R8,0x118(%RSP) |
0x42f5e7 MOV %R9,0x30(%RSP) |
0x42f5ec MOV %R10,0xf8(%RSP) |
0x42f5f4 MOV %R11,0x120(%RSP) |
0x42f5fc MOV %R13,0x100(%RSP) |
0x42f604 MOV %RAX,0x110(%RSP) |
0x42f60c MOV %RBX,0x138(%RSP) |
0x42f614 MOV (%RDI),%EBX |
0x42f616 CALL 402080 <@plt_start@+0x60> |
0x42f61b MOV %EAX,%R13D |
0x42f61e MOV %EAX,0xc8(%RSP) |
0x42f625 SUB $0x2,%EBX |
0x42f628 CALL 402180 <@plt_start@+0x160> |
0x42f62d MOV 0x18(%R12),%RSI |
0x42f632 MOV %EAX,0xdc(%RSP) |
0x42f639 MOV %EAX,%ECX |
0x42f63b MOV (%RSI),%EAX |
0x42f63d ADD $0x3,%EAX |
0x42f640 SUB %EBX,%EAX |
0x42f642 CLTD |
0x42f643 IDIV %R13D |
0x42f646 CMP %EDX,%ECX |
0x42f648 JL 430b3d |
0x42f64e MOV 0xdc(%RSP),%R8D |
0x42f656 IMUL %EAX,%R8D |
0x42f65a ADD %EDX,%R8D |
0x42f65d ADD %R8D,%EAX |
0x42f660 CMP %EAX,%R8D |
0x42f663 JGE 42f93e |
0x42f669 ADD %EBX,%EAX |
0x42f66b ADD %EBX,%R8D |
0x42f66e MOV 0xf8(%RSP),%RBX |
0x42f676 MOV (%R12),%R9 |
0x42f67a MOV 0x8(%R12),%R11 |
0x42f67f MOV 0x48(%R12),%RSI |
0x42f684 MOV %EAX,0x170(%RSP) |
0x42f68b LEA (,%RBX,8),%RCX |
0x42f693 MOVSXD (%R9),%R10 |
0x42f696 MOV 0x70(%R12),%RDX |
0x42f69b MOV %R12,0xd0(%RSP) |
0x42f6a3 MOV %RCX,0x160(%RSP) |
0x42f6ab MOVSXD %R8D,%RCX |
0x42f6ae MOV (%R11),%EDI |
0x42f6b1 IMUL %RBX,%RCX |
0x42f6b5 MOV 0x30(%RSP),%RBX |
0x42f6ba MOV %R10,%RAX |
0x42f6bd LEA -0x2(%R10),%R13D |
0x42f6c1 LEA 0x3(%RDI),%R11D |
0x42f6c5 SUB %EAX,%EDI |
0x42f6c7 MOV %R10,0xe8(%RSP) |
0x42f6cf LEA (%R10,%RBX,1),%R9 |
0x42f6d3 LEA 0x5(%RDI),%EAX |
0x42f6d6 MOV %EDI,0x148(%RSP) |
0x42f6dd ADD %RCX,%R9 |
0x42f6e0 ADD %RBX,%RCX |
0x42f6e3 MOV %EAX,%EBX |
0x42f6e5 MOV %R13D,0x178(%RSP) |
0x42f6ed LEA -0x10(%RSI,%R9,8),%R10 |
0x42f6f2 MOV %EDI,%R9D |
0x42f6f5 MOV %EAX,%EDI |
0x42f6f7 SHR $0x2,%EBX |
0x42f6fa AND $-0x4,%EDI |
0x42f6fd SAL $0x5,%RBX |
0x42f701 MOV 0xe8(%RSP),%R12 |
0x42f709 MOV %R14D,0xe0(%RSP) |
0x42f711 MOV %EDI,0x134(%RSP) |
0x42f718 ADD %R13D,%EDI |
0x42f71b CMP %R11D,%R13D |
0x42f71e MOV %EDI,0x128(%RSP) |
0x42f725 LEA 0x5(%R13,%R9,1),%EDI |
0x42f72a LEA 0x4(%R9),%R9D |
0x42f72e CMOVGE %R13D,%EDI |
0x42f732 MOV %R9D,0x158(%RSP) |
0x42f73a AND $0x3,%EAX |
0x42f73d XOR %R13D,%R13D |
0x42f740 MOV %EAX,0x150(%RSP) |
0x42f747 MOV %R13D,%R14D |
0x42f74a MOV $0x1,%EAX |
0x42f74f MOV %EDI,0x168(%RSP) |
0x42f756 KMOVB %EAX,%K1 |
0x42f75a NOPW (%RAX,%RAX,1) |
(239) 0x42f760 CMP %R11D,0x178(%RSP) |
(239) 0x42f768 JGE 42f8da |
(239) 0x42f76e CMPL $0x2,0x158(%RSP) |
(239) 0x42f776 JBE 430b26 |
(239) 0x42f77c LEA -0x20(%RBX),%R9 |
(239) 0x42f780 LEA (%RBX,%R10,1),%R13 |
(239) 0x42f784 MOV %R10,%RAX |
(239) 0x42f787 SHR $0x5,%R9 |
(239) 0x42f78b INC %R9 |
(239) 0x42f78e AND $0x7,%R9D |
(239) 0x42f792 JE 42f819 |
(239) 0x42f798 CMP $0x1,%R9 |
(239) 0x42f79c JE 42f806 |
(239) 0x42f79e CMP $0x2,%R9 |
(239) 0x42f7a2 JE 42f7f8 |
(239) 0x42f7a4 CMP $0x3,%R9 |
(239) 0x42f7a8 JE 42f7ea |
(239) 0x42f7aa CMP $0x4,%R9 |
(239) 0x42f7ae JE 42f7dc |
(239) 0x42f7b0 CMP $0x5,%R9 |
(239) 0x42f7b4 JE 42f7ce |
(239) 0x42f7b6 CMP $0x6,%R9 |
(239) 0x42f7ba JNE 430ae9 |
(239) 0x42f7c0 VBROADCASTSD (%RDX),%YMM1 |
(239) 0x42f7c5 ADD $0x20,%RAX |
(239) 0x42f7c9 VMOVUPD %YMM1,-0x20(%RAX) |
(239) 0x42f7ce VBROADCASTSD (%RDX),%YMM2 |
(239) 0x42f7d3 ADD $0x20,%RAX |
(239) 0x42f7d7 VMOVUPD %YMM2,-0x20(%RAX) |
(239) 0x42f7dc VBROADCASTSD (%RDX),%YMM3 |
(239) 0x42f7e1 ADD $0x20,%RAX |
(239) 0x42f7e5 VMOVUPD %YMM3,-0x20(%RAX) |
(239) 0x42f7ea VBROADCASTSD (%RDX),%YMM4 |
(239) 0x42f7ef ADD $0x20,%RAX |
(239) 0x42f7f3 VMOVUPD %YMM4,-0x20(%RAX) |
(239) 0x42f7f8 VBROADCASTSD (%RDX),%YMM5 |
(239) 0x42f7fd ADD $0x20,%RAX |
(239) 0x42f801 VMOVUPD %YMM5,-0x20(%RAX) |
(239) 0x42f806 VBROADCASTSD (%RDX),%YMM6 |
(239) 0x42f80b ADD $0x20,%RAX |
(239) 0x42f80f VMOVUPD %YMM6,-0x20(%RAX) |
(239) 0x42f814 CMP %R13,%RAX |
(239) 0x42f817 JE 42f880 |
(240) 0x42f819 VBROADCASTSD (%RDX),%YMM7 |
(240) 0x42f81e ADD $0x100,%RAX |
(240) 0x42f824 VMOVUPD %YMM7,-0x100(%RAX) |
(240) 0x42f82c VBROADCASTSD (%RDX),%YMM8 |
(240) 0x42f831 VMOVUPD %YMM8,-0xe0(%RAX) |
(240) 0x42f839 VBROADCASTSD (%RDX),%YMM9 |
(240) 0x42f83e VMOVUPD %YMM9,-0xc0(%RAX) |
(240) 0x42f846 VBROADCASTSD (%RDX),%YMM10 |
(240) 0x42f84b VMOVUPD %YMM10,-0xa0(%RAX) |
(240) 0x42f853 VBROADCASTSD (%RDX),%YMM11 |
(240) 0x42f858 VMOVUPD %YMM11,-0x80(%RAX) |
(240) 0x42f85d VBROADCASTSD (%RDX),%YMM12 |
(240) 0x42f862 VMOVUPD %YMM12,-0x60(%RAX) |
(240) 0x42f867 VBROADCASTSD (%RDX),%YMM13 |
(240) 0x42f86c VMOVUPD %YMM13,-0x40(%RAX) |
(240) 0x42f871 VBROADCASTSD (%RDX),%YMM14 |
(240) 0x42f876 VMOVUPD %YMM14,-0x20(%RAX) |
(240) 0x42f87b CMP %R13,%RAX |
(240) 0x42f87e JNE 42f819 |
(239) 0x42f880 MOV 0x150(%RSP),%EDI |
(239) 0x42f887 TEST %EDI,%EDI |
(239) 0x42f889 JE 42f8da |
(239) 0x42f88b MOV 0x134(%RSP),%EDI |
(239) 0x42f892 MOV 0x128(%RSP),%EAX |
(239) 0x42f899 MOV 0x148(%RSP),%R13D |
(239) 0x42f8a1 SUB %EDI,%R13D |
(239) 0x42f8a4 LEA 0x5(%R13),%R9D |
(239) 0x42f8a8 CMP $-0x4,%R13D |
(239) 0x42f8ac JE 42f8cc |
(239) 0x42f8ae LEA (%R12,%RCX,1),%R13 |
(239) 0x42f8b2 VMOVDDUP (%RDX),%XMM15 |
(239) 0x42f8b6 ADD %R13,%RDI |
(239) 0x42f8b9 VMOVUPD %XMM15,-0x10(%RSI,%RDI,8) |
(239) 0x42f8bf TEST $0x1,%R9B |
(239) 0x42f8c3 JE 42f8da |
(239) 0x42f8c5 AND $-0x2,%R9D |
(239) 0x42f8c9 ADD %R9D,%EAX |
(239) 0x42f8cc VMOVSD (%RDX),%XMM0 |
(239) 0x42f8d0 CLTQ |
(239) 0x42f8d2 ADD %RCX,%RAX |
(239) 0x42f8d5 VMOVSD %XMM0,(%RSI,%RAX,8) |
(239) 0x42f8da MOV 0x168(%RSP),%EAX |
(239) 0x42f8e1 MOV 0x160(%RSP),%R9 |
(239) 0x42f8e9 KMOVB %K1,%EDI |
(239) 0x42f8ed MOV 0xf8(%RSP),%R13 |
(239) 0x42f8f5 CMP %EAX,%R11D |
(239) 0x42f8f8 CMOVE %R11D,%R15D |
(239) 0x42f8fc CMOVE %EDI,%R14D |
(239) 0x42f900 INC %R8D |
(239) 0x42f903 ADD %R9,%R10 |
(239) 0x42f906 ADD %R13,%RCX |
(239) 0x42f909 CMP %R8D,0x170(%RSP) |
(239) 0x42f911 JG 42f760 |
0x42f917 MOV %R14D,%R8D |
0x42f91a MOV 0xd0(%RSP),%R12 |
0x42f922 MOV 0xe0(%RSP),%R14D |
0x42f92a TEST %R8B,%R8B |
0x42f92d JE 430b68 |
0x42f933 MOV %R15D,0x140(%R12) |
0x42f93b VZEROUPPER |
0x42f93e CALL 402220 <@plt_start@+0x200> |
0x42f943 MOV 0x18(%R12),%RDX |
0x42f948 MOV 0x10(%R12),%R15 |
0x42f94d MOV (%RDX),%EAX |
0x42f94f MOV (%R15),%R11D |
0x42f952 ADD $0x3,%EAX |
0x42f955 SUB $0x2,%R11D |
0x42f959 SUB %R11D,%EAX |
0x42f95c CLTD |
0x42f95d IDIVL 0xc8(%RSP) |
0x42f964 CMP %EDX,0xdc(%RSP) |
0x42f96b JL 430b46 |
0x42f971 MOV 0xdc(%RSP),%R8D |
0x42f979 IMUL %EAX,%R8D |
0x42f97d ADD %EDX,%R8D |
0x42f980 ADD %R8D,%EAX |
0x42f983 CMP %EAX,%R8D |
0x42f986 JGE 42fc76 |
0x42f98c MOV (%R12),%RSI |
0x42f990 MOV 0x8(%R12),%RCX |
0x42f995 ADD %R11D,%R8D |
0x42f998 ADD %R11D,%EAX |
0x42f99b MOV 0x100(%RSP),%R10 |
0x42f9a3 MOV 0x68(%R12),%RDX |
0x42f9a8 MOV %EAX,0x170(%RSP) |
0x42f9af MOVSXD (%RSI),%R9 |
0x42f9b2 MOV (%RCX),%EDI |
0x42f9b4 MOVSXD %R8D,%RCX |
0x42f9b7 MOV %R12,0xd0(%RSP) |
0x42f9bf IMUL %R10,%RCX |
0x42f9c3 MOV 0x120(%RSP),%RAX |
0x42f9cb MOV 0x40(%R12),%RSI |
0x42f9d0 LEA (,%R10,8),%R13 |
0x42f9d8 MOV %R9,%R15 |
0x42f9db LEA -0x2(%R9),%EBX |
0x42f9df MOV %R9,0xe8(%RSP) |
0x42f9e7 LEA 0x3(%RDI),%R11D |
0x42f9eb LEA (%R9,%RAX,1),%R9 |
0x42f9ef SUB %R15D,%EDI |
0x42f9f2 MOV %R13,0x160(%RSP) |
0x42f9fa ADD %RCX,%R9 |
0x42f9fd ADD %RAX,%RCX |
0x42fa00 LEA 0x5(%RDI),%EAX |
0x42fa03 MOV %EDI,0x148(%RSP) |
0x42fa0a MOV %EAX,%R13D |
0x42fa0d LEA -0x10(%RSI,%R9,8),%R10 |
0x42fa12 MOV %EDI,%R9D |
0x42fa15 MOV %EAX,%EDI |
0x42fa17 AND $-0x4,%EDI |
0x42fa1a SHR $0x2,%R13D |
0x42fa1e LEA 0x5(%RBX,%R9,1),%R15D |
0x42fa23 MOV %EBX,0x178(%RSP) |
0x42fa2a MOV %EDI,0x134(%RSP) |
0x42fa31 SAL $0x5,%R13 |
0x42fa35 ADD %EBX,%EDI |
0x42fa37 CMP %R11D,%EBX |
0x42fa3a CMOVGE %EBX,%R15D |
0x42fa3e AND $0x3,%EAX |
0x42fa41 LEA 0x4(%R9),%EBX |
0x42fa45 MOV %EDI,0x128(%RSP) |
0x42fa4c MOV %EAX,0x150(%RSP) |
0x42fa53 XOR %EDI,%EDI |
0x42fa55 MOV 0xe8(%RSP),%R12 |
0x42fa5d MOV $0x1,%R9D |
0x42fa63 MOV %R15D,0x168(%RSP) |
0x42fa6b KMOVB %R9D,%K0 |
0x42fa70 MOV %EBX,0x158(%RSP) |
0x42fa77 MOV 0x108(%RSP),%EBX |
0x42fa7e MOV %R14D,0xe0(%RSP) |
0x42fa86 MOV %EDI,%R14D |
0x42fa89 NOPL (%RAX) |
(237) 0x42fa90 CMP %R11D,0x178(%RSP) |
(237) 0x42fa98 JGE 42fc0b |
(237) 0x42fa9e CMPL $0x2,0x158(%RSP) |
(237) 0x42faa6 JBE 430afc |
(237) 0x42faac LEA -0x20(%R13),%R9 |
(237) 0x42fab0 LEA (%R13,%R10,1),%R15 |
(237) 0x42fab5 MOV %R10,%RAX |
(237) 0x42fab8 SHR $0x5,%R9 |
(237) 0x42fabc INC %R9 |
(237) 0x42fabf AND $0x7,%R9D |
(237) 0x42fac3 JE 42fb4a |
(237) 0x42fac9 CMP $0x1,%R9 |
(237) 0x42facd JE 42fb37 |
(237) 0x42facf CMP $0x2,%R9 |
(237) 0x42fad3 JE 42fb29 |
(237) 0x42fad5 CMP $0x3,%R9 |
(237) 0x42fad9 JE 42fb1b |
(237) 0x42fadb CMP $0x4,%R9 |
(237) 0x42fadf JE 42fb0d |
(237) 0x42fae1 CMP $0x5,%R9 |
(237) 0x42fae5 JE 42faff |
(237) 0x42fae7 CMP $0x6,%R9 |
(237) 0x42faeb JNE 430ad6 |
(237) 0x42faf1 VBROADCASTSD (%RDX),%YMM2 |
(237) 0x42faf6 ADD $0x20,%RAX |
(237) 0x42fafa VMOVUPD %YMM2,-0x20(%RAX) |
(237) 0x42faff VBROADCASTSD (%RDX),%YMM3 |
(237) 0x42fb04 ADD $0x20,%RAX |
(237) 0x42fb08 VMOVUPD %YMM3,-0x20(%RAX) |
(237) 0x42fb0d VBROADCASTSD (%RDX),%YMM4 |
(237) 0x42fb12 ADD $0x20,%RAX |
(237) 0x42fb16 VMOVUPD %YMM4,-0x20(%RAX) |
(237) 0x42fb1b VBROADCASTSD (%RDX),%YMM5 |
(237) 0x42fb20 ADD $0x20,%RAX |
(237) 0x42fb24 VMOVUPD %YMM5,-0x20(%RAX) |
(237) 0x42fb29 VBROADCASTSD (%RDX),%YMM6 |
(237) 0x42fb2e ADD $0x20,%RAX |
(237) 0x42fb32 VMOVUPD %YMM6,-0x20(%RAX) |
(237) 0x42fb37 VBROADCASTSD (%RDX),%YMM7 |
(237) 0x42fb3c ADD $0x20,%RAX |
(237) 0x42fb40 VMOVUPD %YMM7,-0x20(%RAX) |
(237) 0x42fb45 CMP %R15,%RAX |
(237) 0x42fb48 JE 42fbb1 |
(238) 0x42fb4a VBROADCASTSD (%RDX),%YMM8 |
(238) 0x42fb4f ADD $0x100,%RAX |
(238) 0x42fb55 VMOVUPD %YMM8,-0x100(%RAX) |
(238) 0x42fb5d VBROADCASTSD (%RDX),%YMM9 |
(238) 0x42fb62 VMOVUPD %YMM9,-0xe0(%RAX) |
(238) 0x42fb6a VBROADCASTSD (%RDX),%YMM10 |
(238) 0x42fb6f VMOVUPD %YMM10,-0xc0(%RAX) |
(238) 0x42fb77 VBROADCASTSD (%RDX),%YMM11 |
(238) 0x42fb7c VMOVUPD %YMM11,-0xa0(%RAX) |
(238) 0x42fb84 VBROADCASTSD (%RDX),%YMM12 |
(238) 0x42fb89 VMOVUPD %YMM12,-0x80(%RAX) |
(238) 0x42fb8e VBROADCASTSD (%RDX),%YMM13 |
(238) 0x42fb93 VMOVUPD %YMM13,-0x60(%RAX) |
(238) 0x42fb98 VBROADCASTSD (%RDX),%YMM14 |
(238) 0x42fb9d VMOVUPD %YMM14,-0x40(%RAX) |
(238) 0x42fba2 VBROADCASTSD (%RDX),%YMM15 |
(238) 0x42fba7 VMOVUPD %YMM15,-0x20(%RAX) |
(238) 0x42fbac CMP %R15,%RAX |
(238) 0x42fbaf JNE 42fb4a |
(237) 0x42fbb1 MOV 0x150(%RSP),%EDI |
(237) 0x42fbb8 TEST %EDI,%EDI |
(237) 0x42fbba JE 42fc0b |
(237) 0x42fbbc MOV 0x134(%RSP),%EDI |
(237) 0x42fbc3 MOV 0x128(%RSP),%EAX |
(237) 0x42fbca MOV 0x148(%RSP),%R15D |
(237) 0x42fbd2 SUB %EDI,%R15D |
(237) 0x42fbd5 LEA 0x5(%R15),%R9D |
(237) 0x42fbd9 CMP $-0x4,%R15D |
(237) 0x42fbdd JE 42fbfd |
(237) 0x42fbdf LEA (%R12,%RCX,1),%R15 |
(237) 0x42fbe3 VMOVDDUP (%RDX),%XMM0 |
(237) 0x42fbe7 ADD %R15,%RDI |
(237) 0x42fbea VMOVUPD %XMM0,-0x10(%RSI,%RDI,8) |
(237) 0x42fbf0 TEST $0x1,%R9B |
(237) 0x42fbf4 JE 42fc0b |
(237) 0x42fbf6 AND $-0x2,%R9D |
(237) 0x42fbfa ADD %R9D,%EAX |
(237) 0x42fbfd VMOVSD (%RDX),%XMM1 |
(237) 0x42fc01 CLTQ |
(237) 0x42fc03 ADD %RCX,%RAX |
(237) 0x42fc06 VMOVSD %XMM1,(%RSI,%RAX,8) |
(237) 0x42fc0b MOV 0x168(%RSP),%EAX |
(237) 0x42fc12 MOV 0x160(%RSP),%R9 |
(237) 0x42fc1a KMOVB %K0,%EDI |
(237) 0x42fc1e MOV 0x100(%RSP),%R15 |
(237) 0x42fc26 CMP %EAX,%R11D |
(237) 0x42fc29 CMOVE %R11D,%EBX |
(237) 0x42fc2d CMOVE %EDI,%R14D |
(237) 0x42fc31 INC %R8D |
(237) 0x42fc34 ADD %R9,%R10 |
(237) 0x42fc37 ADD %R15,%RCX |
(237) 0x42fc3a CMP %R8D,0x170(%RSP) |
(237) 0x42fc42 JG 42fa90 |
0x42fc48 MOV %R14D,%R8D |
0x42fc4b MOV 0xd0(%RSP),%R12 |
0x42fc53 MOV 0xe0(%RSP),%R14D |
0x42fc5b MOV %EBX,0x108(%RSP) |
0x42fc62 TEST %R8B,%R8B |
0x42fc65 JE 430b70 |
0x42fc6b MOV %EBX,0x140(%R12) |
0x42fc73 VZEROUPPER |
0x42fc76 CALL 402220 <@plt_start@+0x200> |
0x42fc7b MOV 0x18(%R12),%RDX |
0x42fc80 MOV 0x10(%R12),%R11 |
0x42fc85 MOV (%RDX),%EAX |
0x42fc87 MOV (%R11),%ESI |
0x42fc8a ADD $0x3,%EAX |
0x42fc8d SUB $0x2,%ESI |
0x42fc90 SUB %ESI,%EAX |
0x42fc92 CLTD |
0x42fc93 IDIVL 0xc8(%RSP) |
0x42fc9a CMP %EDX,0xdc(%RSP) |
0x42fca1 JL 430b34 |
0x42fca7 MOV 0xdc(%RSP),%R8D |
0x42fcaf IMUL %EAX,%R8D |
0x42fcb3 ADD %EDX,%R8D |
0x42fcb6 ADD %R8D,%EAX |
0x42fcb9 CMP %EAX,%R8D |
0x42fcbc JGE 42ffa6 |
0x42fcc2 MOV (%R12),%RCX |
0x42fcc6 MOV 0x8(%R12),%R10 |
0x42fccb ADD %ESI,%R8D |
0x42fcce ADD %ESI,%EAX |
0x42fcd0 MOV 0x138(%RSP),%R13 |
0x42fcd8 MOV 0x50(%R12),%RSI |
0x42fcdd MOV %EAX,0x170(%RSP) |
0x42fce4 MOVSXD (%RCX),%R9 |
0x42fce7 MOVSXD %R8D,%RCX |
0x42fcea MOV (%R10),%EDI |
0x42fced MOV %R12,0xe0(%RSP) |
0x42fcf5 IMUL %R13,%RCX |
0x42fcf9 LEA (,%R13,8),%RAX |
0x42fd01 MOV 0x40(%RSP),%R13 |
0x42fd06 MOV 0x78(%R12),%RDX |
0x42fd0b MOV %R9,%R15 |
0x42fd0e LEA -0x2(%R9),%EBX |
0x42fd12 MOV %R9,0x108(%RSP) |
0x42fd1a LEA 0x3(%RDI),%R11D |
0x42fd1e LEA (%R9,%R13,1),%R9 |
0x42fd22 SUB %R15D,%EDI |
0x42fd25 MOV %RAX,0x160(%RSP) |
0x42fd2d ADD %RCX,%R9 |
0x42fd30 LEA 0x5(%RDI),%EAX |
0x42fd33 ADD %R13,%RCX |
0x42fd36 MOV %EDI,0x148(%RSP) |
0x42fd3d MOV %EAX,%R13D |
0x42fd40 LEA -0x10(%RSI,%R9,8),%R10 |
0x42fd45 MOV %EDI,%R9D |
0x42fd48 MOV %EAX,%EDI |
0x42fd4a AND $-0x4,%EDI |
0x42fd4d SHR $0x2,%R13D |
0x42fd51 LEA 0x5(%RBX,%R9,1),%R15D |
0x42fd56 MOV %EBX,0x178(%RSP) |
0x42fd5d MOV %EDI,0x134(%RSP) |
0x42fd64 SAL $0x5,%R13 |
0x42fd68 ADD %EBX,%EDI |
0x42fd6a CMP %R11D,%EBX |
0x42fd6d CMOVGE %EBX,%R15D |
0x42fd71 AND $0x3,%EAX |
0x42fd74 LEA 0x4(%R9),%EBX |
0x42fd78 MOV %EDI,0x128(%RSP) |
0x42fd7f MOV %EAX,0x150(%RSP) |
0x42fd86 XOR %EDI,%EDI |
0x42fd88 MOV 0x108(%RSP),%R12 |
0x42fd90 MOV $0x1,%R9D |
0x42fd96 MOV %R15D,0x168(%RSP) |
0x42fd9e KMOVB %R9D,%K2 |
0x42fda3 MOV %EBX,0x158(%RSP) |
0x42fdaa MOV 0xf0(%RSP),%EBX |
0x42fdb1 MOV %R14D,0xe8(%RSP) |
0x42fdb9 MOV %EDI,%R14D |
0x42fdbc NOPL (%RAX) |
(235) 0x42fdc0 CMP %R11D,0x178(%RSP) |
(235) 0x42fdc8 JGE 42ff3b |
(235) 0x42fdce CMPL $0x2,0x158(%RSP) |
(235) 0x42fdd6 JBE 430b18 |
(235) 0x42fddc LEA -0x20(%R13),%R9 |
(235) 0x42fde0 LEA (%R13,%R10,1),%R15 |
(235) 0x42fde5 MOV %R10,%RAX |
(235) 0x42fde8 SHR $0x5,%R9 |
(235) 0x42fdec INC %R9 |
(235) 0x42fdef AND $0x7,%R9D |
(235) 0x42fdf3 JE 42fe7a |
(235) 0x42fdf9 CMP $0x1,%R9 |
(235) 0x42fdfd JE 42fe67 |
(235) 0x42fdff CMP $0x2,%R9 |
(235) 0x42fe03 JE 42fe59 |
(235) 0x42fe05 CMP $0x3,%R9 |
(235) 0x42fe09 JE 42fe4b |
(235) 0x42fe0b CMP $0x4,%R9 |
(235) 0x42fe0f JE 42fe3d |
(235) 0x42fe11 CMP $0x5,%R9 |
(235) 0x42fe15 JE 42fe2f |
(235) 0x42fe17 CMP $0x6,%R9 |
(235) 0x42fe1b JNE 430ac3 |
(235) 0x42fe21 VBROADCASTSD (%RDX),%YMM3 |
(235) 0x42fe26 ADD $0x20,%RAX |
(235) 0x42fe2a VMOVUPD %YMM3,-0x20(%RAX) |
(235) 0x42fe2f VBROADCASTSD (%RDX),%YMM4 |
(235) 0x42fe34 ADD $0x20,%RAX |
(235) 0x42fe38 VMOVUPD %YMM4,-0x20(%RAX) |
(235) 0x42fe3d VBROADCASTSD (%RDX),%YMM5 |
(235) 0x42fe42 ADD $0x20,%RAX |
(235) 0x42fe46 VMOVUPD %YMM5,-0x20(%RAX) |
(235) 0x42fe4b VBROADCASTSD (%RDX),%YMM6 |
(235) 0x42fe50 ADD $0x20,%RAX |
(235) 0x42fe54 VMOVUPD %YMM6,-0x20(%RAX) |
(235) 0x42fe59 VBROADCASTSD (%RDX),%YMM7 |
(235) 0x42fe5e ADD $0x20,%RAX |
(235) 0x42fe62 VMOVUPD %YMM7,-0x20(%RAX) |
(235) 0x42fe67 VBROADCASTSD (%RDX),%YMM8 |
(235) 0x42fe6c ADD $0x20,%RAX |
(235) 0x42fe70 VMOVUPD %YMM8,-0x20(%RAX) |
(235) 0x42fe75 CMP %R15,%RAX |
(235) 0x42fe78 JE 42fee1 |
(236) 0x42fe7a VBROADCASTSD (%RDX),%YMM9 |
(236) 0x42fe7f ADD $0x100,%RAX |
(236) 0x42fe85 VMOVUPD %YMM9,-0x100(%RAX) |
(236) 0x42fe8d VBROADCASTSD (%RDX),%YMM10 |
(236) 0x42fe92 VMOVUPD %YMM10,-0xe0(%RAX) |
(236) 0x42fe9a VBROADCASTSD (%RDX),%YMM11 |
(236) 0x42fe9f VMOVUPD %YMM11,-0xc0(%RAX) |
(236) 0x42fea7 VBROADCASTSD (%RDX),%YMM12 |
(236) 0x42feac VMOVUPD %YMM12,-0xa0(%RAX) |
(236) 0x42feb4 VBROADCASTSD (%RDX),%YMM13 |
(236) 0x42feb9 VMOVUPD %YMM13,-0x80(%RAX) |
(236) 0x42febe VBROADCASTSD (%RDX),%YMM14 |
(236) 0x42fec3 VMOVUPD %YMM14,-0x60(%RAX) |
(236) 0x42fec8 VBROADCASTSD (%RDX),%YMM15 |
(236) 0x42fecd VMOVUPD %YMM15,-0x40(%RAX) |
(236) 0x42fed2 VBROADCASTSD (%RDX),%YMM0 |
(236) 0x42fed7 VMOVUPD %YMM0,-0x20(%RAX) |
(236) 0x42fedc CMP %R15,%RAX |
(236) 0x42fedf JNE 42fe7a |
(235) 0x42fee1 MOV 0x150(%RSP),%EDI |
(235) 0x42fee8 TEST %EDI,%EDI |
(235) 0x42feea JE 42ff3b |
(235) 0x42feec MOV 0x134(%RSP),%EDI |
(235) 0x42fef3 MOV 0x128(%RSP),%EAX |
(235) 0x42fefa MOV 0x148(%RSP),%R15D |
(235) 0x42ff02 SUB %EDI,%R15D |
(235) 0x42ff05 LEA 0x5(%R15),%R9D |
(235) 0x42ff09 CMP $-0x4,%R15D |
(235) 0x42ff0d JE 42ff2d |
(235) 0x42ff0f LEA (%R12,%RCX,1),%R15 |
(235) 0x42ff13 VMOVDDUP (%RDX),%XMM1 |
(235) 0x42ff17 ADD %R15,%RDI |
(235) 0x42ff1a VMOVUPD %XMM1,-0x10(%RSI,%RDI,8) |
(235) 0x42ff20 TEST $0x1,%R9B |
(235) 0x42ff24 JE 42ff3b |
(235) 0x42ff26 AND $-0x2,%R9D |
(235) 0x42ff2a ADD %R9D,%EAX |
(235) 0x42ff2d VMOVSD (%RDX),%XMM2 |
(235) 0x42ff31 CLTQ |
(235) 0x42ff33 ADD %RCX,%RAX |
(235) 0x42ff36 VMOVSD %XMM2,(%RSI,%RAX,8) |
(235) 0x42ff3b MOV 0x168(%RSP),%EAX |
(235) 0x42ff42 MOV 0x160(%RSP),%R9 |
(235) 0x42ff4a KMOVB %K2,%EDI |
(235) 0x42ff4e MOV 0x138(%RSP),%R15 |
(235) 0x42ff56 CMP %EAX,%R11D |
(235) 0x42ff59 CMOVE %R11D,%EBX |
(235) 0x42ff5d CMOVE %EDI,%R14D |
(235) 0x42ff61 INC %R8D |
(235) 0x42ff64 ADD %R9,%R10 |
(235) 0x42ff67 ADD %R15,%RCX |
(235) 0x42ff6a CMP %R8D,0x170(%RSP) |
(235) 0x42ff72 JG 42fdc0 |
0x42ff78 MOV %R14D,%R8D |
0x42ff7b MOV 0xe0(%RSP),%R12 |
0x42ff83 MOV 0xe8(%RSP),%R14D |
0x42ff8b MOV %EBX,0xf0(%RSP) |
0x42ff92 TEST %R8B,%R8B |
0x42ff95 JE 430b60 |
0x42ff9b MOV %EBX,0x140(%R12) |
0x42ffa3 VZEROUPPER |
0x42ffa6 CALL 402220 <@plt_start@+0x200> |
0x42ffab MOV 0x18(%R12),%RDX |
0x42ffb0 MOV 0x10(%R12),%R11 |
0x42ffb5 MOV (%RDX),%EAX |
0x42ffb7 MOV (%R11),%ESI |
0x42ffba ADD $0x3,%EAX |
0x42ffbd SUB $0x2,%ESI |
0x42ffc0 SUB %ESI,%EAX |
0x42ffc2 CLTD |
0x42ffc3 IDIVL 0xc8(%RSP) |
0x42ffca CMP %EDX,0xdc(%RSP) |
0x42ffd1 JL 430b4f |
0x42ffd7 MOV 0xdc(%RSP),%R8D |
0x42ffdf IMUL %EAX,%R8D |
0x42ffe3 ADD %EDX,%R8D |
0x42ffe6 ADD %R8D,%EAX |
0x42ffe9 CMP %EAX,%R8D |
0x42ffec JGE 4302af |
0x42fff2 MOV (%R12),%RCX |
0x42fff6 MOV 0x8(%R12),%R13 |
0x42fffb ADD %ESI,%EAX |
0x42fffd ADD %ESI,%R8D |
0x430000 MOV 0x140(%RSP),%R9 |
0x430008 MOV 0x58(%R12),%RSI |
0x43000d MOV %EAX,0x170(%RSP) |
0x430014 MOVSXD (%RCX),%R10 |
0x430017 MOV (%R13),%EDI |
0x43001b MOVSXD %R8D,%RCX |
0x43001e MOV %R12,0x108(%RSP) |
0x430026 IMUL %R9,%RCX |
0x43002a MOV 0x48(%RSP),%R13 |
0x43002f LEA (,%R9,8),%RBX |
0x430037 MOV 0x80(%R12),%RDX |
0x43003f MOV %R10,%RAX |
0x430042 LEA 0x3(%RDI),%R11D |
0x430046 LEA -0x2(%R10),%R15D |
0x43004a MOV %RBX,0x160(%RSP) |
0x430052 SUB %EAX,%EDI |
0x430054 MOV %R10,%RBX |
0x430057 LEA (%R10,%R13,1),%R10 |
0x43005b MOV %R15D,0x178(%RSP) |
0x430063 LEA 0x5(%RDI),%EAX |
0x430066 MOV %EDI,%R9D |
0x430069 MOV %EDI,0x148(%RSP) |
0x430070 ADD %RCX,%R10 |
0x430073 MOV %EAX,%EDI |
0x430075 ADD %R13,%RCX |
0x430078 LEA -0x10(%RSI,%R10,8),%R10 |
0x43007d MOV %EAX,%R13D |
0x430080 AND $-0x4,%EDI |
0x430083 SHR $0x2,%R13D |
0x430087 MOV %EDI,0x128(%RSP) |
0x43008e ADD %R15D,%EDI |
0x430091 SAL $0x5,%R13 |
0x430095 CMP %R11D,%R15D |
0x430098 MOV %EDI,0x134(%RSP) |
0x43009f LEA 0x5(%R15,%R9,1),%EDI |
0x4300a4 LEA 0x4(%R9),%R9D |
0x4300a8 CMOVGE %R15D,%EDI |
0x4300ac MOV %R9D,0x158(%RSP) |
0x4300b4 AND $0x3,%EAX |
0x4300b7 XOR %R15D,%R15D |
0x4300ba MOV %EAX,0x150(%RSP) |
0x4300c1 MOV %R15D,%R12D |
0x4300c4 MOV $0x1,%EAX |
0x4300c9 MOV %EDI,0x168(%RSP) |
0x4300d0 KMOVB %EAX,%K3 |
0x4300d4 NOPL (%RAX) |
(233) 0x4300d8 CMP %R11D,0x178(%RSP) |
(233) 0x4300e0 JGE 430253 |
(233) 0x4300e6 CMPL $0x2,0x158(%RSP) |
(233) 0x4300ee JBE 430b0a |
(233) 0x4300f4 LEA -0x20(%R13),%R9 |
(233) 0x4300f8 LEA (%R13,%R10,1),%R15 |
(233) 0x4300fd MOV %R10,%RAX |
(233) 0x430100 SHR $0x5,%R9 |
(233) 0x430104 INC %R9 |
(233) 0x430107 AND $0x7,%R9D |
(233) 0x43010b JE 430192 |
(233) 0x430111 CMP $0x1,%R9 |
(233) 0x430115 JE 43017f |
(233) 0x430117 CMP $0x2,%R9 |
(233) 0x43011b JE 430171 |
(233) 0x43011d CMP $0x3,%R9 |
(233) 0x430121 JE 430163 |
(233) 0x430123 CMP $0x4,%R9 |
(233) 0x430127 JE 430155 |
(233) 0x430129 CMP $0x5,%R9 |
(233) 0x43012d JE 430147 |
(233) 0x43012f CMP $0x6,%R9 |
(233) 0x430133 JNE 430ab0 |
(233) 0x430139 VBROADCASTSD (%RDX),%YMM4 |
(233) 0x43013e ADD $0x20,%RAX |
(233) 0x430142 VMOVUPD %YMM4,-0x20(%RAX) |
(233) 0x430147 VBROADCASTSD (%RDX),%YMM5 |
(233) 0x43014c ADD $0x20,%RAX |
(233) 0x430150 VMOVUPD %YMM5,-0x20(%RAX) |
(233) 0x430155 VBROADCASTSD (%RDX),%YMM6 |
(233) 0x43015a ADD $0x20,%RAX |
(233) 0x43015e VMOVUPD %YMM6,-0x20(%RAX) |
(233) 0x430163 VBROADCASTSD (%RDX),%YMM7 |
(233) 0x430168 ADD $0x20,%RAX |
(233) 0x43016c VMOVUPD %YMM7,-0x20(%RAX) |
(233) 0x430171 VBROADCASTSD (%RDX),%YMM8 |
(233) 0x430176 ADD $0x20,%RAX |
(233) 0x43017a VMOVUPD %YMM8,-0x20(%RAX) |
(233) 0x43017f VBROADCASTSD (%RDX),%YMM9 |
(233) 0x430184 ADD $0x20,%RAX |
(233) 0x430188 VMOVUPD %YMM9,-0x20(%RAX) |
(233) 0x43018d CMP %R15,%RAX |
(233) 0x430190 JE 4301f9 |
(234) 0x430192 VBROADCASTSD (%RDX),%YMM10 |
(234) 0x430197 ADD $0x100,%RAX |
(234) 0x43019d VMOVUPD %YMM10,-0x100(%RAX) |
(234) 0x4301a5 VBROADCASTSD (%RDX),%YMM11 |
(234) 0x4301aa VMOVUPD %YMM11,-0xe0(%RAX) |
(234) 0x4301b2 VBROADCASTSD (%RDX),%YMM12 |
(234) 0x4301b7 VMOVUPD %YMM12,-0xc0(%RAX) |
(234) 0x4301bf VBROADCASTSD (%RDX),%YMM13 |
(234) 0x4301c4 VMOVUPD %YMM13,-0xa0(%RAX) |
(234) 0x4301cc VBROADCASTSD (%RDX),%YMM14 |
(234) 0x4301d1 VMOVUPD %YMM14,-0x80(%RAX) |
(234) 0x4301d6 VBROADCASTSD (%RDX),%YMM15 |
(234) 0x4301db VMOVUPD %YMM15,-0x60(%RAX) |
(234) 0x4301e0 VBROADCASTSD (%RDX),%YMM0 |
(234) 0x4301e5 VMOVUPD %YMM0,-0x40(%RAX) |
(234) 0x4301ea VBROADCASTSD (%RDX),%YMM1 |
(234) 0x4301ef VMOVUPD %YMM1,-0x20(%RAX) |
(234) 0x4301f4 CMP %R15,%RAX |
(234) 0x4301f7 JNE 430192 |
(233) 0x4301f9 MOV 0x150(%RSP),%EDI |
(233) 0x430200 TEST %EDI,%EDI |
(233) 0x430202 JE 430253 |
(233) 0x430204 MOV 0x128(%RSP),%EDI |
(233) 0x43020b MOV 0x134(%RSP),%EAX |
(233) 0x430212 MOV 0x148(%RSP),%R15D |
(233) 0x43021a SUB %EDI,%R15D |
(233) 0x43021d LEA 0x5(%R15),%R9D |
(233) 0x430221 CMP $-0x4,%R15D |
(233) 0x430225 JE 430245 |
(233) 0x430227 LEA (%RBX,%RCX,1),%R15 |
(233) 0x43022b VMOVDDUP (%RDX),%XMM2 |
(233) 0x43022f ADD %R15,%RDI |
(233) 0x430232 VMOVUPD %XMM2,-0x10(%RSI,%RDI,8) |
(233) 0x430238 TEST $0x1,%R9B |
(233) 0x43023c JE 430253 |
(233) 0x43023e AND $-0x2,%R9D |
(233) 0x430242 ADD %R9D,%EAX |
(233) 0x430245 VMOVSD (%RDX),%XMM3 |
(233) 0x430249 CLTQ |
(233) 0x43024b ADD %RCX,%RAX |
(233) 0x43024e VMOVSD %XMM3,(%RSI,%RAX,8) |
(233) 0x430253 MOV 0x168(%RSP),%EAX |
(233) 0x43025a MOV 0x160(%RSP),%R9 |
(233) 0x430262 KMOVB %K3,%EDI |
(233) 0x430266 MOV 0x140(%RSP),%R15 |
(233) 0x43026e CMP %EAX,%R11D |
(233) 0x430271 CMOVE %R11D,%R14D |
(233) 0x430275 CMOVE %EDI,%R12D |
(233) 0x430279 INC %R8D |
(233) 0x43027c ADD %R9,%R10 |
(233) 0x43027f ADD %R15,%RCX |
(233) 0x430282 CMP %R8D,0x170(%RSP) |
(233) 0x43028a JG 4300d8 |
0x430290 MOV %R12D,%R8D |
0x430293 MOV 0x108(%RSP),%R12 |
0x43029b TEST %R8B,%R8B |
0x43029e JE 430b58 |
0x4302a4 MOV %R14D,0x140(%R12) |
0x4302ac VZEROUPPER |
0x4302af CALL 402220 <@plt_start@+0x200> |
0x4302b4 MOV 0x60(%R12),%R14 |
0x4302b9 MOV (%R14),%R11D |
0x4302bc CMP $0x1,%R11D |
0x4302c0 JLE 430aa1 |
0x4302c6 MOV 0x120(%RSP),%RCX |
0x4302ce MOV 0x100(%RSP),%RDX |
0x4302d6 MOV %R11,0x58(%RSP) |
0x4302db MOV 0x118(%RSP),%RSI |
0x4302e3 MOV 0x110(%RSP),%R10 |
0x4302eb MOV 0x38(%RSP),%R13 |
0x4302f0 NEG %RDX |
0x4302f3 LEA -0x1(%RCX),%RDI |
0x4302f7 SUB %RCX,%RSI |
0x4302fa SAL $0x3,%RDX |
0x4302fe MOV %RDI,0x8(%RSP) |
0x430303 SUB %R13,%R10 |
0x430306 LEA (,%RSI,8),%RBX |
0x43030e MOV %RDX,0xd0(%RSP) |
0x430316 LEA (,%R10,8),%RAX |
0x43031e MOV %RBX,0x18(%RSP) |
0x430323 MOV $0x1,%EBX |
0x430328 MOV %RAX,0x10(%RSP) |
0x43032d JMP 430346 |
0x43032f NOP |
(230) 0x430330 CALL 402220 <@plt_start@+0x200> |
(230) 0x430335 MOV 0x58(%RSP),%R13 |
(230) 0x43033a INC %RBX |
(230) 0x43033d CMP %R13,%RBX |
(230) 0x430340 JE 430aa1 |
(230) 0x430346 MOV 0x10(%R12),%R8 |
(230) 0x43034b MOV 0x18(%R12),%R11 |
(230) 0x430350 MOV 0x88(%R12),%R9 |
(230) 0x430358 MOV 0x98(%R12),%R15 |
(230) 0x430360 MOV (%R8),%R14D |
(230) 0x430363 MOV (%R11),%EAX |
(230) 0x430366 VMOVSD (%R9,%RBX,8),%XMM2 |
(230) 0x43036c VMOVSD (%R15,%RBX,8),%XMM3 |
(230) 0x430372 MOV %R9,0x158(%RSP) |
(230) 0x43037a SUB $0x2,%R14D |
(230) 0x43037e ADD $0x3,%EAX |
(230) 0x430381 MOV %R15,0xb0(%RSP) |
(230) 0x430389 SUB %R14D,%EAX |
(230) 0x43038c VUNPCKLPD %XMM2,%XMM3,%XMM4 |
(230) 0x430390 CLTD |
(230) 0x430391 VMOVUPD %XMM4,0x130(%R12) |
(230) 0x43039b IDIVL 0xc8(%RSP) |
(230) 0x4303a2 CMP %EDX,0xdc(%RSP) |
(230) 0x4303a9 JL 430a98 |
(230) 0x4303af MOV 0xdc(%RSP),%ESI |
(230) 0x4303b6 IMUL %EAX,%ESI |
(230) 0x4303b9 ADD %ESI,%EDX |
(230) 0x4303bb ADD %EDX,%EAX |
(230) 0x4303bd CMP %EAX,%EDX |
(230) 0x4303bf JGE 430330 |
(230) 0x4303c5 MOV (%R12),%RCX |
(230) 0x4303c9 MOV 0x8(%R12),%R10 |
(230) 0x4303ce LEA (%R14,%RDX,1),%R13D |
(230) 0x4303d2 ADD %R14D,%EAX |
(230) 0x4303d5 KXORB %K4,%K4,%K4 |
(230) 0x4303d9 MOV 0xb8(%R12),%R11 |
(230) 0x4303e1 MOV 0xc8(%R12),%RDX |
(230) 0x4303e9 MOV %EAX,0xd8(%RSP) |
(230) 0x4303f0 MOV (%RCX),%R9D |
(230) 0x4303f3 MOV 0x50(%R12),%RCX |
(230) 0x4303f8 MOV %R13D,0x160(%RSP) |
(230) 0x430400 MOV (%R10),%R8D |
(230) 0x430403 MOV 0xc0(%R12),%RAX |
(230) 0x43040b MOV %R11,0xa0(%RSP) |
(230) 0x430413 MOV 0x90(%R12),%R11 |
(230) 0x43041b MOV 0x80(%R12),%R10 |
(230) 0x430423 MOV %RCX,0xc0(%RSP) |
(230) 0x43042b LEA -0x2(%R9),%EDI |
(230) 0x43042f MOV 0x100(%RSP),%RCX |
(230) 0x430437 MOV 0xb0(%R12),%R14 |
(230) 0x43043f MOV %RDX,0x168(%RSP) |
(230) 0x430447 MOVSXD %R13D,%RDX |
(230) 0x43044a MOV 0x8(%RSP),%R13 |
(230) 0x43044f LEA 0x3(%R8),%R15D |
(230) 0x430453 MOV 0x78(%R12),%RSI |
(230) 0x430458 MOV %RAX,0x178(%RSP) |
(230) 0x430460 IMUL %RDX,%RCX |
(230) 0x430464 MOVSXD %R9D,%RAX |
(230) 0x430467 MOV %R11,0xf0(%RSP) |
(230) 0x43046f LEA 0x4(%R8),%R11D |
(230) 0x430473 SUB %R9D,%R11D |
(230) 0x430476 MOV %R10,0x68(%RSP) |
(230) 0x43047b LEA (%R13,%RAX,1),%R10 |
(230) 0x430480 MOV 0x20(%R12),%R13 |
(230) 0x430485 ADD %R11,%R10 |
(230) 0x430488 MOV %R15D,0x134(%RSP) |
(230) 0x430490 MOV 0x58(%R12),%R15 |
(230) 0x430495 ADD %RCX,%R10 |
(230) 0x430498 MOV 0xd0(%RSP),%RCX |
(230) 0x4304a0 MOV %R14,0xa8(%RSP) |
(230) 0x4304a8 MOV 0xa8(%R12),%R14 |
(230) 0x4304b0 MOV %RSI,0x50(%RSP) |
(230) 0x4304b5 IMUL %RDX,%RCX |
(230) 0x4304b9 MOV 0x18(%RSP),%RSI |
(230) 0x4304be MOV %R15,0xb8(%RSP) |
(230) 0x4304c6 MOV %R14,0x110(%RSP) |
(230) 0x4304ce MOV 0x38(%RSP),%R15 |
(230) 0x4304d3 MOV 0x138(%RSP),%R14 |
(230) 0x4304db MOV %EDI,0xe0(%RSP) |
(230) 0x4304e2 ADD %RSI,%RCX |
(230) 0x4304e5 MOV 0x48(%RSP),%RSI |
(230) 0x4304ea LEA (%RDX,%R15,1),%R15 |
(230) 0x4304ee IMUL %RDX,%R14 |
(230) 0x4304f2 ADD %RCX,%R13 |
(230) 0x4304f5 MOV 0x40(%RSP),%RCX |
(230) 0x4304fa LEA (%R14,%RCX,1),%R14 |
(230) 0x4304fe MOV 0x140(%RSP),%RCX |
(230) 0x430506 IMUL %RDX,%RCX |
(230) 0x43050a ADD %RSI,%RCX |
(230) 0x43050d MOVSXD %EDI,%RSI |
(230) 0x430510 MOV 0xf8(%RSP),%RDI |
(230) 0x430518 MOV %RCX,0x128(%RSP) |
(230) 0x430520 MOV 0x30(%RSP),%RCX |
(230) 0x430525 IMUL %RDI,%RDX |
(230) 0x430529 MOV 0x30(%R12),%RDI |
(230) 0x43052e ADD %RSI,%RCX |
(230) 0x430531 ADD %RDX,%RCX |
(230) 0x430534 MOV 0x20(%RSP),%RDX |
(230) 0x430539 MOV %RCX,0x120(%RSP) |
(230) 0x430541 LEA (,%RAX,8),%RCX |
(230) 0x430549 ADD %RAX,%RDX |
(230) 0x43054c ADD %R11,%RDX |
(230) 0x43054f LEA (%RDI,%RDX,8),%RDX |
(230) 0x430553 MOV 0x10(%RSP),%RDI |
(230) 0x430558 MOV %RDX,0x98(%RSP) |
(230) 0x430560 MOV $0x1,%EDX |
(230) 0x430565 ADD 0x38(%R12),%RDI |
(230) 0x43056a MOV %RDI,0x108(%RSP) |
(230) 0x430572 MOV 0xe0(%RSP),%EDI |
(230) 0x430579 LEA 0x5(%RDI,%R8,1),%R8D |
(230) 0x43057e SUB %R9D,%R8D |
(230) 0x430581 CMP %EDI,0x134(%RSP) |
(230) 0x430588 MOV 0xc0(%RSP),%R9 |
(230) 0x430590 CMOVLE %EDI,%R8D |
(230) 0x430594 SUB %RAX,%RDX |
(230) 0x430597 MOV %RDX,%RDI |
(230) 0x43059a ADD %RSI,%RDI |
(230) 0x43059d MOV %R8D,0xcc(%RSP) |
(230) 0x4305a5 MOV 0xb8(%RSP),%RSI |
(230) 0x4305ad SUB %R11,%RDI |
(230) 0x4305b0 LEA -0x10(%R9,%RCX,1),%R11 |
(230) 0x4305b5 MOV 0x40(%RSP),%R8 |
(230) 0x4305ba LEA (,%RBX,8),%R9 |
(230) 0x4305c2 MOV %RDI,0x90(%RSP) |
(230) 0x4305ca MOV 0x48(%RSP),%RDI |
(230) 0x4305cf LEA -0x10(%RSI,%RCX,1),%RCX |
(230) 0x4305d4 MOV %R11,0x88(%RSP) |
(230) 0x4305dc MOV 0x50(%RSP),%R11 |
(230) 0x4305e1 LEA (%RAX,%R8,1),%RDX |
(230) 0x4305e5 LEA (%RAX,%RDI,1),%RAX |
(230) 0x4305e9 MOV %RCX,0x80(%RSP) |
(230) 0x4305f1 ADD %R9,%R11 |
(230) 0x4305f4 MOV %RDX,0x78(%RSP) |
(230) 0x4305f9 MOV %RAX,0x70(%RSP) |
(230) 0x4305fe MOV %R9,0x60(%RSP) |
(230) 0x430603 MOV %R11,0xe8(%RSP) |
(230) 0x43060b NOPL (%RAX,%RAX,1) |
(231) 0x430610 MOV 0xe0(%RSP),%ESI |
(231) 0x430617 INCL 0x160(%RSP) |
(231) 0x43061e CMP %ESI,0x134(%RSP) |
(231) 0x430625 JLE 430a80 |
(231) 0x43062b MOV 0xa8(%RSP),%RCX |
(231) 0x430633 MOV 0xa0(%RSP),%RDX |
(231) 0x43063b MOV %R14,0x118(%RSP) |
(231) 0x430643 MOV 0x90(%RSP),%RDI |
(231) 0x43064b MOV 0x88(%RSP),%RAX |
(231) 0x430653 MOV (%RCX,%RBX,4),%R8D |
(231) 0x430657 MOV (%RDX),%R11D |
(231) 0x43065a MOV 0x138(%RSP),%RCX |
(231) 0x430662 MOVSXD 0x160(%RSP),%RDX |
(231) 0x43066a ADD %R10,%RDI |
(231) 0x43066d MOV 0x80(%RSP),%R9 |
(231) 0x430675 MOV 0x128(%RSP),%RSI |
(231) 0x43067d MOV %RDI,0x170(%RSP) |
(231) 0x430685 LEA (%RAX,%R14,8),%RDI |
(231) 0x430689 IMUL %RDX,%RCX |
(231) 0x43068d MOV 0x78(%RSP),%RAX |
(231) 0x430692 LEA (%R9,%RSI,8),%RSI |
(231) 0x430696 MOV 0xc0(%RSP),%R9 |
(231) 0x43069e ADD %RAX,%RCX |
(231) 0x4306a1 MOV 0x140(%RSP),%RAX |
(231) 0x4306a9 LEA -0x10(%R9,%RCX,8),%RCX |
(231) 0x4306ae MOV 0x70(%RSP),%R9 |
(231) 0x4306b3 IMUL %RAX,%RDX |
(231) 0x4306b7 MOV 0xb8(%RSP),%RAX |
(231) 0x4306bf ADD %R9,%RDX |
(231) 0x4306c2 MOV %R10,%R9 |
(231) 0x4306c5 LEA -0x10(%RAX,%RDX,8),%RDX |
(231) 0x4306ca MOV 0x98(%RSP),%RAX |
(231) 0x4306d2 NEG %R9 |
(231) 0x4306d5 LEA -0x8(%RAX,%R9,8),%R9 |
(231) 0x4306da LEA 0x1(%R15),%RAX |
(231) 0x4306de MOV %R9,0x148(%RSP) |
(231) 0x4306e6 MOV 0x120(%RSP),%R9 |
(231) 0x4306ee MOV %RAX,0x150(%RSP) |
(231) 0x4306f6 MOV 0x170(%RSP),%RAX |
(231) 0x4306fe MOV %R15,0x170(%RSP) |
(231) 0x430706 JMP 430751 |
0x430708 NOPL (%RAX,%RAX,1) |
(232) 0x430710 MOV 0x178(%RSP),%R14 |
(232) 0x430718 CMP (%R14),%R8D |
(232) 0x43071b JE 430870 |
(232) 0x430721 MOV 0x168(%RSP),%R15 |
(232) 0x430729 CMP (%R15),%R8D |
(232) 0x43072c JE 430930 |
(232) 0x430732 INC %RAX |
(232) 0x430735 INC %R9 |
(232) 0x430738 ADD $0x8,%RDI |
(232) 0x43073c ADD $0x8,%RSI |
(232) 0x430740 ADD $0x8,%RCX |
(232) 0x430744 ADD $0x8,%RDX |
(232) 0x430748 CMP %R10,%RAX |
(232) 0x43074b JE 4309c0 |
(232) 0x430751 CMP %R11D,%R8D |
(232) 0x430754 JNE 430710 |
(232) 0x430756 VMOVSD 0x8(%R13,%RAX,8),%XMM7 |
(232) 0x43075d MOV 0x158(%RSP),%R14 |
(232) 0x430765 VCOMISD (%R14,%RBX,8),%XMM7 |
(232) 0x43076b JB 430732 |
(232) 0x43076d MOV 0xf0(%RSP),%R15 |
(232) 0x430775 VMOVSD (%R15,%RBX,8),%XMM8 |
(232) 0x43077b VCOMISD (%R13,%RAX,8),%XMM8 |
(232) 0x430782 JBE 430732 |
(232) 0x430784 MOV 0x150(%RSP),%R15 |
(232) 0x43078c MOV 0x28(%R12),%R14 |
(232) 0x430791 VMOVSD (%R14,%R15,8),%XMM9 |
(232) 0x430797 MOV 0xb0(%RSP),%R15 |
(232) 0x43079f VCOMISD (%R15,%RBX,8),%XMM9 |
(232) 0x4307a5 JB 430732 |
(232) 0x4307a7 MOV 0xa0(%R12),%R15 |
(232) 0x4307af VMOVSD (%R15,%RBX,8),%XMM10 |
(232) 0x4307b5 MOV 0x170(%RSP),%R15 |
(232) 0x4307bd VCOMISD (%R14,%R15,8),%XMM10 |
(232) 0x4307c3 JBE 430732 |
(232) 0x4307c9 MOV 0x70(%R12),%R14 |
(232) 0x4307ce MOV 0x48(%R12),%R15 |
(232) 0x4307d3 VMOVSD (%R14,%RBX,8),%XMM11 |
(232) 0x4307d9 MOV 0x68(%R12),%R14 |
(232) 0x4307de VMOVSD %XMM11,(%R15,%R9,8) |
(232) 0x4307e4 MOV 0x40(%R12),%R15 |
(232) 0x4307e9 VMOVSD (%R14,%RBX,8),%XMM12 |
(232) 0x4307ef LEA (,%RBX,8),%R14 |
(232) 0x4307f7 VMOVSD %XMM12,(%R15,%RAX,8) |
(232) 0x4307fd MOV 0x50(%RSP),%R15 |
(232) 0x430802 ADD %R14,%R15 |
(232) 0x430805 VMOVSD (%R15),%XMM13 |
(232) 0x43080a MOV %R15,0x28(%RSP) |
(232) 0x43080f MOV 0x68(%RSP),%R15 |
(232) 0x430814 VMOVSD %XMM13,(%RDI) |
(232) 0x430818 ADD %R15,%R14 |
(232) 0x43081b MOV 0x28(%RSP),%R15 |
(232) 0x430820 VMOVSD (%R14),%XMM14 |
(232) 0x430825 VMOVSD %XMM14,(%RSI) |
(232) 0x430829 NOPL (%RAX) |
(232) 0x430830 VMOVSD (%R15),%XMM15 |
(232) 0x430835 VMOVSD %XMM15,0x8(%RDI) |
(232) 0x43083a VMOVSD (%R14),%XMM0 |
(232) 0x43083f VMOVSD %XMM0,0x8(%RSI) |
(232) 0x430844 VMOVSD (%R15),%XMM1 |
(232) 0x430849 VMOVSD %XMM1,(%RCX) |
(232) 0x43084d VMOVSD (%R14),%XMM4 |
(232) 0x430852 VMOVSD %XMM4,(%RDX) |
(232) 0x430856 VMOVSD (%R15),%XMM5 |
(232) 0x43085b VMOVSD %XMM5,0x8(%RCX) |
(232) 0x430860 VMOVSD (%R14),%XMM6 |
(232) 0x430865 VMOVSD %XMM6,0x8(%RDX) |
(232) 0x43086a JMP 430732 |
0x43086f NOP |
(232) 0x430870 MOV 0x148(%RSP),%R14 |
(232) 0x430878 MOV 0x170(%RSP),%R15 |
(232) 0x430880 VMOVSD (%R14,%RAX,8),%XMM9 |
(232) 0x430886 MOV 0x108(%RSP),%R14 |
(232) 0x43088e VMOVSD (%R14,%R15,8),%XMM11 |
(232) 0x430894 VSUBSD %XMM2,%XMM9,%XMM10 |
(232) 0x430898 MOV 0x110(%RSP),%R14 |
(232) 0x4308a0 VSUBSD %XMM3,%XMM11,%XMM12 |
(232) 0x4308a4 VUNPCKLPD %XMM12,%XMM10,%XMM13 |
(232) 0x4308a9 VMULPD %XMM13,%XMM13,%XMM14 |
(232) 0x4308ae VUNPCKHPD %XMM14,%XMM14,%XMM15 |
(232) 0x4308b3 VADDPD %XMM14,%XMM15,%XMM0 |
(232) 0x4308b8 VSQRTSD %XMM0,%XMM0,%XMM0 |
(232) 0x4308bc VCOMISD (%R14,%RBX,8),%XMM0 |
(232) 0x4308c2 JA 430732 |
(232) 0x4308c8 MOV 0x70(%R12),%R15 |
(232) 0x4308cd MOV 0x48(%R12),%R14 |
(232) 0x4308d2 VMOVSD (%R15,%RBX,8),%XMM1 |
(232) 0x4308d8 MOV 0x68(%R12),%R15 |
(232) 0x4308dd VMOVSD %XMM1,(%R14,%R9,8) |
(232) 0x4308e3 MOV 0x40(%R12),%R14 |
(232) 0x4308e8 VMOVSD (%R15,%RBX,8),%XMM4 |
(232) 0x4308ee MOV 0xe8(%RSP),%R15 |
(232) 0x4308f6 VMOVSD %XMM4,(%R14,%RAX,8) |
(232) 0x4308fc MOV 0x60(%RSP),%R14 |
(232) 0x430901 VMOVSD (%R15),%XMM5 |
(232) 0x430906 MOV 0x68(%RSP),%R15 |
(232) 0x43090b VMOVSD %XMM5,(%RDI) |
(232) 0x43090f ADD %R15,%R14 |
(232) 0x430912 MOV 0xe8(%RSP),%R15 |
(232) 0x43091a VMOVSD (%R14),%XMM6 |
(232) 0x43091f VMOVSD %XMM6,(%RSI) |
(232) 0x430923 JMP 430830 |
0x430928 NOPL (%RAX,%RAX,1) |
(232) 0x430930 VCOMISD (%R13,%RAX,8),%XMM2 |
(232) 0x430937 JNE 430732 |
(232) 0x43093d MOV 0x28(%R12),%R14 |
(232) 0x430942 MOV 0x170(%RSP),%R15 |
(232) 0x43094a VCOMISD (%R14,%R15,8),%XMM3 |
(232) 0x430950 JNE 430732 |
(232) 0x430956 MOV 0x70(%R12),%R14 |
(232) 0x43095b MOV 0x48(%R12),%R15 |
(232) 0x430960 VMOVSD (%R14,%RBX,8),%XMM5 |
(232) 0x430966 MOV 0x68(%R12),%R14 |
(232) 0x43096b VMOVSD %XMM5,(%R15,%R9,8) |
(232) 0x430971 MOV 0x40(%R12),%R15 |
(232) 0x430976 VMOVSD (%R14,%RBX,8),%XMM6 |
(232) 0x43097c MOV 0xe8(%RSP),%R14 |
(232) 0x430984 VMOVSD %XMM6,(%R15,%RAX,8) |
(232) 0x43098a MOV 0x60(%RSP),%R15 |
(232) 0x43098f VMOVSD (%R14),%XMM7 |
(232) 0x430994 MOV 0x68(%RSP),%R14 |
(232) 0x430999 VMOVSD %XMM7,(%RDI) |
(232) 0x43099d ADD %R15,%R14 |
(232) 0x4309a0 MOV 0xe8(%RSP),%R15 |
(232) 0x4309a8 VMOVSD (%R14),%XMM8 |
(232) 0x4309ad VMOVSD %XMM8,(%RSI) |
(232) 0x4309b1 JMP 430830 |
0x4309b6 NOPW %CS:(%RAX,%RAX,1) |
(231) 0x4309c0 MOV 0x118(%RSP),%R14 |
(231) 0x4309c8 MOV 0x134(%RSP),%R15D |
(231) 0x4309d0 MOV 0xcc(%RSP),%EAX |
(231) 0x4309d7 MOV $0x1,%ECX |
(231) 0x4309dc KMOVB %K4,%ESI |
(231) 0x4309e0 MOV 0x130(%RSP),%EDX |
(231) 0x4309e7 MOV 0x100(%RSP),%RDI |
(231) 0x4309ef CMP %EAX,%R15D |
(231) 0x4309f2 MOV 0xd0(%RSP),%R8 |
(231) 0x4309fa MOV 0x138(%RSP),%R9 |
(231) 0x430a02 CMOVE %R15D,%EDX |
(231) 0x430a06 CMOVE %ECX,%ESI |
(231) 0x430a09 MOV 0x140(%RSP),%R11 |
(231) 0x430a11 MOV 0xf8(%RSP),%RAX |
(231) 0x430a19 MOV 0x150(%RSP),%R15 |
(231) 0x430a21 ADD %RDI,%R10 |
(231) 0x430a24 ADD %R8,%R13 |
(231) 0x430a27 MOV %EDX,0x130(%RSP) |
(231) 0x430a2e MOV 0x160(%RSP),%EDX |
(231) 0x430a35 ADD %R9,%R14 |
(231) 0x430a38 KMOVB %ESI,%K4 |
(231) 0x430a3c ADD %R11,0x128(%RSP) |
(231) 0x430a44 ADD %RAX,0x120(%RSP) |
(231) 0x430a4c CMP %EDX,0xd8(%RSP) |
(231) 0x430a53 JG 430610 |
(230) 0x430a59 KORTESTB %K4,%K4 |
(230) 0x430a5d JE 430330 |
(230) 0x430a63 MOV 0x130(%RSP),%R10D |
(230) 0x430a6b MOV %R10D,0x140(%R12) |
(230) 0x430a73 JMP 430330 |
0x430a78 NOPL (%RAX,%RAX,1) |
(231) 0x430a80 LEA 0x1(%R15),%R15 |
(231) 0x430a84 MOV %R15,0x150(%RSP) |
(231) 0x430a8c JMP 4309c8 |
0x430a91 NOPL (%RAX) |
(230) 0x430a98 INC %EAX |
(230) 0x430a9a XOR %EDX,%EDX |
(230) 0x430a9c JMP 4303af |
0x430aa1 LEA -0x28(%RBP),%RSP |
0x430aa5 POP %RBX |
0x430aa6 POP %R12 |
0x430aa8 POP %R13 |
0x430aaa POP %R14 |
0x430aac POP %R15 |
0x430aae POP %RBP |
0x430aaf RET |
(233) 0x430ab0 VBROADCASTSD (%RDX),%YMM3 |
(233) 0x430ab5 LEA 0x20(%R10),%RAX |
(233) 0x430ab9 VMOVUPD %YMM3,(%R10) |
(233) 0x430abe JMP 430139 |
(235) 0x430ac3 VBROADCASTSD (%RDX),%YMM2 |
(235) 0x430ac8 LEA 0x20(%R10),%RAX |
(235) 0x430acc VMOVUPD %YMM2,(%R10) |
(235) 0x430ad1 JMP 42fe21 |
(237) 0x430ad6 VBROADCASTSD (%RDX),%YMM1 |
(237) 0x430adb LEA 0x20(%R10),%RAX |
(237) 0x430adf VMOVUPD %YMM1,(%R10) |
(237) 0x430ae4 JMP 42faf1 |
(239) 0x430ae9 VBROADCASTSD (%RDX),%YMM0 |
(239) 0x430aee LEA 0x20(%R10),%RAX |
(239) 0x430af2 VMOVUPD %YMM0,(%R10) |
(239) 0x430af7 JMP 42f7c0 |
(237) 0x430afc MOV 0x178(%RSP),%EAX |
(237) 0x430b03 XOR %EDI,%EDI |
(237) 0x430b05 JMP 42fbca |
(233) 0x430b0a MOV 0x178(%RSP),%EAX |
(233) 0x430b11 XOR %EDI,%EDI |
(233) 0x430b13 JMP 430212 |
(235) 0x430b18 MOV 0x178(%RSP),%EAX |
(235) 0x430b1f XOR %EDI,%EDI |
(235) 0x430b21 JMP 42fefa |
(239) 0x430b26 MOV 0x178(%RSP),%EAX |
(239) 0x430b2d XOR %EDI,%EDI |
(239) 0x430b2f JMP 42f899 |
0x430b34 INC %EAX |
0x430b36 XOR %EDX,%EDX |
0x430b38 JMP 42fca7 |
0x430b3d INC %EAX |
0x430b3f XOR %EDX,%EDX |
0x430b41 JMP 42f64e |
0x430b46 INC %EAX |
0x430b48 XOR %EDX,%EDX |
0x430b4a JMP 42f971 |
0x430b4f INC %EAX |
0x430b51 XOR %EDX,%EDX |
0x430b53 JMP 42ffd7 |
0x430b58 VZEROUPPER |
0x430b5b JMP 4302af |
0x430b60 VZEROUPPER |
0x430b63 JMP 42ffa6 |
0x430b68 VZEROUPPER |
0x430b6b JMP 42f93e |
0x430b70 VZEROUPPER |
0x430b73 JMP 42fc76 |
0x430b78 NOPL (%RAX,%RAX,1) |
Path / |
Source file and lines | generate_chunk_kernel.f90:85-161 |
Module | exec |
nb instructions | 408 |
nb uops | 437 |
loop length | 1926 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 33 |
micro-operation queue | 72.83 cycles |
front end | 72.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 33.30 | 33.20 | 32.00 | 32.00 | 41.50 | 33.20 | 33.10 | 41.50 | 41.50 | 41.50 | 33.20 | 32.00 |
cycles | 33.30 | 49.13 | 32.00 | 32.00 | 41.50 | 33.20 | 33.10 | 41.50 | 41.50 | 41.50 | 33.20 | 32.00 |
Cycles executing div or sqrt instructions | 24.00 |
FE+BE cycles | 69.57-69.64 |
Stall cycles | 0.00 |
Front-end | 72.83 |
Dispatch | 49.13 |
DIV/SQRT | 24.00 |
Overall L1 | 72.83 |
all | 6% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 27% |
all | 8% |
load | 6% |
store | 8% |
mul | 6% |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RDI,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x20,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x180,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x128(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x120(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x118(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x108(%RDI),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x100(%RDI),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xf8(%RDI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xf0(%RDI),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe8(%RDI),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe0(%RDI),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xd0(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd8(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x110(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RDI),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0x118(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,0x120(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0x110(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0x138(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL 402080 <@plt_start@+0x60> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EAX,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x2,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 402180 <@plt_start@+0x160> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x18(%R12),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0xdc(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV (%RSI),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R13D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
CMP %EDX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 430b3d <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x15ed> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xdc(%RSP),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %EAX,%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R8D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 42f93e <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x3ee> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %EBX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0xf8(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R12),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%R12),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%R12),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x170(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%RBX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOVSXD (%R9),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x70(%R12),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD %R8D,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV (%R11),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RBX,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x30(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x2(%R10),%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA 0x3(%RDI),%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB %EAX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R10,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R10,%RBX,1),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x5(%RDI),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RCX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RBX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EAX,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R13D,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA -0x10(%RSI,%R9,8),%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EDI,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%EBX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
AND $-0x4,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SAL $0x5,%RBX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV 0xe8(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14D,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,0x134(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R13D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R11D,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDI,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x5(%R13,%R9,1),%EDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA 0x4(%R9),%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMOVGE %R13D,%EDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R9D,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
AND $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
XOR %R13D,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EAX,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13D,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDI,0x168(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
KMOVB %EAX,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R14D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xd0(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe0(%RSP),%R14D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R8B,%R8B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 430b68 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1618> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R15D,0x140(%R12) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402220 <@plt_start@+0x200> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x18(%R12),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R12),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R15),%R11D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB $0x2,%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %R11D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIVL 0xc8(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 6 |
CMP %EDX,0xdc(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 430b46 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x15f6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xdc(%RSP),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %EAX,%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R8D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 42fc76 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x726> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%R12),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%R12),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R11D,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R11D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x100(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x68(%R12),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x170(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD (%RSI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD %R8D,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV %R12,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R10,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x120(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%R12),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (,%R10,8),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R9,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x2(%R9),%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R9,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x3(%RDI),%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (%R9,%RAX,1),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %R15D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R13,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RCX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x5(%RDI),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x10(%RSI,%R9,8),%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EDI,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x2,%R13D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x5(%RBX,%R9,1),%R15D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EBX,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,0x134(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SAL $0x5,%R13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
ADD %EBX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R11D,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVGE %EBX,%R15D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
AND $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA 0x4(%R9),%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xe8(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x1,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15D,0x168(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
KMOVB %R9D,%K0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EBX,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x108(%RSP),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14D,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R14D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xd0(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe0(%RSP),%R14D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EBX,0x108(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %R8B,%R8B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 430b70 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1620> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %EBX,0x140(%R12) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402220 <@plt_start@+0x200> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x18(%R12),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R12),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R11),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB $0x2,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %ESI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIVL 0xc8(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 6 |
CMP %EDX,0xdc(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 430b34 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x15e4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xdc(%RSP),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %EAX,%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R8D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 42ffa6 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xa56> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%R12),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%R12),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %ESI,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %ESI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x138(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%R12),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x170(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD (%RCX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD %R8D,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV (%R10),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R13,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (,%R13,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x40(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x78(%R12),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x2(%R9),%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R9,0x108(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x3(%RDI),%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (%R9,%R13,1),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %R15D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RCX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x5(%RDI),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %R13,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDI,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x10(%RSI,%R9,8),%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EDI,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x2,%R13D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x5(%RBX,%R9,1),%R15D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EBX,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,0x134(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SAL $0x5,%R13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
ADD %EBX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R11D,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVGE %EBX,%R15D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
AND $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA 0x4(%R9),%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x108(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x1,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15D,0x168(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
KMOVB %R9D,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EBX,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xf0(%RSP),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14D,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R14D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xe0(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe8(%RSP),%R14D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EBX,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %R8B,%R8B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 430b60 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1610> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %EBX,0x140(%R12) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402220 <@plt_start@+0x200> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x18(%R12),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R12),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R11),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB $0x2,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %ESI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIVL 0xc8(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 6 |
CMP %EDX,0xdc(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 430b4f <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x15ff> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xdc(%RSP),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %EAX,%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R8D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 4302af <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xd5f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%R12),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%R12),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %ESI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %ESI,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x140(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%R12),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x170(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD (%RCX),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R13),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD %R8D,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV %R12,0x108(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R9,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x48(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (,%R9,8),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x80(%R12),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x3(%RDI),%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA -0x2(%R10),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RBX,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %EAX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R10,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (%R10,%R13,1),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R15D,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x5(%RDI),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EDI,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RCX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD %R13,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x10(%RSI,%R10,8),%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EAX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x2,%R13D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %EDI,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R15D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SAL $0x5,%R13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
CMP %R11D,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDI,0x134(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x5(%R15,%R9,1),%EDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA 0x4(%R9),%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMOVGE %R15D,%EDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R9D,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
AND $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
XOR %R15D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EAX,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDI,0x168(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
KMOVB %EAX,%K3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R12D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x108(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R8B,%R8B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 430b58 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1608> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R14D,0x140(%R12) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402220 <@plt_start@+0x200> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x60(%R12),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R14),%R11D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP $0x1,%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 430aa1 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1551> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x120(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x100(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x118(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x110(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NEG %RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x1(%RCX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %RCX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SAL $0x3,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RDI,0x8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %R13,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (,%RSI,8),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDX,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%R10,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x1,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 430346 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xdf6> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 42fca7 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x757> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 42f64e <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xfe> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 42f971 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x421> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 42ffd7 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xa87> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 4302af <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xd5f> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 42ffa6 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xa56> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 42f93e <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x3ee> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 42fc76 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x726> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | generate_chunk_kernel.f90:85-161 |
Module | exec |
nb instructions | 408 |
nb uops | 437 |
loop length | 1926 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 33 |
micro-operation queue | 72.83 cycles |
front end | 72.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 33.30 | 33.20 | 32.00 | 32.00 | 41.50 | 33.20 | 33.10 | 41.50 | 41.50 | 41.50 | 33.20 | 32.00 |
cycles | 33.30 | 49.13 | 32.00 | 32.00 | 41.50 | 33.20 | 33.10 | 41.50 | 41.50 | 41.50 | 33.20 | 32.00 |
Cycles executing div or sqrt instructions | 24.00 |
FE+BE cycles | 69.57-69.64 |
Stall cycles | 0.00 |
Front-end | 72.83 |
Dispatch | 49.13 |
DIV/SQRT | 24.00 |
Overall L1 | 72.83 |
all | 6% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 27% |
all | 8% |
load | 6% |
store | 8% |
mul | 6% |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RDI,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x20,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x180,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x128(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x120(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x118(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x108(%RDI),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x100(%RDI),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xf8(%RDI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xf0(%RDI),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe8(%RDI),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe0(%RDI),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xd0(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd8(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x110(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RDI),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0x118(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,0x120(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0x110(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0x138(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL 402080 <@plt_start@+0x60> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EAX,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x2,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 402180 <@plt_start@+0x160> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x18(%R12),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0xdc(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV (%RSI),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R13D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
CMP %EDX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 430b3d <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x15ed> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xdc(%RSP),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %EAX,%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R8D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 42f93e <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x3ee> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %EBX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0xf8(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R12),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%R12),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%R12),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x170(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%RBX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOVSXD (%R9),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x70(%R12),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD %R8D,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV (%R11),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RBX,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x30(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x2(%R10),%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA 0x3(%RDI),%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB %EAX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R10,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R10,%RBX,1),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x5(%RDI),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RCX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RBX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EAX,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R13D,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA -0x10(%RSI,%R9,8),%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EDI,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%EBX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
AND $-0x4,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SAL $0x5,%RBX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV 0xe8(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14D,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,0x134(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R13D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R11D,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDI,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x5(%R13,%R9,1),%EDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA 0x4(%R9),%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMOVGE %R13D,%EDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R9D,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
AND $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
XOR %R13D,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EAX,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13D,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDI,0x168(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
KMOVB %EAX,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R14D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xd0(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe0(%RSP),%R14D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R8B,%R8B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 430b68 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1618> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R15D,0x140(%R12) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402220 <@plt_start@+0x200> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x18(%R12),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R12),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R15),%R11D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB $0x2,%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %R11D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIVL 0xc8(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 6 |
CMP %EDX,0xdc(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 430b46 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x15f6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xdc(%RSP),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %EAX,%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R8D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 42fc76 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x726> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%R12),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%R12),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R11D,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R11D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x100(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x68(%R12),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x170(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD (%RSI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD %R8D,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV %R12,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R10,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x120(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%R12),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (,%R10,8),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R9,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x2(%R9),%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R9,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x3(%RDI),%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (%R9,%RAX,1),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %R15D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R13,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RCX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x5(%RDI),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x10(%RSI,%R9,8),%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EDI,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x2,%R13D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x5(%RBX,%R9,1),%R15D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EBX,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,0x134(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SAL $0x5,%R13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
ADD %EBX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R11D,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVGE %EBX,%R15D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
AND $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA 0x4(%R9),%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xe8(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x1,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15D,0x168(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
KMOVB %R9D,%K0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EBX,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x108(%RSP),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14D,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R14D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xd0(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe0(%RSP),%R14D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EBX,0x108(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %R8B,%R8B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 430b70 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1620> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %EBX,0x140(%R12) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402220 <@plt_start@+0x200> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x18(%R12),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R12),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R11),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB $0x2,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %ESI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIVL 0xc8(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 6 |
CMP %EDX,0xdc(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 430b34 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x15e4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xdc(%RSP),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %EAX,%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R8D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 42ffa6 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xa56> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%R12),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%R12),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %ESI,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %ESI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x138(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%R12),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x170(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD (%RCX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD %R8D,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV (%R10),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R13,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (,%R13,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x40(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x78(%R12),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x2(%R9),%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R9,0x108(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x3(%RDI),%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (%R9,%R13,1),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %R15D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RCX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x5(%RDI),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %R13,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDI,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x10(%RSI,%R9,8),%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EDI,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x2,%R13D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x5(%RBX,%R9,1),%R15D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EBX,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,0x134(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SAL $0x5,%R13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
ADD %EBX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R11D,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVGE %EBX,%R15D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
AND $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA 0x4(%R9),%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x108(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x1,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15D,0x168(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
KMOVB %R9D,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EBX,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xf0(%RSP),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14D,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R14D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xe0(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe8(%RSP),%R14D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EBX,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %R8B,%R8B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 430b60 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1610> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %EBX,0x140(%R12) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402220 <@plt_start@+0x200> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x18(%R12),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R12),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R11),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB $0x2,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %ESI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIVL 0xc8(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 6 |
CMP %EDX,0xdc(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 430b4f <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x15ff> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xdc(%RSP),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %EAX,%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R8D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 4302af <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xd5f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%R12),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%R12),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %ESI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %ESI,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x140(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%R12),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x170(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD (%RCX),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R13),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD %R8D,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV %R12,0x108(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R9,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x48(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (,%R9,8),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x80(%R12),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x3(%RDI),%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA -0x2(%R10),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RBX,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %EAX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R10,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (%R10,%R13,1),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R15D,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x5(%RDI),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EDI,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RCX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD %R13,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x10(%RSI,%R10,8),%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EAX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x2,%R13D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %EDI,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R15D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SAL $0x5,%R13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
CMP %R11D,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDI,0x134(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x5(%R15,%R9,1),%EDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA 0x4(%R9),%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMOVGE %R15D,%EDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R9D,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
AND $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
XOR %R15D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EAX,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDI,0x168(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
KMOVB %EAX,%K3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R12D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x108(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R8B,%R8B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 430b58 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1608> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R14D,0x140(%R12) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402220 <@plt_start@+0x200> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x60(%R12),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R14),%R11D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP $0x1,%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 430aa1 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1551> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x120(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x100(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x118(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x110(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NEG %RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x1(%RCX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %RCX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SAL $0x3,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RDI,0x8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %R13,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (,%RSI,8),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDX,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%R10,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x1,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 430346 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xdf6> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 42fca7 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x757> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 42f64e <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xfe> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 42f971 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x421> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 42ffd7 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xa87> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 4302af <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xd5f> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 42ffa6 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xa56> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 42f93e <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x3ee> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 42fc76 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x726> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0– | 0.03 | 0.01 |
▼Loop 230 - generate_chunk_kernel.f90:119-161 - exec– | 0 | 0 |
▼Loop 231 - generate_chunk_kernel.f90:127-161 - exec– | 0 | 0 |
○Loop 232 - generate_chunk_kernel.f90:129-161 - exec | 0.01 | 0.01 |
▼Loop 237 - generate_chunk_kernel.f90:96-98 - exec– | 0 | 0 |
○Loop 238 - generate_chunk_kernel.f90:98-98 - exec | 0 | 0 |
▼Loop 235 - generate_chunk_kernel.f90:104-106 - exec– | 0 | 0 |
○Loop 236 - generate_chunk_kernel.f90:106-106 - exec | 0 | 0 |
▼Loop 233 - generate_chunk_kernel.f90:112-114 - exec– | 0 | 0 |
○Loop 234 - generate_chunk_kernel.f90:114-114 - exec | 0.01 | 0 |
▼Loop 239 - generate_chunk_kernel.f90:88-90 - exec– | 0 | 0 |
○Loop 240 - generate_chunk_kernel.f90:90-90 - exec | 0.01 | 0 |