Loop Id: 276 | Module: exec | Source: advec_mom_kernel.f90:81-241 [...] | Coverage: 0.01% |
---|
Loop Id: 276 | Module: exec | Source: advec_mom_kernel.f90:81-241 [...] | Coverage: 0.01% |
---|
0x43a240 VMOVAPD %ZMM24,%ZMM2{%K3}{z} |
0x43a246 VSUBPD %ZMM25,%ZMM11,%ZMM3 |
0x43a24c VFMADD213PD %ZMM20,%ZMM2,%ZMM3 |
0x43a252 VMULPD %ZMM22,%ZMM3,%ZMM2 |
0x43a258 IMUL %R8,%R12 |
0x43a25c ADD 0x38(%RBP),%R12 |
0x43a260 VMOVUPD %ZMM2,(%R12,%RBX,8){%K1} |
0x43a267 ADD %R8,%R14 |
0x43a26a ADD %R11,%R15 |
0x43a26d CMP 0x28(%RSP),%R13 |
0x43a272 LEA 0x1(%R13),%R13 |
0x43a276 JE 438450 |
0x43a27c MOV %R9,%RBX |
0x43a27f AND $-0x8,%RBX |
0x43a283 JE 43a580 |
0x43a289 MOV %R9,%RAX |
0x43a28c LEA -0x1(%RBX),%R12 |
0x43a290 MOV 0x98(%RBP),%RSI |
0x43a297 MOVSXD %ESI,%RCX |
0x43a29a MOV 0x30(%RSP),%R9 |
0x43a29f ADD %R9,%RCX |
0x43a2a2 LEA -0x1(%R13,%RCX,1),%R8 |
0x43a2a7 MOV %R8,%RDI |
0x43a2aa SUB 0x38(%RSP),%RDI |
0x43a2af LEA (%R9,%RSI,1),%R11D |
0x43a2b3 LEA (%R11,%R13,1),%ECX |
0x43a2b7 LEA 0x1(%R13,%R11,1),%R9D |
0x43a2bc LEA -0x2(%R13,%R11,1),%R11D |
0x43a2c1 VPBROADCASTD %R11D,%YMM23 |
0x43a2c7 VPBROADCASTD %ECX,%YMM24 |
0x43a2cd VPBROADCASTD %R8D,%YMM25 |
0x43a2d3 VMOVQ 0x40(%RSP),%XMM26 |
0x43a2db XOR %R11D,%R11D |
0x43a2de JMP 43a333 |
(277) 0x43a300 VCMPPD $0x1,%ZMM30,%ZMM12,%K1 |
(277) 0x43a307 VMOVAPD %ZMM3,%ZMM2{%K1}{z} |
(277) 0x43a30d VSUBPD %ZMM29,%ZMM11,%ZMM3 |
(277) 0x43a313 VFMADD213PD %ZMM28,%ZMM2,%ZMM3 |
(277) 0x43a319 VMULPD %ZMM27,%ZMM3,%ZMM2 |
(277) 0x43a31f VMOVUPD %ZMM2,(%R14,%R11,8) |
(277) 0x43a326 ADD $0x8,%R11 |
(277) 0x43a32a CMP %R12,%R11 |
(277) 0x43a32d JA 43a540 |
(277) 0x43a333 VMOVUPD (%R15,%R11,8),%ZMM27 |
(277) 0x43a33a VFPCLASSPD $0x50,%ZMM27,%K1 |
(277) 0x43a341 VMOVDQA64 %YMM25,%YMM3 |
(277) 0x43a347 VPBROADCASTD %ECX,%YMM3{%K1} |
(277) 0x43a34d VPMOVSXDQ %YMM3,%ZMM3 |
(277) 0x43a353 VPSUBQ %ZMM5,%ZMM3,%ZMM3 |
(277) 0x43a359 VPXOR %XMM7,%XMM7,%XMM7 |
(277) 0x43a35d VPMULLQ %ZMM3,%ZMM0,%ZMM7 |
(277) 0x43a363 LEA (%RDX,%R11,1),%RSI |
(277) 0x43a367 VMOVQ %RSI,%XMM28 |
(277) 0x43a36d VPSUBQ %XMM26,%XMM28,%XMM28 |
(277) 0x43a373 VPSLLQ $0x3,%XMM28,%XMM28 |
(277) 0x43a37a VPBROADCASTQ %XMM28,%ZMM28 |
(277) 0x43a380 VPADDQ %ZMM9,%ZMM28,%ZMM28 |
(277) 0x43a386 VPADDQ %ZMM28,%ZMM6,%ZMM29 |
(277) 0x43a38c VPADDQ %ZMM7,%ZMM29,%ZMM7 |
(277) 0x43a392 VPXORD %XMM29,%XMM29,%XMM29 |
(277) 0x43a398 KXNORW %K0,%K0,%K2 |
(277) 0x43a39c VGATHERQPD (,%ZMM7,1),%ZMM29{%K2} |
(277) 0x43a3a7 VPMULLQ %ZMM3,%ZMM1,%ZMM3 |
(277) 0x43a3ad VPADDQ %ZMM28,%ZMM10,%ZMM7 |
(277) 0x43a3b3 VPADDQ %ZMM3,%ZMM7,%ZMM3 |
(277) 0x43a3b9 VPXORD %XMM28,%XMM28,%XMM28 |
(277) 0x43a3bf KXNORW %K0,%K0,%K2 |
(277) 0x43a3c3 VGATHERQPD (,%ZMM3,1),%ZMM28{%K2} |
(277) 0x43a3ce VMOVDQA64 %YMM23,%YMM3 |
(277) 0x43a3d4 VPBROADCASTD %R9D,%YMM3{%K1} |
(277) 0x43a3da VMOVDQA64 %YMM24,%YMM30 |
(277) 0x43a3e0 VPMOVSXDQ %YMM3,%ZMM3 |
(277) 0x43a3e6 VPSUBQ %ZMM5,%ZMM3,%ZMM3 |
(277) 0x43a3ec VPMULLQ %ZMM3,%ZMM1,%ZMM3 |
(277) 0x43a3f2 VPADDQ %ZMM3,%ZMM7,%ZMM3 |
(277) 0x43a3f8 VXORPD %XMM31,%XMM31,%XMM31 |
(277) 0x43a3fe KXNORW %K0,%K0,%K2 |
(277) 0x43a402 VGATHERQPD (,%ZMM3,1),%ZMM31{%K2} |
(277) 0x43a40d VPBROADCASTD %R8D,%YMM30{%K1} |
(277) 0x43a413 VANDPD %ZMM4,%ZMM27,%ZMM3 |
(277) 0x43a419 VDIVPD %ZMM29,%ZMM3,%ZMM29 |
(277) 0x43a41f VPMOVSXDQ %YMM30,%ZMM3 |
(277) 0x43a425 VPSUBQ %ZMM5,%ZMM3,%ZMM3 |
(277) 0x43a42b VPMULLQ %ZMM3,%ZMM1,%ZMM3 |
(277) 0x43a431 VPADDQ %ZMM3,%ZMM7,%ZMM3 |
(277) 0x43a437 VPXORD %XMM30,%XMM30,%XMM30 |
(277) 0x43a43d KXNORW %K0,%K0,%K2 |
(277) 0x43a441 VGATHERQPD (,%ZMM3,1),%ZMM30{%K2} |
(277) 0x43a44c VXORPD %XMM3,%XMM3,%XMM3 |
(277) 0x43a450 VSUBPD %ZMM31,%ZMM28,%ZMM7 |
(277) 0x43a456 VSUBPD %ZMM28,%ZMM30,%ZMM31 |
(277) 0x43a45c VMULPD %ZMM7,%ZMM31,%ZMM30 |
(277) 0x43a462 VCMPPD $0x1,%ZMM30,%ZMM3,%K0 |
(277) 0x43a469 KORTESTB %K0,%K0 |
(277) 0x43a46d JE 43a300 |
(277) 0x43a473 VCMPPD $0x1,%ZMM30,%ZMM12,%K2 |
(277) 0x43a47a VPBLENDMD %YMM24,%YMM23,%YMM8{%K1} |
(277) 0x43a480 VMOVSD (%R10,%RDI,8),%XMM2 |
(277) 0x43a486 VANDPD %ZMM4,%ZMM7,%ZMM7 |
(277) 0x43a48c VANDPD %ZMM4,%ZMM31,%ZMM3 |
(277) 0x43a492 VSUBPD %ZMM29,%ZMM13,%ZMM17 |
(277) 0x43a498 VMULPD %ZMM17,%ZMM3,%ZMM17 |
(277) 0x43a49e VDIVSD %XMM2,%XMM14,%XMM18 |
(277) 0x43a4a4 VBROADCASTSD %XMM18,%ZMM18 |
(277) 0x43a4aa VCMPPD $0x2,%ZMM3,%ZMM7,%K1 |
(277) 0x43a4b1 VMOVAPD %ZMM7,%ZMM3{%K1} |
(277) 0x43a4b7 VPMOVSXDQ %YMM8,%ZMM8 |
(277) 0x43a4bd VPSUBQ %ZMM5,%ZMM8,%ZMM8 |
(277) 0x43a4c3 VXORPD %XMM19,%XMM19,%XMM19 |
(277) 0x43a4c9 VGATHERQPD (%R10,%ZMM8,8),%ZMM19{%K2} |
(277) 0x43a4d0 VFMADD213PD %ZMM7,%ZMM29,%ZMM7 |
(277) 0x43a4d6 VDIVPD %ZMM19,%ZMM7,%ZMM7 |
(277) 0x43a4dc VFMADD231PD %ZMM18,%ZMM17,%ZMM7 |
(277) 0x43a4e2 VMULSD %XMM2,%XMM15,%XMM2 |
(277) 0x43a4e6 VBROADCASTSD %XMM2,%ZMM2 |
(277) 0x43a4ec VMULPD %ZMM7,%ZMM2,%ZMM2 |
(277) 0x43a4f2 VCMPPD $0x2,%ZMM3,%ZMM2,%K1 |
(277) 0x43a4f9 VMOVAPD %ZMM2,%ZMM3{%K1} |
(277) 0x43a4ff VFPCLASSPD $0x56,%ZMM31,%K1 |
(277) 0x43a506 VXORPD %ZMM16,%ZMM3,%ZMM3{%K1} |
(277) 0x43a50c JMP 43a300 |
0x43a540 MOV %RAX,%R9 |
0x43a543 CMP %RBX,%RAX |
0x43a546 MOV 0x50(%RSP),%R8 |
0x43a54b MOV 0x48(%RSP),%R11 |
0x43a550 JE 43a267 |
0x43a556 JMP 43a582 |
0x43a580 XOR %EBX,%EBX |
0x43a582 VPBROADCASTQ %RBX,%ZMM25 |
0x43a588 VMOVDQA64 0x200(%RSP),%ZMM2 |
0x43a590 VPSUBQ %ZMM25,%ZMM2,%ZMM3 |
0x43a596 VPCMPNLEUQ 0xcf61f(%RIP),%ZMM3,%K1 |
0x43a5a1 KORTESTB %K1,%K1 |
0x43a5a5 JE 43a267 |
0x43a5ab MOV 0x98(%RBP),%RDI |
0x43a5b2 MOVSXD %EDI,%RCX |
0x43a5b5 MOV 0x30(%RSP),%RAX |
0x43a5ba ADD %RAX,%RCX |
0x43a5bd LEA -0x1(%R13,%RCX,1),%RCX |
0x43a5c2 MOV %RCX,%R12 |
0x43a5c5 SUB 0x38(%RSP),%R12 |
0x43a5ca MOV %R11,%RSI |
0x43a5cd IMUL %R12,%RSI |
0x43a5d1 ADD 0x50(%RBP),%RSI |
0x43a5d5 ADD %RDX,%RBX |
0x43a5d8 SUB 0x40(%RSP),%RBX |
0x43a5dd VMOVUPD (%RSI,%RBX,8),%ZMM2{%K1}{z} |
0x43a5e4 VMOVAPD %ZMM2,%ZMM22{%K1} |
0x43a5ea LEA (%RAX,%RDI,1),%ESI |
0x43a5ed LEA -0x2(%R13,%RSI,1),%EDI |
0x43a5f2 VPBROADCASTD %EDI,%YMM23 |
0x43a5f8 LEA 0x1(%R13,%RSI,1),%EDI |
0x43a5fd VFPCLASSPD $0x50,%ZMM22,%K2 |
0x43a604 VMOVDQA64 %YMM23,%YMM2 |
0x43a60a VPBROADCASTD %EDI,%YMM2{%K2} |
0x43a610 ADD %R13D,%ESI |
0x43a613 VPBROADCASTD %ESI,%YMM26 |
0x43a619 VPBROADCASTD %ECX,%YMM3 |
0x43a61f VPBROADCASTD %ESI,%YMM3{%K2} |
0x43a625 VMOVDQA64 %YMM26,%YMM7 |
0x43a62b VPBROADCASTD %ECX,%YMM7{%K2} |
0x43a631 VPXORD %XMM24,%XMM24,%XMM24 |
0x43a637 VPMOVSXDQ %YMM3,%ZMM3 |
0x43a63d VPSUBQ %ZMM5,%ZMM3,%ZMM3 |
0x43a643 VPMULLQ %ZMM3,%ZMM0,%ZMM8 |
0x43a649 VPADDQ 0x280(%RSP),%ZMM25,%ZMM17 |
0x43a651 VPSUBQ 0x2c0(%RSP),%ZMM17,%ZMM17 |
0x43a659 VPSLLQ $0x3,%ZMM17,%ZMM17 |
0x43a660 VPADDQ %ZMM9,%ZMM17,%ZMM17 |
0x43a666 VPADDQ %ZMM17,%ZMM6,%ZMM18 |
0x43a66c VPADDQ %ZMM8,%ZMM18,%ZMM8 |
0x43a672 KMOVQ %K1,%K3 |
0x43a677 VPXORD %XMM18,%XMM18,%XMM18 |
0x43a67d VGATHERQPD (,%ZMM8,1),%ZMM18{%K3} |
0x43a688 VANDPD %ZMM4,%ZMM22,%ZMM8 |
0x43a68e VPMULLQ %ZMM3,%ZMM1,%ZMM3 |
0x43a694 VPADDQ %ZMM17,%ZMM10,%ZMM17 |
0x43a69a VPADDQ %ZMM3,%ZMM17,%ZMM3 |
0x43a6a0 KMOVQ %K1,%K3 |
0x43a6a5 VXORPD %XMM19,%XMM19,%XMM19 |
0x43a6ab VGATHERQPD (,%ZMM3,1),%ZMM19{%K3} |
0x43a6b6 VPMOVSXDQ %YMM2,%ZMM2 |
0x43a6bc VPSUBQ %ZMM5,%ZMM2,%ZMM2 |
0x43a6c2 VPMULLQ %ZMM2,%ZMM1,%ZMM2 |
0x43a6c8 VPADDQ %ZMM2,%ZMM17,%ZMM2 |
0x43a6ce KMOVQ %K1,%K3 |
0x43a6d3 VXORPD %XMM3,%XMM3,%XMM3 |
0x43a6d7 VGATHERQPD (,%ZMM2,1),%ZMM3{%K3} |
0x43a6e2 VMOVAPD %ZMM18,%ZMM21{%K1} |
0x43a6e8 VDIVPD %ZMM21,%ZMM8,%ZMM25 |
0x43a6ee VMOVAPD %ZMM19,%ZMM20{%K1} |
0x43a6f4 VMOVAPD 0x1c0(%RSP),%ZMM8 |
0x43a6fc VMOVAPD %ZMM3,%ZMM8{%K1} |
0x43a702 VPMOVSXDQ %YMM7,%ZMM2 |
0x43a708 VPSUBQ %ZMM5,%ZMM2,%ZMM2 |
0x43a70e VPMULLQ %ZMM2,%ZMM1,%ZMM2 |
0x43a714 VPADDQ %ZMM2,%ZMM17,%ZMM2 |
0x43a71a KMOVQ %K1,%K3 |
0x43a71f VPXOR %XMM7,%XMM7,%XMM7 |
0x43a723 VGATHERQPD (,%ZMM2,1),%ZMM7{%K3} |
0x43a72e VSUBPD %ZMM8,%ZMM20,%ZMM3 |
0x43a734 VMOVAPD 0x180(%RSP),%ZMM2 |
0x43a73c VMOVAPD %ZMM7,%ZMM2{%K1} |
0x43a742 VMOVAPD %ZMM2,%ZMM7 |
0x43a748 VSUBPD %ZMM20,%ZMM2,%ZMM27 |
0x43a74e VMULPD %ZMM3,%ZMM27,%ZMM2 |
0x43a754 VCMPPD $0x1,%ZMM2,%ZMM24,%K3{%K1} |
0x43a75b KORTESTB %K3,%K3 |
0x43a75f VMOVAPD %ZMM7,0x180(%RSP) |
0x43a767 VMOVAPD %ZMM8,0x1c0(%RSP) |
0x43a76f JE 43a240 |
0x43a775 VMOVDQA32 %YMM26,%YMM23{%K2} |
0x43a77b VMOVSD (%R10,%R12,8),%XMM2 |
0x43a781 VANDPD %ZMM4,%ZMM3,%ZMM3 |
0x43a787 VANDPD %ZMM4,%ZMM27,%ZMM24 |
0x43a78d VSUBPD %ZMM25,%ZMM13,%ZMM7 |
0x43a793 VMULPD %ZMM7,%ZMM24,%ZMM7 |
0x43a799 VDIVSD %XMM2,%XMM14,%XMM8 |
0x43a79d VBROADCASTSD %XMM8,%ZMM8 |
0x43a7a3 VCMPPD $0x2,%ZMM24,%ZMM3,%K2 |
0x43a7aa VMOVAPD %ZMM3,%ZMM24{%K2} |
0x43a7b0 VFMADD213PD %ZMM3,%ZMM25,%ZMM3 |
0x43a7b6 VPMOVSXDQ %YMM23,%ZMM17 |
0x43a7bc VPSUBQ %ZMM5,%ZMM17,%ZMM17 |
0x43a7c2 VXORPD %XMM18,%XMM18,%XMM18 |
0x43a7c8 KMOVQ %K3,%K2 |
0x43a7cd VGATHERQPD (%R10,%ZMM17,8),%ZMM18{%K2} |
0x43a7d4 VMOVAPD 0x240(%RSP),%ZMM17 |
0x43a7dc VMOVAPD %ZMM18,%ZMM17{%K3} |
0x43a7e2 VMOVAPD %ZMM17,0x240(%RSP) |
0x43a7ea VDIVPD %ZMM17,%ZMM3,%ZMM3 |
0x43a7f0 VFMADD231PD %ZMM8,%ZMM7,%ZMM3 |
0x43a7f6 VMULSD %XMM2,%XMM15,%XMM2 |
0x43a7fa VBROADCASTSD %XMM2,%ZMM2 |
0x43a800 VMULPD %ZMM3,%ZMM2,%ZMM2 |
0x43a806 VCMPPD $0x2,%ZMM24,%ZMM2,%K2 |
0x43a80d VMOVAPD %ZMM2,%ZMM24{%K2} |
0x43a813 VFPCLASSPD $0x56,%ZMM27,%K2 |
0x43a81a VXORPD %ZMM16,%ZMM24,%ZMM24{%K2} |
0x43a820 JMP 43a240 |
/scratch_na/users/xoserete/qaas_runs/171-214-9740/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/advec_mom_kernel.f90: 81 - 241 |
-------------------------------------------------------------------------------- |
81: IF(mom_sweep.EQ.1)THEN ! x 1 |
[...] |
213: DO k=y_min-1,y_max+1 |
214: DO j=x_min,x_max+1 |
215: IF(node_flux(j,k).LT.0.0)THEN |
[...] |
227: sigma=ABS(node_flux(j,k))/(node_mass_pre(j,donor)) |
228: width=celldy(k) |
229: vdiffuw=vel1(j,donor)-vel1(j,upwind) |
230: vdiffdw=vel1(j,downwind)-vel1(j,donor) |
231: limiter=0.0 |
232: IF(vdiffuw*vdiffdw.GT.0.0)THEN |
233: auw=ABS(vdiffuw) |
234: adw=ABS(vdiffdw) |
235: wind=1.0_8 |
236: IF(vdiffdw.LE.0.0) wind=-1.0_8 |
237: limiter=wind*MIN(width*((2.0_8-sigma)*adw/width+(1.0_8+sigma)*auw/celldy(dif))/6.0_8,auw,adw) |
238: ENDIF |
239: advec_vel_s=vel1(j,donor)+(1.0_8-sigma)*limiter |
240: mom_flux(j,k)=advec_vel_s*node_flux(j,k) |
241: ENDDO |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.08 |
CQA speedup if FP arith vectorized | 1.01 |
CQA speedup if fully vectorized | 1.15 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | NA |
Bottlenecks | P0, P5, |
Function | advec_mom_kernel_.DIR.OMP.PARALLEL.2 |
Source | advec_mom_kernel.f90:81-81,advec_mom_kernel.f90:213-215,advec_mom_kernel.f90:227-234,advec_mom_kernel.f90:237-240 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 46.00 |
CQA cycles if no scalar integer | 42.50 |
CQA cycles if FP arith vectorized | 45.63 |
CQA cycles if fully vectorized | 40.13 |
Front-end cycles | 32.00 |
DIV/SQRT cycles | 46.00 |
P0 cycles | 12.07 |
P1 cycles | 20.33 |
P2 cycles | 20.33 |
P3 cycles | 2.00 |
P4 cycles | 46.00 |
P5 cycles | 11.80 |
P6 cycles | 2.00 |
P7 cycles | 2.00 |
P8 cycles | 2.00 |
P9 cycles | 11.60 |
P10 cycles | 20.33 |
P11 cycles | 36.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 47.77 - 89.35 |
Stall cycles (UFS) | 17.93 - 59.51 |
Nb insns | 153.00 |
Nb uops | 192.00 |
Nb loads | 27.00 |
Nb stores | 4.00 |
Nb stack references | 15.00 |
FLOP/cycle | 2.83 |
Nb FLOP add-sub | 32.00 |
Nb FLOP mul | 33.00 |
Nb FLOP fma | 24.00 |
Nb FLOP div | 17.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 26.09 |
Bytes prefetched | 0.00 |
Bytes loaded | 944.00 |
Bytes stored | 256.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 79.00 |
Vectorization ratio load | 76.47 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 88.89 |
Vectorization ratio add_sub | 90.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | 66.67 |
Vectorization ratio other | 73.58 |
Vector-efficiency ratio all | 73.06 |
Vector-efficiency ratio load | 79.41 |
Vector-efficiency ratio store | 100.00 |
Vector-efficiency ratio mul | 90.28 |
Vector-efficiency ratio add_sub | 91.25 |
Vector-efficiency ratio fma | 100.00 |
Vector-efficiency ratio div_sqrt | 70.83 |
Vector-efficiency ratio other | 60.73 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.08 |
CQA speedup if FP arith vectorized | 1.01 |
CQA speedup if fully vectorized | 1.15 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | NA |
Bottlenecks | P0, P5, |
Function | advec_mom_kernel_.DIR.OMP.PARALLEL.2 |
Source | advec_mom_kernel.f90:81-81,advec_mom_kernel.f90:213-215,advec_mom_kernel.f90:227-234,advec_mom_kernel.f90:237-240 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 46.00 |
CQA cycles if no scalar integer | 42.50 |
CQA cycles if FP arith vectorized | 45.63 |
CQA cycles if fully vectorized | 40.13 |
Front-end cycles | 32.00 |
DIV/SQRT cycles | 46.00 |
P0 cycles | 12.07 |
P1 cycles | 20.33 |
P2 cycles | 20.33 |
P3 cycles | 2.00 |
P4 cycles | 46.00 |
P5 cycles | 11.80 |
P6 cycles | 2.00 |
P7 cycles | 2.00 |
P8 cycles | 2.00 |
P9 cycles | 11.60 |
P10 cycles | 20.33 |
P11 cycles | 36.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 47.77 - 89.35 |
Stall cycles (UFS) | 17.93 - 59.51 |
Nb insns | 153.00 |
Nb uops | 192.00 |
Nb loads | 27.00 |
Nb stores | 4.00 |
Nb stack references | 15.00 |
FLOP/cycle | 2.83 |
Nb FLOP add-sub | 32.00 |
Nb FLOP mul | 33.00 |
Nb FLOP fma | 24.00 |
Nb FLOP div | 17.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 26.09 |
Bytes prefetched | 0.00 |
Bytes loaded | 944.00 |
Bytes stored | 256.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 79.00 |
Vectorization ratio load | 76.47 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 88.89 |
Vectorization ratio add_sub | 90.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | 66.67 |
Vectorization ratio other | 73.58 |
Vector-efficiency ratio all | 73.06 |
Vector-efficiency ratio load | 79.41 |
Vector-efficiency ratio store | 100.00 |
Vector-efficiency ratio mul | 90.28 |
Vector-efficiency ratio add_sub | 91.25 |
Vector-efficiency ratio fma | 100.00 |
Vector-efficiency ratio div_sqrt | 70.83 |
Vector-efficiency ratio other | 60.73 |
Path / |
Function | advec_mom_kernel_.DIR.OMP.PARALLEL.2 |
Source file and lines | advec_mom_kernel.f90:81-241 |
Module | exec |
nb instructions | 153 |
nb uops | 192 |
loop length | 861 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 10 |
used ymm registers | 7 |
used zmm registers | 23 |
nb stack references | 15 |
ADD-SUB / MUL ratio | 0.80 |
micro-operation queue | 32.00 cycles |
front end | 32.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 46.00 | 11.60 | 20.33 | 20.33 | 2.00 | 46.00 | 11.80 | 2.00 | 2.00 | 2.00 | 11.60 | 20.33 |
cycles | 46.00 | 12.07 | 20.33 | 20.33 | 2.00 | 46.00 | 11.80 | 2.00 | 2.00 | 2.00 | 11.60 | 20.33 |
Cycles executing div or sqrt instructions | 36.00 |
FE+BE cycles | 47.77-89.35 |
Stall cycles | 17.92-59.50 |
ROB full (events) | 19.91-63.47 |
Front-end | 32.00 |
Dispatch | 46.00 |
DIV/SQRT | 36.00 |
Overall L1 | 46.00 |
all | 65% |
load | 57% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 87% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 50% |
all | 90% |
load | 90% |
store | 100% |
mul | 80% |
add-sub | 100% |
fma | 100% |
div/sqrt | 66% |
other | 93% |
all | 79% |
load | 76% |
store | 100% |
mul | 88% |
add-sub | 90% |
fma | 100% |
div/sqrt | 66% |
other | 73% |
all | 56% |
load | 62% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 89% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 29% |
all | 87% |
load | 91% |
store | 100% |
mul | 82% |
add-sub | 100% |
fma | 100% |
div/sqrt | 70% |
other | 86% |
all | 73% |
load | 79% |
store | 100% |
mul | 90% |
add-sub | 91% |
fma | 100% |
div/sqrt | 70% |
other | 60% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VMOVAPD %ZMM24,%ZMM2{%K3}{z} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VSUBPD %ZMM25,%ZMM11,%ZMM3 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VFMADD213PD %ZMM20,%ZMM2,%ZMM3 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %ZMM22,%ZMM3,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
IMUL %R8,%R12 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD 0x38(%RBP),%R12 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
VMOVUPD %ZMM2,(%R12,%RBX,8){%K1} | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
ADD %R8,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R11,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP 0x28(%RSP),%R13 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
LEA 0x1(%R13),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JE 438450 <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x1c90> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R9,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x8,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 43a580 <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3dc0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R9,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x1(%RBX),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x98(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD %ESI,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV 0x30(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R9,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x1(%R13,%RCX,1),%R8 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R8,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB 0x38(%RSP),%RDI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
LEA (%R9,%RSI,1),%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (%R11,%R13,1),%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA 0x1(%R13,%R11,1),%R9D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA -0x2(%R13,%R11,1),%R11D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTD %R11D,%YMM23 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTD %ECX,%YMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTD %R8D,%YMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVQ 0x40(%RSP),%XMM26 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
XOR %R11D,%R11D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 43a333 <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3b73> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %RAX,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %RBX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x50(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 43a267 <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3aa7> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 43a582 <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3dc2> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
XOR %EBX,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPBROADCASTQ %RBX,%ZMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQA64 0x200(%RSP),%ZMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VPSUBQ %ZMM25,%ZMM2,%ZMM3 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
VPCMPNLEUQ 0xcf61f(%RIP),%ZMM3,%K1 | |||||||||||||||
KORTESTB %K1,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JE 43a267 <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3aa7> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x98(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD %EDI,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV 0x30(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x1(%R13,%RCX,1),%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RCX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB 0x38(%RSP),%R12 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %R11,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %R12,%RSI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD 0x50(%RBP),%RSI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
ADD %RDX,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB 0x40(%RSP),%RBX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
VMOVUPD (%RSI,%RBX,8),%ZMM2{%K1}{z} | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVAPD %ZMM2,%ZMM22{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
LEA (%RAX,%RDI,1),%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA -0x2(%R13,%RSI,1),%EDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTD %EDI,%YMM23 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA 0x1(%R13,%RSI,1),%EDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VFPCLASSPD $0x50,%ZMM22,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQA64 %YMM23,%YMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VPBROADCASTD %EDI,%YMM2{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %R13D,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VPBROADCASTD %ESI,%YMM26 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTD %ECX,%YMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTD %ESI,%YMM3{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQA64 %YMM26,%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VPBROADCASTD %ECX,%YMM7{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPXORD %XMM24,%XMM24,%XMM24 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VPMOVSXDQ %YMM3,%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %ZMM5,%ZMM3,%ZMM3 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
VPMULLQ %ZMM3,%ZMM0,%ZMM8 | 5 | 1.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPADDQ 0x280(%RSP),%ZMM25,%ZMM17 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
VPSUBQ 0x2c0(%RSP),%ZMM17,%ZMM17 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.67 |
VPSLLQ $0x3,%ZMM17,%ZMM17 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2-4 | 1 |
VPADDQ %ZMM9,%ZMM17,%ZMM17 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VPADDQ %ZMM17,%ZMM6,%ZMM18 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VPADDQ %ZMM8,%ZMM18,%ZMM8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
KMOVQ %K1,%K3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
VPXORD %XMM18,%XMM18,%XMM18 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VGATHERQPD (,%ZMM8,1),%ZMM18{%K3} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VANDPD %ZMM4,%ZMM22,%ZMM8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VPMULLQ %ZMM3,%ZMM1,%ZMM3 | 5 | 1.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPADDQ %ZMM17,%ZMM10,%ZMM17 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VPADDQ %ZMM3,%ZMM17,%ZMM3 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
KMOVQ %K1,%K3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
VXORPD %XMM19,%XMM19,%XMM19 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VGATHERQPD (,%ZMM3,1),%ZMM19{%K3} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VPMOVSXDQ %YMM2,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %ZMM5,%ZMM2,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
VPMULLQ %ZMM2,%ZMM1,%ZMM2 | 5 | 1.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPADDQ %ZMM2,%ZMM17,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
KMOVQ %K1,%K3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
VXORPD %XMM3,%XMM3,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VGATHERQPD (,%ZMM2,1),%ZMM3{%K3} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VMOVAPD %ZMM18,%ZMM21{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VDIVPD %ZMM21,%ZMM8,%ZMM25 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VMOVAPD %ZMM19,%ZMM20{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VMOVAPD 0x1c0(%RSP),%ZMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVAPD %ZMM3,%ZMM8{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VPMOVSXDQ %YMM7,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %ZMM5,%ZMM2,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
VPMULLQ %ZMM2,%ZMM1,%ZMM2 | 5 | 1.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPADDQ %ZMM2,%ZMM17,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
KMOVQ %K1,%K3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
VPXOR %XMM7,%XMM7,%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VGATHERQPD (,%ZMM2,1),%ZMM7{%K3} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VSUBPD %ZMM8,%ZMM20,%ZMM3 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVAPD 0x180(%RSP),%ZMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVAPD %ZMM7,%ZMM2{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VMOVAPD %ZMM2,%ZMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VSUBPD %ZMM20,%ZMM2,%ZMM27 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %ZMM3,%ZMM27,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPPD $0x1,%ZMM2,%ZMM24,%K3{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
KORTESTB %K3,%K3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
VMOVAPD %ZMM7,0x180(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVAPD %ZMM8,0x1c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
JE 43a240 <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3a80> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVDQA32 %YMM26,%YMM23{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VMOVSD (%R10,%R12,8),%XMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %ZMM4,%ZMM3,%ZMM3 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VANDPD %ZMM4,%ZMM27,%ZMM24 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VSUBPD %ZMM25,%ZMM13,%ZMM7 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %ZMM7,%ZMM24,%ZMM7 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VDIVSD %XMM2,%XMM14,%XMM8 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 4 |
VBROADCASTSD %XMM8,%ZMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VCMPPD $0x2,%ZMM24,%ZMM3,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %ZMM3,%ZMM24{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VFMADD213PD %ZMM3,%ZMM25,%ZMM3 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VPMOVSXDQ %YMM23,%ZMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %ZMM5,%ZMM17,%ZMM17 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
VXORPD %XMM18,%XMM18,%XMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KMOVQ %K3,%K2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
VGATHERQPD (%R10,%ZMM17,8),%ZMM18{%K2} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VMOVAPD 0x240(%RSP),%ZMM17 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVAPD %ZMM18,%ZMM17{%K3} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VMOVAPD %ZMM17,0x240(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VDIVPD %ZMM17,%ZMM3,%ZMM3 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VFMADD231PD %ZMM8,%ZMM7,%ZMM3 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM2,%XMM15,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VBROADCASTSD %XMM2,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMULPD %ZMM3,%ZMM2,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPPD $0x2,%ZMM24,%ZMM2,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %ZMM2,%ZMM24{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VFPCLASSPD $0x56,%ZMM27,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VXORPD %ZMM16,%ZMM24,%ZMM24{%K2} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
JMP 43a240 <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3a80> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
Function | advec_mom_kernel_.DIR.OMP.PARALLEL.2 |
Source file and lines | advec_mom_kernel.f90:81-241 |
Module | exec |
nb instructions | 153 |
nb uops | 192 |
loop length | 861 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 10 |
used ymm registers | 7 |
used zmm registers | 23 |
nb stack references | 15 |
ADD-SUB / MUL ratio | 0.80 |
micro-operation queue | 32.00 cycles |
front end | 32.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 46.00 | 11.60 | 20.33 | 20.33 | 2.00 | 46.00 | 11.80 | 2.00 | 2.00 | 2.00 | 11.60 | 20.33 |
cycles | 46.00 | 12.07 | 20.33 | 20.33 | 2.00 | 46.00 | 11.80 | 2.00 | 2.00 | 2.00 | 11.60 | 20.33 |
Cycles executing div or sqrt instructions | 36.00 |
FE+BE cycles | 47.77-89.35 |
Stall cycles | 17.92-59.50 |
ROB full (events) | 19.91-63.47 |
Front-end | 32.00 |
Dispatch | 46.00 |
DIV/SQRT | 36.00 |
Overall L1 | 46.00 |
all | 65% |
load | 57% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 87% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 50% |
all | 90% |
load | 90% |
store | 100% |
mul | 80% |
add-sub | 100% |
fma | 100% |
div/sqrt | 66% |
other | 93% |
all | 79% |
load | 76% |
store | 100% |
mul | 88% |
add-sub | 90% |
fma | 100% |
div/sqrt | 66% |
other | 73% |
all | 56% |
load | 62% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 89% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 29% |
all | 87% |
load | 91% |
store | 100% |
mul | 82% |
add-sub | 100% |
fma | 100% |
div/sqrt | 70% |
other | 86% |
all | 73% |
load | 79% |
store | 100% |
mul | 90% |
add-sub | 91% |
fma | 100% |
div/sqrt | 70% |
other | 60% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VMOVAPD %ZMM24,%ZMM2{%K3}{z} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VSUBPD %ZMM25,%ZMM11,%ZMM3 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VFMADD213PD %ZMM20,%ZMM2,%ZMM3 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %ZMM22,%ZMM3,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
IMUL %R8,%R12 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD 0x38(%RBP),%R12 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
VMOVUPD %ZMM2,(%R12,%RBX,8){%K1} | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
ADD %R8,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R11,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP 0x28(%RSP),%R13 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
LEA 0x1(%R13),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JE 438450 <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x1c90> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R9,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x8,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 43a580 <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3dc0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R9,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x1(%RBX),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x98(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD %ESI,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV 0x30(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R9,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x1(%R13,%RCX,1),%R8 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R8,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB 0x38(%RSP),%RDI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
LEA (%R9,%RSI,1),%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (%R11,%R13,1),%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA 0x1(%R13,%R11,1),%R9D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA -0x2(%R13,%R11,1),%R11D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTD %R11D,%YMM23 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTD %ECX,%YMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTD %R8D,%YMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVQ 0x40(%RSP),%XMM26 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
XOR %R11D,%R11D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 43a333 <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3b73> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %RAX,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %RBX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x50(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 43a267 <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3aa7> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 43a582 <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3dc2> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
XOR %EBX,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPBROADCASTQ %RBX,%ZMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQA64 0x200(%RSP),%ZMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VPSUBQ %ZMM25,%ZMM2,%ZMM3 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
VPCMPNLEUQ 0xcf61f(%RIP),%ZMM3,%K1 | |||||||||||||||
KORTESTB %K1,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JE 43a267 <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3aa7> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x98(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD %EDI,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV 0x30(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x1(%R13,%RCX,1),%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RCX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB 0x38(%RSP),%R12 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %R11,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %R12,%RSI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD 0x50(%RBP),%RSI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
ADD %RDX,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB 0x40(%RSP),%RBX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
VMOVUPD (%RSI,%RBX,8),%ZMM2{%K1}{z} | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVAPD %ZMM2,%ZMM22{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
LEA (%RAX,%RDI,1),%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA -0x2(%R13,%RSI,1),%EDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTD %EDI,%YMM23 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA 0x1(%R13,%RSI,1),%EDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VFPCLASSPD $0x50,%ZMM22,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQA64 %YMM23,%YMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VPBROADCASTD %EDI,%YMM2{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %R13D,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VPBROADCASTD %ESI,%YMM26 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTD %ECX,%YMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTD %ESI,%YMM3{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQA64 %YMM26,%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VPBROADCASTD %ECX,%YMM7{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPXORD %XMM24,%XMM24,%XMM24 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VPMOVSXDQ %YMM3,%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %ZMM5,%ZMM3,%ZMM3 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
VPMULLQ %ZMM3,%ZMM0,%ZMM8 | 5 | 1.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPADDQ 0x280(%RSP),%ZMM25,%ZMM17 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
VPSUBQ 0x2c0(%RSP),%ZMM17,%ZMM17 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.67 |
VPSLLQ $0x3,%ZMM17,%ZMM17 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2-4 | 1 |
VPADDQ %ZMM9,%ZMM17,%ZMM17 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VPADDQ %ZMM17,%ZMM6,%ZMM18 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VPADDQ %ZMM8,%ZMM18,%ZMM8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
KMOVQ %K1,%K3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
VPXORD %XMM18,%XMM18,%XMM18 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VGATHERQPD (,%ZMM8,1),%ZMM18{%K3} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VANDPD %ZMM4,%ZMM22,%ZMM8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VPMULLQ %ZMM3,%ZMM1,%ZMM3 | 5 | 1.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPADDQ %ZMM17,%ZMM10,%ZMM17 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VPADDQ %ZMM3,%ZMM17,%ZMM3 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
KMOVQ %K1,%K3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
VXORPD %XMM19,%XMM19,%XMM19 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VGATHERQPD (,%ZMM3,1),%ZMM19{%K3} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VPMOVSXDQ %YMM2,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %ZMM5,%ZMM2,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
VPMULLQ %ZMM2,%ZMM1,%ZMM2 | 5 | 1.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPADDQ %ZMM2,%ZMM17,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
KMOVQ %K1,%K3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
VXORPD %XMM3,%XMM3,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VGATHERQPD (,%ZMM2,1),%ZMM3{%K3} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VMOVAPD %ZMM18,%ZMM21{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VDIVPD %ZMM21,%ZMM8,%ZMM25 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VMOVAPD %ZMM19,%ZMM20{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VMOVAPD 0x1c0(%RSP),%ZMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVAPD %ZMM3,%ZMM8{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VPMOVSXDQ %YMM7,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %ZMM5,%ZMM2,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
VPMULLQ %ZMM2,%ZMM1,%ZMM2 | 5 | 1.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPADDQ %ZMM2,%ZMM17,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
KMOVQ %K1,%K3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
VPXOR %XMM7,%XMM7,%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VGATHERQPD (,%ZMM2,1),%ZMM7{%K3} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VSUBPD %ZMM8,%ZMM20,%ZMM3 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVAPD 0x180(%RSP),%ZMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVAPD %ZMM7,%ZMM2{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VMOVAPD %ZMM2,%ZMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VSUBPD %ZMM20,%ZMM2,%ZMM27 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %ZMM3,%ZMM27,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPPD $0x1,%ZMM2,%ZMM24,%K3{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
KORTESTB %K3,%K3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
VMOVAPD %ZMM7,0x180(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVAPD %ZMM8,0x1c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
JE 43a240 <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3a80> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVDQA32 %YMM26,%YMM23{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VMOVSD (%R10,%R12,8),%XMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VANDPD %ZMM4,%ZMM3,%ZMM3 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VANDPD %ZMM4,%ZMM27,%ZMM24 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VSUBPD %ZMM25,%ZMM13,%ZMM7 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %ZMM7,%ZMM24,%ZMM7 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VDIVSD %XMM2,%XMM14,%XMM8 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 4 |
VBROADCASTSD %XMM8,%ZMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VCMPPD $0x2,%ZMM24,%ZMM3,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %ZMM3,%ZMM24{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VFMADD213PD %ZMM3,%ZMM25,%ZMM3 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VPMOVSXDQ %YMM23,%ZMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %ZMM5,%ZMM17,%ZMM17 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
VXORPD %XMM18,%XMM18,%XMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KMOVQ %K3,%K2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
VGATHERQPD (%R10,%ZMM17,8),%ZMM18{%K2} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VMOVAPD 0x240(%RSP),%ZMM17 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVAPD %ZMM18,%ZMM17{%K3} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VMOVAPD %ZMM17,0x240(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VDIVPD %ZMM17,%ZMM3,%ZMM3 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VFMADD231PD %ZMM8,%ZMM7,%ZMM3 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM2,%XMM15,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VBROADCASTSD %XMM2,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMULPD %ZMM3,%ZMM2,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPPD $0x2,%ZMM24,%ZMM2,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %ZMM2,%ZMM24{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VFPCLASSPD $0x56,%ZMM27,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VXORPD %ZMM16,%ZMM24,%ZMM24{%K2} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
JMP 43a240 <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3a80> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |