Function: __pack_kernel_module_MOD_clover_pack_message_right._omp_fn.0.lto_priv.0 | Module: exec | Source: pack_kernel.f90:155-160 | Coverage: 0.03% |
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Function: __pack_kernel_module_MOD_clover_pack_message_right._omp_fn.0.lto_priv.0 | Module: exec | Source: pack_kernel.f90:155-160 | Coverage: 0.03% |
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/scratch_na/users/xoserete/qaas_runs/171-214-9740/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/pack_kernel.f90: 155 - 160 |
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155: !$OMP PARALLEL DO PRIVATE(index) |
156: DO k=y_min-depth,y_max+y_inc+depth |
157: !$OMP SIMD |
158: DO j=1,depth |
159: index= buffer_offset + j+(k+depth-1)*depth |
160: right_snd_buffer(index)=field(x_max+1-j,k) |
0x4336c0 PUSH %RBP |
0x4336c1 MOV %RSP,%RBP |
0x4336c4 PUSH %R15 |
0x4336c6 PUSH %R14 |
0x4336c8 MOV %RDI,%R14 |
0x4336cb PUSH %R13 |
0x4336cd PUSH %R12 |
0x4336cf PUSH %RBX |
0x4336d0 AND $-0x20,%RSP |
0x4336d4 SUB $0xc0,%RSP |
0x4336db MOV 0x28(%RDI),%RDX |
0x4336df MOV 0x30(%RDI),%RAX |
0x4336e3 MOV 0x20(%RDI),%RCX |
0x4336e7 MOV 0x54(%RDI),%R12D |
0x4336eb MOV 0x48(%RDI),%RBX |
0x4336ef MOV 0x40(%RDI),%R13 |
0x4336f3 MOV %RDX,0xb0(%RSP) |
0x4336fb MOV %RCX,0xb8(%RSP) |
0x433703 MOV %RAX,0xa8(%RSP) |
0x43370b CALL 402080 <@plt_start@+0x60> |
0x433710 MOV %EAX,%R15D |
0x433713 CALL 402180 <@plt_start@+0x160> |
0x433718 MOV %EAX,%ESI |
0x43371a MOV 0x58(%R14),%EAX |
0x43371e INC %EAX |
0x433720 SUB %R12D,%EAX |
0x433723 CLTD |
0x433724 IDIV %R15D |
0x433727 CMP %EDX,%ESI |
0x433729 JL 433b1b |
0x43372f IMUL %EAX,%ESI |
0x433732 ADD %EDX,%ESI |
0x433734 ADD %ESI,%EAX |
0x433736 CMP %EAX,%ESI |
0x433738 JGE 433ab9 |
0x43373e ADD %R12D,%EAX |
0x433741 CMPQ $0x1,0xb8(%RSP) |
0x43374a LEA (%R12,%RSI,1),%R15D |
0x43374e MOV 0x8(%R14),%RDI |
0x433752 SETNE %R11B |
0x433756 CMP $0x1,%R13 |
0x43375a MOV 0x10(%R14),%R9 |
0x43375e MOV (%R14),%R10 |
0x433761 SETNE %R12B |
0x433765 MOV (%RDI),%R8D |
0x433768 MOV 0x18(%R14),%RSI |
0x43376c MOV %EAX,0xa4(%RSP) |
0x433773 OR %R12B,%R11B |
0x433776 MOV %R9,0x98(%RSP) |
0x43377e MOV 0x38(%R14),%RDI |
0x433782 MOVSXD %R15D,%RAX |
0x433785 MOV %R10,0x90(%RSP) |
0x43378d MOV 0xb0(%RSP),%RCX |
0x433795 MOV %R11B,0xa3(%RSP) |
0x43379d JNE 433b24 |
0x4337a3 IMUL %RCX,%RAX |
0x4337a7 MOV 0xa8(%RSP),%R12 |
0x4337af LEA -0x1(%R8),%R13D |
0x4337b3 MOV %R8D,%R10D |
0x4337b6 MOV %R8D,%EDX |
0x4337b9 SHR $0x2,%R10D |
0x4337bd MOV %R13D,0xb8(%RSP) |
0x4337c5 LEA (%R15,%R13,1),%R13D |
0x4337c9 AND $-0x4,%EDX |
0x4337cc SAL $0x5,%R10 |
0x4337d0 XOR %ECX,%ECX |
0x4337d2 MOV %R14,0x70(%RSP) |
0x4337d7 ADD %RAX,%R12 |
0x4337da IMUL %R8D,%R13D |
0x4337de MOV %EDX,0xa8(%RSP) |
0x4337e5 INC %EDX |
0x4337e7 TEST %R8D,%R8D |
0x4337ea LEA 0x1(%RBX),%RAX |
0x4337ee MOV %R10,0x88(%RSP) |
0x4337f6 CMOVNS %R8D,%ECX |
0x4337fa MOV %EDX,0x78(%RSP) |
0x4337fe MOV %RAX,0x80(%RSP) |
0x433806 INC %ECX |
0x433808 MOV %ECX,0x68(%RSP) |
0x43380c NOPL (%RAX) |
(232) 0x433810 TEST %R8D,%R8D |
(232) 0x433813 JLE 433a83 |
(232) 0x433819 MOV 0x90(%RSP),%R9 |
(232) 0x433821 MOV 0x98(%RSP),%R14 |
(232) 0x433829 CMPL $0x2,0xb8(%RSP) |
(232) 0x433831 MOVSXD (%R9),%R9 |
(232) 0x433834 MOV (%R14),%R10D |
(232) 0x433837 LEA 0x1(%R9),%EDX |
(232) 0x43383b JBE 433b0f |
(232) 0x433841 MOV 0x80(%RSP),%R14 |
(232) 0x433849 MOVSXD %R9D,%R11 |
(232) 0x43384c MOVSXD %R10D,%RCX |
(232) 0x43384f ADD %R12,%R11 |
(232) 0x433852 LEA -0x18(%RSI,%R11,8),%RAX |
(232) 0x433857 ADD %R14,%RCX |
(232) 0x43385a MOVSXD %R13D,%R11 |
(232) 0x43385d ADD %R11,%RCX |
(232) 0x433860 MOV 0x88(%RSP),%R11 |
(232) 0x433868 MOV %RAX,%R14 |
(232) 0x43386b LEA (%RDI,%RCX,8),%RCX |
(232) 0x43386f SUB %R11,%R14 |
(232) 0x433872 SUB $0x20,%R11 |
(232) 0x433876 SHR $0x5,%R11 |
(232) 0x43387a INC %R11 |
(232) 0x43387d AND $0x7,%R11D |
(232) 0x433881 JE 43395e |
(232) 0x433887 CMP $0x1,%R11 |
(232) 0x43388b JE 43393e |
(232) 0x433891 CMP $0x2,%R11 |
(232) 0x433895 JE 433927 |
(232) 0x43389b CMP $0x3,%R11 |
(232) 0x43389f JE 433910 |
(232) 0x4338a1 CMP $0x4,%R11 |
(232) 0x4338a5 JE 4338f9 |
(232) 0x4338a7 CMP $0x5,%R11 |
(232) 0x4338ab JE 4338e2 |
(232) 0x4338ad CMP $0x6,%R11 |
(232) 0x4338b1 JE 4338cb |
(232) 0x4338b3 VXORPS %XMM15,%XMM15,%XMM15 |
(232) 0x4338b8 VPERMPD $0x1b,(%RAX),%YMM15 |
(232) 0x4338be ADD $0x20,%RCX |
(232) 0x4338c2 SUB $0x20,%RAX |
(232) 0x4338c6 VMOVUPD %YMM15,-0x20(%RCX) |
(232) 0x4338cb VXORPS %XMM3,%XMM3,%XMM3 |
(232) 0x4338cf VPERMPD $0x1b,(%RAX),%YMM3 |
(232) 0x4338d5 ADD $0x20,%RCX |
(232) 0x4338d9 SUB $0x20,%RAX |
(232) 0x4338dd VMOVUPD %YMM3,-0x20(%RCX) |
(232) 0x4338e2 VXORPS %XMM2,%XMM2,%XMM2 |
(232) 0x4338e6 VPERMPD $0x1b,(%RAX),%YMM2 |
(232) 0x4338ec ADD $0x20,%RCX |
(232) 0x4338f0 SUB $0x20,%RAX |
(232) 0x4338f4 VMOVUPD %YMM2,-0x20(%RCX) |
(232) 0x4338f9 VXORPS %XMM1,%XMM1,%XMM1 |
(232) 0x4338fd VPERMPD $0x1b,(%RAX),%YMM1 |
(232) 0x433903 ADD $0x20,%RCX |
(232) 0x433907 SUB $0x20,%RAX |
(232) 0x43390b VMOVUPD %YMM1,-0x20(%RCX) |
(232) 0x433910 VXORPS %XMM0,%XMM0,%XMM0 |
(232) 0x433914 VPERMPD $0x1b,(%RAX),%YMM0 |
(232) 0x43391a ADD $0x20,%RCX |
(232) 0x43391e SUB $0x20,%RAX |
(232) 0x433922 VMOVUPD %YMM0,-0x20(%RCX) |
(232) 0x433927 VXORPS %XMM4,%XMM4,%XMM4 |
(232) 0x43392b VPERMPD $0x1b,(%RAX),%YMM4 |
(232) 0x433931 ADD $0x20,%RCX |
(232) 0x433935 SUB $0x20,%RAX |
(232) 0x433939 VMOVUPD %YMM4,-0x20(%RCX) |
(232) 0x43393e VXORPS %XMM5,%XMM5,%XMM5 |
(232) 0x433942 VPERMPD $0x1b,(%RAX),%YMM5 |
(232) 0x433948 SUB $0x20,%RAX |
(232) 0x43394c ADD $0x20,%RCX |
(232) 0x433950 VMOVUPD %YMM5,-0x20(%RCX) |
(232) 0x433955 CMP %RAX,%R14 |
(232) 0x433958 JE 433a11 |
(233) 0x43395e VXORPS %XMM6,%XMM6,%XMM6 |
(233) 0x433962 VPERMPD $0x1b,(%RAX),%YMM6 |
(233) 0x433968 SUB $0x100,%RAX |
(233) 0x43396e ADD $0x100,%RCX |
(233) 0x433975 VMOVUPD %YMM6,-0x100(%RCX) |
(233) 0x43397d VXORPS %XMM7,%XMM7,%XMM7 |
(233) 0x433981 VPERMPD $0x1b,0xe0(%RAX),%YMM7 |
(233) 0x43398b VMOVUPD %YMM7,-0xe0(%RCX) |
(233) 0x433993 VXORPS %XMM8,%XMM8,%XMM8 |
(233) 0x433998 VPERMPD $0x1b,0xc0(%RAX),%YMM8 |
(233) 0x4339a2 VMOVUPD %YMM8,-0xc0(%RCX) |
(233) 0x4339aa VXORPS %XMM9,%XMM9,%XMM9 |
(233) 0x4339af VPERMPD $0x1b,0xa0(%RAX),%YMM9 |
(233) 0x4339b9 VMOVUPD %YMM9,-0xa0(%RCX) |
(233) 0x4339c1 VXORPS %XMM10,%XMM10,%XMM10 |
(233) 0x4339c6 VPERMPD $0x1b,0x80(%RAX),%YMM10 |
(233) 0x4339d0 VMOVUPD %YMM10,-0x80(%RCX) |
(233) 0x4339d5 VXORPS %XMM11,%XMM11,%XMM11 |
(233) 0x4339da VPERMPD $0x1b,0x60(%RAX),%YMM11 |
(233) 0x4339e1 VMOVUPD %YMM11,-0x60(%RCX) |
(233) 0x4339e6 VXORPS %XMM12,%XMM12,%XMM12 |
(233) 0x4339eb VPERMPD $0x1b,0x40(%RAX),%YMM12 |
(233) 0x4339f2 VMOVUPD %YMM12,-0x40(%RCX) |
(233) 0x4339f7 VXORPS %XMM13,%XMM13,%XMM13 |
(233) 0x4339fc VPERMPD $0x1b,0x20(%RAX),%YMM13 |
(233) 0x433a03 VMOVUPD %YMM13,-0x20(%RCX) |
(233) 0x433a08 CMP %RAX,%R14 |
(233) 0x433a0b JNE 43395e |
(232) 0x433a11 MOV 0xa8(%RSP),%EAX |
(232) 0x433a18 CMP %R8D,%EAX |
(232) 0x433a1b JE 433a83 |
(232) 0x433a1d MOV %EAX,%ECX |
(232) 0x433a1f MOV 0x78(%RSP),%EAX |
(232) 0x433a23 MOV %R8D,%R11D |
(232) 0x433a26 SUB %ECX,%R11D |
(232) 0x433a29 CMP $0x1,%R11D |
(232) 0x433a2d JE 433a66 |
(232) 0x433a2f MOV %RCX,%R14 |
(232) 0x433a32 ADD %R12,%R9 |
(232) 0x433a35 ADD %RBX,%RCX |
(232) 0x433a38 NOT %R14 |
(232) 0x433a3b LEA (%RSI,%R9,8),%R9 |
(232) 0x433a3f VPERMILPD $0x1,(%R9,%R14,8),%XMM14 |
(232) 0x433a46 MOVSXD %R10D,%R9 |
(232) 0x433a49 MOVSXD %R13D,%R14 |
(232) 0x433a4c ADD %RCX,%R9 |
(232) 0x433a4f LEA 0x1(%R14,%R9,1),%RCX |
(232) 0x433a54 VMOVUPD %XMM14,(%RDI,%RCX,8) |
(232) 0x433a59 TEST $0x1,%R11B |
(232) 0x433a5d JE 433a83 |
(232) 0x433a5f AND $-0x2,%R11D |
(232) 0x433a63 ADD %R11D,%EAX |
(232) 0x433a66 SUB %EAX,%EDX |
(232) 0x433a68 ADD %R10D,%EAX |
(232) 0x433a6b MOVSXD %EDX,%RDX |
(232) 0x433a6e ADD %R13D,%EAX |
(232) 0x433a71 ADD %R12,%RDX |
(232) 0x433a74 CLTQ |
(232) 0x433a76 VMOVSD (%RSI,%RDX,8),%XMM15 |
(232) 0x433a7b ADD %RBX,%RAX |
(232) 0x433a7e VMOVSD %XMM15,(%RDI,%RAX,8) |
(232) 0x433a83 MOV 0xb0(%RSP),%R10 |
(232) 0x433a8b INC %R15D |
(232) 0x433a8e ADD %R8D,%R13D |
(232) 0x433a91 ADD %R10,%R12 |
(232) 0x433a94 TEST %R8D,%R8D |
(232) 0x433a97 JNS 433af0 |
(232) 0x433a99 CMP %R15D,0xa4(%RSP) |
(232) 0x433aa1 JG 433810 |
0x433aa7 MOV 0x70(%RSP),%R15 |
0x433aac VZEROUPPER |
0x433aaf CMPB $0,0xa3(%RSP) |
0x433ab7 JNE 433ad8 |
0x433ab9 LEA -0x28(%RBP),%RSP |
0x433abd POP %RBX |
0x433abe POP %R12 |
0x433ac0 POP %R13 |
0x433ac2 POP %R14 |
0x433ac4 POP %R15 |
0x433ac6 POP %RBP |
0x433ac7 RET |
0x433ac8 MOV 0x70(%RSP),%R15 |
0x433acd VZEROUPPER |
0x433ad0 MOV 0x68(%RSP),%EBX |
0x433ad4 MOV %EBX,0x64(%RSP) |
0x433ad8 MOV 0x64(%RSP),%R8D |
0x433add MOV %R8D,0x50(%R15) |
0x433ae1 LEA -0x28(%RBP),%RSP |
0x433ae5 POP %RBX |
0x433ae6 POP %R12 |
0x433ae8 POP %R13 |
0x433aea POP %R14 |
0x433aec POP %R15 |
0x433aee POP %RBP |
0x433aef RET |
(232) 0x433af0 CMP %R15D,0xa4(%RSP) |
(232) 0x433af8 JLE 433ac8 |
(232) 0x433afa MOV 0x68(%RSP),%EAX |
(232) 0x433afe MOVB $0x1,0xa3(%RSP) |
(232) 0x433b06 MOV %EAX,0x64(%RSP) |
(232) 0x433b0a JMP 433810 |
(232) 0x433b0f XOR %ECX,%ECX |
(232) 0x433b11 MOV $0x1,%EAX |
(232) 0x433b16 JMP 433a23 |
0x433b1b INC %EAX |
0x433b1d XOR %EDX,%EDX |
0x433b1f JMP 43372f |
0x433b24 IMUL %RCX,%RAX |
0x433b28 MOV 0xb8(%RSP),%R11 |
0x433b30 MOV 0xa8(%RSP),%RDX |
0x433b38 MOV %R8D,%R10D |
0x433b3b KXORB %K0,%K0,%K0 |
0x433b3f SHR $0x2,%R10D |
0x433b43 MOV %R13,%RCX |
0x433b46 LEA -0x1(%R8),%R9D |
0x433b4a MOV %R15D,0x70(%RSP) |
0x433b4f NEG %R11 |
0x433b52 SAL $0x5,%RCX |
0x433b56 MOV %R10D,0x6c(%RSP) |
0x433b5b LEA (,%R13,8),%R10 |
0x433b63 ADD %RAX,%RDX |
0x433b66 MOV %R11,%R12 |
0x433b69 LEA (,%R11,8),%RAX |
0x433b71 SAL $0x4,%R11 |
0x433b75 MOV %RCX,0x50(%RSP) |
0x433b7a MOV %R8D,%ECX |
0x433b7d SAL $0x5,%R12 |
0x433b81 MOV %R10,0x40(%RSP) |
0x433b86 MOV %R11,%R10 |
0x433b89 MOV %R13,%R11 |
0x433b8c AND $-0x4,%ECX |
0x433b8f SAL $0x4,%R11 |
0x433b93 MOV %R9D,0x60(%RSP) |
0x433b98 ADD %R15D,%R9D |
0x433b9b MOV %RAX,0x80(%RSP) |
0x433ba3 IMUL %R8D,%R9D |
0x433ba7 LEA (%R13,%R13,2),%RAX |
0x433bac SAL $0x3,%RAX |
0x433bb0 MOV %R11,0x58(%RSP) |
0x433bb5 XOR %R11D,%R11D |
0x433bb8 MOV %ECX,0x34(%RSP) |
0x433bbc INC %ECX |
0x433bbe TEST %R8D,%R8D |
0x433bc1 CMOVNS %R8D,%R11D |
0x433bc5 MOV %RAX,0x48(%RSP) |
0x433bca MOV %R9D,%R15D |
0x433bcd MOV %ECX,0x1c(%RSP) |
0x433bd1 INC %R11D |
0x433bd4 MOV %R12,0x78(%RSP) |
0x433bd9 MOV %R11D,0x68(%RSP) |
0x433bde MOV %R14,0x10(%RSP) |
0x433be3 MOV %RDX,%R14 |
0x433be6 NOPW %CS:(%RAX,%RAX,1) |
(230) 0x433bf0 TEST %R8D,%R8D |
(230) 0x433bf3 JLE 433f7e |
(230) 0x433bf9 MOV 0x90(%RSP),%R12 |
(230) 0x433c01 MOV 0x98(%RSP),%RDX |
(230) 0x433c09 CMPL $0x2,0x60(%RSP) |
(230) 0x433c0e MOV (%R12),%R12D |
(230) 0x433c12 MOV (%RDX),%R9D |
(230) 0x433c15 LEA 0x1(%R12),%EAX |
(230) 0x433c1a MOV %R9D,0xa8(%RSP) |
(230) 0x433c22 MOV %EAX,0x88(%RSP) |
(230) 0x433c29 JBE 433fdd |
(230) 0x433c2f MOV 0xb8(%RSP),%RCX |
(230) 0x433c37 MOVSXD %R12D,%R11 |
(230) 0x433c3a MOVSXD %R9D,%R9 |
(230) 0x433c3d MOVSXD %R15D,%RDX |
(230) 0x433c40 LEA 0x1(%R9,%RDX,1),%RAX |
(230) 0x433c45 XOR %R9D,%R9D |
(230) 0x433c48 IMUL %RCX,%R11 |
(230) 0x433c4c MOV 0x80(%RSP),%RCX |
(230) 0x433c54 IMUL %R13,%RAX |
(230) 0x433c58 ADD %R14,%R11 |
(230) 0x433c5b LEA (%RSI,%R11,8),%R11 |
(230) 0x433c5f ADD %RBX,%RAX |
(230) 0x433c62 LEA (%R11,%RCX,1),%RDX |
(230) 0x433c66 MOV 0x6c(%RSP),%ECX |
(230) 0x433c6a MOV %R11,0x38(%RSP) |
(230) 0x433c6f LEA (%RDI,%RAX,8),%RAX |
(230) 0x433c73 AND $0x3,%ECX |
(230) 0x433c76 JE 433d8a |
(230) 0x433c7c CMP $0x1,%ECX |
(230) 0x433c7f JE 433d2f |
(230) 0x433c85 CMP $0x2,%ECX |
(230) 0x433c88 JE 433ce1 |
(230) 0x433c8a MOV 0x38(%RSP),%R9 |
(230) 0x433c8f VMOVSD (%RDX),%XMM2 |
(230) 0x433c93 MOV 0x58(%RSP),%RCX |
(230) 0x433c98 VMOVSD (%RDX,%R10,1),%XMM0 |
(230) 0x433c9e VMOVSD (%R9),%XMM3 |
(230) 0x433ca3 VMOVSD (%R9,%R10,1),%XMM1 |
(230) 0x433ca9 MOV 0x48(%RSP),%R9 |
(230) 0x433cae VMOVSD %XMM3,(%RAX) |
(230) 0x433cb2 VMOVSD %XMM2,(%RAX,%R13,8) |
(230) 0x433cb8 VMOVSD %XMM1,(%RAX,%RCX,1) |
(230) 0x433cbd MOV 0x78(%RSP),%RCX |
(230) 0x433cc2 VMOVSD %XMM0,(%RAX,%R9,1) |
(230) 0x433cc8 MOV $0x1,%R9D |
(230) 0x433cce ADD %RCX,%R11 |
(230) 0x433cd1 MOV 0x50(%RSP),%RCX |
(230) 0x433cd6 ADD %RCX,%RAX |
(230) 0x433cd9 MOV 0x78(%RSP),%RCX |
(230) 0x433cde ADD %RCX,%RDX |
(230) 0x433ce1 VMOVSD (%R11),%XMM4 |
(230) 0x433ce6 VMOVSD (%RDX),%XMM5 |
(230) 0x433cea INC %R9D |
(230) 0x433ced VMOVSD (%R11,%R10,1),%XMM6 |
(230) 0x433cf3 MOV 0x58(%RSP),%RCX |
(230) 0x433cf8 VMOVSD (%RDX,%R10,1),%XMM7 |
(230) 0x433cfe VMOVSD %XMM4,(%RAX) |
(230) 0x433d02 VMOVSD %XMM5,(%RAX,%R13,8) |
(230) 0x433d08 VMOVSD %XMM6,(%RAX,%RCX,1) |
(230) 0x433d0d MOV 0x48(%RSP),%RCX |
(230) 0x433d12 VMOVSD %XMM7,(%RAX,%RCX,1) |
(230) 0x433d17 MOV 0x78(%RSP),%RCX |
(230) 0x433d1c ADD %RCX,%R11 |
(230) 0x433d1f MOV 0x50(%RSP),%RCX |
(230) 0x433d24 ADD %RCX,%RAX |
(230) 0x433d27 MOV 0x78(%RSP),%RCX |
(230) 0x433d2c ADD %RCX,%RDX |
(230) 0x433d2f VMOVSD (%R11),%XMM8 |
(230) 0x433d34 VMOVSD (%RDX),%XMM9 |
(230) 0x433d38 INC %R9D |
(230) 0x433d3b VMOVSD (%R11,%R10,1),%XMM10 |
(230) 0x433d41 MOV 0x58(%RSP),%RCX |
(230) 0x433d46 VMOVSD (%RDX,%R10,1),%XMM11 |
(230) 0x433d4c VMOVSD %XMM8,(%RAX) |
(230) 0x433d50 VMOVSD %XMM9,(%RAX,%R13,8) |
(230) 0x433d56 VMOVSD %XMM10,(%RAX,%RCX,1) |
(230) 0x433d5b MOV 0x48(%RSP),%RCX |
(230) 0x433d60 VMOVSD %XMM11,(%RAX,%RCX,1) |
(230) 0x433d65 MOV 0x78(%RSP),%RCX |
(230) 0x433d6a ADD %RCX,%R11 |
(230) 0x433d6d MOV 0x50(%RSP),%RCX |
(230) 0x433d72 ADD %RCX,%RAX |
(230) 0x433d75 MOV 0x78(%RSP),%RCX |
(230) 0x433d7a ADD %RCX,%RDX |
(230) 0x433d7d MOV 0x6c(%RSP),%ECX |
(230) 0x433d81 CMP %ECX,%R9D |
(230) 0x433d84 JE 433ea8 |
(230) 0x433d8a MOV %RBX,0x38(%RSP) |
(230) 0x433d8f MOV 0x78(%RSP),%RCX |
(230) 0x433d94 MOV %R8D,0x30(%RSP) |
(230) 0x433d99 MOV 0x48(%RSP),%R8 |
(230) 0x433d9e MOV %RSI,0x28(%RSP) |
(230) 0x433da3 MOV 0x58(%RSP),%RSI |
(230) 0x433da8 MOV %RDI,0x20(%RSP) |
(230) 0x433dad MOV 0x50(%RSP),%RDI |
(231) 0x433db2 VMOVSD (%R11),%XMM12 |
(231) 0x433db7 VMOVSD (%RDX),%XMM13 |
(231) 0x433dbb ADD $0x4,%R9D |
(231) 0x433dbf VMOVSD (%R11,%R10,1),%XMM14 |
(231) 0x433dc5 VMOVSD (%RDX,%R10,1),%XMM15 |
(231) 0x433dcb ADD %RCX,%R11 |
(231) 0x433dce ADD %RCX,%RDX |
(231) 0x433dd1 VMOVSD %XMM12,(%RAX) |
(231) 0x433dd5 VMOVSD %XMM13,(%RAX,%R13,8) |
(231) 0x433ddb VMOVSD %XMM14,(%RAX,%RSI,1) |
(231) 0x433de0 VMOVSD %XMM15,(%RAX,%R8,1) |
(231) 0x433de6 ADD %RDI,%RAX |
(231) 0x433de9 VMOVSD (%R11),%XMM3 |
(231) 0x433dee VMOVSD (%RDX),%XMM2 |
(231) 0x433df2 VMOVSD (%R11,%R10,1),%XMM1 |
(231) 0x433df8 VMOVSD (%RDX,%R10,1),%XMM0 |
(231) 0x433dfe ADD %RCX,%R11 |
(231) 0x433e01 ADD %RCX,%RDX |
(231) 0x433e04 VMOVSD %XMM3,(%RAX) |
(231) 0x433e08 VMOVSD %XMM2,(%RAX,%R13,8) |
(231) 0x433e0e VMOVSD %XMM1,(%RAX,%RSI,1) |
(231) 0x433e13 VMOVSD %XMM0,(%RAX,%R8,1) |
(231) 0x433e19 ADD %RDI,%RAX |
(231) 0x433e1c VMOVSD (%R11),%XMM4 |
(231) 0x433e21 VMOVSD (%RDX),%XMM5 |
(231) 0x433e25 VMOVSD (%R11,%R10,1),%XMM6 |
(231) 0x433e2b VMOVSD (%RDX,%R10,1),%XMM7 |
(231) 0x433e31 ADD %RCX,%R11 |
(231) 0x433e34 ADD %RCX,%RDX |
(231) 0x433e37 VMOVSD %XMM4,(%RAX) |
(231) 0x433e3b VMOVSD %XMM5,(%RAX,%R13,8) |
(231) 0x433e41 VMOVSD %XMM6,(%RAX,%RSI,1) |
(231) 0x433e46 VMOVSD %XMM7,(%RAX,%R8,1) |
(231) 0x433e4c ADD %RDI,%RAX |
(231) 0x433e4f VMOVSD (%R11),%XMM8 |
(231) 0x433e54 VMOVSD (%RDX),%XMM9 |
(231) 0x433e58 VMOVSD (%R11,%R10,1),%XMM10 |
(231) 0x433e5e VMOVSD (%RDX,%R10,1),%XMM11 |
(231) 0x433e64 ADD %RCX,%R11 |
(231) 0x433e67 ADD %RCX,%RDX |
(231) 0x433e6a VMOVSD %XMM8,(%RAX) |
(231) 0x433e6e VMOVSD %XMM9,(%RAX,%R13,8) |
(231) 0x433e74 VMOVSD %XMM10,(%RAX,%RSI,1) |
(231) 0x433e79 VMOVSD %XMM11,(%RAX,%R8,1) |
(231) 0x433e7f MOV 0x6c(%RSP),%EBX |
(231) 0x433e83 ADD %RDI,%RAX |
(231) 0x433e86 CMP %EBX,%R9D |
(231) 0x433e89 JNE 433db2 |
(230) 0x433e8f MOV 0x38(%RSP),%RBX |
(230) 0x433e94 MOV 0x30(%RSP),%R8D |
(230) 0x433e99 MOV %RCX,0x78(%RSP) |
(230) 0x433e9e MOV 0x28(%RSP),%RSI |
(230) 0x433ea3 MOV 0x20(%RSP),%RDI |
(230) 0x433ea8 MOV 0x34(%RSP),%R11D |
(230) 0x433ead CMP %R11D,%R8D |
(230) 0x433eb0 JE 433f7e |
(230) 0x433eb6 MOV 0x1c(%RSP),%EAX |
(230) 0x433eba MOV %R11D,%EDX |
(230) 0x433ebd MOV %R8D,%R11D |
(230) 0x433ec0 SUB %EDX,%R11D |
(230) 0x433ec3 CMP $0x1,%R11D |
(230) 0x433ec7 JE 433f3f |
(230) 0x433ec9 MOVSXD %R12D,%R9 |
(230) 0x433ecc MOV 0xb8(%RSP),%R12 |
(230) 0x433ed4 MOV 0x80(%RSP),%RCX |
(230) 0x433edc IMUL %R12,%R9 |
(230) 0x433ee0 MOVSXD 0xa8(%RSP),%R12 |
(230) 0x433ee8 IMUL %RDX,%RCX |
(230) 0x433eec IMUL %R13,%RDX |
(230) 0x433ef0 ADD %R14,%R9 |
(230) 0x433ef3 LEA (%RCX,%R9,8),%R9 |
(230) 0x433ef7 MOVSXD %R15D,%RCX |
(230) 0x433efa LEA 0x1(%R12,%RCX,1),%R12 |
(230) 0x433eff MOV 0x80(%RSP),%RCX |
(230) 0x433f07 ADD %RSI,%R9 |
(230) 0x433f0a IMUL %R13,%R12 |
(230) 0x433f0e VMOVSD (%R9),%XMM12 |
(230) 0x433f13 VMOVSD (%R9,%RCX,1),%XMM13 |
(230) 0x433f19 MOV 0x40(%RSP),%R9 |
(230) 0x433f1e ADD %RBX,%R12 |
(230) 0x433f21 ADD %RDX,%R12 |
(230) 0x433f24 LEA (%RDI,%R12,8),%RDX |
(230) 0x433f28 VMOVSD %XMM12,(%RDX) |
(230) 0x433f2c VMOVSD %XMM13,(%RDX,%R9,1) |
(230) 0x433f32 TEST $0x1,%R11B |
(230) 0x433f36 JE 433f7e |
(230) 0x433f38 AND $-0x2,%R11D |
(230) 0x433f3c ADD %R11D,%EAX |
(230) 0x433f3f MOV 0x88(%RSP),%R11D |
(230) 0x433f47 MOV 0xa8(%RSP),%ECX |
(230) 0x433f4e MOV 0xb8(%RSP),%RDX |
(230) 0x433f56 SUB %EAX,%R11D |
(230) 0x433f59 ADD %EAX,%ECX |
(230) 0x433f5b MOVSXD %R11D,%R12 |
(230) 0x433f5e MOV %ECX,%EAX |
(230) 0x433f60 IMUL %RDX,%R12 |
(230) 0x433f64 ADD %R15D,%EAX |
(230) 0x433f67 CLTQ |
(230) 0x433f69 IMUL %R13,%RAX |
(230) 0x433f6d ADD %R14,%R12 |
(230) 0x433f70 VMOVSD (%RSI,%R12,8),%XMM14 |
(230) 0x433f76 ADD %RBX,%RAX |
(230) 0x433f79 VMOVSD %XMM14,(%RDI,%RAX,8) |
(230) 0x433f7e INCL 0x70(%RSP) |
(230) 0x433f82 MOV 0xb0(%RSP),%R11 |
(230) 0x433f8a ADD %R8D,%R15D |
(230) 0x433f8d ADD %R11,%R14 |
(230) 0x433f90 MOV 0x70(%RSP),%R9D |
(230) 0x433f95 TEST %R8D,%R8D |
(230) 0x433f98 JNS 433fbb |
(230) 0x433f9a CMP %R9D,0xa4(%RSP) |
(230) 0x433fa2 JG 433bf0 |
0x433fa8 MOV 0x10(%RSP),%R15 |
0x433fad KMOVB %K0,0xa3(%RSP) |
0x433fb6 JMP 433aaf |
(230) 0x433fbb CMP %R9D,0xa4(%RSP) |
(230) 0x433fc3 JLE 433fe9 |
(230) 0x433fc5 MOV 0x68(%RSP),%R12D |
(230) 0x433fca KMOVB 0xa3(%RSP),%K0 |
(230) 0x433fd3 MOV %R12D,0x64(%RSP) |
(230) 0x433fd8 JMP 433bf0 |
(230) 0x433fdd XOR %EDX,%EDX |
(230) 0x433fdf MOV $0x1,%EAX |
(230) 0x433fe4 JMP 433ebd |
0x433fe9 MOV 0x10(%RSP),%R15 |
0x433fee JMP 433ad0 |
0x433ff3 NOPW %CS:(%RAX,%RAX,1) |
0x433ffe XCHG %AX,%AX |
Path / |
Source file and lines | pack_kernel.f90:155-160 |
Module | exec |
nb instructions | 162 |
nb uops | 169 |
loop length | 664 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 23 |
micro-operation queue | 28.17 cycles |
front end | 28.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 11.80 | 11.80 | 13.00 | 13.00 | 19.00 | 11.87 | 11.80 | 19.00 | 19.00 | 19.00 | 11.73 | 13.00 |
cycles | 11.80 | 14.33 | 13.00 | 13.00 | 19.00 | 11.87 | 11.80 | 19.00 | 19.00 | 19.00 | 11.73 | 13.00 |
Cycles executing div or sqrt instructions | 6.00 |
FE+BE cycles | 27.44-27.48 |
Stall cycles | 0.00 |
Front-end | 28.17 |
Dispatch | 19.00 |
DIV/SQRT | 6.00 |
Overall L1 | 28.17 |
all | 3% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 8% |
all | 9% |
load | 11% |
store | 9% |
mul | 6% |
add-sub | 7% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 9% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RDI,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x20,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0xc0,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x28(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x54(%RDI),%R12D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RDI),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 402080 <@plt_start@+0x60> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 402180 <@plt_start@+0x160> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x58(%R14),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %R12D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R15D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
CMP %EDX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 433b1b <__pack_kernel_module_MOD_clover_pack_message_right._omp_fn.0.lto_priv.0+0x45b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %EAX,%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %ESI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 433ab9 <__pack_kernel_module_MOD_clover_pack_message_right._omp_fn.0.lto_priv.0+0x3f9> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %R12D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMPQ $0x1,0xb8(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
LEA (%R12,%RSI,1),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV 0x8(%R14),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SETNE %R11B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP $0x1,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x10(%R14),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R14),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SETNE %R12B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%R14),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0xa4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
OR %R12B,%R11B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R9,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%R14),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD %R15D,%RAX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV %R10,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb0(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11B,0xa3(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JNE 433b24 <__pack_kernel_module_MOD_clover_pack_message_right._omp_fn.0.lto_priv.0+0x464> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %RCX,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0xa8(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x1(%R8),%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R8D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8D,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%R10D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R13D,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R15,%R13,1),%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
AND $-0x4,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SAL $0x5,%R10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R14,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RAX,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
IMUL %R8D,%R13D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EDX,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST %R8D,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
LEA 0x1(%RBX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R10,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMOVNS %R8D,%ECX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %EDX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ECX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x70(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CMPB $0,0xa3(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 433ad8 <__pack_kernel_module_MOD_clover_pack_message_right._omp_fn.0.lto_priv.0+0x418> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
MOV 0x70(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV 0x68(%RSP),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EBX,0x64(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x64(%RSP),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8D,0x50(%R15) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 43372f <__pack_kernel_module_MOD_clover_pack_message_right._omp_fn.0.lto_priv.0+0x6f> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
IMUL %RCX,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0xb8(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xa8(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
KXORB %K0,%K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
SHR $0x2,%R10D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R13,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x1(%R8),%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R15D,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NEG %R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SAL $0x5,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R10D,0x6c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%R13,8),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R11,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (,%R11,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x4,%R11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RCX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8D,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x5,%R12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R10,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R13,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SAL $0x4,%R11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R9D,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R15D,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R8D,%R9D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%R13,%R13,2),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x3,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R11,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %R11D,%R11D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %ECX,0x34(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST %R8D,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
CMOVNS %R8D,%R11D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %ECX,0x1c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R12,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11D,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R14,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x10(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
KMOVB %K0,0xa3(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
JMP 433aaf <__pack_kernel_module_MOD_clover_pack_message_right._omp_fn.0.lto_priv.0+0x3ef> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV 0x10(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 433ad0 <__pack_kernel_module_MOD_clover_pack_message_right._omp_fn.0.lto_priv.0+0x410> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | pack_kernel.f90:155-160 |
Module | exec |
nb instructions | 162 |
nb uops | 169 |
loop length | 664 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 23 |
micro-operation queue | 28.17 cycles |
front end | 28.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 11.80 | 11.80 | 13.00 | 13.00 | 19.00 | 11.87 | 11.80 | 19.00 | 19.00 | 19.00 | 11.73 | 13.00 |
cycles | 11.80 | 14.33 | 13.00 | 13.00 | 19.00 | 11.87 | 11.80 | 19.00 | 19.00 | 19.00 | 11.73 | 13.00 |
Cycles executing div or sqrt instructions | 6.00 |
FE+BE cycles | 27.44-27.48 |
Stall cycles | 0.00 |
Front-end | 28.17 |
Dispatch | 19.00 |
DIV/SQRT | 6.00 |
Overall L1 | 28.17 |
all | 3% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 8% |
all | 9% |
load | 11% |
store | 9% |
mul | 6% |
add-sub | 7% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 9% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RDI,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x20,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0xc0,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x28(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x54(%RDI),%R12D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RDI),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 402080 <@plt_start@+0x60> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 402180 <@plt_start@+0x160> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x58(%R14),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %R12D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R15D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
CMP %EDX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 433b1b <__pack_kernel_module_MOD_clover_pack_message_right._omp_fn.0.lto_priv.0+0x45b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %EAX,%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %ESI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 433ab9 <__pack_kernel_module_MOD_clover_pack_message_right._omp_fn.0.lto_priv.0+0x3f9> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %R12D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMPQ $0x1,0xb8(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
LEA (%R12,%RSI,1),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV 0x8(%R14),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SETNE %R11B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP $0x1,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x10(%R14),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R14),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SETNE %R12B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%R14),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0xa4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
OR %R12B,%R11B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R9,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%R14),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD %R15D,%RAX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV %R10,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb0(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11B,0xa3(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JNE 433b24 <__pack_kernel_module_MOD_clover_pack_message_right._omp_fn.0.lto_priv.0+0x464> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %RCX,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0xa8(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x1(%R8),%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R8D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8D,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%R10D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R13D,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R15,%R13,1),%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
AND $-0x4,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SAL $0x5,%R10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R14,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RAX,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
IMUL %R8D,%R13D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EDX,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST %R8D,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
LEA 0x1(%RBX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R10,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMOVNS %R8D,%ECX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %EDX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ECX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x70(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CMPB $0,0xa3(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 433ad8 <__pack_kernel_module_MOD_clover_pack_message_right._omp_fn.0.lto_priv.0+0x418> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
MOV 0x70(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV 0x68(%RSP),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EBX,0x64(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x64(%RSP),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8D,0x50(%R15) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 43372f <__pack_kernel_module_MOD_clover_pack_message_right._omp_fn.0.lto_priv.0+0x6f> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
IMUL %RCX,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0xb8(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xa8(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
KXORB %K0,%K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
SHR $0x2,%R10D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R13,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x1(%R8),%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R15D,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NEG %R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SAL $0x5,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R10D,0x6c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%R13,8),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R11,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (,%R11,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x4,%R11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RCX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8D,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x5,%R12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R10,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R13,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SAL $0x4,%R11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R9D,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R15D,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R8D,%R9D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%R13,%R13,2),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x3,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R11,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %R11D,%R11D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %ECX,0x34(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST %R8D,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
CMOVNS %R8D,%R11D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %ECX,0x1c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R12,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11D,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R14,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x10(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
KMOVB %K0,0xa3(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
JMP 433aaf <__pack_kernel_module_MOD_clover_pack_message_right._omp_fn.0.lto_priv.0+0x3ef> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV 0x10(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 433ad0 <__pack_kernel_module_MOD_clover_pack_message_right._omp_fn.0.lto_priv.0+0x410> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼__pack_kernel_module_MOD_clover_pack_message_right._omp_fn.0.lto_priv.0– | 0.03 | 0.01 |
▼Loop 232 - pack_kernel.f90:155-160 - exec– | 0.03 | 0.02 |
○Loop 233 - pack_kernel.f90:160-160 - exec | 0 | 0 |
▼Loop 230 - pack_kernel.f90:159-160 - exec– | 0 | 0 |
○Loop 231 - pack_kernel.f90:160-160 - exec | 0 | 0 |