Function: __generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0 | Module: exec | Source: generate_chunk_kernel.f90:85-161 | Coverage: 0.04% |
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Function: __generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0 | Module: exec | Source: generate_chunk_kernel.f90:85-161 | Coverage: 0.04% |
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/scratch_na/users/xoserete/qaas_runs/171-214-9740/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/generate_chunk_kernel.f90: 85 - 161 |
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85: !$OMP PARALLEL SHARED(x_cent,y_cent) |
86: !$OMP DO |
87: DO k=y_min-2,y_max+2 |
88: !$OMP SIMD |
89: DO j=x_min-2,x_max+2 |
90: energy0(j,k)=state_energy(1) |
91: ENDDO |
92: ENDDO |
93: !$OMP END DO |
94: !$OMP DO |
95: DO k=y_min-2,y_max+2 |
96: !$OMP SIMD |
97: DO j=x_min-2,x_max+2 |
98: density0(j,k)=state_density(1) |
99: ENDDO |
100: ENDDO |
101: !$OMP END DO |
102: !$OMP DO |
103: DO k=y_min-2,y_max+2 |
104: !$OMP SIMD |
105: DO j=x_min-2,x_max+2 |
106: xvel0(j,k)=state_xvel(1) |
107: ENDDO |
108: ENDDO |
109: !$OMP END DO |
110: !$OMP DO |
111: DO k=y_min-2,y_max+2 |
112: !$OMP SIMD |
113: DO j=x_min-2,x_max+2 |
114: yvel0(j,k)=state_yvel(1) |
115: ENDDO |
116: ENDDO |
117: !$OMP END DO |
118: |
119: DO state=2,number_of_states |
120: |
121: ! Could the velocity setting be thread unsafe? |
122: x_cent=state_xmin(state) |
123: y_cent=state_ymin(state) |
124: |
125: !$OMP DO PRIVATE(radius,jt,kt) |
126: DO k=y_min-2,y_max+2 |
127: !$OMP SIMD |
128: DO j=x_min-2,x_max+2 |
129: IF(state_geometry(state).EQ.g_rect ) THEN |
130: IF(vertexx(j+1).GE.state_xmin(state).AND.vertexx(j).LT.state_xmax(state)) THEN |
131: IF(vertexy(k+1).GE.state_ymin(state).AND.vertexy(k).LT.state_ymax(state)) THEN |
132: energy0(j,k)=state_energy(state) |
133: density0(j,k)=state_density(state) |
134: DO kt=k,k+1 |
135: DO jt=j,j+1 |
136: xvel0(jt,kt)=state_xvel(state) |
137: yvel0(jt,kt)=state_yvel(state) |
138: ENDDO |
139: ENDDO |
140: ENDIF |
141: ENDIF |
142: ELSEIF(state_geometry(state).EQ.g_circ ) THEN |
143: radius=SQRT((cellx(j)-x_cent)*(cellx(j)-x_cent)+(celly(k)-y_cent)*(celly(k)-y_cent)) |
144: IF(radius.LE.state_radius(state))THEN |
145: energy0(j,k)=state_energy(state) |
146: density0(j,k)=state_density(state) |
147: DO kt=k,k+1 |
148: DO jt=j,j+1 |
149: xvel0(jt,kt)=state_xvel(state) |
150: yvel0(jt,kt)=state_yvel(state) |
151: ENDDO |
152: ENDDO |
153: ENDIF |
154: ELSEIF(state_geometry(state).EQ.g_point) THEN |
155: IF(vertexx(j).EQ.x_cent .AND. vertexy(k).EQ.y_cent) THEN |
156: energy0(j,k)=state_energy(state) |
157: density0(j,k)=state_density(state) |
158: DO kt=k,k+1 |
159: DO jt=j,j+1 |
160: xvel0(jt,kt)=state_xvel(state) |
161: yvel0(jt,kt)=state_yvel(state) |
0x43b260 PUSH %RBP |
0x43b261 MOV %RSP,%RBP |
0x43b264 PUSH %R15 |
0x43b266 PUSH %R14 |
0x43b268 MOV %RDI,%R14 |
0x43b26b PUSH %R13 |
0x43b26d PUSH %R12 |
0x43b26f PUSH %RBX |
0x43b270 AND $-0x20,%RSP |
0x43b274 SUB $0x180,%RSP |
0x43b27b MOV 0x120(%RDI),%RDX |
0x43b282 MOV 0x118(%RDI),%RCX |
0x43b289 MOV 0x108(%RDI),%RSI |
0x43b290 MOV 0x100(%RDI),%R8 |
0x43b297 MOV 0xf8(%RDI),%R9 |
0x43b29e MOV 0xf0(%RDI),%R10 |
0x43b2a5 MOV %RDX,0x160(%RSP) |
0x43b2ad MOV 0xe8(%RDI),%R11 |
0x43b2b4 MOV 0x128(%RDI),%RAX |
0x43b2bb MOV %RCX,0x60(%RSP) |
0x43b2c0 MOV 0xe0(%RDI),%R12 |
0x43b2c7 MOV 0x110(%RDI),%RBX |
0x43b2ce MOV %RSI,0x40(%RSP) |
0x43b2d3 MOV 0xd8(%RDI),%R13 |
0x43b2da MOV 0xd0(%RDI),%R15 |
0x43b2e1 MOV %R8,0x30(%RSP) |
0x43b2e6 MOV 0x10(%RDI),%RDI |
0x43b2ea MOV %R9,0x48(%RSP) |
0x43b2ef MOV %R10,0x138(%RSP) |
0x43b2f7 MOV %R11,0x50(%RSP) |
0x43b2fc MOV %RAX,0x38(%RSP) |
0x43b301 MOV %R12,0x130(%RSP) |
0x43b309 MOV %RBX,0x170(%RSP) |
0x43b311 MOV %R13,0x118(%RSP) |
0x43b319 MOV %R15,0x28(%RSP) |
0x43b31e MOV (%RDI),%EBX |
0x43b320 CALL 402080 <@plt_start@+0x60> |
0x43b325 MOV %EAX,%R12D |
0x43b328 MOV %EAX,0xb8(%RSP) |
0x43b32f SUB $0x2,%EBX |
0x43b332 CALL 402180 <@plt_start@+0x160> |
0x43b337 MOV %EAX,0x124(%RSP) |
0x43b33e MOV %EAX,%ECX |
0x43b340 MOV 0x18(%R14),%RAX |
0x43b344 MOV (%RAX),%EAX |
0x43b346 ADD $0x3,%EAX |
0x43b349 SUB %EBX,%EAX |
0x43b34b CLTD |
0x43b34c IDIV %R12D |
0x43b34f CMP %EDX,%ECX |
0x43b351 JL 43cb5f |
0x43b357 MOV 0x124(%RSP),%R9D |
0x43b35f IMUL %EAX,%R9D |
0x43b363 ADD %EDX,%R9D |
0x43b366 ADD %R9D,%EAX |
0x43b369 CMP %EAX,%R9D |
0x43b36c JGE 43b5ec |
0x43b372 MOV 0x138(%RSP),%R10 |
0x43b37a ADD %EBX,%R9D |
0x43b37d MOV (%R14),%RSI |
0x43b380 ADD %EBX,%EAX |
0x43b382 KXORB %K4,%K4,%K4 |
0x43b386 MOV 0x8(%R14),%R8 |
0x43b38a MOVSXD %R9D,%RCX |
0x43b38d MOV 0x70(%R14),%RDX |
0x43b391 MOV %EAX,0x16c(%RSP) |
0x43b398 IMUL %R10,%RCX |
0x43b39c MOVSXD (%RSI),%R13 |
0x43b39f MOV 0x48(%RSP),%RAX |
0x43b3a4 LEA (,%R10,8),%R11 |
0x43b3ac MOV (%R8),%EDI |
0x43b3af MOV 0x48(%R14),%RSI |
0x43b3b3 MOV %R11,0x158(%RSP) |
0x43b3bb LEA (%R13,%RAX,1),%R8 |
0x43b3c0 LEA -0x2(%R13),%R15D |
0x43b3c4 LEA 0x3(%RDI),%EBX |
0x43b3c7 SUB %R13D,%EDI |
0x43b3ca ADD %RCX,%R8 |
0x43b3cd ADD %RAX,%RCX |
0x43b3d0 LEA 0x4(%RDI),%R12D |
0x43b3d4 LEA 0x5(%RDI),%EAX |
0x43b3d7 MOV %EDI,%R11D |
0x43b3da MOV %EDI,0x140(%RSP) |
0x43b3e1 MOV %R12D,0x150(%RSP) |
0x43b3e9 MOV %EAX,%EDI |
0x43b3eb MOV %EAX,%R12D |
0x43b3ee LEA -0x10(%RSI,%R8,8),%R10 |
0x43b3f3 AND $-0x4,%EDI |
0x43b3f6 SHR $0x2,%R12D |
0x43b3fa LEA 0x5(%R15,%R11,1),%R8D |
0x43b3ff MOV %EDI,0x168(%RSP) |
0x43b406 SAL $0x5,%R12 |
0x43b40a ADD %R15D,%EDI |
0x43b40d CMP %EBX,%R15D |
0x43b410 CMOVGE %R15D,%R8D |
0x43b414 AND $0x3,%EAX |
0x43b417 MOV %EDI,0x128(%RSP) |
0x43b41e MOV %EAX,0x148(%RSP) |
0x43b425 MOV %R8D,0x178(%RSP) |
0x43b42d NOPL (%RAX) |
(298) 0x43b430 CMP %EBX,%R15D |
(298) 0x43b433 JGE 43b5a9 |
(298) 0x43b439 CMPL $0x2,0x150(%RSP) |
(298) 0x43b441 JBE 43ca94 |
(298) 0x43b447 LEA -0x20(%R12),%R8 |
(298) 0x43b44c LEA (%R12,%R10,1),%R11 |
(298) 0x43b450 MOV %R10,%RAX |
(298) 0x43b453 SHR $0x5,%R8 |
(298) 0x43b457 INC %R8 |
(298) 0x43b45a AND $0x7,%R8D |
(298) 0x43b45e JE 43b4e5 |
(298) 0x43b464 CMP $0x1,%R8 |
(298) 0x43b468 JE 43b4d2 |
(298) 0x43b46a CMP $0x2,%R8 |
(298) 0x43b46e JE 43b4c4 |
(298) 0x43b470 CMP $0x3,%R8 |
(298) 0x43b474 JE 43b4b6 |
(298) 0x43b476 CMP $0x4,%R8 |
(298) 0x43b47a JE 43b4a8 |
(298) 0x43b47c CMP $0x5,%R8 |
(298) 0x43b480 JE 43b49a |
(298) 0x43b482 CMP $0x6,%R8 |
(298) 0x43b486 JNE 43c961 |
(298) 0x43b48c VBROADCASTSD (%RDX),%YMM1 |
(298) 0x43b491 ADD $0x20,%RAX |
(298) 0x43b495 VMOVUPD %YMM1,-0x20(%RAX) |
(298) 0x43b49a VBROADCASTSD (%RDX),%YMM2 |
(298) 0x43b49f ADD $0x20,%RAX |
(298) 0x43b4a3 VMOVUPD %YMM2,-0x20(%RAX) |
(298) 0x43b4a8 VBROADCASTSD (%RDX),%YMM3 |
(298) 0x43b4ad ADD $0x20,%RAX |
(298) 0x43b4b1 VMOVUPD %YMM3,-0x20(%RAX) |
(298) 0x43b4b6 VBROADCASTSD (%RDX),%YMM4 |
(298) 0x43b4bb ADD $0x20,%RAX |
(298) 0x43b4bf VMOVUPD %YMM4,-0x20(%RAX) |
(298) 0x43b4c4 VBROADCASTSD (%RDX),%YMM5 |
(298) 0x43b4c9 ADD $0x20,%RAX |
(298) 0x43b4cd VMOVUPD %YMM5,-0x20(%RAX) |
(298) 0x43b4d2 VBROADCASTSD (%RDX),%YMM6 |
(298) 0x43b4d7 ADD $0x20,%RAX |
(298) 0x43b4db VMOVUPD %YMM6,-0x20(%RAX) |
(298) 0x43b4e0 CMP %R11,%RAX |
(298) 0x43b4e3 JE 43b54c |
(299) 0x43b4e5 VBROADCASTSD (%RDX),%YMM7 |
(299) 0x43b4ea ADD $0x100,%RAX |
(299) 0x43b4f0 VMOVUPD %YMM7,-0x100(%RAX) |
(299) 0x43b4f8 VBROADCASTSD (%RDX),%YMM8 |
(299) 0x43b4fd VMOVUPD %YMM8,-0xe0(%RAX) |
(299) 0x43b505 VBROADCASTSD (%RDX),%YMM9 |
(299) 0x43b50a VMOVUPD %YMM9,-0xc0(%RAX) |
(299) 0x43b512 VBROADCASTSD (%RDX),%YMM10 |
(299) 0x43b517 VMOVUPD %YMM10,-0xa0(%RAX) |
(299) 0x43b51f VBROADCASTSD (%RDX),%YMM11 |
(299) 0x43b524 VMOVUPD %YMM11,-0x80(%RAX) |
(299) 0x43b529 VBROADCASTSD (%RDX),%YMM12 |
(299) 0x43b52e VMOVUPD %YMM12,-0x60(%RAX) |
(299) 0x43b533 VBROADCASTSD (%RDX),%YMM13 |
(299) 0x43b538 VMOVUPD %YMM13,-0x40(%RAX) |
(299) 0x43b53d VBROADCASTSD (%RDX),%YMM14 |
(299) 0x43b542 VMOVUPD %YMM14,-0x20(%RAX) |
(299) 0x43b547 CMP %R11,%RAX |
(299) 0x43b54a JNE 43b4e5 |
(298) 0x43b54c MOV 0x148(%RSP),%EDI |
(298) 0x43b553 TEST %EDI,%EDI |
(298) 0x43b555 JE 43b5a9 |
(298) 0x43b557 MOV 0x168(%RSP),%EDI |
(298) 0x43b55e MOV 0x128(%RSP),%EAX |
(298) 0x43b565 MOV 0x140(%RSP),%R11D |
(298) 0x43b56d SUB %EDI,%R11D |
(298) 0x43b570 LEA 0x5(%R11),%R8D |
(298) 0x43b574 CMP $-0x4,%R11D |
(298) 0x43b578 JE 43b59b |
(298) 0x43b57a MOV %EDI,%R11D |
(298) 0x43b57d LEA (%RCX,%R13,1),%RDI |
(298) 0x43b581 VMOVDDUP (%RDX),%XMM15 |
(298) 0x43b585 ADD %R11,%RDI |
(298) 0x43b588 VMOVUPD %XMM15,-0x10(%RSI,%RDI,8) |
(298) 0x43b58e TEST $0x1,%R8B |
(298) 0x43b592 JE 43b5a9 |
(298) 0x43b594 AND $-0x2,%R8D |
(298) 0x43b598 ADD %R8D,%EAX |
(298) 0x43b59b VMOVSD (%RDX),%XMM0 |
(298) 0x43b59f CLTQ |
(298) 0x43b5a1 ADD %RCX,%RAX |
(298) 0x43b5a4 VMOVSD %XMM0,(%RSI,%RAX,8) |
(298) 0x43b5a9 MOV 0x178(%RSP),%EAX |
(298) 0x43b5b0 INC %R9D |
(298) 0x43b5b3 MOV 0x158(%RSP),%R8 |
(298) 0x43b5bb CMP %EAX,%EBX |
(298) 0x43b5bd JE 43c4ae |
(298) 0x43b5c3 MOV 0x138(%RSP),%R11 |
(298) 0x43b5cb ADD %R8,%R10 |
(298) 0x43b5ce ADD %R11,%RCX |
(298) 0x43b5d1 CMP %R9D,0x16c(%RSP) |
(298) 0x43b5d9 JG 43b430 |
0x43b5df KORTESTB %K4,%K4 |
0x43b5e3 JNE 43cb1d |
0x43b5e9 VZEROUPPER |
0x43b5ec CALL 402220 <@plt_start@+0x200> |
0x43b5f1 MOV 0x18(%R14),%RDX |
0x43b5f5 MOV 0x10(%R14),%R15 |
0x43b5f9 MOV (%RDX),%EAX |
0x43b5fb MOV (%R15),%EBX |
0x43b5fe ADD $0x3,%EAX |
0x43b601 SUB $0x2,%EBX |
0x43b604 SUB %EBX,%EAX |
0x43b606 CLTD |
0x43b607 IDIVL 0xb8(%RSP) |
0x43b60e CMP %EDX,0x124(%RSP) |
0x43b615 JL 43cb4d |
0x43b61b MOV 0x124(%RSP),%R9D |
0x43b623 IMUL %EAX,%R9D |
0x43b627 ADD %EDX,%R9D |
0x43b62a ADD %R9D,%EAX |
0x43b62d CMP %EAX,%R9D |
0x43b630 JGE 43b8b4 |
0x43b636 MOV 0x8(%R14),%RCX |
0x43b63a MOV 0x130(%RSP),%R10 |
0x43b642 ADD %EBX,%R9D |
0x43b645 ADD %EBX,%EAX |
0x43b647 KXORB %K3,%K3,%K3 |
0x43b64b MOV (%R14),%RSI |
0x43b64e MOV 0x50(%RSP),%R11 |
0x43b653 MOV %EAX,0x16c(%RSP) |
0x43b65a MOV (%RCX),%EDI |
0x43b65c MOVSXD %R9D,%RCX |
0x43b65f LEA (,%R10,8),%R8 |
0x43b667 MOV 0x68(%R14),%RDX |
0x43b66b IMUL %R10,%RCX |
0x43b66f MOVSXD (%RSI),%R13 |
0x43b672 MOV 0x40(%R14),%RSI |
0x43b676 MOV %R8,0x158(%RSP) |
0x43b67e LEA 0x3(%RDI),%EBX |
0x43b681 LEA (%R13,%R11,1),%RAX |
0x43b686 SUB %R13D,%EDI |
0x43b689 LEA -0x2(%R13),%R15D |
0x43b68d ADD %RCX,%RAX |
0x43b690 LEA 0x4(%RDI),%R12D |
0x43b694 ADD %R11,%RCX |
0x43b697 MOV %EDI,%R8D |
0x43b69a LEA 0x5(%RDI),%R11D |
0x43b69e MOV %EDI,0x140(%RSP) |
0x43b6a5 LEA -0x10(%RSI,%RAX,8),%R10 |
0x43b6aa MOV %R11D,%EDI |
0x43b6ad MOV %R12D,0x150(%RSP) |
0x43b6b5 MOV %R11D,%R12D |
0x43b6b8 LEA 0x5(%R15,%R8,1),%EAX |
0x43b6bd AND $-0x4,%EDI |
0x43b6c0 SHR $0x2,%R12D |
0x43b6c4 MOV %EDI,0x168(%RSP) |
0x43b6cb SAL $0x5,%R12 |
0x43b6cf ADD %R15D,%EDI |
0x43b6d2 CMP %EBX,%R15D |
0x43b6d5 CMOVGE %R15D,%EAX |
0x43b6d9 AND $0x3,%R11D |
0x43b6dd MOV %EDI,0x128(%RSP) |
0x43b6e4 MOV %R11D,0x148(%RSP) |
0x43b6ec MOV %EAX,0x178(%RSP) |
0x43b6f3 NOPL (%RAX,%RAX,1) |
(296) 0x43b6f8 CMP %EBX,%R15D |
(296) 0x43b6fb JGE 43b871 |
(296) 0x43b701 CMPL $0x2,0x150(%RSP) |
(296) 0x43b709 JBE 43ca80 |
(296) 0x43b70f LEA -0x20(%R12),%R11 |
(296) 0x43b714 LEA (%R12,%R10,1),%R8 |
(296) 0x43b718 MOV %R10,%RAX |
(296) 0x43b71b SHR $0x5,%R11 |
(296) 0x43b71f INC %R11 |
(296) 0x43b722 AND $0x7,%R11D |
(296) 0x43b726 JE 43b7ad |
(296) 0x43b72c CMP $0x1,%R11 |
(296) 0x43b730 JE 43b79a |
(296) 0x43b732 CMP $0x2,%R11 |
(296) 0x43b736 JE 43b78c |
(296) 0x43b738 CMP $0x3,%R11 |
(296) 0x43b73c JE 43b77e |
(296) 0x43b73e CMP $0x4,%R11 |
(296) 0x43b742 JE 43b770 |
(296) 0x43b744 CMP $0x5,%R11 |
(296) 0x43b748 JE 43b762 |
(296) 0x43b74a CMP $0x6,%R11 |
(296) 0x43b74e JNE 43c94e |
(296) 0x43b754 VBROADCASTSD (%RDX),%YMM2 |
(296) 0x43b759 ADD $0x20,%RAX |
(296) 0x43b75d VMOVUPD %YMM2,-0x20(%RAX) |
(296) 0x43b762 VBROADCASTSD (%RDX),%YMM3 |
(296) 0x43b767 ADD $0x20,%RAX |
(296) 0x43b76b VMOVUPD %YMM3,-0x20(%RAX) |
(296) 0x43b770 VBROADCASTSD (%RDX),%YMM4 |
(296) 0x43b775 ADD $0x20,%RAX |
(296) 0x43b779 VMOVUPD %YMM4,-0x20(%RAX) |
(296) 0x43b77e VBROADCASTSD (%RDX),%YMM5 |
(296) 0x43b783 ADD $0x20,%RAX |
(296) 0x43b787 VMOVUPD %YMM5,-0x20(%RAX) |
(296) 0x43b78c VBROADCASTSD (%RDX),%YMM6 |
(296) 0x43b791 ADD $0x20,%RAX |
(296) 0x43b795 VMOVUPD %YMM6,-0x20(%RAX) |
(296) 0x43b79a VBROADCASTSD (%RDX),%YMM7 |
(296) 0x43b79f ADD $0x20,%RAX |
(296) 0x43b7a3 VMOVUPD %YMM7,-0x20(%RAX) |
(296) 0x43b7a8 CMP %R8,%RAX |
(296) 0x43b7ab JE 43b814 |
(297) 0x43b7ad VBROADCASTSD (%RDX),%YMM8 |
(297) 0x43b7b2 ADD $0x100,%RAX |
(297) 0x43b7b8 VMOVUPD %YMM8,-0x100(%RAX) |
(297) 0x43b7c0 VBROADCASTSD (%RDX),%YMM9 |
(297) 0x43b7c5 VMOVUPD %YMM9,-0xe0(%RAX) |
(297) 0x43b7cd VBROADCASTSD (%RDX),%YMM10 |
(297) 0x43b7d2 VMOVUPD %YMM10,-0xc0(%RAX) |
(297) 0x43b7da VBROADCASTSD (%RDX),%YMM11 |
(297) 0x43b7df VMOVUPD %YMM11,-0xa0(%RAX) |
(297) 0x43b7e7 VBROADCASTSD (%RDX),%YMM12 |
(297) 0x43b7ec VMOVUPD %YMM12,-0x80(%RAX) |
(297) 0x43b7f1 VBROADCASTSD (%RDX),%YMM13 |
(297) 0x43b7f6 VMOVUPD %YMM13,-0x60(%RAX) |
(297) 0x43b7fb VBROADCASTSD (%RDX),%YMM14 |
(297) 0x43b800 VMOVUPD %YMM14,-0x40(%RAX) |
(297) 0x43b805 VBROADCASTSD (%RDX),%YMM15 |
(297) 0x43b80a VMOVUPD %YMM15,-0x20(%RAX) |
(297) 0x43b80f CMP %R8,%RAX |
(297) 0x43b812 JNE 43b7ad |
(296) 0x43b814 MOV 0x148(%RSP),%EDI |
(296) 0x43b81b TEST %EDI,%EDI |
(296) 0x43b81d JE 43b871 |
(296) 0x43b81f MOV 0x168(%RSP),%EDI |
(296) 0x43b826 MOV 0x128(%RSP),%EAX |
(296) 0x43b82d MOV 0x140(%RSP),%R11D |
(296) 0x43b835 SUB %EDI,%R11D |
(296) 0x43b838 LEA 0x5(%R11),%R8D |
(296) 0x43b83c CMP $-0x4,%R11D |
(296) 0x43b840 JE 43b863 |
(296) 0x43b842 MOV %EDI,%R11D |
(296) 0x43b845 LEA (%RCX,%R13,1),%RDI |
(296) 0x43b849 VMOVDDUP (%RDX),%XMM0 |
(296) 0x43b84d ADD %R11,%RDI |
(296) 0x43b850 VMOVUPD %XMM0,-0x10(%RSI,%RDI,8) |
(296) 0x43b856 TEST $0x1,%R8B |
(296) 0x43b85a JE 43b871 |
(296) 0x43b85c AND $-0x2,%R8D |
(296) 0x43b860 ADD %R8D,%EAX |
(296) 0x43b863 VMOVSD (%RDX),%XMM1 |
(296) 0x43b867 CLTQ |
(296) 0x43b869 ADD %RCX,%RAX |
(296) 0x43b86c VMOVSD %XMM1,(%RSI,%RAX,8) |
(296) 0x43b871 MOV 0x178(%RSP),%EAX |
(296) 0x43b878 INC %R9D |
(296) 0x43b87b MOV 0x158(%RSP),%R8 |
(296) 0x43b883 CMP %EAX,%EBX |
(296) 0x43b885 JE 43c4df |
(296) 0x43b88b MOV 0x130(%RSP),%R11 |
(296) 0x43b893 ADD %R8,%R10 |
(296) 0x43b896 ADD %R11,%RCX |
(296) 0x43b899 CMP %R9D,0x16c(%RSP) |
(296) 0x43b8a1 JG 43b6f8 |
0x43b8a7 KORTESTB %K3,%K3 |
0x43b8ab JNE 43caf6 |
0x43b8b1 VZEROUPPER |
0x43b8b4 CALL 402220 <@plt_start@+0x200> |
0x43b8b9 MOV 0x18(%R14),%RDX |
0x43b8bd MOV 0x10(%R14),%R15 |
0x43b8c1 MOV (%RDX),%EAX |
0x43b8c3 MOV (%R15),%EBX |
0x43b8c6 ADD $0x3,%EAX |
0x43b8c9 SUB $0x2,%EBX |
0x43b8cc SUB %EBX,%EAX |
0x43b8ce CLTD |
0x43b8cf IDIVL 0xb8(%RSP) |
0x43b8d6 CMP %EDX,0x124(%RSP) |
0x43b8dd JL 43cb56 |
0x43b8e3 MOV 0x124(%RSP),%R9D |
0x43b8eb IMUL %EAX,%R9D |
0x43b8ef ADD %EDX,%R9D |
0x43b8f2 ADD %R9D,%EAX |
0x43b8f5 CMP %EAX,%R9D |
0x43b8f8 JGE 43bb7d |
0x43b8fe MOV 0x8(%R14),%RCX |
0x43b902 MOV 0x170(%RSP),%R10 |
0x43b90a ADD %EBX,%R9D |
0x43b90d ADD %EBX,%EAX |
0x43b90f KXORB %K2,%K2,%K2 |
0x43b913 MOV (%R14),%RSI |
0x43b916 MOV 0x60(%RSP),%R11 |
0x43b91b MOV %EAX,0x16c(%RSP) |
0x43b922 MOV (%RCX),%EDI |
0x43b924 MOVSXD %R9D,%RCX |
0x43b927 LEA (,%R10,8),%R8 |
0x43b92f MOV 0x78(%R14),%RDX |
0x43b933 IMUL %R10,%RCX |
0x43b937 MOVSXD (%RSI),%R13 |
0x43b93a MOV 0x50(%R14),%RSI |
0x43b93e MOV %R8,0x158(%RSP) |
0x43b946 LEA 0x3(%RDI),%EBX |
0x43b949 LEA (%R13,%R11,1),%RAX |
0x43b94e SUB %R13D,%EDI |
0x43b951 LEA -0x2(%R13),%R15D |
0x43b955 ADD %RCX,%RAX |
0x43b958 LEA 0x4(%RDI),%R12D |
0x43b95c ADD %R11,%RCX |
0x43b95f MOV %EDI,%R8D |
0x43b962 LEA 0x5(%RDI),%R11D |
0x43b966 MOV %EDI,0x140(%RSP) |
0x43b96d LEA -0x10(%RSI,%RAX,8),%R10 |
0x43b972 MOV %R11D,%EDI |
0x43b975 MOV %R12D,0x150(%RSP) |
0x43b97d MOV %R11D,%R12D |
0x43b980 LEA 0x5(%R15,%R8,1),%EAX |
0x43b985 AND $-0x4,%EDI |
0x43b988 SHR $0x2,%R12D |
0x43b98c MOV %EDI,0x168(%RSP) |
0x43b993 SAL $0x5,%R12 |
0x43b997 ADD %R15D,%EDI |
0x43b99a CMP %EBX,%R15D |
0x43b99d CMOVGE %R15D,%EAX |
0x43b9a1 AND $0x3,%R11D |
0x43b9a5 MOV %EDI,0x128(%RSP) |
0x43b9ac MOV %R11D,0x148(%RSP) |
0x43b9b4 MOV %EAX,0x178(%RSP) |
0x43b9bb NOPL (%RAX,%RAX,1) |
(294) 0x43b9c0 CMP %EBX,%R15D |
(294) 0x43b9c3 JGE 43bb3a |
(294) 0x43b9c9 CMPL $0x2,0x150(%RSP) |
(294) 0x43b9d1 JBE 43ca8a |
(294) 0x43b9d7 LEA -0x20(%R12),%R11 |
(294) 0x43b9dc LEA (%R10,%R12,1),%R8 |
(294) 0x43b9e0 MOV %R10,%RAX |
(294) 0x43b9e3 SHR $0x5,%R11 |
(294) 0x43b9e7 INC %R11 |
(294) 0x43b9ea AND $0x7,%R11D |
(294) 0x43b9ee JE 43ba75 |
(294) 0x43b9f4 CMP $0x1,%R11 |
(294) 0x43b9f8 JE 43ba62 |
(294) 0x43b9fa CMP $0x2,%R11 |
(294) 0x43b9fe JE 43ba54 |
(294) 0x43ba00 CMP $0x3,%R11 |
(294) 0x43ba04 JE 43ba46 |
(294) 0x43ba06 CMP $0x4,%R11 |
(294) 0x43ba0a JE 43ba38 |
(294) 0x43ba0c CMP $0x5,%R11 |
(294) 0x43ba10 JE 43ba2a |
(294) 0x43ba12 CMP $0x6,%R11 |
(294) 0x43ba16 JNE 43c93b |
(294) 0x43ba1c VBROADCASTSD (%RDX),%YMM3 |
(294) 0x43ba21 ADD $0x20,%RAX |
(294) 0x43ba25 VMOVUPD %YMM3,-0x20(%RAX) |
(294) 0x43ba2a VBROADCASTSD (%RDX),%YMM4 |
(294) 0x43ba2f ADD $0x20,%RAX |
(294) 0x43ba33 VMOVUPD %YMM4,-0x20(%RAX) |
(294) 0x43ba38 VBROADCASTSD (%RDX),%YMM5 |
(294) 0x43ba3d ADD $0x20,%RAX |
(294) 0x43ba41 VMOVUPD %YMM5,-0x20(%RAX) |
(294) 0x43ba46 VBROADCASTSD (%RDX),%YMM6 |
(294) 0x43ba4b ADD $0x20,%RAX |
(294) 0x43ba4f VMOVUPD %YMM6,-0x20(%RAX) |
(294) 0x43ba54 VBROADCASTSD (%RDX),%YMM7 |
(294) 0x43ba59 ADD $0x20,%RAX |
(294) 0x43ba5d VMOVUPD %YMM7,-0x20(%RAX) |
(294) 0x43ba62 VBROADCASTSD (%RDX),%YMM8 |
(294) 0x43ba67 ADD $0x20,%RAX |
(294) 0x43ba6b VMOVUPD %YMM8,-0x20(%RAX) |
(294) 0x43ba70 CMP %R8,%RAX |
(294) 0x43ba73 JE 43badc |
(295) 0x43ba75 VBROADCASTSD (%RDX),%YMM9 |
(295) 0x43ba7a ADD $0x100,%RAX |
(295) 0x43ba80 VMOVUPD %YMM9,-0x100(%RAX) |
(295) 0x43ba88 VBROADCASTSD (%RDX),%YMM10 |
(295) 0x43ba8d VMOVUPD %YMM10,-0xe0(%RAX) |
(295) 0x43ba95 VBROADCASTSD (%RDX),%YMM11 |
(295) 0x43ba9a VMOVUPD %YMM11,-0xc0(%RAX) |
(295) 0x43baa2 VBROADCASTSD (%RDX),%YMM12 |
(295) 0x43baa7 VMOVUPD %YMM12,-0xa0(%RAX) |
(295) 0x43baaf VBROADCASTSD (%RDX),%YMM13 |
(295) 0x43bab4 VMOVUPD %YMM13,-0x80(%RAX) |
(295) 0x43bab9 VBROADCASTSD (%RDX),%YMM14 |
(295) 0x43babe VMOVUPD %YMM14,-0x60(%RAX) |
(295) 0x43bac3 VBROADCASTSD (%RDX),%YMM15 |
(295) 0x43bac8 VMOVUPD %YMM15,-0x40(%RAX) |
(295) 0x43bacd VBROADCASTSD (%RDX),%YMM0 |
(295) 0x43bad2 VMOVUPD %YMM0,-0x20(%RAX) |
(295) 0x43bad7 CMP %R8,%RAX |
(295) 0x43bada JNE 43ba75 |
(294) 0x43badc MOV 0x148(%RSP),%EDI |
(294) 0x43bae3 TEST %EDI,%EDI |
(294) 0x43bae5 JE 43bb3a |
(294) 0x43bae7 MOV 0x168(%RSP),%EDI |
(294) 0x43baee MOV 0x128(%RSP),%EAX |
(294) 0x43baf5 MOV 0x140(%RSP),%R11D |
(294) 0x43bafd SUB %EDI,%R11D |
(294) 0x43bb00 LEA 0x5(%R11),%R8D |
(294) 0x43bb04 CMP $-0x4,%R11D |
(294) 0x43bb08 JE 43bb2c |
(294) 0x43bb0a MOV %EDI,%R11D |
(294) 0x43bb0d LEA (%R13,%RCX,1),%RDI |
(294) 0x43bb12 VMOVDDUP (%RDX),%XMM1 |
(294) 0x43bb16 ADD %R11,%RDI |
(294) 0x43bb19 VMOVUPD %XMM1,-0x10(%RSI,%RDI,8) |
(294) 0x43bb1f TEST $0x1,%R8B |
(294) 0x43bb23 JE 43bb3a |
(294) 0x43bb25 AND $-0x2,%R8D |
(294) 0x43bb29 ADD %R8D,%EAX |
(294) 0x43bb2c VMOVSD (%RDX),%XMM2 |
(294) 0x43bb30 CLTQ |
(294) 0x43bb32 ADD %RCX,%RAX |
(294) 0x43bb35 VMOVSD %XMM2,(%RSI,%RAX,8) |
(294) 0x43bb3a MOV 0x178(%RSP),%EAX |
(294) 0x43bb41 INC %R9D |
(294) 0x43bb44 MOV 0x158(%RSP),%R8 |
(294) 0x43bb4c CMP %EAX,%EBX |
(294) 0x43bb4e JE 43c510 |
(294) 0x43bb54 MOV 0x170(%RSP),%R11 |
(294) 0x43bb5c ADD %R8,%R10 |
(294) 0x43bb5f ADD %R11,%RCX |
(294) 0x43bb62 CMP %R9D,0x16c(%RSP) |
(294) 0x43bb6a JG 43b9c0 |
0x43bb70 KORTESTB %K2,%K2 |
0x43bb74 JNE 43caa8 |
0x43bb7a VZEROUPPER |
0x43bb7d CALL 402220 <@plt_start@+0x200> |
0x43bb82 MOV 0x18(%R14),%RDX |
0x43bb86 MOV 0x10(%R14),%R15 |
0x43bb8a MOV (%RDX),%EAX |
0x43bb8c MOV (%R15),%EBX |
0x43bb8f ADD $0x3,%EAX |
0x43bb92 SUB $0x2,%EBX |
0x43bb95 SUB %EBX,%EAX |
0x43bb97 CLTD |
0x43bb98 IDIVL 0xb8(%RSP) |
0x43bb9f CMP %EDX,0x124(%RSP) |
0x43bba6 JL 43cb44 |
0x43bbac MOV 0x124(%RSP),%R9D |
0x43bbb4 IMUL %EAX,%R9D |
0x43bbb8 ADD %EDX,%R9D |
0x43bbbb ADD %R9D,%EAX |
0x43bbbe CMP %EAX,%R9D |
0x43bbc1 JGE 43be4d |
0x43bbc7 MOV 0x8(%R14),%RCX |
0x43bbcb MOV 0x160(%RSP),%R10 |
0x43bbd3 ADD %EBX,%R9D |
0x43bbd6 ADD %EBX,%EAX |
0x43bbd8 KXORB %K1,%K1,%K1 |
0x43bbdc MOV (%R14),%RSI |
0x43bbdf MOV 0x38(%RSP),%R11 |
0x43bbe4 MOV %EAX,0x16c(%RSP) |
0x43bbeb MOV (%RCX),%EDI |
0x43bbed MOVSXD %R9D,%RCX |
0x43bbf0 LEA (,%R10,8),%R8 |
0x43bbf8 MOV 0x80(%R14),%RDX |
0x43bbff IMUL %R10,%RCX |
0x43bc03 MOVSXD (%RSI),%R13 |
0x43bc06 MOV 0x58(%R14),%RSI |
0x43bc0a MOV %R8,0x158(%RSP) |
0x43bc12 LEA 0x3(%RDI),%EBX |
0x43bc15 LEA (%R13,%R11,1),%RAX |
0x43bc1a SUB %R13D,%EDI |
0x43bc1d LEA -0x2(%R13),%R15D |
0x43bc21 ADD %RCX,%RAX |
0x43bc24 LEA 0x4(%RDI),%R12D |
0x43bc28 ADD %R11,%RCX |
0x43bc2b MOV %EDI,%R8D |
0x43bc2e LEA 0x5(%RDI),%R11D |
0x43bc32 MOV %EDI,0x140(%RSP) |
0x43bc39 LEA -0x10(%RSI,%RAX,8),%R10 |
0x43bc3e MOV %R11D,%EDI |
0x43bc41 MOV %R12D,0x150(%RSP) |
0x43bc49 MOV %R11D,%R12D |
0x43bc4c LEA 0x5(%R15,%R8,1),%EAX |
0x43bc51 AND $-0x4,%EDI |
0x43bc54 SHR $0x2,%R12D |
0x43bc58 MOV %EDI,0x168(%RSP) |
0x43bc5f SAL $0x5,%R12 |
0x43bc63 ADD %R15D,%EDI |
0x43bc66 CMP %EBX,%R15D |
0x43bc69 CMOVGE %R15D,%EAX |
0x43bc6d AND $0x3,%R11D |
0x43bc71 MOV %EDI,0x128(%RSP) |
0x43bc78 MOV %R11D,0x148(%RSP) |
0x43bc80 MOV %EAX,0x178(%RSP) |
0x43bc87 NOPW (%RAX,%RAX,1) |
(292) 0x43bc90 CMP %EBX,%R15D |
(292) 0x43bc93 JGE 43be0a |
(292) 0x43bc99 CMPL $0x2,0x150(%RSP) |
(292) 0x43bca1 JBE 43ca9e |
(292) 0x43bca7 LEA -0x20(%R12),%R11 |
(292) 0x43bcac LEA (%R12,%R10,1),%R8 |
(292) 0x43bcb0 MOV %R10,%RAX |
(292) 0x43bcb3 SHR $0x5,%R11 |
(292) 0x43bcb7 INC %R11 |
(292) 0x43bcba AND $0x7,%R11D |
(292) 0x43bcbe JE 43bd45 |
(292) 0x43bcc4 CMP $0x1,%R11 |
(292) 0x43bcc8 JE 43bd32 |
(292) 0x43bcca CMP $0x2,%R11 |
(292) 0x43bcce JE 43bd24 |
(292) 0x43bcd0 CMP $0x3,%R11 |
(292) 0x43bcd4 JE 43bd16 |
(292) 0x43bcd6 CMP $0x4,%R11 |
(292) 0x43bcda JE 43bd08 |
(292) 0x43bcdc CMP $0x5,%R11 |
(292) 0x43bce0 JE 43bcfa |
(292) 0x43bce2 CMP $0x6,%R11 |
(292) 0x43bce6 JNE 43c928 |
(292) 0x43bcec VBROADCASTSD (%RDX),%YMM4 |
(292) 0x43bcf1 ADD $0x20,%RAX |
(292) 0x43bcf5 VMOVUPD %YMM4,-0x20(%RAX) |
(292) 0x43bcfa VBROADCASTSD (%RDX),%YMM5 |
(292) 0x43bcff ADD $0x20,%RAX |
(292) 0x43bd03 VMOVUPD %YMM5,-0x20(%RAX) |
(292) 0x43bd08 VBROADCASTSD (%RDX),%YMM6 |
(292) 0x43bd0d ADD $0x20,%RAX |
(292) 0x43bd11 VMOVUPD %YMM6,-0x20(%RAX) |
(292) 0x43bd16 VBROADCASTSD (%RDX),%YMM7 |
(292) 0x43bd1b ADD $0x20,%RAX |
(292) 0x43bd1f VMOVUPD %YMM7,-0x20(%RAX) |
(292) 0x43bd24 VBROADCASTSD (%RDX),%YMM8 |
(292) 0x43bd29 ADD $0x20,%RAX |
(292) 0x43bd2d VMOVUPD %YMM8,-0x20(%RAX) |
(292) 0x43bd32 VBROADCASTSD (%RDX),%YMM9 |
(292) 0x43bd37 ADD $0x20,%RAX |
(292) 0x43bd3b VMOVUPD %YMM9,-0x20(%RAX) |
(292) 0x43bd40 CMP %R8,%RAX |
(292) 0x43bd43 JE 43bdac |
(293) 0x43bd45 VBROADCASTSD (%RDX),%YMM10 |
(293) 0x43bd4a ADD $0x100,%RAX |
(293) 0x43bd50 VMOVUPD %YMM10,-0x100(%RAX) |
(293) 0x43bd58 VBROADCASTSD (%RDX),%YMM11 |
(293) 0x43bd5d VMOVUPD %YMM11,-0xe0(%RAX) |
(293) 0x43bd65 VBROADCASTSD (%RDX),%YMM12 |
(293) 0x43bd6a VMOVUPD %YMM12,-0xc0(%RAX) |
(293) 0x43bd72 VBROADCASTSD (%RDX),%YMM13 |
(293) 0x43bd77 VMOVUPD %YMM13,-0xa0(%RAX) |
(293) 0x43bd7f VBROADCASTSD (%RDX),%YMM14 |
(293) 0x43bd84 VMOVUPD %YMM14,-0x80(%RAX) |
(293) 0x43bd89 VBROADCASTSD (%RDX),%YMM15 |
(293) 0x43bd8e VMOVUPD %YMM15,-0x60(%RAX) |
(293) 0x43bd93 VBROADCASTSD (%RDX),%YMM0 |
(293) 0x43bd98 VMOVUPD %YMM0,-0x40(%RAX) |
(293) 0x43bd9d VBROADCASTSD (%RDX),%YMM1 |
(293) 0x43bda2 VMOVUPD %YMM1,-0x20(%RAX) |
(293) 0x43bda7 CMP %R8,%RAX |
(293) 0x43bdaa JNE 43bd45 |
(292) 0x43bdac MOV 0x148(%RSP),%EDI |
(292) 0x43bdb3 TEST %EDI,%EDI |
(292) 0x43bdb5 JE 43be0a |
(292) 0x43bdb7 MOV 0x168(%RSP),%EDI |
(292) 0x43bdbe MOV 0x128(%RSP),%EAX |
(292) 0x43bdc5 MOV 0x140(%RSP),%R11D |
(292) 0x43bdcd SUB %EDI,%R11D |
(292) 0x43bdd0 LEA 0x5(%R11),%R8D |
(292) 0x43bdd4 CMP $-0x4,%R11D |
(292) 0x43bdd8 JE 43bdfc |
(292) 0x43bdda MOV %EDI,%R11D |
(292) 0x43bddd LEA (%R13,%RCX,1),%RDI |
(292) 0x43bde2 VMOVDDUP (%RDX),%XMM2 |
(292) 0x43bde6 ADD %R11,%RDI |
(292) 0x43bde9 VMOVUPD %XMM2,-0x10(%RSI,%RDI,8) |
(292) 0x43bdef TEST $0x1,%R8B |
(292) 0x43bdf3 JE 43be0a |
(292) 0x43bdf5 AND $-0x2,%R8D |
(292) 0x43bdf9 ADD %R8D,%EAX |
(292) 0x43bdfc VMOVSD (%RDX),%XMM3 |
(292) 0x43be00 CLTQ |
(292) 0x43be02 ADD %RCX,%RAX |
(292) 0x43be05 VMOVSD %XMM3,(%RSI,%RAX,8) |
(292) 0x43be0a MOV 0x178(%RSP),%EAX |
(292) 0x43be11 INC %R9D |
(292) 0x43be14 MOV 0x158(%RSP),%R8 |
(292) 0x43be1c CMP %EAX,%EBX |
(292) 0x43be1e JE 43c543 |
(292) 0x43be24 MOV 0x160(%RSP),%R11 |
(292) 0x43be2c ADD %R8,%R10 |
(292) 0x43be2f ADD %R11,%RCX |
(292) 0x43be32 CMP %R9D,0x16c(%RSP) |
(292) 0x43be3a JG 43bc90 |
0x43be40 KORTESTB %K1,%K1 |
0x43be44 JNE 43cacf |
0x43be4a VZEROUPPER |
0x43be4d CALL 402220 <@plt_start@+0x200> |
0x43be52 MOV 0x60(%R14),%R15 |
0x43be56 MOV (%R15),%EBX |
0x43be59 CMP $0x1,%EBX |
0x43be5c JLE 43c919 |
0x43be62 MOV 0x118(%RSP),%RDX |
0x43be6a MOV 0x40(%RSP),%RSI |
0x43be6f MOV %RBX,0x68(%RSP) |
0x43be74 MOV $0x1,%R15D |
0x43be7a MOV 0x48(%RSP),%R10 |
0x43be7f MOV %R14,%R12 |
0x43be82 SUB %RSI,%RDX |
0x43be85 LEA (,%RDX,8),%RCX |
0x43be8d DEC %R10 |
0x43be90 MOV %RCX,0x20(%RSP) |
0x43be95 MOV %R10,0x18(%RSP) |
0x43be9a JMP 43beb6 |
0x43be9c NOPL (%RAX) |
(288) 0x43bea0 CALL 402220 <@plt_start@+0x200> |
(288) 0x43bea5 MOV 0x68(%RSP),%R13 |
(288) 0x43beaa INC %R15 |
(288) 0x43bead CMP %R13,%R15 |
(288) 0x43beb0 JE 43c919 |
(288) 0x43beb6 MOV 0x98(%R12),%RAX |
(288) 0x43bebe MOV 0x10(%R12),%R8 |
(288) 0x43bec3 MOV 0x18(%R12),%R9 |
(288) 0x43bec8 MOV 0x88(%R12),%R14 |
(288) 0x43bed0 VMOVSD (%RAX,%R15,8),%XMM3 |
(288) 0x43bed6 MOV (%R8),%R11D |
(288) 0x43bed9 MOV %RAX,0x78(%RSP) |
(288) 0x43bede MOV (%R9),%EAX |
(288) 0x43bee1 VMOVSD (%R14,%R15,8),%XMM2 |
(288) 0x43bee7 MOV %R14,0xb0(%RSP) |
(288) 0x43beef SUB $0x2,%R11D |
(288) 0x43bef3 ADD $0x3,%EAX |
(288) 0x43bef6 VUNPCKLPD %XMM2,%XMM3,%XMM4 |
(288) 0x43befa SUB %R11D,%EAX |
(288) 0x43befd VMOVUPD %XMM4,0x130(%R12) |
(288) 0x43bf07 CLTD |
(288) 0x43bf08 IDIVL 0xb8(%RSP) |
(288) 0x43bf0f CMP %EDX,0x124(%RSP) |
(288) 0x43bf16 JL 43c910 |
(288) 0x43bf1c MOV 0x124(%RSP),%EDI |
(288) 0x43bf23 IMUL %EAX,%EDI |
(288) 0x43bf26 ADD %EDI,%EDX |
(288) 0x43bf28 ADD %EDX,%EAX |
(288) 0x43bf2a CMP %EAX,%EDX |
(288) 0x43bf2c JGE 43bea0 |
(288) 0x43bf32 MOV 0x8(%R12),%RSI |
(288) 0x43bf37 MOV 0xb8(%R12),%R9 |
(288) 0x43bf3f ADD %R11D,%EAX |
(288) 0x43bf42 LEA (%R11,%RDX,1),%EBX |
(288) 0x43bf46 KXORB %K0,%K0,%K0 |
(288) 0x43bf4a MOV (%R12),%R13 |
(288) 0x43bf4e MOV 0xb0(%R12),%R11 |
(288) 0x43bf56 MOV %EAX,0x120(%RSP) |
(288) 0x43bf5d MOV $0x1,%R10D |
(288) 0x43bf63 MOV (%RSI),%ESI |
(288) 0x43bf65 MOV 0xc0(%R12),%RAX |
(288) 0x43bf6d MOV %R9,0xd0(%RSP) |
(288) 0x43bf75 MOV 0xa8(%R12),%RDI |
(288) 0x43bf7d MOV 0x138(%RSP),%R9 |
(288) 0x43bf85 MOV %R11,0xd8(%RSP) |
(288) 0x43bf8d LEA 0x3(%RSI),%R14D |
(288) 0x43bf91 MOVSXD (%R13),%RCX |
(288) 0x43bf95 MOV 0xc8(%R12),%RDX |
(288) 0x43bf9d LEA 0x4(%RSI),%R11D |
(288) 0x43bfa1 MOV %R14D,0x16c(%RSP) |
(288) 0x43bfa9 MOV 0x18(%RSP),%R14 |
(288) 0x43bfae MOV %RAX,0xa0(%RSP) |
(288) 0x43bfb6 MOVSXD %EBX,%RAX |
(288) 0x43bfb9 MOV 0x90(%R12),%R13 |
(288) 0x43bfc1 LEA -0x2(%RCX),%R8D |
(288) 0x43bfc5 IMUL %RAX,%R9 |
(288) 0x43bfc9 MOV %RDI,0x110(%RSP) |
(288) 0x43bfd1 MOV %R11D,%EDI |
(288) 0x43bfd4 ADD %RCX,%R14 |
(288) 0x43bfd7 SUB %ECX,%EDI |
(288) 0x43bfd9 MOV %RDX,0x158(%RSP) |
(288) 0x43bfe1 MOV 0x40(%RSP),%RDX |
(288) 0x43bfe6 SUB %RCX,%R10 |
(288) 0x43bfe9 ADD %RDI,%R14 |
(288) 0x43bfec MOV %R13,0x70(%RSP) |
(288) 0x43bff1 MOV 0x50(%RSP),%R11 |
(288) 0x43bff6 MOV %R8D,0x168(%RSP) |
(288) 0x43bffe LEA (%R14,%R9,1),%R13 |
(288) 0x43c002 LEA (%RDX,%RAX,1),%R14 |
(288) 0x43c006 MOVSXD %R8D,%RDX |
(288) 0x43c009 MOV 0x130(%RSP),%R8 |
(288) 0x43c011 ADD %RDX,%R11 |
(288) 0x43c014 MOV %RDI,0x178(%RSP) |
(288) 0x43c01c ADD %RDX,%R10 |
(288) 0x43c01f IMUL %RAX,%R8 |
(288) 0x43c023 LEA (%R11,%R8,1),%RDI |
(288) 0x43c027 MOV 0x38(%RSP),%R11 |
(288) 0x43c02c MOV %RDI,0x148(%RSP) |
(288) 0x43c034 MOV 0x160(%RSP),%RDI |
(288) 0x43c03c ADD %RDX,%R11 |
(288) 0x43c03f IMUL %RAX,%RDI |
(288) 0x43c043 MOV %R11,0xc8(%RSP) |
(288) 0x43c04b ADD %RDI,%R11 |
(288) 0x43c04e MOV 0x60(%RSP),%RDI |
(288) 0x43c053 MOV %R11,0x150(%RSP) |
(288) 0x43c05b MOV 0x170(%RSP),%R11 |
(288) 0x43c063 IMUL %R11,%RAX |
(288) 0x43c067 LEA 0x1(%RDI,%RDX,1),%R11 |
(288) 0x43c06c LEA (%R11,%RAX,1),%RDI |
(288) 0x43c070 MOV %RDI,0x140(%RSP) |
(288) 0x43c078 MOV 0x170(%RSP),%R11 |
(288) 0x43c080 MOV 0x138(%RSP),%RDI |
(288) 0x43c088 SUB %R11,%RDI |
(288) 0x43c08b MOV 0x48(%RSP),%R11 |
(288) 0x43c090 MOV %RDI,0xe0(%RSP) |
(288) 0x43c098 MOV 0x60(%RSP),%RDI |
(288) 0x43c09d SUB %RDI,%R11 |
(288) 0x43c0a0 MOV 0x130(%RSP),%RDI |
(288) 0x43c0a8 ADD %R9,%R11 |
(288) 0x43c0ab MOV %R11,%R9 |
(288) 0x43c0ae MOV 0x170(%RSP),%R11 |
(288) 0x43c0b6 SUB %RAX,%R9 |
(288) 0x43c0b9 SUB %R11,%RDI |
(288) 0x43c0bc MOV %R9,0xf8(%RSP) |
(288) 0x43c0c4 MOV 0x60(%RSP),%R9 |
(288) 0x43c0c9 MOV %RDI,0xe8(%RSP) |
(288) 0x43c0d1 MOV 0x50(%RSP),%RDI |
(288) 0x43c0d6 SUB %R9,%RDI |
(288) 0x43c0d9 ADD %RDX,%R9 |
(288) 0x43c0dc ADD %R8,%RDI |
(288) 0x43c0df MOV 0x20(%R12),%R8 |
(288) 0x43c0e4 MOV %R9,0xc0(%RSP) |
(288) 0x43c0ec SUB %RAX,%RDI |
(288) 0x43c0ef MOV 0x168(%RSP),%R9D |
(288) 0x43c0f7 MOV %RDI,0xf0(%RSP) |
(288) 0x43c0ff MOV 0x30(%RSP),%RDI |
(288) 0x43c104 LEA 0x5(%R9,%RSI,1),%ESI |
(288) 0x43c109 LEA (%RCX,%RDI,1),%RAX |
(288) 0x43c10d SUB %ECX,%ESI |
(288) 0x43c10f ADD %RDX,%RDI |
(288) 0x43c112 MOV 0x178(%RSP),%RCX |
(288) 0x43c11a LEA -0x10(%R8,%RAX,8),%R11 |
(288) 0x43c11f MOV 0x178(%RSP),%R8 |
(288) 0x43c127 MOV %ESI,0xbc(%RSP) |
(288) 0x43c12e MOV %R11,0xa8(%RSP) |
(288) 0x43c136 MOV 0x20(%R12),%R11 |
(288) 0x43c13b SUB %RCX,%R10 |
(288) 0x43c13e ADD %R8,%RAX |
(288) 0x43c141 MOV 0x30(%R12),%R8 |
(288) 0x43c146 MOV %R10,0x98(%RSP) |
(288) 0x43c14e LEA -0x8(%R11,%RAX,8),%RAX |
(288) 0x43c153 MOV 0x20(%RSP),%R11 |
(288) 0x43c158 MOV %EBX,0x178(%RSP) |
(288) 0x43c15f MOV %RAX,0x80(%RSP) |
(288) 0x43c167 MOV 0x28(%RSP),%RAX |
(288) 0x43c16c ADD 0x38(%R12),%R11 |
(288) 0x43c171 ADD %RDX,%RAX |
(288) 0x43c174 MOV 0x20(%R12),%RDX |
(288) 0x43c179 MOV %R11,0x108(%RSP) |
(288) 0x43c181 LEA 0x8(%R8,%RAX,8),%RAX |
(288) 0x43c186 LEA 0x8(%RDX,%RDI,8),%RDI |
(288) 0x43c18b MOV %RAX,0x88(%RSP) |
(288) 0x43c193 MOV %RDI,0x90(%RSP) |
(288) 0x43c19b MOV 0x140(%RSP),%RBX |
(288) 0x43c1a3 NOPL (%RAX,%RAX,1) |
(289) 0x43c1a8 MOV 0x168(%RSP),%R8D |
(289) 0x43c1b0 INCL 0x178(%RSP) |
(289) 0x43c1b7 CMP %R8D,0x16c(%RSP) |
(289) 0x43c1bf JLE 43c900 |
(289) 0x43c1c5 MOV 0xd8(%RSP),%R11 |
(289) 0x43c1cd MOV 0xd0(%RSP),%RSI |
(289) 0x43c1d5 MOV (%R11,%R15,4),%R9D |
(289) 0x43c1d9 CMP (%RSI),%R9D |
(289) 0x43c1dc JE 43c730 |
(289) 0x43c1e2 MOV 0x98(%RSP),%RAX |
(289) 0x43c1ea MOV 0x160(%RSP),%RCX |
(289) 0x43c1f2 MOV %RBX,%R8 |
(289) 0x43c1f5 MOV %RBX,0x118(%RSP) |
(289) 0x43c1fd MOV 0x170(%RSP),%RDX |
(289) 0x43c205 MOV 0xc8(%RSP),%R11 |
(289) 0x43c20d NEG %R8 |
(289) 0x43c210 LEA (%RAX,%R13,1),%RSI |
(289) 0x43c214 MOVSXD 0x178(%RSP),%RAX |
(289) 0x43c21c SAL $0x3,%R8 |
(289) 0x43c220 MOV 0xc0(%RSP),%R10 |
(289) 0x43c228 MOV 0xa0(%RSP),%RDI |
(289) 0x43c230 IMUL %RAX,%RDX |
(289) 0x43c234 IMUL %RCX,%RAX |
(289) 0x43c238 MOV 0x90(%RSP),%RCX |
(289) 0x43c240 ADD %R8,%RCX |
(289) 0x43c243 ADD %R10,%RDX |
(289) 0x43c246 MOV (%RDI),%R10D |
(289) 0x43c249 MOV %RBX,%RDI |
(289) 0x43c24c ADD %R11,%RAX |
(289) 0x43c24f MOV 0x88(%RSP),%R11 |
(289) 0x43c257 MOV %RCX,0x128(%RSP) |
(289) 0x43c25f MOV %R15,%RBX |
(289) 0x43c262 MOV 0x150(%RSP),%RCX |
(289) 0x43c26a ADD %R8,%R11 |
(289) 0x43c26d MOV 0x148(%RSP),%R8 |
(289) 0x43c275 MOV %R11,0x140(%RSP) |
(289) 0x43c27d JMP 43c2ac |
0x43c27f NOP |
(291) 0x43c280 MOV 0x158(%RSP),%R15 |
(291) 0x43c288 CMP (%R15),%R9D |
(291) 0x43c28b JE 43c580 |
(291) 0x43c291 INC %RCX |
(291) 0x43c294 INC %RDX |
(291) 0x43c297 INC %RAX |
(291) 0x43c29a INC %RSI |
(291) 0x43c29d INC %R8 |
(291) 0x43c2a0 INC %RDI |
(291) 0x43c2a3 CMP %RSI,%R13 |
(291) 0x43c2a6 JE 43c400 |
(291) 0x43c2ac CMP %R10D,%R9D |
(291) 0x43c2af JNE 43c280 |
(291) 0x43c2b1 MOV 0x140(%RSP),%R15 |
(291) 0x43c2b9 MOV 0x108(%RSP),%R11 |
(291) 0x43c2c1 VMOVSD -0x8(%R15,%RDI,8),%XMM15 |
(291) 0x43c2c8 VMOVSD (%R11,%R14,8),%XMM1 |
(291) 0x43c2ce MOV 0x110(%RSP),%R15 |
(291) 0x43c2d6 VSUBSD %XMM2,%XMM15,%XMM0 |
(291) 0x43c2da VSUBSD %XMM3,%XMM1,%XMM4 |
(291) 0x43c2de VUNPCKLPD %XMM4,%XMM0,%XMM5 |
(291) 0x43c2e2 VMULPD %XMM5,%XMM5,%XMM6 |
(291) 0x43c2e6 VUNPCKHPD %XMM6,%XMM6,%XMM7 |
(291) 0x43c2ea VADDPD %XMM6,%XMM7,%XMM8 |
(291) 0x43c2ee VSQRTSD %XMM8,%XMM8,%XMM8 |
(291) 0x43c2f3 VCOMISD (%R15,%RBX,8),%XMM8 |
(291) 0x43c2f9 JA 43c291 |
(291) 0x43c2fb MOV 0x70(%R12),%R11 |
(291) 0x43c300 MOV 0x48(%R12),%R15 |
(291) 0x43c305 VMOVSD (%R11,%RBX,8),%XMM9 |
(291) 0x43c30b MOV 0x68(%R12),%R11 |
(291) 0x43c310 VMOVSD %XMM9,(%R15,%RSI,8) |
(291) 0x43c316 MOV 0x40(%R12),%R15 |
(291) 0x43c31b INC %RSI |
(291) 0x43c31e VMOVSD (%R11,%RBX,8),%XMM10 |
(291) 0x43c324 LEA (,%RBX,8),%R11 |
(291) 0x43c32c VMOVSD %XMM10,(%R15,%R8,8) |
(291) 0x43c332 MOV 0x78(%R12),%R15 |
(291) 0x43c337 INC %R8 |
(291) 0x43c33a ADD %R11,%R15 |
(291) 0x43c33d ADD 0x80(%R12),%R11 |
(291) 0x43c345 VMOVSD (%R15),%XMM11 |
(291) 0x43c34a MOV %R15,0x100(%RSP) |
(291) 0x43c352 MOV 0x50(%R12),%R15 |
(291) 0x43c357 VMOVSD %XMM11,-0x8(%R15,%RDI,8) |
(291) 0x43c35e MOV 0x58(%R12),%R15 |
(291) 0x43c363 VMOVSD (%R11),%XMM12 |
(291) 0x43c368 VMOVSD %XMM12,(%R15,%RCX,8) |
(291) 0x43c36e MOV 0x100(%RSP),%R15 |
(291) 0x43c376 INC %RCX |
(291) 0x43c379 VMOVSD (%R15),%XMM13 |
(291) 0x43c37e MOV 0x50(%R12),%R15 |
(291) 0x43c383 VMOVSD %XMM13,(%R15,%RDI,8) |
(291) 0x43c389 MOV 0x58(%R12),%R15 |
(291) 0x43c38e INC %RDI |
(291) 0x43c391 VMOVSD (%R11),%XMM14 |
(291) 0x43c396 VMOVSD %XMM14,(%R15,%RCX,8) |
(291) 0x43c39c MOV 0x100(%RSP),%R15 |
(291) 0x43c3a4 VMOVSD (%R15),%XMM15 |
(291) 0x43c3a9 MOV 0x50(%R12),%R15 |
(291) 0x43c3ae VMOVSD %XMM15,(%R15,%RDX,8) |
(291) 0x43c3b4 MOV 0x58(%R12),%R15 |
(291) 0x43c3b9 INC %RDX |
(291) 0x43c3bc VMOVSD (%R11),%XMM0 |
(291) 0x43c3c1 VMOVSD %XMM0,(%R15,%RAX,8) |
(291) 0x43c3c7 MOV 0x100(%RSP),%R15 |
(291) 0x43c3cf INC %RAX |
(291) 0x43c3d2 VMOVSD (%R15),%XMM1 |
(291) 0x43c3d7 MOV 0x50(%R12),%R15 |
(291) 0x43c3dc VMOVSD %XMM1,(%R15,%RDX,8) |
(291) 0x43c3e2 VMOVSD (%R11),%XMM4 |
(291) 0x43c3e7 MOV 0x58(%R12),%R11 |
(291) 0x43c3ec VMOVSD %XMM4,(%R11,%RAX,8) |
(291) 0x43c3f2 CMP %RSI,%R13 |
(291) 0x43c3f5 JNE 43c2ac |
(289) 0x43c3fb NOPL (%RAX,%RAX,1) |
(289) 0x43c400 MOV %RBX,%R15 |
(289) 0x43c403 MOV 0xbc(%RSP),%R8D |
(289) 0x43c40b MOV 0x118(%RSP),%RBX |
(289) 0x43c413 LEA 0x1(%R14),%R10 |
(289) 0x43c417 CMP %R8D,0x16c(%RSP) |
(289) 0x43c41f JE 43c6a0 |
(289) 0x43c425 MOV 0x138(%RSP),%R9 |
(289) 0x43c42d MOV 0x130(%RSP),%RSI |
(289) 0x43c435 MOV %R10,%R14 |
(289) 0x43c438 MOV 0x160(%RSP),%RAX |
(289) 0x43c440 MOV 0x170(%RSP),%RDX |
(289) 0x43c448 MOV 0xe0(%RSP),%R10 |
(289) 0x43c450 MOV 0xe8(%RSP),%RDI |
(289) 0x43c458 ADD %R9,%R13 |
(289) 0x43c45b MOV 0x178(%RSP),%ECX |
(289) 0x43c462 ADD %RSI,0x148(%RSP) |
(289) 0x43c46a ADD %RDX,%RBX |
(289) 0x43c46d ADD %RAX,0x150(%RSP) |
(289) 0x43c475 ADD %R10,0xf8(%RSP) |
(289) 0x43c47d ADD %RDI,0xf0(%RSP) |
(289) 0x43c485 CMP %ECX,0x120(%RSP) |
(289) 0x43c48c JG 43c1a8 |
(288) 0x43c492 KORTESTB %K0,%K0 |
(288) 0x43c496 JE 43bea0 |
(288) 0x43c49c MOV 0x5c(%RSP),%R8D |
(288) 0x43c4a1 MOV %R8D,0x140(%R12) |
(288) 0x43c4a9 JMP 43bea0 |
(298) 0x43c4ae MOV 0x138(%RSP),%RDI |
(298) 0x43c4b6 ADD %R8,%R10 |
(298) 0x43c4b9 ADD %RDI,%RCX |
(298) 0x43c4bc CMP %R9D,0x16c(%RSP) |
(298) 0x43c4c4 JLE 43cb2d |
(298) 0x43c4ca MOV $0x1,%EDI |
(298) 0x43c4cf MOV %EBX,0x110(%RSP) |
(298) 0x43c4d6 KMOVB %EDI,%K4 |
(298) 0x43c4da JMP 43b430 |
(296) 0x43c4df MOV 0x130(%RSP),%RDI |
(296) 0x43c4e7 ADD %R8,%R10 |
(296) 0x43c4ea ADD %RDI,%RCX |
(296) 0x43c4ed CMP %R9D,0x16c(%RSP) |
(296) 0x43c4f5 JLE 43cb06 |
(296) 0x43c4fb MOV $0x1,%EAX |
(296) 0x43c500 MOV %EBX,0x100(%RSP) |
(296) 0x43c507 KMOVB %EAX,%K3 |
(296) 0x43c50b JMP 43b6f8 |
(294) 0x43c510 MOV 0x170(%RSP),%RDI |
(294) 0x43c518 ADD %R8,%R10 |
(294) 0x43c51b ADD %RDI,%RCX |
(294) 0x43c51e CMP %R9D,0x16c(%RSP) |
(294) 0x43c526 JLE 43cab8 |
(294) 0x43c52c MOV $0x1,%R11D |
(294) 0x43c532 MOV %EBX,0xf8(%RSP) |
(294) 0x43c539 KMOVB %R11D,%K2 |
(294) 0x43c53e JMP 43b9c0 |
(292) 0x43c543 MOV 0x160(%RSP),%RDI |
(292) 0x43c54b ADD %R8,%R10 |
(292) 0x43c54e ADD %RDI,%RCX |
(292) 0x43c551 CMP %R9D,0x16c(%RSP) |
(292) 0x43c559 JLE 43cadf |
(292) 0x43c55f MOV $0x1,%R8D |
(292) 0x43c565 MOV %EBX,0x108(%RSP) |
(292) 0x43c56c KMOVB %R8D,%K1 |
(292) 0x43c571 JMP 43bc90 |
0x43c576 NOPW %CS:(%RAX,%RAX,1) |
(291) 0x43c580 MOV 0x128(%RSP),%R11 |
(291) 0x43c588 VCOMISD -0x8(%R11,%RDI,8),%XMM2 |
(291) 0x43c58f JNE 43c291 |
(291) 0x43c595 MOV 0x28(%R12),%R15 |
(291) 0x43c59a VCOMISD (%R15,%R14,8),%XMM3 |
(291) 0x43c5a0 JNE 43c291 |
(291) 0x43c5a6 MOV 0x70(%R12),%R11 |
(291) 0x43c5ab MOV 0x48(%R12),%R15 |
(291) 0x43c5b0 VMOVSD (%R11,%RBX,8),%XMM5 |
(291) 0x43c5b6 MOV 0x68(%R12),%R11 |
(291) 0x43c5bb VMOVSD %XMM5,(%R15,%RSI,8) |
(291) 0x43c5c1 MOV 0x40(%R12),%R15 |
(291) 0x43c5c6 VMOVSD (%R11,%RBX,8),%XMM6 |
(291) 0x43c5cc LEA (,%RBX,8),%R11 |
(291) 0x43c5d4 VMOVSD %XMM6,(%R15,%R8,8) |
(291) 0x43c5da MOV 0x78(%R12),%R15 |
(291) 0x43c5df ADD %R11,%R15 |
(291) 0x43c5e2 ADD 0x80(%R12),%R11 |
(291) 0x43c5ea VMOVSD (%R15),%XMM7 |
(291) 0x43c5ef MOV %R15,0x100(%RSP) |
(291) 0x43c5f7 MOV 0x50(%R12),%R15 |
(291) 0x43c5fc VMOVSD %XMM7,-0x8(%R15,%RDI,8) |
(291) 0x43c603 MOV 0x58(%R12),%R15 |
(291) 0x43c608 VMOVSD (%R11),%XMM8 |
(291) 0x43c60d VMOVSD %XMM8,(%R15,%RCX,8) |
(291) 0x43c613 MOV 0x100(%RSP),%R15 |
(291) 0x43c61b INC %RCX |
(291) 0x43c61e VMOVSD (%R15),%XMM9 |
(291) 0x43c623 MOV 0x50(%R12),%R15 |
(291) 0x43c628 VMOVSD %XMM9,(%R15,%RDI,8) |
(291) 0x43c62e MOV 0x58(%R12),%R15 |
(291) 0x43c633 VMOVSD (%R11),%XMM10 |
(291) 0x43c638 VMOVSD %XMM10,(%R15,%RCX,8) |
(291) 0x43c63e MOV 0x100(%RSP),%R15 |
(291) 0x43c646 VMOVSD (%R15),%XMM11 |
(291) 0x43c64b MOV 0x50(%R12),%R15 |
(291) 0x43c650 VMOVSD %XMM11,(%R15,%RDX,8) |
(291) 0x43c656 MOV 0x58(%R12),%R15 |
(291) 0x43c65b INC %RDX |
(291) 0x43c65e VMOVSD (%R11),%XMM12 |
(291) 0x43c663 VMOVSD %XMM12,(%R15,%RAX,8) |
(291) 0x43c669 MOV 0x100(%RSP),%R15 |
(291) 0x43c671 INC %RAX |
(291) 0x43c674 VMOVSD (%R15),%XMM13 |
(291) 0x43c679 MOV 0x50(%R12),%R15 |
(291) 0x43c67e VMOVSD %XMM13,(%R15,%RDX,8) |
(291) 0x43c684 VMOVSD (%R11),%XMM14 |
(291) 0x43c689 MOV 0x58(%R12),%R11 |
(291) 0x43c68e VMOVSD %XMM14,(%R11,%RAX,8) |
(291) 0x43c694 JMP 43c29a |
0x43c699 NOPL (%RAX) |
(289) 0x43c6a0 MOV 0x138(%RSP),%R14 |
(289) 0x43c6a8 MOV 0x130(%RSP),%R11 |
(289) 0x43c6b0 MOV 0x160(%RSP),%R9 |
(289) 0x43c6b8 MOV 0x170(%RSP),%RSI |
(289) 0x43c6c0 MOV 0xe0(%RSP),%RAX |
(289) 0x43c6c8 MOV 0xe8(%RSP),%RDX |
(289) 0x43c6d0 ADD %R14,%R13 |
(289) 0x43c6d3 MOV %R10,%R14 |
(289) 0x43c6d6 MOV 0x178(%RSP),%R10D |
(289) 0x43c6de ADD %R11,0x148(%RSP) |
(289) 0x43c6e6 ADD %RSI,%RBX |
(289) 0x43c6e9 ADD %R9,0x150(%RSP) |
(289) 0x43c6f1 ADD %RAX,0xf8(%RSP) |
(289) 0x43c6f9 ADD %RDX,0xf0(%RSP) |
(289) 0x43c701 CMP %R10D,0x120(%RSP) |
(289) 0x43c709 JLE 43c4a1 |
(289) 0x43c70f MOV 0x16c(%RSP),%EDI |
(289) 0x43c716 MOV $0x1,%ECX |
(289) 0x43c71b KMOVB %ECX,%K0 |
(289) 0x43c71f MOV %EDI,0x5c(%RSP) |
(289) 0x43c723 JMP 43c1a8 |
0x43c728 NOPL (%RAX,%RAX,1) |
(289) 0x43c730 MOVSXD 0x178(%RSP),%R10 |
(289) 0x43c738 MOV 0x160(%RSP),%RDI |
(289) 0x43c740 LEA -0x1(%RBX),%RDX |
(289) 0x43c744 MOV 0x170(%RSP),%RAX |
(289) 0x43c74c MOV 0x80(%RSP),%R9 |
(289) 0x43c754 MOV 0xc0(%RSP),%RCX |
(289) 0x43c75c MOV 0xc8(%RSP),%R8 |
(289) 0x43c764 IMUL %R10,%RAX |
(289) 0x43c768 MOV %R9,%RSI |
(289) 0x43c76b IMUL %RDI,%R10 |
(289) 0x43c76f MOV 0xa8(%RSP),%RDI |
(289) 0x43c777 SUB %RDI,%RSI |
(289) 0x43c77a ADD %RCX,%RAX |
(289) 0x43c77d MOV 0x150(%RSP),%RCX |
(289) 0x43c785 AND $0x8,%ESI |
(289) 0x43c788 LEA (%R10,%R8,1),%R11 |
(289) 0x43c78c LEA 0x1(%R14),%R10 |
(289) 0x43c790 MOV %RDI,%R8 |
(289) 0x43c793 JE 43c7f6 |
(289) 0x43c795 VMOVSD 0x8(%RDI),%XMM5 |
(289) 0x43c79a MOV 0xb0(%RSP),%R9 |
(289) 0x43c7a2 VCOMISD (%R9,%R15,8),%XMM5 |
(289) 0x43c7a8 JB 43c7c0 |
(289) 0x43c7aa MOV 0x70(%RSP),%RCX |
(289) 0x43c7af VMOVSD (%RCX,%R15,8),%XMM6 |
(289) 0x43c7b5 VCOMISD (%RDI),%XMM6 |
(289) 0x43c7b9 JA 43c974 |
(289) 0x43c7bf NOP |
(289) 0x43c7c0 MOV 0x150(%RSP),%R9 |
(289) 0x43c7c8 MOV %RBX,%RDX |
(289) 0x43c7cb INC %RAX |
(289) 0x43c7ce LEA 0x1(%R11),%R11 |
(289) 0x43c7d2 LEA 0x1(%R9),%RCX |
(289) 0x43c7d6 MOV 0xa8(%RSP),%RSI |
(289) 0x43c7de MOV 0x80(%RSP),%RDI |
(289) 0x43c7e6 LEA 0x8(%RSI),%R8 |
(289) 0x43c7ea MOV %RDI,%R9 |
(289) 0x43c7ed CMP %RDI,%R8 |
(289) 0x43c7f0 JE 43c8e9 |
(289) 0x43c7f6 MOV %R14,0x140(%RSP) |
(289) 0x43c7fe MOV 0xb0(%RSP),%RSI |
(290) 0x43c806 VMOVSD 0x8(%R8),%XMM5 |
(290) 0x43c80c VCOMISD (%RSI,%R15,8),%XMM5 |
(290) 0x43c812 JB 43c860 |
(290) 0x43c814 MOV 0x70(%RSP),%R14 |
(290) 0x43c819 VMOVSD (%R14,%R15,8),%XMM6 |
(290) 0x43c81f VCOMISD (%R8),%XMM6 |
(290) 0x43c824 JBE 43c860 |
(290) 0x43c826 MOV 0x28(%R12),%RDI |
(290) 0x43c82b MOV 0x78(%RSP),%R14 |
(290) 0x43c830 VMOVSD (%RDI,%R10,8),%XMM7 |
(290) 0x43c836 VCOMISD (%R14,%R15,8),%XMM7 |
(290) 0x43c83c JB 43c860 |
(290) 0x43c83e MOV 0xa0(%R12),%R14 |
(290) 0x43c846 VMOVSD (%R14,%R15,8),%XMM8 |
(290) 0x43c84c MOV 0x140(%RSP),%R14 |
(290) 0x43c854 VCOMISD (%RDI,%R14,8),%XMM8 |
(290) 0x43c85a JA 43cb68 |
(290) 0x43c860 INC %RDX |
(290) 0x43c863 INC %RCX |
(290) 0x43c866 INC %RAX |
(290) 0x43c869 INC %R11 |
(290) 0x43c86c VMOVSD 0x10(%R8),%XMM5 |
(290) 0x43c872 LEA 0x8(%R8),%RDI |
(290) 0x43c876 VCOMISD (%RSI,%R15,8),%XMM5 |
(290) 0x43c87c JB 43c8d0 |
(290) 0x43c87e MOV 0x70(%RSP),%R14 |
(290) 0x43c883 VMOVSD (%R14,%R15,8),%XMM6 |
(290) 0x43c889 VCOMISD 0x8(%R8),%XMM6 |
(290) 0x43c88f JBE 43c8d0 |
(290) 0x43c891 MOV 0x28(%R12),%R8 |
(290) 0x43c896 MOV 0x78(%RSP),%R14 |
(290) 0x43c89b VMOVSD (%R8,%R10,8),%XMM7 |
(290) 0x43c8a1 VCOMISD (%R14,%R15,8),%XMM7 |
(290) 0x43c8a7 JB 43c8d0 |
(290) 0x43c8a9 MOV 0xa0(%R12),%R14 |
(290) 0x43c8b1 VMOVSD (%R14,%R15,8),%XMM8 |
(290) 0x43c8b7 MOV 0x140(%RSP),%R14 |
(290) 0x43c8bf VCOMISD (%R8,%R14,8),%XMM8 |
(290) 0x43c8c5 JA 43cc7a |
(290) 0x43c8cb NOPL (%RAX,%RAX,1) |
(290) 0x43c8d0 INC %RDX |
(290) 0x43c8d3 INC %RCX |
(290) 0x43c8d6 INC %RAX |
(290) 0x43c8d9 INC %R11 |
(290) 0x43c8dc LEA 0x8(%RDI),%R8 |
(290) 0x43c8e0 CMP %R9,%R8 |
(290) 0x43c8e3 JNE 43c806 |
(289) 0x43c8e9 MOV 0xbc(%RSP),%R8D |
(289) 0x43c8f1 JMP 43c417 |
0x43c8f6 NOPW %CS:(%RAX,%RAX,1) |
(289) 0x43c900 LEA 0x1(%R14),%R10 |
(289) 0x43c904 JMP 43c417 |
0x43c909 NOPL (%RAX) |
(288) 0x43c910 INC %EAX |
(288) 0x43c912 XOR %EDX,%EDX |
(288) 0x43c914 JMP 43bf1c |
0x43c919 LEA -0x28(%RBP),%RSP |
0x43c91d POP %RBX |
0x43c91e POP %R12 |
0x43c920 POP %R13 |
0x43c922 POP %R14 |
0x43c924 POP %R15 |
0x43c926 POP %RBP |
0x43c927 RET |
(292) 0x43c928 VBROADCASTSD (%RDX),%YMM3 |
(292) 0x43c92d LEA 0x20(%R10),%RAX |
(292) 0x43c931 VMOVUPD %YMM3,(%R10) |
(292) 0x43c936 JMP 43bcec |
(294) 0x43c93b VBROADCASTSD (%RDX),%YMM2 |
(294) 0x43c940 LEA 0x20(%R10),%RAX |
(294) 0x43c944 VMOVUPD %YMM2,(%R10) |
(294) 0x43c949 JMP 43ba1c |
(296) 0x43c94e VBROADCASTSD (%RDX),%YMM1 |
(296) 0x43c953 LEA 0x20(%R10),%RAX |
(296) 0x43c957 VMOVUPD %YMM1,(%R10) |
(296) 0x43c95c JMP 43b754 |
(298) 0x43c961 VBROADCASTSD (%RDX),%YMM0 |
(298) 0x43c966 LEA 0x20(%R10),%RAX |
(298) 0x43c96a VMOVUPD %YMM0,(%R10) |
(298) 0x43c96f JMP 43b48c |
(289) 0x43c974 MOV 0x28(%R12),%R8 |
(289) 0x43c979 MOV 0x78(%RSP),%RSI |
(289) 0x43c97e VMOVSD (%R8,%R10,8),%XMM7 |
(289) 0x43c984 VCOMISD (%RSI,%R15,8),%XMM7 |
(289) 0x43c98a JB 43c7c0 |
(289) 0x43c990 MOV 0xa0(%R12),%RDI |
(289) 0x43c998 VMOVSD (%RDI,%R15,8),%XMM8 |
(289) 0x43c99e VCOMISD (%R8,%R14,8),%XMM8 |
(289) 0x43c9a4 JBE 43c7c0 |
(289) 0x43c9aa MOV 0x70(%R12),%R8 |
(289) 0x43c9af MOV 0xf8(%RSP),%RSI |
(289) 0x43c9b7 MOV 0x48(%R12),%RDI |
(289) 0x43c9bc MOV 0x68(%R12),%R9 |
(289) 0x43c9c1 VMOVSD (%R8,%R15,8),%XMM9 |
(289) 0x43c9c7 ADD %RDX,%RSI |
(289) 0x43c9ca MOV 0xf0(%RSP),%R8 |
(289) 0x43c9d2 MOV 0x40(%R12),%RCX |
(289) 0x43c9d7 VMOVSD %XMM9,(%RDI,%RSI,8) |
(289) 0x43c9dc MOV 0x78(%R12),%RSI |
(289) 0x43c9e1 ADD %RDX,%R8 |
(289) 0x43c9e4 LEA (,%R15,8),%RDI |
(289) 0x43c9ec VMOVSD (%R9,%R15,8),%XMM10 |
(289) 0x43c9f2 MOV 0x58(%R12),%R9 |
(289) 0x43c9f7 ADD %RDI,%RSI |
(289) 0x43c9fa ADD 0x80(%R12),%RDI |
(289) 0x43ca02 VMOVSD %XMM10,(%RCX,%R8,8) |
(289) 0x43ca08 MOV 0x50(%R12),%R8 |
(289) 0x43ca0d MOV 0x150(%RSP),%RCX |
(289) 0x43ca15 VMOVSD (%RSI),%XMM11 |
(289) 0x43ca19 VMOVSD %XMM11,(%R8,%RDX,8) |
(289) 0x43ca1f MOV %RBX,%RDX |
(289) 0x43ca22 VMOVSD (%RDI),%XMM12 |
(289) 0x43ca26 VMOVSD %XMM12,(%R9,%RCX,8) |
(289) 0x43ca2c INC %RCX |
(289) 0x43ca2f VMOVSD (%RSI),%XMM13 |
(289) 0x43ca33 VMOVSD %XMM13,(%R8,%RBX,8) |
(289) 0x43ca39 VMOVSD (%RDI),%XMM14 |
(289) 0x43ca3d VMOVSD %XMM14,(%R9,%RCX,8) |
(289) 0x43ca43 VMOVSD (%RSI),%XMM15 |
(289) 0x43ca47 VMOVSD %XMM15,(%R8,%RAX,8) |
(289) 0x43ca4d INC %RAX |
(289) 0x43ca50 VMOVSD (%RDI),%XMM0 |
(289) 0x43ca54 VMOVSD %XMM0,(%R9,%R11,8) |
(289) 0x43ca5a LEA 0x1(%R11),%R11 |
(289) 0x43ca5e VMOVSD (%RSI),%XMM1 |
(289) 0x43ca62 VMOVSD %XMM1,(%R8,%RAX,8) |
(289) 0x43ca68 VMOVSD (%RDI),%XMM4 |
(289) 0x43ca6c VMOVSD %XMM4,(%R9,%R11,8) |
(289) 0x43ca72 JMP 43c7d6 |
0x43ca77 NOPW (%RAX,%RAX,1) |
(296) 0x43ca80 MOV %R15D,%EAX |
(296) 0x43ca83 XOR %EDI,%EDI |
(296) 0x43ca85 JMP 43b82d |
(294) 0x43ca8a MOV %R15D,%EAX |
(294) 0x43ca8d XOR %EDI,%EDI |
(294) 0x43ca8f JMP 43baf5 |
(298) 0x43ca94 MOV %R15D,%EAX |
(298) 0x43ca97 XOR %EDI,%EDI |
(298) 0x43ca99 JMP 43b565 |
(292) 0x43ca9e MOV %R15D,%EAX |
(292) 0x43caa1 XOR %EDI,%EDI |
(292) 0x43caa3 JMP 43bdc5 |
0x43caa8 MOV 0xf8(%RSP),%R9D |
0x43cab0 MOV %R9D,0x178(%RSP) |
0x43cab8 MOV 0x178(%RSP),%R13D |
0x43cac0 MOV %R13D,0x140(%R14) |
0x43cac7 VZEROUPPER |
0x43caca JMP 43bb7d |
0x43cacf MOV 0x108(%RSP),%R9D |
0x43cad7 MOV %R9D,0x178(%RSP) |
0x43cadf MOV 0x178(%RSP),%R13D |
0x43cae7 MOV %R13D,0x140(%R14) |
0x43caee VZEROUPPER |
0x43caf1 JMP 43be4d |
0x43caf6 MOV 0x100(%RSP),%R9D |
0x43cafe MOV %R9D,0x178(%RSP) |
0x43cb06 MOV 0x178(%RSP),%R13D |
0x43cb0e MOV %R13D,0x140(%R14) |
0x43cb15 VZEROUPPER |
0x43cb18 JMP 43b8b4 |
0x43cb1d MOV 0x110(%RSP),%R9D |
0x43cb25 MOV %R9D,0x178(%RSP) |
0x43cb2d MOV 0x178(%RSP),%R13D |
0x43cb35 MOV %R13D,0x140(%R14) |
0x43cb3c VZEROUPPER |
0x43cb3f JMP 43b5ec |
0x43cb44 INC %EAX |
0x43cb46 XOR %EDX,%EDX |
0x43cb48 JMP 43bbac |
0x43cb4d INC %EAX |
0x43cb4f XOR %EDX,%EDX |
0x43cb51 JMP 43b61b |
0x43cb56 INC %EAX |
0x43cb58 XOR %EDX,%EDX |
0x43cb5a JMP 43b8e3 |
0x43cb5f INC %EAX |
0x43cb61 XOR %EDX,%EDX |
0x43cb63 JMP 43b357 |
(290) 0x43cb68 MOV 0x70(%R12),%RDI |
(290) 0x43cb6d MOV 0x48(%R12),%R14 |
(290) 0x43cb72 VMOVSD (%RDI,%R15,8),%XMM9 |
(290) 0x43cb78 MOV 0xf8(%RSP),%RDI |
(290) 0x43cb80 ADD %RDX,%RDI |
(290) 0x43cb83 VMOVSD %XMM9,(%R14,%RDI,8) |
(290) 0x43cb89 MOV 0x68(%R12),%RDI |
(290) 0x43cb8e MOV 0x40(%R12),%R14 |
(290) 0x43cb93 VMOVSD (%RDI,%R15,8),%XMM10 |
(290) 0x43cb99 MOV 0xf0(%RSP),%RDI |
(290) 0x43cba1 ADD %RDX,%RDI |
(290) 0x43cba4 VMOVSD %XMM10,(%R14,%RDI,8) |
(290) 0x43cbaa MOV 0x78(%R12),%R14 |
(290) 0x43cbaf LEA (,%R15,8),%RDI |
(290) 0x43cbb7 MOV %RDI,0x128(%RSP) |
(290) 0x43cbbf ADD %RDI,%R14 |
(290) 0x43cbc2 MOV 0x50(%R12),%RDI |
(290) 0x43cbc7 VMOVSD (%R14),%XMM11 |
(290) 0x43cbcc VMOVSD %XMM11,(%RDI,%RDX,8) |
(290) 0x43cbd1 MOV 0x128(%RSP),%RDI |
(290) 0x43cbd9 INC %RDX |
(290) 0x43cbdc ADD 0x80(%R12),%RDI |
(290) 0x43cbe4 VMOVSD (%RDI),%XMM12 |
(290) 0x43cbe8 MOV %RDI,0x128(%RSP) |
(290) 0x43cbf0 MOV 0x58(%R12),%RDI |
(290) 0x43cbf5 VMOVSD %XMM12,(%RDI,%RCX,8) |
(290) 0x43cbfa MOV 0x50(%R12),%RDI |
(290) 0x43cbff INC %RCX |
(290) 0x43cc02 VMOVSD (%R14),%XMM13 |
(290) 0x43cc07 VMOVSD %XMM13,(%RDI,%RDX,8) |
(290) 0x43cc0c MOV 0x128(%RSP),%RDI |
(290) 0x43cc14 VMOVSD (%RDI),%XMM14 |
(290) 0x43cc18 MOV 0x58(%R12),%RDI |
(290) 0x43cc1d VMOVSD %XMM14,(%RDI,%RCX,8) |
(290) 0x43cc22 MOV 0x50(%R12),%RDI |
(290) 0x43cc27 VMOVSD (%R14),%XMM15 |
(290) 0x43cc2c VMOVSD %XMM15,(%RDI,%RAX,8) |
(290) 0x43cc31 MOV 0x128(%RSP),%RDI |
(290) 0x43cc39 INC %RAX |
(290) 0x43cc3c VMOVSD (%RDI),%XMM0 |
(290) 0x43cc40 MOV 0x58(%R12),%RDI |
(290) 0x43cc45 VMOVSD %XMM0,(%RDI,%R11,8) |
(290) 0x43cc4b MOV 0x128(%RSP),%RDI |
(290) 0x43cc53 INC %R11 |
(290) 0x43cc56 VMOVSD (%R14),%XMM1 |
(290) 0x43cc5b MOV 0x50(%R12),%R14 |
(290) 0x43cc60 VMOVSD %XMM1,(%R14,%RAX,8) |
(290) 0x43cc66 MOV 0x58(%R12),%R14 |
(290) 0x43cc6b VMOVSD (%RDI),%XMM4 |
(290) 0x43cc6f VMOVSD %XMM4,(%R14,%R11,8) |
(290) 0x43cc75 JMP 43c86c |
(290) 0x43cc7a MOV 0x70(%R12),%R8 |
(290) 0x43cc7f MOV 0xf8(%RSP),%R14 |
(290) 0x43cc87 VMOVSD (%R8,%R15,8),%XMM9 |
(290) 0x43cc8d LEA (%RDX,%R14,1),%R8 |
(290) 0x43cc91 MOV 0x48(%R12),%R14 |
(290) 0x43cc96 VMOVSD %XMM9,(%R14,%R8,8) |
(290) 0x43cc9c MOV 0x68(%R12),%R8 |
(290) 0x43cca1 MOV 0xf0(%RSP),%R14 |
(290) 0x43cca9 VMOVSD (%R8,%R15,8),%XMM10 |
(290) 0x43ccaf LEA (%R14,%RDX,1),%R8 |
(290) 0x43ccb3 MOV 0x40(%R12),%R14 |
(290) 0x43ccb8 VMOVSD %XMM10,(%R14,%R8,8) |
(290) 0x43ccbe MOV 0x78(%R12),%R14 |
(290) 0x43ccc3 LEA (,%R15,8),%R8 |
(290) 0x43cccb MOV %R8,0x128(%RSP) |
(290) 0x43ccd3 ADD %R8,%R14 |
(290) 0x43ccd6 MOV 0x50(%R12),%R8 |
(290) 0x43ccdb VMOVSD (%R14),%XMM11 |
(290) 0x43cce0 VMOVSD %XMM11,(%R8,%RDX,8) |
(290) 0x43cce6 MOV 0x128(%RSP),%R8 |
(290) 0x43ccee INC %RDX |
(290) 0x43ccf1 ADD 0x80(%R12),%R8 |
(290) 0x43ccf9 VMOVSD (%R8),%XMM12 |
(290) 0x43ccfe MOV %R8,0x128(%RSP) |
(290) 0x43cd06 MOV 0x58(%R12),%R8 |
(290) 0x43cd0b VMOVSD %XMM12,(%R8,%RCX,8) |
(290) 0x43cd11 MOV 0x50(%R12),%R8 |
(290) 0x43cd16 INC %RCX |
(290) 0x43cd19 VMOVSD (%R14),%XMM13 |
(290) 0x43cd1e VMOVSD %XMM13,(%R8,%RDX,8) |
(290) 0x43cd24 MOV 0x128(%RSP),%R8 |
(290) 0x43cd2c VMOVSD (%R8),%XMM14 |
(290) 0x43cd31 MOV 0x58(%R12),%R8 |
(290) 0x43cd36 VMOVSD %XMM14,(%R8,%RCX,8) |
(290) 0x43cd3c MOV 0x50(%R12),%R8 |
(290) 0x43cd41 VMOVSD (%R14),%XMM15 |
(290) 0x43cd46 VMOVSD %XMM15,(%R8,%RAX,8) |
(290) 0x43cd4c MOV 0x128(%RSP),%R8 |
(290) 0x43cd54 INC %RAX |
(290) 0x43cd57 VMOVSD (%R8),%XMM0 |
(290) 0x43cd5c MOV 0x58(%R12),%R8 |
(290) 0x43cd61 VMOVSD %XMM0,(%R8,%R11,8) |
(290) 0x43cd67 INC %R11 |
(290) 0x43cd6a VMOVSD (%R14),%XMM1 |
(290) 0x43cd6f MOV 0x50(%R12),%R14 |
(290) 0x43cd74 VMOVSD %XMM1,(%R14,%RAX,8) |
(290) 0x43cd7a MOV 0x128(%RSP),%R14 |
(290) 0x43cd82 VMOVSD (%R14),%XMM4 |
(290) 0x43cd87 VMOVSD %XMM4,(%R8,%R11,8) |
(290) 0x43cd8d JMP 43c8dc |
0x43cd92 NOPW %CS:(%RAX,%RAX,1) |
0x43cd9d NOPL (%RAX) |
Path / |
Source file and lines | generate_chunk_kernel.f90:85-161 |
Module | exec |
nb instructions | 366 |
nb uops | 395 |
loop length | 1683 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 30 |
micro-operation queue | 65.83 cycles |
front end | 65.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 31.80 | 31.80 | 30.00 | 30.00 | 34.50 | 31.80 | 31.80 | 34.50 | 34.50 | 34.50 | 31.80 | 30.00 |
cycles | 31.80 | 47.13 | 30.00 | 30.00 | 34.50 | 31.80 | 31.80 | 34.50 | 34.50 | 34.50 | 31.80 | 30.00 |
Cycles executing div or sqrt instructions | 24.00 |
FE+BE cycles | 62.52-62.61 |
Stall cycles | 0.00 |
Front-end | 65.83 |
Dispatch | 47.13 |
DIV/SQRT | 24.00 |
Overall L1 | 65.83 |
all | 6% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 20% |
all | 8% |
load | 7% |
store | 8% |
mul | 6% |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 10% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RDI,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x20,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x180,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x120(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x118(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x108(%RDI),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x100(%RDI),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xf8(%RDI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xf0(%RDI),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe8(%RDI),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x128(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe0(%RDI),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x110(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd8(%RDI),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xd0(%RDI),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RDI),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0x138(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,0x130(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0x170(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,0x118(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL 402080 <@plt_start@+0x60> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EAX,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x2,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 402180 <@plt_start@+0x160> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,0x124(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x18(%R14),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R12D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
CMP %EDX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 43cb5f <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x18ff> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x124(%RSP),%R9D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %EAX,%R9D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R9D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 43b5ec <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x38c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x138(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %EBX,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV (%R14),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
KXORB %K4,%K4,%K4 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV 0x8(%R14),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD %R9D,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV 0x70(%R14),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x16c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R10,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOVSXD (%RSI),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (,%R10,8),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV (%R8),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%R14),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R13,%RAX,1),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x2(%R13),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA 0x3(%RDI),%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB %R13D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RCX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x4(%RDI),%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA 0x5(%RDI),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,%R11D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EDI,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12D,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EAX,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x10(%RSI,%R8,8),%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
AND $-0x4,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x2,%R12D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x5(%R15,%R11,1),%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EDI,0x168(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SAL $0x5,%R12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
ADD %R15D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EBX,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVGE %R15D,%R8D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
AND $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8D,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KORTESTB %K4,%K4 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JNE 43cb1d <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x18bd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402220 <@plt_start@+0x200> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x18(%R14),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R14),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R15),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB $0x2,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIVL 0xb8(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 6 |
CMP %EDX,0x124(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 43cb4d <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x18ed> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x124(%RSP),%R9D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %EAX,%R9D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R9D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 43b8b4 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x654> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x8(%R14),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x130(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %EBX,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
KXORB %K3,%K3,%K3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV (%R14),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x16c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RCX),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD %R9D,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
LEA (,%R10,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x68(%R14),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %R10,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOVSXD (%RSI),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%R14),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x3(%RDI),%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (%R13,%R11,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %R13D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x2(%R13),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x4(%RDI),%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %R11,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDI,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x5(%RDI),%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA -0x10(%RSI,%RAX,8),%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R11D,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R12D,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x5(%R15,%R8,1),%EAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
AND $-0x4,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x2,%R12D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %EDI,0x168(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SAL $0x5,%R12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
ADD %R15D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EBX,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVGE %R15D,%EAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
AND $0x3,%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11D,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KORTESTB %K3,%K3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JNE 43caf6 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1896> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402220 <@plt_start@+0x200> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x18(%R14),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R14),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R15),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB $0x2,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIVL 0xb8(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 6 |
CMP %EDX,0x124(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 43cb56 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x18f6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x124(%RSP),%R9D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %EAX,%R9D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R9D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 43bb7d <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x91d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x8(%R14),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x170(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %EBX,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
KXORB %K2,%K2,%K2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV (%R14),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x60(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x16c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RCX),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD %R9D,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
LEA (,%R10,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x78(%R14),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %R10,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOVSXD (%RSI),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%R14),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x3(%RDI),%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (%R13,%R11,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %R13D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x2(%R13),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x4(%RDI),%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %R11,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDI,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x5(%RDI),%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA -0x10(%RSI,%RAX,8),%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R11D,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R12D,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x5(%R15,%R8,1),%EAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
AND $-0x4,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x2,%R12D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %EDI,0x168(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SAL $0x5,%R12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
ADD %R15D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EBX,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVGE %R15D,%EAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
AND $0x3,%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11D,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KORTESTB %K2,%K2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JNE 43caa8 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1848> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402220 <@plt_start@+0x200> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x18(%R14),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R14),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R15),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB $0x2,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIVL 0xb8(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 6 |
CMP %EDX,0x124(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 43cb44 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x18e4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x124(%RSP),%R9D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %EAX,%R9D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R9D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 43be4d <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xbed> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x8(%R14),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x160(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %EBX,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
KXORB %K1,%K1,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV (%R14),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x16c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RCX),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD %R9D,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
LEA (,%R10,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x80(%R14),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %R10,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOVSXD (%RSI),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%R14),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x3(%RDI),%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (%R13,%R11,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %R13D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x2(%R13),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x4(%RDI),%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %R11,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDI,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x5(%RDI),%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA -0x10(%RSI,%RAX,8),%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R11D,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R12D,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x5(%R15,%R8,1),%EAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
AND $-0x4,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x2,%R12D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %EDI,0x168(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SAL $0x5,%R12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
ADD %R15D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EBX,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVGE %R15D,%EAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
AND $0x3,%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11D,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KORTESTB %K1,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JNE 43cacf <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x186f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402220 <@plt_start@+0x200> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x60(%R14),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R15),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP $0x1,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 43c919 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x16b9> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x118(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RBX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x1,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x48(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RSI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (,%RDX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
DEC %R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 43beb6 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xc56> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xf8(%RSP),%R9D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9D,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x178(%RSP),%R13D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13D,0x140(%R14) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 43bb7d <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x91d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV 0x108(%RSP),%R9D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9D,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x178(%RSP),%R13D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13D,0x140(%R14) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 43be4d <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xbed> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV 0x100(%RSP),%R9D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9D,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x178(%RSP),%R13D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13D,0x140(%R14) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 43b8b4 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x654> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV 0x110(%RSP),%R9D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9D,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x178(%RSP),%R13D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13D,0x140(%R14) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 43b5ec <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x38c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 43bbac <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x94c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 43b61b <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x3bb> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 43b8e3 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x683> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 43b357 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xf7> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | generate_chunk_kernel.f90:85-161 |
Module | exec |
nb instructions | 366 |
nb uops | 395 |
loop length | 1683 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 30 |
micro-operation queue | 65.83 cycles |
front end | 65.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 31.80 | 31.80 | 30.00 | 30.00 | 34.50 | 31.80 | 31.80 | 34.50 | 34.50 | 34.50 | 31.80 | 30.00 |
cycles | 31.80 | 47.13 | 30.00 | 30.00 | 34.50 | 31.80 | 31.80 | 34.50 | 34.50 | 34.50 | 31.80 | 30.00 |
Cycles executing div or sqrt instructions | 24.00 |
FE+BE cycles | 62.52-62.61 |
Stall cycles | 0.00 |
Front-end | 65.83 |
Dispatch | 47.13 |
DIV/SQRT | 24.00 |
Overall L1 | 65.83 |
all | 6% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 20% |
all | 8% |
load | 7% |
store | 8% |
mul | 6% |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 10% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RDI,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x20,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x180,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x120(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x118(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x108(%RDI),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x100(%RDI),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xf8(%RDI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xf0(%RDI),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe8(%RDI),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x128(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe0(%RDI),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x110(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd8(%RDI),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xd0(%RDI),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RDI),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0x138(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,0x130(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0x170(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,0x118(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL 402080 <@plt_start@+0x60> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EAX,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x2,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 402180 <@plt_start@+0x160> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,0x124(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x18(%R14),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R12D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
CMP %EDX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 43cb5f <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x18ff> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x124(%RSP),%R9D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %EAX,%R9D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R9D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 43b5ec <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x38c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x138(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %EBX,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV (%R14),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
KXORB %K4,%K4,%K4 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV 0x8(%R14),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD %R9D,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV 0x70(%R14),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x16c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R10,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOVSXD (%RSI),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (,%R10,8),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV (%R8),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%R14),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R13,%RAX,1),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x2(%R13),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA 0x3(%RDI),%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB %R13D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RCX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x4(%RDI),%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA 0x5(%RDI),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,%R11D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EDI,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12D,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EAX,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x10(%RSI,%R8,8),%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
AND $-0x4,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x2,%R12D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x5(%R15,%R11,1),%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EDI,0x168(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SAL $0x5,%R12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
ADD %R15D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EBX,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVGE %R15D,%R8D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
AND $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8D,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KORTESTB %K4,%K4 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JNE 43cb1d <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x18bd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402220 <@plt_start@+0x200> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x18(%R14),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R14),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R15),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB $0x2,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIVL 0xb8(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 6 |
CMP %EDX,0x124(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 43cb4d <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x18ed> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x124(%RSP),%R9D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %EAX,%R9D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R9D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 43b8b4 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x654> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x8(%R14),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x130(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %EBX,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
KXORB %K3,%K3,%K3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV (%R14),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x16c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RCX),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD %R9D,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
LEA (,%R10,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x68(%R14),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %R10,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOVSXD (%RSI),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%R14),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x3(%RDI),%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (%R13,%R11,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %R13D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x2(%R13),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x4(%RDI),%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %R11,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDI,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x5(%RDI),%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA -0x10(%RSI,%RAX,8),%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R11D,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R12D,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x5(%R15,%R8,1),%EAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
AND $-0x4,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x2,%R12D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %EDI,0x168(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SAL $0x5,%R12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
ADD %R15D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EBX,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVGE %R15D,%EAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
AND $0x3,%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11D,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KORTESTB %K3,%K3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JNE 43caf6 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1896> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402220 <@plt_start@+0x200> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x18(%R14),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R14),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R15),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB $0x2,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIVL 0xb8(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 6 |
CMP %EDX,0x124(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 43cb56 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x18f6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x124(%RSP),%R9D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %EAX,%R9D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R9D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 43bb7d <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x91d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x8(%R14),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x170(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %EBX,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
KXORB %K2,%K2,%K2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV (%R14),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x60(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x16c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RCX),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD %R9D,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
LEA (,%R10,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x78(%R14),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %R10,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOVSXD (%RSI),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%R14),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x3(%RDI),%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (%R13,%R11,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %R13D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x2(%R13),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x4(%RDI),%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %R11,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDI,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x5(%RDI),%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA -0x10(%RSI,%RAX,8),%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R11D,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R12D,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x5(%R15,%R8,1),%EAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
AND $-0x4,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x2,%R12D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %EDI,0x168(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SAL $0x5,%R12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
ADD %R15D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EBX,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVGE %R15D,%EAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
AND $0x3,%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11D,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KORTESTB %K2,%K2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JNE 43caa8 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1848> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402220 <@plt_start@+0x200> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x18(%R14),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R14),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R15),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB $0x2,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIVL 0xb8(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 6 |
CMP %EDX,0x124(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 43cb44 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x18e4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x124(%RSP),%R9D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %EAX,%R9D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R9D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 43be4d <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xbed> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x8(%R14),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x160(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %EBX,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
KXORB %K1,%K1,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV (%R14),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x16c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RCX),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD %R9D,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
LEA (,%R10,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x80(%R14),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %R10,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOVSXD (%RSI),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%R14),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x3(%RDI),%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (%R13,%R11,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %R13D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x2(%R13),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x4(%RDI),%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %R11,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDI,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x5(%RDI),%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA -0x10(%RSI,%RAX,8),%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R11D,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R12D,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x5(%R15,%R8,1),%EAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
AND $-0x4,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x2,%R12D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %EDI,0x168(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SAL $0x5,%R12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
ADD %R15D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EBX,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVGE %R15D,%EAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
AND $0x3,%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11D,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KORTESTB %K1,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JNE 43cacf <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x186f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402220 <@plt_start@+0x200> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x60(%R14),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R15),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP $0x1,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 43c919 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x16b9> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x118(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RBX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x1,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x48(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RSI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (,%RDX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
DEC %R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 43beb6 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xc56> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xf8(%RSP),%R9D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9D,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x178(%RSP),%R13D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13D,0x140(%R14) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 43bb7d <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x91d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV 0x108(%RSP),%R9D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9D,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x178(%RSP),%R13D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13D,0x140(%R14) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 43be4d <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xbed> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV 0x100(%RSP),%R9D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9D,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x178(%RSP),%R13D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13D,0x140(%R14) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 43b8b4 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x654> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV 0x110(%RSP),%R9D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9D,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x178(%RSP),%R13D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13D,0x140(%R14) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 43b5ec <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x38c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 43bbac <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x94c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 43b61b <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x3bb> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 43b8e3 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x683> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 43b357 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xf7> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0– | 0.04 | 0.01 |
▼Loop 292 - generate_chunk_kernel.f90:106-114 - exec– | 0 | 0 |
○Loop 293 - generate_chunk_kernel.f90:114-114 - exec | 0 | 0 |
▼Loop 294 - generate_chunk_kernel.f90:98-106 - exec– | 0 | 0 |
○Loop 295 - generate_chunk_kernel.f90:106-106 - exec | 0.01 | 0 |
▼Loop 298 - generate_chunk_kernel.f90:88-150 - exec– | 0 | 0 |
○Loop 299 - generate_chunk_kernel.f90:90-90 - exec | 0.01 | 0 |
▼Loop 288 - generate_chunk_kernel.f90:119-161 - exec– | 0 | 0 |
▼Loop 289 - generate_chunk_kernel.f90:129-161 - exec– | 0 | 0 |
○Loop 290 - generate_chunk_kernel.f90:130-137 - exec | 0.02 | 0.01 |
○Loop 291 - generate_chunk_kernel.f90:142-161 - exec | 0 | 0 |
▼Loop 296 - generate_chunk_kernel.f90:90-98 - exec– | 0 | 0 |
○Loop 297 - generate_chunk_kernel.f90:98-98 - exec | 0.01 | 0 |