Function: __revert_kernel_module_MOD_revert_kernel._omp_fn.0.lto_priv.0 | Module: exec | Source: revert_kernel.f90:41-48 | Coverage: 1.86% |
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Function: __revert_kernel_module_MOD_revert_kernel._omp_fn.0.lto_priv.0 | Module: exec | Source: revert_kernel.f90:41-48 | Coverage: 1.86% |
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/scratch_na/users/xoserete/qaas_runs/171-214-9740/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/revert_kernel.f90: 41 - 48 |
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41: !$OMP PARALLEL |
42: |
43: !$OMP DO |
44: DO k=y_min,y_max |
45: !$OMP SIMD |
46: DO j=x_min,x_max |
47: density1(j,k)=density0(j,k) |
48: energy1(j,k)=energy0(j,k) |
0x439db0 PUSH %RBP |
0x439db1 MOV %RSP,%RBP |
0x439db4 PUSH %R15 |
0x439db6 PUSH %R14 |
0x439db8 PUSH %R13 |
0x439dba PUSH %R12 |
0x439dbc PUSH %RBX |
0x439dbd AND $-0x20,%RSP |
0x439dc1 SUB $0xa0,%RSP |
0x439dc8 MOV 0x70(%RDI),%RDX |
0x439dcc MOV 0x50(%RDI),%RBX |
0x439dd0 MOV %RDI,0x98(%RSP) |
0x439dd8 MOV 0x78(%RDI),%RAX |
0x439ddc MOV 0x60(%RDI),%RCX |
0x439de0 MOV 0x40(%RDI),%RSI |
0x439de4 MOV 0x10(%RDI),%R8 |
0x439de8 MOV %RDX,0x58(%RSP) |
0x439ded MOV 0x68(%RDI),%R12 |
0x439df1 MOV 0x58(%RDI),%R13 |
0x439df5 MOV %RCX,0x50(%RSP) |
0x439dfa MOV 0x48(%RDI),%R14 |
0x439dfe MOV %RBX,0x48(%RSP) |
0x439e03 MOV %RSI,0x40(%RSP) |
0x439e08 MOV (%R8),%EBX |
0x439e0b MOV %RAX,0x78(%RSP) |
0x439e10 CALL 402080 <@plt_start@+0x60> |
0x439e15 MOV %EAX,%R15D |
0x439e18 CALL 402180 <@plt_start@+0x160> |
0x439e1d MOV 0x98(%RSP),%RDI |
0x439e25 MOV %EAX,%R9D |
0x439e28 MOV 0x18(%RDI),%R10 |
0x439e2c MOV (%R10),%EAX |
0x439e2f INC %EAX |
0x439e31 SUB %EBX,%EAX |
0x439e33 CLTD |
0x439e34 IDIV %R15D |
0x439e37 CMP %EDX,%R9D |
0x439e3a JL 43a2fb |
0x439e40 IMUL %EAX,%R9D |
0x439e44 ADD %EDX,%R9D |
0x439e47 ADD %R9D,%EAX |
0x439e4a CMP %EAX,%R9D |
0x439e4d JGE 43a2c1 |
0x439e53 MOV (%RDI),%R11 |
0x439e56 LEA (%RBX,%R9,1),%EDX |
0x439e5a ADD %EBX,%EAX |
0x439e5c MOV 0x8(%RDI),%RCX |
0x439e60 MOV 0x20(%RDI),%R15 |
0x439e64 MOV 0x30(%RDI),%R10 |
0x439e68 MOV %EAX,0x2c(%RSP) |
0x439e6c MOVSXD %EDX,%RAX |
0x439e6f MOVSXD (%R11),%RBX |
0x439e72 MOV (%RCX),%ECX |
0x439e74 MOV %EDX,0x70(%RSP) |
0x439e78 MOV 0x40(%RSP),%RDX |
0x439e7d MOV 0x28(%RDI),%R11 |
0x439e81 MOV %RDI,0x10(%RSP) |
0x439e86 MOV %RBX,%RSI |
0x439e89 ADD %RBX,%R14 |
0x439e8c ADD %RBX,%R13 |
0x439e8f MOV %EBX,0x34(%RSP) |
0x439e93 MOV %RBX,0x68(%RSP) |
0x439e98 MOV 0x48(%RSP),%RBX |
0x439e9d IMUL %RAX,%RDX |
0x439ea1 ADD %RSI,%R12 |
0x439ea4 LEA 0x1(%RCX),%R8D |
0x439ea8 MOV %ECX,0x28(%RSP) |
0x439eac MOV 0x38(%RDI),%R9 |
0x439eb0 IMUL %RAX,%RBX |
0x439eb4 MOV %R8D,0x24(%RSP) |
0x439eb9 ADD %R14,%RDX |
0x439ebc MOV %ECX,%R14D |
0x439ebf SUB %ESI,%ECX |
0x439ec1 MOV %RDX,0x80(%RSP) |
0x439ec9 MOV 0x78(%RSP),%RDX |
0x439ece ADD %R13,%RBX |
0x439ed1 MOV 0x50(%RSP),%R13 |
0x439ed6 MOV %ECX,0x74(%RSP) |
0x439eda INC %ECX |
0x439edc ADD %RSI,%RDX |
0x439edf MOV %RBX,0x90(%RSP) |
0x439ee7 MOV %ECX,%EBX |
0x439ee9 IMUL %RAX,%R13 |
0x439eed MOV %ECX,0x60(%RSP) |
0x439ef1 ADD %R12,%R13 |
0x439ef4 MOV 0x58(%RSP),%R12 |
0x439ef9 MOV %R13,0x88(%RSP) |
0x439f01 IMUL %R12,%RAX |
0x439f05 ADD %RDX,%RAX |
0x439f08 MOV %RAX,0x98(%RSP) |
0x439f10 MOV %ECX,%EAX |
0x439f12 AND $-0x4,%ECX |
0x439f15 SHR $0x2,%EAX |
0x439f18 MOV %ECX,0x3c(%RSP) |
0x439f1c ADD %ESI,%ECX |
0x439f1e SAL $0x5,%RAX |
0x439f22 CMP %R14D,%ESI |
0x439f25 MOV %ECX,0x38(%RSP) |
0x439f29 MOV 0x18(%RSP),%ECX |
0x439f2d CMOVLE %R8D,%ESI |
0x439f31 AND $0x3,%EBX |
0x439f34 MOV %RAX,0x78(%RSP) |
0x439f39 XOR %EDX,%EDX |
0x439f3b MOV %EBX,0x64(%RSP) |
0x439f3f MOV %ESI,0x30(%RSP) |
(277) 0x439f43 MOV 0x28(%RSP),%EDI |
(277) 0x439f47 CMP %EDI,0x34(%RSP) |
(277) 0x439f4b JG 43a304 |
(277) 0x439f51 MOV 0x80(%RSP),%R12 |
(277) 0x439f59 MOV 0x90(%RSP),%RBX |
(277) 0x439f61 MOV 0x88(%RSP),%R8 |
(277) 0x439f69 MOV 0x68(%RSP),%R13 |
(277) 0x439f6e MOV 0x98(%RSP),%R14 |
(277) 0x439f76 MOV %R12,%RDX |
(277) 0x439f79 MOV %RBX,%RCX |
(277) 0x439f7c MOV %R8,%RSI |
(277) 0x439f7f SUB %R13,%RDX |
(277) 0x439f82 SUB %R13,%RCX |
(277) 0x439f85 SUB %R13,%RSI |
(277) 0x439f88 SUB %R13,%R14 |
(277) 0x439f8b CMPL $0x2,0x74(%RSP) |
(277) 0x439f90 JBE 43a2f0 |
(277) 0x439f96 MOV 0x78(%RSP),%RDI |
(277) 0x439f9b LEA (%R15,%R12,8),%R13 |
(277) 0x439f9f LEA (%R11,%RBX,8),%R12 |
(277) 0x439fa3 XOR %EAX,%EAX |
(277) 0x439fa5 LEA (%R10,%R8,8),%RBX |
(277) 0x439fa9 MOV 0x98(%RSP),%R8 |
(277) 0x439fb1 SUB $0x20,%RDI |
(277) 0x439fb5 SHR $0x5,%RDI |
(277) 0x439fb9 LEA (%R9,%R8,8),%R8 |
(277) 0x439fbd INC %RDI |
(277) 0x439fc0 AND $0x7,%EDI |
(277) 0x439fc3 JE 43a0ac |
(277) 0x439fc9 CMP $0x1,%RDI |
(277) 0x439fcd JE 43a085 |
(277) 0x439fd3 CMP $0x2,%RDI |
(277) 0x439fd7 JE 43a069 |
(277) 0x439fdd CMP $0x3,%RDI |
(277) 0x439fe1 JE 43a04d |
(277) 0x439fe3 CMP $0x4,%RDI |
(277) 0x439fe7 JE 43a031 |
(277) 0x439fe9 CMP $0x5,%RDI |
(277) 0x439fed JE 43a015 |
(277) 0x439fef CMP $0x6,%RDI |
(277) 0x439ff3 JNE 43a2d0 |
(277) 0x439ff9 VMOVUPD (%R13,%RAX,1),%YMM1 |
(277) 0x43a000 VMOVUPD %YMM1,(%R12,%RAX,1) |
(277) 0x43a006 VMOVUPD (%RBX,%RAX,1),%YMM2 |
(277) 0x43a00b VMOVUPD %YMM2,(%R8,%RAX,1) |
(277) 0x43a011 ADD $0x20,%RAX |
(277) 0x43a015 VMOVUPD (%R13,%RAX,1),%YMM0 |
(277) 0x43a01c VMOVUPD %YMM0,(%R12,%RAX,1) |
(277) 0x43a022 VMOVUPD (%RBX,%RAX,1),%YMM5 |
(277) 0x43a027 VMOVUPD %YMM5,(%R8,%RAX,1) |
(277) 0x43a02d ADD $0x20,%RAX |
(277) 0x43a031 VMOVUPD (%R13,%RAX,1),%YMM6 |
(277) 0x43a038 VMOVUPD %YMM6,(%R12,%RAX,1) |
(277) 0x43a03e VMOVUPD (%RBX,%RAX,1),%YMM7 |
(277) 0x43a043 VMOVUPD %YMM7,(%R8,%RAX,1) |
(277) 0x43a049 ADD $0x20,%RAX |
(277) 0x43a04d VMOVUPD (%R13,%RAX,1),%YMM8 |
(277) 0x43a054 VMOVUPD %YMM8,(%R12,%RAX,1) |
(277) 0x43a05a VMOVUPD (%RBX,%RAX,1),%YMM9 |
(277) 0x43a05f VMOVUPD %YMM9,(%R8,%RAX,1) |
(277) 0x43a065 ADD $0x20,%RAX |
(277) 0x43a069 VMOVUPD (%R13,%RAX,1),%YMM10 |
(277) 0x43a070 VMOVUPD %YMM10,(%R12,%RAX,1) |
(277) 0x43a076 VMOVUPD (%RBX,%RAX,1),%YMM11 |
(277) 0x43a07b VMOVUPD %YMM11,(%R8,%RAX,1) |
(277) 0x43a081 ADD $0x20,%RAX |
(277) 0x43a085 VMOVUPD (%R13,%RAX,1),%YMM12 |
(277) 0x43a08c VMOVUPD %YMM12,(%R12,%RAX,1) |
(277) 0x43a092 VMOVUPD (%RBX,%RAX,1),%YMM13 |
(277) 0x43a097 VMOVUPD %YMM13,(%R8,%RAX,1) |
(277) 0x43a09d ADD $0x20,%RAX |
(277) 0x43a0a1 CMP %RAX,0x78(%RSP) |
(277) 0x43a0a6 JE 43a1c2 |
(279) 0x43a0ac VMOVUPD (%R13,%RAX,1),%YMM14 |
(279) 0x43a0b3 VMOVUPD %YMM14,(%R12,%RAX,1) |
(279) 0x43a0b9 VMOVUPD (%RBX,%RAX,1),%YMM15 |
(279) 0x43a0be VMOVUPD %YMM15,(%R8,%RAX,1) |
(279) 0x43a0c4 VMOVUPD 0x20(%R13,%RAX,1),%YMM3 |
(279) 0x43a0cb VMOVUPD %YMM3,0x20(%R12,%RAX,1) |
(279) 0x43a0d2 VMOVUPD 0x20(%RBX,%RAX,1),%YMM4 |
(279) 0x43a0d8 VMOVUPD %YMM4,0x20(%R8,%RAX,1) |
(279) 0x43a0df VMOVUPD 0x40(%R13,%RAX,1),%YMM1 |
(279) 0x43a0e6 VMOVUPD %YMM1,0x40(%R12,%RAX,1) |
(279) 0x43a0ed VMOVUPD 0x40(%RBX,%RAX,1),%YMM2 |
(279) 0x43a0f3 VMOVUPD %YMM2,0x40(%R8,%RAX,1) |
(279) 0x43a0fa VMOVUPD 0x60(%R13,%RAX,1),%YMM0 |
(279) 0x43a101 VMOVUPD %YMM0,0x60(%R12,%RAX,1) |
(279) 0x43a108 VMOVUPD 0x60(%RBX,%RAX,1),%YMM5 |
(279) 0x43a10e VMOVUPD %YMM5,0x60(%R8,%RAX,1) |
(279) 0x43a115 VMOVUPD 0x80(%R13,%RAX,1),%YMM6 |
(279) 0x43a11f VMOVUPD %YMM6,0x80(%R12,%RAX,1) |
(279) 0x43a129 VMOVUPD 0x80(%RBX,%RAX,1),%YMM7 |
(279) 0x43a132 VMOVUPD %YMM7,0x80(%R8,%RAX,1) |
(279) 0x43a13c VMOVUPD 0xa0(%R13,%RAX,1),%YMM8 |
(279) 0x43a146 VMOVUPD %YMM8,0xa0(%R12,%RAX,1) |
(279) 0x43a150 VMOVUPD 0xa0(%RBX,%RAX,1),%YMM9 |
(279) 0x43a159 VMOVUPD %YMM9,0xa0(%R8,%RAX,1) |
(279) 0x43a163 VMOVUPD 0xc0(%R13,%RAX,1),%YMM10 |
(279) 0x43a16d VMOVUPD %YMM10,0xc0(%R12,%RAX,1) |
(279) 0x43a177 VMOVUPD 0xc0(%RBX,%RAX,1),%YMM11 |
(279) 0x43a180 VMOVUPD %YMM11,0xc0(%R8,%RAX,1) |
(279) 0x43a18a VMOVUPD 0xe0(%R13,%RAX,1),%YMM12 |
(279) 0x43a194 VMOVUPD %YMM12,0xe0(%R12,%RAX,1) |
(279) 0x43a19e VMOVUPD 0xe0(%RBX,%RAX,1),%YMM13 |
(279) 0x43a1a7 VMOVUPD %YMM13,0xe0(%R8,%RAX,1) |
(279) 0x43a1b1 ADD $0x100,%RAX |
(279) 0x43a1b7 CMP %RAX,0x78(%RSP) |
(279) 0x43a1bc JNE 43a0ac |
(277) 0x43a1c2 MOV 0x64(%RSP),%R13D |
(277) 0x43a1c7 TEST %R13D,%R13D |
(277) 0x43a1ca JE 43a25d |
(277) 0x43a1d0 MOV 0x3c(%RSP),%EDI |
(277) 0x43a1d4 MOV 0x38(%RSP),%EAX |
(277) 0x43a1d8 MOV 0x60(%RSP),%R12D |
(277) 0x43a1dd SUB %EDI,%R12D |
(277) 0x43a1e0 CMP %EDI,0x74(%RSP) |
(277) 0x43a1e4 JE 43a237 |
(277) 0x43a1e6 MOV 0x80(%RSP),%RBX |
(277) 0x43a1ee MOV 0x90(%RSP),%R8 |
(277) 0x43a1f6 MOV 0x88(%RSP),%R13 |
(277) 0x43a1fe ADD %RDI,%RBX |
(277) 0x43a201 ADD %RDI,%R8 |
(277) 0x43a204 VMOVUPD (%R15,%RBX,8),%XMM14 |
(277) 0x43a20a ADD %RDI,%R13 |
(277) 0x43a20d MOV 0x98(%RSP),%RBX |
(277) 0x43a215 VMOVUPD %XMM14,(%R11,%R8,8) |
(277) 0x43a21b ADD %RBX,%RDI |
(277) 0x43a21e VMOVUPD (%R10,%R13,8),%XMM15 |
(277) 0x43a224 VMOVUPD %XMM15,(%R9,%RDI,8) |
(277) 0x43a22a TEST $0x1,%R12B |
(277) 0x43a22e JE 43a25d |
(277) 0x43a230 AND $-0x2,%R12D |
(277) 0x43a234 ADD %R12D,%EAX |
(277) 0x43a237 CLTQ |
(277) 0x43a239 ADD %RAX,%RDX |
(277) 0x43a23c ADD %RAX,%RCX |
(277) 0x43a23f ADD %RAX,%RSI |
(277) 0x43a242 ADD %R14,%RAX |
(277) 0x43a245 VMOVSD (%R15,%RDX,8),%XMM3 |
(277) 0x43a24b VMOVSD %XMM3,(%R11,%RCX,8) |
(277) 0x43a251 VMOVSD (%R10,%RSI,8),%XMM4 |
(277) 0x43a257 VMOVSD %XMM4,(%R9,%RAX,8) |
(277) 0x43a25d INCL 0x70(%RSP) |
(277) 0x43a261 MOV 0x40(%RSP),%RDX |
(277) 0x43a266 MOV 0x48(%RSP),%RCX |
(277) 0x43a26b MOV 0x50(%RSP),%R14 |
(277) 0x43a270 MOV 0x58(%RSP),%RDI |
(277) 0x43a275 ADD %RDX,0x80(%RSP) |
(277) 0x43a27d MOV $0x1,%EDX |
(277) 0x43a282 ADD %RCX,0x90(%RSP) |
(277) 0x43a28a MOV 0x70(%RSP),%ESI |
(277) 0x43a28e ADD %R14,0x88(%RSP) |
(277) 0x43a296 ADD %RDI,0x98(%RSP) |
(277) 0x43a29e CMP %ESI,0x2c(%RSP) |
(277) 0x43a2a2 JLE 43a2ad |
(277) 0x43a2a4 MOV 0x30(%RSP),%ECX |
(277) 0x43a2a8 JMP 439f43 |
0x43a2ad MOV 0x10(%RSP),%R15 |
0x43a2b2 MOV 0x30(%RSP),%R9D |
0x43a2b7 MOV %R9D,0x80(%R15) |
0x43a2be VZEROUPPER |
0x43a2c1 LEA -0x28(%RBP),%RSP |
0x43a2c5 POP %RBX |
0x43a2c6 POP %R12 |
0x43a2c8 POP %R13 |
0x43a2ca POP %R14 |
0x43a2cc POP %R15 |
0x43a2ce POP %RBP |
0x43a2cf RET |
(277) 0x43a2d0 VMOVUPD (%R13),%YMM3 |
(277) 0x43a2d6 MOV $0x20,%EAX |
(277) 0x43a2db VMOVUPD %YMM3,(%R12) |
(277) 0x43a2e1 VMOVUPD (%RBX),%YMM4 |
(277) 0x43a2e5 VMOVUPD %YMM4,(%R8) |
(277) 0x43a2ea JMP 439ff9 |
0x43a2ef NOP |
(277) 0x43a2f0 MOV 0x34(%RSP),%EAX |
(277) 0x43a2f4 XOR %EDI,%EDI |
(277) 0x43a2f6 JMP 43a1d8 |
0x43a2fb INC %EAX |
0x43a2fd XOR %EDX,%EDX |
0x43a2ff JMP 439e40 |
(277) 0x43a304 MOV 0x70(%RSP),%EAX |
(277) 0x43a308 MOV 0x2c(%RSP),%ESI |
(277) 0x43a30c MOV 0x30(%RSP),%R8D |
(277) 0x43a311 NOT %EAX |
(277) 0x43a313 ADD %ESI,%EAX |
(277) 0x43a315 AND $0x7,%EAX |
(277) 0x43a318 CMP %R8D,0x24(%RSP) |
(277) 0x43a31d JE 43a25d |
(277) 0x43a323 MOV 0x50(%RSP),%R14 |
(277) 0x43a328 INCL 0x70(%RSP) |
(277) 0x43a32c MOV 0x48(%RSP),%R12 |
(277) 0x43a331 MOV 0x58(%RSP),%RDI |
(277) 0x43a336 ADD %R14,0x88(%RSP) |
(277) 0x43a33e MOV 0x40(%RSP),%R13 |
(277) 0x43a343 ADD %R12,0x90(%RSP) |
(277) 0x43a34b ADD %RDI,0x98(%RSP) |
(277) 0x43a353 MOV 0x70(%RSP),%ESI |
(277) 0x43a357 ADD %R13,0x80(%RSP) |
(277) 0x43a35f MOV 0x88(%RSP),%R14 |
(277) 0x43a367 MOV 0x90(%RSP),%RBX |
(277) 0x43a36f MOV 0x98(%RSP),%R8 |
(277) 0x43a377 CMP %ESI,0x2c(%RSP) |
(277) 0x43a37b JLE 43a63c |
(277) 0x43a381 TEST %EAX,%EAX |
(277) 0x43a383 JE 43a662 |
(277) 0x43a389 CMP $0x1,%EAX |
(277) 0x43a38c JE 43a568 |
(277) 0x43a392 CMP $0x2,%EAX |
(277) 0x43a395 JE 43a520 |
(277) 0x43a39b CMP $0x3,%EAX |
(277) 0x43a39e JE 43a4d8 |
(277) 0x43a3a4 CMP $0x4,%EAX |
(277) 0x43a3a7 JE 43a490 |
(277) 0x43a3ad CMP $0x5,%EAX |
(277) 0x43a3b0 JE 43a44a |
(277) 0x43a3b6 CMP $0x6,%EAX |
(277) 0x43a3b9 JE 43a402 |
(277) 0x43a3bb MOV 0x30(%RSP),%EAX |
(277) 0x43a3bf CMP %EAX,0x24(%RSP) |
(277) 0x43a3c3 JE 43a25d |
(277) 0x43a3c9 INC %ESI |
(277) 0x43a3cb ADD %R13,0x80(%RSP) |
(277) 0x43a3d3 MOV 0x58(%RSP),%R13 |
(277) 0x43a3d8 ADD %R12,%RBX |
(277) 0x43a3db MOV %ESI,0x70(%RSP) |
(277) 0x43a3df MOV 0x50(%RSP),%RSI |
(277) 0x43a3e4 ADD %R13,%R8 |
(277) 0x43a3e7 MOV %RBX,0x90(%RSP) |
(277) 0x43a3ef ADD %RSI,%R14 |
(277) 0x43a3f2 MOV %R8,0x98(%RSP) |
(277) 0x43a3fa MOV %R14,0x88(%RSP) |
(277) 0x43a402 MOV 0x30(%RSP),%R12D |
(277) 0x43a407 CMP %R12D,0x24(%RSP) |
(277) 0x43a40c JE 43a25d |
(277) 0x43a412 MOV 0x40(%RSP),%RBX |
(277) 0x43a417 MOV 0x48(%RSP),%R14 |
(277) 0x43a41c MOV 0x50(%RSP),%RDI |
(277) 0x43a421 MOV 0x58(%RSP),%R8 |
(277) 0x43a426 INCL 0x70(%RSP) |
(277) 0x43a42a ADD %RBX,0x80(%RSP) |
(277) 0x43a432 ADD %R14,0x90(%RSP) |
(277) 0x43a43a ADD %RDI,0x88(%RSP) |
(277) 0x43a442 ADD %R8,0x98(%RSP) |
(277) 0x43a44a MOV 0x30(%RSP),%EAX |
(277) 0x43a44e CMP %EAX,0x24(%RSP) |
(277) 0x43a452 JE 43a25d |
(277) 0x43a458 MOV 0x40(%RSP),%RSI |
(277) 0x43a45d MOV 0x48(%RSP),%R13 |
(277) 0x43a462 MOV 0x50(%RSP),%R12 |
(277) 0x43a467 MOV 0x58(%RSP),%RBX |
(277) 0x43a46c INCL 0x70(%RSP) |
(277) 0x43a470 ADD %RSI,0x80(%RSP) |
(277) 0x43a478 ADD %R13,0x90(%RSP) |
(277) 0x43a480 ADD %R12,0x88(%RSP) |
(277) 0x43a488 ADD %RBX,0x98(%RSP) |
(277) 0x43a490 MOV 0x30(%RSP),%R14D |
(277) 0x43a495 CMP %R14D,0x24(%RSP) |
(277) 0x43a49a JE 43a25d |
(277) 0x43a4a0 MOV 0x40(%RSP),%RDI |
(277) 0x43a4a5 MOV 0x48(%RSP),%R8 |
(277) 0x43a4aa MOV 0x50(%RSP),%RAX |
(277) 0x43a4af MOV 0x58(%RSP),%RSI |
(277) 0x43a4b4 INCL 0x70(%RSP) |
(277) 0x43a4b8 ADD %RDI,0x80(%RSP) |
(277) 0x43a4c0 ADD %R8,0x90(%RSP) |
(277) 0x43a4c8 ADD %RAX,0x88(%RSP) |
(277) 0x43a4d0 ADD %RSI,0x98(%RSP) |
(277) 0x43a4d8 MOV 0x30(%RSP),%R13D |
(277) 0x43a4dd CMP %R13D,0x24(%RSP) |
(277) 0x43a4e2 JE 43a25d |
(277) 0x43a4e8 MOV 0x40(%RSP),%R12 |
(277) 0x43a4ed MOV 0x48(%RSP),%RBX |
(277) 0x43a4f2 MOV 0x50(%RSP),%R14 |
(277) 0x43a4f7 MOV 0x58(%RSP),%RDI |
(277) 0x43a4fc INCL 0x70(%RSP) |
(277) 0x43a500 ADD %R12,0x80(%RSP) |
(277) 0x43a508 ADD %RBX,0x90(%RSP) |
(277) 0x43a510 ADD %R14,0x88(%RSP) |
(277) 0x43a518 ADD %RDI,0x98(%RSP) |
(277) 0x43a520 MOV 0x30(%RSP),%R8D |
(277) 0x43a525 CMP %R8D,0x24(%RSP) |
(277) 0x43a52a JE 43a25d |
(277) 0x43a530 MOV 0x40(%RSP),%RAX |
(277) 0x43a535 MOV 0x48(%RSP),%RSI |
(277) 0x43a53a MOV 0x50(%RSP),%R13 |
(277) 0x43a53f MOV 0x58(%RSP),%R12 |
(277) 0x43a544 INCL 0x70(%RSP) |
(277) 0x43a548 ADD %RAX,0x80(%RSP) |
(277) 0x43a550 ADD %RSI,0x90(%RSP) |
(277) 0x43a558 ADD %R13,0x88(%RSP) |
(277) 0x43a560 ADD %R12,0x98(%RSP) |
(277) 0x43a568 MOV 0x30(%RSP),%EBX |
(277) 0x43a56c CMP %EBX,0x24(%RSP) |
(277) 0x43a570 JE 43a25d |
(277) 0x43a576 INCL 0x70(%RSP) |
(277) 0x43a57a MOV 0x40(%RSP),%R14 |
(277) 0x43a57f MOV 0x48(%RSP),%RDI |
(277) 0x43a584 MOV 0x50(%RSP),%R8 |
(277) 0x43a589 MOV 0x58(%RSP),%RSI |
(277) 0x43a58e ADD %R14,0x80(%RSP) |
(277) 0x43a596 ADD %RDI,0x90(%RSP) |
(277) 0x43a59e MOV 0x70(%RSP),%EAX |
(277) 0x43a5a2 ADD %R8,0x88(%RSP) |
(277) 0x43a5aa ADD %RSI,0x98(%RSP) |
(277) 0x43a5b2 CMP %EAX,0x2c(%RSP) |
(277) 0x43a5b6 JLE 43a63c |
(277) 0x43a5bc MOV %RSI,%R12 |
(277) 0x43a5bf MOV 0x50(%RSP),%R13 |
(277) 0x43a5c4 MOV 0x48(%RSP),%R14 |
(277) 0x43a5c9 MOV %R15,0x18(%RSP) |
(277) 0x43a5ce MOV 0x90(%RSP),%RSI |
(277) 0x43a5d6 MOV 0x40(%RSP),%R15 |
(277) 0x43a5db MOV %ECX,0x70(%RSP) |
(277) 0x43a5df MOV 0x98(%RSP),%RDI |
(277) 0x43a5e7 MOV 0x30(%RSP),%ECX |
(277) 0x43a5eb MOV 0x88(%RSP),%R8 |
(277) 0x43a5f3 MOV 0x80(%RSP),%RBX |
(278) 0x43a5fb CMP %ECX,0x24(%RSP) |
(278) 0x43a5ff JE 43a6a3 |
(278) 0x43a605 ADD $0x8,%EAX |
(278) 0x43a608 LEA (%RBX,%R15,8),%RBX |
(278) 0x43a60c LEA (%RSI,%R14,8),%RSI |
(278) 0x43a610 LEA (%R8,%R13,8),%R8 |
(278) 0x43a614 LEA (%RDI,%R12,8),%RDI |
(278) 0x43a618 CMP %EAX,0x2c(%RSP) |
(278) 0x43a61c JG 43a5fb |
0x43a61e MOV 0x70(%RSP),%EAX |
0x43a622 MOV 0x10(%RSP),%R15 |
0x43a627 MOV %EAX,0x18(%RSP) |
0x43a62b TEST %DL,%DL |
0x43a62d JE 43a650 |
0x43a62f MOV 0x18(%RSP),%EDX |
0x43a633 MOV %EDX,0x30(%RSP) |
0x43a637 JMP 43a2b2 |
0x43a63c MOV %ECX,0x18(%RSP) |
0x43a640 MOV 0x10(%RSP),%R15 |
0x43a645 JMP 43a62b |
0x43a647 NOPW (%RAX,%RAX,1) |
0x43a650 VZEROUPPER |
0x43a653 LEA -0x28(%RBP),%RSP |
0x43a657 POP %RBX |
0x43a658 POP %R12 |
0x43a65a POP %R13 |
0x43a65c POP %R14 |
0x43a65e POP %R15 |
0x43a660 POP %RBP |
0x43a661 RET |
(277) 0x43a662 MOV %R15,0x18(%RSP) |
(277) 0x43a667 MOV %ESI,%EAX |
(277) 0x43a669 MOV %RDI,%R12 |
(277) 0x43a66c MOV %R14,%R8 |
(277) 0x43a66f MOV 0x50(%RSP),%R13 |
(277) 0x43a674 MOV 0x48(%RSP),%R14 |
(277) 0x43a679 MOV %ECX,0x70(%RSP) |
(277) 0x43a67d MOV 0x40(%RSP),%R15 |
(277) 0x43a682 MOV 0x30(%RSP),%ECX |
(277) 0x43a686 MOV 0x90(%RSP),%RSI |
(277) 0x43a68e MOV 0x98(%RSP),%RDI |
(277) 0x43a696 MOV 0x80(%RSP),%RBX |
(277) 0x43a69e JMP 43a5fb |
(277) 0x43a6a3 MOV %EAX,0x70(%RSP) |
(277) 0x43a6a7 MOV 0x18(%RSP),%R15 |
(277) 0x43a6ac MOV %RSI,0x90(%RSP) |
(277) 0x43a6b4 MOV %RDI,0x98(%RSP) |
(277) 0x43a6bc MOV %R8,0x88(%RSP) |
(277) 0x43a6c4 MOV %RBX,0x80(%RSP) |
(277) 0x43a6cc JMP 43a25d |
0x43a6d1 NOPW %CS:(%RAX,%RAX,1) |
0x43a6dc NOPL (%RAX) |
Path / |
Source file and lines | revert_kernel.f90:41-48 |
Module | exec |
nb instructions | 144 |
nb uops | 151 |
loop length | 531 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 24 |
micro-operation queue | 25.17 cycles |
front end | 25.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 9.10 | 9.00 | 15.67 | 15.67 | 18.00 | 9.07 | 8.90 | 18.00 | 18.00 | 18.00 | 8.93 | 15.67 |
cycles | 9.10 | 13.73 | 15.67 | 15.67 | 18.00 | 9.07 | 8.90 | 18.00 | 18.00 | 18.00 | 8.93 | 15.67 |
Cycles executing div or sqrt instructions | 6.00 |
FE+BE cycles | 24.54 |
Stall cycles | 0.00 |
Front-end | 25.17 |
Dispatch | 18.00 |
DIV/SQRT | 6.00 |
Overall L1 | 25.17 |
all | 4% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 22% |
all | 10% |
load | 12% |
store | 9% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x20,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0xa0,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x70(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x60(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RDI),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RDI),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x68(%RDI),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RDI),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RDI),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RBX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R8),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 402080 <@plt_start@+0x60> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 402180 <@plt_start@+0x160> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x98(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x18(%RDI),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R10),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R15D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
CMP %EDX,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 43a2fb <__revert_kernel_module_MOD_revert_kernel._omp_fn.0.lto_priv.0+0x54b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %EAX,%R9D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R9D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 43a2c1 <__revert_kernel_module_MOD_revert_kernel._omp_fn.0.lto_priv.0+0x511> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%RDI),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RBX,%R9,1),%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x8(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RDI),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RDI),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x2c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD %EDX,%RAX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOVSXD (%R11),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EDX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RDI),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD %RBX,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RBX,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EBX,0x34(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RAX,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %RSI,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x1(%RCX),%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %ECX,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RDI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RAX,%RBX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R8D,0x24(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R14,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ECX,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %ESI,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R13,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x50(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %ECX,0x74(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RSI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RBX,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %ECX,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %RAX,%R13 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %ECX,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R12,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x58(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R12,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %ECX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x2,%EAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %ECX,0x3c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %ESI,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SAL $0x5,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
CMP %R14D,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ECX,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RSP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMOVLE %R8D,%ESI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
AND $0x3,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RAX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EBX,0x64(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %ESI,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RSP),%R9D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9D,0x80(%R15) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 439e40 <__revert_kernel_module_MOD_revert_kernel._omp_fn.0.lto_priv.0+0x90> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV 0x70(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %DL,%DL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 43a650 <__revert_kernel_module_MOD_revert_kernel._omp_fn.0.lto_priv.0+0x8a0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x18(%RSP),%EDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EDX,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 43a2b2 <__revert_kernel_module_MOD_revert_kernel._omp_fn.0.lto_priv.0+0x502> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV %ECX,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 43a62b <__revert_kernel_module_MOD_revert_kernel._omp_fn.0.lto_priv.0+0x87b> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | revert_kernel.f90:41-48 |
Module | exec |
nb instructions | 144 |
nb uops | 151 |
loop length | 531 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 24 |
micro-operation queue | 25.17 cycles |
front end | 25.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 9.10 | 9.00 | 15.67 | 15.67 | 18.00 | 9.07 | 8.90 | 18.00 | 18.00 | 18.00 | 8.93 | 15.67 |
cycles | 9.10 | 13.73 | 15.67 | 15.67 | 18.00 | 9.07 | 8.90 | 18.00 | 18.00 | 18.00 | 8.93 | 15.67 |
Cycles executing div or sqrt instructions | 6.00 |
FE+BE cycles | 24.54 |
Stall cycles | 0.00 |
Front-end | 25.17 |
Dispatch | 18.00 |
DIV/SQRT | 6.00 |
Overall L1 | 25.17 |
all | 4% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 22% |
all | 10% |
load | 12% |
store | 9% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x20,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0xa0,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x70(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x60(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RDI),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RDI),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x68(%RDI),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RDI),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RDI),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RBX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R8),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 402080 <@plt_start@+0x60> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 402180 <@plt_start@+0x160> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x98(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x18(%RDI),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R10),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R15D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
CMP %EDX,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 43a2fb <__revert_kernel_module_MOD_revert_kernel._omp_fn.0.lto_priv.0+0x54b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %EAX,%R9D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R9D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 43a2c1 <__revert_kernel_module_MOD_revert_kernel._omp_fn.0.lto_priv.0+0x511> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%RDI),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RBX,%R9,1),%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x8(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RDI),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RDI),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x2c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD %EDX,%RAX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOVSXD (%R11),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EDX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RDI),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD %RBX,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RBX,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EBX,0x34(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RAX,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %RSI,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x1(%RCX),%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %ECX,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RDI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RAX,%RBX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R8D,0x24(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R14,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ECX,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %ESI,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R13,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x50(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %ECX,0x74(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RSI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RBX,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %ECX,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %RAX,%R13 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %ECX,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R12,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x58(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R12,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %ECX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x2,%EAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %ECX,0x3c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %ESI,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SAL $0x5,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
CMP %R14D,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ECX,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RSP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMOVLE %R8D,%ESI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
AND $0x3,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RAX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EBX,0x64(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %ESI,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RSP),%R9D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9D,0x80(%R15) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 439e40 <__revert_kernel_module_MOD_revert_kernel._omp_fn.0.lto_priv.0+0x90> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV 0x70(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %DL,%DL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 43a650 <__revert_kernel_module_MOD_revert_kernel._omp_fn.0.lto_priv.0+0x8a0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x18(%RSP),%EDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EDX,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 43a2b2 <__revert_kernel_module_MOD_revert_kernel._omp_fn.0.lto_priv.0+0x502> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV %ECX,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 43a62b <__revert_kernel_module_MOD_revert_kernel._omp_fn.0.lto_priv.0+0x87b> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼__revert_kernel_module_MOD_revert_kernel._omp_fn.0.lto_priv.0– | 1.86 | 0.67 |
▼Loop 277 - revert_kernel.f90:41-48 - exec– | 0 | 0 |
○Loop 279 - revert_kernel.f90:47-48 - exec | 1.85 | 0.61 |
○Loop 278 - revert_kernel.f90:43-43 - exec | 0 | 0 |