Function: __pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0 | Module: exec | Source: pack_kernel.f90:61-66 | Coverage: 0.03% |
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Function: __pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0 | Module: exec | Source: pack_kernel.f90:61-66 | Coverage: 0.03% |
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/scratch_na/users/xoserete/qaas_runs/171-214-9740/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/pack_kernel.f90: 61 - 66 |
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61: !$OMP PARALLEL DO PRIVATE(index) |
62: DO k=y_min-depth,y_max+y_inc+depth |
63: !$OMP SIMD |
64: DO j=1,depth |
65: index= buffer_offset + j+(k+depth-1)*depth |
66: left_snd_buffer(index)=field(x_min+x_inc-1+j,k) |
0x434970 PUSH %RBP |
0x434971 MOV %RSP,%RBP |
0x434974 PUSH %R15 |
0x434976 PUSH %R14 |
0x434978 PUSH %R13 |
0x43497a PUSH %R12 |
0x43497c PUSH %RBX |
0x43497d AND $-0x20,%RSP |
0x434981 SUB $0xc0,%RSP |
0x434988 MOV 0x30(%RDI),%RDX |
0x43498c MOV 0x58(%RDI),%ESI |
0x43498f MOV %RDI,0xb8(%RSP) |
0x434997 MOV 0x54(%RDI),%EAX |
0x43499a MOV 0x28(%RDI),%RCX |
0x43499e MOV 0x48(%RDI),%RBX |
0x4349a2 MOV 0x40(%RDI),%R15 |
0x4349a6 MOV %RDX,0xa8(%RSP) |
0x4349ae MOV 0x20(%RDI),%R13 |
0x4349b2 MOV %ESI,0xb0(%RSP) |
0x4349b9 MOV %RCX,0xa0(%RSP) |
0x4349c1 MOV %EAX,0x9c(%RSP) |
0x4349c8 CALL 402080 <@plt_start@+0x60> |
0x4349cd MOV %EAX,%R14D |
0x4349d0 CALL 402180 <@plt_start@+0x160> |
0x4349d5 MOV 0xb8(%RSP),%R9 |
0x4349dd MOV 0xb0(%RSP),%R8D |
0x4349e5 MOV %EAX,%EDI |
0x4349e7 MOV 0x5c(%R9),%EAX |
0x4349eb INC %EAX |
0x4349ed SUB %R8D,%EAX |
0x4349f0 CLTD |
0x4349f1 IDIV %R14D |
0x4349f4 CMP %EDX,%EDI |
0x4349f6 JL 434db8 |
0x4349fc IMUL %EAX,%EDI |
0x4349ff ADD %EDX,%EDI |
0x434a01 ADD %EDI,%EAX |
0x434a03 CMP %EAX,%EDI |
0x434a05 JGE 434d56 |
0x434a0b ADD %R8D,%EAX |
0x434a0e CMP $0x1,%R13 |
0x434a12 MOV (%R9),%RSI |
0x434a15 MOV 0x8(%R9),%R10 |
0x434a19 SETNE %CL |
0x434a1c CMP $0x1,%R15 |
0x434a20 MOV 0x10(%R9),%R11 |
0x434a24 LEA (%R8,%RDI,1),%R12D |
0x434a28 SETNE %R14B |
0x434a2c MOV (%R10),%R8D |
0x434a2f MOV 0x38(%R9),%RDI |
0x434a33 MOV %RSI,0x88(%RSP) |
0x434a3b OR %R14B,%CL |
0x434a3e MOV %EAX,0x98(%RSP) |
0x434a45 MOV 0x18(%R9),%RSI |
0x434a49 MOV %R11,0x90(%RSP) |
0x434a51 MOV %CL,0x6f(%RSP) |
0x434a55 JNE 434dc1 |
0x434a5b MOV 0xa0(%RSP),%R15 |
0x434a63 MOVSXD %R12D,%R10 |
0x434a66 MOV 0xa8(%RSP),%R13 |
0x434a6e LEA -0x1(%R8),%EDX |
0x434a72 MOV %R8D,%EAX |
0x434a75 MOV %R8D,%R14D |
0x434a78 LEA (%R12,%RDX,1),%R11D |
0x434a7c XOR %ECX,%ECX |
0x434a7e IMUL %R15,%R10 |
0x434a82 AND $-0x4,%R14D |
0x434a86 SHR $0x2,%EAX |
0x434a89 MOVSXD 0x9c(%RSP),%R15 |
0x434a91 SAL $0x5,%RAX |
0x434a95 IMUL %R8D,%R11D |
0x434a99 MOV %R14D,0x80(%RSP) |
0x434aa1 INC %R14D |
0x434aa4 MOV %EDX,0x84(%RSP) |
0x434aab ADD %R13,%R10 |
0x434aae TEST %R8D,%R8D |
0x434ab1 LEA 0x1(%RBX),%R13 |
0x434ab5 MOV %RAX,0xa8(%RSP) |
0x434abd CMOVNS %R8D,%ECX |
0x434ac1 MOV %R14D,0x70(%RSP) |
0x434ac6 MOV %R15,0xb0(%RSP) |
0x434ace INC %ECX |
0x434ad0 MOV %R13,0x78(%RSP) |
0x434ad5 MOV %ECX,0x68(%RSP) |
0x434ad9 MOV %R9,0x58(%RSP) |
0x434ade XCHG %AX,%AX |
(240) 0x434ae0 TEST %R8D,%R8D |
(240) 0x434ae3 JLE 434d23 |
(240) 0x434ae9 MOV 0x88(%RSP),%RDX |
(240) 0x434af1 MOV 0x90(%RSP),%R9 |
(240) 0x434af9 MOV 0x9c(%RSP),%EAX |
(240) 0x434b00 CMPL $0x2,0x84(%RSP) |
(240) 0x434b08 MOVSXD (%RDX),%R15 |
(240) 0x434b0b MOV (%R9),%R14D |
(240) 0x434b0e LEA -0x1(%RAX,%R15,1),%EDX |
(240) 0x434b13 JBE 434dac |
(240) 0x434b19 MOV 0xb0(%RSP),%R9 |
(240) 0x434b21 MOVSXD %R15D,%R13 |
(240) 0x434b24 MOVSXD %R14D,%RCX |
(240) 0x434b27 ADD %R9,%R13 |
(240) 0x434b2a MOVSXD %R11D,%R9 |
(240) 0x434b2d ADD %R10,%R13 |
(240) 0x434b30 LEA (%RSI,%R13,8),%RAX |
(240) 0x434b34 MOV 0x78(%RSP),%R13 |
(240) 0x434b39 ADD %R13,%RCX |
(240) 0x434b3c ADD %R9,%RCX |
(240) 0x434b3f MOV 0xa8(%RSP),%R9 |
(240) 0x434b47 LEA (%RDI,%RCX,8),%R13 |
(240) 0x434b4b XOR %ECX,%ECX |
(240) 0x434b4d SUB $0x20,%R9 |
(240) 0x434b51 SHR $0x5,%R9 |
(240) 0x434b55 INC %R9 |
(240) 0x434b58 AND $0x7,%R9D |
(240) 0x434b5c JE 434c06 |
(240) 0x434b62 CMP $0x1,%R9 |
(240) 0x434b66 JE 434be5 |
(240) 0x434b68 CMP $0x2,%R9 |
(240) 0x434b6c JE 434bd5 |
(240) 0x434b6e CMP $0x3,%R9 |
(240) 0x434b72 JE 434bc5 |
(240) 0x434b74 CMP $0x4,%R9 |
(240) 0x434b78 JE 434bb5 |
(240) 0x434b7a CMP $0x5,%R9 |
(240) 0x434b7e JE 434ba5 |
(240) 0x434b80 CMP $0x6,%R9 |
(240) 0x434b84 JE 434b95 |
(240) 0x434b86 VMOVUPD (%RAX),%YMM15 |
(240) 0x434b8a MOV $0x20,%ECX |
(240) 0x434b8f VMOVUPD %YMM15,(%R13) |
(240) 0x434b95 VMOVUPD (%RAX,%RCX,1),%YMM3 |
(240) 0x434b9a VMOVUPD %YMM3,(%R13,%RCX,1) |
(240) 0x434ba1 ADD $0x20,%RCX |
(240) 0x434ba5 VMOVUPD (%RAX,%RCX,1),%YMM2 |
(240) 0x434baa VMOVUPD %YMM2,(%R13,%RCX,1) |
(240) 0x434bb1 ADD $0x20,%RCX |
(240) 0x434bb5 VMOVUPD (%RAX,%RCX,1),%YMM1 |
(240) 0x434bba VMOVUPD %YMM1,(%R13,%RCX,1) |
(240) 0x434bc1 ADD $0x20,%RCX |
(240) 0x434bc5 VMOVUPD (%RAX,%RCX,1),%YMM0 |
(240) 0x434bca VMOVUPD %YMM0,(%R13,%RCX,1) |
(240) 0x434bd1 ADD $0x20,%RCX |
(240) 0x434bd5 VMOVUPD (%RAX,%RCX,1),%YMM4 |
(240) 0x434bda VMOVUPD %YMM4,(%R13,%RCX,1) |
(240) 0x434be1 ADD $0x20,%RCX |
(240) 0x434be5 VMOVUPD (%RAX,%RCX,1),%YMM5 |
(240) 0x434bea MOV 0xa8(%RSP),%R9 |
(240) 0x434bf2 VMOVUPD %YMM5,(%R13,%RCX,1) |
(240) 0x434bf9 ADD $0x20,%RCX |
(240) 0x434bfd CMP %R9,%RCX |
(240) 0x434c00 JE 434c9d |
(241) 0x434c06 VMOVUPD (%RAX,%RCX,1),%YMM6 |
(241) 0x434c0b MOV 0xa8(%RSP),%R9 |
(241) 0x434c13 VMOVUPD %YMM6,(%R13,%RCX,1) |
(241) 0x434c1a VMOVUPD 0x20(%RAX,%RCX,1),%YMM7 |
(241) 0x434c20 VMOVUPD %YMM7,0x20(%R13,%RCX,1) |
(241) 0x434c27 VMOVUPD 0x40(%RAX,%RCX,1),%YMM8 |
(241) 0x434c2d VMOVUPD %YMM8,0x40(%R13,%RCX,1) |
(241) 0x434c34 VMOVUPD 0x60(%RAX,%RCX,1),%YMM9 |
(241) 0x434c3a VMOVUPD %YMM9,0x60(%R13,%RCX,1) |
(241) 0x434c41 VMOVUPD 0x80(%RAX,%RCX,1),%YMM10 |
(241) 0x434c4a VMOVUPD %YMM10,0x80(%R13,%RCX,1) |
(241) 0x434c54 VMOVUPD 0xa0(%RAX,%RCX,1),%YMM11 |
(241) 0x434c5d VMOVUPD %YMM11,0xa0(%R13,%RCX,1) |
(241) 0x434c67 VMOVUPD 0xc0(%RAX,%RCX,1),%YMM12 |
(241) 0x434c70 VMOVUPD %YMM12,0xc0(%R13,%RCX,1) |
(241) 0x434c7a VMOVUPD 0xe0(%RAX,%RCX,1),%YMM13 |
(241) 0x434c83 VMOVUPD %YMM13,0xe0(%R13,%RCX,1) |
(241) 0x434c8d ADD $0x100,%RCX |
(241) 0x434c94 CMP %R9,%RCX |
(241) 0x434c97 JNE 434c06 |
(240) 0x434c9d MOV 0x80(%RSP),%EAX |
(240) 0x434ca4 CMP %R8D,%EAX |
(240) 0x434ca7 JE 434d23 |
(240) 0x434ca9 MOV %EAX,%ECX |
(240) 0x434cab MOV 0x70(%RSP),%EAX |
(240) 0x434caf MOV %R8D,%R13D |
(240) 0x434cb2 SUB %ECX,%R13D |
(240) 0x434cb5 CMP $0x1,%R13D |
(240) 0x434cb9 JE 434d06 |
(240) 0x434cbb MOV %R15,0xb8(%RSP) |
(240) 0x434cc3 MOV 0xb0(%RSP),%R15 |
(240) 0x434ccb LEA (%RCX,%R10,1),%R9 |
(240) 0x434ccf ADD %RBX,%RCX |
(240) 0x434cd2 ADD %R15,%R9 |
(240) 0x434cd5 MOV 0xb8(%RSP),%R15 |
(240) 0x434cdd ADD %R15,%R9 |
(240) 0x434ce0 MOVSXD %R11D,%R15 |
(240) 0x434ce3 VMOVUPD (%RSI,%R9,8),%XMM14 |
(240) 0x434ce9 MOVSXD %R14D,%R9 |
(240) 0x434cec ADD %RCX,%R9 |
(240) 0x434cef LEA 0x1(%R15,%R9,1),%RCX |
(240) 0x434cf4 VMOVUPD %XMM14,(%RDI,%RCX,8) |
(240) 0x434cf9 TEST $0x1,%R13B |
(240) 0x434cfd JE 434d23 |
(240) 0x434cff AND $-0x2,%R13D |
(240) 0x434d03 ADD %R13D,%EAX |
(240) 0x434d06 ADD %EAX,%EDX |
(240) 0x434d08 ADD %R14D,%EAX |
(240) 0x434d0b MOVSXD %EDX,%RDX |
(240) 0x434d0e ADD %R11D,%EAX |
(240) 0x434d11 ADD %R10,%RDX |
(240) 0x434d14 CLTQ |
(240) 0x434d16 VMOVSD (%RSI,%RDX,8),%XMM15 |
(240) 0x434d1b ADD %RBX,%RAX |
(240) 0x434d1e VMOVSD %XMM15,(%RDI,%RAX,8) |
(240) 0x434d23 MOV 0xa0(%RSP),%R14 |
(240) 0x434d2b INC %R12D |
(240) 0x434d2e ADD %R8D,%R11D |
(240) 0x434d31 ADD %R14,%R10 |
(240) 0x434d34 TEST %R8D,%R8D |
(240) 0x434d37 JNS 434d90 |
(240) 0x434d39 CMP %R12D,0x98(%RSP) |
(240) 0x434d41 JG 434ae0 |
0x434d47 MOV 0x58(%RSP),%RBX |
0x434d4c VZEROUPPER |
0x434d4f CMPB $0,0x6f(%RSP) |
0x434d54 JNE 434d77 |
0x434d56 LEA -0x28(%RBP),%RSP |
0x434d5a POP %RBX |
0x434d5b POP %R12 |
0x434d5d POP %R13 |
0x434d5f POP %R14 |
0x434d61 POP %R15 |
0x434d63 POP %RBP |
0x434d64 RET |
0x434d65 MOV 0x58(%RSP),%RBX |
0x434d6a VZEROUPPER |
0x434d6d MOV 0x68(%RSP),%R12D |
0x434d72 MOV %R12D,0x64(%RSP) |
0x434d77 MOV 0x64(%RSP),%R8D |
0x434d7c MOV %R8D,0x50(%RBX) |
0x434d80 LEA -0x28(%RBP),%RSP |
0x434d84 POP %RBX |
0x434d85 POP %R12 |
0x434d87 POP %R13 |
0x434d89 POP %R14 |
0x434d8b POP %R15 |
0x434d8d POP %RBP |
0x434d8e RET |
0x434d8f NOP |
(240) 0x434d90 CMP %R12D,0x98(%RSP) |
(240) 0x434d98 JLE 434d65 |
(240) 0x434d9a MOV 0x68(%RSP),%EAX |
(240) 0x434d9e MOVB $0x1,0x6f(%RSP) |
(240) 0x434da3 MOV %EAX,0x64(%RSP) |
(240) 0x434da7 JMP 434ae0 |
(240) 0x434dac XOR %ECX,%ECX |
(240) 0x434dae MOV $0x1,%EAX |
(240) 0x434db3 JMP 434caf |
0x434db8 INC %EAX |
0x434dba XOR %EDX,%EDX |
0x434dbc JMP 4349fc |
0x434dc1 MOV 0xa0(%RSP),%RDX |
0x434dc9 MOVSXD %R12D,%RAX |
0x434dcc MOV 0xa8(%RSP),%R10 |
0x434dd4 MOV %R8D,%R11D |
0x434dd7 KXORB %K0,%K0,%K0 |
0x434ddb SHR $0x2,%R11D |
0x434ddf LEA -0x1(%R8),%ECX |
0x434de3 MOV %R13,%R14 |
0x434de6 MOV %R9,0x10(%RSP) |
0x434deb IMUL %RDX,%RAX |
0x434def MOV %R15,%RDX |
0x434df2 MOV %R11D,0x80(%RSP) |
0x434dfa LEA (,%R15,8),%R11 |
0x434e02 SAL $0x5,%RDX |
0x434e06 MOV %ECX,0x60(%RSP) |
0x434e0a ADD %R12D,%ECX |
0x434e0d SAL $0x5,%R14 |
0x434e11 MOV %RDX,0x70(%RSP) |
0x434e16 MOV %R15,%RDX |
0x434e19 IMUL %R8D,%ECX |
0x434e1d ADD %RAX,%R10 |
0x434e20 LEA (,%R13,8),%RAX |
0x434e28 SAL $0x4,%RDX |
0x434e2c MOV %R11,0x50(%RSP) |
0x434e31 MOV %RAX,0x48(%RSP) |
0x434e36 MOV %R13,%RAX |
0x434e39 LEA (%R15,%R15,2),%R11 |
0x434e3d SAL $0x4,%RAX |
0x434e41 SAL $0x3,%R11 |
0x434e45 MOV %RDX,0x78(%RSP) |
0x434e4a XOR %EDX,%EDX |
0x434e4c MOV %RAX,0x38(%RSP) |
0x434e51 MOV %R8D,%EAX |
0x434e54 AND $-0x4,%EAX |
0x434e57 MOV %R11,0x58(%RSP) |
0x434e5c MOV %EAX,0x34(%RSP) |
0x434e60 INC %EAX |
0x434e62 TEST %R8D,%R8D |
0x434e65 CMOVNS %R8D,%EDX |
0x434e69 MOV %EAX,0x30(%RSP) |
0x434e6d MOV %R14,0xa8(%RSP) |
0x434e75 INC %EDX |
0x434e77 MOV %R12D,0x84(%RSP) |
0x434e7f MOV %ECX,%R12D |
0x434e82 MOV %EDX,0x68(%RSP) |
0x434e86 NOPW %CS:(%RAX,%RAX,1) |
(238) 0x434e90 TEST %R8D,%R8D |
(238) 0x434e93 JLE 43521e |
(238) 0x434e99 MOV 0x90(%RSP),%R9 |
(238) 0x434ea1 MOV 0x88(%RSP),%R14 |
(238) 0x434ea9 MOV 0x9c(%RSP),%R11D |
(238) 0x434eb1 MOV (%R9),%ECX |
(238) 0x434eb4 ADD (%R14),%R11D |
(238) 0x434eb7 CMPL $0x2,0x60(%RSP) |
(238) 0x434ebc LEA -0x1(%R11),%EAX |
(238) 0x434ec0 MOV %ECX,0xb8(%RSP) |
(238) 0x434ec7 MOV %EAX,0xb0(%RSP) |
(238) 0x434ece JBE 43527b |
(238) 0x434ed4 MOVSXD %ECX,%RCX |
(238) 0x434ed7 MOVSXD %R12D,%R14 |
(238) 0x434eda MOVSXD %R11D,%R9 |
(238) 0x434edd IMUL %R13,%R9 |
(238) 0x434ee1 LEA 0x1(%RCX,%R14,1),%RDX |
(238) 0x434ee6 MOV 0x38(%RSP),%RCX |
(238) 0x434eeb MOV 0x80(%RSP),%R14D |
(238) 0x434ef3 IMUL %R15,%RDX |
(238) 0x434ef7 ADD %R10,%R9 |
(238) 0x434efa LEA (%RSI,%R9,8),%R9 |
(238) 0x434efe ADD %RBX,%RDX |
(238) 0x434f01 LEA (%RDI,%RDX,8),%RAX |
(238) 0x434f05 MOV %R9,0x40(%RSP) |
(238) 0x434f0a LEA (%R9,%RCX,1),%RDX |
(238) 0x434f0e XOR %ECX,%ECX |
(238) 0x434f10 AND $0x3,%R14D |
(238) 0x434f14 JE 435040 |
(238) 0x434f1a CMP $0x1,%R14D |
(238) 0x434f1e JE 434fda |
(238) 0x434f24 CMP $0x2,%R14D |
(238) 0x434f28 JE 434f85 |
(238) 0x434f2a MOV 0x40(%RSP),%RCX |
(238) 0x434f2f VMOVSD (%RDX),%XMM1 |
(238) 0x434f33 MOV 0x78(%RSP),%R14 |
(238) 0x434f38 VMOVSD (%RDX,%R13,8),%XMM0 |
(238) 0x434f3e VMOVSD (%RCX),%XMM3 |
(238) 0x434f42 VMOVSD (%RCX,%R13,8),%XMM2 |
(238) 0x434f48 MOV 0x58(%RSP),%RCX |
(238) 0x434f4d VMOVSD %XMM3,(%RAX) |
(238) 0x434f51 VMOVSD %XMM2,(%RAX,%R15,8) |
(238) 0x434f57 VMOVSD %XMM1,(%RAX,%R14,1) |
(238) 0x434f5d MOV 0xa8(%RSP),%R14 |
(238) 0x434f65 VMOVSD %XMM0,(%RAX,%RCX,1) |
(238) 0x434f6a MOV $0x1,%ECX |
(238) 0x434f6f ADD %R14,%R9 |
(238) 0x434f72 MOV 0x70(%RSP),%R14 |
(238) 0x434f77 ADD %R14,%RAX |
(238) 0x434f7a MOV 0xa8(%RSP),%R14 |
(238) 0x434f82 ADD %R14,%RDX |
(238) 0x434f85 VMOVSD (%R9),%XMM4 |
(238) 0x434f8a VMOVSD (%R9,%R13,8),%XMM5 |
(238) 0x434f90 INC %ECX |
(238) 0x434f92 VMOVSD (%RDX),%XMM6 |
(238) 0x434f96 MOV 0x78(%RSP),%R14 |
(238) 0x434f9b VMOVSD (%RDX,%R13,8),%XMM7 |
(238) 0x434fa1 VMOVSD %XMM4,(%RAX) |
(238) 0x434fa5 VMOVSD %XMM5,(%RAX,%R15,8) |
(238) 0x434fab VMOVSD %XMM6,(%RAX,%R14,1) |
(238) 0x434fb1 MOV 0x58(%RSP),%R14 |
(238) 0x434fb6 VMOVSD %XMM7,(%RAX,%R14,1) |
(238) 0x434fbc MOV 0xa8(%RSP),%R14 |
(238) 0x434fc4 ADD %R14,%R9 |
(238) 0x434fc7 MOV 0x70(%RSP),%R14 |
(238) 0x434fcc ADD %R14,%RAX |
(238) 0x434fcf MOV 0xa8(%RSP),%R14 |
(238) 0x434fd7 ADD %R14,%RDX |
(238) 0x434fda VMOVSD (%R9),%XMM8 |
(238) 0x434fdf VMOVSD (%R9,%R13,8),%XMM9 |
(238) 0x434fe5 INC %ECX |
(238) 0x434fe7 VMOVSD (%RDX),%XMM10 |
(238) 0x434feb MOV 0x78(%RSP),%R14 |
(238) 0x434ff0 VMOVSD (%RDX,%R13,8),%XMM11 |
(238) 0x434ff6 VMOVSD %XMM8,(%RAX) |
(238) 0x434ffa VMOVSD %XMM9,(%RAX,%R15,8) |
(238) 0x435000 VMOVSD %XMM10,(%RAX,%R14,1) |
(238) 0x435006 MOV 0x58(%RSP),%R14 |
(238) 0x43500b VMOVSD %XMM11,(%RAX,%R14,1) |
(238) 0x435011 MOV 0xa8(%RSP),%R14 |
(238) 0x435019 ADD %R14,%R9 |
(238) 0x43501c MOV 0x70(%RSP),%R14 |
(238) 0x435021 ADD %R14,%RAX |
(238) 0x435024 MOV 0xa8(%RSP),%R14 |
(238) 0x43502c ADD %R14,%RDX |
(238) 0x43502f MOV 0x80(%RSP),%R14D |
(238) 0x435037 CMP %R14D,%ECX |
(238) 0x43503a JE 435167 |
(238) 0x435040 MOV %R10,0x18(%RSP) |
(238) 0x435045 MOV 0xa8(%RSP),%R14 |
(238) 0x43504d MOV %R8D,0x40(%RSP) |
(238) 0x435052 MOV 0x58(%RSP),%R8 |
(238) 0x435057 MOV %RSI,0x28(%RSP) |
(238) 0x43505c MOV 0x78(%RSP),%RSI |
(238) 0x435061 MOV %RDI,0x20(%RSP) |
(238) 0x435066 MOV 0x70(%RSP),%RDI |
(239) 0x43506b VMOVSD (%R9),%XMM12 |
(239) 0x435070 VMOVSD (%R9,%R13,8),%XMM13 |
(239) 0x435076 ADD %R14,%R9 |
(239) 0x435079 ADD $0x4,%ECX |
(239) 0x43507c VMOVSD (%RDX),%XMM14 |
(239) 0x435080 VMOVSD (%RDX,%R13,8),%XMM15 |
(239) 0x435086 ADD %R14,%RDX |
(239) 0x435089 VMOVSD %XMM12,(%RAX) |
(239) 0x43508d VMOVSD %XMM13,(%RAX,%R15,8) |
(239) 0x435093 VMOVSD %XMM14,(%RAX,%RSI,1) |
(239) 0x435098 VMOVSD %XMM15,(%RAX,%R8,1) |
(239) 0x43509e ADD %RDI,%RAX |
(239) 0x4350a1 VMOVSD (%R9),%XMM3 |
(239) 0x4350a6 VMOVSD (%R9,%R13,8),%XMM2 |
(239) 0x4350ac ADD %R14,%R9 |
(239) 0x4350af VMOVSD (%RDX),%XMM1 |
(239) 0x4350b3 VMOVSD (%RDX,%R13,8),%XMM0 |
(239) 0x4350b9 ADD %R14,%RDX |
(239) 0x4350bc VMOVSD %XMM3,(%RAX) |
(239) 0x4350c0 VMOVSD %XMM2,(%RAX,%R15,8) |
(239) 0x4350c6 VMOVSD %XMM1,(%RAX,%RSI,1) |
(239) 0x4350cb VMOVSD %XMM0,(%RAX,%R8,1) |
(239) 0x4350d1 ADD %RDI,%RAX |
(239) 0x4350d4 VMOVSD (%R9),%XMM4 |
(239) 0x4350d9 VMOVSD (%R9,%R13,8),%XMM5 |
(239) 0x4350df ADD %R14,%R9 |
(239) 0x4350e2 VMOVSD (%RDX),%XMM6 |
(239) 0x4350e6 VMOVSD (%RDX,%R13,8),%XMM7 |
(239) 0x4350ec ADD %R14,%RDX |
(239) 0x4350ef VMOVSD %XMM4,(%RAX) |
(239) 0x4350f3 VMOVSD %XMM5,(%RAX,%R15,8) |
(239) 0x4350f9 VMOVSD %XMM6,(%RAX,%RSI,1) |
(239) 0x4350fe VMOVSD %XMM7,(%RAX,%R8,1) |
(239) 0x435104 ADD %RDI,%RAX |
(239) 0x435107 VMOVSD (%R9),%XMM8 |
(239) 0x43510c VMOVSD (%R9,%R13,8),%XMM9 |
(239) 0x435112 ADD %R14,%R9 |
(239) 0x435115 VMOVSD (%RDX),%XMM10 |
(239) 0x435119 VMOVSD (%RDX,%R13,8),%XMM11 |
(239) 0x43511f ADD %R14,%RDX |
(239) 0x435122 VMOVSD %XMM8,(%RAX) |
(239) 0x435126 VMOVSD %XMM9,(%RAX,%R15,8) |
(239) 0x43512c VMOVSD %XMM10,(%RAX,%RSI,1) |
(239) 0x435131 VMOVSD %XMM11,(%RAX,%R8,1) |
(239) 0x435137 MOV 0x80(%RSP),%R10D |
(239) 0x43513f ADD %RDI,%RAX |
(239) 0x435142 CMP %R10D,%ECX |
(239) 0x435145 JNE 43506b |
(238) 0x43514b MOV 0x40(%RSP),%R8D |
(238) 0x435150 MOV 0x28(%RSP),%RSI |
(238) 0x435155 MOV %R14,0xa8(%RSP) |
(238) 0x43515d MOV 0x20(%RSP),%RDI |
(238) 0x435162 MOV 0x18(%RSP),%R10 |
(238) 0x435167 MOV 0x34(%RSP),%R9D |
(238) 0x43516c CMP %R9D,%R8D |
(238) 0x43516f JE 43521e |
(238) 0x435175 MOV 0x30(%RSP),%EAX |
(238) 0x435179 MOV %R9D,%EDX |
(238) 0x43517c MOV %R8D,%ECX |
(238) 0x43517f SUB %EDX,%ECX |
(238) 0x435181 CMP $0x1,%ECX |
(238) 0x435184 JE 4351e9 |
(238) 0x435186 MOVSXD %R11D,%R14 |
(238) 0x435189 MOV %R13,%R11 |
(238) 0x43518c MOVSXD 0xb8(%RSP),%R9 |
(238) 0x435194 IMUL %R13,%R14 |
(238) 0x435198 IMUL %RDX,%R11 |
(238) 0x43519c IMUL %R15,%RDX |
(238) 0x4351a0 ADD %R10,%R14 |
(238) 0x4351a3 ADD %R11,%R14 |
(238) 0x4351a6 LEA (%RSI,%R14,8),%R11 |
(238) 0x4351aa MOVSXD %R12D,%R14 |
(238) 0x4351ad LEA 0x1(%R9,%R14,1),%R9 |
(238) 0x4351b2 MOV 0x48(%RSP),%R14 |
(238) 0x4351b7 VMOVSD (%R11),%XMM12 |
(238) 0x4351bc IMUL %R15,%R9 |
(238) 0x4351c0 VMOVSD (%R11,%R14,1),%XMM13 |
(238) 0x4351c6 MOV 0x50(%RSP),%R11 |
(238) 0x4351cb ADD %RBX,%R9 |
(238) 0x4351ce ADD %RDX,%R9 |
(238) 0x4351d1 LEA (%RDI,%R9,8),%RDX |
(238) 0x4351d5 VMOVSD %XMM12,(%RDX) |
(238) 0x4351d9 VMOVSD %XMM13,(%RDX,%R11,1) |
(238) 0x4351df TEST $0x1,%CL |
(238) 0x4351e2 JE 43521e |
(238) 0x4351e4 AND $-0x2,%ECX |
(238) 0x4351e7 ADD %ECX,%EAX |
(238) 0x4351e9 MOV 0xb0(%RSP),%ECX |
(238) 0x4351f0 MOV 0xb8(%RSP),%EDX |
(238) 0x4351f7 ADD %EAX,%ECX |
(238) 0x4351f9 ADD %EAX,%EDX |
(238) 0x4351fb MOVSXD %ECX,%R9 |
(238) 0x4351fe MOV %EDX,%EAX |
(238) 0x435200 IMUL %R13,%R9 |
(238) 0x435204 ADD %R12D,%EAX |
(238) 0x435207 CLTQ |
(238) 0x435209 IMUL %R15,%RAX |
(238) 0x43520d ADD %R10,%R9 |
(238) 0x435210 VMOVSD (%RSI,%R9,8),%XMM14 |
(238) 0x435216 ADD %RBX,%RAX |
(238) 0x435219 VMOVSD %XMM14,(%RDI,%RAX,8) |
(238) 0x43521e INCL 0x84(%RSP) |
(238) 0x435225 MOV 0xa0(%RSP),%R11 |
(238) 0x43522d ADD %R8D,%R12D |
(238) 0x435230 ADD %R11,%R10 |
(238) 0x435233 MOV 0x84(%RSP),%R14D |
(238) 0x43523b TEST %R8D,%R8D |
(238) 0x43523e JNS 43525e |
(238) 0x435240 CMP %R14D,0x98(%RSP) |
(238) 0x435248 JG 434e90 |
0x43524e MOV 0x10(%RSP),%RBX |
0x435253 KMOVB %K0,0x6f(%RSP) |
0x435259 JMP 434d4f |
(238) 0x43525e CMP %R14D,0x98(%RSP) |
(238) 0x435266 JLE 435287 |
(238) 0x435268 MOV 0x68(%RSP),%ECX |
(238) 0x43526c KMOVB 0x6f(%RSP),%K0 |
(238) 0x435272 MOV %ECX,0x64(%RSP) |
(238) 0x435276 JMP 434e90 |
(238) 0x43527b XOR %EDX,%EDX |
(238) 0x43527d MOV $0x1,%EAX |
(238) 0x435282 JMP 43517c |
0x435287 MOV 0x10(%RSP),%RBX |
0x43528c JMP 434d6d |
0x435291 NOPW %CS:(%RAX,%RAX,1) |
0x43529c NOPL (%RAX) |
Path / |
Source file and lines | pack_kernel.f90:61-66 |
Module | exec |
nb instructions | 169 |
nb uops | 176 |
loop length | 698 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 24 |
micro-operation queue | 29.33 cycles |
front end | 29.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 11.80 | 11.80 | 14.00 | 14.00 | 21.00 | 11.80 | 11.80 | 21.00 | 21.00 | 21.00 | 11.80 | 14.00 |
cycles | 11.80 | 14.47 | 14.00 | 14.00 | 21.00 | 11.80 | 11.80 | 21.00 | 21.00 | 21.00 | 11.80 | 14.00 |
Cycles executing div or sqrt instructions | 6.00 |
FE+BE cycles | 28.64-28.65 |
Stall cycles | 0.00 |
Front-end | 29.33 |
Dispatch | 21.00 |
DIV/SQRT | 6.00 |
Overall L1 | 29.33 |
all | 3% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 10% |
all | 9% |
load | 9% |
store | 9% |
mul | 6% |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 9% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x20,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0xc0,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x30(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x54(%RDI),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RDI),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RDI),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %ESI,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x9c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 402080 <@plt_start@+0x60> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 402180 <@plt_start@+0x160> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0xb8(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb0(%RSP),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x5c(%R9),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %R8D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R14D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
CMP %EDX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 434db8 <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x448> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %EAX,%EDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %EDI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 434d56 <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x3e6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %R8D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0x1,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV (%R9),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%R9),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SETNE %CL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP $0x1,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x10(%R9),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R8,%RDI,1),%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SETNE %R14B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV (%R10),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%R9),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
OR %R14B,%CL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EAX,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%R9),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %CL,0x6f(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JNE 434dc1 <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x451> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xa0(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD %R12D,%R10 | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV 0xa8(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x1(%R8),%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R8D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8D,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (%R12,%RDX,1),%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
IMUL %R15,%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
AND $-0x4,%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x2,%EAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOVSXD 0x9c(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SAL $0x5,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
IMUL %R8D,%R11D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R14D,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDX,0x84(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R13,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST %R8D,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
LEA 0x1(%RBX),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMOVNS %R8D,%ECX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R14D,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R13,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %ECX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x58(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CMPB $0,0x6f(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 434d77 <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x407> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
MOV 0x58(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV 0x68(%RSP),%R12D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12D,0x64(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x64(%RSP),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8D,0x50(%RBX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4349fc <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x8c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV 0xa0(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD %R12D,%RAX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV 0xa8(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8D,%R11D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
KXORB %K0,%K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
SHR $0x2,%R11D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA -0x1(%R8),%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R13,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R9,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %RDX,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R11D,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%R15,8),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x5,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %ECX,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R12D,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SAL $0x5,%R14 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RDX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %R8D,%ECX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %RAX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (,%R13,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x4,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R11,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (%R15,%R15,2),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x4,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SAL $0x3,%R11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RDX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R11,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x34(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST %R8D,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
CMOVNS %R8D,%EDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R14,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R12D,0x84(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %ECX,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EDX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x10(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
KMOVB %K0,0x6f(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
JMP 434d4f <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x3df> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV 0x10(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 434d6d <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x3fd> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | pack_kernel.f90:61-66 |
Module | exec |
nb instructions | 169 |
nb uops | 176 |
loop length | 698 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 24 |
micro-operation queue | 29.33 cycles |
front end | 29.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 11.80 | 11.80 | 14.00 | 14.00 | 21.00 | 11.80 | 11.80 | 21.00 | 21.00 | 21.00 | 11.80 | 14.00 |
cycles | 11.80 | 14.47 | 14.00 | 14.00 | 21.00 | 11.80 | 11.80 | 21.00 | 21.00 | 21.00 | 11.80 | 14.00 |
Cycles executing div or sqrt instructions | 6.00 |
FE+BE cycles | 28.64-28.65 |
Stall cycles | 0.00 |
Front-end | 29.33 |
Dispatch | 21.00 |
DIV/SQRT | 6.00 |
Overall L1 | 29.33 |
all | 3% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 10% |
all | 9% |
load | 9% |
store | 9% |
mul | 6% |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 9% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x20,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0xc0,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x30(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x54(%RDI),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RDI),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RDI),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %ESI,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x9c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 402080 <@plt_start@+0x60> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 402180 <@plt_start@+0x160> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0xb8(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb0(%RSP),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x5c(%R9),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %R8D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R14D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
CMP %EDX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 434db8 <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x448> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %EAX,%EDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %EDI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 434d56 <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x3e6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %R8D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0x1,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV (%R9),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%R9),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SETNE %CL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP $0x1,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x10(%R9),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R8,%RDI,1),%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SETNE %R14B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV (%R10),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%R9),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
OR %R14B,%CL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EAX,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%R9),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %CL,0x6f(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JNE 434dc1 <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x451> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xa0(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD %R12D,%R10 | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV 0xa8(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x1(%R8),%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R8D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8D,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (%R12,%RDX,1),%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
IMUL %R15,%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
AND $-0x4,%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x2,%EAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOVSXD 0x9c(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SAL $0x5,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
IMUL %R8D,%R11D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R14D,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDX,0x84(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R13,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST %R8D,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
LEA 0x1(%RBX),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMOVNS %R8D,%ECX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R14D,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R13,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %ECX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x58(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CMPB $0,0x6f(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 434d77 <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x407> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
MOV 0x58(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV 0x68(%RSP),%R12D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12D,0x64(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x64(%RSP),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8D,0x50(%RBX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4349fc <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x8c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV 0xa0(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD %R12D,%RAX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV 0xa8(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8D,%R11D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
KXORB %K0,%K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
SHR $0x2,%R11D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA -0x1(%R8),%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R13,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R9,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %RDX,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R11D,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%R15,8),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x5,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %ECX,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R12D,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SAL $0x5,%R14 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RDX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %R8D,%ECX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %RAX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (,%R13,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x4,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R11,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (%R15,%R15,2),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x4,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SAL $0x3,%R11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RDX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R11,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x34(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST %R8D,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
CMOVNS %R8D,%EDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R14,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R12D,0x84(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %ECX,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EDX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x10(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
KMOVB %K0,0x6f(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
JMP 434d4f <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x3df> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV 0x10(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 434d6d <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x3fd> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0– | 0.03 | 0.01 |
▼Loop 240 - pack_kernel.f90:61-66 - exec– | 0.03 | 0.02 |
○Loop 241 - pack_kernel.f90:66-66 - exec | 0 | 0 |
▼Loop 238 - pack_kernel.f90:65-66 - exec– | 0 | 0 |
○Loop 239 - pack_kernel.f90:66-66 - exec | 0 | 0 |