Function: pdv_kernel_.DIR.OMP.PARALLEL.2 | Module: exec | Source: PdV_kernel.f90:67-139 [...] | Coverage: 12.52% |
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Function: pdv_kernel_.DIR.OMP.PARALLEL.2 | Module: exec | Source: PdV_kernel.f90:67-139 [...] | Coverage: 12.52% |
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/scratch_na/users/xoserete/qaas_runs/171-415-7919/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/PdV_kernel.f90: 67 - 139 |
-------------------------------------------------------------------------------- |
67: !$OMP PARALLEL |
68: |
69: IF(predict)THEN |
70: |
71: !$OMP DO PRIVATE(right_flux,left_flux,top_flux,bottom_flux,total_flux,min_cell_volume, & |
72: !$OMP energy_change,recip_volume,volume_change_s) |
73: DO k=y_min,y_max |
74: !$OMP SIMD |
75: DO j=x_min,x_max |
76: |
77: left_flux= (xarea(j ,k )*(xvel0(j ,k )+xvel0(j ,k+1) & |
78: +xvel0(j ,k )+xvel0(j ,k+1)))*0.25_8*dt*0.5 |
79: right_flux= (xarea(j+1,k )*(xvel0(j+1,k )+xvel0(j+1,k+1) & |
80: +xvel0(j+1,k )+xvel0(j+1,k+1)))*0.25_8*dt*0.5 |
81: bottom_flux=(yarea(j ,k )*(yvel0(j ,k )+yvel0(j+1,k ) & |
82: +yvel0(j ,k )+yvel0(j+1,k )))*0.25_8*dt*0.5 |
83: top_flux= (yarea(j ,k+1)*(yvel0(j ,k+1)+yvel0(j+1,k+1) & |
84: +yvel0(j ,k+1)+yvel0(j+1,k+1)))*0.25_8*dt*0.5 |
85: total_flux=right_flux-left_flux+top_flux-bottom_flux |
86: |
87: volume_change_s=volume(j,k)/(volume(j,k)+total_flux) |
[...] |
95: energy_change=(pressure(j,k)/density0(j,k)+viscosity(j,k)/density0(j,k))*total_flux*recip_volume |
96: |
97: energy1(j,k)=energy0(j,k)-energy_change |
98: |
99: density1(j,k)=density0(j,k)*volume_change_s |
100: |
101: ENDDO |
102: ENDDO |
103: !$OMP END DO |
104: |
105: ELSE |
106: |
107: !$OMP DO PRIVATE(right_flux,left_flux,top_flux,bottom_flux,total_flux,min_cell_volume, & |
108: !$OMP energy_change,recip_volume,volume_change_s) |
109: DO k=y_min,y_max |
110: !$OMP SIMD |
111: DO j=x_min,x_max |
112: |
113: left_flux= (xarea(j ,k )*(xvel0(j ,k )+xvel0(j ,k+1) & |
114: +xvel1(j ,k )+xvel1(j ,k+1)))*0.25_8*dt |
115: right_flux= (xarea(j+1,k )*(xvel0(j+1,k )+xvel0(j+1,k+1) & |
116: +xvel1(j+1,k )+xvel1(j+1,k+1)))*0.25_8*dt |
117: bottom_flux=(yarea(j ,k )*(yvel0(j ,k )+yvel0(j+1,k ) & |
118: +yvel1(j ,k )+yvel1(j+1,k )))*0.25_8*dt |
119: top_flux= (yarea(j ,k+1)*(yvel0(j ,k+1)+yvel0(j+1,k+1) & |
120: +yvel1(j ,k+1)+yvel1(j+1,k+1)))*0.25_8*dt |
121: total_flux=right_flux-left_flux+top_flux-bottom_flux |
122: |
123: volume_change_s=volume(j,k)/(volume(j,k)+total_flux) |
[...] |
131: energy_change=(pressure(j,k)/density0(j,k)+viscosity(j,k)/density0(j,k))*total_flux*recip_volume |
132: |
133: energy1(j,k)=energy0(j,k)-energy_change |
134: |
135: density1(j,k)=density0(j,k)*volume_change_s |
136: |
137: ENDDO |
138: ENDDO |
139: !$OMP END DO |
0x4249e0 PUSH %RBP |
0x4249e1 MOV %RSP,%RBP |
0x4249e4 PUSH %R15 |
0x4249e6 PUSH %R14 |
0x4249e8 PUSH %R13 |
0x4249ea PUSH %R12 |
0x4249ec PUSH %RBX |
0x4249ed AND $-0x40,%RSP |
0x4249f1 SUB $0x980,%RSP |
0x4249f8 MOV 0xf8(%RBP),%RAX |
0x4249ff MOV %RAX,0x1a0(%RSP) |
0x424a07 MOV 0xf0(%RBP),%RAX |
0x424a0e MOV %RAX,0x198(%RSP) |
0x424a16 MOV 0xe8(%RBP),%RAX |
0x424a1d MOV %RAX,0x190(%RSP) |
0x424a25 MOV 0xe0(%RBP),%RAX |
0x424a2c MOV %RAX,0x188(%RSP) |
0x424a34 MOV 0xd8(%RBP),%RAX |
0x424a3b MOV %RAX,0x180(%RSP) |
0x424a43 MOV 0xd0(%RBP),%RAX |
0x424a4a MOV %RAX,0x178(%RSP) |
0x424a52 MOV 0xc8(%RBP),%RAX |
0x424a59 MOV %RAX,0x170(%RSP) |
0x424a61 MOV 0x88(%RBP),%EBX |
0x424a67 MOV 0x80(%RBP),%EAX |
0x424a6d SUB %EBX,%EAX |
0x424a6f TESTB $0x1,0xa0(%RBP) |
0x424a76 MOV 0xc0(%RBP),%RDX |
0x424a7d MOV %RDX,0x168(%RSP) |
0x424a85 MOV 0xb8(%RBP),%RDX |
0x424a8c MOV %RDX,0x160(%RSP) |
0x424a94 MOV 0xb0(%RBP),%RDX |
0x424a9b MOV %RDX,0x158(%RSP) |
0x424aa3 MOV 0xa8(%RBP),%RDX |
0x424aaa MOV %RDX,0x150(%RSP) |
0x424ab2 MOV 0x98(%RBP),%R15 |
0x424ab9 MOV 0x90(%RBP),%R14 |
0x424ac0 MOV 0x78(%RBP),%RDX |
0x424ac4 MOV %RDX,0x148(%RSP) |
0x424acc MOV 0x70(%RBP),%RDX |
0x424ad0 MOV %RDX,0x78(%RSP) |
0x424ad5 MOV 0x68(%RBP),%RDX |
0x424ad9 MOV %RDX,0x70(%RSP) |
0x424ade MOV 0x60(%RBP),%RDX |
0x424ae2 MOV %RDX,0x68(%RSP) |
0x424ae7 MOV 0x58(%RBP),%RDX |
0x424aeb MOV %RDX,0x60(%RSP) |
0x424af0 MOV 0x50(%RBP),%RDX |
0x424af4 MOV %RDX,0x58(%RSP) |
0x424af9 MOV 0x48(%RBP),%RDX |
0x424afd MOV %RDX,0x50(%RSP) |
0x424b02 MOV 0x40(%RBP),%RDX |
0x424b06 MOV %RDX,0x48(%RSP) |
0x424b0b MOV 0x38(%RBP),%RDX |
0x424b0f MOV %RDX,0x40(%RSP) |
0x424b14 MOV 0x30(%RBP),%RDX |
0x424b18 MOV %RDX,0x38(%RSP) |
0x424b1d MOV 0x28(%RBP),%RDX |
0x424b21 MOV %RDX,0x30(%RSP) |
0x424b26 MOV 0x18(%RBP),%RDX |
0x424b2a MOV %RDX,0x28(%RSP) |
0x424b2f JNE 424c40 |
0x424b35 MOV 0x160(%RBP),%RDX |
0x424b3c MOV %RDX,0x7c0(%RSP) |
0x424b44 MOV 0x158(%RBP),%RDX |
0x424b4b MOV %RDX,0x780(%RSP) |
0x424b53 MOV 0x20(%RBP),%RDX |
0x424b57 MOV %RDX,0x140(%RSP) |
0x424b5f MOV 0x10(%RBP),%RDX |
0x424b63 MOV %RDX,0x138(%RSP) |
0x424b6b MOVL $0,0x12c(%RSP) |
0x424b76 TEST %EAX,%EAX |
0x424b78 JS 424cea |
0x424b7e MOV %RCX,%R13 |
0x424b81 MOV %R9,%R12 |
0x424b84 MOV %RDI,0xe0(%RSP) |
0x424b8c MOV (%RDI),%ESI |
0x424b8e MOVL $0,0x1c(%RSP) |
0x424b96 MOV %EAX,0x18(%RSP) |
0x424b9a MOVL $0x1,0x128(%RSP) |
0x424ba5 SUB $0x8,%RSP |
0x424ba9 LEA 0x130(%RSP),%RAX |
0x424bb1 LEA 0x134(%RSP),%RCX |
0x424bb9 LEA 0x24(%RSP),%R8 |
0x424bbe LEA 0x20(%RSP),%R9 |
0x424bc3 MOV $0x747130,%EDI |
0x424bc8 MOV %ESI,0x12c(%RSP) |
0x424bcf MOV $0x22,%EDX |
0x424bd4 PUSH $0x1 |
0x424bd6 PUSH $0x1 |
0x424bd8 PUSH %RAX |
0x424bd9 CALL 4045a0 <__kmpc_for_static_init_4@plt> |
0x424bde ADD $0x20,%RSP |
0x424be2 MOV 0x1c(%RSP),%EAX |
0x424be6 MOV 0x18(%RSP),%ECX |
0x424bea SUB %EAX,%ECX |
0x424bec MOV %ECX,0x100(%RSP) |
0x424bf3 JAE 424d40 |
0x424bf9 MOV $0x747150,%EDI |
0x424bfe MOV 0x124(%RSP),%ESI |
0x424c05 JMP 424cda |
0x424c0a NOPW %CS:(%RAX,%RAX,1) |
0x424c19 NOPW %CS:(%RAX,%RAX,1) |
0x424c28 NOPW %CS:(%RAX,%RAX,1) |
0x424c37 NOPW (%RAX,%RAX,1) |
0x424c40 MOVL $0,0x134(%RSP) |
0x424c4b TEST %EAX,%EAX |
0x424c4d JS 424cea |
0x424c53 MOV %RCX,%R13 |
0x424c56 MOV %R9,%R12 |
0x424c59 MOV %RDI,0xe0(%RSP) |
0x424c61 MOV (%RDI),%ESI |
0x424c63 MOVL $0,0x24(%RSP) |
0x424c6b MOV %EAX,0x20(%RSP) |
0x424c6f MOVL $0x1,0x130(%RSP) |
0x424c7a SUB $0x8,%RSP |
0x424c7e LEA 0x138(%RSP),%RAX |
0x424c86 LEA 0x13c(%RSP),%RCX |
0x424c8e LEA 0x2c(%RSP),%R8 |
0x424c93 LEA 0x28(%RSP),%R9 |
0x424c98 MOV $0x7470d0,%EDI |
0x424c9d MOV %ESI,0x2c8(%RSP) |
0x424ca4 MOV $0x22,%EDX |
0x424ca9 PUSH $0x1 |
0x424cab PUSH $0x1 |
0x424cad PUSH %RAX |
0x424cae CALL 4045a0 <__kmpc_for_static_init_4@plt> |
0x424cb3 ADD $0x20,%RSP |
0x424cb7 MOV 0x24(%RSP),%EAX |
0x424cbb MOV 0x20(%RSP),%ECX |
0x424cbf SUB %EAX,%ECX |
0x424cc1 MOV %ECX,0x108(%RSP) |
0x424cc8 JAE 425880 |
0x424cce MOV $0x7470f0,%EDI |
0x424cd3 MOV 0x2c0(%RSP),%ESI |
0x424cda VZEROUPPER |
0x424cdd CALL 404190 <__kmpc_for_static_fini@plt> |
0x424ce2 MOV 0xe0(%RSP),%RDI |
0x424cea MOV (%RDI),%ESI |
0x424cec MOV %RDI,%RBX |
0x424cef MOV $0x747170,%EDI |
0x424cf4 CALL 404660 <__kmpc_barrier@plt> |
0x424cf9 MOV (%RBX),%ESI |
0x424cfb MOV $0x747110,%EDI |
0x424d00 LEA -0x28(%RBP),%RSP |
0x424d04 POP %RBX |
0x424d05 POP %R12 |
0x424d07 POP %R13 |
0x424d09 POP %R14 |
0x424d0b POP %R15 |
0x424d0d POP %RBP |
0x424d0e JMP 404660 |
0x424d13 NOPW %CS:(%RAX,%RAX,1) |
0x424d22 NOPW %CS:(%RAX,%RAX,1) |
0x424d31 NOPW %CS:(%RAX,%RAX,1) |
0x424d40 MOV %RAX,%RSI |
0x424d43 ADD %EBX,%ESI |
0x424d45 MOVSXD (%R15),%RDX |
0x424d48 MOV (%R14),%R15D |
0x424d4b SUB %EDX,%R15D |
0x424d4e LEA 0x1(%R15),%EAX |
0x424d52 CMP $0x2,%EAX |
0x424d55 MOV $0x1,%R8D |
0x424d5b CMOVGE %EAX,%R8D |
0x424d5f MOV %R8D,%EAX |
0x424d62 AND $0x7ffffff8,%EAX |
0x424d67 MOV %RAX,0x10(%RSP) |
0x424d6c MOVSXD %R13D,%RAX |
0x424d6f MOVSXD %R12D,%RCX |
0x424d72 MOV %R8,0x238(%RSP) |
0x424d7a VPBROADCASTQ %R8,%ZMM0 |
0x424d80 VMOVDQA64 %ZMM0,0x8c0(%RSP) |
0x424d88 MOV %RDX,0x1b8(%RSP) |
0x424d90 LEA (,%RDX,8),%RDX |
0x424d98 LEA -0x2(%RCX),%R8 |
0x424d9c MOV %R8,0x1b0(%RSP) |
0x424da4 SAL $0x3,%RCX |
0x424da8 SUB %RCX,%RDX |
0x424dab MOV 0x138(%RSP),%RCX |
0x424db3 LEA 0x18(%RCX,%RDX,1),%RCX |
0x424db8 MOV %RCX,0x230(%RSP) |
0x424dc0 MOV $0x3,%ECX |
0x424dc5 SUB %RAX,%RCX |
0x424dc8 MOV %RCX,0x228(%RSP) |
0x424dd0 MOV 0x28(%RSP),%RCX |
0x424dd5 LEA 0x18(%RCX,%RDX,1),%RCX |
0x424dda MOV %RCX,0x220(%RSP) |
0x424de2 MOV $0x2,%ECX |
0x424de7 SUB %RAX,%RCX |
0x424dea MOV %RCX,0x218(%RSP) |
0x424df2 ADD $-0x2,%RAX |
0x424df6 MOV %RAX,0x1a8(%RSP) |
0x424dfe MOV 0x78(%RSP),%RAX |
0x424e03 LEA 0x18(%RAX,%RDX,1),%RAX |
0x424e08 MOV %RAX,0x210(%RSP) |
0x424e10 MOV 0x140(%RSP),%RAX |
0x424e18 LEA 0x18(%RAX,%RDX,1),%RAX |
0x424e1d MOV %RAX,0x208(%RSP) |
0x424e25 MOV 0x30(%RSP),%RAX |
0x424e2a LEA 0x18(%RAX,%RDX,1),%RAX |
0x424e2f MOV %RAX,0x200(%RSP) |
0x424e37 MOV 0x58(%RSP),%RAX |
0x424e3c LEA 0x10(%RAX,%RDX,1),%RAX |
0x424e41 MOV %RAX,0x1f8(%RSP) |
0x424e49 MOV 0x48(%RSP),%RAX |
0x424e4e LEA 0x10(%RAX,%RDX,1),%RAX |
0x424e53 MOV %RAX,0x1f0(%RSP) |
0x424e5b MOV 0x50(%RSP),%RAX |
0x424e60 LEA 0x10(%RAX,%RDX,1),%RAX |
0x424e65 MOV %RAX,0x1e8(%RSP) |
0x424e6d MOV 0x40(%RSP),%RAX |
0x424e72 LEA 0x10(%RAX,%RDX,1),%RAX |
0x424e77 MOV %RAX,0x1e0(%RSP) |
0x424e7f MOV 0x38(%RSP),%RAX |
0x424e84 LEA 0x10(%RAX,%RDX,1),%RAX |
0x424e89 MOV %RAX,0x1d8(%RSP) |
0x424e91 MOV 0x60(%RSP),%RAX |
0x424e96 LEA 0x10(%RAX,%RDX,1),%RAX |
0x424e9b MOV %RAX,0x1d0(%RSP) |
0x424ea3 MOV 0x68(%RSP),%RAX |
0x424ea8 LEA 0x10(%RAX,%RDX,1),%RAX |
0x424ead MOV %RAX,0x1c8(%RSP) |
0x424eb5 MOV 0x70(%RSP),%RAX |
0x424eba LEA 0x10(%RAX,%RDX,1),%RAX |
0x424ebf MOV %RAX,0x280(%RSP) |
0x424ec7 VMOVSD 0xdfe09(%RIP),%XMM8 |
0x424ecf XOR %R14D,%R14D |
0x424ed2 MOV %RSI,0x1c0(%RSP) |
0x424eda MOV %ESI,%R10D |
0x424edd MOV %R15,0x240(%RSP) |
0x424ee5 JMP 424f18 |
0x424ee7 NOPW %CS:(%RAX,%RAX,1) |
0x424ef6 NOPW %CS:(%RAX,%RAX,1) |
(120) 0x424f00 LEA 0x1(%R14),%EAX |
(120) 0x424f04 INC %R10D |
(120) 0x424f07 CMP 0x100(%RSP),%R14D |
(120) 0x424f0f MOV %EAX,%R14D |
(120) 0x424f12 JE 424bf9 |
(120) 0x424f18 TEST %R15D,%R15D |
(120) 0x424f1b JS 424f00 |
(120) 0x424f1d MOV %R14,%RDI |
(120) 0x424f20 MOV 0x150(%RSP),%RAX |
(120) 0x424f28 MOV (%RAX),%R8 |
(120) 0x424f2b MOV 0x158(%RSP),%RAX |
(120) 0x424f33 MOV (%RAX),%R13 |
(120) 0x424f36 MOV 0x148(%RSP),%RAX |
(120) 0x424f3e VMULSD (%RAX),%XMM8,%XMM28 |
(120) 0x424f44 MOV 0x780(%RSP),%RAX |
(120) 0x424f4c MOV (%RAX),%R11 |
(120) 0x424f4f MOV 0x160(%RSP),%RAX |
(120) 0x424f57 MOV (%RAX),%RBX |
(120) 0x424f5a MOV 0x168(%RSP),%RAX |
(120) 0x424f62 MOV (%RAX),%R14 |
(120) 0x424f65 MOV 0x7c0(%RSP),%RAX |
(120) 0x424f6d MOV (%RAX),%RSI |
(120) 0x424f70 MOV 0x170(%RSP),%RAX |
(120) 0x424f78 MOV (%RAX),%RCX |
(120) 0x424f7b MOV 0x178(%RSP),%RAX |
(120) 0x424f83 MOV (%RAX),%RAX |
(120) 0x424f86 MOV %RAX,0xa0(%RSP) |
(120) 0x424f8e MOV 0x180(%RSP),%RAX |
(120) 0x424f96 MOV (%RAX),%RDX |
(120) 0x424f99 MOV 0x188(%RSP),%RAX |
(120) 0x424fa1 MOV (%RAX),%R9 |
(120) 0x424fa4 MOV 0x190(%RSP),%RAX |
(120) 0x424fac MOV (%RAX),%RAX |
(120) 0x424faf MOV %RAX,0xa8(%RSP) |
(120) 0x424fb7 MOV 0x198(%RSP),%RAX |
(120) 0x424fbf MOV (%RAX),%RAX |
(120) 0x424fc2 MOV %RAX,0xb0(%RSP) |
(120) 0x424fca MOV 0x1a0(%RSP),%RAX |
(120) 0x424fd2 MOV (%RAX),%RAX |
(120) 0x424fd5 MOV 0x10(%RSP),%R12 |
(120) 0x424fda TEST %R12,%R12 |
(120) 0x424fdd MOV %RDI,0xc0(%RSP) |
(120) 0x424fe5 MOV %RAX,0xb8(%RSP) |
(120) 0x424fed MOV %R14,0xf8(%RSP) |
(120) 0x424ff5 MOV %R8,0xf0(%RSP) |
(120) 0x424ffd MOV %R11,0xe8(%RSP) |
(120) 0x425005 MOV %R13,0x880(%RSP) |
(120) 0x42500d JE 425380 |
(120) 0x425013 MOV %R10D,0x840(%RSP) |
(120) 0x42501b MOV %RCX,0x88(%RSP) |
(120) 0x425023 MOVSXD %R10D,%RCX |
(120) 0x425026 MOV 0x228(%RSP),%RAX |
(120) 0x42502e LEA (%RAX,%RCX,1),%R10 |
(120) 0x425032 ADD 0x218(%RSP),%RCX |
(120) 0x42503a VBROADCASTSD %XMM28,%ZMM0 |
(120) 0x425040 MOV %RSI,%R15 |
(120) 0x425043 IMUL %R10,%R15 |
(120) 0x425047 MOV 0x230(%RSP),%RAX |
(120) 0x42504f ADD %RAX,%R15 |
(120) 0x425052 MOV %RBX,0x80(%RSP) |
(120) 0x42505a MOV %RSI,%RBX |
(120) 0x42505d MOV %R14,%RSI |
(120) 0x425060 IMUL %R10,%RSI |
(120) 0x425064 MOV %R9,0x98(%RSP) |
(120) 0x42506c MOV %RDX,0x90(%RSP) |
(120) 0x425074 MOV 0x220(%RSP),%RDI |
(120) 0x42507c ADD %RDI,%RSI |
(120) 0x42507f MOV %RBX,0x800(%RSP) |
(120) 0x425087 MOV %RBX,%RDX |
(120) 0x42508a IMUL %RCX,%RDX |
(120) 0x42508e ADD %RAX,%RDX |
(120) 0x425091 MOV %R14,%R9 |
(120) 0x425094 IMUL %RCX,%R9 |
(120) 0x425098 ADD %RDI,%R9 |
(120) 0x42509b MOV %R8,%R14 |
(120) 0x42509e IMUL %RCX,%R14 |
(120) 0x4250a2 ADD 0x210(%RSP),%R14 |
(120) 0x4250aa MOV %R11,%RBX |
(120) 0x4250ad IMUL %R10,%RBX |
(120) 0x4250b1 MOV 0x208(%RSP),%RAX |
(120) 0x4250b9 ADD %RAX,%RBX |
(120) 0x4250bc IMUL %RCX,%R11 |
(120) 0x4250c0 ADD %RAX,%R11 |
(120) 0x4250c3 MOV %R13,%R12 |
(120) 0x4250c6 IMUL %RCX,%R12 |
(120) 0x4250ca MOV 0x200(%RSP),%RAX |
(120) 0x4250d2 ADD %RAX,%R12 |
(120) 0x4250d5 IMUL %R10,%R13 |
(120) 0x4250d9 ADD %RAX,%R13 |
(120) 0x4250dc MOV 0xb8(%RSP),%RAX |
(120) 0x4250e4 IMUL %RCX,%RAX |
(120) 0x4250e8 ADD 0x1f8(%RSP),%RAX |
(120) 0x4250f0 MOV %RAX,0x118(%RSP) |
(120) 0x4250f8 MOV 0xb0(%RSP),%RAX |
(120) 0x425100 IMUL %RCX,%RAX |
(120) 0x425104 ADD 0x1f0(%RSP),%RAX |
(120) 0x42510c MOV %RAX,0x110(%RSP) |
(120) 0x425114 MOV 0xa8(%RSP),%R8 |
(120) 0x42511c IMUL %RCX,%R8 |
(120) 0x425120 ADD 0x1e8(%RSP),%R8 |
(120) 0x425128 MOV %R8,0xd8(%RSP) |
(120) 0x425130 MOV 0xa0(%RSP),%RAX |
(120) 0x425138 IMUL %RCX,%RAX |
(120) 0x42513c ADD 0x1e0(%RSP),%RAX |
(120) 0x425144 MOV %RAX,0xd0(%RSP) |
(120) 0x42514c MOV 0x98(%RSP),%RAX |
(120) 0x425154 IMUL %RCX,%RAX |
(120) 0x425158 ADD 0x1d8(%RSP),%RAX |
(120) 0x425160 MOV %RAX,0x108(%RSP) |
(120) 0x425168 MOV 0x90(%RSP),%RAX |
(120) 0x425170 IMUL %RCX,%RAX |
(120) 0x425174 ADD 0x1d0(%RSP),%RAX |
(120) 0x42517c MOV %RAX,0xc8(%RSP) |
(120) 0x425184 MOV 0x88(%RSP),%RDI |
(120) 0x42518c IMUL %RCX,%RDI |
(120) 0x425190 ADD 0x1c8(%RSP),%RDI |
(120) 0x425198 MOV 0x80(%RSP),%R8 |
(120) 0x4251a0 IMUL %R8,%R10 |
(120) 0x4251a4 ADD 0x280(%RSP),%R10 |
(120) 0x4251ac MOV %R10,%RAX |
(120) 0x4251af IMUL %R8,%RCX |
(120) 0x4251b3 ADD 0x280(%RSP),%RCX |
(120) 0x4251bb MOV %RCX,%R10 |
(120) 0x4251be XOR %ECX,%ECX |
(121) 0x4251c0 VMOVUPD -0x8(%R13,%RCX,8),%ZMM1 |
(121) 0x4251cb VMOVUPD (%R13,%RCX,8),%ZMM2 |
(121) 0x4251d3 VADDPD -0x8(%R12,%RCX,8),%ZMM1,%ZMM1 |
(121) 0x4251de VADDPD -0x8(%R11,%RCX,8),%ZMM1,%ZMM1 |
(121) 0x4251e9 VADDPD -0x8(%RBX,%RCX,8),%ZMM1,%ZMM1 |
(121) 0x4251f4 VMULPD -0x8(%R14,%RCX,8),%ZMM0,%ZMM3 |
(121) 0x4251ff VADDPD (%R12,%RCX,8),%ZMM2,%ZMM2 |
(121) 0x425206 VADDPD (%R11,%RCX,8),%ZMM2,%ZMM2 |
(121) 0x42520d VADDPD (%RBX,%RCX,8),%ZMM2,%ZMM2 |
(121) 0x425214 VMULPD (%R14,%RCX,8),%ZMM0,%ZMM4 |
(121) 0x42521b VMOVUPD (%R9,%RCX,8),%ZMM5 |
(121) 0x425222 VADDPD -0x8(%R9,%RCX,8),%ZMM5,%ZMM5 |
(121) 0x42522d VADDPD -0x8(%RDX,%RCX,8),%ZMM5,%ZMM5 |
(121) 0x425238 VADDPD (%RDX,%RCX,8),%ZMM5,%ZMM5 |
(121) 0x42523f VMULPD (%R10,%RCX,8),%ZMM0,%ZMM6 |
(121) 0x425246 VMULPD %ZMM5,%ZMM6,%ZMM5 |
(121) 0x42524c VFMADD231PD %ZMM3,%ZMM1,%ZMM5 |
(121) 0x425252 VMOVUPD (%RSI,%RCX,8),%ZMM1 |
(121) 0x425259 VADDPD -0x8(%RSI,%RCX,8),%ZMM1,%ZMM1 |
(121) 0x425264 VADDPD -0x8(%R15,%RCX,8),%ZMM1,%ZMM1 |
(121) 0x42526f VADDPD (%R15,%RCX,8),%ZMM1,%ZMM1 |
(121) 0x425276 VMULPD (%RAX,%RCX,8),%ZMM0,%ZMM3 |
(121) 0x42527d VFNMADD231PD %ZMM4,%ZMM2,%ZMM5 |
(121) 0x425283 VFMSUB213PD %ZMM5,%ZMM1,%ZMM3 |
(121) 0x425289 VMOVUPD (%RDI,%RCX,8),%ZMM1 |
(121) 0x425290 MOV 0x108(%RSP),%R8 |
(121) 0x425298 VMOVUPD (%R8,%RCX,8),%ZMM2 |
(121) 0x42529f MOV 0xd0(%RSP),%R8 |
(121) 0x4252a7 VADDPD (%R8,%RCX,8),%ZMM2,%ZMM2 |
(121) 0x4252ae VMULPD %ZMM2,%ZMM3,%ZMM2 |
(121) 0x4252b4 MOV 0xc8(%RSP),%R8 |
(121) 0x4252bc VMULPD (%R8,%RCX,8),%ZMM1,%ZMM4 |
(121) 0x4252c3 VDIVPD %ZMM4,%ZMM2,%ZMM2 |
(121) 0x4252c9 VADDPD %ZMM1,%ZMM3,%ZMM1 |
(121) 0x4252cf MOV 0xd8(%RSP),%R8 |
(121) 0x4252d7 VMOVUPD (%R8,%RCX,8),%ZMM3 |
(121) 0x4252de VSUBPD %ZMM2,%ZMM3,%ZMM2 |
(121) 0x4252e4 VDIVPD %ZMM1,%ZMM4,%ZMM1 |
(121) 0x4252ea MOV 0x110(%RSP),%R8 |
(121) 0x4252f2 VMOVUPD %ZMM2,(%R8,%RCX,8) |
(121) 0x4252f9 MOV 0x118(%RSP),%R8 |
(121) 0x425301 VMOVUPD %ZMM1,(%R8,%RCX,8) |
(121) 0x425308 ADD $0x8,%RCX |
(121) 0x42530c CMP 0x10(%RSP),%RCX |
(121) 0x425311 JB 4251c0 |
(120) 0x425317 MOV 0x10(%RSP),%RAX |
(120) 0x42531c MOV %RAX,%R8 |
(120) 0x42531f CMP 0x238(%RSP),%RAX |
(120) 0x425327 MOV 0x240(%RSP),%R15 |
(120) 0x42532f MOV 0x840(%RSP),%R10D |
(120) 0x425337 MOV 0xc0(%RSP),%R14 |
(120) 0x42533f MOV 0x98(%RSP),%R9 |
(120) 0x425347 MOV 0x90(%RSP),%RDX |
(120) 0x42534f MOV 0x88(%RSP),%RCX |
(120) 0x425357 MOV 0x80(%RSP),%R13 |
(120) 0x42535f MOV 0x800(%RSP),%RSI |
(120) 0x425367 JE 424f00 |
(120) 0x42536d JMP 425389 |
0x42536f NOPW %CS:(%RAX,%RAX,1) |
0x42537e XCHG %AX,%AX |
(120) 0x425380 XOR %R8D,%R8D |
(120) 0x425383 MOV %RDI,%R14 |
(120) 0x425386 MOV %RBX,%R13 |
(120) 0x425389 VPBROADCASTQ %R8,%ZMM0 |
(120) 0x42538f VMOVDQA64 0x8c0(%RSP),%ZMM1 |
(120) 0x425397 VPSUBQ %ZMM0,%ZMM1,%ZMM0 |
(120) 0x42539d VPCMPNLEUQ 0xdf958(%RIP),%ZMM0,%K1 |
(120) 0x4253a8 KORTESTB %K1,%K1 |
(120) 0x4253ac JE 424f00 |
(120) 0x4253b2 MOV 0x1c0(%RSP),%RAX |
(120) 0x4253ba ADD %R14D,%EAX |
(120) 0x4253bd MOVSXD %EAX,%R15 |
(120) 0x4253c0 SUB 0x1a8(%RSP),%R15 |
(120) 0x4253c8 LEA 0x1(%R15),%R11 |
(120) 0x4253cc MOV 0x880(%RSP),%RDI |
(120) 0x4253d4 MOV %RDI,%RAX |
(120) 0x4253d7 IMUL %R11,%RAX |
(120) 0x4253db MOV %R9,%R12 |
(120) 0x4253de MOV %RDX,%RBX |
(120) 0x4253e1 MOV %RCX,%RDX |
(120) 0x4253e4 MOV 0x30(%RSP),%RCX |
(120) 0x4253e9 ADD %RCX,%RAX |
(120) 0x4253ec ADD 0x1b8(%RSP),%R8 |
(120) 0x4253f4 SUB 0x1b0(%RSP),%R8 |
(120) 0x4253fc VMOVUPD (%RAX,%R8,8),%ZMM29{%K1}{z} |
(120) 0x425403 VMOVUPD 0x8(%RAX,%R8,8),%ZMM30{%K1}{z} |
(120) 0x42540e IMUL %R15,%RDI |
(120) 0x425412 ADD %RCX,%RDI |
(120) 0x425415 VMOVUPD (%RDI,%R8,8),%ZMM3{%K1}{z} |
(120) 0x42541c VMOVUPD 0x8(%RDI,%R8,8),%ZMM31{%K1}{z} |
(120) 0x425427 MOV 0xe8(%RSP),%RDI |
(120) 0x42542f MOV %RDI,%RAX |
(120) 0x425432 IMUL %R15,%RAX |
(120) 0x425436 MOV 0x140(%RSP),%RCX |
(120) 0x42543e ADD %RCX,%RAX |
(120) 0x425441 VMOVUPD (%RAX,%R8,8),%ZMM4{%K1}{z} |
(120) 0x425448 VMOVUPD 0x8(%RAX,%R8,8),%ZMM2{%K1}{z} |
(120) 0x425453 IMUL %R11,%RDI |
(120) 0x425457 ADD %RCX,%RDI |
(120) 0x42545a VMOVUPD (%RDI,%R8,8),%ZMM5{%K1}{z} |
(120) 0x425461 VMOVUPD 0x8(%RDI,%R8,8),%ZMM1{%K1}{z} |
(120) 0x42546c MOV 0xf0(%RSP),%RAX |
(120) 0x425474 IMUL %R15,%RAX |
(120) 0x425478 ADD 0x78(%RSP),%RAX |
(120) 0x42547d VMOVUPD (%RAX,%R8,8),%ZMM6{%K1}{z} |
(120) 0x425484 VMOVUPD 0x8(%RAX,%R8,8),%ZMM0{%K1}{z} |
(120) 0x42548f MOV 0xf8(%RSP),%R14 |
(120) 0x425497 MOV %R14,%RAX |
(120) 0x42549a IMUL %R15,%RAX |
(120) 0x42549e MOV 0x28(%RSP),%RDI |
(120) 0x4254a3 ADD %RDI,%RAX |
(120) 0x4254a6 VMOVUPD 0x8(%RAX,%R8,8),%ZMM23{%K1}{z} |
(120) 0x4254b1 VMOVUPD (%RAX,%R8,8),%ZMM9{%K1}{z} |
(120) 0x4254b8 MOV %RSI,%RAX |
(120) 0x4254bb IMUL %R15,%RAX |
(120) 0x4254bf MOV 0x138(%RSP),%R9 |
(120) 0x4254c7 ADD %R9,%RAX |
(120) 0x4254ca VMOVUPD (%RAX,%R8,8),%ZMM10{%K1}{z} |
(120) 0x4254d1 VMOVUPD 0x8(%RAX,%R8,8),%ZMM11{%K1}{z} |
(120) 0x4254dc MOV %R13,%RAX |
(120) 0x4254df IMUL %R15,%RAX |
(120) 0x4254e3 MOV 0x70(%RSP),%RCX |
(120) 0x4254e8 ADD %RCX,%RAX |
(120) 0x4254eb VMOVUPD (%RAX,%R8,8),%ZMM13{%K1}{z} |
(120) 0x4254f2 IMUL %R11,%R14 |
(120) 0x4254f6 ADD %RDI,%R14 |
(120) 0x4254f9 VMOVUPD 0x8(%R14,%R8,8),%ZMM12{%K1}{z} |
(120) 0x425504 VMOVUPD (%R14,%R8,8),%ZMM14{%K1}{z} |
(120) 0x42550b MOV 0xc0(%RSP),%R14 |
(120) 0x425513 IMUL %R11,%RSI |
(120) 0x425517 ADD %R9,%RSI |
(120) 0x42551a VMOVUPD (%RSI,%R8,8),%ZMM15{%K1}{z} |
(120) 0x425521 VMOVUPD 0x8(%RSI,%R8,8),%ZMM16{%K1}{z} |
(120) 0x42552c IMUL %R11,%R13 |
(120) 0x425530 ADD %RCX,%R13 |
(120) 0x425533 VMOVUPD (%R13,%R8,8),%ZMM17{%K1}{z} |
(120) 0x42553b IMUL %R15,%RDX |
(120) 0x42553f ADD 0x68(%RSP),%RDX |
(120) 0x425544 VMOVUPD (%RDX,%R8,8),%ZMM18{%K1}{z} |
(120) 0x42554b IMUL %R15,%RBX |
(120) 0x42554f ADD 0x60(%RSP),%RBX |
(120) 0x425554 VMOVUPD (%RBX,%R8,8),%ZMM19{%K1}{z} |
(120) 0x42555b IMUL %R15,%R12 |
(120) 0x42555f ADD 0x38(%RSP),%R12 |
(120) 0x425564 VMOVUPD (%R12,%R8,8),%ZMM20{%K1}{z} |
(120) 0x42556b MOV 0xa0(%RSP),%RAX |
(120) 0x425573 IMUL %R15,%RAX |
(120) 0x425577 ADD 0x40(%RSP),%RAX |
(120) 0x42557c VMOVUPD (%RAX,%R8,8),%ZMM21{%K1}{z} |
(120) 0x425583 MOV 0xa8(%RSP),%RAX |
(120) 0x42558b IMUL %R15,%RAX |
(120) 0x42558f ADD 0x50(%RSP),%RAX |
(120) 0x425594 VMOVUPD (%RAX,%R8,8),%ZMM22{%K1}{z} |
(120) 0x42559b VMOVAPD %ZMM29,%ZMM27{%K1} |
(120) 0x4255a1 VMOVAPD %ZMM3,%ZMM26{%K1} |
(120) 0x4255a7 VMOVAPD %ZMM4,%ZMM25{%K1} |
(120) 0x4255ad VADDPD %ZMM26,%ZMM27,%ZMM3 |
(120) 0x4255b3 VMOVAPD %ZMM5,%ZMM24{%K1} |
(120) 0x4255b9 VADDPD %ZMM24,%ZMM25,%ZMM4 |
(120) 0x4255bf VADDPD %ZMM4,%ZMM3,%ZMM3 |
(120) 0x4255c5 VMOVAPD 0x900(%RSP),%ZMM29 |
(120) 0x4255cd VMOVAPD %ZMM6,%ZMM29{%K1} |
(120) 0x4255d3 VMOVAPD 0x400(%RSP),%ZMM5 |
(120) 0x4255db VMOVAPD %ZMM23,%ZMM5{%K1} |
(120) 0x4255e1 VMOVAPD 0x440(%RSP),%ZMM4 |
(120) 0x4255e9 VMOVAPD %ZMM9,%ZMM4{%K1} |
(120) 0x4255ef VMOVAPD 0x480(%RSP),%ZMM6 |
(120) 0x4255f7 VMOVAPD %ZMM10,%ZMM6{%K1} |
(120) 0x4255fd VMOVAPD %ZMM4,0x440(%RSP) |
(120) 0x425605 VMOVAPD %ZMM5,0x400(%RSP) |
(120) 0x42560d VADDPD %ZMM4,%ZMM5,%ZMM4 |
(120) 0x425613 VMOVAPD 0x4c0(%RSP),%ZMM5 |
(120) 0x42561b VMOVAPD %ZMM11,%ZMM5{%K1} |
(120) 0x425621 VMOVAPD %ZMM5,0x4c0(%RSP) |
(120) 0x425629 VMOVAPD %ZMM6,0x480(%RSP) |
(120) 0x425631 VADDPD %ZMM5,%ZMM6,%ZMM5 |
(120) 0x425637 VADDPD %ZMM5,%ZMM4,%ZMM4 |
(120) 0x42563d VBROADCASTSD %XMM28,%ZMM5 |
(120) 0x425643 VMOVAPD 0x500(%RSP),%ZMM6 |
(120) 0x42564b VMOVAPD %ZMM13,%ZMM6{%K1} |
(120) 0x425651 VMOVAPD %ZMM6,0x500(%RSP) |
(120) 0x425659 VMULPD %ZMM6,%ZMM5,%ZMM6 |
(120) 0x42565f VMULPD %ZMM4,%ZMM6,%ZMM4 |
(120) 0x425665 VMOVAPD %ZMM29,0x900(%RSP) |
(120) 0x42566d VMULPD %ZMM29,%ZMM5,%ZMM6 |
(120) 0x425673 VFMADD231PD %ZMM6,%ZMM3,%ZMM4 |
(120) 0x425679 VMOVAPD 0x2c0(%RSP),%ZMM9 |
(120) 0x425681 VMOVAPD %ZMM30,%ZMM9{%K1} |
(120) 0x425687 VMOVAPD 0x300(%RSP),%ZMM3 |
(120) 0x42568f VMOVAPD %ZMM31,%ZMM3{%K1} |
(120) 0x425695 VMOVAPD 0x340(%RSP),%ZMM6 |
(120) 0x42569d VMOVAPD %ZMM2,%ZMM6{%K1} |
(120) 0x4256a3 VMOVAPD %ZMM3,0x300(%RSP) |
(120) 0x4256ab VMOVAPD %ZMM9,0x2c0(%RSP) |
(120) 0x4256b3 VADDPD %ZMM3,%ZMM9,%ZMM2 |
(120) 0x4256b9 VMOVAPD 0x380(%RSP),%ZMM3 |
(120) 0x4256c1 VMOVAPD %ZMM1,%ZMM3{%K1} |
(120) 0x4256c7 VMOVAPD %ZMM3,0x380(%RSP) |
(120) 0x4256cf VMOVAPD %ZMM6,0x340(%RSP) |
(120) 0x4256d7 VADDPD %ZMM3,%ZMM6,%ZMM1 |
(120) 0x4256dd VADDPD %ZMM1,%ZMM2,%ZMM1 |
(120) 0x4256e3 VMOVAPD 0x3c0(%RSP),%ZMM2 |
(120) 0x4256eb VMOVAPD %ZMM0,%ZMM2{%K1} |
(120) 0x4256f1 VMOVAPD %ZMM2,0x3c0(%RSP) |
(120) 0x4256f9 VMULPD %ZMM2,%ZMM5,%ZMM0 |
(120) 0x4256ff VFNMADD231PD %ZMM0,%ZMM1,%ZMM4 |
(120) 0x425705 VMOVAPD 0x540(%RSP),%ZMM1 |
(120) 0x42570d VMOVAPD %ZMM12,%ZMM1{%K1} |
(120) 0x425713 VMOVAPD 0x580(%RSP),%ZMM0 |
(120) 0x42571b VMOVAPD %ZMM14,%ZMM0{%K1} |
(120) 0x425721 VMOVAPD 0x5c0(%RSP),%ZMM2 |
(120) 0x425729 VMOVAPD %ZMM15,%ZMM2{%K1} |
(120) 0x42572f VMOVAPD %ZMM0,0x580(%RSP) |
(120) 0x425737 VMOVAPD %ZMM1,0x540(%RSP) |
(120) 0x42573f VADDPD %ZMM0,%ZMM1,%ZMM0 |
(120) 0x425745 VMOVAPD 0x600(%RSP),%ZMM1 |
(120) 0x42574d VMOVAPD %ZMM16,%ZMM1{%K1} |
(120) 0x425753 VMOVAPD %ZMM1,0x600(%RSP) |
(120) 0x42575b VMOVAPD %ZMM2,0x5c0(%RSP) |
(120) 0x425763 VADDPD %ZMM1,%ZMM2,%ZMM1 |
(120) 0x425769 VADDPD %ZMM1,%ZMM0,%ZMM0 |
(120) 0x42576f VMOVAPD 0x640(%RSP),%ZMM1 |
(120) 0x425777 VMOVAPD %ZMM17,%ZMM1{%K1} |
(120) 0x42577d VMOVAPD %ZMM1,0x640(%RSP) |
(120) 0x425785 VMULPD %ZMM1,%ZMM5,%ZMM1 |
(120) 0x42578b VFMSUB213PD %ZMM4,%ZMM0,%ZMM1 |
(120) 0x425791 VMOVAPD %ZMM18,%ZMM7{%K1} |
(120) 0x425797 VMOVAPD 0x680(%RSP),%ZMM3 |
(120) 0x42579f VMOVAPD %ZMM19,%ZMM3{%K1} |
(120) 0x4257a5 VMOVAPD 0x6c0(%RSP),%ZMM2 |
(120) 0x4257ad VMOVAPD %ZMM20,%ZMM2{%K1} |
(120) 0x4257b3 VMOVAPD 0x700(%RSP),%ZMM0 |
(120) 0x4257bb VMOVAPD %ZMM21,%ZMM0{%K1} |
(120) 0x4257c1 VMOVAPD %ZMM0,0x700(%RSP) |
(120) 0x4257c9 VMOVAPD %ZMM2,0x6c0(%RSP) |
(120) 0x4257d1 VADDPD %ZMM0,%ZMM2,%ZMM0 |
(120) 0x4257d7 VMULPD %ZMM0,%ZMM1,%ZMM0 |
(120) 0x4257dd VMOVAPD %ZMM3,0x680(%RSP) |
(120) 0x4257e5 VMULPD %ZMM3,%ZMM7,%ZMM2 |
(120) 0x4257eb VDIVPD %ZMM2,%ZMM0,%ZMM0 |
(120) 0x4257f1 VMOVAPD 0x740(%RSP),%ZMM3 |
(120) 0x4257f9 VMOVAPD %ZMM22,%ZMM3{%K1} |
(120) 0x4257ff VMOVAPD %ZMM3,0x740(%RSP) |
(120) 0x425807 VSUBPD %ZMM0,%ZMM3,%ZMM0 |
(120) 0x42580d MOV 0xb0(%RSP),%RAX |
(120) 0x425815 IMUL %R15,%RAX |
(120) 0x425819 ADD 0x48(%RSP),%RAX |
(120) 0x42581e VMOVUPD %ZMM0,(%RAX,%R8,8){%K1} |
(120) 0x425825 MOV 0xb8(%RSP),%RAX |
(120) 0x42582d IMUL %R15,%RAX |
(120) 0x425831 MOV 0x240(%RSP),%R15 |
(120) 0x425839 VADDPD %ZMM7,%ZMM1,%ZMM0 |
(120) 0x42583f VDIVPD %ZMM0,%ZMM2,%ZMM0 |
(120) 0x425845 ADD 0x58(%RSP),%RAX |
(120) 0x42584a VMOVUPD %ZMM0,(%RAX,%R8,8){%K1} |
(120) 0x425851 JMP 424f00 |
0x425856 NOPW %CS:(%RAX,%RAX,1) |
0x425865 NOPW %CS:(%RAX,%RAX,1) |
0x425874 NOPW %CS:(%RAX,%RAX,1) |
0x425880 MOV %RAX,%RSI |
0x425883 ADD %EBX,%ESI |
0x425885 MOVSXD (%R15),%RDX |
0x425888 MOV (%R14),%EAX |
0x42588b SUB %EDX,%EAX |
0x42588d MOV %RAX,0xc0(%RSP) |
0x425895 INC %EAX |
0x425897 CMP $0x2,%EAX |
0x42589a MOV $0x1,%R8D |
0x4258a0 CMOVGE %EAX,%R8D |
0x4258a4 MOV %R8D,%EAX |
0x4258a7 AND $0x7ffffff8,%EAX |
0x4258ac MOV %RAX,0xc8(%RSP) |
0x4258b4 MOVSXD %R13D,%RAX |
0x4258b7 MOVSXD %R12D,%RCX |
0x4258ba MOV %R8,0x740(%RSP) |
0x4258c2 VPBROADCASTQ %R8,%ZMM0 |
0x4258c8 VMOVDQA64 %ZMM0,0x240(%RSP) |
0x4258d0 MOV %RDX,0x380(%RSP) |
0x4258d8 LEA (,%RDX,8),%RDX |
0x4258e0 LEA -0x2(%RCX),%R8 |
0x4258e4 MOV %R8,0x340(%RSP) |
0x4258ec SAL $0x3,%RCX |
0x4258f0 SUB %RCX,%RDX |
0x4258f3 MOV 0x28(%RSP),%RCX |
0x4258f8 LEA 0x18(%RCX,%RDX,1),%RCX |
0x4258fd MOV %RCX,0x700(%RSP) |
0x425905 MOV $0x3,%ECX |
0x42590a SUB %RAX,%RCX |
0x42590d MOV %RCX,0x6c0(%RSP) |
0x425915 MOV $0x2,%ECX |
0x42591a SUB %RAX,%RCX |
0x42591d MOV %RCX,0x680(%RSP) |
0x425925 ADD $-0x2,%RAX |
0x425929 MOV %RAX,0x300(%RSP) |
0x425931 MOV 0x78(%RSP),%RAX |
0x425936 LEA 0x18(%RAX,%RDX,1),%RAX |
0x42593b MOV %RAX,0x640(%RSP) |
0x425943 MOV 0x30(%RSP),%RAX |
0x425948 LEA 0x18(%RAX,%RDX,1),%RAX |
0x42594d MOV %RAX,0x600(%RSP) |
0x425955 MOV 0x58(%RSP),%RAX |
0x42595a LEA 0x10(%RAX,%RDX,1),%RAX |
0x42595f MOV %RAX,0x5c0(%RSP) |
0x425967 MOV 0x48(%RSP),%RAX |
0x42596c LEA 0x10(%RAX,%RDX,1),%RAX |
0x425971 MOV %RAX,0x580(%RSP) |
0x425979 MOV 0x50(%RSP),%RAX |
0x42597e LEA 0x10(%RAX,%RDX,1),%RAX |
0x425983 MOV %RAX,0x540(%RSP) |
0x42598b MOV 0x40(%RSP),%RAX |
0x425990 LEA 0x10(%RAX,%RDX,1),%RAX |
0x425995 MOV %RAX,0x500(%RSP) |
0x42599d MOV 0x38(%RSP),%RAX |
0x4259a2 LEA 0x10(%RAX,%RDX,1),%RAX |
0x4259a7 MOV %RAX,0x4c0(%RSP) |
0x4259af MOV 0x60(%RSP),%RAX |
0x4259b4 LEA 0x10(%RAX,%RDX,1),%RAX |
0x4259b9 MOV %RAX,0x480(%RSP) |
0x4259c1 MOV 0x68(%RSP),%RAX |
0x4259c6 LEA 0x10(%RAX,%RDX,1),%RAX |
0x4259cb MOV %RAX,0x440(%RSP) |
0x4259d3 MOV 0x70(%RSP),%RAX |
0x4259d8 LEA 0x10(%RAX,%RDX,1),%RAX |
0x4259dd MOV %RAX,0x400(%RSP) |
0x4259e5 VMOVSD 0xdf2eb(%RIP),%XMM6 |
0x4259ed XOR %EBX,%EBX |
0x4259ef MOV %RSI,0x3c0(%RSP) |
0x4259f7 MOV %ESI,%R11D |
0x4259fa JMP 425a15 |
0x4259fc NOPL (%RAX) |
(118) 0x425a00 LEA 0x1(%RBX),%EAX |
(118) 0x425a03 INC %R11D |
(118) 0x425a06 CMP 0x108(%RSP),%EBX |
(118) 0x425a0d MOV %EAX,%EBX |
(118) 0x425a0f JE 424cce |
(118) 0x425a15 CMPL $0,0xc0(%RSP) |
(118) 0x425a1d JS 425a00 |
(118) 0x425a1f MOV 0x150(%RSP),%RAX |
(118) 0x425a27 MOV (%RAX),%RCX |
(118) 0x425a2a MOV 0x158(%RSP),%RAX |
(118) 0x425a32 MOV (%RAX),%R9 |
(118) 0x425a35 MOV 0x148(%RSP),%RAX |
(118) 0x425a3d VMULSD (%RAX),%XMM6,%XMM20 |
(118) 0x425a43 MOV 0x160(%RSP),%RAX |
(118) 0x425a4b MOV (%RAX),%RDI |
(118) 0x425a4e MOV 0x168(%RSP),%RAX |
(118) 0x425a56 MOV (%RAX),%R15 |
(118) 0x425a59 MOV 0x170(%RSP),%RAX |
(118) 0x425a61 MOV (%RAX),%RSI |
(118) 0x425a64 MOV 0x178(%RSP),%RAX |
(118) 0x425a6c MOV (%RAX),%R12 |
(118) 0x425a6f MOV 0x180(%RSP),%RAX |
(118) 0x425a77 MOV (%RAX),%R10 |
(118) 0x425a7a MOV 0x188(%RSP),%RAX |
(118) 0x425a82 MOV (%RAX),%R14 |
(118) 0x425a85 MOV 0x190(%RSP),%RAX |
(118) 0x425a8d MOV (%RAX),%R13 |
(118) 0x425a90 MOV 0x198(%RSP),%RAX |
(118) 0x425a98 MOV (%RAX),%RDX |
(118) 0x425a9b MOV 0x1a0(%RSP),%RAX |
(118) 0x425aa3 MOV (%RAX),%RAX |
(118) 0x425aa6 CMPQ $0,0xc8(%RSP) |
(118) 0x425aaf MOV %RAX,0xb8(%RSP) |
(118) 0x425ab7 MOV %RDX,0xb0(%RSP) |
(118) 0x425abf MOV %R13,0xa8(%RSP) |
(118) 0x425ac7 MOV %R12,0xa0(%RSP) |
(118) 0x425acf JE 425d80 |
(118) 0x425ad5 MOV %RBX,0x90(%RSP) |
(118) 0x425add MOV %R11D,0x98(%RSP) |
(118) 0x425ae5 MOVSXD %R11D,%R8 |
(118) 0x425ae8 MOV %RAX,%R11 |
(118) 0x425aeb MOV 0x6c0(%RSP),%RAX |
(118) 0x425af3 ADD %R8,%RAX |
(118) 0x425af6 ADD 0x680(%RSP),%R8 |
(118) 0x425afe VBROADCASTSD %XMM20,%ZMM21 |
(118) 0x425b04 MOV %RDI,0xd0(%RSP) |
(118) 0x425b0c MOV %R9,%RDI |
(118) 0x425b0f MOV %R15,%R9 |
(118) 0x425b12 IMUL %RAX,%R9 |
(118) 0x425b16 MOV %R10,0xd8(%RSP) |
(118) 0x425b1e MOV %RAX,%R10 |
(118) 0x425b21 MOV %RAX,0xe8(%RSP) |
(118) 0x425b29 MOV 0x700(%RSP),%RAX |
(118) 0x425b31 ADD %RAX,%R9 |
(118) 0x425b34 MOV %R15,0x100(%RSP) |
(118) 0x425b3c IMUL %R8,%R15 |
(118) 0x425b40 ADD %RAX,%R15 |
(118) 0x425b43 MOV %RCX,0xf8(%RSP) |
(118) 0x425b4b IMUL %R8,%RCX |
(118) 0x425b4f ADD 0x640(%RSP),%RCX |
(118) 0x425b57 MOV %RDI,%RBX |
(118) 0x425b5a IMUL %R8,%RBX |
(118) 0x425b5e MOV 0x600(%RSP),%RAX |
(118) 0x425b66 ADD %RAX,%RBX |
(118) 0x425b69 MOV %RDI,0xf0(%RSP) |
(118) 0x425b71 IMUL %R10,%RDI |
(118) 0x425b75 ADD %RAX,%RDI |
(118) 0x425b78 IMUL %R8,%R11 |
(118) 0x425b7c ADD 0x5c0(%RSP),%R11 |
(118) 0x425b84 MOV %R11,0x10(%RSP) |
(118) 0x425b89 IMUL %R8,%RDX |
(118) 0x425b8d ADD 0x580(%RSP),%RDX |
(118) 0x425b95 MOV %RDX,0x118(%RSP) |
(118) 0x425b9d IMUL %R8,%R13 |
(118) 0x425ba1 ADD 0x540(%RSP),%R13 |
(118) 0x425ba9 MOV %R13,0x110(%RSP) |
(118) 0x425bb1 IMUL %R8,%R12 |
(118) 0x425bb5 ADD 0x500(%RSP),%R12 |
(118) 0x425bbd MOV %R14,0x88(%RSP) |
(118) 0x425bc5 MOV %R14,%RAX |
(118) 0x425bc8 IMUL %R8,%RAX |
(118) 0x425bcc ADD 0x4c0(%RSP),%RAX |
(118) 0x425bd4 MOV 0xc8(%RSP),%RDX |
(118) 0x425bdc MOV 0xd8(%RSP),%R10 |
(118) 0x425be4 IMUL %R8,%R10 |
(118) 0x425be8 ADD 0x480(%RSP),%R10 |
(118) 0x425bf0 MOV %RSI,0x80(%RSP) |
(118) 0x425bf8 IMUL %R8,%RSI |
(118) 0x425bfc ADD 0x440(%RSP),%RSI |
(118) 0x425c04 MOV 0xe8(%RSP),%R11 |
(118) 0x425c0c MOV 0xd0(%RSP),%R13 |
(118) 0x425c14 IMUL %R13,%R11 |
(118) 0x425c18 MOV 0x400(%RSP),%R14 |
(118) 0x425c20 ADD %R14,%R11 |
(118) 0x425c23 IMUL %R13,%R8 |
(118) 0x425c27 ADD %R14,%R8 |
(118) 0x425c2a MOV %R8,%R13 |
(118) 0x425c2d XOR %R14D,%R14D |
(119) 0x425c30 VMOVUPD -0x8(%RDI,%R14,8),%ZMM2 |
(119) 0x425c3b VMOVUPD (%RDI,%R14,8),%ZMM22 |
(119) 0x425c42 VADDPD -0x8(%RBX,%R14,8),%ZMM2,%ZMM2 |
(119) 0x425c4d VMULPD -0x8(%RCX,%R14,8),%ZMM21,%ZMM23 |
(119) 0x425c58 VADDPD (%RBX,%R14,8),%ZMM22,%ZMM22 |
(119) 0x425c5f VMULPD (%RCX,%R14,8),%ZMM21,%ZMM24 |
(119) 0x425c66 VMOVUPD (%R15,%R14,8),%ZMM25 |
(119) 0x425c6d VADDPD -0x8(%R15,%R14,8),%ZMM25,%ZMM25 |
(119) 0x425c78 VMULPD (%R13,%R14,8),%ZMM21,%ZMM26 |
(119) 0x425c80 VMULPD %ZMM25,%ZMM26,%ZMM25 |
(119) 0x425c86 VFMADD231PD %ZMM23,%ZMM2,%ZMM25 |
(119) 0x425c8c VMOVUPD (%R9,%R14,8),%ZMM2 |
(119) 0x425c93 VADDPD -0x8(%R9,%R14,8),%ZMM2,%ZMM2 |
(119) 0x425c9e VMULPD (%R11,%R14,8),%ZMM21,%ZMM23 |
(119) 0x425ca5 VFNMADD231PD %ZMM24,%ZMM22,%ZMM25 |
(119) 0x425cab VFMSUB213PD %ZMM25,%ZMM2,%ZMM23 |
(119) 0x425cb1 VMOVUPD (%RSI,%R14,8),%ZMM2 |
(119) 0x425cb8 VMOVUPD (%RAX,%R14,8),%ZMM22 |
(119) 0x425cbf VADDPD (%R12,%R14,8),%ZMM22,%ZMM22 |
(119) 0x425cc6 VMULPD %ZMM22,%ZMM23,%ZMM22 |
(119) 0x425ccc VMULPD (%R10,%R14,8),%ZMM2,%ZMM24 |
(119) 0x425cd3 VDIVPD %ZMM24,%ZMM22,%ZMM22 |
(119) 0x425cd9 VADDPD %ZMM2,%ZMM23,%ZMM2 |
(119) 0x425cdf MOV 0x110(%RSP),%R8 |
(119) 0x425ce7 VMOVUPD (%R8,%R14,8),%ZMM23 |
(119) 0x425cee VSUBPD %ZMM22,%ZMM23,%ZMM22 |
(119) 0x425cf4 VDIVPD %ZMM2,%ZMM24,%ZMM2 |
(119) 0x425cfa MOV 0x118(%RSP),%R8 |
(119) 0x425d02 VMOVUPD %ZMM22,(%R8,%R14,8) |
(119) 0x425d09 MOV 0x10(%RSP),%R8 |
(119) 0x425d0e VMOVUPD %ZMM2,(%R8,%R14,8) |
(119) 0x425d15 ADD $0x8,%R14 |
(119) 0x425d19 CMP %RDX,%R14 |
(119) 0x425d1c JB 425c30 |
(118) 0x425d22 MOV %RDX,%R8 |
(118) 0x425d25 CMP 0x740(%RSP),%RDX |
(118) 0x425d2d MOV 0x98(%RSP),%R11D |
(118) 0x425d35 MOV 0x90(%RSP),%RBX |
(118) 0x425d3d MOV 0x88(%RSP),%R14 |
(118) 0x425d45 MOV 0xd8(%RSP),%R10 |
(118) 0x425d4d MOV 0x80(%RSP),%RSI |
(118) 0x425d55 MOV 0xd0(%RSP),%RDI |
(118) 0x425d5d MOV 0x100(%RSP),%R15 |
(118) 0x425d65 MOV 0xf8(%RSP),%RCX |
(118) 0x425d6d MOV 0xf0(%RSP),%R9 |
(118) 0x425d75 JE 425a00 |
(118) 0x425d7b JMP 425d83 |
0x425d7d NOPL (%RAX) |
(118) 0x425d80 XOR %R8D,%R8D |
(118) 0x425d83 VPBROADCASTQ %R8,%ZMM2 |
(118) 0x425d89 VMOVDQA64 0x240(%RSP),%ZMM0 |
(118) 0x425d91 VPSUBQ %ZMM2,%ZMM0,%ZMM2 |
(118) 0x425d97 VPCMPNLEUQ 0xdef5e(%RIP),%ZMM2,%K1 |
(118) 0x425da2 KORTESTB %K1,%K1 |
(118) 0x425da6 JE 425a00 |
(118) 0x425dac MOV 0x3c0(%RSP),%RAX |
(118) 0x425db4 ADD %EBX,%EAX |
(118) 0x425db6 MOV %RDI,%R13 |
(118) 0x425db9 MOV %RCX,%RDI |
(118) 0x425dbc MOV %R9,%RDX |
(118) 0x425dbf MOV %RSI,%R9 |
(118) 0x425dc2 MOVSXD %EAX,%R12 |
(118) 0x425dc5 SUB 0x300(%RSP),%R12 |
(118) 0x425dcd LEA 0x1(%R12),%RCX |
(118) 0x425dd2 MOV %RCX,0x10(%RSP) |
(118) 0x425dd7 MOV %RDX,%RAX |
(118) 0x425dda IMUL %RCX,%RAX |
(118) 0x425dde MOV %R10,%RCX |
(118) 0x425de1 MOV 0x30(%RSP),%RSI |
(118) 0x425de6 ADD %RSI,%RAX |
(118) 0x425de9 ADD 0x380(%RSP),%R8 |
(118) 0x425df1 SUB 0x340(%RSP),%R8 |
(118) 0x425df9 VMOVUPD (%RAX,%R8,8),%ZMM21{%K1}{z} |
(118) 0x425e00 VMOVUPD 0x8(%RAX,%R8,8),%ZMM22{%K1}{z} |
(118) 0x425e0b IMUL %R12,%RDX |
(118) 0x425e0f ADD %RSI,%RDX |
(118) 0x425e12 VMOVUPD (%RDX,%R8,8),%ZMM25{%K1}{z} |
(118) 0x425e19 VMOVUPD 0x8(%RDX,%R8,8),%ZMM23{%K1}{z} |
(118) 0x425e24 IMUL %R12,%RDI |
(118) 0x425e28 ADD 0x78(%RSP),%RDI |
(118) 0x425e2d VMOVUPD (%RDI,%R8,8),%ZMM26{%K1}{z} |
(118) 0x425e34 VMOVUPD 0x8(%RDI,%R8,8),%ZMM24{%K1}{z} |
(118) 0x425e3f MOV %R15,%RAX |
(118) 0x425e42 IMUL %R12,%RAX |
(118) 0x425e46 MOV 0xa8(%RSP),%RDI |
(118) 0x425e4e MOV 0x28(%RSP),%RSI |
(118) 0x425e53 ADD %RSI,%RAX |
(118) 0x425e56 VMOVUPD 0x8(%RAX,%R8,8),%ZMM27{%K1}{z} |
(118) 0x425e61 VMOVUPD (%RAX,%R8,8),%ZMM28{%K1}{z} |
(118) 0x425e68 MOV %R13,%RAX |
(118) 0x425e6b IMUL %R12,%RAX |
(118) 0x425e6f MOV 0x70(%RSP),%RDX |
(118) 0x425e74 ADD %RDX,%RAX |
(118) 0x425e77 VMOVUPD (%RAX,%R8,8),%ZMM29{%K1}{z} |
(118) 0x425e7e MOV 0x10(%RSP),%RAX |
(118) 0x425e83 IMUL %RAX,%R15 |
(118) 0x425e87 ADD %RSI,%R15 |
(118) 0x425e8a VMOVUPD 0x8(%R15,%R8,8),%ZMM30{%K1}{z} |
(118) 0x425e95 VMOVUPD (%R15,%R8,8),%ZMM31{%K1}{z} |
(118) 0x425e9c IMUL %RAX,%R13 |
(118) 0x425ea0 ADD %RDX,%R13 |
(118) 0x425ea3 VMOVUPD (%R13,%R8,8),%ZMM2{%K1}{z} |
(118) 0x425eab IMUL %R12,%R9 |
(118) 0x425eaf ADD 0x68(%RSP),%R9 |
(118) 0x425eb4 VMOVUPD (%R9,%R8,8),%ZMM1{%K1}{z} |
(118) 0x425ebb IMUL %R12,%RCX |
(118) 0x425ebf ADD 0x60(%RSP),%RCX |
(118) 0x425ec4 VMOVUPD (%RCX,%R8,8),%ZMM0{%K1}{z} |
(118) 0x425ecb IMUL %R12,%R14 |
(118) 0x425ecf ADD 0x38(%RSP),%R14 |
(118) 0x425ed4 VMOVUPD (%R14,%R8,8),%ZMM3{%K1}{z} |
(118) 0x425edb MOV 0xa0(%RSP),%RAX |
(118) 0x425ee3 IMUL %R12,%RAX |
(118) 0x425ee7 ADD 0x40(%RSP),%RAX |
(118) 0x425eec VMOVUPD (%RAX,%R8,8),%ZMM4{%K1}{z} |
(118) 0x425ef3 IMUL %R12,%RDI |
(118) 0x425ef7 ADD 0x50(%RSP),%RDI |
(118) 0x425efc VMOVUPD (%RDI,%R8,8),%ZMM5{%K1}{z} |
(118) 0x425f03 VMOVAPD 0x880(%RSP),%ZMM7 |
(118) 0x425f0b VMOVAPD %ZMM21,%ZMM7{%K1} |
(118) 0x425f11 VMOVAPD 0x280(%RSP),%ZMM21 |
(118) 0x425f19 VMOVAPD %ZMM25,%ZMM21{%K1} |
(118) 0x425f1f VMOVAPD 0x840(%RSP),%ZMM8 |
(118) 0x425f27 VMOVAPD %ZMM26,%ZMM8{%K1} |
(118) 0x425f2d VMOVAPD %ZMM27,%ZMM9{%K1} |
(118) 0x425f33 VMOVAPD %ZMM7,0x880(%RSP) |
(118) 0x425f3b VMOVAPD %ZMM21,0x280(%RSP) |
(118) 0x425f43 VADDPD %ZMM21,%ZMM7,%ZMM21 |
(118) 0x425f49 VBROADCASTSD %XMM20,%ZMM20 |
(118) 0x425f4f VMOVAPD %ZMM28,%ZMM10{%K1} |
(118) 0x425f55 VADDPD %ZMM10,%ZMM9,%ZMM25 |
(118) 0x425f5b VMOVAPD %ZMM29,%ZMM11{%K1} |
(118) 0x425f61 VMULPD %ZMM11,%ZMM20,%ZMM26 |
(118) 0x425f67 VMULPD %ZMM25,%ZMM26,%ZMM25 |
(118) 0x425f6d VMOVAPD %ZMM8,0x840(%RSP) |
(118) 0x425f75 VMULPD %ZMM8,%ZMM20,%ZMM26 |
(118) 0x425f7b VFMADD231PD %ZMM26,%ZMM21,%ZMM25 |
(118) 0x425f81 VMOVAPD 0x800(%RSP),%ZMM7 |
(118) 0x425f89 VMOVAPD %ZMM22,%ZMM7{%K1} |
(118) 0x425f8f VMOVAPD 0x7c0(%RSP),%ZMM8 |
(118) 0x425f97 VMOVAPD %ZMM23,%ZMM8{%K1} |
(118) 0x425f9d VMOVAPD %ZMM7,0x800(%RSP) |
(118) 0x425fa5 VMOVAPD %ZMM8,0x7c0(%RSP) |
(118) 0x425fad VADDPD %ZMM8,%ZMM7,%ZMM21 |
(118) 0x425fb3 VMOVAPD 0x780(%RSP),%ZMM7 |
(118) 0x425fbb VMOVAPD %ZMM24,%ZMM7{%K1} |
(118) 0x425fc1 VMOVAPD %ZMM7,0x780(%RSP) |
(118) 0x425fc9 VMULPD %ZMM7,%ZMM20,%ZMM22 |
(118) 0x425fcf VFNMADD231PD %ZMM22,%ZMM21,%ZMM25 |
(118) 0x425fd5 VMOVAPD %ZMM30,%ZMM12{%K1} |
(118) 0x425fdb VMOVAPD %ZMM31,%ZMM13{%K1} |
(118) 0x425fe1 VMOVAPD %ZMM2,%ZMM14{%K1} |
(118) 0x425fe7 VADDPD %ZMM13,%ZMM12,%ZMM2 |
(118) 0x425fed VMULPD %ZMM14,%ZMM20,%ZMM20 |
(118) 0x425ff3 VFMSUB213PD %ZMM25,%ZMM2,%ZMM20 |
(118) 0x425ff9 VMOVAPD %ZMM1,%ZMM15{%K1} |
(118) 0x425fff VMOVAPD %ZMM0,%ZMM16{%K1} |
(118) 0x426005 VMOVAPD %ZMM3,%ZMM17{%K1} |
(118) 0x42600b VMOVAPD %ZMM4,%ZMM18{%K1} |
(118) 0x426011 VADDPD %ZMM18,%ZMM17,%ZMM0 |
(118) 0x426017 VMULPD %ZMM0,%ZMM20,%ZMM0 |
(118) 0x42601d VMULPD %ZMM16,%ZMM15,%ZMM1 |
(118) 0x426023 VDIVPD %ZMM1,%ZMM0,%ZMM0 |
(118) 0x426029 VMOVAPD %ZMM5,%ZMM19{%K1} |
(118) 0x42602f VSUBPD %ZMM0,%ZMM19,%ZMM0 |
(118) 0x426035 MOV 0xb0(%RSP),%RAX |
(118) 0x42603d IMUL %R12,%RAX |
(118) 0x426041 ADD 0x48(%RSP),%RAX |
(118) 0x426046 VMOVUPD %ZMM0,(%RAX,%R8,8){%K1} |
(118) 0x42604d MOV 0xb8(%RSP),%RAX |
(118) 0x426055 IMUL %R12,%RAX |
(118) 0x426059 VADDPD %ZMM15,%ZMM20,%ZMM0 |
(118) 0x42605f VDIVPD %ZMM0,%ZMM1,%ZMM0 |
(118) 0x426065 ADD 0x58(%RSP),%RAX |
(118) 0x42606a VMOVUPD %ZMM0,(%RAX,%R8,8){%K1} |
(118) 0x426071 JMP 425a00 |
0x426076 NOPW %CS:(%RAX,%RAX,1) |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_invoke_task_func | libiomp5.so |
Path / |
Source file and lines | PdV_kernel.f90:67-139 |
Module | exec |
nb instructions | 311 |
nb uops | 316 |
loop length | 1768 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 0 |
used zmm registers | 1 |
nb stack references | 119 |
micro-operation queue | 52.67 cycles |
front end | 52.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 13.30 | 24.00 | 26.33 | 26.33 | 50.50 | 13.20 | 13.30 | 50.50 | 50.50 | 50.50 | 13.20 | 26.33 |
cycles | 13.30 | 32.93 | 26.33 | 26.33 | 50.50 | 13.20 | 13.30 | 50.50 | 50.50 | 50.50 | 13.20 | 26.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 52.02-52.04 |
Stall cycles | 0.00 |
Front-end | 52.67 |
Dispatch | 50.50 |
Overall L1 | 52.67 |
all | 2% |
load | 0% |
store | 2% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 5% |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 2% |
load | 0% |
store | 2% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 5% |
all | 12% |
load | 5% |
store | 13% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 9% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 12% |
load | 7% |
store | 13% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 9% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x980,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0xf8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x1a0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xf0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x198(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x190(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x188(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x180(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x170(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x88(%RBP),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x80(%RBP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TESTB $0x1,0xa0(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 2 | 0.33 |
MOV 0xc0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x168(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb8(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa8(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x98(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x90(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x78(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x68(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JNE 424c40 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x260> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x160(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x7c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x158(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x780(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x138(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0,0x12c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %EAX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 424cea <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x30a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RCX,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R9,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDI,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,0x1c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0x1,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x130(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x134(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x24(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x20(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x747130,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,0x12c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 4045a0 <__kmpc_for_static_init_4@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x1c(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RSP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %EAX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ECX,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 424d40 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x360> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x747150,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x124(%RSP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 424cda <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x2fa> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOVL $0,0x134(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %EAX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 424cea <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x30a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RCX,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R9,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDI,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,0x24(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0x1,0x130(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x138(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x13c(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x2c(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x28(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x7470d0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,0x2c8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 4045a0 <__kmpc_for_static_init_4@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x24(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RSP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %EAX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ECX,0x108(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 425880 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0xea0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x7470f0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x2c0(%RSP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 404190 <__kmpc_for_static_fini@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0xe0(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x747170,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 404660 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV (%RBX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x747110,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
JMP 404660 <__kmpc_barrier@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD %EBX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOVSXD (%R15),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R14),%R15D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %EDX,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x1(%R15),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP $0x2,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x1,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVGE %EAX,%R8D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R8D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $0x7ffffff8,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RAX,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD %R13D,%RAX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOVSXD %R12D,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV %R8,0x238(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPBROADCASTQ %R8,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQA64 %ZMM0,0x8c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV %RDX,0x1b8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%RDX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x2(%RCX),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R8,0x1b0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SAL $0x3,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SUB %RCX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x138(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x18(%RCX,%RDX,1),%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RCX,0x230(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x3,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,0x228(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x18(%RCX,%RDX,1),%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RCX,0x220(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x2,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,0x218(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD $-0x2,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RAX,0x1a8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x18(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x210(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x140(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x18(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x208(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x18(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x200(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x10(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x1f8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x10(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x1f0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x10(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x1e8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x10(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x1e0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x10(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x1d8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x10(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x1d0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x68(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x10(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x1c8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x10(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x280(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0xdfe09(%RIP),%XMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
XOR %R14D,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RSI,0x1c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %ESI,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R15,0x240(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 424f18 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x538> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD %EBX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOVSXD (%R15),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R14),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %EDX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0x2,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x1,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVGE %EAX,%R8D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R8D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $0x7ffffff8,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RAX,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD %R13D,%RAX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOVSXD %R12D,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV %R8,0x740(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPBROADCASTQ %R8,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQA64 %ZMM0,0x240(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV %RDX,0x380(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%RDX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x2(%RCX),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R8,0x340(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SAL $0x3,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SUB %RCX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x28(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x18(%RCX,%RDX,1),%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RCX,0x700(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x3,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,0x6c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x2,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,0x680(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD $-0x2,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RAX,0x300(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x18(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x640(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x18(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x600(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x10(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x5c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x10(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x580(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x10(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x540(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x10(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x500(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x10(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x4c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x10(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x480(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x68(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x10(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x440(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x10(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x400(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0xdf2eb(%RIP),%XMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
XOR %EBX,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RSI,0x3c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %ESI,%R11D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 425a15 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x1035> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | PdV_kernel.f90:67-139 |
Module | exec |
nb instructions | 311 |
nb uops | 316 |
loop length | 1768 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 0 |
used zmm registers | 1 |
nb stack references | 119 |
micro-operation queue | 52.67 cycles |
front end | 52.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 13.30 | 24.00 | 26.33 | 26.33 | 50.50 | 13.20 | 13.30 | 50.50 | 50.50 | 50.50 | 13.20 | 26.33 |
cycles | 13.30 | 32.93 | 26.33 | 26.33 | 50.50 | 13.20 | 13.30 | 50.50 | 50.50 | 50.50 | 13.20 | 26.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 52.02-52.04 |
Stall cycles | 0.00 |
Front-end | 52.67 |
Dispatch | 50.50 |
Overall L1 | 52.67 |
all | 2% |
load | 0% |
store | 2% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 5% |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 2% |
load | 0% |
store | 2% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 5% |
all | 12% |
load | 5% |
store | 13% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 9% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 12% |
load | 7% |
store | 13% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 9% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x980,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0xf8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x1a0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xf0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x198(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x190(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x188(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x180(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x170(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x88(%RBP),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x80(%RBP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TESTB $0x1,0xa0(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 2 | 0.33 |
MOV 0xc0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x168(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb8(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa8(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x98(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x90(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x78(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x68(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JNE 424c40 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x260> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x160(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x7c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x158(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x780(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x138(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0,0x12c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %EAX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 424cea <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x30a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RCX,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R9,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDI,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,0x1c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0x1,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x130(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x134(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x24(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x20(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x747130,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,0x12c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 4045a0 <__kmpc_for_static_init_4@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x1c(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RSP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %EAX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ECX,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 424d40 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x360> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x747150,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x124(%RSP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 424cda <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x2fa> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOVL $0,0x134(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %EAX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 424cea <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x30a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RCX,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R9,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDI,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,0x24(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0x1,0x130(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x138(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x13c(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x2c(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x28(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x7470d0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,0x2c8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 4045a0 <__kmpc_for_static_init_4@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x24(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RSP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %EAX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ECX,0x108(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 425880 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0xea0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x7470f0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x2c0(%RSP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 404190 <__kmpc_for_static_fini@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0xe0(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x747170,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 404660 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV (%RBX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x747110,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
JMP 404660 <__kmpc_barrier@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD %EBX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOVSXD (%R15),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R14),%R15D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %EDX,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x1(%R15),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP $0x2,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x1,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVGE %EAX,%R8D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R8D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $0x7ffffff8,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RAX,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD %R13D,%RAX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOVSXD %R12D,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV %R8,0x238(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPBROADCASTQ %R8,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQA64 %ZMM0,0x8c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV %RDX,0x1b8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%RDX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x2(%RCX),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R8,0x1b0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SAL $0x3,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SUB %RCX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x138(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x18(%RCX,%RDX,1),%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RCX,0x230(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x3,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,0x228(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x18(%RCX,%RDX,1),%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RCX,0x220(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x2,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,0x218(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD $-0x2,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RAX,0x1a8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x18(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x210(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x140(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x18(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x208(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x18(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x200(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x10(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x1f8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x10(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x1f0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x10(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x1e8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x10(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x1e0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x10(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x1d8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x10(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x1d0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x68(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x10(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x1c8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x10(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x280(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0xdfe09(%RIP),%XMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
XOR %R14D,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RSI,0x1c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %ESI,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R15,0x240(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 424f18 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x538> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD %EBX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOVSXD (%R15),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R14),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %EDX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0x2,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x1,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVGE %EAX,%R8D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R8D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $0x7ffffff8,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RAX,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD %R13D,%RAX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOVSXD %R12D,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV %R8,0x740(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPBROADCASTQ %R8,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQA64 %ZMM0,0x240(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV %RDX,0x380(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%RDX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x2(%RCX),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R8,0x340(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SAL $0x3,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SUB %RCX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x28(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x18(%RCX,%RDX,1),%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RCX,0x700(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x3,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,0x6c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x2,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,0x680(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD $-0x2,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RAX,0x300(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x18(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x640(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x18(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x600(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x10(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x5c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x10(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x580(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x10(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x540(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x10(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x500(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x10(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x4c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x10(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x480(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x68(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x10(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x440(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x10(%RAX,%RDX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x400(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0xdf2eb(%RIP),%XMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
XOR %EBX,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RSI,0x3c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %ESI,%R11D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 425a15 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x1035> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼pdv_kernel_.DIR.OMP.PARALLEL.2– | 12.52 | 9.49 |
▼Loop 120 - PdV_kernel.f90:69-135 - exec– | 0 | 0 |
○Loop 121 - PdV_kernel.f90:111-135 - exec | 6.76 | 5.12 |
▼Loop 118 - PdV_kernel.f90:69-99 - exec– | 0 | 0 |
○Loop 119 - PdV_kernel.f90:69-99 - exec | 5.76 | 4.36 |