Function: calc_dt_kernel_.DIR.OMP.PARALLEL.2 | Module: exec | Source: calc_dt_kernel.f90:89-133 | Coverage: 3.32% |
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Function: calc_dt_kernel_.DIR.OMP.PARALLEL.2 | Module: exec | Source: calc_dt_kernel.f90:89-133 | Coverage: 3.32% |
---|
/scratch_na/users/xoserete/qaas_runs/171-415-7919/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/calc_dt_kernel.f90: 89 - 133 |
-------------------------------------------------------------------------------- |
89: !$OMP PARALLEL |
90: |
91: !$OMP DO PRIVATE(dsx,dsy,cc,dv1,dv2,div,dtct,dtut,dtvt,dtdivt) REDUCTION(MIN : dt_min_val) |
92: DO k=y_min,y_max |
93: !$OMP SIMD |
94: DO j=x_min,x_max |
95: |
96: dsx=celldx(j) |
97: dsy=celldy(k) |
98: |
99: cc=soundspeed(j,k)*soundspeed(j,k) |
100: cc=cc+2.0_8*viscosity_a(j,k)/density0(j,k) |
101: cc=MAX(SQRT(cc),g_small) |
102: |
103: dtct=dtc_safe*MIN(dsx,dsy)/cc |
104: |
105: div=0.0 |
106: |
107: dv1=(xvel0(j ,k)+xvel0(j ,k+1))*xarea(j ,k) |
108: dv2=(xvel0(j+1,k)+xvel0(j+1,k+1))*xarea(j+1,k) |
109: |
110: div=div+dv2-dv1 |
111: |
112: dtut=dtu_safe*2.0_8*volume(j,k)/MAX(ABS(dv1),ABS(dv2),g_small*volume(j,k)) |
113: |
114: dv1=(yvel0(j,k )+yvel0(j+1,k ))*yarea(j,k ) |
115: dv2=(yvel0(j,k+1)+yvel0(j+1,k+1))*yarea(j,k+1) |
116: |
117: div=div+dv2-dv1 |
118: |
119: dtvt=dtv_safe*2.0_8*volume(j,k)/MAX(ABS(dv1),ABS(dv2),g_small*volume(j,k)) |
120: |
121: div=div/(2.0_8*volume(j,k)) |
122: |
123: IF(div.LT.-g_small)THEN |
124: dtdivt=dtdiv_safe*(-1.0_8/div) |
125: ELSE |
126: dtdivt=g_big |
127: ENDIF |
128: |
129: dt_min_val=MIN(dt_min_val,dtct,dtut,dtvt,dtdivt) |
130: |
131: ENDDO |
132: ENDDO |
133: !$OMP END DO |
0x43a9f0 PUSH %RBP |
0x43a9f1 MOV %RSP,%RBP |
0x43a9f4 PUSH %R15 |
0x43a9f6 PUSH %R14 |
0x43a9f8 PUSH %R13 |
0x43a9fa PUSH %R12 |
0x43a9fc PUSH %RBX |
0x43a9fd AND $-0x40,%RSP |
0x43aa01 SUB $0x4c0,%RSP |
0x43aa08 MOV %RDI,%RBX |
0x43aa0b MOV 0xa0(%RBP),%R14D |
0x43aa12 MOV 0x98(%RBP),%EAX |
0x43aa18 SUB %R14D,%EAX |
0x43aa1b MOVL $0,0x44(%RSP) |
0x43aa23 JS 43ab16 |
0x43aa29 MOV %RBX,%RDX |
0x43aa2c MOV %RCX,%R15 |
0x43aa2f MOV %R9,%RBX |
0x43aa32 MOV %RDX,0x68(%RSP) |
0x43aa37 MOV (%RDX),%ESI |
0x43aa39 MOVL $0,0x30(%RSP) |
0x43aa41 MOV %EAX,0x2c(%RSP) |
0x43aa45 MOVL $0x1,0x40(%RSP) |
0x43aa4d SUB $0x8,%RSP |
0x43aa51 LEA 0x48(%RSP),%RAX |
0x43aa56 LEA 0x4c(%RSP),%RCX |
0x43aa5b LEA 0x38(%RSP),%R8 |
0x43aa60 LEA 0x34(%RSP),%R9 |
0x43aa65 MOV $0x7483d0,%EDI |
0x43aa6a MOV %ESI,0x3c(%RSP) |
0x43aa6e MOV $0x22,%EDX |
0x43aa73 PUSH $0x1 |
0x43aa75 PUSH $0x1 |
0x43aa77 PUSH %RAX |
0x43aa78 CALL 4045a0 <__kmpc_for_static_init_4@plt> |
0x43aa7d ADD $0x20,%RSP |
0x43aa81 MOV 0x30(%RSP),%R9D |
0x43aa86 MOV 0x2c(%RSP),%EDI |
0x43aa8a SUB %R9D,%EDI |
0x43aa8d JAE 43ab40 |
0x43aa93 VMOVSD 0xce5e3(%RIP),%XMM28 |
0x43aa9d VMOVSD %XMM28,0x60(%RSP) |
0x43aaa5 MOV $0x7483f0,%EDI |
0x43aaaa MOV 0x34(%RSP),%ESI |
0x43aaae VZEROUPPER |
0x43aab1 CALL 404190 <__kmpc_for_static_fini@plt> |
0x43aab6 MOV 0x68(%RSP),%RBX |
0x43aabb MOV (%RBX),%ESI |
0x43aabd SUB $0x8,%RSP |
0x43aac1 MOV $0x7a11a0,%RAX |
0x43aac8 LEA 0x68(%RSP),%R8 |
0x43aacd MOV $0x748410,%EDI |
0x43aad2 MOV $0x43a9e0,%R9D |
0x43aad8 MOV $0x1,%EDX |
0x43aadd MOV $0x8,%ECX |
0x43aae2 PUSH %RAX |
0x43aae3 CALL 404790 <__kmpc_reduce@plt> |
0x43aae8 ADD $0x10,%RSP |
0x43aaec CMP $0x1,%EAX |
0x43aaef JNE 43ab16 |
0x43aaf1 MOV 0x10(%RBP),%RAX |
0x43aaf5 VMOVSD 0x60(%RSP),%XMM0 |
0x43aafb VMINSD (%RAX),%XMM0,%XMM0 |
0x43aaff VMOVSD %XMM0,(%RAX) |
0x43ab03 MOV (%RBX),%ESI |
0x43ab05 MOV $0x7a11a0,%RDX |
0x43ab0c MOV $0x748430,%EDI |
0x43ab11 CALL 404900 <__kmpc_end_reduce@plt> |
0x43ab16 MOV (%RBX),%ESI |
0x43ab18 MOV $0x748450,%EDI |
0x43ab1d CALL 404660 <__kmpc_barrier@plt> |
0x43ab22 LEA -0x28(%RBP),%RSP |
0x43ab26 POP %RBX |
0x43ab27 POP %R12 |
0x43ab29 POP %R13 |
0x43ab2b POP %R14 |
0x43ab2d POP %R15 |
0x43ab2f POP %RBP |
0x43ab30 RET |
0x43ab31 NOPW %CS:(%RAX,%RAX,1) |
0x43ab40 MOV 0xb0(%RBP),%RAX |
0x43ab47 MOV 0xa8(%RBP),%RCX |
0x43ab4e MOV 0x60(%RBP),%R8 |
0x43ab52 MOV 0x58(%RBP),%R10 |
0x43ab56 MOV 0x50(%RBP),%R11 |
0x43ab5a MOVSXD (%RAX),%RSI |
0x43ab5d MOV (%RCX),%R12D |
0x43ab60 SUB %ESI,%R12D |
0x43ab63 ADD %R14D,%R9D |
0x43ab66 LEA -0x2(%R15),%EAX |
0x43ab6a CLTQ |
0x43ab6c MOV %RAX,0xf0(%RSP) |
0x43ab74 LEA 0x1(%R12),%EAX |
0x43ab79 CMP $0x2,%EAX |
0x43ab7c MOV $0x1,%R14D |
0x43ab82 CMOVGE %EAX,%R14D |
0x43ab86 MOV %R14D,%EAX |
0x43ab89 AND $0x7ffffff8,%EAX |
0x43ab8e MOVSXD %EBX,%RCX |
0x43ab91 MOVSXD %R15D,%RDX |
0x43ab94 MOV %R14,0xd8(%RSP) |
0x43ab9c VPBROADCASTQ %R14,%ZMM0 |
0x43aba2 VMOVDQA64 %ZMM0,0x140(%RSP) |
0x43abaa MOV %RSI,0x80(%RSP) |
0x43abb2 LEA (,%RSI,8),%RSI |
0x43abba LEA -0x2(%RCX),%RBX |
0x43abbe MOV %RBX,0x78(%RSP) |
0x43abc3 SAL $0x3,%RCX |
0x43abc7 SUB %RCX,%RSI |
0x43abca MOV $0x3,%ECX |
0x43abcf SUB %RDX,%RCX |
0x43abd2 MOV %RCX,0xd0(%RSP) |
0x43abda MOV $0x2,%ECX |
0x43abdf SUB %RDX,%RCX |
0x43abe2 MOV %RCX,0xc8(%RSP) |
0x43abea LEA -0x2(%RDX),%RCX |
0x43abee MOV %RCX,0x70(%RSP) |
0x43abf3 MOV 0x40(%RBP),%RCX |
0x43abf7 MOV 0x38(%RBP),%RDX |
0x43abfb MOV 0x30(%RBP),%RBX |
0x43abff MOV 0x28(%RBP),%R14 |
0x43ac03 MOV 0x20(%RBP),%R15 |
0x43ac07 MOV 0x18(%RBP),%R13 |
0x43ac0b LEA 0x18(%R13,%RSI,1),%R13 |
0x43ac10 MOV %R13,0xc0(%RSP) |
0x43ac18 MOV %R12,%R13 |
0x43ac1b LEA 0x18(%R8,%RSI,1),%R8 |
0x43ac20 MOV %R8,0xb8(%RSP) |
0x43ac28 LEA 0x18(%R15,%RSI,1),%R8 |
0x43ac2d MOV %R8,0xb0(%RSP) |
0x43ac35 LEA 0x10(%R10,%RSI,1),%R8 |
0x43ac3a MOV %EDI,%R10D |
0x43ac3d MOV %R8,0xa8(%RSP) |
0x43ac45 LEA 0x10(%RCX,%RSI,1),%RCX |
0x43ac4a MOV %RCX,0xa0(%RSP) |
0x43ac52 LEA 0x10(%RDX,%RSI,1),%RCX |
0x43ac57 MOV %RCX,0x98(%RSP) |
0x43ac5f LEA 0x10(%RBX,%RSI,1),%RCX |
0x43ac64 MOV %RCX,0x90(%RSP) |
0x43ac6c LEA 0x10(%R14,%RSI,1),%RCX |
0x43ac71 MOV %RCX,0x88(%RSP) |
0x43ac79 LEA 0x10(%R11,%RSI,1),%RCX |
0x43ac7e MOV %RCX,0x138(%RSP) |
0x43ac86 VMOVSD 0xce3f0(%RIP),%XMM28 |
0x43ac90 VBROADCASTSD 0xc976e(%RIP),%ZMM3 |
0x43ac9a VBROADCASTSD 0xcba7c(%RIP),%ZMM4 |
0x43aca4 XOR %R14D,%R14D |
0x43aca7 MOV %R9D,%R12D |
0x43acaa MOV %R9,0xe8(%RSP) |
0x43acb2 MOV %EDI,0x38(%RSP) |
0x43acb6 MOV %R13,0xe0(%RSP) |
0x43acbe MOV %RAX,0x48(%RSP) |
0x43acc3 JMP 43add1 |
0x43acc8 NOPW %CS:(%RAX,%RAX,1) |
0x43acd7 NOPW %CS:(%RAX,%RAX,1) |
0x43ace6 NOPW %CS:(%RAX,%RAX,1) |
0x43acf5 NOPW %CS:(%RAX,%RAX,1) |
(226) 0x43ad00 VPXOR %XMM0,%XMM0,%XMM0 |
(226) 0x43ad04 VMOVAPD %ZMM0,%ZMM28{%K1} |
(226) 0x43ad0a VEXTRACTF32X4 $0x3,%ZMM28,%XMM0 |
(226) 0x43ad11 VSHUFPD $0x1,%XMM0,%XMM0,%XMM1 |
(226) 0x43ad16 VEXTRACTF32X4 $0x2,%ZMM28,%XMM2 |
(226) 0x43ad1d VSHUFPD $0x1,%XMM2,%XMM2,%XMM5 |
(226) 0x43ad22 VMOVAPD %YMM28,%YMM6 |
(226) 0x43ad28 VEXTRACTF32X4 $0x1,%YMM28,%XMM6 |
(226) 0x43ad2f VSHUFPD $0x1,%XMM6,%XMM6,%XMM7 |
(226) 0x43ad34 VMOVAPD %XMM28,%XMM8 |
(226) 0x43ad3a VSHUFPD $0x1,%XMM28,%XMM28,%XMM9 |
(226) 0x43ad41 VMINSD %XMM28,%XMM9,%XMM10 |
(226) 0x43ad47 VCMPSD $0x3,%XMM28,%XMM28,%K1 |
(226) 0x43ad4e VMOVSD %XMM9,%XMM10,%XMM10{%K1} |
(226) 0x43ad54 VCMPSD $0x3,%XMM10,%XMM10,%K1 |
(226) 0x43ad5b VMINSD %XMM10,%XMM6,%XMM8 |
(226) 0x43ad60 VMOVSD %XMM6,%XMM8,%XMM8{%K1} |
(226) 0x43ad66 VCMPSD $0x3,%XMM8,%XMM8,%K1 |
(226) 0x43ad6d VMINSD %XMM8,%XMM7,%XMM6 |
(226) 0x43ad72 VMOVSD %XMM7,%XMM6,%XMM6{%K1} |
(226) 0x43ad78 VCMPSD $0x3,%XMM6,%XMM6,%K1 |
(226) 0x43ad7f VMINSD %XMM6,%XMM2,%XMM6 |
(226) 0x43ad83 VMOVSD %XMM2,%XMM6,%XMM6{%K1} |
(226) 0x43ad89 VCMPSD $0x3,%XMM6,%XMM6,%K1 |
(226) 0x43ad90 VMINSD %XMM6,%XMM5,%XMM2 |
(226) 0x43ad94 VMOVSD %XMM5,%XMM2,%XMM2{%K1} |
(226) 0x43ad9a VCMPSD $0x3,%XMM2,%XMM2,%K1 |
(226) 0x43ada1 VMINSD %XMM2,%XMM0,%XMM2 |
(226) 0x43ada5 VMOVSD %XMM0,%XMM2,%XMM2{%K1} |
(226) 0x43adab VCMPSD $0x3,%XMM2,%XMM2,%K1 |
(226) 0x43adb2 VMINSD %XMM2,%XMM1,%XMM28 |
(226) 0x43adb8 VMOVSD %XMM1,%XMM28,%XMM28{%K1} |
(226) 0x43adbe LEA 0x1(%R14),%ECX |
(226) 0x43adc2 INC %R12D |
(226) 0x43adc5 CMP %R10D,%R14D |
(226) 0x43adc8 MOV %ECX,%R14D |
(226) 0x43adcb JE 43aa9d |
(226) 0x43add1 TEST %R13D,%R13D |
(226) 0x43add4 JS 43adbe |
(226) 0x43add6 LEA (%R9,%R14,1),%ECX |
(226) 0x43adda MOVSXD %ECX,%RDI |
(226) 0x43addd MOV %RDI,%RCX |
(226) 0x43ade0 SUB 0xf0(%RSP),%RCX |
(226) 0x43ade8 MOV 0x48(%RBP),%RDX |
(226) 0x43adec VMOVSD (%RDX,%RCX,8),%XMM23 |
(226) 0x43adf3 MOV 0xb8(%RBP),%RCX |
(226) 0x43adfa MOV (%RCX),%RCX |
(226) 0x43adfd MOV %RCX,0x50(%RSP) |
(226) 0x43ae02 MOV 0xc0(%RBP),%RCX |
(226) 0x43ae09 MOV (%RCX),%RCX |
(226) 0x43ae0c MOV %RCX,0x58(%RSP) |
(226) 0x43ae11 MOV 0xc8(%RBP),%RCX |
(226) 0x43ae18 MOV %RAX,%R15 |
(226) 0x43ae1b MOV (%RCX),%RAX |
(226) 0x43ae1e MOV 0x90(%RBP),%RCX |
(226) 0x43ae25 VMOVSD (%RCX),%XMM26 |
(226) 0x43ae2b MOV 0x80(%RBP),%RCX |
(226) 0x43ae32 VMOVSD (%RCX),%XMM24 |
(226) 0x43ae38 MOV 0xd0(%RBP),%RCX |
(226) 0x43ae3f MOV (%RCX),%R11 |
(226) 0x43ae42 MOV 0xd8(%RBP),%RCX |
(226) 0x43ae49 MOV (%RCX),%RSI |
(226) 0x43ae4c MOV 0x78(%RBP),%RCX |
(226) 0x43ae50 VMOVSD (%RCX),%XMM25 |
(226) 0x43ae56 MOV 0xe0(%RBP),%RCX |
(226) 0x43ae5d MOV (%RCX),%R8 |
(226) 0x43ae60 MOV 0xe8(%RBP),%RCX |
(226) 0x43ae67 MOV (%RCX),%RDX |
(226) 0x43ae6a MOV 0xf0(%RBP),%RCX |
(226) 0x43ae71 MOV (%RCX),%RBX |
(226) 0x43ae74 MOV 0x70(%RBP),%RCX |
(226) 0x43ae78 VMOVSD (%RCX),%XMM22 |
(226) 0x43ae7e VXORPD 0xcb898(%RIP){1to2},%XMM26,%XMM27 |
(226) 0x43ae88 TEST %R15,%R15 |
(226) 0x43ae8b MOV %RAX,0x130(%RSP) |
(226) 0x43ae93 MOV %R8,0x128(%RSP) |
(226) 0x43ae9b MOV %RSI,0x120(%RSP) |
(226) 0x43aea3 MOV %R11,0x118(%RSP) |
(226) 0x43aeab JE 43b280 |
(226) 0x43aeb1 MOV %RDI,0x108(%RSP) |
(226) 0x43aeb9 MOV %R14,0x110(%RSP) |
(226) 0x43aec1 MOV %R12D,0x3c(%RSP) |
(226) 0x43aec6 MOVSXD %R12D,%R15 |
(226) 0x43aec9 MOV 0xd0(%RSP),%RCX |
(226) 0x43aed1 LEA (%RCX,%R15,1),%RDI |
(226) 0x43aed5 ADD 0xc8(%RSP),%R15 |
(226) 0x43aedd VBROADCASTSD %XMM28,%ZMM28 |
(226) 0x43aee3 VBROADCASTSD %XMM26,%ZMM29 |
(226) 0x43aee9 VBROADCASTSD %XMM23,%ZMM30 |
(226) 0x43aeef VBROADCASTSD %XMM24,%ZMM31 |
(226) 0x43aef5 VBROADCASTSD %XMM25,%ZMM2 |
(226) 0x43aefb VBROADCASTSD %XMM22,%ZMM1 |
(226) 0x43af01 VBROADCASTSD %XMM27,%ZMM0 |
(226) 0x43af07 MOV %RDX,%R14 |
(226) 0x43af0a IMUL %RDI,%R14 |
(226) 0x43af0e MOV 0xc0(%RSP),%RCX |
(226) 0x43af16 ADD %RCX,%R14 |
(226) 0x43af19 MOV %RDX,0xf8(%RSP) |
(226) 0x43af21 MOV %RDX,%R12 |
(226) 0x43af24 IMUL %R15,%R12 |
(226) 0x43af28 ADD %RCX,%R12 |
(226) 0x43af2b MOV %RSI,%RCX |
(226) 0x43af2e IMUL %R15,%RCX |
(226) 0x43af32 ADD 0xb8(%RSP),%RCX |
(226) 0x43af3a MOV %R11,%R10 |
(226) 0x43af3d IMUL %R15,%R10 |
(226) 0x43af41 MOV 0xb0(%RSP),%RSI |
(226) 0x43af49 ADD %RSI,%R10 |
(226) 0x43af4c MOV %R11,%RDX |
(226) 0x43af4f IMUL %RDI,%RDX |
(226) 0x43af53 ADD %RSI,%RDX |
(226) 0x43af56 IMUL %RBX,%RDI |
(226) 0x43af5a MOV 0xa8(%RSP),%RSI |
(226) 0x43af62 ADD %RSI,%RDI |
(226) 0x43af65 MOV %RBX,0x100(%RSP) |
(226) 0x43af6d IMUL %R15,%RBX |
(226) 0x43af71 ADD %RSI,%RBX |
(226) 0x43af74 MOV %R8,%R13 |
(226) 0x43af77 IMUL %R15,%R13 |
(226) 0x43af7b ADD 0xa0(%RSP),%R13 |
(226) 0x43af83 MOV %RAX,%RSI |
(226) 0x43af86 IMUL %R15,%RSI |
(226) 0x43af8a ADD 0x98(%RSP),%RSI |
(226) 0x43af92 MOV 0x58(%RSP),%R11 |
(226) 0x43af97 IMUL %R15,%R11 |
(226) 0x43af9b ADD 0x90(%RSP),%R11 |
(226) 0x43afa3 IMUL 0x50(%RSP),%R15 |
(226) 0x43afa9 ADD 0x88(%RSP),%R15 |
(226) 0x43afb1 XOR %R9D,%R9D |
(226) 0x43afb4 MOV 0x48(%RSP),%RAX |
(226) 0x43afb9 JMP 43b099 |
0x43afbe XCHG %AX,%AX |
(227) 0x43afc0 VMOVUPD (%R11,%R9,8),%ZMM15 |
(227) 0x43afc7 VADDPD %ZMM15,%ZMM15,%ZMM15 |
(227) 0x43afcd VDIVPD (%RSI,%R9,8),%ZMM15,%ZMM15 |
(227) 0x43afd4 MOV 0x138(%RSP),%R8 |
(227) 0x43afdc VMOVUPD (%R8,%R9,8),%ZMM16 |
(227) 0x43afe3 VMOVUPD (%R15,%R9,8),%ZMM17 |
(227) 0x43afea VFMADD231PD %ZMM17,%ZMM17,%ZMM15 |
(227) 0x43aff0 VSQRTPD %ZMM15,%ZMM15 |
(227) 0x43aff6 VMINPD %ZMM30,%ZMM16,%ZMM16 |
(227) 0x43affc VMULPD %ZMM16,%ZMM31,%ZMM16 |
(227) 0x43b002 VMAXPD %ZMM29,%ZMM15,%ZMM15 |
(227) 0x43b008 VDIVPD %ZMM15,%ZMM16,%ZMM15 |
(227) 0x43b00e VMULPD %ZMM2,%ZMM6,%ZMM16 |
(227) 0x43b014 VANDPD %ZMM3,%ZMM7,%ZMM7 |
(227) 0x43b01a VANDPD %ZMM3,%ZMM9,%ZMM9 |
(227) 0x43b020 VMULPD %ZMM29,%ZMM10,%ZMM10 |
(227) 0x43b026 VMAXPD %ZMM10,%ZMM9,%ZMM9 |
(227) 0x43b02c VMAXPD %ZMM9,%ZMM7,%ZMM7 |
(227) 0x43b032 VDIVPD %ZMM7,%ZMM16,%ZMM7 |
(227) 0x43b038 VMULPD %ZMM1,%ZMM6,%ZMM6 |
(227) 0x43b03e VANDPD %ZMM3,%ZMM8,%ZMM8 |
(227) 0x43b044 VANDPD %ZMM3,%ZMM11,%ZMM9 |
(227) 0x43b04a VMAXPD %ZMM10,%ZMM9,%ZMM9 |
(227) 0x43b050 VMAXPD %ZMM9,%ZMM8,%ZMM8 |
(227) 0x43b056 VDIVPD %ZMM8,%ZMM6,%ZMM6 |
(227) 0x43b05c VBROADCASTSD %XMM14,%ZMM8 |
(227) 0x43b062 VXORPD %ZMM4,%ZMM8,%ZMM8 |
(227) 0x43b068 VBROADCASTSD %XMM13,%ZMM9 |
(227) 0x43b06e VDIVPD %ZMM5,%ZMM8,%ZMM9{%K1} |
(227) 0x43b074 VMINPD %ZMM9,%ZMM6,%ZMM5 |
(227) 0x43b07a VMINPD %ZMM5,%ZMM7,%ZMM5 |
(227) 0x43b080 VMINPD %ZMM5,%ZMM15,%ZMM5 |
(227) 0x43b086 VMINPD %ZMM5,%ZMM28,%ZMM28 |
(227) 0x43b08c ADD $0x8,%R9 |
(227) 0x43b090 CMP %RAX,%R9 |
(227) 0x43b093 JAE 43b180 |
(227) 0x43b099 VMOVUPD -0x8(%RDX,%R9,8),%ZMM5 |
(227) 0x43b0a4 VMOVUPD (%RDX,%R9,8),%ZMM6 |
(227) 0x43b0ab VADDPD -0x8(%R10,%R9,8),%ZMM5,%ZMM5 |
(227) 0x43b0b6 VMULPD -0x8(%RCX,%R9,8),%ZMM5,%ZMM7 |
(227) 0x43b0c1 VADDPD (%R10,%R9,8),%ZMM6,%ZMM5 |
(227) 0x43b0c8 VMULPD (%RCX,%R9,8),%ZMM5,%ZMM9 |
(227) 0x43b0cf VMOVUPD (%R13,%R9,8),%ZMM10 |
(227) 0x43b0d7 VADDPD %ZMM10,%ZMM10,%ZMM6 |
(227) 0x43b0dd VMOVUPD (%R12,%R9,8),%ZMM5 |
(227) 0x43b0e4 VADDPD -0x8(%R12,%R9,8),%ZMM5,%ZMM5 |
(227) 0x43b0ef VMULPD (%RBX,%R9,8),%ZMM5,%ZMM8 |
(227) 0x43b0f6 VMOVUPD (%R14,%R9,8),%ZMM5 |
(227) 0x43b0fd VADDPD -0x8(%R14,%R9,8),%ZMM5,%ZMM5 |
(227) 0x43b108 VMULPD (%RDI,%R9,8),%ZMM5,%ZMM11 |
(227) 0x43b10f VADDPD %ZMM8,%ZMM7,%ZMM5 |
(227) 0x43b115 VSUBPD %ZMM5,%ZMM9,%ZMM5 |
(227) 0x43b11b VADDPD %ZMM11,%ZMM5,%ZMM5 |
(227) 0x43b121 VDIVPD %ZMM6,%ZMM5,%ZMM5 |
(227) 0x43b127 VCMPPD $0x1,%ZMM0,%ZMM5,%K1 |
(227) 0x43b12e KORTESTB %K1,%K1 |
(227) 0x43b132 JB 43b140 |
(227) 0x43b134 MOV 0x88(%RBP),%R8 |
(227) 0x43b13b VMOVSD (%R8),%XMM13 |
(227) 0x43b140 KORTESTB %K1,%K1 |
(227) 0x43b144 JE 43afc0 |
(227) 0x43b14a MOV 0x68(%RBP),%R8 |
(227) 0x43b14e VMOVSD (%R8),%XMM14 |
(227) 0x43b153 JMP 43afc0 |
0x43b158 NOPW %CS:(%RAX,%RAX,1) |
0x43b167 NOPW %CS:(%RAX,%RAX,1) |
0x43b176 NOPW %CS:(%RAX,%RAX,1) |
(226) 0x43b180 VMOVAPD %XMM28,%XMM0 |
(226) 0x43b186 VSHUFPD $0x1,%XMM28,%XMM28,%XMM1 |
(226) 0x43b18d VMINSD %XMM28,%XMM1,%XMM2 |
(226) 0x43b193 VCMPSD $0x3,%XMM28,%XMM28,%K1 |
(226) 0x43b19a VMOVSD %XMM1,%XMM2,%XMM2{%K1} |
(226) 0x43b1a0 VCMPSD $0x3,%XMM2,%XMM2,%K1 |
(226) 0x43b1a7 VMOVAPD %YMM28,%YMM0 |
(226) 0x43b1ad VEXTRACTF32X4 $0x1,%YMM28,%XMM0 |
(226) 0x43b1b4 VMINSD %XMM2,%XMM0,%XMM1 |
(226) 0x43b1b8 VMOVSD %XMM0,%XMM1,%XMM1{%K1} |
(226) 0x43b1be VCMPSD $0x3,%XMM1,%XMM1,%K1 |
(226) 0x43b1c5 VSHUFPD $0x1,%XMM0,%XMM0,%XMM0 |
(226) 0x43b1ca VMINSD %XMM1,%XMM0,%XMM1 |
(226) 0x43b1ce VMOVSD %XMM0,%XMM1,%XMM1{%K1} |
(226) 0x43b1d4 VCMPSD $0x3,%XMM1,%XMM1,%K1 |
(226) 0x43b1db VEXTRACTF32X4 $0x2,%ZMM28,%XMM0 |
(226) 0x43b1e2 VMINSD %XMM1,%XMM0,%XMM1 |
(226) 0x43b1e6 VMOVSD %XMM0,%XMM1,%XMM1{%K1} |
(226) 0x43b1ec VCMPSD $0x3,%XMM1,%XMM1,%K1 |
(226) 0x43b1f3 VSHUFPD $0x1,%XMM0,%XMM0,%XMM0 |
(226) 0x43b1f8 VMINSD %XMM1,%XMM0,%XMM1 |
(226) 0x43b1fc VMOVSD %XMM0,%XMM1,%XMM1{%K1} |
(226) 0x43b202 VCMPSD $0x3,%XMM1,%XMM1,%K1 |
(226) 0x43b209 VEXTRACTF32X4 $0x3,%ZMM28,%XMM0 |
(226) 0x43b210 VMINSD %XMM1,%XMM0,%XMM1 |
(226) 0x43b214 VMOVSD %XMM0,%XMM1,%XMM1{%K1} |
(226) 0x43b21a VCMPSD $0x3,%XMM1,%XMM1,%K1 |
(226) 0x43b221 VSHUFPD $0x1,%XMM0,%XMM0,%XMM0 |
(226) 0x43b226 VMINSD %XMM1,%XMM0,%XMM28 |
(226) 0x43b22c VMOVSD %XMM0,%XMM28,%XMM28{%K1} |
(226) 0x43b232 MOV %RAX,%R15 |
(226) 0x43b235 CMP 0xd8(%RSP),%RAX |
(226) 0x43b23d MOV 0xe8(%RSP),%R9 |
(226) 0x43b245 MOV 0x38(%RSP),%R10D |
(226) 0x43b24a MOV 0xe0(%RSP),%R13 |
(226) 0x43b252 MOV 0x3c(%RSP),%R12D |
(226) 0x43b257 MOV 0x110(%RSP),%R14 |
(226) 0x43b25f MOV 0x108(%RSP),%RDI |
(226) 0x43b267 MOV 0x100(%RSP),%RBX |
(226) 0x43b26f MOV 0xf8(%RSP),%RDX |
(226) 0x43b277 JE 43adbe |
(226) 0x43b27d JMP 43b288 |
0x43b27f NOP |
(226) 0x43b280 XOR %R15D,%R15D |
(226) 0x43b283 MOV 0x48(%RSP),%RAX |
(226) 0x43b288 VBROADCASTSD %XMM28,%ZMM28 |
(226) 0x43b28e VPBROADCASTQ %R15,%ZMM0 |
(226) 0x43b294 VMOVDQA64 0x140(%RSP),%ZMM1 |
(226) 0x43b29c VPSUBQ %ZMM0,%ZMM1,%ZMM0 |
(226) 0x43b2a2 VPCMPNLEUQ 0xcde13(%RIP),%ZMM0,%K1 |
(226) 0x43b2ad KORTESTB %K1,%K1 |
(226) 0x43b2b1 JE 43ad00 |
(226) 0x43b2b7 MOV %R10D,%R11D |
(226) 0x43b2ba ADD 0x80(%RSP),%R15 |
(226) 0x43b2c2 SUB 0x78(%RSP),%R15 |
(226) 0x43b2c7 SUB 0x70(%RSP),%RDI |
(226) 0x43b2cc LEA 0x1(%RDI),%RCX |
(226) 0x43b2d0 MOV %RDX,%R8 |
(226) 0x43b2d3 MOV 0x118(%RSP),%R10 |
(226) 0x43b2db MOV %R10,%RDX |
(226) 0x43b2de IMUL %RCX,%RDX |
(226) 0x43b2e2 MOV 0x20(%RBP),%RSI |
(226) 0x43b2e6 ADD %RSI,%RDX |
(226) 0x43b2e9 VMOVUPD (%RDX,%R15,8),%ZMM0{%K1}{z} |
(226) 0x43b2f0 VMOVUPD 0x8(%RDX,%R15,8),%ZMM1{%K1}{z} |
(226) 0x43b2fb IMUL %RDI,%R10 |
(226) 0x43b2ff ADD %RSI,%R10 |
(226) 0x43b302 VMOVUPD (%R10,%R15,8),%ZMM2{%K1}{z} |
(226) 0x43b309 VMOVUPD 0x8(%R10,%R15,8),%ZMM5{%K1}{z} |
(226) 0x43b314 MOV 0x120(%RSP),%RDX |
(226) 0x43b31c IMUL %RDI,%RDX |
(226) 0x43b320 ADD 0x60(%RBP),%RDX |
(226) 0x43b324 VMOVUPD (%RDX,%R15,8),%ZMM6{%K1}{z} |
(226) 0x43b32b VMOVUPD 0x8(%RDX,%R15,8),%ZMM7{%K1}{z} |
(226) 0x43b336 MOV 0x128(%RSP),%RDX |
(226) 0x43b33e IMUL %RDI,%RDX |
(226) 0x43b342 ADD 0x40(%RBP),%RDX |
(226) 0x43b346 VMOVUPD (%RDX,%R15,8),%ZMM8{%K1}{z} |
(226) 0x43b34d MOV %R8,%RDX |
(226) 0x43b350 IMUL %RDI,%RDX |
(226) 0x43b354 MOV 0x18(%RBP),%R10 |
(226) 0x43b358 ADD %R10,%RDX |
(226) 0x43b35b VMOVUPD 0x8(%RDX,%R15,8),%ZMM9{%K1}{z} |
(226) 0x43b366 VMOVUPD (%RDX,%R15,8),%ZMM10{%K1}{z} |
(226) 0x43b36d MOV %RBX,%RDX |
(226) 0x43b370 IMUL %RDI,%RDX |
(226) 0x43b374 MOV 0x58(%RBP),%RSI |
(226) 0x43b378 ADD %RSI,%RDX |
(226) 0x43b37b VMOVUPD (%RDX,%R15,8),%ZMM11{%K1}{z} |
(226) 0x43b382 IMUL %RCX,%R8 |
(226) 0x43b386 ADD %R10,%R8 |
(226) 0x43b389 VMOVUPD 0x8(%R8,%R15,8),%ZMM13{%K1}{z} |
(226) 0x43b394 VMOVUPD (%R8,%R15,8),%ZMM14{%K1}{z} |
(226) 0x43b39b IMUL %RCX,%RBX |
(226) 0x43b39f ADD %RSI,%RBX |
(226) 0x43b3a2 VMOVUPD (%RBX,%R15,8),%ZMM15{%K1}{z} |
(226) 0x43b3a9 VMOVAPD 0x400(%RSP),%ZMM16 |
(226) 0x43b3b1 VMOVAPD %ZMM0,%ZMM16{%K1} |
(226) 0x43b3b7 VMOVAPD 0x3c0(%RSP),%ZMM0 |
(226) 0x43b3bf VMOVAPD %ZMM2,%ZMM0{%K1} |
(226) 0x43b3c5 VMOVAPD 0x380(%RSP),%ZMM2 |
(226) 0x43b3cd VMOVAPD %ZMM6,%ZMM2{%K1} |
(226) 0x43b3d3 VMOVAPD %ZMM2,%ZMM6 |
(226) 0x43b3d9 VMOVAPD 0x340(%RSP),%ZMM2 |
(226) 0x43b3e1 VMOVAPD %ZMM1,%ZMM2{%K1} |
(226) 0x43b3e7 VMOVAPD 0x300(%RSP),%ZMM17 |
(226) 0x43b3ef VMOVAPD %ZMM5,%ZMM17{%K1} |
(226) 0x43b3f5 VMOVAPD 0x2c0(%RSP),%ZMM1 |
(226) 0x43b3fd VMOVAPD %ZMM7,%ZMM1{%K1} |
(226) 0x43b403 VMOVAPD %ZMM1,%ZMM7 |
(226) 0x43b409 VMOVAPD %ZMM8,%ZMM12{%K1} |
(226) 0x43b40f VMOVAPD %ZMM16,0x400(%RSP) |
(226) 0x43b417 VMOVAPD %ZMM0,0x3c0(%RSP) |
(226) 0x43b41f VADDPD %ZMM0,%ZMM16,%ZMM0 |
(226) 0x43b425 VMULPD %ZMM0,%ZMM6,%ZMM1 |
(226) 0x43b42b VMOVAPD 0x280(%RSP),%ZMM8 |
(226) 0x43b433 VMOVAPD %ZMM9,%ZMM8{%K1} |
(226) 0x43b439 VMOVAPD %ZMM2,0x340(%RSP) |
(226) 0x43b441 VMOVAPD %ZMM17,0x300(%RSP) |
(226) 0x43b449 VADDPD %ZMM17,%ZMM2,%ZMM0 |
(226) 0x43b44f VMULPD %ZMM7,%ZMM0,%ZMM30 |
(226) 0x43b455 VMOVAPD 0x240(%RSP),%ZMM9 |
(226) 0x43b45d VMOVAPD %ZMM10,%ZMM9{%K1} |
(226) 0x43b463 VADDPD %ZMM12,%ZMM12,%ZMM0 |
(226) 0x43b469 VMOVAPD 0x200(%RSP),%ZMM10 |
(226) 0x43b471 VMOVAPD %ZMM11,%ZMM10{%K1} |
(226) 0x43b477 VADDPD %ZMM9,%ZMM8,%ZMM2 |
(226) 0x43b47d VMULPD %ZMM2,%ZMM10,%ZMM2 |
(226) 0x43b483 VMOVAPD 0x1c0(%RSP),%ZMM5 |
(226) 0x43b48b VMOVAPD %ZMM13,%ZMM5{%K1} |
(226) 0x43b491 VMOVAPD 0x180(%RSP),%ZMM11 |
(226) 0x43b499 VMOVAPD %ZMM14,%ZMM11{%K1} |
(226) 0x43b49f VMOVAPD %ZMM5,0x1c0(%RSP) |
(226) 0x43b4a7 VMOVAPD %ZMM11,0x180(%RSP) |
(226) 0x43b4af VADDPD %ZMM11,%ZMM5,%ZMM5 |
(226) 0x43b4b5 VMOVAPD %ZMM15,%ZMM18{%K1} |
(226) 0x43b4bb VMULPD %ZMM18,%ZMM5,%ZMM31 |
(226) 0x43b4c1 VADDPD %ZMM2,%ZMM1,%ZMM5 |
(226) 0x43b4c7 VSUBPD %ZMM5,%ZMM30,%ZMM5 |
(226) 0x43b4cd VADDPD %ZMM31,%ZMM5,%ZMM5 |
(226) 0x43b4d3 VDIVPD %ZMM0,%ZMM5,%ZMM29 |
(226) 0x43b4d9 VBROADCASTSD %XMM27,%ZMM5 |
(226) 0x43b4df VCMPPD $0x5,%ZMM5,%ZMM29,%K0 |
(226) 0x43b4e6 KTESTB %K0,%K1 |
(226) 0x43b4ea JE 43b4f9 |
(226) 0x43b4ec MOV 0x88(%RBP),%RCX |
(226) 0x43b4f3 VMOVSD (%RCX),%XMM27 |
(226) 0x43b4f9 VMOVAPD %ZMM10,0x200(%RSP) |
(226) 0x43b501 VMOVAPD %ZMM9,0x240(%RSP) |
(226) 0x43b509 VMOVAPD %ZMM8,0x280(%RSP) |
(226) 0x43b511 VMOVAPD %ZMM7,0x2c0(%RSP) |
(226) 0x43b519 VMOVAPD %ZMM6,0x380(%RSP) |
(226) 0x43b521 VCMPPD $0x1,%ZMM5,%ZMM29,%K2{%K1} |
(226) 0x43b528 KORTESTB %K2,%K2 |
(226) 0x43b52c VMOVAPD 0x440(%RSP),%ZMM8 |
(226) 0x43b534 MOV 0x130(%RSP),%RDX |
(226) 0x43b53c MOV 0x58(%RSP),%RSI |
(226) 0x43b541 MOV 0x50(%RSP),%R8 |
(226) 0x43b546 JE 43b550 |
(226) 0x43b548 MOV 0x68(%RBP),%RCX |
(226) 0x43b54c VMOVSD (%RCX),%XMM5 |
(226) 0x43b550 IMUL %RDI,%R8 |
(226) 0x43b554 ADD 0x28(%RBP),%R8 |
(226) 0x43b558 VMOVUPD (%R8,%R15,8),%ZMM6{%K1}{z} |
(226) 0x43b55f VMOVAPD %ZMM6,%ZMM20{%K1} |
(226) 0x43b565 IMUL %RDI,%RSI |
(226) 0x43b569 ADD 0x30(%RBP),%RSI |
(226) 0x43b56d VMOVUPD (%RSI,%R15,8),%ZMM6{%K1}{z} |
(226) 0x43b574 VMOVAPD %ZMM6,%ZMM19{%K1} |
(226) 0x43b57a VADDPD %ZMM19,%ZMM19,%ZMM6 |
(226) 0x43b580 IMUL %RDI,%RDX |
(226) 0x43b584 ADD 0x38(%RBP),%RDX |
(226) 0x43b588 VMOVUPD (%RDX,%R15,8),%ZMM7{%K1}{z} |
(226) 0x43b58f VMOVAPD %ZMM7,%ZMM8{%K1} |
(226) 0x43b595 VMOVAPD %ZMM8,0x440(%RSP) |
(226) 0x43b59d VDIVPD %ZMM8,%ZMM6,%ZMM6 |
(226) 0x43b5a3 MOV 0x50(%RBP),%RCX |
(226) 0x43b5a7 VMOVUPD (%RCX,%R15,8),%ZMM7{%K1}{z} |
(226) 0x43b5ae VFMADD231PD %ZMM20,%ZMM20,%ZMM6 |
(226) 0x43b5b4 VSQRTPD %ZMM6,%ZMM6 |
(226) 0x43b5ba VMOVAPD %ZMM7,%ZMM21{%K1} |
(226) 0x43b5c0 VBROADCASTSD %XMM26,%ZMM7 |
(226) 0x43b5c6 VMAXPD %ZMM7,%ZMM6,%ZMM6 |
(226) 0x43b5cc VBROADCASTSD %XMM23,%ZMM8 |
(226) 0x43b5d2 VMINPD %ZMM8,%ZMM21,%ZMM8 |
(226) 0x43b5d8 VBROADCASTSD %XMM24,%ZMM9 |
(226) 0x43b5de VMULPD %ZMM8,%ZMM9,%ZMM8 |
(226) 0x43b5e4 VDIVPD %ZMM6,%ZMM8,%ZMM6 |
(226) 0x43b5ea VBROADCASTSD %XMM25,%ZMM8 |
(226) 0x43b5f0 VMULPD %ZMM8,%ZMM0,%ZMM8 |
(226) 0x43b5f6 VANDPD %ZMM3,%ZMM1,%ZMM1 |
(226) 0x43b5fc VANDPD %ZMM3,%ZMM30,%ZMM9 |
(226) 0x43b602 VMULPD %ZMM7,%ZMM12,%ZMM7 |
(226) 0x43b608 VMAXPD %ZMM7,%ZMM9,%ZMM9 |
(226) 0x43b60e VMAXPD %ZMM9,%ZMM1,%ZMM1 |
(226) 0x43b614 VDIVPD %ZMM1,%ZMM8,%ZMM1 |
(226) 0x43b61a VBROADCASTSD %XMM22,%ZMM8 |
(226) 0x43b620 VMULPD %ZMM8,%ZMM0,%ZMM0 |
(226) 0x43b626 VANDPD %ZMM3,%ZMM2,%ZMM2 |
(226) 0x43b62c VANDPD %ZMM3,%ZMM31,%ZMM8 |
(226) 0x43b632 VMAXPD %ZMM7,%ZMM8,%ZMM7 |
(226) 0x43b638 VMAXPD %ZMM7,%ZMM2,%ZMM2 |
(226) 0x43b63e VDIVPD %ZMM2,%ZMM0,%ZMM0 |
(226) 0x43b644 VBROADCASTSD %XMM5,%ZMM2 |
(226) 0x43b64a VXORPD %ZMM4,%ZMM2,%ZMM2 |
(226) 0x43b650 VBROADCASTSD %XMM27,%ZMM5 |
(226) 0x43b656 VDIVPD %ZMM29,%ZMM2,%ZMM5{%K2} |
(226) 0x43b65c VMINPD %ZMM5,%ZMM0,%ZMM0 |
(226) 0x43b662 VMINPD %ZMM0,%ZMM1,%ZMM0 |
(226) 0x43b668 VMINPD %ZMM0,%ZMM6,%ZMM0 |
(226) 0x43b66e VMINPD %ZMM0,%ZMM28,%ZMM0 |
(226) 0x43b674 MOV %R11D,%R10D |
(226) 0x43b677 JMP 43ad04 |
0x43b67c NOPL (%RAX) |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_invoke_task_func | libiomp5.so |
Path / |
Source file and lines | calc_dt_kernel.f90:89-133 |
Module | exec |
nb instructions | 163 |
nb uops | 169 |
loop length | 831 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 0 |
used zmm registers | 3 |
nb stack references | 45 |
micro-operation queue | 28.17 cycles |
front end | 28.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 9.70 | 9.60 | 12.33 | 12.33 | 22.00 | 9.60 | 9.50 | 22.00 | 22.00 | 22.00 | 9.60 | 12.33 |
cycles | 9.70 | 15.77 | 12.33 | 12.33 | 22.00 | 9.60 | 9.50 | 22.00 | 22.00 | 22.00 | 9.60 | 12.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 27.36-27.41 |
Stall cycles | 0.00 |
Front-end | 28.17 |
Dispatch | 22.00 |
Overall L1 | 28.17 |
all | 4% |
load | 0% |
store | 3% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 9% |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 4% |
load | 0% |
store | 3% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 7% |
all | 12% |
load | 6% |
store | 14% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 9% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
all | 12% |
load | 10% |
store | 14% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 9% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x4c0,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDI,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xa0(%RBP),%R14D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x98(%RBP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %R14D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOVL $0,0x44(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JS 43ab16 <calc_dt_kernel_module_mp_calc_dt_kernel_.DIR.OMP.PARALLEL.2+0x126> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RBX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R9,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x2c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0x1,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x48(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x4c(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x38(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x34(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x7483d0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,0x3c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 4045a0 <__kmpc_for_static_init_4@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x30(%RSP),%R9D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x2c(%RSP),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %R9D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 43ab40 <calc_dt_kernel_module_mp_calc_dt_kernel_.DIR.OMP.PARALLEL.2+0x150> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVSD 0xce5e3(%RIP),%XMM28 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD %XMM28,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x7483f0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x34(%RSP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 404190 <__kmpc_for_static_fini@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x68(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x7a11a0,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x68(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x748410,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x43a9e0,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x1,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x8,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 404790 <__kmpc_reduce@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x10,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 43ab16 <calc_dt_kernel_module_mp_calc_dt_kernel_.DIR.OMP.PARALLEL.2+0x126> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x10(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x60(%RSP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMINSD (%RAX),%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVSD %XMM0,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RBX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x7a11a0,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x748430,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 404900 <__kmpc_end_reduce@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV (%RBX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x748450,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 404660 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xa8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x60(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%R12D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %ESI,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R14D,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x2(%R15),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CLTQ | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
MOV %RAX,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x1(%R12),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP $0x2,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x1,%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVGE %EAX,%R14D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R14D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $0x7ffffff8,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOVSXD %EBX,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOVSXD %R15D,%RDX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV %R14,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPBROADCASTQ %R14,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQA64 %ZMM0,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV %RSI,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%RSI,8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x2(%RCX),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SAL $0x3,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SUB %RCX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x3,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RDX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x2,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RDX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA -0x2(%RDX),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RCX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x18(%R13,%RSI,1),%R13 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R13,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x18(%R8,%RSI,1),%R8 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R8,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x18(%R15,%RSI,1),%R8 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R8,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x10(%R10,%RSI,1),%R8 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EDI,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x10(%RCX,%RSI,1),%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RCX,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x10(%RDX,%RSI,1),%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RCX,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x10(%RBX,%RSI,1),%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RCX,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x10(%R14,%RSI,1),%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RCX,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x10(%R11,%RSI,1),%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RCX,0x138(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0xce3f0(%RIP),%XMM28 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VBROADCASTSD 0xc976e(%RIP),%ZMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VBROADCASTSD 0xcba7c(%RIP),%ZMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
XOR %R14D,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R9D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R9,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 43add1 <calc_dt_kernel_module_mp_calc_dt_kernel_.DIR.OMP.PARALLEL.2+0x3e1> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | calc_dt_kernel.f90:89-133 |
Module | exec |
nb instructions | 163 |
nb uops | 169 |
loop length | 831 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 0 |
used zmm registers | 3 |
nb stack references | 45 |
micro-operation queue | 28.17 cycles |
front end | 28.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 9.70 | 9.60 | 12.33 | 12.33 | 22.00 | 9.60 | 9.50 | 22.00 | 22.00 | 22.00 | 9.60 | 12.33 |
cycles | 9.70 | 15.77 | 12.33 | 12.33 | 22.00 | 9.60 | 9.50 | 22.00 | 22.00 | 22.00 | 9.60 | 12.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 27.36-27.41 |
Stall cycles | 0.00 |
Front-end | 28.17 |
Dispatch | 22.00 |
Overall L1 | 28.17 |
all | 4% |
load | 0% |
store | 3% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 9% |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 4% |
load | 0% |
store | 3% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 7% |
all | 12% |
load | 6% |
store | 14% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 9% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
all | 12% |
load | 10% |
store | 14% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 9% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x4c0,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDI,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xa0(%RBP),%R14D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x98(%RBP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %R14D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOVL $0,0x44(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JS 43ab16 <calc_dt_kernel_module_mp_calc_dt_kernel_.DIR.OMP.PARALLEL.2+0x126> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RBX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R9,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x2c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0x1,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x48(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x4c(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x38(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x34(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x7483d0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,0x3c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 4045a0 <__kmpc_for_static_init_4@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x30(%RSP),%R9D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x2c(%RSP),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %R9D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 43ab40 <calc_dt_kernel_module_mp_calc_dt_kernel_.DIR.OMP.PARALLEL.2+0x150> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVSD 0xce5e3(%RIP),%XMM28 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD %XMM28,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x7483f0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x34(%RSP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 404190 <__kmpc_for_static_fini@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x68(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x7a11a0,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x68(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x748410,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x43a9e0,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x1,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x8,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 404790 <__kmpc_reduce@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x10,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 43ab16 <calc_dt_kernel_module_mp_calc_dt_kernel_.DIR.OMP.PARALLEL.2+0x126> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x10(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x60(%RSP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMINSD (%RAX),%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVSD %XMM0,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RBX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x7a11a0,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x748430,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 404900 <__kmpc_end_reduce@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV (%RBX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x748450,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 404660 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xa8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x60(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%R12D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %ESI,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R14D,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x2(%R15),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CLTQ | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
MOV %RAX,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x1(%R12),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP $0x2,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x1,%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVGE %EAX,%R14D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R14D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $0x7ffffff8,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOVSXD %EBX,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOVSXD %R15D,%RDX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV %R14,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPBROADCASTQ %R14,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQA64 %ZMM0,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV %RSI,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%RSI,8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x2(%RCX),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SAL $0x3,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SUB %RCX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x3,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RDX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x2,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RDX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA -0x2(%RDX),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RCX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x18(%R13,%RSI,1),%R13 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R13,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x18(%R8,%RSI,1),%R8 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R8,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x18(%R15,%RSI,1),%R8 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R8,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x10(%R10,%RSI,1),%R8 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EDI,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x10(%RCX,%RSI,1),%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RCX,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x10(%RDX,%RSI,1),%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RCX,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x10(%RBX,%RSI,1),%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RCX,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x10(%R14,%RSI,1),%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RCX,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x10(%R11,%RSI,1),%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RCX,0x138(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0xce3f0(%RIP),%XMM28 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VBROADCASTSD 0xc976e(%RIP),%ZMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VBROADCASTSD 0xcba7c(%RIP),%ZMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
XOR %R14D,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R9D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R9,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 43add1 <calc_dt_kernel_module_mp_calc_dt_kernel_.DIR.OMP.PARALLEL.2+0x3e1> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼calc_dt_kernel_.DIR.OMP.PARALLEL.2– | 3.32 | 2.52 |
▼Loop 226 - calc_dt_kernel.f90:92-129 - exec– | 0 | 0 |
○Loop 227 - calc_dt_kernel.f90:92-129 - exec | 3.32 | 2.51 |