Function: __pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0 | Module: exec | Source: pack_kernel.f90:61-66 | Coverage: 0.02% |
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Function: __pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0 | Module: exec | Source: pack_kernel.f90:61-66 | Coverage: 0.02% |
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/scratch_na/users/xoserete/qaas_runs/171-415-7919/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/pack_kernel.f90: 61 - 66 |
-------------------------------------------------------------------------------- |
61: !$OMP PARALLEL DO PRIVATE(index) |
62: DO k=y_min-depth,y_max+y_inc+depth |
63: !$OMP SIMD |
64: DO j=1,depth |
65: index= buffer_offset + j+(k+depth-1)*depth |
66: left_snd_buffer(index)=field(x_min+x_inc-1+j,k) |
0x42f400 PUSH %RBP |
0x42f401 MOV %RSP,%RBP |
0x42f404 PUSH %R15 |
0x42f406 PUSH %R14 |
0x42f408 PUSH %R13 |
0x42f40a PUSH %R12 |
0x42f40c PUSH %RBX |
0x42f40d SUB $0xb8,%RSP |
0x42f414 MOV %RDI,-0x38(%RBP) |
0x42f418 MOV 0x48(%RDI),%RDX |
0x42f41c MOV 0x54(%RDI),%EAX |
0x42f41f MOV 0x28(%RDI),%RCX |
0x42f423 MOV 0x58(%RDI),%R13D |
0x42f427 MOV 0x40(%RDI),%RBX |
0x42f42b MOV 0x30(%RDI),%R15 |
0x42f42f MOV %RDX,-0x48(%RBP) |
0x42f433 MOV %RCX,-0x90(%RBP) |
0x42f43a MOV 0x20(%RDI),%R12 |
0x42f43e MOV %EAX,-0xa4(%RBP) |
0x42f444 CALL 402080 <@plt_start@+0x60> |
0x42f449 MOV %EAX,%R14D |
0x42f44c CALL 402180 <@plt_start@+0x160> |
0x42f451 MOV -0x38(%RBP),%R10 |
0x42f455 MOV %EAX,%ESI |
0x42f457 MOV 0x5c(%R10),%EAX |
0x42f45b INC %EAX |
0x42f45d SUB %R13D,%EAX |
0x42f460 CLTD |
0x42f461 IDIV %R14D |
0x42f464 CMP %EDX,%ESI |
0x42f466 JL 42f9a4 |
0x42f46c IMUL %EAX,%ESI |
0x42f46f ADD %EDX,%ESI |
0x42f471 ADD %ESI,%EAX |
0x42f473 CMP %EAX,%ESI |
0x42f475 JGE 42f8f1 |
0x42f47b LEA (%R13,%RSI,1),%EDI |
0x42f480 ADD %R13D,%EAX |
0x42f483 MOV -0x90(%RBP),%RSI |
0x42f48a MOV 0x8(%R10),%R8 |
0x42f48e KXORB %K0,%K0,%K0 |
0x42f492 MOV (%R10),%R11 |
0x42f495 MOV 0x18(%R10),%R13 |
0x42f499 MOV %EAX,-0x9c(%RBP) |
0x42f49f MOVSXD %EDI,%RAX |
0x42f4a2 IMUL %RSI,%RAX |
0x42f4a6 MOV (%R8),%ECX |
0x42f4a9 MOV 0x10(%R10),%R9 |
0x42f4ad MOV %EDI,-0x40(%RBP) |
0x42f4b0 MOV 0x38(%R10),%R14 |
0x42f4b4 MOV %R11,-0xb8(%RBP) |
0x42f4bb MOV %R12,%R11 |
0x42f4be LEA (,%RBX,8),%R8 |
0x42f4c6 MOV %R13,-0x58(%RBP) |
0x42f4ca MOV %RBX,%R13 |
0x42f4cd SAL $0x5,%R11 |
0x42f4d1 MOV %ECX,%EDX |
0x42f4d3 ADD %R15,%RAX |
0x42f4d6 LEA -0x1(%RCX),%R15D |
0x42f4da SAL $0x5,%R13 |
0x42f4de MOV %R9,-0xb0(%RBP) |
0x42f4e5 MOV %R15D,-0xa8(%RBP) |
0x42f4ec ADD %EDI,%R15D |
0x42f4ef LEA (,%R12,8),%RDI |
0x42f4f7 MOV %RBX,%R9 |
0x42f4fa MOV %RDI,-0x80(%RBP) |
0x42f4fe MOV %ECX,%EDI |
0x42f500 IMUL %ECX,%R15D |
0x42f504 SHR $0x3,%EDX |
0x42f507 AND $-0x8,%EDI |
0x42f50a MOV %R14,-0x60(%RBP) |
0x42f50e MOV %R12,%R14 |
0x42f511 SAL $0x6,%R9 |
0x42f515 MOV %R11,-0xd0(%RBP) |
0x42f51c MOV %RBX,%R11 |
0x42f51f SAL $0x6,%R14 |
0x42f523 LEA (%RBX,%RBX,2),%RSI |
0x42f527 MOV %R13,-0xc0(%RBP) |
0x42f52e MOV %R12,%R13 |
0x42f531 SAL $0x4,%R11 |
0x42f535 MOV %R8,-0x88(%RBP) |
0x42f53c SAL $0x4,%R13 |
0x42f540 XOR %R8D,%R8D |
0x42f543 MOV %EDI,-0xc4(%RBP) |
0x42f549 INC %EDI |
0x42f54b TEST %ECX,%ECX |
0x42f54d CMOVNS %ECX,%R8D |
0x42f551 MOV %EDX,-0x70(%RBP) |
0x42f554 LEA (,%RSI,8),%RDX |
0x42f55c MOV %EDI,-0xc8(%RBP) |
0x42f562 INC %R8D |
0x42f565 MOV %R10,-0xd8(%RBP) |
0x42f56c MOV %R8D,-0xa0(%RBP) |
0x42f573 MOV %RDX,-0x78(%RBP) |
0x42f577 MOV %RAX,-0x50(%RBP) |
0x42f57b LEA (%R12,%R12,2),%RAX |
0x42f57f MOV %ECX,-0x38(%RBP) |
0x42f582 MOV $0x1,%ECX |
0x42f587 MOV %R15D,-0x3c(%RBP) |
0x42f58b LEA (,%RAX,8),%R15 |
0x42f593 KMOVB %ECX,%K1 |
0x42f597 NOPW (%RAX,%RAX,1) |
(192) 0x42f5a0 MOV -0x38(%RBP),%R10D |
(192) 0x42f5a4 TEST %R10D,%R10D |
(192) 0x42f5a7 JLE 42f898 |
(192) 0x42f5ad MOV -0xb0(%RBP),%RAX |
(192) 0x42f5b4 MOV -0xb8(%RBP),%RSI |
(192) 0x42f5bb MOV (%RAX),%EDX |
(192) 0x42f5bd MOV -0xa4(%RBP),%EAX |
(192) 0x42f5c3 ADD (%RSI),%EAX |
(192) 0x42f5c5 CMPL $0x6,-0xa8(%RBP) |
(192) 0x42f5cc MOV %EDX,-0x64(%RBP) |
(192) 0x42f5cf MOV %EAX,-0x68(%RBP) |
(192) 0x42f5d2 JBE 42f998 |
(192) 0x42f5d8 CLTQ |
(192) 0x42f5da MOV -0x50(%RBP),%R8 |
(192) 0x42f5de MOV -0x58(%RBP),%RCX |
(192) 0x42f5e2 MOVSXD %EDX,%R10 |
(192) 0x42f5e5 IMUL %R12,%RAX |
(192) 0x42f5e9 MOV -0x48(%RBP),%RDI |
(192) 0x42f5ed ADD %R8,%RAX |
(192) 0x42f5f0 MOV -0x60(%RBP),%R8 |
(192) 0x42f5f4 LEA (%RCX,%RAX,8),%RSI |
(192) 0x42f5f8 MOVSXD -0x3c(%RBP),%RAX |
(192) 0x42f5fc MOV %RSI,-0x98(%RBP) |
(192) 0x42f603 LEA 0x1(%R10,%RAX,1),%RDX |
(192) 0x42f608 MOV -0xd0(%RBP),%RAX |
(192) 0x42f60f IMUL %RBX,%RDX |
(192) 0x42f613 ADD %RDI,%RDX |
(192) 0x42f616 MOV -0x70(%RBP),%EDI |
(192) 0x42f619 LEA (%R8,%RDX,8),%R10 |
(192) 0x42f61d LEA (%RSI,%RAX,1),%RDX |
(192) 0x42f621 MOV -0xc0(%RBP),%RAX |
(192) 0x42f628 XOR %R8D,%R8D |
(192) 0x42f62b MOV %R10,%RCX |
(192) 0x42f62e ADD %R10,%RAX |
(192) 0x42f631 TEST $0x1,%DIL |
(192) 0x42f635 JNE 42f908 |
(192) 0x42f63b MOV %EDI,%R10D |
(192) 0x42f63e MOV -0x78(%RBP),%RDI |
(192) 0x42f642 NOPW (%RAX,%RAX,1) |
(193) 0x42f648 VMOVSD (%RSI),%XMM8 |
(193) 0x42f64c VMOVSD (%RSI,%R12,8),%XMM9 |
(193) 0x42f652 ADD $0x2,%R8D |
(193) 0x42f656 VMOVSD (%RSI,%R13,1),%XMM10 |
(193) 0x42f65c VMOVSD (%RSI,%R15,1),%XMM11 |
(193) 0x42f662 ADD %R14,%RSI |
(193) 0x42f665 VMOVSD (%RDX),%XMM12 |
(193) 0x42f669 VMOVSD (%RDX,%R12,8),%XMM13 |
(193) 0x42f66f VMOVSD (%RDX,%R13,1),%XMM14 |
(193) 0x42f675 VMOVSD (%RDX,%R15,1),%XMM15 |
(193) 0x42f67b VMOVSD %XMM8,(%RCX) |
(193) 0x42f67f ADD %R14,%RDX |
(193) 0x42f682 VMOVSD %XMM9,(%RCX,%RBX,8) |
(193) 0x42f687 VMOVSD %XMM10,(%RCX,%R11,1) |
(193) 0x42f68d VMOVSD %XMM11,(%RCX,%RDI,1) |
(193) 0x42f692 ADD %R9,%RCX |
(193) 0x42f695 VMOVSD %XMM12,(%RAX) |
(193) 0x42f699 VMOVSD %XMM13,(%RAX,%RBX,8) |
(193) 0x42f69e VMOVSD %XMM14,(%RAX,%R11,1) |
(193) 0x42f6a4 VMOVSD %XMM15,(%RAX,%RDI,1) |
(193) 0x42f6a9 ADD %R9,%RAX |
(193) 0x42f6ac VMOVSD (%RSI),%XMM7 |
(193) 0x42f6b0 VMOVSD (%RSI,%R12,8),%XMM6 |
(193) 0x42f6b6 VMOVSD (%RSI,%R13,1),%XMM5 |
(193) 0x42f6bc VMOVSD (%RSI,%R15,1),%XMM4 |
(193) 0x42f6c2 ADD %R14,%RSI |
(193) 0x42f6c5 VMOVSD (%RDX),%XMM3 |
(193) 0x42f6c9 VMOVSD (%RDX,%R12,8),%XMM2 |
(193) 0x42f6cf VMOVSD (%RDX,%R13,1),%XMM1 |
(193) 0x42f6d5 VMOVSD (%RDX,%R15,1),%XMM0 |
(193) 0x42f6db VMOVSD %XMM7,(%RCX) |
(193) 0x42f6df ADD %R14,%RDX |
(193) 0x42f6e2 VMOVSD %XMM6,(%RCX,%RBX,8) |
(193) 0x42f6e7 VMOVSD %XMM5,(%RCX,%R11,1) |
(193) 0x42f6ed VMOVSD %XMM4,(%RCX,%RDI,1) |
(193) 0x42f6f2 ADD %R9,%RCX |
(193) 0x42f6f5 VMOVSD %XMM3,(%RAX) |
(193) 0x42f6f9 VMOVSD %XMM2,(%RAX,%RBX,8) |
(193) 0x42f6fe VMOVSD %XMM1,(%RAX,%R11,1) |
(193) 0x42f704 VMOVSD %XMM0,(%RAX,%RDI,1) |
(193) 0x42f709 ADD %R9,%RAX |
(193) 0x42f70c CMP %R8D,%R10D |
(193) 0x42f70f JNE 42f648 |
(192) 0x42f715 MOV %RDI,-0x78(%RBP) |
(192) 0x42f719 MOV -0xc4(%RBP),%R8D |
(192) 0x42f720 MOV -0x38(%RBP),%EAX |
(192) 0x42f723 CMP %EAX,%R8D |
(192) 0x42f726 JE 42f898 |
(192) 0x42f72c MOV -0xc8(%RBP),%EDX |
(192) 0x42f732 MOV %R8D,%EDI |
(192) 0x42f735 MOV -0x38(%RBP),%ESI |
(192) 0x42f738 SUB %EDI,%ESI |
(192) 0x42f73a LEA -0x1(%RSI),%ECX |
(192) 0x42f73d CMP $0x2,%ECX |
(192) 0x42f740 JBE 42f7db |
(192) 0x42f746 MOVSXD -0x68(%RBP),%RAX |
(192) 0x42f74a MOV %R12,%R8 |
(192) 0x42f74d MOV -0x50(%RBP),%R10 |
(192) 0x42f751 IMUL %RDI,%R8 |
(192) 0x42f755 MOV -0x58(%RBP),%RCX |
(192) 0x42f759 IMUL %R12,%RAX |
(192) 0x42f75d IMUL %RBX,%RDI |
(192) 0x42f761 ADD %R10,%RAX |
(192) 0x42f764 MOVSXD -0x3c(%RBP),%R10 |
(192) 0x42f768 ADD %R8,%RAX |
(192) 0x42f76b MOVSXD -0x64(%RBP),%R8 |
(192) 0x42f76f LEA (%RCX,%RAX,8),%RAX |
(192) 0x42f773 MOV -0x48(%RBP),%RCX |
(192) 0x42f777 LEA 0x1(%R8,%R10,1),%R8 |
(192) 0x42f77c MOV -0x80(%RBP),%R10 |
(192) 0x42f780 VMOVSD (%RAX),%XMM8 |
(192) 0x42f784 IMUL %RBX,%R8 |
(192) 0x42f788 ADD %R10,%RAX |
(192) 0x42f78b VMOVSD (%RAX),%XMM9 |
(192) 0x42f78f ADD %R10,%RAX |
(192) 0x42f792 ADD %RCX,%R8 |
(192) 0x42f795 VMOVSD (%RAX),%XMM10 |
(192) 0x42f799 VMOVSD (%RAX,%R10,1),%XMM11 |
(192) 0x42f79f ADD %RDI,%R8 |
(192) 0x42f7a2 MOV -0x60(%RBP),%RDI |
(192) 0x42f7a6 MOV -0x88(%RBP),%RAX |
(192) 0x42f7ad LEA (%RDI,%R8,8),%R8 |
(192) 0x42f7b1 VMOVSD %XMM8,(%R8) |
(192) 0x42f7b6 ADD %RAX,%R8 |
(192) 0x42f7b9 VMOVSD %XMM9,(%R8) |
(192) 0x42f7be ADD %RAX,%R8 |
(192) 0x42f7c1 VMOVSD %XMM10,(%R8) |
(192) 0x42f7c6 VMOVSD %XMM11,(%R8,%RAX,1) |
(192) 0x42f7cc TEST $0x3,%SIL |
(192) 0x42f7d0 JE 42f898 |
(192) 0x42f7d6 AND $-0x4,%ESI |
(192) 0x42f7d9 ADD %ESI,%EDX |
(192) 0x42f7db MOV -0x68(%RBP),%ECX |
(192) 0x42f7de MOV -0x50(%RBP),%R10 |
(192) 0x42f7e2 MOV -0x58(%RBP),%RSI |
(192) 0x42f7e6 MOV -0x64(%RBP),%R8D |
(192) 0x42f7ea DEC %ECX |
(192) 0x42f7ec MOV -0x3c(%RBP),%EDI |
(192) 0x42f7ef LEA (%RCX,%RDX,1),%EAX |
(192) 0x42f7f2 CLTQ |
(192) 0x42f7f4 IMUL %R12,%RAX |
(192) 0x42f7f8 ADD %R10,%RAX |
(192) 0x42f7fb VMOVSD (%RSI,%RAX,8),%XMM12 |
(192) 0x42f800 LEA (%R8,%RDX,1),%EAX |
(192) 0x42f804 MOV -0x48(%RBP),%RSI |
(192) 0x42f808 ADD %EDI,%EAX |
(192) 0x42f80a MOV -0x60(%RBP),%RDI |
(192) 0x42f80e CLTQ |
(192) 0x42f810 IMUL %RBX,%RAX |
(192) 0x42f814 ADD %RSI,%RAX |
(192) 0x42f817 VMOVSD %XMM12,(%RDI,%RAX,8) |
(192) 0x42f81c LEA 0x1(%RDX),%EAX |
(192) 0x42f81f CMP %EAX,-0x38(%RBP) |
(192) 0x42f822 JL 42f898 |
(192) 0x42f824 LEA (%RCX,%RAX,1),%ESI |
(192) 0x42f827 MOV -0x58(%RBP),%RDI |
(192) 0x42f82b ADD %R8D,%EAX |
(192) 0x42f82e ADD $0x2,%EDX |
(192) 0x42f831 MOVSXD %ESI,%RSI |
(192) 0x42f834 IMUL %R12,%RSI |
(192) 0x42f838 ADD %R10,%RSI |
(192) 0x42f83b VMOVSD (%RDI,%RSI,8),%XMM13 |
(192) 0x42f840 MOV %R8D,%ESI |
(192) 0x42f843 MOV -0x3c(%RBP),%R8D |
(192) 0x42f847 MOV -0x48(%RBP),%RDI |
(192) 0x42f84b ADD %R8D,%EAX |
(192) 0x42f84e CLTQ |
(192) 0x42f850 IMUL %RBX,%RAX |
(192) 0x42f854 ADD %RDI,%RAX |
(192) 0x42f857 MOV -0x60(%RBP),%RDI |
(192) 0x42f85b VMOVSD %XMM13,(%RDI,%RAX,8) |
(192) 0x42f860 CMP %EDX,-0x38(%RBP) |
(192) 0x42f863 JL 42f898 |
(192) 0x42f865 LEA (%RCX,%RDX,1),%EAX |
(192) 0x42f868 MOV -0x58(%RBP),%RCX |
(192) 0x42f86c CLTQ |
(192) 0x42f86e IMUL %R12,%RAX |
(192) 0x42f872 ADD %R10,%RAX |
(192) 0x42f875 MOV -0x60(%RBP),%R10 |
(192) 0x42f879 VMOVSD (%RCX,%RAX,8),%XMM14 |
(192) 0x42f87e MOV %ESI,%EAX |
(192) 0x42f880 ADD %EDX,%EAX |
(192) 0x42f882 MOV -0x48(%RBP),%RDX |
(192) 0x42f886 ADD %R8D,%EAX |
(192) 0x42f889 CLTQ |
(192) 0x42f88b IMUL %RBX,%RAX |
(192) 0x42f88f ADD %RDX,%RAX |
(192) 0x42f892 VMOVSD %XMM14,(%R10,%RAX,8) |
(192) 0x42f898 MOV -0x38(%RBP),%ESI |
(192) 0x42f89b MOV -0x6c(%RBP),%R8D |
(192) 0x42f89f KMOVB %K0,%ECX |
(192) 0x42f8a3 KMOVB %K1,%EDI |
(192) 0x42f8a7 MOV -0x90(%RBP),%RDX |
(192) 0x42f8ae TEST %ESI,%ESI |
(192) 0x42f8b0 CMOVNS -0xa0(%RBP),%R8D |
(192) 0x42f8b8 CMOVNS %EDI,%ECX |
(192) 0x42f8bb INCL -0x40(%RBP) |
(192) 0x42f8be ADD %RDX,-0x50(%RBP) |
(192) 0x42f8c2 ADD %ESI,-0x3c(%RBP) |
(192) 0x42f8c5 KMOVB %ECX,%K0 |
(192) 0x42f8c9 MOV %R8D,-0x6c(%RBP) |
(192) 0x42f8cd MOV -0x40(%RBP),%EAX |
(192) 0x42f8d0 CMP %EAX,-0x9c(%RBP) |
(192) 0x42f8d6 JG 42f5a0 |
0x42f8dc MOV -0xd8(%RBP),%RBX |
0x42f8e3 KORTESTB %K0,%K0 |
0x42f8e7 JE 42f8f1 |
0x42f8e9 MOV -0x6c(%RBP),%R9D |
0x42f8ed MOV %R9D,0x50(%RBX) |
0x42f8f1 ADD $0xb8,%RSP |
0x42f8f8 POP %RBX |
0x42f8f9 POP %R12 |
0x42f8fb POP %R13 |
0x42f8fd POP %R14 |
0x42f8ff POP %R15 |
0x42f901 POP %RBP |
0x42f902 RET |
0x42f903 NOPL (%RAX,%RAX,1) |
(192) 0x42f908 MOV -0x98(%RBP),%R8 |
(192) 0x42f90f VMOVSD (%RDX),%XMM3 |
(192) 0x42f913 ADD %R14,%RSI |
(192) 0x42f916 ADD %R9,%RCX |
(192) 0x42f919 VMOVSD (%RDX,%R12,8),%XMM2 |
(192) 0x42f91f VMOVSD (%RDX,%R13,1),%XMM1 |
(192) 0x42f925 VMOVSD (%R8),%XMM7 |
(192) 0x42f92a VMOVSD (%R8,%R12,8),%XMM6 |
(192) 0x42f930 VMOVSD (%R8,%R13,1),%XMM5 |
(192) 0x42f936 VMOVSD (%R8,%R15,1),%XMM4 |
(192) 0x42f93c MOV $0x1,%R8D |
(192) 0x42f942 VMOVSD (%RDX,%R15,1),%XMM0 |
(192) 0x42f948 MOV -0x78(%RBP),%RDI |
(192) 0x42f94c VMOVSD %XMM7,(%R10) |
(192) 0x42f951 ADD %R14,%RDX |
(192) 0x42f954 VMOVSD %XMM6,(%R10,%RBX,8) |
(192) 0x42f95a VMOVSD %XMM5,(%R10,%R11,1) |
(192) 0x42f960 VMOVSD %XMM4,(%R10,%RDI,1) |
(192) 0x42f966 VMOVSD %XMM3,(%RAX) |
(192) 0x42f96a VMOVSD %XMM2,(%RAX,%RBX,8) |
(192) 0x42f96f VMOVSD %XMM1,(%RAX,%R11,1) |
(192) 0x42f975 VMOVSD %XMM0,(%RAX,%RDI,1) |
(192) 0x42f97a ADD %R9,%RAX |
(192) 0x42f97d CMPL $0x1,-0x70(%RBP) |
(192) 0x42f981 JE 42f719 |
(192) 0x42f987 MOV -0x70(%RBP),%R10D |
(192) 0x42f98b MOV -0x78(%RBP),%RDI |
(192) 0x42f98f JMP 42f648 |
0x42f994 NOPL (%RAX) |
(192) 0x42f998 XOR %EDI,%EDI |
(192) 0x42f99a MOV $0x1,%EDX |
(192) 0x42f99f JMP 42f735 |
0x42f9a4 INC %EAX |
0x42f9a6 XOR %EDX,%EDX |
0x42f9a8 JMP 42f46c |
0x42f9ad NOPL (%RAX) |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
○98.21 | gomp_thread_start | team.c:130 | libgomp.so.1.0.0 |
○1.79 | GOMP_parallel | libgomp.h:985 | libgomp.so.1.0.0 |
Path / |
Source file and lines | pack_kernel.f90:61-66 |
Module | exec |
nb instructions | 121 |
nb uops | 126 |
loop length | 476 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 24 |
micro-operation queue | 21.00 cycles |
front end | 21.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 8.50 | 8.40 | 8.33 | 8.33 | 16.50 | 8.40 | 8.30 | 16.50 | 16.50 | 16.50 | 8.40 | 8.33 |
cycles | 8.50 | 10.13 | 8.33 | 8.33 | 16.50 | 8.40 | 8.30 | 16.50 | 16.50 | 16.50 | 8.40 | 8.33 |
Cycles executing div or sqrt instructions | 6.00 |
FE+BE cycles | 20.68 |
Stall cycles | 0.00 |
Front-end | 21.00 |
Dispatch | 16.50 |
DIV/SQRT | 6.00 |
Overall L1 | 21.00 |
all | 0% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 9% |
load | 11% |
store | 9% |
mul | 6% |
add-sub | 10% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 9% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0xb8,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDI,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x54(%RDI),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RDI),%R13D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RDI),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RDI),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,-0xa4(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 402080 <@plt_start@+0x60> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 402180 <@plt_start@+0x160> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x38(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x5c(%R10),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %R13D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R14D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
CMP %EDX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 42f9a4 <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x5a4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %EAX,%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %ESI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 42f8f1 <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x4f1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA (%R13,%RSI,1),%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %R13D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x90(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%R10),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
KXORB %K0,%K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV (%R10),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%R10),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,-0x9c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD %EDI,%RAX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
IMUL %RSI,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV (%R8),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R10),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EDI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%R10),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (,%RBX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R13,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x5,%R11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %ECX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD %R15,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x1(%RCX),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SAL $0x5,%R13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R9,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15D,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %EDI,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (,%R12,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDI,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %ECX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %ECX,%R15D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
SHR $0x3,%EDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
AND $-0x8,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R14,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x6,%R9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R11,-0xd0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x6,%R14 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA (%RBX,%RBX,2),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R13,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x4,%R11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R8,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SAL $0x4,%R13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EDI,-0xc4(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST %ECX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
CMOVNS %ECX,%R8D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %EDX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%RSI,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EDI,-0xc8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R10,-0xd8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8D,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R12,%R12,2),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %ECX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x1,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15D,-0x3c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%RAX,8),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KMOVB %ECX,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xd8(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
KORTESTB %K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JE 42f8f1 <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x4f1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x6c(%RBP),%R9D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9D,0x50(%RBX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD $0xb8,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 42f46c <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x6c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | pack_kernel.f90:61-66 |
Module | exec |
nb instructions | 121 |
nb uops | 126 |
loop length | 476 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 24 |
micro-operation queue | 21.00 cycles |
front end | 21.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 8.50 | 8.40 | 8.33 | 8.33 | 16.50 | 8.40 | 8.30 | 16.50 | 16.50 | 16.50 | 8.40 | 8.33 |
cycles | 8.50 | 10.13 | 8.33 | 8.33 | 16.50 | 8.40 | 8.30 | 16.50 | 16.50 | 16.50 | 8.40 | 8.33 |
Cycles executing div or sqrt instructions | 6.00 |
FE+BE cycles | 20.68 |
Stall cycles | 0.00 |
Front-end | 21.00 |
Dispatch | 16.50 |
DIV/SQRT | 6.00 |
Overall L1 | 21.00 |
all | 0% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 9% |
load | 11% |
store | 9% |
mul | 6% |
add-sub | 10% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 9% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0xb8,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDI,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x54(%RDI),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RDI),%R13D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RDI),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RDI),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,-0xa4(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 402080 <@plt_start@+0x60> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 402180 <@plt_start@+0x160> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x38(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x5c(%R10),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %R13D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R14D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
CMP %EDX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 42f9a4 <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x5a4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %EAX,%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %ESI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 42f8f1 <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x4f1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA (%R13,%RSI,1),%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %R13D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x90(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%R10),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
KXORB %K0,%K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV (%R10),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%R10),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,-0x9c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD %EDI,%RAX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
IMUL %RSI,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV (%R8),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R10),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EDI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%R10),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (,%RBX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R13,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x5,%R11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %ECX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD %R15,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x1(%RCX),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SAL $0x5,%R13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R9,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15D,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %EDI,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (,%R12,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDI,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %ECX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %ECX,%R15D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
SHR $0x3,%EDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
AND $-0x8,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R14,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x6,%R9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R11,-0xd0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x6,%R14 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA (%RBX,%RBX,2),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R13,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x4,%R11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R8,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SAL $0x4,%R13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EDI,-0xc4(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST %ECX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
CMOVNS %ECX,%R8D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %EDX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%RSI,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EDI,-0xc8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R10,-0xd8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8D,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R12,%R12,2),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %ECX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x1,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15D,-0x3c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%RAX,8),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KMOVB %ECX,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xd8(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
KORTESTB %K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JE 42f8f1 <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x4f1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x6c(%RBP),%R9D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9D,0x50(%RBX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD $0xb8,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 42f46c <__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0+0x6c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼__pack_kernel_module_MOD_clover_pack_message_left._omp_fn.0.lto_priv.0– | 0.02 | 0.02 |
▼Loop 192 - pack_kernel.f90:63-66 - exec– | 0.02 | 0.03 |
○Loop 193 - pack_kernel.f90:66-66 - exec | 0 | 0 |