Function: __reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0.lto_priv.0 | Module: exec | Source: reset_field_kernel.f90:47-63 | Coverage: 4.88% |
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Function: __reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0.lto_priv.0 | Module: exec | Source: reset_field_kernel.f90:47-63 | Coverage: 4.88% |
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/scratch_na/users/xoserete/qaas_runs/171-415-7919/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/reset_field_kernel.f90: 47 - 63 |
-------------------------------------------------------------------------------- |
47: !$OMP PARALLEL |
48: !$OMP DO |
49: DO k=y_min,y_max |
50: !$OMP SIMD |
51: DO j=x_min,x_max |
52: density0(j,k)=density1(j,k) |
53: energy0(j,k)=energy1(j,k) |
54: ENDDO |
55: ENDDO |
56: !$OMP END DO |
57: |
58: !$OMP DO |
59: DO k=y_min,y_max+1 |
60: !$OMP SIMD |
61: DO j=x_min,x_max+1 |
62: xvel0(j,k)=xvel1(j,k) |
63: yvel0(j,k)=yvel1(j,k) |
0x4311a0 PUSH %RBP |
0x4311a1 MOV %RSP,%RBP |
0x4311a4 PUSH %R15 |
0x4311a6 PUSH %R14 |
0x4311a8 PUSH %R13 |
0x4311aa PUSH %R12 |
0x4311ac MOV %RDI,%R12 |
0x4311af PUSH %RBX |
0x4311b0 AND $-0x40,%RSP |
0x4311b4 SUB $0x100,%RSP |
0x4311bb MOV 0xb8(%RDI),%RSI |
0x4311c2 MOV 0xb0(%RDI),%R8 |
0x4311c9 MOV %RDI,0x68(%RSP) |
0x4311ce MOV 0xa8(%RDI),%R9 |
0x4311d5 MOV 0xa0(%RDI),%R10 |
0x4311dc MOV 0x90(%RDI),%R11 |
0x4311e3 MOV 0xd0(%RDI),%RDX |
0x4311ea MOV %RSI,0x40(%RSP) |
0x4311ef MOV 0xc8(%RDI),%RCX |
0x4311f6 MOV 0xc0(%RDI),%RBX |
0x4311fd MOV %R8,0xb8(%RSP) |
0x431205 MOV 0x88(%RDI),%R14 |
0x43120c MOV 0x80(%RDI),%R15 |
0x431213 MOV %R9,0x38(%RSP) |
0x431218 MOV 0xd8(%RDI),%RAX |
0x43121f MOV 0x98(%RDI),%R13 |
0x431226 MOV %R10,0xb0(%RSP) |
0x43122e MOV %R11,0xa8(%RSP) |
0x431236 MOV %RDX,0xc8(%RSP) |
0x43123e MOV %RCX,0x48(%RSP) |
0x431243 MOV %RBX,0xc0(%RSP) |
0x43124b MOV %R14,0xf0(%RSP) |
0x431253 MOV %R15,0xa0(%RSP) |
0x43125b MOV 0x78(%RDI),%R15 |
0x43125f MOV %RAX,0x50(%RSP) |
0x431264 MOV 0x70(%RDI),%RAX |
0x431268 MOV 0x68(%RDI),%RDX |
0x43126c MOV 0x60(%RDI),%RCX |
0x431270 MOV 0x10(%RDI),%RDI |
0x431274 MOV %RAX,0x98(%RSP) |
0x43127c MOV %RDX,0xe0(%RSP) |
0x431284 MOV (%RDI),%EBX |
0x431286 MOV %RCX,0x90(%RSP) |
0x43128e CALL 402080 <@plt_start@+0x60> |
0x431293 MOV %EAX,0x5c(%RSP) |
0x431297 CALL 402180 <@plt_start@+0x160> |
0x43129c MOV 0x18(%R12),%R12 |
0x4312a1 MOV %EAX,%R14D |
0x4312a4 MOV (%R12),%EAX |
0x4312a8 INC %EAX |
0x4312aa SUB %EBX,%EAX |
0x4312ac CLTD |
0x4312ad IDIVL 0x5c(%RSP) |
0x4312b1 CMP %EDX,%R14D |
0x4312b4 JL 431e87 |
0x4312ba MOV %EAX,%ESI |
0x4312bc IMUL %R14D,%ESI |
0x4312c0 ADD %ESI,%EDX |
0x4312c2 ADD %EDX,%EAX |
0x4312c4 CMP %EAX,%EDX |
0x4312c6 JGE 43181e |
0x4312cc MOV 0x68(%RSP),%RCX |
0x4312d1 LEA (%RBX,%RDX,1),%R8D |
0x4312d5 ADD %EBX,%EAX |
0x4312d7 MOV 0x98(%RSP),%RDX |
0x4312df MOV %EAX,0x88(%RSP) |
0x4312e6 MOV (%RCX),%R9 |
0x4312e9 MOV 0x8(%RCX),%R10 |
0x4312ed MOV %R8D,0xf8(%RSP) |
0x4312f5 MOV 0x28(%RCX),%R11 |
0x4312f9 MOV 0x30(%RCX),%R12 |
0x4312fd MOV %R14D,0x58(%RSP) |
0x431302 MOV (%R9),%EBX |
0x431305 MOV (%R10),%EDI |
0x431308 MOV 0x38(%RCX),%R9 |
0x43130c MOV 0x20(%RCX),%R10 |
0x431310 LEA 0x1(%RDI),%EAX |
0x431313 MOVSXD %EBX,%RCX |
0x431316 MOV %EDI,0xec(%RSP) |
0x43131d MOV 0xe0(%RSP),%RDI |
0x431325 MOV %EAX,0x7c(%RSP) |
0x431329 MOVSXD %R8D,%RAX |
0x43132c LEA (%R15,%RCX,1),%R8 |
0x431330 MOV 0x90(%RSP),%R15 |
0x431338 IMUL %RAX,%RDX |
0x43133c ADD %RCX,%RDI |
0x43133f LEA (%R13,%RCX,1),%RSI |
0x431344 MOV 0xa8(%RSP),%R13 |
0x43134c IMUL %RAX,%R15 |
0x431350 MOV %RCX,0x60(%RSP) |
0x431355 IMUL %RAX,%R13 |
0x431359 MOV %EBX,0x8c(%RSP) |
0x431360 ADD %RDX,%R8 |
0x431363 MOV 0xf0(%RSP),%RDX |
0x43136b MOV %R11,0xf0(%RSP) |
0x431373 ADD %R15,%RDI |
0x431376 MOV 0xa0(%RSP),%R15 |
0x43137e ADD %RCX,%RDX |
0x431381 ADD %R13,%RSI |
0x431384 IMUL %R15,%RAX |
0x431388 MOV 0xec(%RSP),%R15D |
0x431390 MOV %RDX,%RCX |
0x431393 ADD %RAX,%RCX |
0x431396 MOV %R15D,%EAX |
0x431399 SUB %EBX,%EAX |
0x43139b MOV %EAX,0xd8(%RSP) |
0x4313a2 INC %EAX |
0x4313a4 MOV %EAX,%R13D |
0x4313a7 MOV %EAX,%EDX |
0x4313a9 SHR $0x3,%R13D |
0x4313ad AND $-0x8,%EDX |
0x4313b0 SAL $0x6,%R13 |
0x4313b4 CMP %R15D,%EBX |
0x4313b7 MOV %EDX,0x78(%RSP) |
0x4313bb MOV %R13,0xe0(%RSP) |
0x4313c3 LEA (%RDX,%RBX,1),%R13D |
0x4313c7 CMOVLE 0x7c(%RSP),%EBX |
0x4313cc AND $0x7,%EAX |
0x4313cf MOV %EAX,0x80(%RSP) |
0x4313d6 MOV %EBX,0x70(%RSP) |
0x4313da MOV %R13D,0x74(%RSP) |
0x4313df XOR %R13D,%R13D |
0x4313e2 NOPW (%RAX,%RAX,1) |
(208) 0x4313e8 MOV 0xec(%RSP),%R14D |
(208) 0x4313f0 CMP %R14D,0x8c(%RSP) |
(208) 0x4313f8 JG 431df0 |
(208) 0x4313fe CMPL $0x6,0xd8(%RSP) |
(208) 0x431406 JBE 431e70 |
(208) 0x43140c MOV 0xe0(%RSP),%RDX |
(208) 0x431414 MOV 0xf0(%RSP),%R11 |
(208) 0x43141c LEA (%R10,%RDI,8),%R13 |
(208) 0x431420 LEA (%R9,%RSI,8),%R14 |
(208) 0x431424 LEA (%R12,%RCX,8),%RBX |
(208) 0x431428 XOR %EAX,%EAX |
(208) 0x43142a SUB $0x40,%RDX |
(208) 0x43142e LEA (%R11,%R8,8),%R15 |
(208) 0x431432 SHR $0x6,%RDX |
(208) 0x431436 INC %RDX |
(208) 0x431439 AND $0x7,%EDX |
(208) 0x43143c JE 431549 |
(208) 0x431442 CMP $0x1,%RDX |
(208) 0x431446 JE 431517 |
(208) 0x43144c CMP $0x2,%RDX |
(208) 0x431450 JE 4314f6 |
(208) 0x431456 CMP $0x3,%RDX |
(208) 0x43145a JE 4314d5 |
(208) 0x43145c CMP $0x4,%RDX |
(208) 0x431460 JE 4314b4 |
(208) 0x431462 CMP $0x5,%RDX |
(208) 0x431466 JE 431493 |
(208) 0x431468 CMP $0x6,%RDX |
(208) 0x43146c JNE 431e30 |
(208) 0x431472 VMOVUPD (%R15,%RAX,1),%ZMM0 |
(208) 0x431479 VMOVUPD %ZMM0,(%R13,%RAX,1) |
(208) 0x431481 VMOVUPD (%R14,%RAX,1),%ZMM3 |
(208) 0x431488 VMOVUPD %ZMM3,(%RBX,%RAX,1) |
(208) 0x43148f ADD $0x40,%RAX |
(208) 0x431493 VMOVUPD (%R15,%RAX,1),%ZMM5 |
(208) 0x43149a VMOVUPD %ZMM5,(%R13,%RAX,1) |
(208) 0x4314a2 VMOVUPD (%R14,%RAX,1),%ZMM6 |
(208) 0x4314a9 VMOVUPD %ZMM6,(%RBX,%RAX,1) |
(208) 0x4314b0 ADD $0x40,%RAX |
(208) 0x4314b4 VMOVUPD (%R15,%RAX,1),%ZMM4 |
(208) 0x4314bb VMOVUPD %ZMM4,(%R13,%RAX,1) |
(208) 0x4314c3 VMOVUPD (%R14,%RAX,1),%ZMM7 |
(208) 0x4314ca VMOVUPD %ZMM7,(%RBX,%RAX,1) |
(208) 0x4314d1 ADD $0x40,%RAX |
(208) 0x4314d5 VMOVUPD (%R15,%RAX,1),%ZMM8 |
(208) 0x4314dc VMOVUPD %ZMM8,(%R13,%RAX,1) |
(208) 0x4314e4 VMOVUPD (%R14,%RAX,1),%ZMM9 |
(208) 0x4314eb VMOVUPD %ZMM9,(%RBX,%RAX,1) |
(208) 0x4314f2 ADD $0x40,%RAX |
(208) 0x4314f6 VMOVUPD (%R15,%RAX,1),%ZMM10 |
(208) 0x4314fd VMOVUPD %ZMM10,(%R13,%RAX,1) |
(208) 0x431505 VMOVUPD (%R14,%RAX,1),%ZMM11 |
(208) 0x43150c VMOVUPD %ZMM11,(%RBX,%RAX,1) |
(208) 0x431513 ADD $0x40,%RAX |
(208) 0x431517 VMOVUPD (%R15,%RAX,1),%ZMM12 |
(208) 0x43151e MOV 0xe0(%RSP),%R11 |
(208) 0x431526 VMOVUPD %ZMM12,(%R13,%RAX,1) |
(208) 0x43152e VMOVUPD (%R14,%RAX,1),%ZMM13 |
(208) 0x431535 VMOVUPD %ZMM13,(%RBX,%RAX,1) |
(208) 0x43153c ADD $0x40,%RAX |
(208) 0x431540 CMP %R11,%RAX |
(208) 0x431543 JE 43165d |
(209) 0x431549 VMOVUPD (%R15,%RAX,1),%ZMM14 |
(209) 0x431550 VMOVUPD %ZMM14,(%R13,%RAX,1) |
(209) 0x431558 VMOVUPD (%R14,%RAX,1),%ZMM15 |
(209) 0x43155f VMOVUPD %ZMM15,(%RBX,%RAX,1) |
(209) 0x431566 VMOVUPD 0x40(%R15,%RAX,1),%ZMM1 |
(209) 0x43156e VMOVUPD %ZMM1,0x40(%R13,%RAX,1) |
(209) 0x431576 VMOVUPD 0x40(%R14,%RAX,1),%ZMM2 |
(209) 0x43157e VMOVUPD %ZMM2,0x40(%RBX,%RAX,1) |
(209) 0x431586 VMOVUPD 0x80(%R15,%RAX,1),%ZMM0 |
(209) 0x43158e VMOVUPD %ZMM0,0x80(%R13,%RAX,1) |
(209) 0x431596 VMOVUPD 0x80(%R14,%RAX,1),%ZMM3 |
(209) 0x43159e VMOVUPD %ZMM3,0x80(%RBX,%RAX,1) |
(209) 0x4315a6 VMOVUPD 0xc0(%R15,%RAX,1),%ZMM5 |
(209) 0x4315ae VMOVUPD %ZMM5,0xc0(%R13,%RAX,1) |
(209) 0x4315b6 VMOVUPD 0xc0(%R14,%RAX,1),%ZMM6 |
(209) 0x4315be VMOVUPD %ZMM6,0xc0(%RBX,%RAX,1) |
(209) 0x4315c6 VMOVUPD 0x100(%R15,%RAX,1),%ZMM4 |
(209) 0x4315ce VMOVUPD %ZMM4,0x100(%R13,%RAX,1) |
(209) 0x4315d6 VMOVUPD 0x100(%R14,%RAX,1),%ZMM7 |
(209) 0x4315de VMOVUPD %ZMM7,0x100(%RBX,%RAX,1) |
(209) 0x4315e6 VMOVUPD 0x140(%R15,%RAX,1),%ZMM8 |
(209) 0x4315ee VMOVUPD %ZMM8,0x140(%R13,%RAX,1) |
(209) 0x4315f6 VMOVUPD 0x140(%R14,%RAX,1),%ZMM9 |
(209) 0x4315fe VMOVUPD %ZMM9,0x140(%RBX,%RAX,1) |
(209) 0x431606 VMOVUPD 0x180(%R15,%RAX,1),%ZMM10 |
(209) 0x43160e VMOVUPD %ZMM10,0x180(%R13,%RAX,1) |
(209) 0x431616 VMOVUPD 0x180(%R14,%RAX,1),%ZMM11 |
(209) 0x43161e VMOVUPD %ZMM11,0x180(%RBX,%RAX,1) |
(209) 0x431626 VMOVUPD 0x1c0(%R15,%RAX,1),%ZMM12 |
(209) 0x43162e VMOVUPD %ZMM12,0x1c0(%R13,%RAX,1) |
(209) 0x431636 VMOVUPD 0x1c0(%R14,%RAX,1),%ZMM13 |
(209) 0x43163e VMOVUPD %ZMM13,0x1c0(%RBX,%RAX,1) |
(209) 0x431646 MOV 0xe0(%RSP),%RDX |
(209) 0x43164e ADD $0x200,%RAX |
(209) 0x431654 CMP %RDX,%RAX |
(209) 0x431657 JNE 431549 |
(208) 0x43165d MOV 0x80(%RSP),%R15D |
(208) 0x431665 TEST %R15D,%R15D |
(208) 0x431668 JE 43179c |
(208) 0x43166e MOV 0x78(%RSP),%EDX |
(208) 0x431672 MOV 0x74(%RSP),%EAX |
(208) 0x431676 MOV 0xd8(%RSP),%R13D |
(208) 0x43167e SUB %EDX,%R13D |
(208) 0x431681 LEA 0x1(%R13),%R14D |
(208) 0x431685 CMP $0x2,%R13D |
(208) 0x431689 JBE 4316cb |
(208) 0x43168b MOV 0xf0(%RSP),%R11 |
(208) 0x431693 LEA (%R8,%RDX,1),%RBX |
(208) 0x431697 LEA (%RDX,%RDI,1),%R15 |
(208) 0x43169b LEA (%RDX,%RSI,1),%R13 |
(208) 0x43169f ADD %RCX,%RDX |
(208) 0x4316a2 VMOVUPD (%R11,%RBX,8),%YMM14 |
(208) 0x4316a8 VMOVUPD %YMM14,(%R10,%R15,8) |
(208) 0x4316ae VMOVUPD (%R9,%R13,8),%YMM15 |
(208) 0x4316b4 VMOVUPD %YMM15,(%R12,%RDX,8) |
(208) 0x4316ba TEST $0x3,%R14B |
(208) 0x4316be JE 43179c |
(208) 0x4316c4 AND $-0x4,%R14D |
(208) 0x4316c8 ADD %R14D,%EAX |
(208) 0x4316cb MOV 0x60(%RSP),%RDX |
(208) 0x4316d0 MOV %RCX,%R11 |
(208) 0x4316d3 MOV %R8,%R14 |
(208) 0x4316d6 MOV %RDI,%R13 |
(208) 0x4316d9 MOV %RSI,%RBX |
(208) 0x4316dc SUB %RDX,%R11 |
(208) 0x4316df SUB %RDX,%R14 |
(208) 0x4316e2 SUB %RDX,%R13 |
(208) 0x4316e5 SUB %RDX,%RBX |
(208) 0x4316e8 MOV %R11,0xd0(%RSP) |
(208) 0x4316f0 MOVSXD %EAX,%RDX |
(208) 0x4316f3 MOV 0xf0(%RSP),%R11 |
(208) 0x4316fb LEA (%R14,%RDX,1),%R15 |
(208) 0x4316ff VMOVSD (%R11,%R15,8),%XMM1 |
(208) 0x431705 LEA (%R13,%RDX,1),%R15 |
(208) 0x43170a VMOVSD %XMM1,(%R10,%R15,8) |
(208) 0x431710 LEA (%RBX,%RDX,1),%R15 |
(208) 0x431714 VMOVSD (%R9,%R15,8),%XMM2 |
(208) 0x43171a MOV 0xd0(%RSP),%R15 |
(208) 0x431722 ADD %R15,%RDX |
(208) 0x431725 VMOVSD %XMM2,(%R12,%RDX,8) |
(208) 0x43172b LEA 0x1(%RAX),%EDX |
(208) 0x43172e CMP %EDX,0xec(%RSP) |
(208) 0x431735 JL 43179c |
(208) 0x431737 MOVSXD %EDX,%RDX |
(208) 0x43173a ADD $0x2,%EAX |
(208) 0x43173d LEA (%R14,%RDX,1),%R15 |
(208) 0x431741 VMOVSD (%R11,%R15,8),%XMM0 |
(208) 0x431747 LEA (%R13,%RDX,1),%R15 |
(208) 0x43174c VMOVSD %XMM0,(%R10,%R15,8) |
(208) 0x431752 LEA (%RBX,%RDX,1),%R15 |
(208) 0x431756 VMOVSD (%R9,%R15,8),%XMM3 |
(208) 0x43175c MOV 0xd0(%RSP),%R15 |
(208) 0x431764 ADD %R15,%RDX |
(208) 0x431767 VMOVSD %XMM3,(%R12,%RDX,8) |
(208) 0x43176d CMP %EAX,0xec(%RSP) |
(208) 0x431774 JL 43179c |
(208) 0x431776 CLTQ |
(208) 0x431778 ADD %RAX,%R14 |
(208) 0x43177b ADD %RAX,%R13 |
(208) 0x43177e ADD %RAX,%RBX |
(208) 0x431781 ADD %RAX,%R15 |
(208) 0x431784 VMOVSD (%R11,%R14,8),%XMM5 |
(208) 0x43178a VMOVSD %XMM5,(%R10,%R13,8) |
(208) 0x431790 VMOVSD (%R9,%RBX,8),%XMM6 |
(208) 0x431796 VMOVSD %XMM6,(%R12,%R15,8) |
(208) 0x43179c MOV 0x70(%RSP),%EAX |
(208) 0x4317a0 MOV $0x1,%R13D |
(208) 0x4317a6 MOV %EAX,0xd0(%RSP) |
(208) 0x4317ad NOPL (%RAX) |
(208) 0x4317b0 INCL 0xf8(%RSP) |
(208) 0x4317b7 MOV 0x98(%RSP),%RBX |
(208) 0x4317bf MOV 0x90(%RSP),%R11 |
(208) 0x4317c7 MOV 0xa8(%RSP),%RDX |
(208) 0x4317cf MOV 0xa0(%RSP),%R15 |
(208) 0x4317d7 ADD %RBX,%R8 |
(208) 0x4317da ADD %R11,%RDI |
(208) 0x4317dd ADD %RDX,%RSI |
(208) 0x4317e0 MOV 0xf8(%RSP),%R14D |
(208) 0x4317e8 ADD %R15,%RCX |
(208) 0x4317eb CMP %R14D,0x88(%RSP) |
(208) 0x4317f3 JG 4313e8 |
0x4317f9 MOV 0x58(%RSP),%R14D |
0x4317fe TEST %R13B,%R13B |
0x431801 JE 431e90 |
0x431807 MOV 0x68(%RSP),%R10 |
0x43180c MOV 0xd0(%RSP),%R9D |
0x431814 MOV %R9D,0xe0(%R10) |
0x43181b VZEROUPPER |
0x43181e CALL 402220 <@plt_start@+0x200> |
0x431823 MOV 0x68(%RSP),%R12 |
0x431828 MOV 0x18(%R12),%RSI |
0x43182d MOV 0x10(%R12),%R8 |
0x431832 MOV (%RSI),%EAX |
0x431834 MOV (%R8),%EDI |
0x431837 ADD $0x2,%EAX |
0x43183a SUB %EDI,%EAX |
0x43183c CLTD |
0x43183d IDIVL 0x5c(%RSP) |
0x431841 CMP %EDX,%R14D |
0x431844 JL 431e7e |
0x43184a IMUL %EAX,%R14D |
0x43184e ADD %R14D,%EDX |
0x431851 ADD %EDX,%EAX |
0x431853 CMP %EAX,%EDX |
0x431855 JGE 431dd7 |
0x43185b MOV 0x68(%RSP),%R12 |
0x431860 LEA (%RDI,%RDX,1),%ECX |
0x431863 ADD %EDI,%EAX |
0x431865 MOV 0xb8(%RSP),%RDI |
0x43186d KXORB %K0,%K0,%K0 |
0x431871 MOV 0xb0(%RSP),%RSI |
0x431879 MOV 0xc8(%RSP),%RDX |
0x431881 MOV %EAX,0xd0(%RSP) |
0x431888 MOVSXD %ECX,%RAX |
0x43188b MOV (%R12),%R13 |
0x43188f MOV 0x50(%R12),%R8 |
0x431894 IMUL %RAX,%RDI |
0x431898 MOV %ECX,0xf0(%RSP) |
0x43189f MOV 0x8(%R12),%R11 |
0x4318a4 IMUL %RAX,%RSI |
0x4318a8 MOV 0x40(%R12),%R10 |
0x4318ad MOVSXD (%R13),%R14 |
0x4318b1 MOV 0x58(%R12),%R9 |
0x4318b6 MOV %R8,0xf8(%RSP) |
0x4318be IMUL %RAX,%RDX |
0x4318c2 MOV 0x40(%RSP),%R8 |
0x4318c7 MOV (%R11),%R15D |
0x4318ca MOV 0x48(%R12),%R11 |
0x4318cf MOV 0xc0(%RSP),%R12 |
0x4318d7 MOV %R14,%RBX |
0x4318da MOV %R14D,0xe0(%RSP) |
0x4318e2 ADD %R14,%R8 |
0x4318e5 MOV 0x48(%RSP),%RCX |
0x4318ea LEA 0x2(%R15),%R13D |
0x4318ee MOV %R15D,0x7c(%RSP) |
0x4318f3 ADD %RDI,%R8 |
0x4318f6 MOV 0x38(%RSP),%RDI |
0x4318fb IMUL %R12,%RAX |
0x4318ff SUB %R14D,%R15D |
0x431902 ADD %R14,%RCX |
0x431905 MOV %R14,0x80(%RSP) |
0x43190d ADD %R14,%RDI |
0x431910 MOV %R13D,0xec(%RSP) |
0x431918 ADD %RSI,%RDI |
0x43191b MOV 0x50(%RSP),%RSI |
0x431920 ADD %RAX,%RCX |
0x431923 MOV %R15D,0x90(%RSP) |
0x43192b ADD %R14,%RSI |
0x43192e LEA 0x2(%R15),%R14D |
0x431932 ADD %RDX,%RSI |
0x431935 MOV %R14D,%EAX |
0x431938 MOV %R14D,%EDX |
0x43193b AND $-0x8,%EDX |
0x43193e SHR $0x3,%EAX |
0x431941 SAL $0x6,%RAX |
0x431945 MOV %EDX,0x8c(%RSP) |
0x43194c ADD %EBX,%EDX |
0x43194e CMP %R13D,%EBX |
0x431951 CMOVGE %EBX,%R13D |
0x431955 LEA 0x1(%R15),%EBX |
0x431959 AND $0x7,%R14D |
0x43195d MOV %RAX,0xd8(%RSP) |
0x431965 MOV %EDX,0x88(%RSP) |
0x43196c MOV $0x1,%R15D |
0x431972 MOV %R13D,0xa8(%RSP) |
0x43197a KMOVB %R15D,%K1 |
0x43197f MOV %EBX,0xa0(%RSP) |
0x431986 MOV %R14D,0x98(%RSP) |
0x43198e XCHG %AX,%AX |
(206) 0x431990 MOV 0xec(%RSP),%R13D |
(206) 0x431998 CMP %R13D,0xe0(%RSP) |
(206) 0x4319a0 JGE 431d35 |
(206) 0x4319a6 CMPL $0x6,0xa0(%RSP) |
(206) 0x4319ae JBE 431e58 |
(206) 0x4319b4 MOV 0xd8(%RSP),%RDX |
(206) 0x4319bc MOV 0xf8(%RSP),%RAX |
(206) 0x4319c4 LEA (%R11,%R8,8),%R15 |
(206) 0x4319c8 LEA (%R10,%RDI,8),%R13 |
(206) 0x4319cc LEA (%R9,%RSI,8),%R12 |
(206) 0x4319d0 XOR %R14D,%R14D |
(206) 0x4319d3 SUB $0x40,%RDX |
(206) 0x4319d7 LEA (%RAX,%RCX,8),%RBX |
(206) 0x4319db SHR $0x6,%RDX |
(206) 0x4319df INC %RDX |
(206) 0x4319e2 AND $0x7,%EDX |
(206) 0x4319e5 JE 431aef |
(206) 0x4319eb CMP $0x1,%RDX |
(206) 0x4319ef JE 431ac0 |
(206) 0x4319f5 CMP $0x2,%RDX |
(206) 0x4319f9 JE 431a9f |
(206) 0x4319ff CMP $0x3,%RDX |
(206) 0x431a03 JE 431a7e |
(206) 0x431a05 CMP $0x4,%RDX |
(206) 0x431a09 JE 431a5d |
(206) 0x431a0b CMP $0x5,%RDX |
(206) 0x431a0f JE 431a3c |
(206) 0x431a11 CMP $0x6,%RDX |
(206) 0x431a15 JNE 431e08 |
(206) 0x431a1b VMOVUPD (%R15,%R14,1),%ZMM8 |
(206) 0x431a22 VMOVUPD %ZMM8,(%R13,%R14,1) |
(206) 0x431a2a VMOVUPD (%R12,%R14,1),%ZMM9 |
(206) 0x431a31 VMOVUPD %ZMM9,(%RBX,%R14,1) |
(206) 0x431a38 ADD $0x40,%R14 |
(206) 0x431a3c VMOVUPD (%R15,%R14,1),%ZMM10 |
(206) 0x431a43 VMOVUPD %ZMM10,(%R13,%R14,1) |
(206) 0x431a4b VMOVUPD (%R12,%R14,1),%ZMM11 |
(206) 0x431a52 VMOVUPD %ZMM11,(%RBX,%R14,1) |
(206) 0x431a59 ADD $0x40,%R14 |
(206) 0x431a5d VMOVUPD (%R15,%R14,1),%ZMM12 |
(206) 0x431a64 VMOVUPD %ZMM12,(%R13,%R14,1) |
(206) 0x431a6c VMOVUPD (%R12,%R14,1),%ZMM13 |
(206) 0x431a73 VMOVUPD %ZMM13,(%RBX,%R14,1) |
(206) 0x431a7a ADD $0x40,%R14 |
(206) 0x431a7e VMOVUPD (%R15,%R14,1),%ZMM14 |
(206) 0x431a85 VMOVUPD %ZMM14,(%R13,%R14,1) |
(206) 0x431a8d VMOVUPD (%R12,%R14,1),%ZMM15 |
(206) 0x431a94 VMOVUPD %ZMM15,(%RBX,%R14,1) |
(206) 0x431a9b ADD $0x40,%R14 |
(206) 0x431a9f VMOVUPD (%R15,%R14,1),%ZMM1 |
(206) 0x431aa6 VMOVUPD %ZMM1,(%R13,%R14,1) |
(206) 0x431aae VMOVUPD (%R12,%R14,1),%ZMM2 |
(206) 0x431ab5 VMOVUPD %ZMM2,(%RBX,%R14,1) |
(206) 0x431abc ADD $0x40,%R14 |
(206) 0x431ac0 VMOVUPD (%R15,%R14,1),%ZMM0 |
(206) 0x431ac7 VMOVUPD %ZMM0,(%R13,%R14,1) |
(206) 0x431acf VMOVUPD (%R12,%R14,1),%ZMM3 |
(206) 0x431ad6 VMOVUPD %ZMM3,(%RBX,%R14,1) |
(206) 0x431add ADD $0x40,%R14 |
(206) 0x431ae1 CMP %R14,0xd8(%RSP) |
(206) 0x431ae9 JE 431c01 |
(207) 0x431aef VMOVUPD (%R15,%R14,1),%ZMM5 |
(207) 0x431af6 VMOVUPD %ZMM5,(%R13,%R14,1) |
(207) 0x431afe VMOVUPD (%R12,%R14,1),%ZMM6 |
(207) 0x431b05 VMOVUPD %ZMM6,(%RBX,%R14,1) |
(207) 0x431b0c VMOVUPD 0x40(%R15,%R14,1),%ZMM4 |
(207) 0x431b14 VMOVUPD %ZMM4,0x40(%R13,%R14,1) |
(207) 0x431b1c VMOVUPD 0x40(%R12,%R14,1),%ZMM7 |
(207) 0x431b24 VMOVUPD %ZMM7,0x40(%RBX,%R14,1) |
(207) 0x431b2c VMOVUPD 0x80(%R15,%R14,1),%ZMM8 |
(207) 0x431b34 VMOVUPD %ZMM8,0x80(%R13,%R14,1) |
(207) 0x431b3c VMOVUPD 0x80(%R12,%R14,1),%ZMM9 |
(207) 0x431b44 VMOVUPD %ZMM9,0x80(%RBX,%R14,1) |
(207) 0x431b4c VMOVUPD 0xc0(%R15,%R14,1),%ZMM10 |
(207) 0x431b54 VMOVUPD %ZMM10,0xc0(%R13,%R14,1) |
(207) 0x431b5c VMOVUPD 0xc0(%R12,%R14,1),%ZMM11 |
(207) 0x431b64 VMOVUPD %ZMM11,0xc0(%RBX,%R14,1) |
(207) 0x431b6c VMOVUPD 0x100(%R15,%R14,1),%ZMM12 |
(207) 0x431b74 VMOVUPD %ZMM12,0x100(%R13,%R14,1) |
(207) 0x431b7c VMOVUPD 0x100(%R12,%R14,1),%ZMM13 |
(207) 0x431b84 VMOVUPD %ZMM13,0x100(%RBX,%R14,1) |
(207) 0x431b8c VMOVUPD 0x140(%R15,%R14,1),%ZMM14 |
(207) 0x431b94 VMOVUPD %ZMM14,0x140(%R13,%R14,1) |
(207) 0x431b9c VMOVUPD 0x140(%R12,%R14,1),%ZMM15 |
(207) 0x431ba4 VMOVUPD %ZMM15,0x140(%RBX,%R14,1) |
(207) 0x431bac VMOVUPD 0x180(%R15,%R14,1),%ZMM1 |
(207) 0x431bb4 VMOVUPD %ZMM1,0x180(%R13,%R14,1) |
(207) 0x431bbc VMOVUPD 0x180(%R12,%R14,1),%ZMM2 |
(207) 0x431bc4 VMOVUPD %ZMM2,0x180(%RBX,%R14,1) |
(207) 0x431bcc VMOVUPD 0x1c0(%R15,%R14,1),%ZMM0 |
(207) 0x431bd4 VMOVUPD %ZMM0,0x1c0(%R13,%R14,1) |
(207) 0x431bdc VMOVUPD 0x1c0(%R12,%R14,1),%ZMM3 |
(207) 0x431be4 VMOVUPD %ZMM3,0x1c0(%RBX,%R14,1) |
(207) 0x431bec ADD $0x200,%R14 |
(207) 0x431bf3 CMP %R14,0xd8(%RSP) |
(207) 0x431bfb JNE 431aef |
(206) 0x431c01 MOV 0x98(%RSP),%R15D |
(206) 0x431c09 TEST %R15D,%R15D |
(206) 0x431c0c JE 431d35 |
(206) 0x431c12 MOV 0x8c(%RSP),%R14D |
(206) 0x431c1a MOV 0x88(%RSP),%EDX |
(206) 0x431c21 MOV 0x90(%RSP),%R13D |
(206) 0x431c29 SUB %R14D,%R13D |
(206) 0x431c2c LEA 0x2(%R13),%EAX |
(206) 0x431c30 INC %R13D |
(206) 0x431c33 CMP $0x2,%R13D |
(206) 0x431c37 JBE 431c76 |
(206) 0x431c39 LEA (%R14,%R8,1),%R12 |
(206) 0x431c3d LEA (%RDI,%R14,1),%RBX |
(206) 0x431c41 MOV 0xf8(%RSP),%R13 |
(206) 0x431c49 VMOVUPD (%R11,%R12,8),%YMM5 |
(206) 0x431c4f LEA (%RSI,%R14,1),%R15 |
(206) 0x431c53 ADD %RCX,%R14 |
(206) 0x431c56 VMOVUPD %YMM5,(%R10,%RBX,8) |
(206) 0x431c5c VMOVUPD (%R9,%R15,8),%YMM6 |
(206) 0x431c62 VMOVUPD %YMM6,(%R13,%R14,8) |
(206) 0x431c69 TEST $0x3,%AL |
(206) 0x431c6b JE 431d35 |
(206) 0x431c71 AND $-0x4,%EAX |
(206) 0x431c74 ADD %EAX,%EDX |
(206) 0x431c76 MOV 0x80(%RSP),%RAX |
(206) 0x431c7e MOV %R8,%R14 |
(206) 0x431c81 MOV %RDI,%R13 |
(206) 0x431c84 MOV %RSI,%R12 |
(206) 0x431c87 MOV %RCX,%RBX |
(206) 0x431c8a SUB %RAX,%R14 |
(206) 0x431c8d SUB %RAX,%R13 |
(206) 0x431c90 SUB %RAX,%R12 |
(206) 0x431c93 SUB %RAX,%RBX |
(206) 0x431c96 MOVSXD %EDX,%RAX |
(206) 0x431c99 LEA (%RAX,%R14,1),%R15 |
(206) 0x431c9d VMOVSD (%R11,%R15,8),%XMM4 |
(206) 0x431ca3 LEA (%RAX,%R13,1),%R15 |
(206) 0x431ca7 VMOVSD %XMM4,(%R10,%R15,8) |
(206) 0x431cad LEA (%RAX,%R12,1),%R15 |
(206) 0x431cb1 ADD %RBX,%RAX |
(206) 0x431cb4 VMOVSD (%R9,%R15,8),%XMM7 |
(206) 0x431cba MOV 0xf8(%RSP),%R15 |
(206) 0x431cc2 VMOVSD %XMM7,(%R15,%RAX,8) |
(206) 0x431cc8 LEA 0x1(%RDX),%EAX |
(206) 0x431ccb CMP %EAX,0xec(%RSP) |
(206) 0x431cd2 JLE 431d35 |
(206) 0x431cd4 CLTQ |
(206) 0x431cd6 LEA (%R14,%RAX,1),%R15 |
(206) 0x431cda VMOVSD (%R11,%R15,8),%XMM8 |
(206) 0x431ce0 LEA (%R13,%RAX,1),%R15 |
(206) 0x431ce5 VMOVSD %XMM8,(%R10,%R15,8) |
(206) 0x431ceb LEA (%R12,%RAX,1),%R15 |
(206) 0x431cef ADD %RBX,%RAX |
(206) 0x431cf2 VMOVSD (%R9,%R15,8),%XMM9 |
(206) 0x431cf8 MOV 0xf8(%RSP),%R15 |
(206) 0x431d00 VMOVSD %XMM9,(%R15,%RAX,8) |
(206) 0x431d06 LEA 0x2(%RDX),%EAX |
(206) 0x431d09 CMP %EDX,0x7c(%RSP) |
(206) 0x431d0d JLE 431d35 |
(206) 0x431d0f CLTQ |
(206) 0x431d11 ADD %RAX,%R14 |
(206) 0x431d14 ADD %RAX,%R13 |
(206) 0x431d17 ADD %RAX,%R12 |
(206) 0x431d1a ADD %RAX,%RBX |
(206) 0x431d1d VMOVSD (%R11,%R14,8),%XMM10 |
(206) 0x431d23 VMOVSD %XMM10,(%R10,%R13,8) |
(206) 0x431d29 VMOVSD (%R9,%R12,8),%XMM11 |
(206) 0x431d2f VMOVSD %XMM11,(%R15,%RBX,8) |
(206) 0x431d35 MOV 0xec(%RSP),%EDX |
(206) 0x431d3c MOV 0xe8(%RSP),%R14D |
(206) 0x431d44 KMOVB %K0,%R13D |
(206) 0x431d48 KMOVB %K1,%R12D |
(206) 0x431d4c MOV 0xb8(%RSP),%RBX |
(206) 0x431d54 MOV 0xb0(%RSP),%RAX |
(206) 0x431d5c CMP %EDX,0xe0(%RSP) |
(206) 0x431d63 MOV 0xc8(%RSP),%RDX |
(206) 0x431d6b CMOVLE 0xa8(%RSP),%R14D |
(206) 0x431d74 CMOVLE %R12D,%R13D |
(206) 0x431d78 INCL 0xf0(%RSP) |
(206) 0x431d7f ADD %RBX,%R8 |
(206) 0x431d82 ADD %RAX,%RDI |
(206) 0x431d85 ADD %RDX,%RSI |
(206) 0x431d88 MOV %R14D,0xe8(%RSP) |
(206) 0x431d90 MOV 0xc0(%RSP),%R14 |
(206) 0x431d98 KMOVB %R13D,%K0 |
(206) 0x431d9d MOV 0xf0(%RSP),%R15D |
(206) 0x431da5 ADD %R14,%RCX |
(206) 0x431da8 CMP %R15D,0xd0(%RSP) |
(206) 0x431db0 JG 431990 |
0x431db6 KORTESTB %K0,%K0 |
0x431dba JE 431e98 |
0x431dc0 MOV 0x68(%RSP),%R11 |
0x431dc5 MOV 0xe8(%RSP),%R10D |
0x431dcd MOV %R10D,0xe0(%R11) |
0x431dd4 VZEROUPPER |
0x431dd7 LEA -0x28(%RBP),%RSP |
0x431ddb POP %RBX |
0x431ddc POP %R12 |
0x431dde POP %R13 |
0x431de0 POP %R14 |
0x431de2 POP %R15 |
0x431de4 POP %RBP |
0x431de5 RET |
0x431de6 NOPW %CS:(%RAX,%RAX,1) |
(208) 0x431df0 MOV 0x70(%RSP),%EBX |
(208) 0x431df4 CMP %EBX,0x7c(%RSP) |
(208) 0x431df8 JNE 4317b0 |
(208) 0x431dfe JMP 43179c |
0x431e03 NOPL (%RAX,%RAX,1) |
(206) 0x431e08 VMOVUPD (%R15),%ZMM4 |
(206) 0x431e0e MOV $0x40,%R14D |
(206) 0x431e14 VMOVUPD %ZMM4,(%R13) |
(206) 0x431e1b VMOVUPD (%R12),%ZMM7 |
(206) 0x431e22 VMOVUPD %ZMM7,(%RBX) |
(206) 0x431e28 JMP 431a1b |
0x431e2d NOPL (%RAX) |
(208) 0x431e30 VMOVUPD (%R15),%ZMM1 |
(208) 0x431e36 MOV $0x40,%EAX |
(208) 0x431e3b VMOVUPD %ZMM1,(%R13) |
(208) 0x431e42 VMOVUPD (%R14),%ZMM2 |
(208) 0x431e48 VMOVUPD %ZMM2,(%RBX) |
(208) 0x431e4e JMP 431472 |
0x431e53 NOPL (%RAX,%RAX,1) |
(206) 0x431e58 MOV 0xe0(%RSP),%EDX |
(206) 0x431e5f XOR %R14D,%R14D |
(206) 0x431e62 JMP 431c21 |
0x431e67 NOPW (%RAX,%RAX,1) |
(208) 0x431e70 MOV 0x8c(%RSP),%EAX |
(208) 0x431e77 XOR %EDX,%EDX |
(208) 0x431e79 JMP 431676 |
0x431e7e INC %EAX |
0x431e80 XOR %EDX,%EDX |
0x431e82 JMP 43184a |
0x431e87 INC %EAX |
0x431e89 XOR %EDX,%EDX |
0x431e8b JMP 4312ba |
0x431e90 VZEROUPPER |
0x431e93 JMP 43181e |
0x431e98 VZEROUPPER |
0x431e9b LEA -0x28(%RBP),%RSP |
0x431e9f POP %RBX |
0x431ea0 POP %R12 |
0x431ea2 POP %R13 |
0x431ea4 POP %R14 |
0x431ea6 POP %R15 |
0x431ea8 POP %RBP |
0x431ea9 RET |
0x431eaa NOPW (%RAX,%RAX,1) |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
○98.23 | gomp_thread_start | team.c:130 | libgomp.so.1.0.0 |
○1.77 | GOMP_parallel | libgomp.h:985 | libgomp.so.1.0.0 |
Path / |
Source file and lines | reset_field_kernel.f90:47-63 |
Module | exec |
nb instructions | 248 |
nb uops | 263 |
loop length | 1121 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 31 |
micro-operation queue | 43.83 cycles |
front end | 43.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 17.80 | 17.80 | 26.67 | 26.67 | 27.50 | 17.80 | 17.80 | 27.50 | 27.50 | 27.50 | 17.80 | 26.67 |
cycles | 17.80 | 27.20 | 26.67 | 26.67 | 27.50 | 17.80 | 17.80 | 27.50 | 27.50 | 27.50 | 17.80 | 26.67 |
Cycles executing div or sqrt instructions | 12.00 |
FE+BE cycles | 44.94-44.90 |
Stall cycles | 2.73-2.63 |
LM full (events) | 3.72-3.62 |
Front-end | 43.83 |
Dispatch | 27.50 |
DIV/SQRT | 12.00 |
Overall L1 | 43.83 |
all | 6% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 28% |
all | 9% |
load | 8% |
store | 9% |
mul | 6% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RDI,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x100,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0xb8(%RDI),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb0(%RDI),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa8(%RDI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xa0(%RDI),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x90(%RDI),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xd0(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc8(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xc0(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x88(%RDI),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x80(%RDI),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd8(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x98(%RDI),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R14,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RDI),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x68(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x60(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RDI),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 402080 <@plt_start@+0x60> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,0x5c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 402180 <@plt_start@+0x160> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x18(%R12),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV (%R12),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIVL 0x5c(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 6 |
CMP %EDX,%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 431e87 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0.lto_priv.0+0xce7> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %R14D,%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %ESI,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %EDX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 43181e <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0.lto_priv.0+0x67e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x68(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RBX,%RDX,1),%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x98(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RCX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RCX),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8D,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RCX),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RCX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14D,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R9),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R10),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RCX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RCX),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDI),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOVSXD %EBX,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV %EDI,0xec(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe0(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x7c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD %R8D,%RAX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
LEA (%R15,%RCX,1),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x90(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RAX,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %RCX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%R13,%RCX,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xa8(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RAX,%R15 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RCX,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %RAX,%R13 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EBX,0x8c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RDX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0xf0(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R15,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0xa0(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R13,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
IMUL %R15,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0xec(%RSP),%R15D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EAX,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EAX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EAX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x3,%R13D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
AND $-0x8,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SAL $0x6,%R13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
CMP %R15D,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RDX,%RBX,1),%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMOVLE 0x7c(%RSP),%EBX | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.50 |
AND $0x7,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EAX,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EBX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13D,0x74(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %R13D,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x58(%RSP),%R14D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R13B,%R13B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 431e90 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0.lto_priv.0+0xcf0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x68(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xd0(%RSP),%R9D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9D,0xe0(%R10) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402220 <@plt_start@+0x200> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x68(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%R12),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R12),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RSI),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x2,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %EDI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIVL 0x5c(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 6 |
CMP %EDX,%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 431e7e <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0.lto_priv.0+0xcde> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %EAX,%R14D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %R14D,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %EDX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 431dd7 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0.lto_priv.0+0xc37> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x68(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RDI,%RDX,1),%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %EDI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0xb8(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
KXORB %K0,%K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV 0xb0(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xc8(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD %ECX,%RAX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV (%R12),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%R12),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RAX,%RDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %ECX,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x8(%R12),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RAX,%RSI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x40(%R12),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD (%R13),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%R12),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %RAX,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x40(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R11),%R15D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%R12),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xc0(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R14D,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R14,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x48(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x2(%R15),%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R15D,0x7c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RDI,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x38(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %R12,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
SUB %R14D,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R14,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R14,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R14,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R13D,0xec(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RSI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x50(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15D,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R14,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x2(%R15),%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %RDX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R14D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R14D,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x8,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x3,%EAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SAL $0x6,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %EDX,0x8c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %EBX,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R13D,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVGE %EBX,%R13D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA 0x1(%R15),%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
AND $0x7,%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RAX,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDX,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x1,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R13D,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
KMOVB %R15D,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EBX,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R14D,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KORTESTB %K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JE 431e98 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0.lto_priv.0+0xcf8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x68(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe8(%RSP),%R10D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10D,0xe0(%R11) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 43184a <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0.lto_priv.0+0x6aa> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4312ba <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0.lto_priv.0+0x11a> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 43181e <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0.lto_priv.0+0x67e> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | reset_field_kernel.f90:47-63 |
Module | exec |
nb instructions | 248 |
nb uops | 263 |
loop length | 1121 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 31 |
micro-operation queue | 43.83 cycles |
front end | 43.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 17.80 | 17.80 | 26.67 | 26.67 | 27.50 | 17.80 | 17.80 | 27.50 | 27.50 | 27.50 | 17.80 | 26.67 |
cycles | 17.80 | 27.20 | 26.67 | 26.67 | 27.50 | 17.80 | 17.80 | 27.50 | 27.50 | 27.50 | 17.80 | 26.67 |
Cycles executing div or sqrt instructions | 12.00 |
FE+BE cycles | 44.94-44.90 |
Stall cycles | 2.73-2.63 |
LM full (events) | 3.72-3.62 |
Front-end | 43.83 |
Dispatch | 27.50 |
DIV/SQRT | 12.00 |
Overall L1 | 43.83 |
all | 6% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 28% |
all | 9% |
load | 8% |
store | 9% |
mul | 6% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RDI,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x100,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0xb8(%RDI),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb0(%RDI),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa8(%RDI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xa0(%RDI),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x90(%RDI),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xd0(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc8(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xc0(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x88(%RDI),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x80(%RDI),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd8(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x98(%RDI),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R14,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RDI),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x68(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x60(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RDI),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 402080 <@plt_start@+0x60> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,0x5c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 402180 <@plt_start@+0x160> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x18(%R12),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV (%R12),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIVL 0x5c(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 6 |
CMP %EDX,%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 431e87 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0.lto_priv.0+0xce7> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %R14D,%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %ESI,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %EDX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 43181e <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0.lto_priv.0+0x67e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x68(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RBX,%RDX,1),%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x98(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RCX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RCX),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8D,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RCX),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RCX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14D,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R9),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R10),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RCX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RCX),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDI),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOVSXD %EBX,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV %EDI,0xec(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe0(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x7c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD %R8D,%RAX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
LEA (%R15,%RCX,1),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x90(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RAX,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %RCX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%R13,%RCX,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xa8(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RAX,%R15 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RCX,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %RAX,%R13 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EBX,0x8c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RDX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0xf0(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R15,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0xa0(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R13,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
IMUL %R15,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0xec(%RSP),%R15D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EAX,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EAX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EAX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x3,%R13D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
AND $-0x8,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SAL $0x6,%R13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
CMP %R15D,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RDX,%RBX,1),%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMOVLE 0x7c(%RSP),%EBX | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.50 |
AND $0x7,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EAX,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EBX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13D,0x74(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %R13D,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x58(%RSP),%R14D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R13B,%R13B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 431e90 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0.lto_priv.0+0xcf0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x68(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xd0(%RSP),%R9D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9D,0xe0(%R10) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402220 <@plt_start@+0x200> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x68(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%R12),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R12),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RSI),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x2,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %EDI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIVL 0x5c(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 6 |
CMP %EDX,%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 431e7e <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0.lto_priv.0+0xcde> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %EAX,%R14D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %R14D,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %EDX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 431dd7 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0.lto_priv.0+0xc37> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x68(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RDI,%RDX,1),%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %EDI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0xb8(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
KXORB %K0,%K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV 0xb0(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xc8(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD %ECX,%RAX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV (%R12),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%R12),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RAX,%RDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %ECX,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x8(%R12),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RAX,%RSI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x40(%R12),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD (%R13),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%R12),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %RAX,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x40(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R11),%R15D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%R12),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xc0(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R14D,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R14,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x48(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x2(%R15),%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R15D,0x7c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RDI,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x38(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %R12,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
SUB %R14D,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R14,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R14,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R14,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R13D,0xec(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RSI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x50(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15D,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R14,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x2(%R15),%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %RDX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R14D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R14D,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x8,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x3,%EAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SAL $0x6,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %EDX,0x8c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %EBX,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R13D,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVGE %EBX,%R13D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA 0x1(%R15),%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
AND $0x7,%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RAX,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDX,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x1,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R13D,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
KMOVB %R15D,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EBX,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R14D,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KORTESTB %K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JE 431e98 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0.lto_priv.0+0xcf8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x68(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe8(%RSP),%R10D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10D,0xe0(%R11) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 43184a <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0.lto_priv.0+0x6aa> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4312ba <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0.lto_priv.0+0x11a> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 43181e <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0.lto_priv.0+0x67e> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0.lto_priv.0– | 4.88 | 3.63 |
▼Loop 208 - reset_field_kernel.f90:47-53 - exec– | 0 | 0.01 |
○Loop 209 - reset_field_kernel.f90:52-53 - exec | 2.29 | 1.7 |
▼Loop 206 - reset_field_kernel.f90:60-63 - exec– | 0 | 0.01 |
○Loop 207 - reset_field_kernel.f90:62-63 - exec | 2.6 | 1.93 |