Loop Id: 348 | Module: exec | Source: pack_kernel.f90:109-113 | Coverage: 0.01% |
---|
Loop Id: 348 | Module: exec | Source: pack_kernel.f90:109-113 | Coverage: 0.01% |
---|
0x445c80 MOV %R9D,%R8D |
0x445c83 LEA 0x1(%RDI),%EAX |
0x445c86 INC %EDX |
0x445c88 MOV %R8D,%R9D |
0x445c8b CMP %EBX,%EDI |
0x445c8d MOV %EAX,%EDI |
0x445c8f JE 445bda |
0x445c95 TEST %R9D,%R9D |
0x445c98 JLE 445c80 |
0x445c9a MOV -0x50(%RBP),%RAX |
0x445c9e ADD %EDI,%EAX |
0x445ca0 MOV -0x68(%RBP),%RCX |
0x445ca4 MOVSXD (%RCX),%R14 |
0x445ca7 MOV -0x48(%RBP),%RCX |
0x445cab MOV (%RCX),%R8D |
0x445cae MOV -0x70(%RBP),%RCX |
0x445cb2 MOV (%RCX),%RSI |
0x445cb5 MOV 0x38(%RCX),%RCX |
0x445cb9 MOV -0x58(%RBP),%R12 |
0x445cbd MOV (%R12),%R15 |
0x445cc1 MOV 0x38(%R12),%R11 |
0x445cc6 MOV -0x60(%RBP),%R10 |
0x445cca MOVSXD (%R10),%R10 |
0x445ccd VPBROADCASTQ %RCX,%ZMM5 |
0x445cd3 MOV 0x50(%R12),%RCX |
0x445cd8 MOV %R9D,%R13D |
0x445cdb VPBROADCASTQ %R11,%ZMM4 |
0x445ce1 MOV %R13,%R11 |
0x445ce4 VPBROADCASTQ %R13,%ZMM8 |
0x445cea VPBROADCASTQ %RSI,%ZMM7 |
0x445cf0 VPBROADCASTQ %R15,%ZMM6 |
0x445cf6 CLTQ |
0x445cf8 MOV $-0x8,%R9D |
0x445cfe AND %R9,%R11 |
0x445d01 JE 445dc0 |
0x445d07 MOV %EBX,%R12D |
0x445d0a LEA -0x1(%RAX,%R8,1),%R9D |
0x445d0f IMUL %R8D,%R9D |
0x445d13 MOVSXD %R9D,%R9 |
0x445d16 INC %RAX |
0x445d19 IMUL %RAX,%RCX |
0x445d1d VPBROADCASTQ %RCX,%ZMM9 |
0x445d23 ADD %R14,%R9 |
0x445d26 LEA (%R8,%RDX,1),%EAX |
0x445d2a IMUL %R8D,%EAX |
0x445d2e CLTQ |
0x445d30 ADD %R14,%RAX |
0x445d33 ADD %RCX,%R15 |
0x445d36 MOV %R10,%RCX |
0x445d39 XOR %R14D,%R14D |
0x445d3c NOPL (%RAX) |
(349) 0x445d40 LEA (%RAX,%R14,1),%RBX |
(349) 0x445d44 VPBROADCASTQ %RBX,%ZMM10 |
(349) 0x445d4a VPADDQ %ZMM2,%ZMM10,%ZMM10 |
(349) 0x445d50 VPMULLQ %ZMM10,%ZMM5,%ZMM10 |
(349) 0x445d56 KXNORW %K0,%K0,%K1 |
(349) 0x445d5a VXORPD %XMM11,%XMM11,%XMM11 |
(349) 0x445d5f VGATHERQPD (%RSI,%ZMM10,1),%ZMM11{%K1} |
(349) 0x445d66 VPBROADCASTQ %RCX,%ZMM10 |
(349) 0x445d6c VPADDQ %ZMM1,%ZMM10,%ZMM10 |
(349) 0x445d72 VPMULLQ %ZMM10,%ZMM4,%ZMM10 |
(349) 0x445d78 KXNORW %K0,%K0,%K1 |
(349) 0x445d7c VSCATTERQPD %ZMM11,(%R15,%ZMM10,1){%K1} |
(349) 0x445d83 ADD $0x8,%R14 |
(349) 0x445d87 ADD $-0x8,%RCX |
(349) 0x445d8b CMP %R11,%R14 |
(349) 0x445d8e JB 445d40 |
0x445d90 CMP %R13,%R11 |
0x445d93 JNE 445e00 |
0x445d95 MOV %R12D,%EBX |
0x445d98 JMP 445c83 |
0x445dc0 LEA -0x1(%RAX,%R8,1),%ESI |
0x445dc5 IMUL %R8D,%ESI |
0x445dc9 MOVSXD %ESI,%R9 |
0x445dcc ADD %R14,%R9 |
0x445dcf INC %RAX |
0x445dd2 IMUL %RAX,%RCX |
0x445dd6 VPBROADCASTQ %RCX,%ZMM9 |
0x445ddc VPBROADCASTQ %R10,%ZMM10 |
0x445de2 XOR %R11D,%R11D |
0x445de5 JMP 445e09 |
0x445e00 VPBROADCASTQ %R10,%ZMM10 |
0x445e06 MOV %R12D,%EBX |
0x445e09 VPBROADCASTQ %R11,%ZMM11 |
0x445e0f VPSUBQ %ZMM11,%ZMM8,%ZMM8 |
0x445e15 VPCMPNLEUQ %ZMM0,%ZMM8,%K1 |
0x445e1c ADD %R11,%R9 |
0x445e1f VPBROADCASTQ %R9,%ZMM8 |
0x445e25 VPADDQ %ZMM0,%ZMM8,%ZMM8 |
0x445e2b VPMULLQ %ZMM8,%ZMM5,%ZMM5 |
0x445e31 VPADDQ %ZMM5,%ZMM7,%ZMM5 |
0x445e37 VPXOR %XMM7,%XMM7,%XMM7 |
0x445e3b KMOVQ %K1,%K2 |
0x445e40 VGATHERQPD (,%ZMM5,1),%ZMM7{%K2} |
0x445e4b VPADDQ %ZMM9,%ZMM6,%ZMM5 |
0x445e51 VMOVAPD %ZMM7,%ZMM3{%K1} |
0x445e57 VPSUBQ %ZMM11,%ZMM10,%ZMM6 |
0x445e5d VPADDQ %ZMM1,%ZMM6,%ZMM6 |
0x445e63 VPMULLQ %ZMM6,%ZMM4,%ZMM4 |
0x445e69 VPADDQ %ZMM4,%ZMM5,%ZMM4 |
0x445e6f VSCATTERQPD %ZMM3,(,%ZMM4,1){%K1} |
0x445e7a JMP 445c83 |
/scratch_na/users/xoserete/qaas_runs/171-415-7919/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/pack_kernel.f90: 109 - 113 |
-------------------------------------------------------------------------------- |
109: DO k=y_min-depth,y_max+y_inc+depth |
110: !$OMP SIMD |
111: DO j=1,depth |
112: index= buffer_offset + j+(k+depth-1)*depth |
113: field(x_min-j,k)=left_rcv_buffer(index) |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_invoke_task_func | libiomp5.so |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.23 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.67 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.18 |
Bottlenecks | |
Function | clover_unpack_message_left_.DIR.OMP.PARALLEL.LOOP.2.split100 |
Source | pack_kernel.f90:109-113 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 10.92 |
CQA cycles if no scalar integer | 8.88 |
CQA cycles if FP arith vectorized | 10.92 |
CQA cycles if fully vectorized | 6.52 |
Front-end cycles | 10.75 |
DIV/SQRT cycles | 8.65 |
P0 cycles | 5.78 |
P1 cycles | 4.83 |
P2 cycles | 4.83 |
P3 cycles | 2.00 |
P4 cycles | 8.75 |
P5 cycles | 5.25 |
P6 cycles | 2.00 |
P7 cycles | 2.00 |
P8 cycles | 2.00 |
P9 cycles | 5.25 |
P10 cycles | 4.83 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 2 |
FE+BE cycles (UFS) | 10.92 - 17.43 |
Stall cycles (UFS) | 0.86 - 7.21 |
Nb insns | 49.75 |
Nb uops | 64.50 |
Nb loads | 11.00 |
Nb stores | 0.50 |
Nb stack references | 4.50 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 9.78 |
Bytes prefetched | 0.00 |
Bytes loaded | 107.00 |
Bytes stored | 32.00 |
Stride 0 | 0.75 |
Stride 1 | 0.00 |
Stride n | 1.25 |
Stride unknown | 0.50 |
Stride indirect | 2.50 |
Vectorization ratio all | 20.94 |
Vectorization ratio load | 16.67 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 55.56 |
Vectorization ratio add_sub | 43.75 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 10.64 |
Vector-efficiency ratio all | 27.15 |
Vector-efficiency ratio load | 27.08 |
Vector-efficiency ratio store | 100.00 |
Vector-efficiency ratio mul | 58.33 |
Vector-efficiency ratio add_sub | 49.02 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 16.98 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 16.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.50 |
Bottlenecks | |
Function | clover_unpack_message_left_.DIR.OMP.PARALLEL.LOOP.2.split100 |
Source | pack_kernel.f90:109-113 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 2.00 |
CQA cycles if no scalar integer | 2.00 |
CQA cycles if FP arith vectorized | 2.00 |
CQA cycles if fully vectorized | 0.13 |
Front-end cycles | 1.33 |
DIV/SQRT cycles | 1.00 |
P0 cycles | 1.00 |
P1 cycles | 0.00 |
P2 cycles | 0.00 |
P3 cycles | 0.00 |
P4 cycles | 1.00 |
P5 cycles | 1.00 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 1.00 |
P10 cycles | 0.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 2 |
FE+BE cycles (UFS) | 1.39 - 2.04 |
Stall cycles (UFS) | 0.00 - 0.05 |
Nb insns | 9.00 |
Nb uops | 8.00 |
Nb loads | 0.00 |
Nb stores | 0.00 |
Nb stack references | 0.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 0.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 0.00 |
Bytes stored | 0.00 |
Stride 0 | 0.00 |
Stride 1 | 0.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 0.00 |
Vectorization ratio load | NA |
Vectorization ratio store | NA |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 6.25 |
Vector-efficiency ratio load | NA |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 6.25 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 6.25 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.15 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.32 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.11 |
Bottlenecks | micro-operation queue, |
Function | clover_unpack_message_left_.DIR.OMP.PARALLEL.LOOP.2.split100 |
Source | pack_kernel.f90:109-113 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 15.50 |
CQA cycles if no scalar integer | 13.50 |
CQA cycles if FP arith vectorized | 15.50 |
CQA cycles if fully vectorized | 11.78 |
Front-end cycles | 15.50 |
DIV/SQRT cycles | 14.00 |
P0 cycles | 6.00 |
P1 cycles | 7.33 |
P2 cycles | 7.33 |
P3 cycles | 4.00 |
P4 cycles | 14.00 |
P5 cycles | 6.00 |
P6 cycles | 4.00 |
P7 cycles | 4.00 |
P8 cycles | 4.00 |
P9 cycles | 6.00 |
P10 cycles | 7.33 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 2 |
FE+BE cycles (UFS) | 16.48 - 27.96 |
Stall cycles (UFS) | 2.46 - 13.94 |
Nb insns | 63.00 |
Nb uops | 93.00 |
Nb loads | 15.00 |
Nb stores | 1.00 |
Nb stack references | 6.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 14.71 |
Bytes prefetched | 0.00 |
Bytes loaded | 164.00 |
Bytes stored | 64.00 |
Stride 0 | 1.00 |
Stride 1 | 0.00 |
Stride n | 1.00 |
Stride unknown | 0.00 |
Stride indirect | 4.00 |
Vectorization ratio all | 43.75 |
Vectorization ratio load | 25.00 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 66.67 |
Vectorization ratio add_sub | 87.50 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 23.53 |
Vector-efficiency ratio all | 47.46 |
Vector-efficiency ratio load | 34.38 |
Vector-efficiency ratio store | 100.00 |
Vector-efficiency ratio mul | 68.75 |
Vector-efficiency ratio add_sub | 88.28 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 27.57 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.50 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 12.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.16 |
Bottlenecks | micro-operation queue, |
Function | clover_unpack_message_left_.DIR.OMP.PARALLEL.LOOP.2.split100 |
Source | pack_kernel.f90:109-113 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 9.00 |
CQA cycles if no scalar integer | 6.00 |
CQA cycles if FP arith vectorized | 9.00 |
CQA cycles if fully vectorized | 0.75 |
Front-end cycles | 9.00 |
DIV/SQRT cycles | 5.60 |
P0 cycles | 7.73 |
P1 cycles | 4.67 |
P2 cycles | 4.67 |
P3 cycles | 0.00 |
P4 cycles | 6.00 |
P5 cycles | 5.60 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 5.80 |
P10 cycles | 4.67 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 2 |
FE+BE cycles (UFS) | 9.18 |
Stall cycles (UFS) | 0.00 |
Nb insns | 54.00 |
Nb uops | 54.00 |
Nb loads | 14.00 |
Nb stores | 0.00 |
Nb stack references | 6.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 11.11 |
Bytes prefetched | 0.00 |
Bytes loaded | 100.00 |
Bytes stored | 0.00 |
Stride 0 | 1.00 |
Stride 1 | 0.00 |
Stride n | 2.00 |
Stride unknown | 1.00 |
Stride indirect | 2.00 |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 10.42 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | 6.25 |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 10.00 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.23 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.28 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.23 |
Bottlenecks | micro-operation queue, |
Function | clover_unpack_message_left_.DIR.OMP.PARALLEL.LOOP.2.split100 |
Source | pack_kernel.f90:109-113 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 17.17 |
CQA cycles if no scalar integer | 14.00 |
CQA cycles if FP arith vectorized | 17.17 |
CQA cycles if fully vectorized | 13.43 |
Front-end cycles | 17.17 |
DIV/SQRT cycles | 14.00 |
P0 cycles | 8.40 |
P1 cycles | 7.33 |
P2 cycles | 7.33 |
P3 cycles | 4.00 |
P4 cycles | 14.00 |
P5 cycles | 8.40 |
P6 cycles | 4.00 |
P7 cycles | 4.00 |
P8 cycles | 4.00 |
P9 cycles | 8.20 |
P10 cycles | 7.33 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 2 |
FE+BE cycles (UFS) | 16.63 - 30.55 |
Stall cycles (UFS) | 0.98 - 14.87 |
Nb insns | 73.00 |
Nb uops | 103.00 |
Nb loads | 15.00 |
Nb stores | 1.00 |
Nb stack references | 6.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 13.28 |
Bytes prefetched | 0.00 |
Bytes loaded | 164.00 |
Bytes stored | 64.00 |
Stride 0 | 1.00 |
Stride 1 | 0.00 |
Stride n | 2.00 |
Stride unknown | 1.00 |
Stride indirect | 4.00 |
Vectorization ratio all | 40.00 |
Vectorization ratio load | 25.00 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 87.50 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 19.05 |
Vector-efficiency ratio all | 44.46 |
Vector-efficiency ratio load | 34.38 |
Vector-efficiency ratio store | 100.00 |
Vector-efficiency ratio mul | 100.00 |
Vector-efficiency ratio add_sub | 89.06 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 24.11 |
Path / |
Function | clover_unpack_message_left_.DIR.OMP.PARALLEL.LOOP.2.split100 |
Source file and lines | pack_kernel.f90:109-113 |
Module | exec |
nb instructions | 49.75 |
nb uops | 64.50 |
loop length | 209.50 |
used x86 registers | 12.75 |
used mmx registers | 0 |
used xmm registers | 0.50 |
used ymm registers | 0 |
used zmm registers | 7 |
nb stack references | 4.50 |
micro-operation queue | 10.75 cycles |
front end | 10.75 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 8.65 | 5.35 | 4.83 | 4.83 | 2.00 | 8.75 | 5.25 | 2.00 | 2.00 | 2.00 | 5.25 | 4.83 |
cycles | 8.65 | 5.78 | 4.83 | 4.83 | 2.00 | 8.75 | 5.25 | 2.00 | 2.00 | 2.00 | 5.25 | 4.83 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 2.00 |
FE+BE cycles | 10.92-17.43 |
Stall cycles | 0.86-7.21 |
ROB full (events) | 1.09-7.67 |
Front-end | 10.75 |
Dispatch | 9.18 |
Data deps. | 2.00 |
Overall L1 | 10.92 |
all | 18% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 55% |
add-sub | 43% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 5% |
all | 100% |
load | 100% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 20% |
load | 16% |
store | 100% |
mul | 55% |
add-sub | 43% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 10% |
all | 24% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 58% |
add-sub | 49% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 100% |
load | 100% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 27% |
load | 27% |
store | 100% |
mul | 58% |
add-sub | 49% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 16% |
Function | clover_unpack_message_left_.DIR.OMP.PARALLEL.LOOP.2.split100 |
Source file and lines | pack_kernel.f90:109-113 |
Module | exec |
nb instructions | 9 |
nb uops | 8 |
loop length | 26 |
used x86 registers | 6 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 1.33 cycles |
front end | 1.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.00 | 1.00 | 0.00 | 0.00 | 0.00 | 1.00 | 1.00 | 0.00 | 0.00 | 0.00 | 1.00 | 0.00 |
cycles | 1.00 | 1.00 | 0.00 | 0.00 | 0.00 | 1.00 | 1.00 | 0.00 | 0.00 | 0.00 | 1.00 | 0.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 2.00 |
FE+BE cycles | 1.39-2.04 |
Stall cycles | 0.00-0.05 |
Front-end | 1.33 |
Dispatch | 1.00 |
Data deps. | 2.00 |
Overall L1 | 2.00 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 6% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 6% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV %R9D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x1(%RDI),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
INC %EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %EBX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JE 445bda <pack_kernel_module_mp_clover_unpack_message_left_.DIR.OMP.PARALLEL.LOOP.2.split100+0x8a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
TEST %R9D,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 445c80 <pack_kernel_module_mp_clover_unpack_message_left_.DIR.OMP.PARALLEL.LOOP.2.split100+0x130> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
Function | clover_unpack_message_left_.DIR.OMP.PARALLEL.LOOP.2.split100 |
Source file and lines | pack_kernel.f90:109-113 |
Module | exec |
nb instructions | 63 |
nb uops | 93 |
loop length | 289 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 1 |
used ymm registers | 0 |
used zmm registers | 11 |
nb stack references | 6 |
micro-operation queue | 15.50 cycles |
front end | 15.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 14.00 | 6.00 | 7.33 | 7.33 | 4.00 | 14.00 | 6.00 | 4.00 | 4.00 | 4.00 | 6.00 | 7.33 |
cycles | 14.00 | 6.00 | 7.33 | 7.33 | 4.00 | 14.00 | 6.00 | 4.00 | 4.00 | 4.00 | 6.00 | 7.33 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 2.00 |
FE+BE cycles | 16.48-27.96 |
Stall cycles | 2.46-13.94 |
ROB full (events) | 3.06-14.54 |
Front-end | 15.50 |
Dispatch | 14.00 |
Data deps. | 2.00 |
Overall L1 | 15.50 |
all | 37% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 66% |
add-sub | 87% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 13% |
all | 100% |
load | 100% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 43% |
load | 25% |
store | 100% |
mul | 66% |
add-sub | 87% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 23% |
all | 42% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 68% |
add-sub | 88% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 17% |
all | 100% |
load | 100% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 47% |
load | 34% |
store | 100% |
mul | 68% |
add-sub | 88% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 27% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
LEA 0x1(%RDI),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
INC %EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %EBX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JE 445bda <pack_kernel_module_mp_clover_unpack_message_left_.DIR.OMP.PARALLEL.LOOP.2.split100+0x8a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
TEST %R9D,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 445c80 <pack_kernel_module_mp_clover_unpack_message_left_.DIR.OMP.PARALLEL.LOOP.2.split100+0x130> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %EDI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x68(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD (%RCX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RCX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R12),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%R12),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x60(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD (%R10),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RCX,%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x50(%R12),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9D,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VPBROADCASTQ %R11,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R13,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VPBROADCASTQ %R13,%ZMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %RSI,%ZMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %R15,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
CLTQ | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
MOV $-0x8,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
AND %R9,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 445dc0 <pack_kernel_module_mp_clover_unpack_message_left_.DIR.OMP.PARALLEL.LOOP.2.split100+0x270> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x1(%RAX,%R8,1),%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
IMUL %R8D,%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOVSXD %ESI,%R9 | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
ADD %R14,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %RAX,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %RCX,%ZMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %R10,%ZMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
XOR %R11D,%R11D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 445e09 <pack_kernel_module_mp_clover_unpack_message_left_.DIR.OMP.PARALLEL.LOOP.2.split100+0x2b9> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
VPBROADCASTQ %R11,%ZMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %ZMM11,%ZMM8,%ZMM8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
VPCMPNLEUQ %ZMM0,%ZMM8,%K1 | |||||||||||||||
ADD %R11,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VPBROADCASTQ %R9,%ZMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPADDQ %ZMM0,%ZMM8,%ZMM8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VPMULLQ %ZMM8,%ZMM5,%ZMM5 | 5 | 1.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPADDQ %ZMM5,%ZMM7,%ZMM5 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VPXOR %XMM7,%XMM7,%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KMOVQ %K1,%K2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
VGATHERQPD (,%ZMM5,1),%ZMM7{%K2} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VPADDQ %ZMM9,%ZMM6,%ZMM5 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVAPD %ZMM7,%ZMM3{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VPSUBQ %ZMM11,%ZMM10,%ZMM6 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
VPADDQ %ZMM1,%ZMM6,%ZMM6 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VPMULLQ %ZMM6,%ZMM4,%ZMM4 | 5 | 1.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPADDQ %ZMM4,%ZMM5,%ZMM4 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VSCATTERQPD %ZMM3,(,%ZMM4,1){%K1} | 20 | 2.20 | 0.20 | 0 | 0 | 4 | 0.20 | 0.20 | 4 | 4 | 4 | 0.20 | 0 | 2-12 | 7 |
JMP 445c83 <pack_kernel_module_mp_clover_unpack_message_left_.DIR.OMP.PARALLEL.LOOP.2.split100+0x133> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
Function | clover_unpack_message_left_.DIR.OMP.PARALLEL.LOOP.2.split100 |
Source file and lines | pack_kernel.f90:109-113 |
Module | exec |
nb instructions | 54 |
nb uops | 54 |
loop length | 202 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 6 |
nb stack references | 6 |
micro-operation queue | 9.00 cycles |
front end | 9.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 5.60 | 6.00 | 4.67 | 4.67 | 0.00 | 6.00 | 5.60 | 0.00 | 0.00 | 0.00 | 5.80 | 4.67 |
cycles | 5.60 | 7.73 | 4.67 | 4.67 | 0.00 | 6.00 | 5.60 | 0.00 | 0.00 | 0.00 | 5.80 | 4.67 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 2.00 |
FE+BE cycles | 9.18 |
Stall cycles | 0.00 |
Front-end | 9.00 |
Dispatch | 7.73 |
Data deps. | 2.00 |
Overall L1 | 9.00 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 10% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 6% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 10% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
LEA 0x1(%RDI),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
INC %EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %EBX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JE 445bda <pack_kernel_module_mp_clover_unpack_message_left_.DIR.OMP.PARALLEL.LOOP.2.split100+0x8a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
TEST %R9D,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 445c80 <pack_kernel_module_mp_clover_unpack_message_left_.DIR.OMP.PARALLEL.LOOP.2.split100+0x130> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %EDI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x68(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD (%RCX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RCX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R12),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%R12),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x60(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD (%R10),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RCX,%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x50(%R12),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9D,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VPBROADCASTQ %R11,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R13,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VPBROADCASTQ %R13,%ZMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %RSI,%ZMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %R15,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
CLTQ | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
MOV $-0x8,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
AND %R9,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 445dc0 <pack_kernel_module_mp_clover_unpack_message_left_.DIR.OMP.PARALLEL.LOOP.2.split100+0x270> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %EBX,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x1(%RAX,%R8,1),%R9D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
IMUL %R8D,%R9D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOVSXD %R9D,%R9 | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %RAX,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %RCX,%ZMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %R14,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%R8,%RDX,1),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
IMUL %R8D,%EAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
CLTQ | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
ADD %R14,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RCX,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R10,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %R14D,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R13,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 445e00 <pack_kernel_module_mp_clover_unpack_message_left_.DIR.OMP.PARALLEL.LOOP.2.split100+0x2b0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R12D,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 445c83 <pack_kernel_module_mp_clover_unpack_message_left_.DIR.OMP.PARALLEL.LOOP.2.split100+0x133> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
Function | clover_unpack_message_left_.DIR.OMP.PARALLEL.LOOP.2.split100 |
Source file and lines | pack_kernel.f90:109-113 |
Module | exec |
nb instructions | 73 |
nb uops | 103 |
loop length | 321 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 1 |
used ymm registers | 0 |
used zmm registers | 11 |
nb stack references | 6 |
micro-operation queue | 17.17 cycles |
front end | 17.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 14.00 | 8.40 | 7.33 | 7.33 | 4.00 | 14.00 | 8.40 | 4.00 | 4.00 | 4.00 | 8.20 | 7.33 |
cycles | 14.00 | 8.40 | 7.33 | 7.33 | 4.00 | 14.00 | 8.40 | 4.00 | 4.00 | 4.00 | 8.20 | 7.33 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 2.00 |
FE+BE cycles | 16.63-30.55 |
Stall cycles | 0.98-14.87 |
ROB full (events) | 1.30-16.13 |
Front-end | 17.17 |
Dispatch | 14.00 |
Data deps. | 2.00 |
Overall L1 | 17.17 |
all | 34% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 87% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 10% |
all | 100% |
load | 100% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 40% |
load | 25% |
store | 100% |
mul | 100% |
add-sub | 87% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 19% |
all | 39% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 89% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 16% |
all | 100% |
load | 100% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 44% |
load | 34% |
store | 100% |
mul | 100% |
add-sub | 89% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 24% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
LEA 0x1(%RDI),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
INC %EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %EBX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JE 445bda <pack_kernel_module_mp_clover_unpack_message_left_.DIR.OMP.PARALLEL.LOOP.2.split100+0x8a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
TEST %R9D,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 445c80 <pack_kernel_module_mp_clover_unpack_message_left_.DIR.OMP.PARALLEL.LOOP.2.split100+0x130> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %EDI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x68(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD (%RCX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RCX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R12),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%R12),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x60(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD (%R10),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RCX,%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x50(%R12),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9D,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VPBROADCASTQ %R11,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R13,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VPBROADCASTQ %R13,%ZMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %RSI,%ZMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %R15,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
CLTQ | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
MOV $-0x8,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
AND %R9,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 445dc0 <pack_kernel_module_mp_clover_unpack_message_left_.DIR.OMP.PARALLEL.LOOP.2.split100+0x270> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %EBX,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x1(%RAX,%R8,1),%R9D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
IMUL %R8D,%R9D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOVSXD %R9D,%R9 | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %RAX,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %RCX,%ZMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %R14,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%R8,%RDX,1),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
IMUL %R8D,%EAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
CLTQ | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
ADD %R14,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RCX,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R10,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %R14D,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R13,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 445e00 <pack_kernel_module_mp_clover_unpack_message_left_.DIR.OMP.PARALLEL.LOOP.2.split100+0x2b0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VPBROADCASTQ %R10,%ZMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R12D,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VPBROADCASTQ %R11,%ZMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %ZMM11,%ZMM8,%ZMM8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
VPCMPNLEUQ %ZMM0,%ZMM8,%K1 | |||||||||||||||
ADD %R11,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VPBROADCASTQ %R9,%ZMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPADDQ %ZMM0,%ZMM8,%ZMM8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VPMULLQ %ZMM8,%ZMM5,%ZMM5 | 5 | 1.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPADDQ %ZMM5,%ZMM7,%ZMM5 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VPXOR %XMM7,%XMM7,%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KMOVQ %K1,%K2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
VGATHERQPD (,%ZMM5,1),%ZMM7{%K2} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VPADDQ %ZMM9,%ZMM6,%ZMM5 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVAPD %ZMM7,%ZMM3{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VPSUBQ %ZMM11,%ZMM10,%ZMM6 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
VPADDQ %ZMM1,%ZMM6,%ZMM6 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VPMULLQ %ZMM6,%ZMM4,%ZMM4 | 5 | 1.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPADDQ %ZMM4,%ZMM5,%ZMM4 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VSCATTERQPD %ZMM3,(,%ZMM4,1){%K1} | 20 | 2.20 | 0.20 | 0 | 0 | 4 | 0.20 | 0.20 | 4 | 4 | 4 | 0.20 | 0 | 2-12 | 7 |
JMP 445c83 <pack_kernel_module_mp_clover_unpack_message_left_.DIR.OMP.PARALLEL.LOOP.2.split100+0x133> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |