Function: reset_field_kernel._omp_fn.0 | Module: exec | Source: reset_field_kernel.f90:47-63 | Coverage: 4.94% |
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Function: reset_field_kernel._omp_fn.0 | Module: exec | Source: reset_field_kernel.f90:47-63 | Coverage: 4.94% |
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/scratch_na/users/xoserete/qaas_runs/171-215-0463/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/reset_field_kernel.f90: 47 - 63 |
-------------------------------------------------------------------------------- |
47: !$OMP PARALLEL |
48: !$OMP DO |
49: DO k=y_min,y_max |
50: !$OMP SIMD |
51: DO j=x_min,x_max |
52: density0(j,k)=density1(j,k) |
53: energy0(j,k)=energy1(j,k) |
54: ENDDO |
55: ENDDO |
56: !$OMP END DO |
57: |
58: !$OMP DO |
59: DO k=y_min,y_max+1 |
60: !$OMP SIMD |
61: DO j=x_min,x_max+1 |
62: xvel0(j,k)=xvel1(j,k) |
63: yvel0(j,k)=yvel1(j,k) |
0x45dd80 PUSH %RBP |
0x45dd81 MOV %RDI,%RAX |
0x45dd84 MOV %RSP,%RBP |
0x45dd87 PUSH %R15 |
0x45dd89 PUSH %R14 |
0x45dd8b PUSH %R13 |
0x45dd8d PUSH %R12 |
0x45dd8f PUSH %RBX |
0x45dd90 AND $-0x40,%RSP |
0x45dd94 SUB $0x100,%RSP |
0x45dd9b MOV 0xd0(%RDI),%RDX |
0x45dda2 MOV 0xc0(%RDI),%RSI |
0x45dda9 MOV 0xb8(%RDI),%R8 |
0x45ddb0 MOV 0xa8(%RAX),%R9 |
0x45ddb7 MOV 0xa0(%RAX),%R10 |
0x45ddbe MOV 0x90(%RAX),%R11 |
0x45ddc5 MOV %RDX,0xd8(%RSP) |
0x45ddcd MOV 0xd8(%RDI),%RCX |
0x45ddd4 MOV 0xc8(%RDI),%RBX |
0x45dddb MOV %RSI,0xd0(%RSP) |
0x45dde3 MOV 0xb0(%RDI),%RDI |
0x45ddea MOV 0x80(%RAX),%R12 |
0x45ddf1 MOV %R8,0x50(%RSP) |
0x45ddf6 MOV 0x70(%RAX),%R13 |
0x45ddfa MOV 0x88(%RAX),%R14 |
0x45de01 MOV %R9,0x48(%RSP) |
0x45de06 MOV %RDI,0xc8(%RSP) |
0x45de0e MOV %R10,0xc0(%RSP) |
0x45de16 MOV %R11,0xa0(%RSP) |
0x45de1e MOV %RCX,0x60(%RSP) |
0x45de23 MOV %RBX,0x58(%RSP) |
0x45de28 MOV 0x98(%RAX),%RBX |
0x45de2f MOV %R12,0x98(%RSP) |
0x45de37 MOV 0x78(%RAX),%R12 |
0x45de3b MOV %R13,0x90(%RSP) |
0x45de43 MOV 0x68(%RAX),%R15 |
0x45de47 MOV 0x60(%RAX),%RCX |
0x45de4b MOV %RAX,0xb0(%RSP) |
0x45de53 MOV 0x10(%RAX),%RAX |
0x45de57 MOV %RCX,0x88(%RSP) |
0x45de5f MOV (%RAX),%R13D |
0x45de62 CALL 402080 <@plt_start@+0x60> |
0x45de67 MOV %EAX,0x7c(%RSP) |
0x45de6b CALL 402180 <@plt_start@+0x160> |
0x45de70 MOV 0xb0(%RSP),%RDX |
0x45de78 MOV %EAX,0xb8(%RSP) |
0x45de7f MOV %EAX,%ESI |
0x45de81 MOV 0x18(%RDX),%R8 |
0x45de85 MOV (%R8),%EAX |
0x45de88 INC %EAX |
0x45de8a SUB %R13D,%EAX |
0x45de8d CLTD |
0x45de8e IDIVL 0x7c(%RSP) |
0x45de92 CMP %EDX,%ESI |
0x45de94 JL 45ed8b |
0x45de9a MOV 0xb8(%RSP),%EDI |
0x45dea1 IMUL %EAX,%EDI |
0x45dea4 ADD %EDI,%EDX |
0x45dea6 ADD %EDX,%EAX |
0x45dea8 CMP %EAX,%EDX |
0x45deaa JGE 45e6e8 |
0x45deb0 MOV 0xb0(%RSP),%RSI |
0x45deb8 ADD %R13D,%EAX |
0x45debb LEA (%R13,%RDX,1),%ECX |
0x45dec0 MOV %EAX,0x70(%RSP) |
0x45dec4 MOV 0x8(%RSI),%R10 |
0x45dec8 MOV (%RSI),%R9 |
0x45decb MOV %ECX,0xe0(%RSP) |
0x45ded2 MOV 0x38(%RSI),%R8 |
0x45ded6 MOV 0x30(%RSI),%RDI |
0x45deda MOV (%R10),%EAX |
0x45dedd MOVSXD (%R9),%R11 |
0x45dee0 MOV 0x28(%RSI),%R10 |
0x45dee4 MOV 0x20(%RSI),%R9 |
0x45dee8 LEA 0x1(%RAX),%EDX |
0x45deeb LEA (%R12,%R11,1),%RSI |
0x45deef MOV 0x88(%RSP),%R12 |
0x45def7 MOV %EAX,0xe8(%RSP) |
0x45defe MOV %EDX,0x6c(%RSP) |
0x45df02 MOV 0x90(%RSP),%RDX |
0x45df0a MOVSXD %ECX,%RAX |
0x45df0d LEA (%R15,%R11,1),%RCX |
0x45df11 IMUL %RAX,%R12 |
0x45df15 MOV %R11,%R13 |
0x45df18 LEA (%R14,%R11,1),%R14 |
0x45df1c MOV %R11D,0x78(%RSP) |
0x45df21 IMUL %RAX,%RDX |
0x45df25 MOV %R11,0x80(%RSP) |
0x45df2d ADD %R12,%RCX |
0x45df30 LEA (%RBX,%R11,1),%R12 |
0x45df34 MOV 0x98(%RSP),%RBX |
0x45df3c MOV 0xe8(%RSP),%R11D |
0x45df44 ADD %RDX,%RSI |
0x45df47 MOV 0xa0(%RSP),%RDX |
0x45df4f MOV %RSI,0xf8(%RSP) |
0x45df57 MOV 0x40(%RSP),%ESI |
0x45df5b IMUL %RAX,%RDX |
0x45df5f IMUL %RBX,%RAX |
0x45df63 LEA (%R12,%RDX,1),%R12 |
0x45df67 LEA (%R14,%RAX,1),%RBX |
0x45df6b MOV %R11D,%EAX |
0x45df6e SUB %R13D,%EAX |
0x45df71 MOV %EAX,0xec(%RSP) |
0x45df78 INC %EAX |
0x45df7a MOV %EAX,%EDX |
0x45df7c MOV %EAX,%R15D |
0x45df7f SHR $0x3,%EDX |
0x45df82 AND $-0x8,%R15D |
0x45df86 SAL $0x6,%RDX |
0x45df8a CMP %R11D,%R13D |
0x45df8d LEA (%R15,%R13,1),%R14D |
0x45df91 MOV %R15D,0xac(%RSP) |
0x45df99 CMOVLE 0x6c(%RSP),%R13D |
0x45df9f AND $0x7,%EAX |
0x45dfa2 MOV %R14D,0xa8(%RSP) |
0x45dfaa MOV %EAX,0xbc(%RSP) |
0x45dfb1 MOV %R13D,0x74(%RSP) |
0x45dfb6 MOV %RDX,0xf0(%RSP) |
0x45dfbe XOR %EDX,%EDX |
(355) 0x45dfc0 MOV 0xe8(%RSP),%R13D |
(355) 0x45dfc8 CMP %R13D,0x78(%RSP) |
(355) 0x45dfcd JG 45e3b4 |
(355) 0x45dfd3 CMPL $0x6,0xec(%RSP) |
(355) 0x45dfdb JBE 45ed40 |
(355) 0x45dfe1 MOV 0xf0(%RSP),%RDX |
(355) 0x45dfe9 MOV 0xf8(%RSP),%R11 |
(355) 0x45dff1 LEA (%R9,%RCX,8),%R15 |
(355) 0x45dff5 LEA (%R8,%R12,8),%R13 |
(355) 0x45dff9 LEA (%RDI,%RBX,8),%RSI |
(355) 0x45dffd XOR %EAX,%EAX |
(355) 0x45dfff SUB $0x40,%RDX |
(355) 0x45e003 LEA (%R10,%R11,8),%R14 |
(355) 0x45e007 SHR $0x6,%RDX |
(355) 0x45e00b INC %RDX |
(355) 0x45e00e AND $0x7,%EDX |
(355) 0x45e011 JE 45e11e |
(355) 0x45e017 CMP $0x1,%RDX |
(355) 0x45e01b JE 45e0ec |
(355) 0x45e021 CMP $0x2,%RDX |
(355) 0x45e025 JE 45e0cb |
(355) 0x45e02b CMP $0x3,%RDX |
(355) 0x45e02f JE 45e0aa |
(355) 0x45e031 CMP $0x4,%RDX |
(355) 0x45e035 JE 45e089 |
(355) 0x45e037 CMP $0x5,%RDX |
(355) 0x45e03b JE 45e068 |
(355) 0x45e03d CMP $0x6,%RDX |
(355) 0x45e041 JNE 45ed08 |
(355) 0x45e047 VMOVUPD (%R14,%RAX,1),%ZMM0 |
(355) 0x45e04e VMOVUPD %ZMM0,(%R15,%RAX,1) |
(355) 0x45e055 VMOVUPD (%R13,%RAX,1),%ZMM3 |
(355) 0x45e05d VMOVUPD %ZMM3,(%RSI,%RAX,1) |
(355) 0x45e064 ADD $0x40,%RAX |
(355) 0x45e068 VMOVUPD (%R14,%RAX,1),%ZMM5 |
(355) 0x45e06f VMOVUPD %ZMM5,(%R15,%RAX,1) |
(355) 0x45e076 VMOVUPD (%R13,%RAX,1),%ZMM6 |
(355) 0x45e07e VMOVUPD %ZMM6,(%RSI,%RAX,1) |
(355) 0x45e085 ADD $0x40,%RAX |
(355) 0x45e089 VMOVUPD (%R14,%RAX,1),%ZMM4 |
(355) 0x45e090 VMOVUPD %ZMM4,(%R15,%RAX,1) |
(355) 0x45e097 VMOVUPD (%R13,%RAX,1),%ZMM7 |
(355) 0x45e09f VMOVUPD %ZMM7,(%RSI,%RAX,1) |
(355) 0x45e0a6 ADD $0x40,%RAX |
(355) 0x45e0aa VMOVUPD (%R14,%RAX,1),%ZMM8 |
(355) 0x45e0b1 VMOVUPD %ZMM8,(%R15,%RAX,1) |
(355) 0x45e0b8 VMOVUPD (%R13,%RAX,1),%ZMM9 |
(355) 0x45e0c0 VMOVUPD %ZMM9,(%RSI,%RAX,1) |
(355) 0x45e0c7 ADD $0x40,%RAX |
(355) 0x45e0cb VMOVUPD (%R14,%RAX,1),%ZMM10 |
(355) 0x45e0d2 VMOVUPD %ZMM10,(%R15,%RAX,1) |
(355) 0x45e0d9 VMOVUPD (%R13,%RAX,1),%ZMM11 |
(355) 0x45e0e1 VMOVUPD %ZMM11,(%RSI,%RAX,1) |
(355) 0x45e0e8 ADD $0x40,%RAX |
(355) 0x45e0ec VMOVUPD (%R14,%RAX,1),%ZMM12 |
(355) 0x45e0f3 MOV 0xf0(%RSP),%R11 |
(355) 0x45e0fb VMOVUPD %ZMM12,(%R15,%RAX,1) |
(355) 0x45e102 VMOVUPD (%R13,%RAX,1),%ZMM13 |
(355) 0x45e10a VMOVUPD %ZMM13,(%RSI,%RAX,1) |
(355) 0x45e111 ADD $0x40,%RAX |
(355) 0x45e115 CMP %R11,%RAX |
(355) 0x45e118 JE 45e232 |
(357) 0x45e11e VMOVUPD (%R14,%RAX,1),%ZMM14 |
(357) 0x45e125 VMOVUPD %ZMM14,(%R15,%RAX,1) |
(357) 0x45e12c VMOVUPD (%R13,%RAX,1),%ZMM15 |
(357) 0x45e134 VMOVUPD %ZMM15,(%RSI,%RAX,1) |
(357) 0x45e13b VMOVUPD 0x40(%R14,%RAX,1),%ZMM1 |
(357) 0x45e143 VMOVUPD %ZMM1,0x40(%R15,%RAX,1) |
(357) 0x45e14b VMOVUPD 0x40(%R13,%RAX,1),%ZMM2 |
(357) 0x45e153 VMOVUPD %ZMM2,0x40(%RSI,%RAX,1) |
(357) 0x45e15b VMOVUPD 0x80(%R14,%RAX,1),%ZMM0 |
(357) 0x45e163 VMOVUPD %ZMM0,0x80(%R15,%RAX,1) |
(357) 0x45e16b VMOVUPD 0x80(%R13,%RAX,1),%ZMM3 |
(357) 0x45e173 VMOVUPD %ZMM3,0x80(%RSI,%RAX,1) |
(357) 0x45e17b VMOVUPD 0xc0(%R14,%RAX,1),%ZMM5 |
(357) 0x45e183 VMOVUPD %ZMM5,0xc0(%R15,%RAX,1) |
(357) 0x45e18b VMOVUPD 0xc0(%R13,%RAX,1),%ZMM6 |
(357) 0x45e193 VMOVUPD %ZMM6,0xc0(%RSI,%RAX,1) |
(357) 0x45e19b VMOVUPD 0x100(%R14,%RAX,1),%ZMM4 |
(357) 0x45e1a3 VMOVUPD %ZMM4,0x100(%R15,%RAX,1) |
(357) 0x45e1ab VMOVUPD 0x100(%R13,%RAX,1),%ZMM7 |
(357) 0x45e1b3 VMOVUPD %ZMM7,0x100(%RSI,%RAX,1) |
(357) 0x45e1bb VMOVUPD 0x140(%R14,%RAX,1),%ZMM8 |
(357) 0x45e1c3 VMOVUPD %ZMM8,0x140(%R15,%RAX,1) |
(357) 0x45e1cb VMOVUPD 0x140(%R13,%RAX,1),%ZMM9 |
(357) 0x45e1d3 VMOVUPD %ZMM9,0x140(%RSI,%RAX,1) |
(357) 0x45e1db VMOVUPD 0x180(%R14,%RAX,1),%ZMM10 |
(357) 0x45e1e3 VMOVUPD %ZMM10,0x180(%R15,%RAX,1) |
(357) 0x45e1eb VMOVUPD 0x180(%R13,%RAX,1),%ZMM11 |
(357) 0x45e1f3 VMOVUPD %ZMM11,0x180(%RSI,%RAX,1) |
(357) 0x45e1fb VMOVUPD 0x1c0(%R14,%RAX,1),%ZMM12 |
(357) 0x45e203 VMOVUPD %ZMM12,0x1c0(%R15,%RAX,1) |
(357) 0x45e20b VMOVUPD 0x1c0(%R13,%RAX,1),%ZMM13 |
(357) 0x45e213 VMOVUPD %ZMM13,0x1c0(%RSI,%RAX,1) |
(357) 0x45e21b MOV 0xf0(%RSP),%RDX |
(357) 0x45e223 ADD $0x200,%RAX |
(357) 0x45e229 CMP %RDX,%RAX |
(357) 0x45e22c JNE 45e11e |
(355) 0x45e232 MOV 0xbc(%RSP),%R14D |
(355) 0x45e23a TEST %R14D,%R14D |
(355) 0x45e23d JE 45e35d |
(355) 0x45e243 MOV 0xac(%RSP),%R13D |
(355) 0x45e24b MOV 0xa8(%RSP),%EAX |
(355) 0x45e252 MOV 0xec(%RSP),%R15D |
(355) 0x45e25a SUB %R13D,%R15D |
(355) 0x45e25d LEA 0x1(%R15),%ESI |
(355) 0x45e261 CMP $0x2,%R15D |
(355) 0x45e265 JBE 45e2a7 |
(355) 0x45e267 MOV 0xf8(%RSP),%R11 |
(355) 0x45e26f LEA (%R13,%RCX,1),%R14 |
(355) 0x45e274 LEA (%R13,%R12,1),%R15 |
(355) 0x45e279 LEA (%R11,%R13,1),%RDX |
(355) 0x45e27d ADD %RBX,%R13 |
(355) 0x45e280 VMOVUPD (%R10,%RDX,8),%YMM14 |
(355) 0x45e286 VMOVUPD %YMM14,(%R9,%R14,8) |
(355) 0x45e28c VMOVUPD (%R8,%R15,8),%YMM15 |
(355) 0x45e292 VMOVUPD %YMM15,(%RDI,%R13,8) |
(355) 0x45e298 TEST $0x3,%SIL |
(355) 0x45e29c JE 45e35d |
(355) 0x45e2a2 AND $-0x4,%ESI |
(355) 0x45e2a5 ADD %ESI,%EAX |
(355) 0x45e2a7 MOV 0x80(%RSP),%RDX |
(355) 0x45e2af MOV 0xf8(%RSP),%R14 |
(355) 0x45e2b7 MOV %RCX,%R13 |
(355) 0x45e2ba MOV %R12,%R11 |
(355) 0x45e2bd MOV %RBX,%RSI |
(355) 0x45e2c0 SUB %RDX,%R14 |
(355) 0x45e2c3 SUB %RDX,%R13 |
(355) 0x45e2c6 SUB %RDX,%R11 |
(355) 0x45e2c9 SUB %RDX,%RSI |
(355) 0x45e2cc MOVSXD %EAX,%RDX |
(355) 0x45e2cf LEA (%R14,%RDX,1),%R15 |
(355) 0x45e2d3 VMOVSD (%R10,%R15,8),%XMM1 |
(355) 0x45e2d9 LEA (%R13,%RDX,1),%R15 |
(355) 0x45e2de VMOVSD %XMM1,(%R9,%R15,8) |
(355) 0x45e2e4 LEA (%R11,%RDX,1),%R15 |
(355) 0x45e2e8 ADD %RSI,%RDX |
(355) 0x45e2eb VMOVSD (%R8,%R15,8),%XMM2 |
(355) 0x45e2f1 VMOVSD %XMM2,(%RDI,%RDX,8) |
(355) 0x45e2f6 LEA 0x1(%RAX),%EDX |
(355) 0x45e2f9 CMP %EDX,0xe8(%RSP) |
(355) 0x45e300 JL 45e35d |
(355) 0x45e302 MOVSXD %EDX,%RDX |
(355) 0x45e305 ADD $0x2,%EAX |
(355) 0x45e308 LEA (%R14,%RDX,1),%R15 |
(355) 0x45e30c VMOVSD (%R10,%R15,8),%XMM0 |
(355) 0x45e312 LEA (%R13,%RDX,1),%R15 |
(355) 0x45e317 VMOVSD %XMM0,(%R9,%R15,8) |
(355) 0x45e31d LEA (%R11,%RDX,1),%R15 |
(355) 0x45e321 ADD %RSI,%RDX |
(355) 0x45e324 VMOVSD (%R8,%R15,8),%XMM3 |
(355) 0x45e32a VMOVSD %XMM3,(%RDI,%RDX,8) |
(355) 0x45e32f CMP %EAX,0xe8(%RSP) |
(355) 0x45e336 JL 45e35d |
(355) 0x45e338 CLTQ |
(355) 0x45e33a ADD %RAX,%R14 |
(355) 0x45e33d ADD %RAX,%R13 |
(355) 0x45e340 ADD %RAX,%R11 |
(355) 0x45e343 ADD %RAX,%RSI |
(355) 0x45e346 VMOVSD (%R10,%R14,8),%XMM5 |
(355) 0x45e34c VMOVSD %XMM5,(%R9,%R13,8) |
(355) 0x45e352 VMOVSD (%R8,%R11,8),%XMM6 |
(355) 0x45e358 VMOVSD %XMM6,(%RDI,%RSI,8) |
(355) 0x45e35d INCL 0xe0(%RSP) |
(355) 0x45e364 MOV 0x90(%RSP),%R14 |
(355) 0x45e36c MOV $0x1,%EDX |
(355) 0x45e371 MOV 0x88(%RSP),%R13 |
(355) 0x45e379 MOV 0xa0(%RSP),%R11 |
(355) 0x45e381 MOV 0x98(%RSP),%RSI |
(355) 0x45e389 ADD %R14,0xf8(%RSP) |
(355) 0x45e391 ADD %R13,%RCX |
(355) 0x45e394 ADD %R11,%R12 |
(355) 0x45e397 MOV 0xe0(%RSP),%EAX |
(355) 0x45e39e ADD %RSI,%RBX |
(355) 0x45e3a1 CMP %EAX,0x70(%RSP) |
(355) 0x45e3a5 JLE 45e6d1 |
(355) 0x45e3ab MOV 0x74(%RSP),%ESI |
(355) 0x45e3af JMP 45dfc0 |
(355) 0x45e3b4 MOV 0xe0(%RSP),%EAX |
(355) 0x45e3bb MOV 0x70(%RSP),%R11D |
(355) 0x45e3c0 MOV 0x74(%RSP),%R15D |
(355) 0x45e3c5 NOT %EAX |
(355) 0x45e3c7 ADD %R11D,%EAX |
(355) 0x45e3ca AND $0x7,%EAX |
(355) 0x45e3cd CMP %R15D,0x6c(%RSP) |
(355) 0x45e3d2 JE 45e35d |
(355) 0x45e3d4 MOV 0x90(%RSP),%R13 |
(355) 0x45e3dc INCL 0xe0(%RSP) |
(355) 0x45e3e3 MOV 0xa0(%RSP),%R11 |
(355) 0x45e3eb ADD %R13,0xf8(%RSP) |
(355) 0x45e3f3 MOV 0x88(%RSP),%R13 |
(355) 0x45e3fb ADD %R11,%R12 |
(355) 0x45e3fe MOV 0x98(%RSP),%R11 |
(355) 0x45e406 MOV 0xe0(%RSP),%R14D |
(355) 0x45e40e ADD %R13,%RCX |
(355) 0x45e411 ADD %R11,%RBX |
(355) 0x45e414 MOV 0xf8(%RSP),%R15 |
(355) 0x45e41c CMP %R14D,0x70(%RSP) |
(355) 0x45e421 JLE 45ed94 |
(355) 0x45e427 TEST %EAX,%EAX |
(355) 0x45e429 JE 45eda8 |
(355) 0x45e42f CMP $0x1,%EAX |
(355) 0x45e432 JE 45e60e |
(355) 0x45e438 CMP $0x2,%EAX |
(355) 0x45e43b JE 45e5c6 |
(355) 0x45e441 CMP $0x3,%EAX |
(355) 0x45e444 JE 45e57e |
(355) 0x45e44a CMP $0x4,%EAX |
(355) 0x45e44d JE 45e536 |
(355) 0x45e453 CMP $0x5,%EAX |
(355) 0x45e456 JE 45e4ee |
(355) 0x45e45c CMP $0x6,%EAX |
(355) 0x45e45f JE 45e4a6 |
(355) 0x45e461 MOV 0x74(%RSP),%EAX |
(355) 0x45e465 CMP %EAX,0x6c(%RSP) |
(355) 0x45e469 JE 45e35d |
(355) 0x45e46f INC %R14D |
(355) 0x45e472 ADD %R13,%RCX |
(355) 0x45e475 MOV 0x98(%RSP),%R13 |
(355) 0x45e47d MOV %R14D,0xe0(%RSP) |
(355) 0x45e485 MOV 0x90(%RSP),%R14 |
(355) 0x45e48d ADD %R13,%RBX |
(355) 0x45e490 ADD %R14,%R15 |
(355) 0x45e493 MOV %R15,0xf8(%RSP) |
(355) 0x45e49b MOV 0xa0(%RSP),%R15 |
(355) 0x45e4a3 ADD %R15,%R12 |
(355) 0x45e4a6 MOV 0x74(%RSP),%R11D |
(355) 0x45e4ab CMP %R11D,0x6c(%RSP) |
(355) 0x45e4b0 JE 45e35d |
(355) 0x45e4b6 MOV 0x90(%RSP),%RAX |
(355) 0x45e4be INCL 0xe0(%RSP) |
(355) 0x45e4c5 MOV 0x88(%RSP),%R14 |
(355) 0x45e4cd MOV 0xa0(%RSP),%R15 |
(355) 0x45e4d5 ADD %RAX,0xf8(%RSP) |
(355) 0x45e4dd MOV 0x98(%RSP),%R13 |
(355) 0x45e4e5 ADD %R14,%RCX |
(355) 0x45e4e8 ADD %R15,%R12 |
(355) 0x45e4eb ADD %R13,%RBX |
(355) 0x45e4ee MOV 0x74(%RSP),%R11D |
(355) 0x45e4f3 CMP %R11D,0x6c(%RSP) |
(355) 0x45e4f8 JE 45e35d |
(355) 0x45e4fe MOV 0x90(%RSP),%RAX |
(355) 0x45e506 INCL 0xe0(%RSP) |
(355) 0x45e50d MOV 0x88(%RSP),%R14 |
(355) 0x45e515 MOV 0xa0(%RSP),%R15 |
(355) 0x45e51d ADD %RAX,0xf8(%RSP) |
(355) 0x45e525 MOV 0x98(%RSP),%R13 |
(355) 0x45e52d ADD %R14,%RCX |
(355) 0x45e530 ADD %R15,%R12 |
(355) 0x45e533 ADD %R13,%RBX |
(355) 0x45e536 MOV 0x74(%RSP),%R11D |
(355) 0x45e53b CMP %R11D,0x6c(%RSP) |
(355) 0x45e540 JE 45e35d |
(355) 0x45e546 MOV 0x90(%RSP),%RAX |
(355) 0x45e54e INCL 0xe0(%RSP) |
(355) 0x45e555 MOV 0x88(%RSP),%R14 |
(355) 0x45e55d MOV 0xa0(%RSP),%R15 |
(355) 0x45e565 ADD %RAX,0xf8(%RSP) |
(355) 0x45e56d MOV 0x98(%RSP),%R13 |
(355) 0x45e575 ADD %R14,%RCX |
(355) 0x45e578 ADD %R15,%R12 |
(355) 0x45e57b ADD %R13,%RBX |
(355) 0x45e57e MOV 0x74(%RSP),%R11D |
(355) 0x45e583 CMP %R11D,0x6c(%RSP) |
(355) 0x45e588 JE 45e35d |
(355) 0x45e58e MOV 0x90(%RSP),%RAX |
(355) 0x45e596 INCL 0xe0(%RSP) |
(355) 0x45e59d MOV 0x88(%RSP),%R14 |
(355) 0x45e5a5 MOV 0xa0(%RSP),%R15 |
(355) 0x45e5ad ADD %RAX,0xf8(%RSP) |
(355) 0x45e5b5 MOV 0x98(%RSP),%R13 |
(355) 0x45e5bd ADD %R14,%RCX |
(355) 0x45e5c0 ADD %R15,%R12 |
(355) 0x45e5c3 ADD %R13,%RBX |
(355) 0x45e5c6 MOV 0x74(%RSP),%R11D |
(355) 0x45e5cb CMP %R11D,0x6c(%RSP) |
(355) 0x45e5d0 JE 45e35d |
(355) 0x45e5d6 MOV 0x90(%RSP),%RAX |
(355) 0x45e5de INCL 0xe0(%RSP) |
(355) 0x45e5e5 MOV 0x88(%RSP),%R14 |
(355) 0x45e5ed MOV 0xa0(%RSP),%R15 |
(355) 0x45e5f5 ADD %RAX,0xf8(%RSP) |
(355) 0x45e5fd MOV 0x98(%RSP),%R13 |
(355) 0x45e605 ADD %R14,%RCX |
(355) 0x45e608 ADD %R15,%R12 |
(355) 0x45e60b ADD %R13,%RBX |
(355) 0x45e60e MOV 0x74(%RSP),%R11D |
(355) 0x45e613 CMP %R11D,0x6c(%RSP) |
(355) 0x45e618 JE 45e35d |
(355) 0x45e61e INCL 0xe0(%RSP) |
(355) 0x45e625 MOV 0x90(%RSP),%R14 |
(355) 0x45e62d MOV 0x88(%RSP),%R15 |
(355) 0x45e635 MOV 0xa0(%RSP),%R13 |
(355) 0x45e63d MOV 0x98(%RSP),%R11 |
(355) 0x45e645 ADD %R14,0xf8(%RSP) |
(355) 0x45e64d ADD %R15,%RCX |
(355) 0x45e650 ADD %R13,%R12 |
(355) 0x45e653 MOV 0xe0(%RSP),%EAX |
(355) 0x45e65a ADD %R11,%RBX |
(355) 0x45e65d CMP %EAX,0x70(%RSP) |
(355) 0x45e661 JLE 45ed94 |
(355) 0x45e667 MOV %R11,%R13 |
(355) 0x45e66a MOV 0xa0(%RSP),%R11 |
(355) 0x45e672 MOV 0x90(%RSP),%R14 |
(355) 0x45e67a MOV %R10,0x40(%RSP) |
(355) 0x45e67f MOV 0x88(%RSP),%R15 |
(355) 0x45e687 MOV 0xf8(%RSP),%R10 |
(355) 0x45e68f MOV %RDI,0x38(%RSP) |
(355) 0x45e694 MOV %ESI,%EDI |
(355) 0x45e696 MOV 0x74(%RSP),%ESI |
(356) 0x45e69a CMP %ESI,0x6c(%RSP) |
(356) 0x45e69e JE 45edb3 |
(356) 0x45e6a4 ADD $0x8,%EAX |
(356) 0x45e6a7 LEA (%R10,%R14,8),%R10 |
(356) 0x45e6ab LEA (%RCX,%R15,8),%RCX |
(356) 0x45e6af LEA (%R12,%R11,8),%R12 |
(356) 0x45e6b3 LEA (%RBX,%R13,8),%RBX |
(356) 0x45e6b7 CMP %EAX,0x70(%RSP) |
(356) 0x45e6bb JG 45e69a |
0x45e6bd MOV %EDI,0x40(%RSP) |
0x45e6c1 TEST %DL,%DL |
0x45e6c3 JE 45eda0 |
0x45e6c9 MOV 0x40(%RSP),%EDX |
0x45e6cd MOV %EDX,0x74(%RSP) |
0x45e6d1 MOV 0xb0(%RSP),%R8 |
0x45e6d9 MOV 0x74(%RSP),%R9D |
0x45e6de MOV %R9D,0xe0(%R8) |
0x45e6e5 VZEROUPPER |
0x45e6e8 CALL 402220 <@plt_start@+0x200> |
0x45e6ed MOV 0xb0(%RSP),%R12 |
0x45e6f5 MOV 0x18(%R12),%RDI |
0x45e6fa MOV 0x10(%R12),%RCX |
0x45e6ff MOV (%RDI),%EAX |
0x45e701 MOV (%RCX),%EBX |
0x45e703 ADD $0x2,%EAX |
0x45e706 SUB %EBX,%EAX |
0x45e708 CLTD |
0x45e709 IDIVL 0x7c(%RSP) |
0x45e70d CMP %EDX,0xb8(%RSP) |
0x45e714 JL 45ed82 |
0x45e71a MOV 0xb8(%RSP),%R10D |
0x45e722 IMUL %EAX,%R10D |
0x45e726 ADD %R10D,%EDX |
0x45e729 ADD %EDX,%EAX |
0x45e72b CMP %EAX,%EDX |
0x45e72d JGE 45ec65 |
0x45e733 MOV 0xb0(%RSP),%R8 |
0x45e73b LEA (%RBX,%RDX,1),%ESI |
0x45e73e ADD %EBX,%EAX |
0x45e740 MOV 0xc8(%RSP),%RDI |
0x45e748 KXORB %K0,%K0,%K0 |
0x45e74c MOV %EAX,0xbc(%RSP) |
0x45e753 MOVSXD %ESI,%RAX |
0x45e756 MOV 0xc0(%RSP),%RDX |
0x45e75e MOV (%R8),%R15 |
0x45e761 IMUL %RAX,%RDI |
0x45e765 MOV 0x8(%R8),%R14 |
0x45e769 MOV %ESI,0xf0(%RSP) |
0x45e770 MOV 0x50(%R8),%RCX |
0x45e774 MOV 0x48(%R8),%R11 |
0x45e778 IMUL %RAX,%RDX |
0x45e77c MOVSXD (%R15),%R12 |
0x45e77f MOV 0x40(%R8),%R10 |
0x45e783 MOV 0x58(%R8),%R9 |
0x45e787 MOV 0x50(%RSP),%R8 |
0x45e78c MOV %RCX,0xf8(%RSP) |
0x45e794 MOV 0x60(%RSP),%RSI |
0x45e799 MOV 0x58(%RSP),%RCX |
0x45e79e MOV %R12,%RBX |
0x45e7a1 MOV %R12D,0xe8(%RSP) |
0x45e7a9 ADD %R12,%R8 |
0x45e7ac MOV (%R14),%R15D |
0x45e7af MOV 0xd8(%RSP),%R14 |
0x45e7b7 MOV %R12,0x90(%RSP) |
0x45e7bf ADD %RDI,%R8 |
0x45e7c2 MOV 0x48(%RSP),%RDI |
0x45e7c7 ADD %R12,%RSI |
0x45e7ca ADD %R12,%RCX |
0x45e7cd IMUL %RAX,%R14 |
0x45e7d1 LEA 0x2(%R15),%R13D |
0x45e7d5 MOV %R15D,0x88(%RSP) |
0x45e7dd SUB %EBX,%R15D |
0x45e7e0 ADD %R12,%RDI |
0x45e7e3 MOV 0xd0(%RSP),%R12 |
0x45e7eb MOV %R13D,0xec(%RSP) |
0x45e7f3 ADD %RDX,%RDI |
0x45e7f6 MOV %R15D,0xa8(%RSP) |
0x45e7fe IMUL %R12,%RAX |
0x45e802 ADD %R14,%RSI |
0x45e805 ADD %RAX,%RCX |
0x45e808 LEA 0x2(%R15),%EAX |
0x45e80c LEA 0x1(%R15),%R15D |
0x45e810 MOV %EAX,%EDX |
0x45e812 MOV %EAX,%R14D |
0x45e815 MOV %R15D,0xb8(%RSP) |
0x45e81d AND $-0x8,%R14D |
0x45e821 SHR $0x3,%EDX |
0x45e824 SAL $0x6,%RDX |
0x45e828 MOV %R14D,0xa0(%RSP) |
0x45e830 ADD %EBX,%R14D |
0x45e833 CMP %R13D,%EBX |
0x45e836 CMOVGE %EBX,%R13D |
0x45e83a AND $0x7,%EAX |
0x45e83d MOV %RDX,0xe0(%RSP) |
0x45e845 MOV %R14D,0x98(%RSP) |
0x45e84d MOV %R13D,0x80(%RSP) |
0x45e855 MOV %EAX,0xac(%RSP) |
0x45e85c NOPL (%RAX) |
(353) 0x45e860 MOV 0xec(%RSP),%EBX |
(353) 0x45e867 CMP %EBX,0xe8(%RSP) |
(353) 0x45e86e JGE 45ebff |
(353) 0x45e874 CMPL $0x6,0xb8(%RSP) |
(353) 0x45e87c JBE 45ed30 |
(353) 0x45e882 MOV 0xe0(%RSP),%RDX |
(353) 0x45e88a MOV 0xf8(%RSP),%RAX |
(353) 0x45e892 LEA (%R11,%R8,8),%R15 |
(353) 0x45e896 LEA (%R10,%RDI,8),%R14 |
(353) 0x45e89a LEA (%R9,%RSI,8),%R12 |
(353) 0x45e89e XOR %R13D,%R13D |
(353) 0x45e8a1 SUB $0x40,%RDX |
(353) 0x45e8a5 LEA (%RAX,%RCX,8),%RBX |
(353) 0x45e8a9 SHR $0x6,%RDX |
(353) 0x45e8ad INC %RDX |
(353) 0x45e8b0 AND $0x7,%EDX |
(353) 0x45e8b3 JE 45e9b7 |
(353) 0x45e8b9 CMP $0x1,%RDX |
(353) 0x45e8bd JE 45e989 |
(353) 0x45e8c3 CMP $0x2,%RDX |
(353) 0x45e8c7 JE 45e969 |
(353) 0x45e8cd CMP $0x3,%RDX |
(353) 0x45e8d1 JE 45e949 |
(353) 0x45e8d3 CMP $0x4,%RDX |
(353) 0x45e8d7 JE 45e929 |
(353) 0x45e8d9 CMP $0x5,%RDX |
(353) 0x45e8dd JE 45e909 |
(353) 0x45e8df CMP $0x6,%RDX |
(353) 0x45e8e3 JNE 45ece0 |
(353) 0x45e8e9 VMOVUPD (%R15,%R13,1),%ZMM8 |
(353) 0x45e8f0 VMOVUPD %ZMM8,(%R14,%R13,1) |
(353) 0x45e8f7 VMOVUPD (%R12,%R13,1),%ZMM9 |
(353) 0x45e8fe VMOVUPD %ZMM9,(%RBX,%R13,1) |
(353) 0x45e905 ADD $0x40,%R13 |
(353) 0x45e909 VMOVUPD (%R15,%R13,1),%ZMM10 |
(353) 0x45e910 VMOVUPD %ZMM10,(%R14,%R13,1) |
(353) 0x45e917 VMOVUPD (%R12,%R13,1),%ZMM11 |
(353) 0x45e91e VMOVUPD %ZMM11,(%RBX,%R13,1) |
(353) 0x45e925 ADD $0x40,%R13 |
(353) 0x45e929 VMOVUPD (%R15,%R13,1),%ZMM12 |
(353) 0x45e930 VMOVUPD %ZMM12,(%R14,%R13,1) |
(353) 0x45e937 VMOVUPD (%R12,%R13,1),%ZMM13 |
(353) 0x45e93e VMOVUPD %ZMM13,(%RBX,%R13,1) |
(353) 0x45e945 ADD $0x40,%R13 |
(353) 0x45e949 VMOVUPD (%R15,%R13,1),%ZMM14 |
(353) 0x45e950 VMOVUPD %ZMM14,(%R14,%R13,1) |
(353) 0x45e957 VMOVUPD (%R12,%R13,1),%ZMM15 |
(353) 0x45e95e VMOVUPD %ZMM15,(%RBX,%R13,1) |
(353) 0x45e965 ADD $0x40,%R13 |
(353) 0x45e969 VMOVUPD (%R15,%R13,1),%ZMM1 |
(353) 0x45e970 VMOVUPD %ZMM1,(%R14,%R13,1) |
(353) 0x45e977 VMOVUPD (%R12,%R13,1),%ZMM2 |
(353) 0x45e97e VMOVUPD %ZMM2,(%RBX,%R13,1) |
(353) 0x45e985 ADD $0x40,%R13 |
(353) 0x45e989 VMOVUPD (%R15,%R13,1),%ZMM0 |
(353) 0x45e990 VMOVUPD %ZMM0,(%R14,%R13,1) |
(353) 0x45e997 VMOVUPD (%R12,%R13,1),%ZMM3 |
(353) 0x45e99e VMOVUPD %ZMM3,(%RBX,%R13,1) |
(353) 0x45e9a5 ADD $0x40,%R13 |
(353) 0x45e9a9 CMP %R13,0xe0(%RSP) |
(353) 0x45e9b1 JE 45eac8 |
(354) 0x45e9b7 VMOVUPD (%R15,%R13,1),%ZMM5 |
(354) 0x45e9be VMOVUPD %ZMM5,(%R14,%R13,1) |
(354) 0x45e9c5 VMOVUPD (%R12,%R13,1),%ZMM6 |
(354) 0x45e9cc VMOVUPD %ZMM6,(%RBX,%R13,1) |
(354) 0x45e9d3 VMOVUPD 0x40(%R15,%R13,1),%ZMM4 |
(354) 0x45e9db VMOVUPD %ZMM4,0x40(%R14,%R13,1) |
(354) 0x45e9e3 VMOVUPD 0x40(%R12,%R13,1),%ZMM7 |
(354) 0x45e9eb VMOVUPD %ZMM7,0x40(%RBX,%R13,1) |
(354) 0x45e9f3 VMOVUPD 0x80(%R15,%R13,1),%ZMM8 |
(354) 0x45e9fb VMOVUPD %ZMM8,0x80(%R14,%R13,1) |
(354) 0x45ea03 VMOVUPD 0x80(%R12,%R13,1),%ZMM9 |
(354) 0x45ea0b VMOVUPD %ZMM9,0x80(%RBX,%R13,1) |
(354) 0x45ea13 VMOVUPD 0xc0(%R15,%R13,1),%ZMM10 |
(354) 0x45ea1b VMOVUPD %ZMM10,0xc0(%R14,%R13,1) |
(354) 0x45ea23 VMOVUPD 0xc0(%R12,%R13,1),%ZMM11 |
(354) 0x45ea2b VMOVUPD %ZMM11,0xc0(%RBX,%R13,1) |
(354) 0x45ea33 VMOVUPD 0x100(%R15,%R13,1),%ZMM12 |
(354) 0x45ea3b VMOVUPD %ZMM12,0x100(%R14,%R13,1) |
(354) 0x45ea43 VMOVUPD 0x100(%R12,%R13,1),%ZMM13 |
(354) 0x45ea4b VMOVUPD %ZMM13,0x100(%RBX,%R13,1) |
(354) 0x45ea53 VMOVUPD 0x140(%R15,%R13,1),%ZMM14 |
(354) 0x45ea5b VMOVUPD %ZMM14,0x140(%R14,%R13,1) |
(354) 0x45ea63 VMOVUPD 0x140(%R12,%R13,1),%ZMM15 |
(354) 0x45ea6b VMOVUPD %ZMM15,0x140(%RBX,%R13,1) |
(354) 0x45ea73 VMOVUPD 0x180(%R15,%R13,1),%ZMM1 |
(354) 0x45ea7b VMOVUPD %ZMM1,0x180(%R14,%R13,1) |
(354) 0x45ea83 VMOVUPD 0x180(%R12,%R13,1),%ZMM2 |
(354) 0x45ea8b VMOVUPD %ZMM2,0x180(%RBX,%R13,1) |
(354) 0x45ea93 VMOVUPD 0x1c0(%R15,%R13,1),%ZMM0 |
(354) 0x45ea9b VMOVUPD %ZMM0,0x1c0(%R14,%R13,1) |
(354) 0x45eaa3 VMOVUPD 0x1c0(%R12,%R13,1),%ZMM3 |
(354) 0x45eaab VMOVUPD %ZMM3,0x1c0(%RBX,%R13,1) |
(354) 0x45eab3 ADD $0x200,%R13 |
(354) 0x45eaba CMP %R13,0xe0(%RSP) |
(354) 0x45eac2 JNE 45e9b7 |
(353) 0x45eac8 MOV 0xac(%RSP),%R15D |
(353) 0x45ead0 TEST %R15D,%R15D |
(353) 0x45ead3 JE 45ebff |
(353) 0x45ead9 MOV 0xa0(%RSP),%R13D |
(353) 0x45eae1 MOV 0x98(%RSP),%EDX |
(353) 0x45eae8 MOV 0xa8(%RSP),%R14D |
(353) 0x45eaf0 SUB %R13D,%R14D |
(353) 0x45eaf3 LEA 0x2(%R14),%EAX |
(353) 0x45eaf7 INC %R14D |
(353) 0x45eafa CMP $0x2,%R14D |
(353) 0x45eafe JBE 45eb3d |
(353) 0x45eb00 LEA (%R13,%R8,1),%R12 |
(353) 0x45eb05 LEA (%RDI,%R13,1),%RBX |
(353) 0x45eb09 MOV 0xf8(%RSP),%R14 |
(353) 0x45eb11 VMOVUPD (%R11,%R12,8),%YMM5 |
(353) 0x45eb17 LEA (%RSI,%R13,1),%R15 |
(353) 0x45eb1b ADD %RCX,%R13 |
(353) 0x45eb1e VMOVUPD %YMM5,(%R10,%RBX,8) |
(353) 0x45eb24 VMOVUPD (%R9,%R15,8),%YMM6 |
(353) 0x45eb2a VMOVUPD %YMM6,(%R14,%R13,8) |
(353) 0x45eb30 TEST $0x3,%AL |
(353) 0x45eb32 JE 45ebff |
(353) 0x45eb38 AND $-0x4,%EAX |
(353) 0x45eb3b ADD %EAX,%EDX |
(353) 0x45eb3d MOV 0x90(%RSP),%RAX |
(353) 0x45eb45 MOV %R8,%R13 |
(353) 0x45eb48 MOV %RDI,%R12 |
(353) 0x45eb4b MOV %RSI,%RBX |
(353) 0x45eb4e MOV %RCX,%R14 |
(353) 0x45eb51 SUB %RAX,%R13 |
(353) 0x45eb54 SUB %RAX,%R12 |
(353) 0x45eb57 SUB %RAX,%RBX |
(353) 0x45eb5a SUB %RAX,%R14 |
(353) 0x45eb5d MOVSXD %EDX,%RAX |
(353) 0x45eb60 LEA (%RAX,%R13,1),%R15 |
(353) 0x45eb64 VMOVSD (%R11,%R15,8),%XMM4 |
(353) 0x45eb6a LEA (%RAX,%R12,1),%R15 |
(353) 0x45eb6e VMOVSD %XMM4,(%R10,%R15,8) |
(353) 0x45eb74 LEA (%RAX,%RBX,1),%R15 |
(353) 0x45eb78 ADD %R14,%RAX |
(353) 0x45eb7b VMOVSD (%R9,%R15,8),%XMM7 |
(353) 0x45eb81 MOV 0xf8(%RSP),%R15 |
(353) 0x45eb89 VMOVSD %XMM7,(%R15,%RAX,8) |
(353) 0x45eb8f LEA 0x1(%RDX),%EAX |
(353) 0x45eb92 CMP %EAX,0xec(%RSP) |
(353) 0x45eb99 JLE 45ebff |
(353) 0x45eb9b CLTQ |
(353) 0x45eb9d LEA (%R13,%RAX,1),%R15 |
(353) 0x45eba2 VMOVSD (%R11,%R15,8),%XMM8 |
(353) 0x45eba8 LEA (%R12,%RAX,1),%R15 |
(353) 0x45ebac VMOVSD %XMM8,(%R10,%R15,8) |
(353) 0x45ebb2 LEA (%RBX,%RAX,1),%R15 |
(353) 0x45ebb6 ADD %R14,%RAX |
(353) 0x45ebb9 VMOVSD (%R9,%R15,8),%XMM9 |
(353) 0x45ebbf MOV 0xf8(%RSP),%R15 |
(353) 0x45ebc7 VMOVSD %XMM9,(%R15,%RAX,8) |
(353) 0x45ebcd LEA 0x2(%RDX),%EAX |
(353) 0x45ebd0 CMP %EDX,0x88(%RSP) |
(353) 0x45ebd7 JLE 45ebff |
(353) 0x45ebd9 CLTQ |
(353) 0x45ebdb ADD %RAX,%R13 |
(353) 0x45ebde ADD %RAX,%R12 |
(353) 0x45ebe1 ADD %RAX,%RBX |
(353) 0x45ebe4 ADD %R14,%RAX |
(353) 0x45ebe7 VMOVSD (%R11,%R13,8),%XMM10 |
(353) 0x45ebed VMOVSD %XMM10,(%R10,%R12,8) |
(353) 0x45ebf3 VMOVSD (%R9,%RBX,8),%XMM11 |
(353) 0x45ebf9 VMOVSD %XMM11,(%R15,%RAX,8) |
(353) 0x45ebff MOV 0xec(%RSP),%EDX |
(353) 0x45ec06 CMP %EDX,0xe8(%RSP) |
(353) 0x45ec0d JLE 45ec78 |
(353) 0x45ec0f INCL 0xf0(%RSP) |
(353) 0x45ec16 MOV 0xc8(%RSP),%R12 |
(353) 0x45ec1e MOV 0xc0(%RSP),%RBX |
(353) 0x45ec26 MOV 0xd8(%RSP),%R14 |
(353) 0x45ec2e MOV 0xd0(%RSP),%R15 |
(353) 0x45ec36 ADD %R12,%R8 |
(353) 0x45ec39 ADD %RBX,%RDI |
(353) 0x45ec3c ADD %R14,%RSI |
(353) 0x45ec3f MOV 0xf0(%RSP),%R13D |
(353) 0x45ec47 ADD %R15,%RCX |
(353) 0x45ec4a CMP %R13D,0xbc(%RSP) |
(353) 0x45ec52 JG 45e860 |
0x45ec58 KORTESTB %K0,%K0 |
0x45ec5c JNE 45ed4c |
0x45ec62 VZEROUPPER |
0x45ec65 LEA -0x28(%RBP),%RSP |
0x45ec69 POP %RBX |
0x45ec6a POP %R12 |
0x45ec6c POP %R13 |
0x45ec6e POP %R14 |
0x45ec70 POP %R15 |
0x45ec72 POP %RBP |
0x45ec73 RET |
0x45ec74 NOPL (%RAX) |
(353) 0x45ec78 INCL 0xf0(%RSP) |
(353) 0x45ec7f MOV 0xc8(%RSP),%RDX |
(353) 0x45ec87 MOV 0xc0(%RSP),%R13 |
(353) 0x45ec8f MOV 0xd8(%RSP),%R12 |
(353) 0x45ec97 MOV 0xd0(%RSP),%RBX |
(353) 0x45ec9f ADD %RDX,%R8 |
(353) 0x45eca2 ADD %R13,%RDI |
(353) 0x45eca5 ADD %R12,%RSI |
(353) 0x45eca8 MOV 0xf0(%RSP),%EAX |
(353) 0x45ecaf ADD %RBX,%RCX |
(353) 0x45ecb2 CMP %EAX,0xbc(%RSP) |
(353) 0x45ecb9 JLE 45ed59 |
(353) 0x45ecbf MOV 0x80(%RSP),%R14D |
(353) 0x45ecc7 MOV $0x1,%R15D |
(353) 0x45eccd KMOVB %R15D,%K0 |
(353) 0x45ecd2 MOV %R14D,0x68(%RSP) |
(353) 0x45ecd7 JMP 45e860 |
0x45ecdc NOPL (%RAX) |
(353) 0x45ece0 VMOVUPD (%R15),%ZMM4 |
(353) 0x45ece6 MOV $0x40,%R13D |
(353) 0x45ecec VMOVUPD %ZMM4,(%R14) |
(353) 0x45ecf2 VMOVUPD (%R12),%ZMM7 |
(353) 0x45ecf9 VMOVUPD %ZMM7,(%RBX) |
(353) 0x45ecff JMP 45e8e9 |
0x45ed04 NOPL (%RAX) |
(355) 0x45ed08 VMOVUPD (%R14),%ZMM1 |
(355) 0x45ed0e MOV $0x40,%EAX |
(355) 0x45ed13 VMOVUPD %ZMM1,(%R15) |
(355) 0x45ed19 VMOVUPD (%R13),%ZMM2 |
(355) 0x45ed20 VMOVUPD %ZMM2,(%RSI) |
(355) 0x45ed26 JMP 45e047 |
0x45ed2b NOPL (%RAX,%RAX,1) |
(353) 0x45ed30 MOV 0xe8(%RSP),%EDX |
(353) 0x45ed37 XOR %R13D,%R13D |
(353) 0x45ed3a JMP 45eae8 |
0x45ed3f NOP |
(355) 0x45ed40 MOV 0x78(%RSP),%EAX |
(355) 0x45ed44 XOR %R13D,%R13D |
(355) 0x45ed47 JMP 45e252 |
0x45ed4c MOV 0x68(%RSP),%R11D |
0x45ed51 MOV %R11D,0x80(%RSP) |
0x45ed59 MOV 0xb0(%RSP),%R10 |
0x45ed61 MOV 0x80(%RSP),%R9D |
0x45ed69 MOV %R9D,0xe0(%R10) |
0x45ed70 VZEROUPPER |
0x45ed73 LEA -0x28(%RBP),%RSP |
0x45ed77 POP %RBX |
0x45ed78 POP %R12 |
0x45ed7a POP %R13 |
0x45ed7c POP %R14 |
0x45ed7e POP %R15 |
0x45ed80 POP %RBP |
0x45ed81 RET |
0x45ed82 INC %EAX |
0x45ed84 XOR %EDX,%EDX |
0x45ed86 JMP 45e71a |
0x45ed8b INC %EAX |
0x45ed8d XOR %EDX,%EDX |
0x45ed8f JMP 45de9a |
0x45ed94 MOV %ESI,0x40(%RSP) |
0x45ed98 JMP 45e6c1 |
0x45ed9d NOPL (%RAX) |
0x45eda0 VZEROUPPER |
0x45eda3 JMP 45e6e8 |
(355) 0x45eda8 MOV %R14D,%EAX |
(355) 0x45edab MOV %R11,%R13 |
(355) 0x45edae JMP 45e66a |
(355) 0x45edb3 MOV %R10,0xf8(%RSP) |
(355) 0x45edbb MOV 0x38(%RSP),%RDI |
(355) 0x45edc0 MOV %EAX,0xe0(%RSP) |
(355) 0x45edc7 MOV 0x40(%RSP),%R10 |
(355) 0x45edcc JMP 45e35d |
0x45edd1 NOPW %CS:(%RAX,%RAX,1) |
0x45eddc NOPL (%RAX) |
Path / |
Source file and lines | reset_field_kernel.f90:47-63 |
Module | exec |
nb instructions | 251 |
nb uops | 266 |
loop length | 1148 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 31 |
micro-operation queue | 44.33 cycles |
front end | 44.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 16.40 | 16.40 | 28.00 | 28.00 | 28.50 | 16.40 | 16.40 | 28.50 | 28.50 | 28.50 | 16.40 | 28.00 |
cycles | 16.40 | 25.87 | 28.00 | 28.00 | 28.50 | 16.40 | 16.40 | 28.50 | 28.50 | 28.50 | 16.40 | 28.00 |
Cycles executing div or sqrt instructions | 12.00 |
FE+BE cycles | 45.19-45.26 |
Stall cycles | 2.50-2.50 |
LM full (events) | 3.00-3.01 |
Front-end | 44.33 |
Dispatch | 28.50 |
DIV/SQRT | 12.00 |
Overall L1 | 44.33 |
all | 6% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 33% |
all | 9% |
load | 6% |
store | 8% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RDI,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x100,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0xd0(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xc0(%RDI),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb8(%RDI),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xa8(%RAX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xa0(%RAX),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x90(%RAX),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd8(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xc8(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb0(%RDI),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x80(%RAX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RAX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x88(%RAX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x98(%RAX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RAX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x68(%RAX),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x60(%RAX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RAX),%R13D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL 402080 <@plt_start@+0x60> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,0x7c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 402180 <@plt_start@+0x160> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0xb0(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x18(%RDX),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %R13D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIVL 0x7c(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 6 |
CMP %EDX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 45ed8b <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x100b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xb8(%RSP),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %EAX,%EDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDI,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %EDX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 45e6e8 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x968> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xb0(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R13D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%R13,%RDX,1),%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EAX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x8(%RSI),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RSI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %ECX,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RSI),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RSI),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R10),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD (%R9),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RSI),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RSI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RAX),%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (%R12,%R11,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x88(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDX,0x6c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x90(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD %ECX,%RAX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
LEA (%R15,%R11,1),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
IMUL %RAX,%R12 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R11,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (%R14,%R11,1),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R11D,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %RAX,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R11,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R12,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%RBX,%R11,1),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x98(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe8(%RSP),%R11D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0xa0(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RSP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RAX,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
IMUL %RBX,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%R12,%RDX,1),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R14,%RAX,1),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R11D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %R13D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EAX,0xec(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EAX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EAX,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x3,%EDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
AND $-0x8,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SAL $0x6,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
CMP %R11D,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%R15,%R13,1),%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R15D,0xac(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMOVLE 0x6c(%RSP),%R13D | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.50 |
AND $0x7,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R14D,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0xbc(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13D,0x74(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EDI,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %DL,%DL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 45eda0 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x1020> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x40(%RSP),%EDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EDX,0x74(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb0(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x74(%RSP),%R9D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9D,0xe0(%R8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402220 <@plt_start@+0x200> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0xb0(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%R12),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R12),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDI),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x2,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIVL 0x7c(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 6 |
CMP %EDX,0xb8(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 45ed82 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x1002> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xb8(%RSP),%R10D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %EAX,%R10D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %R10D,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %EDX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 45ec65 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xee5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xb0(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RBX,%RDX,1),%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0xc8(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
KXORB %K0,%K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV %EAX,0xbc(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD %ESI,%RAX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV 0xc0(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RAX,%RDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x8(%R8),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %ESI,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%R8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%R8),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RAX,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOVSXD (%R15),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%R8),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%R8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R12D,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R12,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV (%R14),%R15D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xd8(%RSP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RDI,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x48(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R12,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R12,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
IMUL %RAX,%R14 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA 0x2(%R15),%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R15D,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %EBX,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R12,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0xd0(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13D,0xec(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RDX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15D,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R12,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %R14,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x2(%R15),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA 0x1(%R15),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EAX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EAX,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R15D,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
AND $-0x8,%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x3,%EDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SAL $0x6,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R14D,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %EBX,%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R13D,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVGE %EBX,%R13D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
AND $0x7,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RDX,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R14D,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13D,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0xac(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KORTESTB %K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JNE 45ed4c <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xfcc> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x68(%RSP),%R11D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11D,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb0(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x80(%RSP),%R9D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9D,0xe0(%R10) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 45e71a <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x99a> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 45de9a <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x11a> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV %ESI,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 45e6c1 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x941> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 45e6e8 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x968> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | reset_field_kernel.f90:47-63 |
Module | exec |
nb instructions | 251 |
nb uops | 266 |
loop length | 1148 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 31 |
micro-operation queue | 44.33 cycles |
front end | 44.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 16.40 | 16.40 | 28.00 | 28.00 | 28.50 | 16.40 | 16.40 | 28.50 | 28.50 | 28.50 | 16.40 | 28.00 |
cycles | 16.40 | 25.87 | 28.00 | 28.00 | 28.50 | 16.40 | 16.40 | 28.50 | 28.50 | 28.50 | 16.40 | 28.00 |
Cycles executing div or sqrt instructions | 12.00 |
FE+BE cycles | 45.19-45.26 |
Stall cycles | 2.50-2.50 |
LM full (events) | 3.00-3.01 |
Front-end | 44.33 |
Dispatch | 28.50 |
DIV/SQRT | 12.00 |
Overall L1 | 44.33 |
all | 6% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 33% |
all | 9% |
load | 6% |
store | 8% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RDI,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x100,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0xd0(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xc0(%RDI),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb8(%RDI),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xa8(%RAX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xa0(%RAX),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x90(%RAX),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd8(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xc8(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb0(%RDI),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x80(%RAX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RAX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x88(%RAX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x98(%RAX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RAX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x68(%RAX),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x60(%RAX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RAX),%R13D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL 402080 <@plt_start@+0x60> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,0x7c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 402180 <@plt_start@+0x160> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0xb0(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x18(%RDX),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %R13D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIVL 0x7c(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 6 |
CMP %EDX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 45ed8b <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x100b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xb8(%RSP),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %EAX,%EDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDI,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %EDX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 45e6e8 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x968> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xb0(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R13D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%R13,%RDX,1),%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EAX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x8(%RSI),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RSI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %ECX,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RSI),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RSI),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R10),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD (%R9),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RSI),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RSI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RAX),%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (%R12,%R11,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x88(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDX,0x6c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x90(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD %ECX,%RAX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
LEA (%R15,%R11,1),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
IMUL %RAX,%R12 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R11,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (%R14,%R11,1),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R11D,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %RAX,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R11,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R12,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%RBX,%R11,1),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x98(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe8(%RSP),%R11D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0xa0(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RSP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RAX,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
IMUL %RBX,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%R12,%RDX,1),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R14,%RAX,1),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R11D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %R13D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EAX,0xec(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EAX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EAX,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x3,%EDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
AND $-0x8,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SAL $0x6,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
CMP %R11D,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%R15,%R13,1),%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R15D,0xac(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMOVLE 0x6c(%RSP),%R13D | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.50 |
AND $0x7,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R14D,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0xbc(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13D,0x74(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EDI,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %DL,%DL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 45eda0 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x1020> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x40(%RSP),%EDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EDX,0x74(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb0(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x74(%RSP),%R9D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9D,0xe0(%R8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402220 <@plt_start@+0x200> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0xb0(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%R12),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R12),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDI),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x2,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIVL 0x7c(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 6 |
CMP %EDX,0xb8(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 45ed82 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x1002> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xb8(%RSP),%R10D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %EAX,%R10D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %R10D,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %EDX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 45ec65 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xee5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xb0(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RBX,%RDX,1),%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0xc8(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
KXORB %K0,%K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV %EAX,0xbc(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD %ESI,%RAX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV 0xc0(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RAX,%RDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x8(%R8),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %ESI,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%R8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%R8),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RAX,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOVSXD (%R15),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%R8),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%R8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R12D,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R12,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV (%R14),%R15D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xd8(%RSP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RDI,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x48(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R12,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R12,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
IMUL %RAX,%R14 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA 0x2(%R15),%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R15D,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %EBX,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R12,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0xd0(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13D,0xec(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RDX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15D,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R12,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %R14,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x2(%R15),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA 0x1(%R15),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EAX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EAX,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R15D,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
AND $-0x8,%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x3,%EDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SAL $0x6,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R14D,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %EBX,%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R13D,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVGE %EBX,%R13D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
AND $0x7,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RDX,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R14D,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13D,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0xac(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KORTESTB %K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JNE 45ed4c <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xfcc> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x68(%RSP),%R11D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11D,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb0(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x80(%RSP),%R9D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9D,0xe0(%R10) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 45e71a <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x99a> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 45de9a <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x11a> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV %ESI,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 45e6c1 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x941> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 45e6e8 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x968> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼reset_field_kernel._omp_fn.0– | 4.94 | 3.66 |
▼Loop 355 - reset_field_kernel.f90:48-53 - exec– | 0 | 0 |
○Loop 357 - reset_field_kernel.f90:52-53 - exec | 2.31 | 1.7 |
○Loop 356 - reset_field_kernel.f90:50-50 - exec | 0 | 0 |
▼Loop 353 - reset_field_kernel.f90:47-63 - exec– | 0 | 0.01 |
○Loop 354 - reset_field_kernel.f90:62-63 - exec | 2.64 | 1.95 |