Function: pdv_kernel_.DIR.OMP.PARALLEL.2 | Module: exec | Source: PdV_kernel.f90:67-139 [...] | Coverage: 12.58% |
---|
Function: pdv_kernel_.DIR.OMP.PARALLEL.2 | Module: exec | Source: PdV_kernel.f90:67-139 [...] | Coverage: 12.58% |
---|
/scratch_na/users/xoserete/qaas_runs/171-215-0463/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/PdV_kernel.f90: 67 - 139 |
-------------------------------------------------------------------------------- |
67: !$OMP PARALLEL |
68: |
69: IF(predict)THEN |
70: |
71: !$OMP DO PRIVATE(right_flux,left_flux,top_flux,bottom_flux,total_flux,min_cell_volume, & |
72: !$OMP energy_change,recip_volume,volume_change_s) |
73: DO k=y_min,y_max |
74: !$OMP SIMD |
75: DO j=x_min,x_max |
76: |
77: left_flux= (xarea(j ,k )*(xvel0(j ,k )+xvel0(j ,k+1) & |
78: +xvel0(j ,k )+xvel0(j ,k+1)))*0.25_8*dt*0.5 |
79: right_flux= (xarea(j+1,k )*(xvel0(j+1,k )+xvel0(j+1,k+1) & |
80: +xvel0(j+1,k )+xvel0(j+1,k+1)))*0.25_8*dt*0.5 |
81: bottom_flux=(yarea(j ,k )*(yvel0(j ,k )+yvel0(j+1,k ) & |
82: +yvel0(j ,k )+yvel0(j+1,k )))*0.25_8*dt*0.5 |
83: top_flux= (yarea(j ,k+1)*(yvel0(j ,k+1)+yvel0(j+1,k+1) & |
84: +yvel0(j ,k+1)+yvel0(j+1,k+1)))*0.25_8*dt*0.5 |
85: total_flux=right_flux-left_flux+top_flux-bottom_flux |
86: |
87: volume_change_s=volume(j,k)/(volume(j,k)+total_flux) |
[...] |
95: energy_change=(pressure(j,k)/density0(j,k)+viscosity(j,k)/density0(j,k))*total_flux*recip_volume |
96: |
97: energy1(j,k)=energy0(j,k)-energy_change |
98: |
99: density1(j,k)=density0(j,k)*volume_change_s |
100: |
101: ENDDO |
102: ENDDO |
103: !$OMP END DO |
104: |
105: ELSE |
106: |
107: !$OMP DO PRIVATE(right_flux,left_flux,top_flux,bottom_flux,total_flux,min_cell_volume, & |
108: !$OMP energy_change,recip_volume,volume_change_s) |
109: DO k=y_min,y_max |
110: !$OMP SIMD |
111: DO j=x_min,x_max |
112: |
113: left_flux= (xarea(j ,k )*(xvel0(j ,k )+xvel0(j ,k+1) & |
114: +xvel1(j ,k )+xvel1(j ,k+1)))*0.25_8*dt |
115: right_flux= (xarea(j+1,k )*(xvel0(j+1,k )+xvel0(j+1,k+1) & |
116: +xvel1(j+1,k )+xvel1(j+1,k+1)))*0.25_8*dt |
117: bottom_flux=(yarea(j ,k )*(yvel0(j ,k )+yvel0(j+1,k ) & |
118: +yvel1(j ,k )+yvel1(j+1,k )))*0.25_8*dt |
119: top_flux= (yarea(j ,k+1)*(yvel0(j ,k+1)+yvel0(j+1,k+1) & |
120: +yvel1(j ,k+1)+yvel1(j+1,k+1)))*0.25_8*dt |
121: total_flux=right_flux-left_flux+top_flux-bottom_flux |
122: |
123: volume_change_s=volume(j,k)/(volume(j,k)+total_flux) |
[...] |
131: energy_change=(pressure(j,k)/density0(j,k)+viscosity(j,k)/density0(j,k))*total_flux*recip_volume |
132: |
133: energy1(j,k)=energy0(j,k)-energy_change |
134: |
135: density1(j,k)=density0(j,k)*volume_change_s |
136: |
137: ENDDO |
138: ENDDO |
139: !$OMP END DO |
0x423ae0 PUSH %RBP |
0x423ae1 MOV %RSP,%RBP |
0x423ae4 PUSH %R15 |
0x423ae6 PUSH %R14 |
0x423ae8 PUSH %R13 |
0x423aea PUSH %R12 |
0x423aec PUSH %RBX |
0x423aed AND $-0x40,%RSP |
0x423af1 SUB $0x980,%RSP |
0x423af8 MOV %R9,0x98(%RSP) |
0x423b00 MOV %RDI,%R12 |
0x423b03 MOV 0xe8(%RBP),%RAX |
0x423b0a MOV %RAX,0x1a0(%RSP) |
0x423b12 MOV 0xe0(%RBP),%RAX |
0x423b19 MOV %RAX,0x198(%RSP) |
0x423b21 MOV 0xd8(%RBP),%RAX |
0x423b28 MOV %RAX,0x190(%RSP) |
0x423b30 MOV 0xd0(%RBP),%RAX |
0x423b37 MOV %RAX,0x188(%RSP) |
0x423b3f MOV 0xc8(%RBP),%RAX |
0x423b46 MOV %RAX,0x180(%RSP) |
0x423b4e MOV 0xc0(%RBP),%RAX |
0x423b55 MOV %RAX,0x178(%RSP) |
0x423b5d MOV 0x78(%RBP),%EBX |
0x423b60 MOV 0x70(%RBP),%EAX |
0x423b63 SUB %EBX,%EAX |
0x423b65 TESTB $0x1,0x90(%RBP) |
0x423b6c MOV 0xb8(%RBP),%RSI |
0x423b73 MOV %RSI,0x170(%RSP) |
0x423b7b MOV 0xb0(%RBP),%RSI |
0x423b82 MOV %RSI,0x168(%RSP) |
0x423b8a MOV 0xa8(%RBP),%RSI |
0x423b91 MOV %RSI,0x160(%RSP) |
0x423b99 MOV 0xa0(%RBP),%RSI |
0x423ba0 MOV %RSI,0x158(%RSP) |
0x423ba8 MOV 0x98(%RBP),%RSI |
0x423baf MOV %RSI,0x150(%RSP) |
0x423bb7 MOV 0x88(%RBP),%R15 |
0x423bbe MOV 0x80(%RBP),%R14 |
0x423bc5 MOV 0x68(%RBP),%RSI |
0x423bc9 MOV %RSI,0x148(%RSP) |
0x423bd1 MOV 0x60(%RBP),%RSI |
0x423bd5 MOV %RSI,0x90(%RSP) |
0x423bdd MOV 0x58(%RBP),%RSI |
0x423be1 MOV %RSI,0x88(%RSP) |
0x423be9 MOV 0x50(%RBP),%RSI |
0x423bed MOV %RSI,0x80(%RSP) |
0x423bf5 MOV 0x48(%RBP),%RSI |
0x423bf9 MOV %RSI,0x78(%RSP) |
0x423bfe MOV 0x40(%RBP),%RSI |
0x423c02 MOV %RSI,0x70(%RSP) |
0x423c07 MOV 0x38(%RBP),%RSI |
0x423c0b MOV %RSI,0x68(%RSP) |
0x423c10 MOV 0x30(%RBP),%RSI |
0x423c14 MOV %RSI,0x60(%RSP) |
0x423c19 MOV 0x28(%RBP),%RSI |
0x423c1d MOV %RSI,0x58(%RSP) |
0x423c22 MOV 0x20(%RBP),%RSI |
0x423c26 MOV %RSI,0x50(%RSP) |
0x423c2b MOV 0x18(%RBP),%RSI |
0x423c2f MOV %RSI,0x48(%RSP) |
0x423c34 JNE 423d40 |
0x423c3a MOV 0x150(%RBP),%RSI |
0x423c41 MOV %RSI,0x700(%RSP) |
0x423c49 MOV 0x148(%RBP),%RSI |
0x423c50 MOV %RSI,0x6c0(%RSP) |
0x423c58 MOV 0x10(%RBP),%RSI |
0x423c5c MOV %RSI,0x140(%RSP) |
0x423c64 MOVL $0,0x12c(%RSP) |
0x423c6f TEST %EAX,%EAX |
0x423c71 JS 423ded |
0x423c77 MOV %RCX,%R13 |
0x423c7a MOV %RDX,0x10(%RSP) |
0x423c7f MOV %R12,0xf0(%RSP) |
0x423c87 MOV (%R12),%ESI |
0x423c8b MOVL $0,0x34(%RSP) |
0x423c93 MOV %EAX,0x30(%RSP) |
0x423c97 MOVL $0x1,0x128(%RSP) |
0x423ca2 SUB $0x8,%RSP |
0x423ca6 LEA 0x130(%RSP),%R10 |
0x423cae LEA 0x134(%RSP),%RCX |
0x423cb6 LEA 0x3c(%RSP),%RAX |
0x423cbb LEA 0x38(%RSP),%R9 |
0x423cc0 MOV $0x749130,%EDI |
0x423cc5 MOV %ESI,0x12c(%RSP) |
0x423ccc MOV $0x22,%EDX |
0x423cd1 MOV %R8,0x140(%RSP) |
0x423cd9 MOV %RAX,%R8 |
0x423cdc PUSH $0x1 |
0x423cde PUSH $0x1 |
0x423ce0 PUSH %R10 |
0x423ce2 CALL 4045a0 <__kmpc_for_static_init_4@plt> |
0x423ce7 ADD $0x20,%RSP |
0x423ceb MOV 0x34(%RSP),%EAX |
0x423cef MOV 0x30(%RSP),%R12D |
0x423cf4 SUB %EAX,%R12D |
0x423cf7 JAE 423e40 |
0x423cfd MOV $0x749150,%EDI |
0x423d02 MOV 0x124(%RSP),%ESI |
0x423d09 JMP 423ddd |
0x423d0e NOPW %CS:(%RAX,%RAX,1) |
0x423d1d NOPW %CS:(%RAX,%RAX,1) |
0x423d2c NOPW %CS:(%RAX,%RAX,1) |
0x423d3b NOPL (%RAX,%RAX,1) |
0x423d40 MOVL $0,0x134(%RSP) |
0x423d4b TEST %EAX,%EAX |
0x423d4d JS 423ded |
0x423d53 MOV %RCX,%R13 |
0x423d56 MOV %R12,%RCX |
0x423d59 MOV %RDX,%R12 |
0x423d5c MOV %RCX,0xf0(%RSP) |
0x423d64 MOV (%RCX),%ESI |
0x423d66 MOVL $0,0x3c(%RSP) |
0x423d6e MOV %EAX,0x38(%RSP) |
0x423d72 MOVL $0x1,0x130(%RSP) |
0x423d7d SUB $0x8,%RSP |
0x423d81 LEA 0x138(%RSP),%RAX |
0x423d89 LEA 0x13c(%RSP),%RCX |
0x423d91 LEA 0x44(%RSP),%R8 |
0x423d96 LEA 0x40(%RSP),%R9 |
0x423d9b MOV $0x7490d0,%EDI |
0x423da0 MOV %ESI,0x288(%RSP) |
0x423da7 MOV $0x22,%EDX |
0x423dac PUSH $0x1 |
0x423dae PUSH $0x1 |
0x423db0 PUSH %RAX |
0x423db1 CALL 4045a0 <__kmpc_for_static_init_4@plt> |
0x423db6 ADD $0x20,%RSP |
0x423dba MOV 0x3c(%RSP),%EAX |
0x423dbe MOV 0x38(%RSP),%ECX |
0x423dc2 SUB %EAX,%ECX |
0x423dc4 MOV %ECX,0x108(%RSP) |
0x423dcb JAE 424a00 |
0x423dd1 MOV $0x7490f0,%EDI |
0x423dd6 MOV 0x280(%RSP),%ESI |
0x423ddd VZEROUPPER |
0x423de0 CALL 404190 <__kmpc_for_static_fini@plt> |
0x423de5 MOV 0xf0(%RSP),%R12 |
0x423ded MOV (%R12),%ESI |
0x423df1 MOV $0x749170,%EDI |
0x423df6 CALL 404660 <__kmpc_barrier@plt> |
0x423dfb MOV (%R12),%ESI |
0x423dff MOV $0x749110,%EDI |
0x423e04 LEA -0x28(%RBP),%RSP |
0x423e08 POP %RBX |
0x423e09 POP %R12 |
0x423e0b POP %R13 |
0x423e0d POP %R14 |
0x423e0f POP %R15 |
0x423e11 POP %RBP |
0x423e12 JMP 404660 |
0x423e17 NOPW %CS:(%RAX,%RAX,1) |
0x423e26 NOPW %CS:(%RAX,%RAX,1) |
0x423e35 NOPW %CS:(%RAX,%RAX,1) |
0x423e40 MOV %RAX,%R8 |
0x423e43 MOV %R13,%RSI |
0x423e46 SAL $0x20,%RSI |
0x423e4a MOV $-0x200000000,%RAX |
0x423e54 LEA (%RSI,%RAX,1),%RDX |
0x423e58 MOV %RDX,%RCX |
0x423e5b SAR $0x20,%RCX |
0x423e5f MOV %RCX,0x1b8(%RSP) |
0x423e67 MOV 0x10(%RSP),%RCX |
0x423e6c SAL $0x20,%RCX |
0x423e70 ADD %RCX,%RAX |
0x423e73 MOV %RAX,%R11 |
0x423e76 SAR $0x20,%R11 |
0x423e7a ADD %EBX,%R8D |
0x423e7d MOVSXD (%R15),%RBX |
0x423e80 MOV (%R14),%EDI |
0x423e83 SUB %EBX,%EDI |
0x423e85 MOV %RDI,0x100(%RSP) |
0x423e8d INC %EDI |
0x423e8f CMP $0x2,%EDI |
0x423e92 MOV $0x1,%R15D |
0x423e98 CMOVGE %EDI,%R15D |
0x423e9c MOV %R15D,%EDI |
0x423e9f AND $0x7ffffff8,%EDI |
0x423ea5 MOV %RDI,0x10(%RSP) |
0x423eaa TEST %RDX,%RDX |
0x423ead MOV $-0x1,%RDI |
0x423eb4 CMOVNS %RDX,%RDI |
0x423eb8 TEST %RDI,%RDI |
0x423ebb MOV $0x1,%R10D |
0x423ec1 CMOVG %R10,%RDI |
0x423ec5 MOV $0x200000000,%R13 |
0x423ecf MOV %R13,%R9 |
0x423ed2 SUB %RSI,%R9 |
0x423ed5 MOV %R15,0x238(%RSP) |
0x423edd VPBROADCASTQ %R15,%ZMM0 |
0x423ee3 VMOVDQA64 %ZMM0,0x840(%RSP) |
0x423eeb CMP %R9,%RDX |
0x423eee CMOVG %RDX,%R9 |
0x423ef2 MOV %RBX,0x1a8(%RSP) |
0x423efa LEA (,%RBX,8),%RBX |
0x423f02 SHR $0x20,%R9 |
0x423f06 IMUL %RDI,%R9 |
0x423f0a MOV $-0x1,%RDX |
0x423f11 SAL $0x3,%R9 |
0x423f15 SUB %R9,%RBX |
0x423f18 MOV $0x1,%ESI |
0x423f1d MOV %R11,0x1b0(%RSP) |
0x423f25 SUB %R11,%RSI |
0x423f28 MOV %RSI,0x228(%RSP) |
0x423f30 TEST %RAX,%RAX |
0x423f33 CMOVNS %RAX,%RDX |
0x423f37 TEST %RDX,%RDX |
0x423f3a CMOVG %R10,%RDX |
0x423f3e MOV 0x138(%RSP),%RSI |
0x423f46 LEA 0x8(%RSI,%RBX,1),%RSI |
0x423f4b MOV %RSI,0x220(%RSP) |
0x423f53 SUB %RCX,%R13 |
0x423f56 MOV 0x98(%RSP),%RCX |
0x423f5e LEA 0x8(%RCX,%RBX,1),%RCX |
0x423f63 MOV %RCX,0x218(%RSP) |
0x423f6b CMP %R13,%RAX |
0x423f6e CMOVG %RAX,%R13 |
0x423f72 SHR $0x20,%R13 |
0x423f76 IMUL %RDX,%R13 |
0x423f7a MOV %R12D,%EDX |
0x423f7d NEG %R13 |
0x423f80 MOV %R13,0x230(%RSP) |
0x423f88 MOV 0x90(%RSP),%RAX |
0x423f90 LEA 0x8(%RAX,%RBX,1),%RAX |
0x423f95 MOV %RAX,0x210(%RSP) |
0x423f9d MOV 0x140(%RSP),%RAX |
0x423fa5 LEA 0x8(%RAX,%RBX,1),%RAX |
0x423faa MOV %RAX,0x208(%RSP) |
0x423fb2 MOV 0x48(%RSP),%RAX |
0x423fb7 LEA 0x8(%RAX,%RBX,1),%RAX |
0x423fbc MOV %RAX,0x200(%RSP) |
0x423fc4 MOV 0x70(%RSP),%RAX |
0x423fc9 LEA (%RAX,%RBX,1),%RAX |
0x423fcd MOV %RAX,0x1f8(%RSP) |
0x423fd5 MOV 0x60(%RSP),%RAX |
0x423fda LEA (%RAX,%RBX,1),%RAX |
0x423fde MOV %RAX,0x1f0(%RSP) |
0x423fe6 MOV 0x68(%RSP),%RAX |
0x423feb LEA (%RAX,%RBX,1),%RAX |
0x423fef MOV %RAX,0x1e8(%RSP) |
0x423ff7 MOV 0x58(%RSP),%RAX |
0x423ffc LEA (%RAX,%RBX,1),%RAX |
0x424000 MOV %RAX,0x1e0(%RSP) |
0x424008 MOV 0x50(%RSP),%RAX |
0x42400d ADD %RBX,%RAX |
0x424010 MOV %RAX,0x1d8(%RSP) |
0x424018 MOV 0x78(%RSP),%RAX |
0x42401d ADD %RBX,%RAX |
0x424020 MOV %RAX,0x1d0(%RSP) |
0x424028 MOV 0x80(%RSP),%RAX |
0x424030 ADD %RBX,%RAX |
0x424033 MOV %RAX,0x1c8(%RSP) |
0x42403b ADD 0x88(%RSP),%RBX |
0x424043 MOV %RBX,0x240(%RSP) |
0x42404b VMOVSD 0xe32f5(%RIP),%XMM8 |
0x424053 MOVQ $0,0x28(%RSP) |
0x42405c MOV %R8,0x1c0(%RSP) |
0x424064 MOV %R8D,%R14D |
0x424067 MOV %R12D,0x40(%RSP) |
0x42406c JMP 424098 |
0x42406e NOPW %CS:(%RAX,%RAX,1) |
0x42407d NOPL (%RAX) |
(122) 0x424080 MOV 0x28(%RSP),%RCX |
(122) 0x424085 LEA 0x1(%RCX),%EAX |
(122) 0x424088 INC %R14D |
(122) 0x42408b CMP %EDX,%ECX |
(122) 0x42408d MOV %RAX,0x28(%RSP) |
(122) 0x424092 JE 423cfd |
(122) 0x424098 CMPL $0,0x100(%RSP) |
(122) 0x4240a0 JS 424080 |
(122) 0x4240a2 MOV %R14D,%R9D |
(122) 0x4240a5 MOV %EDX,%R14D |
(122) 0x4240a8 MOV 0x150(%RSP),%RAX |
(122) 0x4240b0 MOV (%RAX),%RDI |
(122) 0x4240b3 MOV 0x158(%RSP),%RAX |
(122) 0x4240bb MOV (%RAX),%R8 |
(122) 0x4240be MOV 0x148(%RSP),%RAX |
(122) 0x4240c6 VMULSD (%RAX),%XMM8,%XMM28 |
(122) 0x4240cc MOV 0x6c0(%RSP),%RAX |
(122) 0x4240d4 MOV (%RAX),%RBX |
(122) 0x4240d7 MOV 0x160(%RSP),%RAX |
(122) 0x4240df MOV (%RAX),%RAX |
(122) 0x4240e2 MOV %RAX,0x20(%RSP) |
(122) 0x4240e7 MOV 0x168(%RSP),%RAX |
(122) 0x4240ef MOV (%RAX),%RSI |
(122) 0x4240f2 MOV 0x700(%RSP),%RAX |
(122) 0x4240fa MOV (%RAX),%R13 |
(122) 0x4240fd MOV 0x170(%RSP),%RAX |
(122) 0x424105 MOV (%RAX),%R12 |
(122) 0x424108 MOV 0x178(%RSP),%RAX |
(122) 0x424110 MOV (%RAX),%R10 |
(122) 0x424113 MOV 0x180(%RSP),%RAX |
(122) 0x42411b MOV (%RAX),%RDX |
(122) 0x42411e MOV 0x188(%RSP),%RAX |
(122) 0x424126 MOV (%RAX),%RCX |
(122) 0x424129 MOV 0x190(%RSP),%RAX |
(122) 0x424131 MOV (%RAX),%R11 |
(122) 0x424134 MOV 0x198(%RSP),%RAX |
(122) 0x42413c MOV (%RAX),%RAX |
(122) 0x42413f MOV %RAX,0xc8(%RSP) |
(122) 0x424147 MOV 0x1a0(%RSP),%RAX |
(122) 0x42414f MOV (%RAX),%RAX |
(122) 0x424152 MOV 0x10(%RSP),%R15 |
(122) 0x424157 TEST %R15,%R15 |
(122) 0x42415a MOV %R9D,0xd0(%RSP) |
(122) 0x424162 MOV %RAX,0xf8(%RSP) |
(122) 0x42416a MOV %R11,0x18(%RSP) |
(122) 0x42416f MOV %RCX,0xc0(%RSP) |
(122) 0x424177 MOV %RDX,0xb8(%RSP) |
(122) 0x42417f MOV %R13,0x800(%RSP) |
(122) 0x424187 JE 424500 |
(122) 0x42418d MOVSXD %R9D,%R14 |
(122) 0x424190 MOV %R8,0xa0(%RSP) |
(122) 0x424198 MOV %RDI,%R8 |
(122) 0x42419b MOV %RAX,%R15 |
(122) 0x42419e MOV 0x228(%RSP),%RAX |
(122) 0x4241a6 LEA (%RAX,%R14,1),%R11 |
(122) 0x4241aa ADD 0x230(%RSP),%R14 |
(122) 0x4241b2 VBROADCASTSD %XMM28,%ZMM0 |
(122) 0x4241b8 MOV %R10,0xb0(%RSP) |
(122) 0x4241c0 MOV %R13,%RCX |
(122) 0x4241c3 IMUL %R11,%RCX |
(122) 0x4241c7 MOV 0x220(%RSP),%RAX |
(122) 0x4241cf ADD %RAX,%RCX |
(122) 0x4241d2 MOV %R12,0xa8(%RSP) |
(122) 0x4241da MOV %RSI,%RDX |
(122) 0x4241dd IMUL %R11,%RDX |
(122) 0x4241e1 MOV %RSI,%RDI |
(122) 0x4241e4 MOV 0x218(%RSP),%RSI |
(122) 0x4241ec ADD %RSI,%RDX |
(122) 0x4241ef MOV %R13,%R9 |
(122) 0x4241f2 IMUL %R14,%R9 |
(122) 0x4241f6 ADD %RAX,%R9 |
(122) 0x4241f9 MOV %RDI,0x7c0(%RSP) |
(122) 0x424201 IMUL %R14,%RDI |
(122) 0x424205 ADD %RSI,%RDI |
(122) 0x424208 MOV %R8,0x780(%RSP) |
(122) 0x424210 IMUL %R14,%R8 |
(122) 0x424214 ADD 0x210(%RSP),%R8 |
(122) 0x42421c MOV %RBX,%R12 |
(122) 0x42421f IMUL %R11,%R12 |
(122) 0x424223 MOV 0x208(%RSP),%RAX |
(122) 0x42422b ADD %RAX,%R12 |
(122) 0x42422e MOV %RBX,0x740(%RSP) |
(122) 0x424236 IMUL %R14,%RBX |
(122) 0x42423a ADD %RAX,%RBX |
(122) 0x42423d MOV 0xa0(%RSP),%RAX |
(122) 0x424245 MOV %RAX,%R13 |
(122) 0x424248 IMUL %R14,%R13 |
(122) 0x42424c MOV 0x200(%RSP),%RSI |
(122) 0x424254 ADD %RSI,%R13 |
(122) 0x424257 IMUL %R11,%RAX |
(122) 0x42425b ADD %RSI,%RAX |
(122) 0x42425e IMUL %R14,%R15 |
(122) 0x424262 ADD 0x1f8(%RSP),%R15 |
(122) 0x42426a MOV %R15,0x118(%RSP) |
(122) 0x424272 MOV 0xc8(%RSP),%RSI |
(122) 0x42427a IMUL %R14,%RSI |
(122) 0x42427e ADD 0x1f0(%RSP),%RSI |
(122) 0x424286 MOV %RSI,0x110(%RSP) |
(122) 0x42428e MOV 0x18(%RSP),%R10 |
(122) 0x424293 IMUL %R14,%R10 |
(122) 0x424297 ADD 0x1e8(%RSP),%R10 |
(122) 0x42429f MOV %R10,0xe8(%RSP) |
(122) 0x4242a7 MOV 0xb0(%RSP),%RSI |
(122) 0x4242af IMUL %R14,%RSI |
(122) 0x4242b3 ADD 0x1e0(%RSP),%RSI |
(122) 0x4242bb MOV %RSI,0xe0(%RSP) |
(122) 0x4242c3 MOV 0xc0(%RSP),%RSI |
(122) 0x4242cb IMUL %R14,%RSI |
(122) 0x4242cf ADD 0x1d8(%RSP),%RSI |
(122) 0x4242d7 MOV %RSI,0xd8(%RSP) |
(122) 0x4242df MOV 0xb8(%RSP),%RSI |
(122) 0x4242e7 IMUL %R14,%RSI |
(122) 0x4242eb ADD 0x1d0(%RSP),%RSI |
(122) 0x4242f3 MOV %RSI,0x108(%RSP) |
(122) 0x4242fb MOV 0xa8(%RSP),%R15 |
(122) 0x424303 IMUL %R14,%R15 |
(122) 0x424307 ADD 0x1c8(%RSP),%R15 |
(122) 0x42430f MOV 0x20(%RSP),%RSI |
(122) 0x424314 IMUL %RSI,%R11 |
(122) 0x424318 ADD 0x240(%RSP),%R11 |
(122) 0x424320 MOV %R11,%R10 |
(122) 0x424323 IMUL %RSI,%R14 |
(122) 0x424327 ADD 0x240(%RSP),%R14 |
(122) 0x42432f MOV %R14,%R11 |
(122) 0x424332 XOR %R14D,%R14D |
(122) 0x424335 NOPW %CS:(%RAX,%RAX,1) |
(123) 0x424340 VMOVUPD -0x8(%RAX,%R14,8),%ZMM1 |
(123) 0x42434b VMOVUPD (%RAX,%R14,8),%ZMM2 |
(123) 0x424352 VADDPD -0x8(%R13,%R14,8),%ZMM1,%ZMM1 |
(123) 0x42435d VADDPD -0x8(%RBX,%R14,8),%ZMM1,%ZMM1 |
(123) 0x424368 VADDPD -0x8(%R12,%R14,8),%ZMM1,%ZMM1 |
(123) 0x424373 VMULPD -0x8(%R8,%R14,8),%ZMM0,%ZMM3 |
(123) 0x42437e VADDPD (%R13,%R14,8),%ZMM2,%ZMM2 |
(123) 0x424386 VADDPD (%RBX,%R14,8),%ZMM2,%ZMM2 |
(123) 0x42438d VADDPD (%R12,%R14,8),%ZMM2,%ZMM2 |
(123) 0x424394 VMULPD (%R8,%R14,8),%ZMM0,%ZMM4 |
(123) 0x42439b VMOVUPD (%RDI,%R14,8),%ZMM5 |
(123) 0x4243a2 VADDPD -0x8(%RDI,%R14,8),%ZMM5,%ZMM5 |
(123) 0x4243ad VADDPD -0x8(%R9,%R14,8),%ZMM5,%ZMM5 |
(123) 0x4243b8 VADDPD (%R9,%R14,8),%ZMM5,%ZMM5 |
(123) 0x4243bf VMULPD (%R11,%R14,8),%ZMM0,%ZMM6 |
(123) 0x4243c6 VMULPD %ZMM5,%ZMM6,%ZMM5 |
(123) 0x4243cc VFMADD231PD %ZMM3,%ZMM1,%ZMM5 |
(123) 0x4243d2 VMOVUPD (%RDX,%R14,8),%ZMM1 |
(123) 0x4243d9 VADDPD -0x8(%RDX,%R14,8),%ZMM1,%ZMM1 |
(123) 0x4243e4 VADDPD -0x8(%RCX,%R14,8),%ZMM1,%ZMM1 |
(123) 0x4243ef VADDPD (%RCX,%R14,8),%ZMM1,%ZMM1 |
(123) 0x4243f6 VMULPD (%R10,%R14,8),%ZMM0,%ZMM3 |
(123) 0x4243fd VFNMADD231PD %ZMM4,%ZMM2,%ZMM5 |
(123) 0x424403 VFMSUB213PD %ZMM5,%ZMM1,%ZMM3 |
(123) 0x424409 VMOVUPD (%R15,%R14,8),%ZMM1 |
(123) 0x424410 MOV 0xd8(%RSP),%RSI |
(123) 0x424418 VMOVUPD (%RSI,%R14,8),%ZMM2 |
(123) 0x42441f MOV 0xe0(%RSP),%RSI |
(123) 0x424427 VADDPD (%RSI,%R14,8),%ZMM2,%ZMM2 |
(123) 0x42442e VMULPD %ZMM2,%ZMM3,%ZMM2 |
(123) 0x424434 MOV 0x108(%RSP),%RSI |
(123) 0x42443c VMULPD (%RSI,%R14,8),%ZMM1,%ZMM4 |
(123) 0x424443 VDIVPD %ZMM4,%ZMM2,%ZMM2 |
(123) 0x424449 VADDPD %ZMM1,%ZMM3,%ZMM1 |
(123) 0x42444f MOV 0xe8(%RSP),%RSI |
(123) 0x424457 VMOVUPD (%RSI,%R14,8),%ZMM3 |
(123) 0x42445e VSUBPD %ZMM2,%ZMM3,%ZMM2 |
(123) 0x424464 VDIVPD %ZMM1,%ZMM4,%ZMM1 |
(123) 0x42446a MOV 0x110(%RSP),%RSI |
(123) 0x424472 VMOVUPD %ZMM2,(%RSI,%R14,8) |
(123) 0x424479 MOV 0x118(%RSP),%RSI |
(123) 0x424481 VMOVUPD %ZMM1,(%RSI,%R14,8) |
(123) 0x424488 ADD $0x8,%R14 |
(123) 0x42448c CMP 0x10(%RSP),%R14 |
(123) 0x424491 JB 424340 |
(122) 0x424497 MOV 0x10(%RSP),%RAX |
(122) 0x42449c MOV %RAX,%R11 |
(122) 0x42449f CMP 0x238(%RSP),%RAX |
(122) 0x4244a7 MOV 0x40(%RSP),%EDX |
(122) 0x4244ab MOV 0xd0(%RSP),%R14D |
(122) 0x4244b3 MOV 0xb0(%RSP),%R10 |
(122) 0x4244bb MOV 0xa8(%RSP),%R12 |
(122) 0x4244c3 MOV 0x20(%RSP),%R9 |
(122) 0x4244c8 MOV 0x7c0(%RSP),%RSI |
(122) 0x4244d0 MOV 0x780(%RSP),%RDI |
(122) 0x4244d8 MOV 0x740(%RSP),%RBX |
(122) 0x4244e0 MOV 0xa0(%RSP),%R8 |
(122) 0x4244e8 JE 424080 |
(122) 0x4244ee JMP 42450e |
0x4244f0 NOPW %CS:(%RAX,%RAX,1) |
0x4244ff NOP |
(122) 0x424500 XOR %R11D,%R11D |
(122) 0x424503 MOV %R14D,%EDX |
(122) 0x424506 MOV %R9D,%R14D |
(122) 0x424509 MOV 0x20(%RSP),%R9 |
(122) 0x42450e VPBROADCASTQ %R11,%ZMM0 |
(122) 0x424514 VMOVDQA64 0x840(%RSP),%ZMM1 |
(122) 0x42451c VPSUBQ %ZMM0,%ZMM1,%ZMM0 |
(122) 0x424522 VPCMPNLEUQ 0xe2e53(%RIP),%ZMM0,%K1 |
(122) 0x42452d KORTESTB %K1,%K1 |
(122) 0x424531 JE 424080 |
(122) 0x424537 MOV 0x1c0(%RSP),%RAX |
(122) 0x42453f MOV 0x28(%RSP),%R13 |
(122) 0x424544 ADD %R13D,%EAX |
(122) 0x424547 MOV %RBX,%R14 |
(122) 0x42454a MOV %RSI,%R13 |
(122) 0x42454d MOVSXD %EAX,%RSI |
(122) 0x424550 SUB 0x1b0(%RSP),%RSI |
(122) 0x424558 MOV %R9,%RBX |
(122) 0x42455b MOV %R10,%R9 |
(122) 0x42455e LEA 0x1(%RSI),%R15 |
(122) 0x424562 MOV %R8,%RAX |
(122) 0x424565 IMUL %R15,%RAX |
(122) 0x424569 MOV 0x48(%RSP),%RDX |
(122) 0x42456e ADD %RDX,%RAX |
(122) 0x424571 ADD 0x1a8(%RSP),%R11 |
(122) 0x424579 SUB 0x1b8(%RSP),%R11 |
(122) 0x424581 VMOVUPD (%RAX,%R11,8),%ZMM29{%K1}{z} |
(122) 0x424588 VMOVUPD 0x8(%RAX,%R11,8),%ZMM30{%K1}{z} |
(122) 0x424593 IMUL %RSI,%R8 |
(122) 0x424597 ADD %RDX,%R8 |
(122) 0x42459a VMOVUPD (%R8,%R11,8),%ZMM0{%K1}{z} |
(122) 0x4245a1 VMOVUPD 0x8(%R8,%R11,8),%ZMM31{%K1}{z} |
(122) 0x4245ac MOV %R14,%RAX |
(122) 0x4245af IMUL %RSI,%RAX |
(122) 0x4245b3 MOV 0x140(%RSP),%RDX |
(122) 0x4245bb ADD %RDX,%RAX |
(122) 0x4245be VMOVUPD (%RAX,%R11,8),%ZMM4{%K1}{z} |
(122) 0x4245c5 VMOVUPD 0x8(%RAX,%R11,8),%ZMM2{%K1}{z} |
(122) 0x4245d0 IMUL %R15,%R14 |
(122) 0x4245d4 ADD %RDX,%R14 |
(122) 0x4245d7 VMOVUPD (%R14,%R11,8),%ZMM5{%K1}{z} |
(122) 0x4245de VMOVUPD 0x8(%R14,%R11,8),%ZMM1{%K1}{z} |
(122) 0x4245e9 MOV 0xd0(%RSP),%R14D |
(122) 0x4245f1 IMUL %RSI,%RDI |
(122) 0x4245f5 ADD 0x90(%RSP),%RDI |
(122) 0x4245fd VMOVUPD (%RDI,%R11,8),%ZMM6{%K1}{z} |
(122) 0x424604 VMOVUPD 0x8(%RDI,%R11,8),%ZMM3{%K1}{z} |
(122) 0x42460f MOV %R13,%RAX |
(122) 0x424612 IMUL %RSI,%RAX |
(122) 0x424616 MOV 0x98(%RSP),%RDX |
(122) 0x42461e ADD %RDX,%RAX |
(122) 0x424621 VMOVUPD 0x8(%RAX,%R11,8),%ZMM23{%K1}{z} |
(122) 0x42462c VMOVUPD (%RAX,%R11,8),%ZMM9{%K1}{z} |
(122) 0x424633 MOV 0x800(%RSP),%R8 |
(122) 0x42463b MOV %R8,%RAX |
(122) 0x42463e IMUL %RSI,%RAX |
(122) 0x424642 MOV 0x138(%RSP),%R10 |
(122) 0x42464a ADD %R10,%RAX |
(122) 0x42464d VMOVUPD (%RAX,%R11,8),%ZMM10{%K1}{z} |
(122) 0x424654 VMOVUPD 0x8(%RAX,%R11,8),%ZMM11{%K1}{z} |
(122) 0x42465f MOV %RBX,%RAX |
(122) 0x424662 IMUL %RSI,%RAX |
(122) 0x424666 MOV %RBX,%RDI |
(122) 0x424669 MOV 0x88(%RSP),%RCX |
(122) 0x424671 ADD %RCX,%RAX |
(122) 0x424674 VMOVUPD (%RAX,%R11,8),%ZMM12{%K1}{z} |
(122) 0x42467b IMUL %R15,%R13 |
(122) 0x42467f ADD %RDX,%R13 |
(122) 0x424682 MOV 0x40(%RSP),%EDX |
(122) 0x424686 VMOVUPD 0x8(%R13,%R11,8),%ZMM13{%K1}{z} |
(122) 0x424691 VMOVUPD (%R13,%R11,8),%ZMM14{%K1}{z} |
(122) 0x424699 IMUL %R15,%R8 |
(122) 0x42469d ADD %R10,%R8 |
(122) 0x4246a0 VMOVUPD (%R8,%R11,8),%ZMM15{%K1}{z} |
(122) 0x4246a7 VMOVUPD 0x8(%R8,%R11,8),%ZMM16{%K1}{z} |
(122) 0x4246b2 IMUL %R15,%RDI |
(122) 0x4246b6 ADD %RCX,%RDI |
(122) 0x4246b9 VMOVUPD (%RDI,%R11,8),%ZMM17{%K1}{z} |
(122) 0x4246c0 IMUL %RSI,%R12 |
(122) 0x4246c4 ADD 0x80(%RSP),%R12 |
(122) 0x4246cc VMOVUPD (%R12,%R11,8),%ZMM18{%K1}{z} |
(122) 0x4246d3 MOV 0xb8(%RSP),%RAX |
(122) 0x4246db IMUL %RSI,%RAX |
(122) 0x4246df ADD 0x78(%RSP),%RAX |
(122) 0x4246e4 VMOVUPD (%RAX,%R11,8),%ZMM19{%K1}{z} |
(122) 0x4246eb MOV 0xc0(%RSP),%RAX |
(122) 0x4246f3 IMUL %RSI,%RAX |
(122) 0x4246f7 ADD 0x50(%RSP),%RAX |
(122) 0x4246fc VMOVUPD (%RAX,%R11,8),%ZMM20{%K1}{z} |
(122) 0x424703 IMUL %RSI,%R9 |
(122) 0x424707 ADD 0x58(%RSP),%R9 |
(122) 0x42470c VMOVUPD (%R9,%R11,8),%ZMM21{%K1}{z} |
(122) 0x424713 MOV 0x18(%RSP),%RAX |
(122) 0x424718 IMUL %RSI,%RAX |
(122) 0x42471c ADD 0x68(%RSP),%RAX |
(122) 0x424721 VMOVUPD (%RAX,%R11,8),%ZMM22{%K1}{z} |
(122) 0x424728 VMOVAPD %ZMM29,%ZMM27{%K1} |
(122) 0x42472e VMOVAPD %ZMM0,%ZMM26{%K1} |
(122) 0x424734 VMOVAPD %ZMM4,%ZMM25{%K1} |
(122) 0x42473a VADDPD %ZMM26,%ZMM27,%ZMM0 |
(122) 0x424740 VMOVAPD %ZMM5,%ZMM24{%K1} |
(122) 0x424746 VADDPD %ZMM24,%ZMM25,%ZMM4 |
(122) 0x42474c VADDPD %ZMM4,%ZMM0,%ZMM0 |
(122) 0x424752 VMOVAPD 0x880(%RSP),%ZMM29 |
(122) 0x42475a VMOVAPD %ZMM6,%ZMM29{%K1} |
(122) 0x424760 VMOVAPD 0x340(%RSP),%ZMM5 |
(122) 0x424768 VMOVAPD %ZMM23,%ZMM5{%K1} |
(122) 0x42476e VMOVAPD 0x380(%RSP),%ZMM4 |
(122) 0x424776 VMOVAPD %ZMM9,%ZMM4{%K1} |
(122) 0x42477c VMOVAPD 0x3c0(%RSP),%ZMM6 |
(122) 0x424784 VMOVAPD %ZMM10,%ZMM6{%K1} |
(122) 0x42478a VMOVAPD %ZMM4,0x380(%RSP) |
(122) 0x424792 VMOVAPD %ZMM5,0x340(%RSP) |
(122) 0x42479a VADDPD %ZMM4,%ZMM5,%ZMM4 |
(122) 0x4247a0 VMOVAPD 0x400(%RSP),%ZMM5 |
(122) 0x4247a8 VMOVAPD %ZMM11,%ZMM5{%K1} |
(122) 0x4247ae VMOVAPD %ZMM5,0x400(%RSP) |
(122) 0x4247b6 VMOVAPD %ZMM6,0x3c0(%RSP) |
(122) 0x4247be VADDPD %ZMM5,%ZMM6,%ZMM5 |
(122) 0x4247c4 VADDPD %ZMM5,%ZMM4,%ZMM4 |
(122) 0x4247ca VBROADCASTSD %XMM28,%ZMM5 |
(122) 0x4247d0 VMOVAPD 0x440(%RSP),%ZMM6 |
(122) 0x4247d8 VMOVAPD %ZMM12,%ZMM6{%K1} |
(122) 0x4247de VMOVAPD %ZMM6,0x440(%RSP) |
(122) 0x4247e6 VMULPD %ZMM6,%ZMM5,%ZMM6 |
(122) 0x4247ec VMULPD %ZMM4,%ZMM6,%ZMM4 |
(122) 0x4247f2 VMOVAPD %ZMM29,0x880(%RSP) |
(122) 0x4247fa VMULPD %ZMM29,%ZMM5,%ZMM6 |
(122) 0x424800 VFMADD231PD %ZMM6,%ZMM0,%ZMM4 |
(122) 0x424806 VMOVAPD 0x8c0(%RSP),%ZMM9 |
(122) 0x42480e VMOVAPD %ZMM30,%ZMM9{%K1} |
(122) 0x424814 VMOVAPD 0x900(%RSP),%ZMM0 |
(122) 0x42481c VMOVAPD %ZMM31,%ZMM0{%K1} |
(122) 0x424822 VMOVAPD 0x280(%RSP),%ZMM6 |
(122) 0x42482a VMOVAPD %ZMM2,%ZMM6{%K1} |
(122) 0x424830 VMOVAPD %ZMM0,0x900(%RSP) |
(122) 0x424838 VMOVAPD %ZMM9,0x8c0(%RSP) |
(122) 0x424840 VADDPD %ZMM0,%ZMM9,%ZMM0 |
(122) 0x424846 VMOVAPD 0x2c0(%RSP),%ZMM2 |
(122) 0x42484e VMOVAPD %ZMM1,%ZMM2{%K1} |
(122) 0x424854 VMOVAPD %ZMM2,0x2c0(%RSP) |
(122) 0x42485c VMOVAPD %ZMM6,0x280(%RSP) |
(122) 0x424864 VADDPD %ZMM2,%ZMM6,%ZMM1 |
(122) 0x42486a VADDPD %ZMM1,%ZMM0,%ZMM0 |
(122) 0x424870 VMOVAPD 0x300(%RSP),%ZMM1 |
(122) 0x424878 VMOVAPD %ZMM3,%ZMM1{%K1} |
(122) 0x42487e VMOVAPD %ZMM1,0x300(%RSP) |
(122) 0x424886 VMULPD %ZMM1,%ZMM5,%ZMM1 |
(122) 0x42488c VFNMADD231PD %ZMM1,%ZMM0,%ZMM4 |
(122) 0x424892 VMOVAPD 0x480(%RSP),%ZMM1 |
(122) 0x42489a VMOVAPD %ZMM13,%ZMM1{%K1} |
(122) 0x4248a0 VMOVAPD 0x4c0(%RSP),%ZMM0 |
(122) 0x4248a8 VMOVAPD %ZMM14,%ZMM0{%K1} |
(122) 0x4248ae VMOVAPD 0x500(%RSP),%ZMM2 |
(122) 0x4248b6 VMOVAPD %ZMM15,%ZMM2{%K1} |
(122) 0x4248bc VMOVAPD %ZMM0,0x4c0(%RSP) |
(122) 0x4248c4 VMOVAPD %ZMM1,0x480(%RSP) |
(122) 0x4248cc VADDPD %ZMM0,%ZMM1,%ZMM0 |
(122) 0x4248d2 VMOVAPD 0x540(%RSP),%ZMM1 |
(122) 0x4248da VMOVAPD %ZMM16,%ZMM1{%K1} |
(122) 0x4248e0 VMOVAPD %ZMM1,0x540(%RSP) |
(122) 0x4248e8 VMOVAPD %ZMM2,0x500(%RSP) |
(122) 0x4248f0 VADDPD %ZMM1,%ZMM2,%ZMM1 |
(122) 0x4248f6 VADDPD %ZMM1,%ZMM0,%ZMM0 |
(122) 0x4248fc VMOVAPD 0x580(%RSP),%ZMM1 |
(122) 0x424904 VMOVAPD %ZMM17,%ZMM1{%K1} |
(122) 0x42490a VMOVAPD %ZMM1,0x580(%RSP) |
(122) 0x424912 VMULPD %ZMM1,%ZMM5,%ZMM1 |
(122) 0x424918 VFMSUB213PD %ZMM4,%ZMM0,%ZMM1 |
(122) 0x42491e VMOVAPD %ZMM18,%ZMM7{%K1} |
(122) 0x424924 VMOVAPD 0x5c0(%RSP),%ZMM3 |
(122) 0x42492c VMOVAPD %ZMM19,%ZMM3{%K1} |
(122) 0x424932 VMOVAPD 0x600(%RSP),%ZMM2 |
(122) 0x42493a VMOVAPD %ZMM20,%ZMM2{%K1} |
(122) 0x424940 VMOVAPD 0x640(%RSP),%ZMM0 |
(122) 0x424948 VMOVAPD %ZMM21,%ZMM0{%K1} |
(122) 0x42494e VMOVAPD %ZMM0,0x640(%RSP) |
(122) 0x424956 VMOVAPD %ZMM2,0x600(%RSP) |
(122) 0x42495e VADDPD %ZMM0,%ZMM2,%ZMM0 |
(122) 0x424964 VMULPD %ZMM0,%ZMM1,%ZMM0 |
(122) 0x42496a VMOVAPD %ZMM3,0x5c0(%RSP) |
(122) 0x424972 VMULPD %ZMM3,%ZMM7,%ZMM2 |
(122) 0x424978 VDIVPD %ZMM2,%ZMM0,%ZMM0 |
(122) 0x42497e VMOVAPD 0x680(%RSP),%ZMM3 |
(122) 0x424986 VMOVAPD %ZMM22,%ZMM3{%K1} |
(122) 0x42498c VMOVAPD %ZMM3,0x680(%RSP) |
(122) 0x424994 VSUBPD %ZMM0,%ZMM3,%ZMM0 |
(122) 0x42499a MOV 0xc8(%RSP),%RAX |
(122) 0x4249a2 IMUL %RSI,%RAX |
(122) 0x4249a6 ADD 0x60(%RSP),%RAX |
(122) 0x4249ab VMOVUPD %ZMM0,(%RAX,%R11,8){%K1} |
(122) 0x4249b2 MOV 0xf8(%RSP),%RAX |
(122) 0x4249ba IMUL %RSI,%RAX |
(122) 0x4249be VADDPD %ZMM7,%ZMM1,%ZMM0 |
(122) 0x4249c4 VDIVPD %ZMM0,%ZMM2,%ZMM0 |
(122) 0x4249ca ADD 0x70(%RSP),%RAX |
(122) 0x4249cf VMOVUPD %ZMM0,(%RAX,%R11,8){%K1} |
(122) 0x4249d6 JMP 424080 |
0x4249db NOPW %CS:(%RAX,%RAX,1) |
0x4249ea NOPW %CS:(%RAX,%RAX,1) |
0x4249f9 NOPL (%RAX) |
0x424a00 MOV %RAX,%R10 |
0x424a03 MOV %R13,%RSI |
0x424a06 SAL $0x20,%RSI |
0x424a0a MOV $-0x200000000,%R8 |
0x424a14 LEA (%RSI,%R8,1),%RDX |
0x424a18 MOV %RDX,%RCX |
0x424a1b SAR $0x20,%RCX |
0x424a1f MOV %RCX,0x340(%RSP) |
0x424a27 MOV %R12,%RCX |
0x424a2a SAL $0x20,%RCX |
0x424a2e ADD %RCX,%R8 |
0x424a31 MOV %R8,%R12 |
0x424a34 SAR $0x20,%R12 |
0x424a38 ADD %EBX,%R10D |
0x424a3b MOVSXD (%R15),%RBX |
0x424a3e MOV (%R14),%EAX |
0x424a41 SUB %EBX,%EAX |
0x424a43 MOV %RAX,0x28(%RSP) |
0x424a48 LEA 0x1(%RAX),%EDI |
0x424a4b CMP $0x2,%EDI |
0x424a4e MOV $0x1,%R15D |
0x424a54 CMOVGE %EDI,%R15D |
0x424a58 MOV %R15D,%EAX |
0x424a5b AND $0x7ffffff8,%EAX |
0x424a60 MOV %RAX,0x10(%RSP) |
0x424a65 TEST %RDX,%RDX |
0x424a68 MOV $-0x1,%RDI |
0x424a6f CMOVNS %RDX,%RDI |
0x424a73 TEST %RDI,%RDI |
0x424a76 MOV $0x1,%R11D |
0x424a7c CMOVG %R11,%RDI |
0x424a80 MOV $0x200000000,%RAX |
0x424a8a MOV %RAX,%R9 |
0x424a8d SUB %RSI,%R9 |
0x424a90 MOV %R15,0x40(%RSP) |
0x424a95 VPBROADCASTQ %R15,%ZMM0 |
0x424a9b VMOVDQA64 %ZMM0,0x6c0(%RSP) |
0x424aa3 CMP %R9,%RDX |
0x424aa6 CMOVG %RDX,%R9 |
0x424aaa MOV %RBX,0x2c0(%RSP) |
0x424ab2 LEA (,%RBX,8),%RBX |
0x424aba SHR $0x20,%R9 |
0x424abe IMUL %RDI,%R9 |
0x424ac2 MOV $-0x1,%RDX |
0x424ac9 SAL $0x3,%R9 |
0x424acd SUB %R9,%RBX |
0x424ad0 MOV $0x1,%ESI |
0x424ad5 MOV %R12,0x300(%RSP) |
0x424add SUB %R12,%RSI |
0x424ae0 MOV %RSI,0x640(%RSP) |
0x424ae8 TEST %R8,%R8 |
0x424aeb CMOVNS %R8,%RDX |
0x424aef TEST %RDX,%RDX |
0x424af2 CMOVG %R11,%RDX |
0x424af6 MOV 0x98(%RSP),%RSI |
0x424afe LEA 0x8(%RSI,%RBX,1),%RSI |
0x424b03 MOV %RSI,0x600(%RSP) |
0x424b0b SUB %RCX,%RAX |
0x424b0e CMP %RAX,%R8 |
0x424b11 CMOVG %R8,%RAX |
0x424b15 SHR $0x20,%RAX |
0x424b19 IMUL %RDX,%RAX |
0x424b1d NEG %RAX |
0x424b20 MOV %RAX,0x680(%RSP) |
0x424b28 MOV 0x90(%RSP),%RAX |
0x424b30 LEA 0x8(%RAX,%RBX,1),%RAX |
0x424b35 MOV %RAX,0x5c0(%RSP) |
0x424b3d MOV 0x48(%RSP),%RAX |
0x424b42 LEA 0x8(%RAX,%RBX,1),%RAX |
0x424b47 MOV %RAX,0x580(%RSP) |
0x424b4f MOV 0x70(%RSP),%RAX |
0x424b54 ADD %RBX,%RAX |
0x424b57 MOV %RAX,0x540(%RSP) |
0x424b5f MOV 0x60(%RSP),%RAX |
0x424b64 LEA (%RAX,%RBX,1),%RAX |
0x424b68 MOV %RAX,0x500(%RSP) |
0x424b70 MOV 0x68(%RSP),%RAX |
0x424b75 LEA (%RAX,%RBX,1),%RAX |
0x424b79 MOV %RAX,0x4c0(%RSP) |
0x424b81 MOV 0x58(%RSP),%RAX |
0x424b86 LEA (%RAX,%RBX,1),%RAX |
0x424b8a MOV %RAX,0x480(%RSP) |
0x424b92 MOV 0x50(%RSP),%RAX |
0x424b97 ADD %RBX,%RAX |
0x424b9a MOV %RAX,0x440(%RSP) |
0x424ba2 MOV 0x78(%RSP),%RAX |
0x424ba7 ADD %RBX,%RAX |
0x424baa MOV %RAX,0x400(%RSP) |
0x424bb2 MOV 0x80(%RSP),%RAX |
0x424bba ADD %RBX,%RAX |
0x424bbd MOV %RAX,0x3c0(%RSP) |
0x424bc5 ADD 0x88(%RSP),%RBX |
0x424bcd MOV %RBX,0x18(%RSP) |
0x424bd2 VMOVSD 0xe276e(%RIP),%XMM6 |
0x424bda XOR %R8D,%R8D |
0x424bdd MOV %R10,0x380(%RSP) |
0x424be5 MOV %R10D,%R13D |
0x424be8 JMP 424c18 |
0x424bea NOPW %CS:(%RAX,%RAX,1) |
0x424bf9 NOPL (%RAX) |
(120) 0x424c00 LEA 0x1(%R8),%EAX |
(120) 0x424c04 INC %R13D |
(120) 0x424c07 CMP 0x108(%RSP),%R8D |
(120) 0x424c0f MOV %EAX,%R8D |
(120) 0x424c12 JE 423dd1 |
(120) 0x424c18 CMPL $0,0x28(%RSP) |
(120) 0x424c1d JS 424c00 |
(120) 0x424c1f MOV 0x150(%RSP),%RAX |
(120) 0x424c27 MOV (%RAX),%R9 |
(120) 0x424c2a MOV 0x158(%RSP),%RAX |
(120) 0x424c32 MOV (%RAX),%R11 |
(120) 0x424c35 MOV 0x148(%RSP),%RAX |
(120) 0x424c3d VMULSD (%RAX),%XMM6,%XMM20 |
(120) 0x424c43 MOV 0x160(%RSP),%RAX |
(120) 0x424c4b MOV (%RAX),%R12 |
(120) 0x424c4e MOV 0x168(%RSP),%RAX |
(120) 0x424c56 MOV (%RAX),%RBX |
(120) 0x424c59 MOV 0x170(%RSP),%RAX |
(120) 0x424c61 MOV (%RAX),%R10 |
(120) 0x424c64 MOV 0x178(%RSP),%RAX |
(120) 0x424c6c MOV (%RAX),%RDI |
(120) 0x424c6f MOV 0x180(%RSP),%RAX |
(120) 0x424c77 MOV (%RAX),%RSI |
(120) 0x424c7a MOV 0x188(%RSP),%RAX |
(120) 0x424c82 MOV (%RAX),%RCX |
(120) 0x424c85 MOV 0x190(%RSP),%RAX |
(120) 0x424c8d MOV (%RAX),%RDX |
(120) 0x424c90 MOV 0x198(%RSP),%RAX |
(120) 0x424c98 MOV (%RAX),%R14 |
(120) 0x424c9b MOV 0x1a0(%RSP),%RAX |
(120) 0x424ca3 MOV (%RAX),%R15 |
(120) 0x424ca6 CMPQ $0,0x10(%RSP) |
(120) 0x424cac MOV %R15,0x20(%RSP) |
(120) 0x424cb1 MOV %RCX,0xe8(%RSP) |
(120) 0x424cb9 MOV %RSI,0xe0(%RSP) |
(120) 0x424cc1 MOV %R10,0xd8(%RSP) |
(120) 0x424cc9 MOV %R9,0xd0(%RSP) |
(120) 0x424cd1 MOV %R11,0xc8(%RSP) |
(120) 0x424cd9 JE 424f80 |
(120) 0x424cdf MOV %R8,0xb8(%RSP) |
(120) 0x424ce7 MOV %R13D,0xc0(%RSP) |
(120) 0x424cef MOVSXD %R13D,%R10 |
(120) 0x424cf2 MOV 0x640(%RSP),%RAX |
(120) 0x424cfa MOV %R12,%RSI |
(120) 0x424cfd LEA (%RAX,%R10,1),%R12 |
(120) 0x424d01 ADD 0x680(%RSP),%R10 |
(120) 0x424d09 VBROADCASTSD %XMM20,%ZMM21 |
(120) 0x424d0f MOV %RBX,%R8 |
(120) 0x424d12 IMUL %R12,%R8 |
(120) 0x424d16 MOV 0x600(%RSP),%RAX |
(120) 0x424d1e ADD %RAX,%R8 |
(120) 0x424d21 MOV %RBX,0xf8(%RSP) |
(120) 0x424d29 MOV %RBX,%R13 |
(120) 0x424d2c IMUL %R10,%R13 |
(120) 0x424d30 ADD %RAX,%R13 |
(120) 0x424d33 MOV %R9,%RCX |
(120) 0x424d36 IMUL %R10,%RCX |
(120) 0x424d3a ADD 0x5c0(%RSP),%RCX |
(120) 0x424d42 MOV %RSI,%R9 |
(120) 0x424d45 MOV %R11,%RBX |
(120) 0x424d48 IMUL %R10,%RBX |
(120) 0x424d4c MOV 0x580(%RSP),%RAX |
(120) 0x424d54 ADD %RAX,%RBX |
(120) 0x424d57 IMUL %R12,%R11 |
(120) 0x424d5b ADD %RAX,%R11 |
(120) 0x424d5e IMUL %R10,%R15 |
(120) 0x424d62 ADD 0x540(%RSP),%R15 |
(120) 0x424d6a MOV %R15,0x118(%RSP) |
(120) 0x424d72 MOV %R14,0xb0(%RSP) |
(120) 0x424d7a IMUL %R10,%R14 |
(120) 0x424d7e ADD 0x500(%RSP),%R14 |
(120) 0x424d86 MOV %R14,0x110(%RSP) |
(120) 0x424d8e MOV %RDX,0xa8(%RSP) |
(120) 0x424d96 MOV %RDX,%RAX |
(120) 0x424d99 IMUL %R10,%RAX |
(120) 0x424d9d ADD 0x4c0(%RSP),%RAX |
(120) 0x424da5 MOV %RDI,0xa0(%RSP) |
(120) 0x424dad MOV %RDI,%R15 |
(120) 0x424db0 IMUL %R10,%R15 |
(120) 0x424db4 ADD 0x480(%RSP),%R15 |
(120) 0x424dbc MOV 0xe8(%RSP),%RDI |
(120) 0x424dc4 IMUL %R10,%RDI |
(120) 0x424dc8 ADD 0x440(%RSP),%RDI |
(120) 0x424dd0 MOV 0xe0(%RSP),%RDX |
(120) 0x424dd8 IMUL %R10,%RDX |
(120) 0x424ddc ADD 0x400(%RSP),%RDX |
(120) 0x424de4 MOV 0xd8(%RSP),%R14 |
(120) 0x424dec IMUL %R10,%R14 |
(120) 0x424df0 ADD 0x3c0(%RSP),%R14 |
(120) 0x424df8 IMUL %RSI,%R12 |
(120) 0x424dfc ADD 0x18(%RSP),%R12 |
(120) 0x424e01 MOV %R12,%RSI |
(120) 0x424e04 MOV %R9,0x100(%RSP) |
(120) 0x424e0c IMUL %R9,%R10 |
(120) 0x424e10 ADD 0x18(%RSP),%R10 |
(120) 0x424e15 XOR %R12D,%R12D |
(120) 0x424e18 NOPL (%RAX,%RAX,1) |
(121) 0x424e20 VMOVUPD -0x8(%R11,%R12,8),%ZMM22 |
(121) 0x424e2b VMOVUPD (%R11,%R12,8),%ZMM23 |
(121) 0x424e32 VADDPD -0x8(%RBX,%R12,8),%ZMM22,%ZMM22 |
(121) 0x424e3d VMULPD -0x8(%RCX,%R12,8),%ZMM21,%ZMM24 |
(121) 0x424e48 VADDPD (%RBX,%R12,8),%ZMM23,%ZMM23 |
(121) 0x424e4f VMULPD (%RCX,%R12,8),%ZMM21,%ZMM25 |
(121) 0x424e56 VMOVUPD (%R13,%R12,8),%ZMM26 |
(121) 0x424e5e VADDPD -0x8(%R13,%R12,8),%ZMM26,%ZMM26 |
(121) 0x424e69 VMULPD (%R10,%R12,8),%ZMM21,%ZMM27 |
(121) 0x424e70 VMULPD %ZMM26,%ZMM27,%ZMM26 |
(121) 0x424e76 VFMADD231PD %ZMM24,%ZMM22,%ZMM26 |
(121) 0x424e7c VMOVUPD (%R8,%R12,8),%ZMM22 |
(121) 0x424e83 VADDPD -0x8(%R8,%R12,8),%ZMM22,%ZMM22 |
(121) 0x424e8e VMULPD (%RSI,%R12,8),%ZMM21,%ZMM24 |
(121) 0x424e95 VFNMADD231PD %ZMM25,%ZMM23,%ZMM26 |
(121) 0x424e9b VFMSUB213PD %ZMM26,%ZMM22,%ZMM24 |
(121) 0x424ea1 VMOVUPD (%R14,%R12,8),%ZMM22 |
(121) 0x424ea8 VMOVUPD (%RDI,%R12,8),%ZMM23 |
(121) 0x424eaf VADDPD (%R15,%R12,8),%ZMM23,%ZMM23 |
(121) 0x424eb6 VMULPD %ZMM23,%ZMM24,%ZMM23 |
(121) 0x424ebc VMULPD (%RDX,%R12,8),%ZMM22,%ZMM25 |
(121) 0x424ec3 VDIVPD %ZMM25,%ZMM23,%ZMM23 |
(121) 0x424ec9 VADDPD %ZMM22,%ZMM24,%ZMM22 |
(121) 0x424ecf VMOVUPD (%RAX,%R12,8),%ZMM24 |
(121) 0x424ed6 VSUBPD %ZMM23,%ZMM24,%ZMM23 |
(121) 0x424edc VDIVPD %ZMM22,%ZMM25,%ZMM22 |
(121) 0x424ee2 MOV 0x110(%RSP),%R9 |
(121) 0x424eea VMOVUPD %ZMM23,(%R9,%R12,8) |
(121) 0x424ef1 MOV 0x118(%RSP),%R9 |
(121) 0x424ef9 VMOVUPD %ZMM22,(%R9,%R12,8) |
(121) 0x424f00 ADD $0x8,%R12 |
(121) 0x424f04 CMP 0x10(%RSP),%R12 |
(121) 0x424f09 JB 424e20 |
(120) 0x424f0f MOV 0x10(%RSP),%RAX |
(120) 0x424f14 MOV %RAX,%R10 |
(120) 0x424f17 CMP 0x40(%RSP),%RAX |
(120) 0x424f1c MOV 0xc0(%RSP),%R13D |
(120) 0x424f24 MOV 0xb8(%RSP),%R8 |
(120) 0x424f2c MOV 0xb0(%RSP),%R9 |
(120) 0x424f34 MOV 0xa8(%RSP),%RDX |
(120) 0x424f3c MOV 0xa0(%RSP),%RDI |
(120) 0x424f44 MOV 0x100(%RSP),%R11 |
(120) 0x424f4c MOV 0xf8(%RSP),%RBX |
(120) 0x424f54 JE 424c00 |
(120) 0x424f5a JMP 424f89 |
0x424f5c NOPW %CS:(%RAX,%RAX,1) |
0x424f6b NOPW %CS:(%RAX,%RAX,1) |
0x424f7a NOPW (%RAX,%RAX,1) |
(120) 0x424f80 XOR %R10D,%R10D |
(120) 0x424f83 MOV %R14,%R9 |
(120) 0x424f86 MOV %R12,%R11 |
(120) 0x424f89 VPBROADCASTQ %R10,%ZMM21 |
(120) 0x424f8f VMOVDQA64 0x6c0(%RSP),%ZMM0 |
(120) 0x424f97 VPSUBQ %ZMM21,%ZMM0,%ZMM21 |
(120) 0x424f9d VPCMPNLEUQ 0xe23d8(%RIP),%ZMM21,%K1 |
(120) 0x424fa8 KORTESTB %K1,%K1 |
(120) 0x424fac JE 424c00 |
(120) 0x424fb2 MOV 0x380(%RSP),%RAX |
(120) 0x424fba ADD %R8D,%EAX |
(120) 0x424fbd MOVSXD %EAX,%R12 |
(120) 0x424fc0 SUB 0x300(%RSP),%R12 |
(120) 0x424fc8 LEA 0x1(%R12),%R15 |
(120) 0x424fcd MOV 0xc8(%RSP),%RSI |
(120) 0x424fd5 MOV %RSI,%RAX |
(120) 0x424fd8 IMUL %R15,%RAX |
(120) 0x424fdc MOV %RBX,%R14 |
(120) 0x424fdf MOV %RDX,%RBX |
(120) 0x424fe2 MOV 0x48(%RSP),%RDX |
(120) 0x424fe7 ADD %RDX,%RAX |
(120) 0x424fea ADD 0x2c0(%RSP),%R10 |
(120) 0x424ff2 SUB 0x340(%RSP),%R10 |
(120) 0x424ffa VMOVUPD (%RAX,%R10,8),%ZMM21{%K1}{z} |
(120) 0x425001 VMOVUPD 0x8(%RAX,%R10,8),%ZMM22{%K1}{z} |
(120) 0x42500c IMUL %R12,%RSI |
(120) 0x425010 ADD %RDX,%RSI |
(120) 0x425013 VMOVUPD (%RSI,%R10,8),%ZMM25{%K1}{z} |
(120) 0x42501a VMOVUPD 0x8(%RSI,%R10,8),%ZMM23{%K1}{z} |
(120) 0x425025 MOV 0xd0(%RSP),%RAX |
(120) 0x42502d IMUL %R12,%RAX |
(120) 0x425031 ADD 0x90(%RSP),%RAX |
(120) 0x425039 VMOVUPD (%RAX,%R10,8),%ZMM26{%K1}{z} |
(120) 0x425040 VMOVUPD 0x8(%RAX,%R10,8),%ZMM24{%K1}{z} |
(120) 0x42504b MOV %R14,%RAX |
(120) 0x42504e IMUL %R12,%RAX |
(120) 0x425052 MOV 0x98(%RSP),%RDX |
(120) 0x42505a ADD %RDX,%RAX |
(120) 0x42505d VMOVUPD 0x8(%RAX,%R10,8),%ZMM27{%K1}{z} |
(120) 0x425068 VMOVUPD (%RAX,%R10,8),%ZMM28{%K1}{z} |
(120) 0x42506f MOV %R11,%RAX |
(120) 0x425072 IMUL %R12,%RAX |
(120) 0x425076 MOV 0x88(%RSP),%RSI |
(120) 0x42507e ADD %RSI,%RAX |
(120) 0x425081 VMOVUPD (%RAX,%R10,8),%ZMM29{%K1}{z} |
(120) 0x425088 IMUL %R15,%R14 |
(120) 0x42508c ADD %RDX,%R14 |
(120) 0x42508f VMOVUPD 0x8(%R14,%R10,8),%ZMM30{%K1}{z} |
(120) 0x42509a VMOVUPD (%R14,%R10,8),%ZMM31{%K1}{z} |
(120) 0x4250a1 IMUL %R15,%R11 |
(120) 0x4250a5 ADD %RSI,%R11 |
(120) 0x4250a8 VMOVUPD (%R11,%R10,8),%ZMM2{%K1}{z} |
(120) 0x4250af MOV 0xd8(%RSP),%RAX |
(120) 0x4250b7 IMUL %R12,%RAX |
(120) 0x4250bb ADD 0x80(%RSP),%RAX |
(120) 0x4250c3 VMOVUPD (%RAX,%R10,8),%ZMM1{%K1}{z} |
(120) 0x4250ca MOV 0xe0(%RSP),%RAX |
(120) 0x4250d2 IMUL %R12,%RAX |
(120) 0x4250d6 ADD 0x78(%RSP),%RAX |
(120) 0x4250db VMOVUPD (%RAX,%R10,8),%ZMM0{%K1}{z} |
(120) 0x4250e2 MOV 0xe8(%RSP),%RAX |
(120) 0x4250ea IMUL %R12,%RAX |
(120) 0x4250ee ADD 0x50(%RSP),%RAX |
(120) 0x4250f3 VMOVUPD (%RAX,%R10,8),%ZMM3{%K1}{z} |
(120) 0x4250fa IMUL %R12,%RDI |
(120) 0x4250fe ADD 0x58(%RSP),%RDI |
(120) 0x425103 VMOVUPD (%RDI,%R10,8),%ZMM4{%K1}{z} |
(120) 0x42510a IMUL %R12,%RBX |
(120) 0x42510e ADD 0x68(%RSP),%RBX |
(120) 0x425113 VMOVUPD (%RBX,%R10,8),%ZMM5{%K1}{z} |
(120) 0x42511a VMOVAPD 0x800(%RSP),%ZMM7 |
(120) 0x425122 VMOVAPD %ZMM21,%ZMM7{%K1} |
(120) 0x425128 VMOVAPD 0x240(%RSP),%ZMM21 |
(120) 0x425130 VMOVAPD %ZMM25,%ZMM21{%K1} |
(120) 0x425136 VMOVAPD 0x7c0(%RSP),%ZMM8 |
(120) 0x42513e VMOVAPD %ZMM26,%ZMM8{%K1} |
(120) 0x425144 VMOVAPD %ZMM27,%ZMM9{%K1} |
(120) 0x42514a VMOVAPD %ZMM7,0x800(%RSP) |
(120) 0x425152 VMOVAPD %ZMM21,0x240(%RSP) |
(120) 0x42515a VADDPD %ZMM21,%ZMM7,%ZMM21 |
(120) 0x425160 VBROADCASTSD %XMM20,%ZMM20 |
(120) 0x425166 VMOVAPD %ZMM28,%ZMM10{%K1} |
(120) 0x42516c VADDPD %ZMM10,%ZMM9,%ZMM25 |
(120) 0x425172 VMOVAPD %ZMM29,%ZMM11{%K1} |
(120) 0x425178 VMULPD %ZMM11,%ZMM20,%ZMM26 |
(120) 0x42517e VMULPD %ZMM25,%ZMM26,%ZMM25 |
(120) 0x425184 VMOVAPD %ZMM8,0x7c0(%RSP) |
(120) 0x42518c VMULPD %ZMM8,%ZMM20,%ZMM26 |
(120) 0x425192 VFMADD231PD %ZMM26,%ZMM21,%ZMM25 |
(120) 0x425198 VMOVAPD 0x780(%RSP),%ZMM7 |
(120) 0x4251a0 VMOVAPD %ZMM22,%ZMM7{%K1} |
(120) 0x4251a6 VMOVAPD 0x740(%RSP),%ZMM8 |
(120) 0x4251ae VMOVAPD %ZMM23,%ZMM8{%K1} |
(120) 0x4251b4 VMOVAPD %ZMM7,0x780(%RSP) |
(120) 0x4251bc VMOVAPD %ZMM8,0x740(%RSP) |
(120) 0x4251c4 VADDPD %ZMM8,%ZMM7,%ZMM21 |
(120) 0x4251ca VMOVAPD 0x700(%RSP),%ZMM7 |
(120) 0x4251d2 VMOVAPD %ZMM24,%ZMM7{%K1} |
(120) 0x4251d8 VMOVAPD %ZMM7,0x700(%RSP) |
(120) 0x4251e0 VMULPD %ZMM7,%ZMM20,%ZMM22 |
(120) 0x4251e6 VFNMADD231PD %ZMM22,%ZMM21,%ZMM25 |
(120) 0x4251ec VMOVAPD %ZMM30,%ZMM12{%K1} |
(120) 0x4251f2 VMOVAPD %ZMM31,%ZMM13{%K1} |
(120) 0x4251f8 VMOVAPD %ZMM2,%ZMM14{%K1} |
(120) 0x4251fe VADDPD %ZMM13,%ZMM12,%ZMM2 |
(120) 0x425204 VMULPD %ZMM14,%ZMM20,%ZMM20 |
(120) 0x42520a VFMSUB213PD %ZMM25,%ZMM2,%ZMM20 |
(120) 0x425210 VMOVAPD %ZMM1,%ZMM15{%K1} |
(120) 0x425216 VMOVAPD %ZMM0,%ZMM16{%K1} |
(120) 0x42521c VMOVAPD %ZMM3,%ZMM17{%K1} |
(120) 0x425222 VMOVAPD %ZMM4,%ZMM18{%K1} |
(120) 0x425228 VADDPD %ZMM18,%ZMM17,%ZMM0 |
(120) 0x42522e VMULPD %ZMM0,%ZMM20,%ZMM0 |
(120) 0x425234 VMULPD %ZMM16,%ZMM15,%ZMM1 |
(120) 0x42523a VDIVPD %ZMM1,%ZMM0,%ZMM0 |
(120) 0x425240 VMOVAPD %ZMM5,%ZMM19{%K1} |
(120) 0x425246 VSUBPD %ZMM0,%ZMM19,%ZMM0 |
(120) 0x42524c IMUL %R12,%R9 |
(120) 0x425250 ADD 0x60(%RSP),%R9 |
(120) 0x425255 VMOVUPD %ZMM0,(%R9,%R10,8){%K1} |
(120) 0x42525c MOV 0x20(%RSP),%RAX |
(120) 0x425261 IMUL %R12,%RAX |
(120) 0x425265 VADDPD %ZMM15,%ZMM20,%ZMM0 |
(120) 0x42526b VDIVPD %ZMM0,%ZMM1,%ZMM0 |
(120) 0x425271 ADD 0x70(%RSP),%RAX |
(120) 0x425276 VMOVUPD %ZMM0,(%RAX,%R10,8){%K1} |
(120) 0x42527d JMP 424c00 |
0x425282 NOPW %CS:(%RAX,%RAX,1) |
0x42528c NOPW %CS:(%RAX,%RAX,1) |
0x425296 NOPW %CS:(%RAX,%RAX,1) |
0x4252a0 NOPW %CS:(%RAX,%RAX,1) |
0x4252aa NOPW %CS:(%RAX,%RAX,1) |
0x4252b4 NOPW %CS:(%RAX,%RAX,1) |
0x4252be XCHG %AX,%AX |
Path / |
Source file and lines | PdV_kernel.f90:67-139 |
Module | exec |
nb instructions | 377 |
nb uops | 382 |
loop length | 2103 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 0 |
used zmm registers | 1 |
nb stack references | 115 |
micro-operation queue | 63.67 cycles |
front end | 63.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 24.10 | 24.00 | 26.00 | 26.00 | 51.50 | 24.00 | 23.90 | 51.50 | 51.50 | 51.50 | 24.00 | 26.00 |
cycles | 24.10 | 26.60 | 26.00 | 26.00 | 51.50 | 24.00 | 23.90 | 51.50 | 51.50 | 51.50 | 24.00 | 26.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 62.99 |
Stall cycles | 0.00 |
Front-end | 63.67 |
Dispatch | 51.50 |
Overall L1 | 63.67 |
all | 1% |
load | 0% |
store | 2% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 1% |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 1% |
load | 0% |
store | 2% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 1% |
all | 12% |
load | 3% |
store | 13% |
mul | 12% |
add-sub | 9% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 10% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 12% |
load | 8% |
store | 13% |
mul | 12% |
add-sub | 9% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 10% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x980,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R9,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xe8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x1a0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x198(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x190(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x188(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x180(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RBP),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x70(%RBP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TESTB $0x1,0x90(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 2 | 0.33 |
MOV 0xb8(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x170(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x168(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa8(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x98(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x88(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x80(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x68(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JNE 423d40 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x260> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x150(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x700(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x148(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x6c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0,0x12c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %EAX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 423ded <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x30d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RCX,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDX,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R12),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,0x34(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0x1,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x130(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x134(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x3c(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x38(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x749130,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,0x12c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R10 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 4045a0 <__kmpc_for_static_init_4@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x34(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RSP),%R12D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %EAX,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 423e40 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x360> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x749150,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x124(%RSP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 423ddd <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x2fd> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOVL $0,0x134(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %EAX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 423ded <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x30d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RCX,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R12,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RCX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,0x3c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0x1,0x130(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x138(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x13c(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x44(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x40(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x7490d0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,0x288(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 4045a0 <__kmpc_for_static_init_4@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x3c(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RSP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %EAX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ECX,0x108(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 424a00 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0xf20> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x7490f0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x280(%RSP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 404190 <__kmpc_for_static_fini@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0xf0(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R12),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x749170,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 404660 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV (%R12),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x749110,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
JMP 404660 <__kmpc_barrier@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R13,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x20,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV $-0x200000000,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 |
LEA (%RSI,%RAX,1),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAR $0x20,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RCX,0x1b8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SAL $0x20,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
ADD %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAR $0x20,%R11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
ADD %EBX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOVSXD (%R15),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R14),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %EBX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDI,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0x2,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x1,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVGE %EDI,%R15D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R15D,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $0x7ffffff8,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RDI,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RDX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV $-0x1,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVNS %RDX,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV $0x1,%R10D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVG %R10,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV $0x200000000,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 |
MOV %R13,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RSI,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15,0x238(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPBROADCASTQ %R15,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQA64 %ZMM0,0x840(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
CMP %R9,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVG %RDX,%R9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0x1a8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%RBX,8),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SHR $0x20,%R9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
IMUL %RDI,%R9 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV $-0x1,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SAL $0x3,%R9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SUB %R9,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x1,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R11,0x1b0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %R11,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RSI,0x228(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
CMOVNS %RAX,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
TEST %RDX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
CMOVG %R10,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV 0x138(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x8(%RSI,%RBX,1),%RSI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RSI,0x220(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %RCX,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x98(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x8(%RCX,%RBX,1),%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RCX,0x218(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %R13,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVG %RAX,%R13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SHR $0x20,%R13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
IMUL %RDX,%R13 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R12D,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NEG %R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R13,0x230(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x90(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x8(%RAX,%RBX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x210(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x140(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x8(%RAX,%RBX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x208(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x8(%RAX,%RBX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x200(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%RBX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,0x1f8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%RBX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,0x1f0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x68(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%RBX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,0x1e8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%RBX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,0x1e0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RBX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x1d8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RBX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x1d0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x80(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RBX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x1c8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD 0x88(%RSP),%RBX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RBX,0x240(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0xe32f5(%RIP),%XMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVQ $0,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0x1c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8D,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R12D,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 424098 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x5b8> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R13,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x20,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV $-0x200000000,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 |
LEA (%RSI,%R8,1),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAR $0x20,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RCX,0x340(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x20,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
ADD %RCX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAR $0x20,%R12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
ADD %EBX,%R10D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOVSXD (%R15),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R14),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x1(%RAX),%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP $0x2,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x1,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVGE %EDI,%R15D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R15D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $0x7ffffff8,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RAX,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RDX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV $-0x1,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVNS %RDX,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV $0x1,%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVG %R11,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV $0x200000000,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 |
MOV %RAX,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RSI,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPBROADCASTQ %R15,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQA64 %ZMM0,0x6c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
CMP %R9,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVG %RDX,%R9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0x2c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%RBX,8),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SHR $0x20,%R9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
IMUL %RDI,%R9 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV $-0x1,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SAL $0x3,%R9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SUB %R9,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x1,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R12,0x300(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %R12,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RSI,0x640(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %R8,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
CMOVNS %R8,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
TEST %RDX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
CMOVG %R11,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV 0x98(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x8(%RSI,%RBX,1),%RSI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RSI,0x600(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %RAX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVG %R8,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SHR $0x20,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
IMUL %RDX,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
NEG %RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x680(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x90(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x8(%RAX,%RBX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x5c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x8(%RAX,%RBX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x580(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RBX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x540(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%RBX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,0x500(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x68(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%RBX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,0x4c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%RBX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,0x480(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RBX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x440(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RBX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x400(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x80(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RBX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x3c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD 0x88(%RSP),%RBX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RBX,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0xe276e(%RIP),%XMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R10,0x380(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10D,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 424c18 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x1138> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | PdV_kernel.f90:67-139 |
Module | exec |
nb instructions | 377 |
nb uops | 382 |
loop length | 2103 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 0 |
used zmm registers | 1 |
nb stack references | 115 |
micro-operation queue | 63.67 cycles |
front end | 63.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 24.10 | 24.00 | 26.00 | 26.00 | 51.50 | 24.00 | 23.90 | 51.50 | 51.50 | 51.50 | 24.00 | 26.00 |
cycles | 24.10 | 26.60 | 26.00 | 26.00 | 51.50 | 24.00 | 23.90 | 51.50 | 51.50 | 51.50 | 24.00 | 26.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 62.99 |
Stall cycles | 0.00 |
Front-end | 63.67 |
Dispatch | 51.50 |
Overall L1 | 63.67 |
all | 1% |
load | 0% |
store | 2% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 1% |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 1% |
load | 0% |
store | 2% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 1% |
all | 12% |
load | 3% |
store | 13% |
mul | 12% |
add-sub | 9% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 10% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 12% |
load | 8% |
store | 13% |
mul | 12% |
add-sub | 9% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 10% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x980,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R9,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xe8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x1a0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x198(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x190(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x188(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x180(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RBP),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x70(%RBP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TESTB $0x1,0x90(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 2 | 0.33 |
MOV 0xb8(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x170(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x168(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa8(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x98(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x88(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x80(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x68(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JNE 423d40 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x260> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x150(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x700(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x148(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x6c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0,0x12c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %EAX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 423ded <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x30d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RCX,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDX,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R12),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,0x34(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0x1,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x130(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x134(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x3c(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x38(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x749130,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,0x12c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R10 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 4045a0 <__kmpc_for_static_init_4@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x34(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RSP),%R12D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %EAX,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 423e40 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x360> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x749150,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x124(%RSP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 423ddd <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x2fd> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOVL $0,0x134(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %EAX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 423ded <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x30d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RCX,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R12,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RCX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,0x3c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0x1,0x130(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x138(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x13c(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x44(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x40(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x7490d0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,0x288(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 4045a0 <__kmpc_for_static_init_4@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x3c(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RSP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %EAX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ECX,0x108(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 424a00 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0xf20> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x7490f0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x280(%RSP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 404190 <__kmpc_for_static_fini@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0xf0(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R12),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x749170,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 404660 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV (%R12),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x749110,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
JMP 404660 <__kmpc_barrier@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R13,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x20,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV $-0x200000000,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 |
LEA (%RSI,%RAX,1),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAR $0x20,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RCX,0x1b8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SAL $0x20,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
ADD %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAR $0x20,%R11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
ADD %EBX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOVSXD (%R15),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R14),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %EBX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDI,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0x2,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x1,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVGE %EDI,%R15D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R15D,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $0x7ffffff8,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RDI,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RDX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV $-0x1,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVNS %RDX,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV $0x1,%R10D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVG %R10,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV $0x200000000,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 |
MOV %R13,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RSI,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15,0x238(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPBROADCASTQ %R15,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQA64 %ZMM0,0x840(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
CMP %R9,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVG %RDX,%R9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0x1a8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%RBX,8),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SHR $0x20,%R9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
IMUL %RDI,%R9 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV $-0x1,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SAL $0x3,%R9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SUB %R9,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x1,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R11,0x1b0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %R11,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RSI,0x228(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
CMOVNS %RAX,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
TEST %RDX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
CMOVG %R10,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV 0x138(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x8(%RSI,%RBX,1),%RSI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RSI,0x220(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %RCX,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x98(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x8(%RCX,%RBX,1),%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RCX,0x218(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %R13,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVG %RAX,%R13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SHR $0x20,%R13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
IMUL %RDX,%R13 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R12D,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NEG %R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R13,0x230(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x90(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x8(%RAX,%RBX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x210(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x140(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x8(%RAX,%RBX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x208(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x8(%RAX,%RBX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x200(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%RBX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,0x1f8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%RBX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,0x1f0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x68(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%RBX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,0x1e8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%RBX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,0x1e0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RBX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x1d8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RBX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x1d0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x80(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RBX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x1c8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD 0x88(%RSP),%RBX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RBX,0x240(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0xe32f5(%RIP),%XMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVQ $0,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0x1c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8D,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R12D,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 424098 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x5b8> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R13,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x20,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV $-0x200000000,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 |
LEA (%RSI,%R8,1),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAR $0x20,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RCX,0x340(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x20,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
ADD %RCX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAR $0x20,%R12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
ADD %EBX,%R10D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOVSXD (%R15),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R14),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x1(%RAX),%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP $0x2,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x1,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVGE %EDI,%R15D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R15D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $0x7ffffff8,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RAX,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RDX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV $-0x1,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVNS %RDX,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV $0x1,%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVG %R11,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV $0x200000000,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 |
MOV %RAX,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RSI,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPBROADCASTQ %R15,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQA64 %ZMM0,0x6c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
CMP %R9,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVG %RDX,%R9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0x2c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%RBX,8),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SHR $0x20,%R9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
IMUL %RDI,%R9 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV $-0x1,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SAL $0x3,%R9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SUB %R9,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x1,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R12,0x300(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %R12,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RSI,0x640(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %R8,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
CMOVNS %R8,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
TEST %RDX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
CMOVG %R11,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV 0x98(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x8(%RSI,%RBX,1),%RSI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RSI,0x600(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %RAX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVG %R8,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SHR $0x20,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
IMUL %RDX,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
NEG %RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x680(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x90(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x8(%RAX,%RBX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x5c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x8(%RAX,%RBX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,0x580(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RBX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x540(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%RBX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,0x500(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x68(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%RBX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,0x4c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%RBX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,0x480(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RBX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x440(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RBX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x400(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x80(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RBX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x3c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD 0x88(%RSP),%RBX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RBX,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0xe276e(%RIP),%XMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R10,0x380(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10D,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 424c18 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x1138> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼pdv_kernel_.DIR.OMP.PARALLEL.2– | 12.58 | 9.46 |
▼Loop 120 - PdV_kernel.f90:69-99 - exec– | 0 | 0 |
○Loop 121 - PdV_kernel.f90:69-99 - exec | 5.79 | 4.34 |
▼Loop 122 - PdV_kernel.f90:69-135 - exec– | 0 | 0 |
○Loop 123 - PdV_kernel.f90:111-135 - exec | 6.79 | 5.1 |