Loop Id: 183 | Module: exec | Source: advec_mom_kernel.f90:81-241 [...] | Coverage: 0.01% |
---|
Loop Id: 183 | Module: exec | Source: advec_mom_kernel.f90:81-241 [...] | Coverage: 0.01% |
---|
0x430340 VPMULLQ %YMM26,%YMM1,%YMM7 |
0x430346 VPADDQ %YMM27,%YMM0,%YMM8 |
0x43034c VPADDQ %YMM7,%YMM8,%YMM7 |
0x430350 VPXOR %XMM8,%XMM8,%XMM8 |
0x430355 KMOVQ %K1,%K4 |
0x43035a VGATHERQPD (,%YMM7,1),%YMM8{%K4} |
0x430365 VANDPD %YMM10,%YMM21,%YMM7 |
0x43036b VMOVAPD %YMM8,%YMM16{%K1} |
0x430371 VMOVAPD %YMM16,0x1e0(%RSP) |
0x430379 VDIVPD %YMM16,%YMM7,%YMM7 |
0x43037f VMOVDQA32 %XMM23,%XMM22{%K2} |
0x430385 VANDPD %YMM10,%YMM28,%YMM8 |
0x43038b VANDPD %YMM10,%YMM24,%YMM16 |
0x430391 VSUBPD %YMM7,%YMM11,%YMM17 |
0x430397 VMULPD %YMM17,%YMM16,%YMM17 |
0x43039d VDIVSD %XMM25,%XMM12,%XMM18 |
0x4303a3 VBROADCASTSD %XMM18,%YMM18 |
0x4303a9 VCMPPD $0x2,%YMM16,%YMM8,%K2 |
0x4303b0 VMOVAPD %YMM8,%YMM16{%K2} |
0x4303b6 VFMADD213PD %YMM8,%YMM7,%YMM8 |
0x4303bb VPMOVSXDQ %XMM22,%YMM22 |
0x4303c1 VPSUBQ %YMM3,%YMM22,%YMM22 |
0x4303c7 VPXORD %XMM23,%XMM23,%XMM23 |
0x4303cd KMOVQ %K3,%K2 |
0x4303d2 VGATHERQPD (%R15,%YMM22,8),%YMM23{%K2} |
0x4303d9 VMOVAPD %YMM23,%YMM30{%K3} |
0x4303df VDIVPD %YMM30,%YMM8,%YMM8 |
0x4303e5 VFMADD231PD %YMM18,%YMM17,%YMM8 |
0x4303eb VMULSD %XMM14,%XMM25,%XMM17 |
0x4303f1 VBROADCASTSD %XMM17,%YMM17 |
0x4303f7 VMULPD %YMM8,%YMM17,%YMM8 |
0x4303fd VCMPPD $0x2,%YMM16,%YMM8,%K2 |
0x430404 VMOVAPD %YMM8,%YMM16{%K2} |
0x43040a VCMPPD $0x2,%YMM9,%YMM24,%K2 |
0x430411 VXORPD %YMM15,%YMM16,%YMM16{%K2} |
0x430417 VMOVAPD %YMM16,%YMM8{%K3}{z} |
0x43041d VSUBPD %YMM7,%YMM13,%YMM7 |
0x430421 VFMADD213PD %YMM19,%YMM8,%YMM7 |
0x430427 VMULPD %YMM21,%YMM7,%YMM7 |
0x43042d IMUL %R8,%RSI |
0x430431 ADD 0x128(%RSP),%RSI |
0x430439 VMOVUPD %YMM7,(%RSI,%RDX,8){%K1} |
0x430440 LEA 0x1(%R12),%RDX |
0x430445 ADD %R8,%R14 |
0x430448 ADD %RCX,%R13 |
0x43044b CMP %RAX,%R12 |
0x43044e MOV %RDX,%R12 |
0x430451 JE 42d536 |
0x430457 TEST %R9,%R9 |
0x43045a JE 4306e0 |
0x430460 VMOVAPS %YMM31,0x1c0(%RSP) |
0x430468 VMOVAPS %YMM20,0x240(%RSP) |
0x430470 VMOVAPD %YMM30,%YMM20 |
0x430476 MOV 0x10(%RSP),%RDX |
0x43047b LEA (%RDX,%R12,1),%RSI |
0x43047f DEC %RSI |
0x430482 VPBROADCASTD %ESI,%XMM25 |
0x430488 SUB %R10,%RSI |
0x43048b MOV %RCX,%R11 |
0x43048e IMUL %RSI,%R11 |
0x430492 LEA (%RBX,%R12,1),%EDX |
0x430496 LEA (%RBX,%R12,1),%R15D |
0x43049a INC %R15D |
0x43049d VPBROADCASTD %R15D,%XMM24 |
0x4304a3 LEA (%RBX,%R12,1),%R15D |
0x4304a7 ADD $-0x2,%R15D |
0x4304ab VPBROADCASTD %R15D,%XMM22 |
0x4304b1 VPBROADCASTD %EDX,%XMM23 |
0x4304b7 XOR %EDX,%EDX |
0x4304b9 MOV 0xd8(%RSP),%R15 |
0x4304c1 JMP 4305bd |
(184) 0x4304d0 VANDPD %YMM10,%YMM26,%YMM7 |
(184) 0x4304d6 VPMULLQ %YMM30,%YMM1,%YMM30 |
(184) 0x4304dc VPADDQ %YMM31,%YMM0,%YMM31 |
(184) 0x4304e2 VPADDQ %YMM30,%YMM31,%YMM30 |
(184) 0x4304e8 VPXORD %XMM31,%XMM31,%XMM31 |
(184) 0x4304ee KXNORW %K0,%K0,%K3 |
(184) 0x4304f2 VGATHERQPD (,%YMM30,1),%YMM31{%K3} |
(184) 0x4304fd VDIVPD %YMM31,%YMM7,%YMM7 |
(184) 0x430503 VPBLENDMD %XMM23,%XMM22,%XMM30{%K1} |
(184) 0x430509 VANDPD %YMM10,%YMM8,%YMM8 |
(184) 0x43050e VANDPD %YMM10,%YMM28,%YMM31 |
(184) 0x430514 VSUBPD %YMM7,%YMM11,%YMM16 |
(184) 0x43051a VMULPD %YMM16,%YMM31,%YMM16 |
(184) 0x430520 VDIVSD %XMM29,%XMM12,%XMM17 |
(184) 0x430526 VBROADCASTSD %XMM17,%YMM17 |
(184) 0x43052c VCMPPD $0x2,%YMM31,%YMM8,%K1 |
(184) 0x430533 VMOVAPD %YMM8,%YMM31{%K1} |
(184) 0x430539 VPMOVSXDQ %XMM30,%YMM30 |
(184) 0x43053f VPSUBQ %YMM3,%YMM30,%YMM30 |
(184) 0x430545 KMOVQ %K2,%K1 |
(184) 0x43054a VXORPD %XMM18,%XMM18,%XMM18 |
(184) 0x430550 VGATHERQPD (%R15,%YMM30,8),%YMM18{%K1} |
(184) 0x430557 VFMADD213PD %YMM8,%YMM7,%YMM8 |
(184) 0x43055c VDIVPD %YMM18,%YMM8,%YMM8 |
(184) 0x430562 VFMADD231PD %YMM17,%YMM16,%YMM8 |
(184) 0x430568 VMULSD %XMM14,%XMM29,%XMM16 |
(184) 0x43056e VBROADCASTSD %XMM16,%YMM16 |
(184) 0x430574 VMULPD %YMM8,%YMM16,%YMM8 |
(184) 0x43057a VCMPPD $0x2,%YMM31,%YMM8,%K1 |
(184) 0x430581 VMOVAPD %YMM8,%YMM31{%K1} |
(184) 0x430587 VCMPPD $0x2,%YMM9,%YMM28,%K1 |
(184) 0x43058e VXORPD %YMM15,%YMM31,%YMM31{%K1} |
(184) 0x430594 VMOVAPD %YMM31,%YMM8{%K2}{z} |
(184) 0x43059a VSUBPD %YMM7,%YMM13,%YMM7 |
(184) 0x43059e VFMADD213PD %YMM27,%YMM8,%YMM7 |
(184) 0x4305a4 VMULPD %YMM26,%YMM7,%YMM7 |
(184) 0x4305aa VMOVUPD %YMM7,(%R14,%RDX,8) |
(184) 0x4305b0 ADD $0x4,%RDX |
(184) 0x4305b4 CMP %R9,%RDX |
(184) 0x4305b7 JGE 4306b0 |
(184) 0x4305bd VMOVUPD (%R13,%RDX,8),%YMM26 |
(184) 0x4305c5 VCMPPD $0x1,%YMM9,%YMM26,%K1 |
(184) 0x4305cc VPBLENDMD %XMM23,%XMM25,%XMM8{%K1} |
(184) 0x4305d2 VPMOVSXDQ %XMM8,%YMM8 |
(184) 0x4305d7 VPSUBQ %YMM3,%YMM8,%YMM30 |
(184) 0x4305dd VPBROADCASTQ %RDX,%YMM8 |
(184) 0x4305e3 VPADDQ %YMM2,%YMM8,%YMM8 |
(184) 0x4305e7 VPSUBQ %YMM4,%YMM8,%YMM8 |
(184) 0x4305eb VPSLLQ $0x3,%YMM8,%YMM31 |
(184) 0x4305f2 VPMULLQ %YMM30,%YMM6,%YMM8 |
(184) 0x4305f8 VPADDQ %YMM31,%YMM5,%YMM28 |
(184) 0x4305fe VPADDQ %YMM8,%YMM28,%YMM8 |
(184) 0x430604 VXORPD %XMM27,%XMM27,%XMM27 |
(184) 0x43060a KXNORW %K0,%K0,%K2 |
(184) 0x43060e VGATHERQPD (,%YMM8,1),%YMM27{%K2} |
(184) 0x430619 VPBLENDMD %XMM24,%XMM22,%XMM8{%K1} |
(184) 0x43061f VPBLENDMD %XMM25,%XMM23,%XMM29{%K1} |
(184) 0x430625 VPMOVSXDQ %XMM8,%YMM8 |
(184) 0x43062a VPSUBQ %YMM3,%YMM8,%YMM8 |
(184) 0x43062e VPMULLQ %YMM8,%YMM6,%YMM8 |
(184) 0x430634 VPADDQ %YMM8,%YMM28,%YMM8 |
(184) 0x43063a VXORPD %XMM7,%XMM7,%XMM7 |
(184) 0x43063e KXNORW %K0,%K0,%K2 |
(184) 0x430642 VGATHERQPD (,%YMM8,1),%YMM7{%K2} |
(184) 0x43064d VPMOVSXDQ %XMM29,%YMM8 |
(184) 0x430653 VPSUBQ %YMM3,%YMM8,%YMM8 |
(184) 0x430657 VPMULLQ %YMM8,%YMM6,%YMM8 |
(184) 0x43065d VPADDQ %YMM8,%YMM28,%YMM8 |
(184) 0x430663 VPXORD %XMM28,%XMM28,%XMM28 |
(184) 0x430669 KXNORW %K0,%K0,%K2 |
(184) 0x43066d VGATHERQPD (,%YMM8,1),%YMM28{%K2} |
(184) 0x430678 VSUBPD %YMM7,%YMM27,%YMM8 |
(184) 0x43067e VSUBPD %YMM27,%YMM28,%YMM28 |
(184) 0x430684 VMULPD %YMM8,%YMM28,%YMM7 |
(184) 0x43068a VCMPPD $0x1,%YMM7,%YMM9,%K2 |
(184) 0x430691 KORTESTB %K2,%K2 |
(184) 0x430695 JE 4304d0 |
(184) 0x43069b VMOVSD (%R15,%RSI,8),%XMM29 |
(184) 0x4306a2 JMP 4304d0 |
0x4306b0 MOV %R9,%RDX |
0x4306b3 CMP %R9,0x30(%RSP) |
0x4306b8 VMOVAPD %YMM20,%YMM30 |
0x4306be VMOVAPD 0x240(%RSP),%YMM20 |
0x4306c6 VMOVAPD 0x1c0(%RSP),%YMM31 |
0x4306ce JE 430440 |
0x4306d4 JMP 43072b |
0x4306e0 MOV 0x10(%RSP),%RDX |
0x4306e5 LEA (%RDX,%R12,1),%RSI |
0x4306e9 DEC %RSI |
0x4306ec VPBROADCASTD %ESI,%XMM25 |
0x4306f2 SUB %R10,%RSI |
0x4306f5 MOV %RCX,%R11 |
0x4306f8 IMUL %RSI,%R11 |
0x4306fc LEA (%RBX,%R12,1),%EDX |
0x430700 LEA (%RBX,%R12,1),%R15D |
0x430704 INC %R15D |
0x430707 VPBROADCASTD %R15D,%XMM24 |
0x43070d LEA (%RBX,%R12,1),%R15D |
0x430711 ADD $-0x2,%R15D |
0x430715 VPBROADCASTD %R15D,%XMM22 |
0x43071b VPBROADCASTD %EDX,%XMM23 |
0x430721 XOR %EDX,%EDX |
0x430723 MOV 0xd8(%RSP),%R15 |
0x43072b VPBROADCASTQ %RDX,%YMM8 |
0x430731 VMOVDQA 0x220(%RSP),%YMM7 |
0x43073a VPSUBQ %YMM8,%YMM7,%YMM26 |
0x430740 VPCMPNLEUQ 0xc4615(%RIP),%YMM26,%K1 |
0x43074b ADD 0x60(%RSP),%R11 |
0x430750 ADD 0x50(%RSP),%RDX |
0x430755 SUB %RDI,%RDX |
0x430758 VMOVUPD (%R11,%RDX,8),%YMM26{%K1}{z} |
0x43075f VMOVAPD %YMM26,%YMM21{%K1} |
0x430765 VCMPPD $0x1,%YMM9,%YMM21,%K2 |
0x43076c VPBLENDMD %XMM25,%XMM23,%XMM28{%K2} |
0x430772 VMOVDQA32 %XMM23,%XMM25{%K2} |
0x430778 VPMOVSXDQ %XMM25,%YMM25 |
0x43077e VPSUBQ %YMM3,%YMM25,%YMM26 |
0x430784 VPADDQ %YMM2,%YMM8,%YMM8 |
0x430788 VPSUBQ %YMM4,%YMM8,%YMM8 |
0x43078c VPSLLQ $0x3,%YMM8,%YMM27 |
0x430793 VPMULLQ %YMM26,%YMM6,%YMM8 |
0x430799 VPADDQ %YMM27,%YMM5,%YMM25 |
0x43079f VPADDQ %YMM8,%YMM25,%YMM8 |
0x4307a5 VXORPD %XMM29,%XMM29,%XMM29 |
0x4307ab KMOVQ %K1,%K3 |
0x4307b0 VGATHERQPD (,%YMM8,1),%YMM29{%K3} |
0x4307bb VPBLENDMD %XMM24,%XMM22,%XMM8{%K2} |
0x4307c1 VMOVAPD %YMM29,%YMM19{%K1} |
0x4307c7 VPMOVSXDQ %XMM8,%YMM8 |
0x4307cc VPSUBQ %YMM3,%YMM8,%YMM8 |
0x4307d0 VPMULLQ %YMM8,%YMM6,%YMM8 |
0x4307d6 VPADDQ %YMM8,%YMM25,%YMM8 |
0x4307dc VPXORD %XMM24,%XMM24,%XMM24 |
0x4307e2 KMOVQ %K1,%K3 |
0x4307e7 VGATHERQPD (,%YMM8,1),%YMM24{%K3} |
0x4307f2 VMOVAPD %YMM24,%YMM31{%K1} |
0x4307f8 VPMOVSXDQ %XMM28,%YMM8 |
0x4307fe VPSUBQ %YMM3,%YMM8,%YMM8 |
0x430802 VPMULLQ %YMM8,%YMM6,%YMM8 |
0x430808 VPADDQ %YMM8,%YMM25,%YMM8 |
0x43080e VXORPD %XMM24,%XMM24,%XMM24 |
0x430814 KMOVQ %K1,%K3 |
0x430819 VGATHERQPD (,%YMM8,1),%YMM24{%K3} |
0x430824 VSUBPD %YMM31,%YMM19,%YMM28 |
0x43082a VMOVAPD %YMM24,%YMM20{%K1} |
0x430830 VSUBPD %YMM19,%YMM20,%YMM24 |
0x430836 VMULPD %YMM28,%YMM24,%YMM8 |
0x43083c VCMPPD $0x1,%YMM8,%YMM9,%K3{%K1} |
0x430843 KORTESTB %K3,%K3 |
0x430847 VMOVAPD 0x1e0(%RSP),%YMM16 |
0x43084f JE 430340 |
0x430855 VMOVSD (%R15,%RSI,8),%XMM25 |
0x43085c JMP 430340 |
/scratch_na/users/xoserete/qaas_runs/171-215-0463/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/advec_mom_kernel.f90: 81 - 241 |
-------------------------------------------------------------------------------- |
81: IF(mom_sweep.EQ.1)THEN ! x 1 |
[...] |
213: DO k=y_min-1,y_max+1 |
214: DO j=x_min,x_max+1 |
215: IF(node_flux(j,k).LT.0.0)THEN |
[...] |
227: sigma=ABS(node_flux(j,k))/(node_mass_pre(j,donor)) |
228: width=celldy(k) |
229: vdiffuw=vel1(j,donor)-vel1(j,upwind) |
230: vdiffdw=vel1(j,downwind)-vel1(j,donor) |
231: limiter=0.0 |
232: IF(vdiffuw*vdiffdw.GT.0.0)THEN |
233: auw=ABS(vdiffuw) |
234: adw=ABS(vdiffdw) |
235: wind=1.0_8 |
236: IF(vdiffdw.LE.0.0) wind=-1.0_8 |
237: limiter=wind*MIN(width*((2.0_8-sigma)*adw/width+(1.0_8+sigma)*auw/celldy(dif))/6.0_8,auw,adw) |
238: ENDIF |
239: advec_vel_s=vel1(j,donor)+(1.0_8-sigma)*limiter |
240: mom_flux(j,k)=advec_vel_s*node_flux(j,k) |
241: ENDDO |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.10 |
CQA speedup if FP arith vectorized | 1.37 |
CQA speedup if fully vectorized | 1.72 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.03 |
Bottlenecks | P0, P1, P5, |
Function | advec_mom_kernel_.DIR.OMP.PARALLEL.2 |
Source | advec_mom_kernel.f90:81-81,advec_mom_kernel.f90:213-215,advec_mom_kernel.f90:227-234,advec_mom_kernel.f90:237-240 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 31.00 |
CQA cycles if no scalar integer | 28.17 |
CQA cycles if FP arith vectorized | 22.71 |
CQA cycles if fully vectorized | 18.00 |
Front-end cycles | 30.00 |
DIV/SQRT cycles | 31.00 |
P0 cycles | 31.00 |
P1 cycles | 11.33 |
P2 cycles | 11.33 |
P3 cycles | 2.00 |
P4 cycles | 31.00 |
P5 cycles | 12.60 |
P6 cycles | 2.00 |
P7 cycles | 2.00 |
P8 cycles | 2.00 |
P9 cycles | 12.40 |
P10 cycles | 11.33 |
P11 cycles | 20.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 35.16 - 87.80 |
Stall cycles (UFS) | 7.36 - 59.95 |
Nb insns | 145.00 |
Nb uops | 180.00 |
Nb loads | 20.00 |
Nb stores | 4.00 |
Nb stack references | 10.00 |
FLOP/cycle | 2.13 |
Nb FLOP add-sub | 16.00 |
Nb FLOP mul | 17.00 |
Nb FLOP fma | 12.00 |
Nb FLOP div | 9.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 17.81 |
Bytes prefetched | 0.00 |
Bytes loaded | 424.00 |
Bytes stored | 128.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 80.61 |
Vectorization ratio load | 84.62 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 88.89 |
Vectorization ratio add_sub | 89.47 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | 66.67 |
Vectorization ratio other | 74.07 |
Vector-efficiency ratio all | 38.90 |
Vector-efficiency ratio load | 44.23 |
Vector-efficiency ratio store | 50.00 |
Vector-efficiency ratio mul | 45.83 |
Vector-efficiency ratio add_sub | 46.05 |
Vector-efficiency ratio fma | 50.00 |
Vector-efficiency ratio div_sqrt | 37.50 |
Vector-efficiency ratio other | 33.33 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.10 |
CQA speedup if FP arith vectorized | 1.37 |
CQA speedup if fully vectorized | 1.72 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.03 |
Bottlenecks | P0, P1, P5, |
Function | advec_mom_kernel_.DIR.OMP.PARALLEL.2 |
Source | advec_mom_kernel.f90:81-81,advec_mom_kernel.f90:213-215,advec_mom_kernel.f90:227-234,advec_mom_kernel.f90:237-240 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 31.00 |
CQA cycles if no scalar integer | 28.17 |
CQA cycles if FP arith vectorized | 22.71 |
CQA cycles if fully vectorized | 18.00 |
Front-end cycles | 30.00 |
DIV/SQRT cycles | 31.00 |
P0 cycles | 31.00 |
P1 cycles | 11.33 |
P2 cycles | 11.33 |
P3 cycles | 2.00 |
P4 cycles | 31.00 |
P5 cycles | 12.60 |
P6 cycles | 2.00 |
P7 cycles | 2.00 |
P8 cycles | 2.00 |
P9 cycles | 12.40 |
P10 cycles | 11.33 |
P11 cycles | 20.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 35.16 - 87.80 |
Stall cycles (UFS) | 7.36 - 59.95 |
Nb insns | 145.00 |
Nb uops | 180.00 |
Nb loads | 20.00 |
Nb stores | 4.00 |
Nb stack references | 10.00 |
FLOP/cycle | 2.13 |
Nb FLOP add-sub | 16.00 |
Nb FLOP mul | 17.00 |
Nb FLOP fma | 12.00 |
Nb FLOP div | 9.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 17.81 |
Bytes prefetched | 0.00 |
Bytes loaded | 424.00 |
Bytes stored | 128.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 80.61 |
Vectorization ratio load | 84.62 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 88.89 |
Vectorization ratio add_sub | 89.47 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | 66.67 |
Vectorization ratio other | 74.07 |
Vector-efficiency ratio all | 38.90 |
Vector-efficiency ratio load | 44.23 |
Vector-efficiency ratio store | 50.00 |
Vector-efficiency ratio mul | 45.83 |
Vector-efficiency ratio add_sub | 46.05 |
Vector-efficiency ratio fma | 50.00 |
Vector-efficiency ratio div_sqrt | 37.50 |
Vector-efficiency ratio other | 33.33 |
Path / |
Function | advec_mom_kernel_.DIR.OMP.PARALLEL.2 |
Source file and lines | advec_mom_kernel.f90:81-241 |
Module | exec |
nb instructions | 145 |
nb uops | 180 |
loop length | 813 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 11 |
used ymm registers | 30 |
used zmm registers | 0 |
nb stack references | 10 |
ADD-SUB / MUL ratio | 0.80 |
micro-operation queue | 30.00 cycles |
front end | 30.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 31.00 | 31.00 | 11.33 | 11.33 | 2.00 | 31.00 | 12.60 | 2.00 | 2.00 | 2.00 | 12.40 | 11.33 |
cycles | 31.00 | 31.00 | 11.33 | 11.33 | 2.00 | 31.00 | 12.60 | 2.00 | 2.00 | 2.00 | 12.40 | 11.33 |
Cycles executing div or sqrt instructions | 20.00 |
FE+BE cycles | 35.16-87.80 |
Stall cycles | 7.36-59.95 |
ROB full (events) | 8.27-62.92 |
Front-end | 30.00 |
Dispatch | 31.00 |
DIV/SQRT | 20.00 |
Overall L1 | 31.00 |
all | 68% |
load | 66% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 86% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 52% |
all | 90% |
load | 90% |
store | 100% |
mul | 80% |
add-sub | 100% |
fma | 100% |
div/sqrt | 66% |
other | 93% |
all | 80% |
load | 84% |
store | 100% |
mul | 88% |
add-sub | 89% |
fma | 100% |
div/sqrt | 66% |
other | 74% |
all | 31% |
load | 37% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 50% |
add-sub | 45% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 19% |
all | 45% |
load | 46% |
store | 50% |
mul | 42% |
add-sub | 50% |
fma | 50% |
div/sqrt | 37% |
other | 45% |
all | 38% |
load | 44% |
store | 50% |
mul | 45% |
add-sub | 46% |
fma | 50% |
div/sqrt | 37% |
other | 33% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VPMULLQ %YMM26,%YMM1,%YMM7 | 5 | 1.50 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPADDQ %YMM27,%YMM0,%YMM8 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPADDQ %YMM7,%YMM8,%YMM7 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPXOR %XMM8,%XMM8,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KMOVQ %K1,%K4 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
VGATHERQPD (,%YMM7,1),%YMM8{%K4} | 5 | 1 | 1 | 1.33 | 1.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
VANDPD %YMM10,%YMM21,%YMM7 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMOVAPD %YMM8,%YMM16{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VMOVAPD %YMM16,0x1e0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VDIVPD %YMM16,%YMM7,%YMM7 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
VMOVDQA32 %XMM23,%XMM22{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VANDPD %YMM10,%YMM28,%YMM8 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VANDPD %YMM10,%YMM24,%YMM16 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VSUBPD %YMM7,%YMM11,%YMM17 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %YMM17,%YMM16,%YMM17 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VDIVSD %XMM25,%XMM12,%XMM18 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 4 |
VBROADCASTSD %XMM18,%YMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VCMPPD $0x2,%YMM16,%YMM8,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM8,%YMM16{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VFMADD213PD %YMM8,%YMM7,%YMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VPMOVSXDQ %XMM22,%YMM22 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %YMM3,%YMM22,%YMM22 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VPXORD %XMM23,%XMM23,%XMM23 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
KMOVQ %K3,%K2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
VGATHERQPD (%R15,%YMM22,8),%YMM23{%K2} | 5 | 1 | 1 | 1.33 | 1.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
VMOVAPD %YMM23,%YMM30{%K3} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VDIVPD %YMM30,%YMM8,%YMM8 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
VFMADD231PD %YMM18,%YMM17,%YMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM14,%XMM25,%XMM17 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VBROADCASTSD %XMM17,%YMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMULPD %YMM8,%YMM17,%YMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPPD $0x2,%YMM16,%YMM8,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM8,%YMM16{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VCMPPD $0x2,%YMM9,%YMM24,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VXORPD %YMM15,%YMM16,%YMM16{%K2} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VMOVAPD %YMM16,%YMM8{%K3}{z} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VSUBPD %YMM7,%YMM13,%YMM7 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VFMADD213PD %YMM19,%YMM8,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %YMM21,%YMM7,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
IMUL %R8,%RSI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD 0x128(%RSP),%RSI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
VMOVUPD %YMM7,(%RSI,%RDX,8){%K1} | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
LEA 0x1(%R12),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %R8,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RCX,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %RAX,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JE 42d536 <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0xa56> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
TEST %R9,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 4306e0 <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3c00> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVAPS %YMM31,0x1c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVAPS %YMM20,0x240(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVAPD %YMM30,%YMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
MOV 0x10(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RDX,%R12,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
DEC %RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VPBROADCASTD %ESI,%XMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
SUB %R10,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %RSI,%R11 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%RBX,%R12,1),%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (%RBX,%R12,1),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
INC %R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VPBROADCASTD %R15D,%XMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%RBX,%R12,1),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD $-0x2,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VPBROADCASTD %R15D,%XMM22 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTD %EDX,%XMM23 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xd8(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4305bd <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3add> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV %R9,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %R9,0x30(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
VMOVAPD %YMM20,%YMM30 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VMOVAPD 0x240(%RSP),%YMM20 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVAPD 0x1c0(%RSP),%YMM31 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
JE 430440 <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3960> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 43072b <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3c4b> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV 0x10(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RDX,%R12,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
DEC %RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VPBROADCASTD %ESI,%XMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
SUB %R10,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %RSI,%R11 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%RBX,%R12,1),%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (%RBX,%R12,1),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
INC %R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VPBROADCASTD %R15D,%XMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%RBX,%R12,1),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD $-0x2,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VPBROADCASTD %R15D,%XMM22 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTD %EDX,%XMM23 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xd8(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RDX,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQA 0x220(%RSP),%YMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VPSUBQ %YMM8,%YMM7,%YMM26 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VPCMPNLEUQ 0xc4615(%RIP),%YMM26,%K1 | |||||||||||||||
ADD 0x60(%RSP),%R11 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
ADD 0x50(%RSP),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
SUB %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVUPD (%R11,%RDX,8),%YMM26{%K1}{z} | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVAPD %YMM26,%YMM21{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VCMPPD $0x1,%YMM9,%YMM21,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBLENDMD %XMM25,%XMM23,%XMM28{%K2} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMOVDQA32 %XMM23,%XMM25{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VPMOVSXDQ %XMM25,%YMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %YMM3,%YMM25,%YMM26 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VPADDQ %YMM2,%YMM8,%YMM8 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPSUBQ %YMM4,%YMM8,%YMM8 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VPSLLQ $0x3,%YMM8,%YMM27 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2-4 | 0.50 |
VPMULLQ %YMM26,%YMM6,%YMM8 | 5 | 1.50 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPADDQ %YMM27,%YMM5,%YMM25 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPADDQ %YMM8,%YMM25,%YMM8 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VXORPD %XMM29,%XMM29,%XMM29 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KMOVQ %K1,%K3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
VGATHERQPD (,%YMM8,1),%YMM29{%K3} | 5 | 1 | 1 | 1.33 | 1.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
VPBLENDMD %XMM24,%XMM22,%XMM8{%K2} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMOVAPD %YMM29,%YMM19{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VPMOVSXDQ %XMM8,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %YMM3,%YMM8,%YMM8 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VPMULLQ %YMM8,%YMM6,%YMM8 | 5 | 1.50 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPADDQ %YMM8,%YMM25,%YMM8 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPXORD %XMM24,%XMM24,%XMM24 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
KMOVQ %K1,%K3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
VGATHERQPD (,%YMM8,1),%YMM24{%K3} | 5 | 1 | 1 | 1.33 | 1.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
VMOVAPD %YMM24,%YMM31{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VPMOVSXDQ %XMM28,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %YMM3,%YMM8,%YMM8 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VPMULLQ %YMM8,%YMM6,%YMM8 | 5 | 1.50 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPADDQ %YMM8,%YMM25,%YMM8 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VXORPD %XMM24,%XMM24,%XMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KMOVQ %K1,%K3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
VGATHERQPD (,%YMM8,1),%YMM24{%K3} | 5 | 1 | 1 | 1.33 | 1.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
VSUBPD %YMM31,%YMM19,%YMM28 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVAPD %YMM24,%YMM20{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VSUBPD %YMM19,%YMM20,%YMM24 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %YMM28,%YMM24,%YMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPPD $0x1,%YMM8,%YMM9,%K3{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
KORTESTB %K3,%K3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
VMOVAPD 0x1e0(%RSP),%YMM16 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
JE 430340 <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3860> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVSD (%R15,%RSI,8),%XMM25 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 430340 <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3860> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
Function | advec_mom_kernel_.DIR.OMP.PARALLEL.2 |
Source file and lines | advec_mom_kernel.f90:81-241 |
Module | exec |
nb instructions | 145 |
nb uops | 180 |
loop length | 813 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 11 |
used ymm registers | 30 |
used zmm registers | 0 |
nb stack references | 10 |
ADD-SUB / MUL ratio | 0.80 |
micro-operation queue | 30.00 cycles |
front end | 30.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 31.00 | 31.00 | 11.33 | 11.33 | 2.00 | 31.00 | 12.60 | 2.00 | 2.00 | 2.00 | 12.40 | 11.33 |
cycles | 31.00 | 31.00 | 11.33 | 11.33 | 2.00 | 31.00 | 12.60 | 2.00 | 2.00 | 2.00 | 12.40 | 11.33 |
Cycles executing div or sqrt instructions | 20.00 |
FE+BE cycles | 35.16-87.80 |
Stall cycles | 7.36-59.95 |
ROB full (events) | 8.27-62.92 |
Front-end | 30.00 |
Dispatch | 31.00 |
DIV/SQRT | 20.00 |
Overall L1 | 31.00 |
all | 68% |
load | 66% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 86% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 52% |
all | 90% |
load | 90% |
store | 100% |
mul | 80% |
add-sub | 100% |
fma | 100% |
div/sqrt | 66% |
other | 93% |
all | 80% |
load | 84% |
store | 100% |
mul | 88% |
add-sub | 89% |
fma | 100% |
div/sqrt | 66% |
other | 74% |
all | 31% |
load | 37% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 50% |
add-sub | 45% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 19% |
all | 45% |
load | 46% |
store | 50% |
mul | 42% |
add-sub | 50% |
fma | 50% |
div/sqrt | 37% |
other | 45% |
all | 38% |
load | 44% |
store | 50% |
mul | 45% |
add-sub | 46% |
fma | 50% |
div/sqrt | 37% |
other | 33% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VPMULLQ %YMM26,%YMM1,%YMM7 | 5 | 1.50 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPADDQ %YMM27,%YMM0,%YMM8 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPADDQ %YMM7,%YMM8,%YMM7 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPXOR %XMM8,%XMM8,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KMOVQ %K1,%K4 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
VGATHERQPD (,%YMM7,1),%YMM8{%K4} | 5 | 1 | 1 | 1.33 | 1.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
VANDPD %YMM10,%YMM21,%YMM7 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMOVAPD %YMM8,%YMM16{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VMOVAPD %YMM16,0x1e0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VDIVPD %YMM16,%YMM7,%YMM7 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
VMOVDQA32 %XMM23,%XMM22{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VANDPD %YMM10,%YMM28,%YMM8 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VANDPD %YMM10,%YMM24,%YMM16 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VSUBPD %YMM7,%YMM11,%YMM17 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %YMM17,%YMM16,%YMM17 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VDIVSD %XMM25,%XMM12,%XMM18 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 4 |
VBROADCASTSD %XMM18,%YMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VCMPPD $0x2,%YMM16,%YMM8,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM8,%YMM16{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VFMADD213PD %YMM8,%YMM7,%YMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VPMOVSXDQ %XMM22,%YMM22 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %YMM3,%YMM22,%YMM22 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VPXORD %XMM23,%XMM23,%XMM23 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
KMOVQ %K3,%K2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
VGATHERQPD (%R15,%YMM22,8),%YMM23{%K2} | 5 | 1 | 1 | 1.33 | 1.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
VMOVAPD %YMM23,%YMM30{%K3} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VDIVPD %YMM30,%YMM8,%YMM8 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
VFMADD231PD %YMM18,%YMM17,%YMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM14,%XMM25,%XMM17 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VBROADCASTSD %XMM17,%YMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMULPD %YMM8,%YMM17,%YMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPPD $0x2,%YMM16,%YMM8,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM8,%YMM16{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VCMPPD $0x2,%YMM9,%YMM24,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VXORPD %YMM15,%YMM16,%YMM16{%K2} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VMOVAPD %YMM16,%YMM8{%K3}{z} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VSUBPD %YMM7,%YMM13,%YMM7 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VFMADD213PD %YMM19,%YMM8,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %YMM21,%YMM7,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
IMUL %R8,%RSI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD 0x128(%RSP),%RSI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
VMOVUPD %YMM7,(%RSI,%RDX,8){%K1} | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
LEA 0x1(%R12),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %R8,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RCX,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %RAX,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JE 42d536 <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0xa56> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
TEST %R9,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 4306e0 <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3c00> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVAPS %YMM31,0x1c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVAPS %YMM20,0x240(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVAPD %YMM30,%YMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
MOV 0x10(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RDX,%R12,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
DEC %RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VPBROADCASTD %ESI,%XMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
SUB %R10,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %RSI,%R11 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%RBX,%R12,1),%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (%RBX,%R12,1),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
INC %R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VPBROADCASTD %R15D,%XMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%RBX,%R12,1),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD $-0x2,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VPBROADCASTD %R15D,%XMM22 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTD %EDX,%XMM23 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xd8(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4305bd <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3add> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV %R9,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %R9,0x30(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
VMOVAPD %YMM20,%YMM30 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VMOVAPD 0x240(%RSP),%YMM20 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVAPD 0x1c0(%RSP),%YMM31 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
JE 430440 <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3960> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 43072b <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3c4b> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV 0x10(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RDX,%R12,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
DEC %RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VPBROADCASTD %ESI,%XMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
SUB %R10,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %RSI,%R11 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%RBX,%R12,1),%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (%RBX,%R12,1),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
INC %R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VPBROADCASTD %R15D,%XMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%RBX,%R12,1),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD $-0x2,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VPBROADCASTD %R15D,%XMM22 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTD %EDX,%XMM23 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xd8(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RDX,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQA 0x220(%RSP),%YMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VPSUBQ %YMM8,%YMM7,%YMM26 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VPCMPNLEUQ 0xc4615(%RIP),%YMM26,%K1 | |||||||||||||||
ADD 0x60(%RSP),%R11 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
ADD 0x50(%RSP),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
SUB %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVUPD (%R11,%RDX,8),%YMM26{%K1}{z} | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVAPD %YMM26,%YMM21{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VCMPPD $0x1,%YMM9,%YMM21,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBLENDMD %XMM25,%XMM23,%XMM28{%K2} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMOVDQA32 %XMM23,%XMM25{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VPMOVSXDQ %XMM25,%YMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %YMM3,%YMM25,%YMM26 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VPADDQ %YMM2,%YMM8,%YMM8 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPSUBQ %YMM4,%YMM8,%YMM8 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VPSLLQ $0x3,%YMM8,%YMM27 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2-4 | 0.50 |
VPMULLQ %YMM26,%YMM6,%YMM8 | 5 | 1.50 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPADDQ %YMM27,%YMM5,%YMM25 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPADDQ %YMM8,%YMM25,%YMM8 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VXORPD %XMM29,%XMM29,%XMM29 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KMOVQ %K1,%K3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
VGATHERQPD (,%YMM8,1),%YMM29{%K3} | 5 | 1 | 1 | 1.33 | 1.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
VPBLENDMD %XMM24,%XMM22,%XMM8{%K2} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMOVAPD %YMM29,%YMM19{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VPMOVSXDQ %XMM8,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %YMM3,%YMM8,%YMM8 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VPMULLQ %YMM8,%YMM6,%YMM8 | 5 | 1.50 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPADDQ %YMM8,%YMM25,%YMM8 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPXORD %XMM24,%XMM24,%XMM24 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
KMOVQ %K1,%K3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
VGATHERQPD (,%YMM8,1),%YMM24{%K3} | 5 | 1 | 1 | 1.33 | 1.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
VMOVAPD %YMM24,%YMM31{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VPMOVSXDQ %XMM28,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %YMM3,%YMM8,%YMM8 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VPMULLQ %YMM8,%YMM6,%YMM8 | 5 | 1.50 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPADDQ %YMM8,%YMM25,%YMM8 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VXORPD %XMM24,%XMM24,%XMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KMOVQ %K1,%K3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
VGATHERQPD (,%YMM8,1),%YMM24{%K3} | 5 | 1 | 1 | 1.33 | 1.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
VSUBPD %YMM31,%YMM19,%YMM28 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVAPD %YMM24,%YMM20{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VSUBPD %YMM19,%YMM20,%YMM24 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %YMM28,%YMM24,%YMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPPD $0x1,%YMM8,%YMM9,%K3{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
KORTESTB %K3,%K3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
VMOVAPD 0x1e0(%RSP),%YMM16 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
JE 430340 <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3860> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVSD (%R15,%RSI,8),%XMM25 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 430340 <advec_mom_kernel_mod_mp_advec_mom_kernel_.DIR.OMP.PARALLEL.2+0x3860> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |