Function: revert_kernel._omp_fn.0 | Module: exec | Source: revert_kernel.f90:41-48 | Coverage: 2.3% |
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Function: revert_kernel._omp_fn.0 | Module: exec | Source: revert_kernel.f90:41-48 | Coverage: 2.3% |
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/scratch_na/users/xoserete/qaas_runs/171-215-0463/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/revert_kernel.f90: 41 - 48 |
-------------------------------------------------------------------------------- |
41: !$OMP PARALLEL |
42: |
43: !$OMP DO |
44: DO k=y_min,y_max |
45: !$OMP SIMD |
46: DO j=x_min,x_max |
47: density1(j,k)=density0(j,k) |
48: energy1(j,k)=energy0(j,k) |
0x45fdc0 PUSH %RBP |
0x45fdc1 MOV %RDI,%RAX |
0x45fdc4 MOV %RSP,%RBP |
0x45fdc7 PUSH %R15 |
0x45fdc9 PUSH %R14 |
0x45fdcb PUSH %R13 |
0x45fdcd PUSH %R12 |
0x45fdcf PUSH %RBX |
0x45fdd0 AND $-0x40,%RSP |
0x45fdd4 ADD $-0x80,%RSP |
0x45fdd8 MOV 0x60(%RAX),%RDX |
0x45fddc MOV 0x50(%RAX),%RSI |
0x45fde0 MOV %RAX,0x28(%RSP) |
0x45fde5 MOV 0x48(%RAX),%RCX |
0x45fde9 MOV 0x40(%RAX),%R8 |
0x45fded MOV 0x10(%RAX),%R9 |
0x45fdf1 MOV 0x78(%RDI),%R12 |
0x45fdf5 MOV %RDX,0x48(%RSP) |
0x45fdfa MOV 0x70(%RDI),%RDI |
0x45fdfe MOV 0x68(%RAX),%R13 |
0x45fe02 MOV %RSI,0x40(%RSP) |
0x45fe07 MOV (%R9),%R14D |
0x45fe0a MOV 0x58(%RAX),%RBX |
0x45fe0e MOV %RCX,0x78(%RSP) |
0x45fe13 MOV %RDI,0x50(%RSP) |
0x45fe18 MOV %R8,0x38(%RSP) |
0x45fe1d CALL 402080 <@plt_start@+0x60> |
0x45fe22 MOV %EAX,%R15D |
0x45fe25 CALL 402180 <@plt_start@+0x160> |
0x45fe2a MOV 0x28(%RSP),%R10 |
0x45fe2f MOV %EAX,%ESI |
0x45fe31 MOV 0x18(%R10),%R11 |
0x45fe35 MOV (%R11),%EAX |
0x45fe38 INC %EAX |
0x45fe3a SUB %R14D,%EAX |
0x45fe3d CLTD |
0x45fe3e IDIV %R15D |
0x45fe41 CMP %EDX,%ESI |
0x45fe43 JL 4605a4 |
0x45fe49 IMUL %EAX,%ESI |
0x45fe4c ADD %EDX,%ESI |
0x45fe4e ADD %ESI,%EAX |
0x45fe50 CMP %EAX,%ESI |
0x45fe52 JGE 460560 |
0x45fe58 MOV 0x28(%RSP),%RDI |
0x45fe5d ADD %R14D,%ESI |
0x45fe60 ADD %R14D,%EAX |
0x45fe63 MOV 0x38(%RSP),%RDX |
0x45fe68 MOV %EAX,0x1c(%RSP) |
0x45fe6c MOV 0x8(%RDI),%R9 |
0x45fe70 MOV (%RDI),%RCX |
0x45fe73 MOV %ESI,0x64(%RSP) |
0x45fe77 MOV 0x20(%RDI),%R11 |
0x45fe7b MOV 0x28(%RDI),%R10 |
0x45fe7f MOV (%R9),%R14D |
0x45fe82 MOVSXD (%RCX),%R8 |
0x45fe85 MOV 0x30(%RDI),%R9 |
0x45fe89 MOV 0x38(%RDI),%RDI |
0x45fe8d LEA 0x1(%R14),%EAX |
0x45fe91 ADD %R8,%R13 |
0x45fe94 LEA (%RBX,%R8,1),%RCX |
0x45fe98 MOV 0x40(%RSP),%RBX |
0x45fe9d MOV %EAX,0x18(%RSP) |
0x45fea1 MOVSXD %ESI,%RAX |
0x45fea4 MOV 0x78(%RSP),%RSI |
0x45fea9 ADD %R8,%R12 |
0x45feac IMUL %RAX,%RDX |
0x45feb0 MOV %R8,%R15 |
0x45feb3 MOV %R8D,0x24(%RSP) |
0x45feb8 ADD %R8,%RSI |
0x45febb IMUL %RAX,%RBX |
0x45febf MOV %R8,0x30(%RSP) |
0x45fec4 MOV %R14D,0x68(%RSP) |
0x45fec9 ADD %RDX,%RSI |
0x45fecc MOV 0x48(%RSP),%RDX |
0x45fed1 ADD %RBX,%RCX |
0x45fed4 IMUL %RAX,%RDX |
0x45fed8 ADD %R13,%RDX |
0x45fedb MOV 0x50(%RSP),%R13 |
0x45fee0 MOV %RDX,0x78(%RSP) |
0x45fee5 IMUL %R13,%RAX |
0x45fee9 LEA (%R12,%RAX,1),%R8 |
0x45feed MOV %R14D,%R12D |
0x45fef0 SUB %R15D,%R12D |
0x45fef3 MOV %R12D,0x6c(%RSP) |
0x45fef8 INC %R12D |
0x45fefb MOV %R12D,%EAX |
0x45fefe MOV %R12D,%EBX |
0x45ff01 SHR $0x3,%EAX |
0x45ff04 AND $-0x8,%EBX |
0x45ff07 SAL $0x6,%RAX |
0x45ff0b CMP %R14D,%R15D |
0x45ff0e LEA (%RBX,%R15,1),%EDX |
0x45ff12 MOV %EBX,0x5c(%RSP) |
0x45ff16 CMOVLE 0x18(%RSP),%R15D |
0x45ff1c AND $0x7,%R12D |
0x45ff20 MOV 0x10(%RSP),%EBX |
0x45ff24 MOV %RAX,0x70(%RSP) |
0x45ff29 MOV %R12D,0x60(%RSP) |
0x45ff2e MOV %R15D,0x20(%RSP) |
0x45ff33 MOV %EDX,0x58(%RSP) |
0x45ff37 XOR %EDX,%EDX |
(366) 0x45ff39 MOV 0x68(%RSP),%R15D |
(366) 0x45ff3e CMP %R15D,0x24(%RSP) |
(366) 0x45ff43 JG 4602e0 |
(366) 0x45ff49 CMPL $0x6,0x6c(%RSP) |
(366) 0x45ff4e JBE 460598 |
(366) 0x45ff54 MOV 0x70(%RSP),%RDX |
(366) 0x45ff59 MOV 0x78(%RSP),%R12 |
(366) 0x45ff5e LEA (%R11,%RSI,8),%R14 |
(366) 0x45ff62 LEA (%R10,%RCX,8),%R15 |
(366) 0x45ff66 LEA (%RDI,%R8,8),%RBX |
(366) 0x45ff6a XOR %EAX,%EAX |
(366) 0x45ff6c SUB $0x40,%RDX |
(366) 0x45ff70 LEA (%R9,%R12,8),%R13 |
(366) 0x45ff74 SHR $0x6,%RDX |
(366) 0x45ff78 INC %RDX |
(366) 0x45ff7b AND $0x7,%EDX |
(366) 0x45ff7e JE 460085 |
(366) 0x45ff84 CMP $0x1,%RDX |
(366) 0x45ff88 JE 460059 |
(366) 0x45ff8e CMP $0x2,%RDX |
(366) 0x45ff92 JE 460038 |
(366) 0x45ff98 CMP $0x3,%RDX |
(366) 0x45ff9c JE 460017 |
(366) 0x45ff9e CMP $0x4,%RDX |
(366) 0x45ffa2 JE 45fff6 |
(366) 0x45ffa4 CMP $0x5,%RDX |
(366) 0x45ffa8 JE 45ffd5 |
(366) 0x45ffaa CMP $0x6,%RDX |
(366) 0x45ffae JNE 460570 |
(366) 0x45ffb4 VMOVUPD (%R14,%RAX,1),%ZMM1 |
(366) 0x45ffbb VMOVUPD %ZMM1,(%R15,%RAX,1) |
(366) 0x45ffc2 VMOVUPD (%R13,%RAX,1),%ZMM2 |
(366) 0x45ffca VMOVUPD %ZMM2,(%RBX,%RAX,1) |
(366) 0x45ffd1 ADD $0x40,%RAX |
(366) 0x45ffd5 VMOVUPD (%R14,%RAX,1),%ZMM0 |
(366) 0x45ffdc VMOVUPD %ZMM0,(%R15,%RAX,1) |
(366) 0x45ffe3 VMOVUPD (%R13,%RAX,1),%ZMM5 |
(366) 0x45ffeb VMOVUPD %ZMM5,(%RBX,%RAX,1) |
(366) 0x45fff2 ADD $0x40,%RAX |
(366) 0x45fff6 VMOVUPD (%R14,%RAX,1),%ZMM6 |
(366) 0x45fffd VMOVUPD %ZMM6,(%R15,%RAX,1) |
(366) 0x460004 VMOVUPD (%R13,%RAX,1),%ZMM7 |
(366) 0x46000c VMOVUPD %ZMM7,(%RBX,%RAX,1) |
(366) 0x460013 ADD $0x40,%RAX |
(366) 0x460017 VMOVUPD (%R14,%RAX,1),%ZMM8 |
(366) 0x46001e VMOVUPD %ZMM8,(%R15,%RAX,1) |
(366) 0x460025 VMOVUPD (%R13,%RAX,1),%ZMM9 |
(366) 0x46002d VMOVUPD %ZMM9,(%RBX,%RAX,1) |
(366) 0x460034 ADD $0x40,%RAX |
(366) 0x460038 VMOVUPD (%R14,%RAX,1),%ZMM10 |
(366) 0x46003f VMOVUPD %ZMM10,(%R15,%RAX,1) |
(366) 0x460046 VMOVUPD (%R13,%RAX,1),%ZMM11 |
(366) 0x46004e VMOVUPD %ZMM11,(%RBX,%RAX,1) |
(366) 0x460055 ADD $0x40,%RAX |
(366) 0x460059 VMOVUPD (%R14,%RAX,1),%ZMM12 |
(366) 0x460060 VMOVUPD %ZMM12,(%R15,%RAX,1) |
(366) 0x460067 VMOVUPD (%R13,%RAX,1),%ZMM13 |
(366) 0x46006f VMOVUPD %ZMM13,(%RBX,%RAX,1) |
(366) 0x460076 ADD $0x40,%RAX |
(366) 0x46007a CMP %RAX,0x70(%RSP) |
(366) 0x46007f JE 460193 |
(368) 0x460085 VMOVUPD (%R14,%RAX,1),%ZMM14 |
(368) 0x46008c VMOVUPD %ZMM14,(%R15,%RAX,1) |
(368) 0x460093 VMOVUPD (%R13,%RAX,1),%ZMM15 |
(368) 0x46009b VMOVUPD %ZMM15,(%RBX,%RAX,1) |
(368) 0x4600a2 VMOVUPD 0x40(%R14,%RAX,1),%ZMM3 |
(368) 0x4600aa VMOVUPD %ZMM3,0x40(%R15,%RAX,1) |
(368) 0x4600b2 VMOVUPD 0x40(%R13,%RAX,1),%ZMM4 |
(368) 0x4600ba VMOVUPD %ZMM4,0x40(%RBX,%RAX,1) |
(368) 0x4600c2 VMOVUPD 0x80(%R14,%RAX,1),%ZMM1 |
(368) 0x4600ca VMOVUPD %ZMM1,0x80(%R15,%RAX,1) |
(368) 0x4600d2 VMOVUPD 0x80(%R13,%RAX,1),%ZMM2 |
(368) 0x4600da VMOVUPD %ZMM2,0x80(%RBX,%RAX,1) |
(368) 0x4600e2 VMOVUPD 0xc0(%R14,%RAX,1),%ZMM0 |
(368) 0x4600ea VMOVUPD %ZMM0,0xc0(%R15,%RAX,1) |
(368) 0x4600f2 VMOVUPD 0xc0(%R13,%RAX,1),%ZMM5 |
(368) 0x4600fa VMOVUPD %ZMM5,0xc0(%RBX,%RAX,1) |
(368) 0x460102 VMOVUPD 0x100(%R14,%RAX,1),%ZMM6 |
(368) 0x46010a VMOVUPD %ZMM6,0x100(%R15,%RAX,1) |
(368) 0x460112 VMOVUPD 0x100(%R13,%RAX,1),%ZMM7 |
(368) 0x46011a VMOVUPD %ZMM7,0x100(%RBX,%RAX,1) |
(368) 0x460122 VMOVUPD 0x140(%R14,%RAX,1),%ZMM8 |
(368) 0x46012a VMOVUPD %ZMM8,0x140(%R15,%RAX,1) |
(368) 0x460132 VMOVUPD 0x140(%R13,%RAX,1),%ZMM9 |
(368) 0x46013a VMOVUPD %ZMM9,0x140(%RBX,%RAX,1) |
(368) 0x460142 VMOVUPD 0x180(%R14,%RAX,1),%ZMM10 |
(368) 0x46014a VMOVUPD %ZMM10,0x180(%R15,%RAX,1) |
(368) 0x460152 VMOVUPD 0x180(%R13,%RAX,1),%ZMM11 |
(368) 0x46015a VMOVUPD %ZMM11,0x180(%RBX,%RAX,1) |
(368) 0x460162 VMOVUPD 0x1c0(%R14,%RAX,1),%ZMM12 |
(368) 0x46016a VMOVUPD %ZMM12,0x1c0(%R15,%RAX,1) |
(368) 0x460172 VMOVUPD 0x1c0(%R13,%RAX,1),%ZMM13 |
(368) 0x46017a VMOVUPD %ZMM13,0x1c0(%RBX,%RAX,1) |
(368) 0x460182 ADD $0x200,%RAX |
(368) 0x460188 CMP %RAX,0x70(%RSP) |
(368) 0x46018d JNE 460085 |
(366) 0x460193 MOV 0x60(%RSP),%R14D |
(366) 0x460198 TEST %R14D,%R14D |
(366) 0x46019b JE 46029e |
(366) 0x4601a1 MOV 0x5c(%RSP),%R13D |
(366) 0x4601a6 MOV 0x58(%RSP),%EAX |
(366) 0x4601aa MOV 0x6c(%RSP),%R15D |
(366) 0x4601af SUB %R13D,%R15D |
(366) 0x4601b2 LEA 0x1(%R15),%EBX |
(366) 0x4601b6 CMP $0x2,%R15D |
(366) 0x4601ba JBE 4601f6 |
(366) 0x4601bc LEA (%RSI,%R13,1),%R12 |
(366) 0x4601c0 MOV 0x78(%RSP),%R14 |
(366) 0x4601c5 LEA (%RCX,%R13,1),%RDX |
(366) 0x4601c9 VMOVUPD (%R11,%R12,8),%YMM14 |
(366) 0x4601cf LEA (%R14,%R13,1),%R15 |
(366) 0x4601d3 ADD %R8,%R13 |
(366) 0x4601d6 VMOVUPD %YMM14,(%R10,%RDX,8) |
(366) 0x4601dc VMOVUPD (%R9,%R15,8),%YMM15 |
(366) 0x4601e2 VMOVUPD %YMM15,(%RDI,%R13,8) |
(366) 0x4601e8 TEST $0x3,%BL |
(366) 0x4601eb JE 46029e |
(366) 0x4601f1 AND $-0x4,%EBX |
(366) 0x4601f4 ADD %EBX,%EAX |
(366) 0x4601f6 MOV 0x30(%RSP),%RDX |
(366) 0x4601fb MOV 0x78(%RSP),%R12 |
(366) 0x460200 MOV %RSI,%R14 |
(366) 0x460203 MOV %RCX,%R13 |
(366) 0x460206 MOV %R8,%RBX |
(366) 0x460209 SUB %RDX,%R14 |
(366) 0x46020c SUB %RDX,%R13 |
(366) 0x46020f SUB %RDX,%R12 |
(366) 0x460212 SUB %RDX,%RBX |
(366) 0x460215 MOVSXD %EAX,%RDX |
(366) 0x460218 LEA (%R14,%RDX,1),%R15 |
(366) 0x46021c VMOVSD (%R11,%R15,8),%XMM3 |
(366) 0x460222 LEA (%RDX,%R13,1),%R15 |
(366) 0x460226 VMOVSD %XMM3,(%R10,%R15,8) |
(366) 0x46022c LEA (%RDX,%R12,1),%R15 |
(366) 0x460230 ADD %RBX,%RDX |
(366) 0x460233 VMOVSD (%R9,%R15,8),%XMM4 |
(366) 0x460239 VMOVSD %XMM4,(%RDI,%RDX,8) |
(366) 0x46023e LEA 0x1(%RAX),%EDX |
(366) 0x460241 CMP %EDX,0x68(%RSP) |
(366) 0x460245 JL 46029e |
(366) 0x460247 MOVSXD %EDX,%RDX |
(366) 0x46024a ADD $0x2,%EAX |
(366) 0x46024d LEA (%RDX,%R14,1),%R15 |
(366) 0x460251 VMOVSD (%R11,%R15,8),%XMM1 |
(366) 0x460257 LEA (%RDX,%R13,1),%R15 |
(366) 0x46025b VMOVSD %XMM1,(%R10,%R15,8) |
(366) 0x460261 LEA (%RDX,%R12,1),%R15 |
(366) 0x460265 ADD %RBX,%RDX |
(366) 0x460268 VMOVSD (%R9,%R15,8),%XMM2 |
(366) 0x46026e VMOVSD %XMM2,(%RDI,%RDX,8) |
(366) 0x460273 CMP %EAX,0x68(%RSP) |
(366) 0x460277 JL 46029e |
(366) 0x460279 CLTQ |
(366) 0x46027b ADD %RAX,%R14 |
(366) 0x46027e ADD %RAX,%R13 |
(366) 0x460281 ADD %RAX,%R12 |
(366) 0x460284 ADD %RAX,%RBX |
(366) 0x460287 VMOVSD (%R11,%R14,8),%XMM0 |
(366) 0x46028d VMOVSD %XMM0,(%R10,%R13,8) |
(366) 0x460293 VMOVSD (%R9,%R12,8),%XMM5 |
(366) 0x460299 VMOVSD %XMM5,(%RDI,%RBX,8) |
(366) 0x46029e INCL 0x64(%RSP) |
(366) 0x4602a2 MOV 0x38(%RSP),%R14 |
(366) 0x4602a7 MOV $0x1,%EDX |
(366) 0x4602ac MOV 0x40(%RSP),%R13 |
(366) 0x4602b1 MOV 0x48(%RSP),%R12 |
(366) 0x4602b6 MOV 0x50(%RSP),%RBX |
(366) 0x4602bb ADD %R14,%RSI |
(366) 0x4602be ADD %R12,0x78(%RSP) |
(366) 0x4602c3 ADD %R13,%RCX |
(366) 0x4602c6 MOV 0x64(%RSP),%EAX |
(366) 0x4602ca ADD %RBX,%R8 |
(366) 0x4602cd CMP %EAX,0x1c(%RSP) |
(366) 0x4602d1 JLE 46054c |
(366) 0x4602d7 MOV 0x20(%RSP),%EBX |
(366) 0x4602db JMP 45ff39 |
(366) 0x4602e0 MOV 0x64(%RSP),%EAX |
(366) 0x4602e4 MOV 0x1c(%RSP),%R14D |
(366) 0x4602e9 MOV 0x20(%RSP),%R13D |
(366) 0x4602ee NOT %EAX |
(366) 0x4602f0 ADD %R14D,%EAX |
(366) 0x4602f3 AND $0x7,%EAX |
(366) 0x4602f6 CMP %R13D,0x18(%RSP) |
(366) 0x4602fb JE 46029e |
(366) 0x4602fd MOV 0x48(%RSP),%R14 |
(366) 0x460302 INCL 0x64(%RSP) |
(366) 0x460306 MOV 0x40(%RSP),%R12 |
(366) 0x46030b MOV 0x38(%RSP),%R13 |
(366) 0x460310 ADD %R14,0x78(%RSP) |
(366) 0x460315 ADD %R12,%RCX |
(366) 0x460318 MOV 0x50(%RSP),%R12 |
(366) 0x46031d ADD %R13,%RSI |
(366) 0x460320 MOV 0x64(%RSP),%R15D |
(366) 0x460325 ADD %R12,%R8 |
(366) 0x460328 MOV 0x78(%RSP),%R14 |
(366) 0x46032d CMP %R15D,0x1c(%RSP) |
(366) 0x460332 JLE 4605ad |
(366) 0x460338 TEST %EAX,%EAX |
(366) 0x46033a JE 4605ca |
(366) 0x460340 CMP $0x1,%EAX |
(366) 0x460343 JE 4604b2 |
(366) 0x460349 CMP $0x2,%EAX |
(366) 0x46034c JE 46047c |
(366) 0x460352 CMP $0x3,%EAX |
(366) 0x460355 JE 460446 |
(366) 0x46035b CMP $0x4,%EAX |
(366) 0x46035e JE 460410 |
(366) 0x460364 CMP $0x5,%EAX |
(366) 0x460367 JE 4603da |
(366) 0x460369 CMP $0x6,%EAX |
(366) 0x46036c JE 4603a4 |
(366) 0x46036e MOV 0x20(%RSP),%EAX |
(366) 0x460372 CMP %EAX,0x18(%RSP) |
(366) 0x460376 JE 46029e |
(366) 0x46037c ADD %R13,%RSI |
(366) 0x46037f MOV 0x48(%RSP),%R13 |
(366) 0x460384 INC %R15D |
(366) 0x460387 MOV %R15D,0x64(%RSP) |
(366) 0x46038c MOV 0x40(%RSP),%R15 |
(366) 0x460391 ADD %R13,%R14 |
(366) 0x460394 MOV %R14,0x78(%RSP) |
(366) 0x460399 MOV 0x50(%RSP),%R14 |
(366) 0x46039e ADD %R15,%RCX |
(366) 0x4603a1 ADD %R14,%R8 |
(366) 0x4603a4 MOV 0x20(%RSP),%R12D |
(366) 0x4603a9 CMP %R12D,0x18(%RSP) |
(366) 0x4603ae JE 46029e |
(366) 0x4603b4 MOV 0x48(%RSP),%R13 |
(366) 0x4603b9 INCL 0x64(%RSP) |
(366) 0x4603bd MOV 0x38(%RSP),%RAX |
(366) 0x4603c2 MOV 0x40(%RSP),%R15 |
(366) 0x4603c7 ADD %R13,0x78(%RSP) |
(366) 0x4603cc MOV 0x50(%RSP),%R14 |
(366) 0x4603d1 ADD %RAX,%RSI |
(366) 0x4603d4 ADD %R15,%RCX |
(366) 0x4603d7 ADD %R14,%R8 |
(366) 0x4603da MOV 0x20(%RSP),%R12D |
(366) 0x4603df CMP %R12D,0x18(%RSP) |
(366) 0x4603e4 JE 46029e |
(366) 0x4603ea MOV 0x48(%RSP),%R13 |
(366) 0x4603ef INCL 0x64(%RSP) |
(366) 0x4603f3 MOV 0x38(%RSP),%RAX |
(366) 0x4603f8 MOV 0x40(%RSP),%R15 |
(366) 0x4603fd ADD %R13,0x78(%RSP) |
(366) 0x460402 MOV 0x50(%RSP),%R14 |
(366) 0x460407 ADD %RAX,%RSI |
(366) 0x46040a ADD %R15,%RCX |
(366) 0x46040d ADD %R14,%R8 |
(366) 0x460410 MOV 0x20(%RSP),%R12D |
(366) 0x460415 CMP %R12D,0x18(%RSP) |
(366) 0x46041a JE 46029e |
(366) 0x460420 MOV 0x48(%RSP),%R13 |
(366) 0x460425 INCL 0x64(%RSP) |
(366) 0x460429 MOV 0x38(%RSP),%RAX |
(366) 0x46042e MOV 0x40(%RSP),%R15 |
(366) 0x460433 ADD %R13,0x78(%RSP) |
(366) 0x460438 MOV 0x50(%RSP),%R14 |
(366) 0x46043d ADD %RAX,%RSI |
(366) 0x460440 ADD %R15,%RCX |
(366) 0x460443 ADD %R14,%R8 |
(366) 0x460446 MOV 0x20(%RSP),%R12D |
(366) 0x46044b CMP %R12D,0x18(%RSP) |
(366) 0x460450 JE 46029e |
(366) 0x460456 MOV 0x48(%RSP),%R13 |
(366) 0x46045b INCL 0x64(%RSP) |
(366) 0x46045f MOV 0x38(%RSP),%RAX |
(366) 0x460464 MOV 0x40(%RSP),%R15 |
(366) 0x460469 ADD %R13,0x78(%RSP) |
(366) 0x46046e MOV 0x50(%RSP),%R14 |
(366) 0x460473 ADD %RAX,%RSI |
(366) 0x460476 ADD %R15,%RCX |
(366) 0x460479 ADD %R14,%R8 |
(366) 0x46047c MOV 0x20(%RSP),%R12D |
(366) 0x460481 CMP %R12D,0x18(%RSP) |
(366) 0x460486 JE 46029e |
(366) 0x46048c MOV 0x48(%RSP),%R13 |
(366) 0x460491 INCL 0x64(%RSP) |
(366) 0x460495 MOV 0x38(%RSP),%RAX |
(366) 0x46049a MOV 0x40(%RSP),%R15 |
(366) 0x46049f ADD %R13,0x78(%RSP) |
(366) 0x4604a4 MOV 0x50(%RSP),%R14 |
(366) 0x4604a9 ADD %RAX,%RSI |
(366) 0x4604ac ADD %R15,%RCX |
(366) 0x4604af ADD %R14,%R8 |
(366) 0x4604b2 MOV 0x20(%RSP),%R12D |
(366) 0x4604b7 CMP %R12D,0x18(%RSP) |
(366) 0x4604bc JE 46029e |
(366) 0x4604c2 INCL 0x64(%RSP) |
(366) 0x4604c6 MOV 0x38(%RSP),%R15 |
(366) 0x4604cb MOV 0x40(%RSP),%R13 |
(366) 0x4604d0 MOV 0x48(%RSP),%R14 |
(366) 0x4604d5 MOV 0x50(%RSP),%R12 |
(366) 0x4604da ADD %R15,%RSI |
(366) 0x4604dd ADD %R14,0x78(%RSP) |
(366) 0x4604e2 ADD %R13,%RCX |
(366) 0x4604e5 MOV 0x64(%RSP),%EAX |
(366) 0x4604e9 ADD %R12,%R8 |
(366) 0x4604ec CMP %EAX,0x1c(%RSP) |
(366) 0x4604f0 JLE 4605ad |
(366) 0x4604f6 MOV %EBX,0x64(%RSP) |
(366) 0x4604fa MOV %R14,%R13 |
(366) 0x4604fd MOV 0x40(%RSP),%R14 |
(366) 0x460502 MOV 0x38(%RSP),%R15 |
(366) 0x460507 MOV %RDI,0x10(%RSP) |
(366) 0x46050c MOV 0x78(%RSP),%RBX |
(366) 0x460511 MOV 0x20(%RSP),%EDI |
(367) 0x460515 CMP %EDI,0x18(%RSP) |
(367) 0x460519 JE 4605db |
(367) 0x46051f ADD $0x8,%EAX |
(367) 0x460522 LEA (%RSI,%R15,8),%RSI |
(367) 0x460526 LEA (%RCX,%R14,8),%RCX |
(367) 0x46052a LEA (%RBX,%R13,8),%RBX |
(367) 0x46052e LEA (%R8,%R12,8),%R8 |
(367) 0x460532 CMP %EAX,0x1c(%RSP) |
(367) 0x460536 JG 460515 |
0x460538 MOV 0x64(%RSP),%EAX |
0x46053c MOV %EAX,0x10(%RSP) |
0x460540 TEST %DL,%DL |
0x460542 JE 4605b8 |
0x460544 MOV 0x10(%RSP),%EDX |
0x460548 MOV %EDX,0x20(%RSP) |
0x46054c MOV 0x28(%RSP),%R9 |
0x460551 MOV 0x20(%RSP),%R10D |
0x460556 MOV %R10D,0x80(%R9) |
0x46055d VZEROUPPER |
0x460560 LEA -0x28(%RBP),%RSP |
0x460564 POP %RBX |
0x460565 POP %R12 |
0x460567 POP %R13 |
0x460569 POP %R14 |
0x46056b POP %R15 |
0x46056d POP %RBP |
0x46056e RET |
0x46056f NOP |
(366) 0x460570 VMOVUPD (%R14),%ZMM3 |
(366) 0x460576 MOV $0x40,%EAX |
(366) 0x46057b VMOVUPD %ZMM3,(%R15) |
(366) 0x460581 VMOVUPD (%R13),%ZMM4 |
(366) 0x460588 VMOVUPD %ZMM4,(%RBX) |
(366) 0x46058e JMP 45ffb4 |
0x460593 NOPL (%RAX,%RAX,1) |
(366) 0x460598 MOV 0x24(%RSP),%EAX |
(366) 0x46059c XOR %R13D,%R13D |
(366) 0x46059f JMP 4601aa |
0x4605a4 INC %EAX |
0x4605a6 XOR %EDX,%EDX |
0x4605a8 JMP 45fe49 |
0x4605ad MOV %EBX,0x10(%RSP) |
0x4605b1 JMP 460540 |
0x4605b3 NOPL (%RAX,%RAX,1) |
0x4605b8 VZEROUPPER |
0x4605bb LEA -0x28(%RBP),%RSP |
0x4605bf POP %RBX |
0x4605c0 POP %R12 |
0x4605c2 POP %R13 |
0x4605c4 POP %R14 |
0x4605c6 POP %R15 |
0x4605c8 POP %RBP |
0x4605c9 RET |
(366) 0x4605ca MOV %EBX,0x64(%RSP) |
(366) 0x4605ce MOV 0x48(%RSP),%R13 |
(366) 0x4605d3 MOV %R15D,%EAX |
(366) 0x4605d6 JMP 4604fd |
(366) 0x4605db MOV %EAX,0x64(%RSP) |
(366) 0x4605df MOV 0x10(%RSP),%RDI |
(366) 0x4605e4 MOV %RBX,0x78(%RSP) |
(366) 0x4605e9 JMP 46029e |
0x4605ee XCHG %AX,%AX |
Path / |
Source file and lines | revert_kernel.f90:41-48 |
Module | exec |
nb instructions | 138 |
nb uops | 145 |
loop length | 478 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 20 |
micro-operation queue | 24.17 cycles |
front end | 24.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 8.50 | 8.40 | 15.67 | 15.67 | 15.50 | 8.47 | 8.30 | 15.50 | 15.50 | 15.50 | 8.33 | 15.67 |
cycles | 8.50 | 13.13 | 15.67 | 15.67 | 15.50 | 8.47 | 8.30 | 15.50 | 15.50 | 15.50 | 8.33 | 15.67 |
Cycles executing div or sqrt instructions | 6.00 |
FE+BE cycles | 23.58 |
Stall cycles | 0.00 |
Front-end | 24.17 |
Dispatch | 15.67 |
DIV/SQRT | 6.00 |
Overall L1 | 24.17 |
all | 4% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 22% |
all | 9% |
load | 11% |
store | 8% |
mul | 10% |
add-sub | 10% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 10% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RDI,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD $-0x80,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x60(%RAX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RAX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RAX),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x78(%RDI),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RDI),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x68(%RAX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R9),%R14D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RAX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 402080 <@plt_start@+0x60> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 402180 <@plt_start@+0x160> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x28(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x18(%R10),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R11),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %R14D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R15D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
CMP %EDX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 4605a4 <__revert_kernel_module_MOD_revert_kernel._omp_fn.0+0x7e4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %EAX,%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %ESI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 460560 <__revert_kernel_module_MOD_revert_kernel._omp_fn.0+0x7a0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x28(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R14D,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R14D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x38(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x1c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x8(%RDI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %ESI,0x64(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RDI),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RDI),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R9),%R14D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD (%RCX),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RDI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RDI),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%R14),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %R8,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%RBX,%R8,1),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x40(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD %ESI,%RAX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV 0x78(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R8,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
IMUL %RAX,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R8,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8D,0x24(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R8,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
IMUL %RAX,%RBX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R8,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R14D,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RDX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x48(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RBX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
IMUL %RAX,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %R13,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x50(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R13,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%R12,%RAX,1),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R14D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %R15D,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R12D,0x6c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R12D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R12D,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x3,%EAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
AND $-0x8,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SAL $0x6,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
CMP %R14D,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%RBX,%R15,1),%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EBX,0x5c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMOVLE 0x18(%RSP),%R15D | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.50 |
AND $0x7,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV 0x10(%RSP),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12D,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15D,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDX,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x64(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %DL,%DL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 4605b8 <__revert_kernel_module_MOD_revert_kernel._omp_fn.0+0x7f8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x10(%RSP),%EDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EDX,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RSP),%R10D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10D,0x80(%R9) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 45fe49 <__revert_kernel_module_MOD_revert_kernel._omp_fn.0+0x89> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV %EBX,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 460540 <__revert_kernel_module_MOD_revert_kernel._omp_fn.0+0x780> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | revert_kernel.f90:41-48 |
Module | exec |
nb instructions | 138 |
nb uops | 145 |
loop length | 478 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 20 |
micro-operation queue | 24.17 cycles |
front end | 24.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 8.50 | 8.40 | 15.67 | 15.67 | 15.50 | 8.47 | 8.30 | 15.50 | 15.50 | 15.50 | 8.33 | 15.67 |
cycles | 8.50 | 13.13 | 15.67 | 15.67 | 15.50 | 8.47 | 8.30 | 15.50 | 15.50 | 15.50 | 8.33 | 15.67 |
Cycles executing div or sqrt instructions | 6.00 |
FE+BE cycles | 23.58 |
Stall cycles | 0.00 |
Front-end | 24.17 |
Dispatch | 15.67 |
DIV/SQRT | 6.00 |
Overall L1 | 24.17 |
all | 4% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 22% |
all | 9% |
load | 11% |
store | 8% |
mul | 10% |
add-sub | 10% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 10% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RDI,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD $-0x80,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x60(%RAX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RAX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RAX),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x78(%RDI),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RDI),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x68(%RAX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R9),%R14D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RAX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 402080 <@plt_start@+0x60> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 402180 <@plt_start@+0x160> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x28(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x18(%R10),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R11),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %R14D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R15D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
CMP %EDX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 4605a4 <__revert_kernel_module_MOD_revert_kernel._omp_fn.0+0x7e4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %EAX,%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %ESI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 460560 <__revert_kernel_module_MOD_revert_kernel._omp_fn.0+0x7a0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x28(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R14D,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R14D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x38(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x1c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x8(%RDI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %ESI,0x64(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RDI),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RDI),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R9),%R14D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD (%RCX),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RDI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RDI),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%R14),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %R8,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%RBX,%R8,1),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x40(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD %ESI,%RAX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV 0x78(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R8,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
IMUL %RAX,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R8,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8D,0x24(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R8,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
IMUL %RAX,%RBX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R8,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R14D,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RDX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x48(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RBX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
IMUL %RAX,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %R13,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x50(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R13,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%R12,%RAX,1),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R14D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %R15D,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R12D,0x6c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R12D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R12D,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x3,%EAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
AND $-0x8,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SAL $0x6,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
CMP %R14D,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%RBX,%R15,1),%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EBX,0x5c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMOVLE 0x18(%RSP),%R15D | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.50 |
AND $0x7,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV 0x10(%RSP),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12D,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15D,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDX,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x64(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %DL,%DL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 4605b8 <__revert_kernel_module_MOD_revert_kernel._omp_fn.0+0x7f8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x10(%RSP),%EDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EDX,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RSP),%R10D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10D,0x80(%R9) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 45fe49 <__revert_kernel_module_MOD_revert_kernel._omp_fn.0+0x89> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV %EBX,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 460540 <__revert_kernel_module_MOD_revert_kernel._omp_fn.0+0x780> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼revert_kernel._omp_fn.0– | 2.3 | 1.7 |
▼Loop 366 - revert_kernel.f90:41-48 - exec– | 0 | 0 |
○Loop 368 - revert_kernel.f90:47-48 - exec | 2.3 | 1.7 |
○Loop 367 - revert_kernel.f90:45-45 - exec | 0 | 0 |