OV - exec - Loop 515

0x43570c CMP	W25, #0

0x435710 B.LE	4358a0

0x435714 CNTD	X27, ALL

0x435718 SUB	W17, W27, #1

0x43571c CMP	W30, W17

0x435720 B.CC	438cac

0x435724 ADD	X16, X1, #8

0x435728 ORR	X2, XZR, X8

0x43572c MOVZ	X0, #0

  (517) 0x435730 LD1D	{Z24.D}, P2/Z, [X16, X0,LSL #3]

  (517) 0x435734 ORR	W14, WZR, W0

  (517) 0x435738 ADD	W12, W4, W0

  (517) 0x43573c REV	Z25.D, Z24.D

  (517) 0x435740 ADD	X0, X0, X6

  (517) 0x435744 ST1D	{Z25.D}, P2, [X2, MUL VL]

  (517) 0x435748 ADD	X2, X2, X5

  (517) 0x43574c CMP	W7, W0

  (517) 0x435750 B.CS	435730

0x435754 CNTD	X10, ALL

0x435758 ADD	W27, W10, #1

0x43575c ADD	W15, W14, W27

0x435760 CMP	W25, W12

0x435764 B.EQ	4358a0

0x435768 SBFM	X17, X15, #0, #31

0x43576c ADD	X10, X9, #1

0x435770 SUB	X15, XZR, X17,LSL #3

0x435774 SUB	W16, W25, W17

0x435778 ADD	X0, X17, #1

0x43577c LDR	D26, [X1, X17,LSL #3]

0x435780 AND	W12, W16, #128

0x435784 ADD	X27, X15, X10,LSL #3

0x435788 ADD	X17, X13, X27

0x43578c SUB	X2, X17, #8

0x435790 STR	D26, [X13, X27]

0x435794 CMP	W25, W0

0x435798 B.LT	4358a0

0x43579c CBZ	W12, 435830

  (516) 0x435830 LDR	D3, [X1, X0,LSL #3]

  (516) 0x435834 ORR	X10, XZR, X2

  (516) 0x435838 ADD	X12, X0, #1

  (516) 0x43583c ADD	X27, X0, #2

  (516) 0x435840 ADD	X17, X0, #3

  (516) 0x435844 ADD	X16, X0, #4

  (516) 0x435848 ADD	X15, X0, #5

  (516) 0x43584c ADD	X14, X0, #6

  (516) 0x435850 SUB	X2, X2, #64

  (516) 0x435854 STR	D3, [X10], #504

  (516) 0x435858 LDR	D4, [X1, X12,LSL #3]

  (516) 0x43585c ADD	X12, X0, #7

  (516) 0x435860 ADD	X0, X0, #8

  (516) 0x435864 STR	D4, [X2, #56]

  (516) 0x435868 LDR	D0, [X1, X27,LSL #3]

  (516) 0x43586c STUR	D0, [X10, #504]

  (516) 0x435870 LDR	D5, [X1, X17,LSL #3]

  (516) 0x435874 STR	D5, [X2, #40]

  (516) 0x435878 LDR	D6, [X1, X16,LSL #3]

  (516) 0x43587c STR	D6, [X2, #32]

  (516) 0x435880 LDR	D7, [X1, X15,LSL #3]

  (516) 0x435884 STR	D7, [X2, #24]

  (516) 0x435888 LDR	D16, [X1, X14,LSL #3]

  (516) 0x43588c STR	D16, [X2, #16]

  (516) 0x435890 LDR	D17, [X1, X12,LSL #3]

  (516) 0x435894 STR	D17, [X2, #8]

  (516) 0x435898 CMP	W25, W0

  (516) 0x43589c B.GE	435830

0x4358a0 ADD	W3, W3, #1

0x4358a4 ADD	X9, X9, X24

0x4358a8 ADD	X1, X1, X11

0x4358ac ADD	X8, X8, X11

0x4358b0 CMP	W28, W3

0x4358b4 B.GT	43570c

0x438cac MOVZ	W15, #1

0x438cb0 B	435768

/home/hbollore/qaas/qaas-runs/169-814-4157/intel/CloverLeaf/build/CloverLeaf/CloverLeaf_ref/kernels/update_halo_kernel.f90: 164 - 168

--------------------------------------------------------------------------------

164:         !$OMP DO

165:         DO k=y_min-depth,y_max+depth

166:         !$OMP SIMD

167:           DO j=1,depth

168:             density1(1-j,k)=density1(0+j,k)

Coverage (%)	Name	Source Location	Module
►66.67+	GOMP_parallel		libgomp.so.1.0.0
○	update_halo_kernel	update_halo_kernel.f90:754	exec
○	update_halo	update_halo.f90:78	exec
○	advection	advection.f90:56	exec
○	hydro	hydro.f90:64	exec
○	main	clover_leaf.f90:41	exec
○	__libc_start_main		libc-2.31.so
○	_start	clover_leaf.f90:41	exec
►33.33+	GOMP_parallel		libgomp.so.1.0.0
○	update_halo_kernel	update_halo_kernel.f90:754	exec
○	update_halo	update_halo.f90:78	exec
○	advection	advection.f90:72	exec
○	hydro	hydro.f90:64	exec
○	main	clover_leaf.f90:41	exec
○	__libc_start_main		libc-2.31.so
○	_start	clover_leaf.f90:41	exec

Path /

Metric	Value
CQA speedup if no scalar integer	8.10
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	6.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.50
Bottlenecks	P2, P3, P4, P5,
Function	update_halo_kernel._omp_fn.0
Source	update_halo_kernel.f90:164-164,update_halo_kernel.f90:168-168
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	6.75
CQA cycles if no scalar integer	0.83
CQA cycles if FP arith vectorized	6.75
CQA cycles if fully vectorized	1.13
Front-end cycles	4.50
DIV/SQRT cycles	3.50
P0 cycles	3.50
P1 cycles	6.75
P2 cycles	6.75
P3 cycles	6.75
P4 cycles	6.75
P5 cycles	0.50
P6 cycles	0.50
P7 cycles	0.00
P8 cycles	0.00
P9 cycles	0.83
P10 cycles	0.50
P11 cycles	0.67
P12 cycles	0.00
P13 cycles	0.00
P14 cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	36.00
Nb uops	36.00
Nb loads	NA
Nb stores	1.00
Nb stack references	0.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	2.37
Bytes prefetched	0.00
Bytes loaded	8.00
Bytes stored	8.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	20.00
Vector-efficiency ratio load	25.00
Vector-efficiency ratio store	25.00
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	22.22
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	16.67

Metric	Value
CQA speedup if no scalar integer	8.10
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	6.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.50
Bottlenecks	P2, P3, P4, P5,
Function	update_halo_kernel._omp_fn.0
Source	update_halo_kernel.f90:164-164,update_halo_kernel.f90:168-168
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	6.75
CQA cycles if no scalar integer	0.83
CQA cycles if FP arith vectorized	6.75
CQA cycles if fully vectorized	1.13
Front-end cycles	4.50
DIV/SQRT cycles	3.50
P0 cycles	3.50
P1 cycles	6.75
P2 cycles	6.75
P3 cycles	6.75
P4 cycles	6.75
P5 cycles	0.50
P6 cycles	0.50
P7 cycles	0.00
P8 cycles	0.00
P9 cycles	0.83
P10 cycles	0.50
P11 cycles	0.67
P12 cycles	0.00
P13 cycles	0.00
P14 cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	36.00
Nb uops	36.00
Nb loads	NA
Nb stores	1.00
Nb stack references	0.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	2.37
Bytes prefetched	0.00
Bytes loaded	8.00
Bytes stored	8.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	20.00
Vector-efficiency ratio load	25.00
Vector-efficiency ratio store	25.00
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	22.22
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	16.67

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	update_halo_kernel._omp_fn.0
Source file and lines	update_halo_kernel.f90:164-168
Module	exec

The loop is defined in /home/hbollore/qaas/qaas-runs/169-814-4157/intel/CloverLeaf/build/CloverLeaf/CloverLeaf_ref/kernels/update_halo_kernel.f90:164-168.

Analyzed code is defined in /home/hbollore/qaas/qaas-runs/169-814-4157/intel/CloverLeaf/build/CloverLeaf/CloverLeaf_ref/kernels/update_halo_kernel.f90:164,168.

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Failed to get the number of paths
RecMII not computed since number of paths is unknown or > max_paths

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 6.75 to 0.83 cycles (8.10x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)
To reference allocatable arrays, use "allocatable" instead of "pointer" pointers or qualify them with the "contiguous" attribute (Fortran 2008)
For structures, limit to one indirection. For example, use a_b%c instead of a%b%c with a_b set to a%b before this loop

Vectorization

Your loop is not vectorized. Only 20% of vector register length is used (average across all VPU instructions). By vectorizing your loop, you can lower the cost of an iteration from 6.75 to 1.12 cycles (6.00x speedup).

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with ftree-vectorize (included in O3) to enable loop vectorization and with fassociative-math (included in Ofast or ffast-math) to extend vectorization to FP reductions.
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: Fortran storage order is column-major: do i do j a(i,j) = b(i,j) (slow, non stride 1) => do i do j a(j,i) = b(i,j) (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): do i a(i)%x = b(i)%x (slow, non stride 1) => do i a%x(i) = b%x(i) (fast, stride 1)

No data for this section

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 8 bytes. The binary loop is storing 8 bytes.

General properties

nb instructions	36
loop length	144
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

4.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	3.50	3.50	6.75	6.75	6.75	6.75	0.50	0.50	0.00	0.00	0.83	0.50	0.67	0.00	0.00
cycles	3.50	3.50	6.75	6.75	6.75	6.75	0.50	0.50	0.00	0.00	0.83	0.50	0.67	0.00	0.00

Cycles executing div or sqrt instructions

NA

Cycles summary

Front-end	4.50
Overall L1	6.75

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 6.75 cycles. At this rate:

1% of peak load performance is reached (1.19 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (1.19 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the loop is: 43570c

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P10	P11	P12	Latency	Recip. throughput
CMP W25, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LE 4358a0 <__update_halo_kernel_module_MOD_update_halo_kernel._omp_fn.0+0x7400>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CNTD X27, ALL	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB W17, W27, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP W30, W17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.CC 438cac <__update_halo_kernel_module_MOD_update_halo_kernel._omp_fn.0+0xa80c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X16, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ORR X2, XZR, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
MOVZ X0, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CNTD X10, ALL	1	0	0	0	0	1	0	0	0	0	0	0	2	1
ADD W27, W10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD W15, W14, W27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP W25, W12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.EQ 4358a0 <__update_halo_kernel_module_MOD_update_halo_kernel._omp_fn.0+0x7400>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
SBFM X17, X15, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X10, X9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
SUB X15, XZR, X17,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
SUB W16, W25, W17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X0, X17, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR D26, [X1, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
AND W12, W16, #128	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X27, X15, X10,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X17, X13, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
SUB X2, X17, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR D26, [X13, X27]	1	0	0	0	0	0	0	0.50	0.50	0.50	0.50	0	2	0.50
CMP W25, W0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 4358a0 <__update_halo_kernel_module_MOD_update_halo_kernel._omp_fn.0+0x7400>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CBZ W12, 435830 <__update_halo_kernel_module_MOD_update_halo_kernel._omp_fn.0+0x7390>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD W3, W3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X9, X9, X24	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X1, X1, X11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X8, X8, X11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP W28, W3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GT 43570c <__update_halo_kernel_module_MOD_update_halo_kernel._omp_fn.0+0x726c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ W15, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
B 435768 <__update_halo_kernel_module_MOD_update_halo_kernel._omp_fn.0+0x72c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50

Function	update_halo_kernel._omp_fn.0
Source file and lines	update_halo_kernel.f90:164-168
Module	exec

The loop is defined in /home/hbollore/qaas/qaas-runs/169-814-4157/intel/CloverLeaf/build/CloverLeaf/CloverLeaf_ref/kernels/update_halo_kernel.f90:164-168.

Analyzed code is defined in /home/hbollore/qaas/qaas-runs/169-814-4157/intel/CloverLeaf/build/CloverLeaf/CloverLeaf_ref/kernels/update_halo_kernel.f90:164,168.

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Failed to get the number of paths
RecMII not computed since number of paths is unknown or > max_paths

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 6.75 to 0.83 cycles (8.10x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)
To reference allocatable arrays, use "allocatable" instead of "pointer" pointers or qualify them with the "contiguous" attribute (Fortran 2008)
For structures, limit to one indirection. For example, use a_b%c instead of a%b%c with a_b set to a%b before this loop

Vectorization

Your loop is not vectorized. Only 20% of vector register length is used (average across all VPU instructions). By vectorizing your loop, you can lower the cost of an iteration from 6.75 to 1.12 cycles (6.00x speedup).

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with ftree-vectorize (included in O3) to enable loop vectorization and with fassociative-math (included in Ofast or ffast-math) to extend vectorization to FP reductions.
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: Fortran storage order is column-major: do i do j a(i,j) = b(i,j) (slow, non stride 1) => do i do j a(j,i) = b(i,j) (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): do i a(i)%x = b(i)%x (slow, non stride 1) => do i a%x(i) = b%x(i) (fast, stride 1)

No data for this section

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 8 bytes. The binary loop is storing 8 bytes.

General properties

nb instructions	36
loop length	144
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

4.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	3.50	3.50	6.75	6.75	6.75	6.75	0.50	0.50	0.00	0.00	0.83	0.50	0.67	0.00	0.00
cycles	3.50	3.50	6.75	6.75	6.75	6.75	0.50	0.50	0.00	0.00	0.83	0.50	0.67	0.00	0.00

Cycles executing div or sqrt instructions

NA

Cycles summary

Front-end	4.50
Overall L1	6.75

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 6.75 cycles. At this rate:

1% of peak load performance is reached (1.19 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (1.19 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the loop is: 43570c

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P10	P11	P12	Latency	Recip. throughput
CMP W25, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LE 4358a0 <__update_halo_kernel_module_MOD_update_halo_kernel._omp_fn.0+0x7400>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CNTD X27, ALL	1	0	0	0	0	1	0	0	0	0	0	0	2	1
SUB W17, W27, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP W30, W17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.CC 438cac <__update_halo_kernel_module_MOD_update_halo_kernel._omp_fn.0+0xa80c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD X16, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ORR X2, XZR, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
MOVZ X0, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CNTD X10, ALL	1	0	0	0	0	1	0	0	0	0	0	0	2	1
ADD W27, W10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD W15, W14, W27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP W25, W12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.EQ 4358a0 <__update_halo_kernel_module_MOD_update_halo_kernel._omp_fn.0+0x7400>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
SBFM X17, X15, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X10, X9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
SUB X15, XZR, X17,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
SUB W16, W25, W17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X0, X17, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
LDR D26, [X1, X17,LSL #3]	1	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33
AND W12, W16, #128	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X27, X15, X10,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X17, X13, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
SUB X2, X17, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
STR D26, [X13, X27]	1	0	0	0	0	0	0	0.50	0.50	0.50	0.50	0	2	0.50
CMP W25, W0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.LT 4358a0 <__update_halo_kernel_module_MOD_update_halo_kernel._omp_fn.0+0x7400>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
CBZ W12, 435830 <__update_halo_kernel_module_MOD_update_halo_kernel._omp_fn.0+0x7390>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD W3, W3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X9, X9, X24	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X1, X1, X11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
ADD X8, X8, X11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
CMP W28, W3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33
B.GT 43570c <__update_halo_kernel_module_MOD_update_halo_kernel._omp_fn.0+0x726c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50
MOVZ W15, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25
B 435768 <__update_halo_kernel_module_MOD_update_halo_kernel._omp_fn.0+0x72c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50

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Matching between your loop (in the source code) and the binary loop

General properties

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Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code