OV - exec - Loop 913

	Loop Id: 913	Module: exec	Source: viscosity_kernel.f90:56-89	Coverage: 2.51%

0x44ab70 LDP	D19, D4, [X3]    [11]

0x44ab74 LDP	D17, D5, [X4]    [12]

0x44ab78 LDP	D28, D29, [X5]    [2]

0x44ab7c LDP	D1, D18, [X2]    [10]

0x44ab80 FADD	D0, D19, D4

0x44ab84 FADD	D2, D5, D4

0x44ab88 LDR	D20, [X1, X12,LSL #3]    [7]

0x44ab8c FADD	D16, D17, D5

0x44ab90 FADD	D30, D29, D28

0x44ab94 LDR	D23, [X1, X10,LSL #3]    [6]

0x44ab98 LDR	D21, [X14, X8,LSL #3]    [8]

0x44ab9c FSUB	D3, D2, S19

0x44aba0 FSUB	D25, D16, S0

0x44aba4 LDUR	D22, [X1, #504]    [9]

0x44aba8 FSUB	D31, D30, S1

0x44abac FSUB	D26, D20, S23

0x44abb0 LDR	D23, [X13, X8,LSL #3]    [1]

0x44abb4 FADD	D20, D1, D28

0x44abb8 FADD	D1, D18, D29

0x44abbc LDP	D28, D2, [X6]    [3]

0x44abc0 FSUB	D24, D3, S17

0x44abc4 LDR	D5, [X1, #8]    [9]

0x44abc8 FMUL	D17, D25, D6

0x44abcc FSUB	D18, D31, S18

0x44abd0 FADD	D21, D23, D21

0x44abd4 FSUB	D19, D1, S20

0x44abd8 FADD	D3, D28, D2

0x44abdc FMUL	D27, D24, D6

0x44abe0 FSUB	D22, D5, S22

0x44abe4 FMUL	D4, D18, D6

0x44abe8 FDIV	D24, D26, D21

0x44abec FMUL	D16, D19, D6

0x44abf0 FDIV	D0, D4, D23

0x44abf4 FDIV	D27, D27, D28

0x44abf8 FMUL	D30, D24, D24

0x44abfc FDIV	D26, D17, D23

0x44ac00 FDIV	D29, D22, D3

0x44ac04 FADD	D31, D0, D27

0x44ac08 FDIV	D18, D16, D28

0x44ac0c FMUL	D1, D26, D30

0x44ac10 FMUL	D20, D29, D29

0x44ac14 FMUL	D21, D31, D29

0x44ac18 FMADD	D0, D20, D18, D1

0x44ac1c FADD	D4, D20, D30

0x44ac20 FMAXNM	D17, D4, D7

0x44ac24 FMADD	D16, D24, D21, D0

0x44ac28 FDIV	D26, D16, D17

0x44ac2c FCMPE	D26, #0

0x44ac30 B.GT	44ad38

0x44ac34 FMUL	D19, D28, D19

0x44ac38 FMADD	D25, D23, D25, D19

0x44ac3c FCMPE	D25, #0

0x44ac40 B.GE	44ad38

0x44ac44 FCMPE	D29, #0

0x44ac48 FABS	D5, D29

0x44ac4c FMAXNM	D22, D5, D7

0x44ac50 B.MI	44ad24

0x44ac54 FMOV	D2, #1.0000000

0x44ac58 FABS	D24, D24

0x44ac5c FMAXNM	D3, D24, D7

0x44ac60 FMUL	D27, D2, D3

0x44ac64 LDR	D21, [X9]    [5]

0x44ac68 FMUL	D29, D27, D27

0x44ac6c FADD	D4, D21, D21

0x44ac70 FMADD	D30, D22, D22, D29

0x44ac74 FSQRT	D31, D30

0x44ac78 FMUL	D23, D23, D31

0x44ac7c FMUL	D28, D28, D31

0x44ac80 FDIV	D18, D23, D27

0x44ac84 FDIV	D1, D28, D22

0x44ac88 FABS	D20, D18

0x44ac8c FABS	D17, D1

0x44ac90 FMINNM	D0, D17, D20

0x44ac94 FMUL	D16, D0, D0

0x44ac98 FMUL	D19, D4, D16

0x44ac9c FMUL	D25, D19, D26

0x44aca0 FMUL	D26, D25, D26

0x44aca4 STR	D26, [X7]    [4]

0x44aca8 ADD	X2, X2, #8

0x44acac ADD	X5, X5, #8

0x44acb0 ADD	X4, X4, #8

0x44acb4 ADD	X3, X3, #8

0x44acb8 ADD	X6, X6, #8

0x44acbc ADD	X1, X1, #8

0x44acc0 ADD	X9, X9, #8

0x44acc4 ADD	X7, X7, #8

0x44acc8 CMP	X11, X2

0x44accc B.NE	44ab70

0x44ad24 FCMPE	D22, #0

0x44ad28 FMOV	D2, #-1.0000000

0x44ad2c FNEG	D22, D22

0x44ad30 B.GT	44ac58

0x44ad34 B	44ac54

0x44ad38 STR	XZR, [X7]    [4]

0x44ad3c B	44aca8

/home/hbollore/qaas-runs/170-309-0949/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/viscosity_kernel.f90: 56 - 89

--------------------------------------------------------------------------------

56:         ugrad=(xvel0(j+1,k  )+xvel0(j+1,k+1))-(xvel0(j  ,k  )+xvel0(j  ,k+1))

57:

58:         vgrad=(yvel0(j  ,k+1)+yvel0(j+1,k+1))-(yvel0(j  ,k  )+yvel0(j+1,k  ))

59:

60:         div = (celldx(j)*(ugrad)+  celldy(k)*(vgrad))

61:

62:         strain2 = 0.5_8*(xvel0(j,  k+1) + xvel0(j+1,k+1)-xvel0(j  ,k  )-xvel0(j+1,k  ))/celldy(k) &

63:           + 0.5_8*(yvel0(j+1,k  ) + yvel0(j+1,k+1)-yvel0(j  ,k  )-yvel0(j  ,k+1))/celldx(j)

64:

65:         pgradx=(pressure(j+1,k)-pressure(j-1,k))/(celldx(j)+celldx(j+1))

66:         pgrady=(pressure(j,k+1)-pressure(j,k-1))/(celldy(k)+celldy(k+1))

67:

68:         pgradx2 = pgradx*pgradx

69:         pgrady2 = pgrady*pgrady

70:

71:         limiter = ((0.5_8*(ugrad)/celldx(j))*pgradx2+(0.5_8*(vgrad)/celldy(k))*pgrady2+strain2*pgradx*pgrady)  &

72:           /MAX(pgradx2+pgrady2,1.0e-16_8)

73:

74:         IF ((limiter.GT.0.0).OR.(div.GE.0.0))THEN

75:           viscosity(j,k) = 0.0

76:         ELSE

77:           dirx=1.0_8

78:           IF(pgradx.LT.0.0) dirx=-1.0_8

79:           pgradx = dirx*MAX(1.0e-16_8,ABS(pgradx))

80:           diry=1.0_8

81:           IF(pgradx.LT.0.0) diry=-1.0_8

82:           pgrady = diry*MAX(1.0e-16_8,ABS(pgrady))

83:           pgrad = SQRT(pgradx**2+pgrady**2)

84:           xgrad = ABS(celldx(j)*pgrad/pgradx)

85:           ygrad = ABS(celldy(k)*pgrad/pgrady)

86:           grad  = MIN(xgrad,ygrad)

87:           grad2 = grad*grad

88:

89:           viscosity(j,k)=2.0_8*density0(j,k)*grad2*limiter*limiter

Path /

Metric	Value
CQA speedup if no scalar integer	3.67
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	3.30 - 4.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.39
Bottlenecks	P6, P7, P8, P9,
Function	viscosity_kernel._omp_fn.0
Source	viscosity_kernel.f90:56-89
Source loop unroll info	not unrolled or unrolled with no peel/tail loop
Source loop unroll confidence level	max
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	16.50
CQA cycles if no scalar integer	4.50
CQA cycles if FP arith vectorized	16.50
CQA cycles if fully vectorized	5.00 - 4.13
Front-end cycles	11.88
DIV/SQRT cycles	3.50
P0 cycles	3.50
P1 cycles	2.25
P2 cycles	2.25
P3 cycles	2.25
P4 cycles	2.25
P5 cycles	16.50
P6 cycles	16.50
P7 cycles	16.50
P8 cycles	16.50
P9 cycles	4.67
P10 cycles	4.67
P11 cycles	4.67
P12 cycles	0.50
P13 cycles	0.50
P14 cycles	10.00 - 5.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	95.00
Nb uops	95.00
Nb loads	NA
Nb stores	2.00
Nb stack references	0.00
FLOP/cycle	3.27
Nb FLOP add-sub	19.00
Nb FLOP mul	17.00
Nb FLOP fma	4.00
Nb FLOP div	9.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	1.00
Nb FLOP rsqrt	0.00
Bytes/cycle	9.21
Bytes prefetched	0.00
Bytes loaded	136.00
Bytes stored	16.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	35.71
Vectorization ratio load	41.67
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	NA
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	33.93
Vector-efficiency ratio load	35.42
Vector-efficiency ratio store	25.00
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	NA
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	25.00

Metric	Value
CQA speedup if no scalar integer	3.67
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	3.30 - 4.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.39
Bottlenecks	P6, P7, P8, P9,
Function	viscosity_kernel._omp_fn.0
Source	viscosity_kernel.f90:56-89
Source loop unroll info	not unrolled or unrolled with no peel/tail loop
Source loop unroll confidence level	max
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	16.50
CQA cycles if no scalar integer	4.50
CQA cycles if FP arith vectorized	16.50
CQA cycles if fully vectorized	5.00 - 4.13
Front-end cycles	11.88
DIV/SQRT cycles	3.50
P0 cycles	3.50
P1 cycles	2.25
P2 cycles	2.25
P3 cycles	2.25
P4 cycles	2.25
P5 cycles	16.50
P6 cycles	16.50
P7 cycles	16.50
P8 cycles	16.50
P9 cycles	4.67
P10 cycles	4.67
P11 cycles	4.67
P12 cycles	0.50
P13 cycles	0.50
P14 cycles	10.00 - 5.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	95.00
Nb uops	95.00
Nb loads	NA
Nb stores	2.00
Nb stack references	0.00
FLOP/cycle	3.27
Nb FLOP add-sub	19.00
Nb FLOP mul	17.00
Nb FLOP fma	4.00
Nb FLOP div	9.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	1.00
Nb FLOP rsqrt	0.00
Bytes/cycle	9.21
Bytes prefetched	0.00
Bytes loaded	136.00
Bytes stored	16.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	35.71
Vectorization ratio load	41.67
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	NA
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	33.93
Vector-efficiency ratio load	35.42
Vector-efficiency ratio store	25.00
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	NA
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	25.00

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	viscosity_kernel._omp_fn.0
Source file and lines	viscosity_kernel.f90:56-89
Module	exec

The loop is defined in /home/hbollore/qaas-runs/170-309-0949/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/viscosity_kernel.f90:56-89.

The related source loop is not unrolled or unrolled with no peel/tail loop.
Warnings:

Ignoring paths for analysis
Too many paths. Rerun with max-paths=5
RecMII not computed since number of paths is unknown or > max_paths

Try to simplify control and/or increase the maximum number of paths per function/loop through the 'max-paths-nb' option.

This loop has 5 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = max(0,x) (Fortran instrinsic procedure)

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 16.50 to 4.50 cycles (3.67x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)
To reference allocatable arrays, use "allocatable" instead of "pointer" pointers or qualify them with the "contiguous" attribute (Fortran 2008)
For structures, limit to one indirection. For example, use a_b%c instead of a%b%c with a_b set to a%b before this loop

Vectorization

Your loop is poorly vectorized. Only 33% of vector register length is used (average across all VPU instructions). By fully vectorizing your loop, you can lower the cost of an iteration from 16.50 to 4.12 cycles (4.00x speedup).

Details

35% of VPU instructions are used in vector version (process two or more data elements in vector registers):

41% of VPU loads are used in vector version.
0% of VPU stores are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with fassociative-math (included in Ofast or ffast-math) to extend loop vectorization to FP reductions.
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: Fortran storage order is column-major: do i do j a(i,j) = b(i,j) (slow, non stride 1) => do i do j a(j,i) = b(i,j) (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): do i a(i)%x = b(i)%x (slow, non stride 1) => do i a%x(i) = b%x(i) (fast, stride 1)

FMA

Detected 4 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible. For instance a + b*c is a valid FMA (MUL then ADD). However (a+b)* c cannot be translated into an FMA (ADD then MUL).

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 54 FP arithmetical operations:

23: addition or subtraction (4 inside FMA instructions)
21: multiply (4 inside FMA instructions)
9: divide
1: square root

The binary loop is loading 136 bytes. The binary loop is storing 16 bytes.

Arithmetic intensity

Arithmetic intensity is 0.36 FP operations per loaded or stored byte.

General properties

nb instructions	95
loop length	380
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

11.88 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	3.50	3.50	2.25	2.25	2.25	2.25	16.50	16.50	16.50	16.50	4.67	4.67	4.67	0.50	0.50
cycles	3.50	3.50	2.25	2.25	2.25	2.25	16.50	16.50	16.50	16.50	4.67	4.67	4.67	0.50	0.50

Execution ports to units layout:

P0:
P1:
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

10.00-5.00

Cycles summary

Front-end	11.88
Overall L1	16.50

Vectorization ratios

all	35%
load	41%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 16.50 cycles. At this rate:

8% of peak load performance is reached (8.24 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (0.97 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the loop is: 44ab70

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
LDP D19, D4, [X3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D17, D5, [X4]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D28, D29, [X5]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D1, D18, [X2]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FADD D0, D19, D4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FADD D2, D5, D4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
LDR D20, [X1, X12,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FADD D16, D17, D5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FADD D30, D29, D28	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
LDR D23, [X1, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDR D21, [X14, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FSUB D3, D2, S19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FSUB D25, D16, S0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
LDUR D22, [X1, #504]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FSUB D31, D30, S1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FSUB D26, D20, S23	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
LDR D23, [X13, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FADD D20, D1, D28	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FADD D1, D18, D29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
LDP D28, D2, [X6]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FSUB D24, D3, S17	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
LDR D5, [X1, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D17, D25, D6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FSUB D18, D31, S18	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FADD D21, D23, D21	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FSUB D19, D1, S20	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FADD D3, D28, D2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMUL D27, D24, D6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FSUB D22, D5, S22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMUL D4, D18, D6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FDIV D24, D26, D21	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	1-0.50
FMUL D16, D19, D6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FDIV D0, D4, D23	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	1-0.50
FDIV D27, D27, D28	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	1-0.50
FMUL D30, D24, D24	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FDIV D26, D17, D23	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	1-0.50
FDIV D29, D22, D3	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	1-0.50
FADD D31, D0, D27	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FDIV D18, D16, D28	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	1-0.50
FMUL D1, D26, D30	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMUL D20, D29, D29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMUL D21, D31, D29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMADD D0, D20, D18, D1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FADD D4, D20, D30	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMAXNM D17, D4, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMADD D16, D24, D21, D0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FDIV D26, D16, D17	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	1-0.50
FCMPE D26, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.GT 44ad38 <__viscosity_kernel_module_MOD_viscosity_kernel._omp_fn.0+0x398>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FMUL D19, D28, D19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMADD D25, D23, D25, D19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FCMPE D25, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.GE 44ad38 <__viscosity_kernel_module_MOD_viscosity_kernel._omp_fn.0+0x398>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FCMPE D29, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
FABS D5, D29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMAXNM D22, D5, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
B.MI 44ad24 <__viscosity_kernel_module_MOD_viscosity_kernel._omp_fn.0+0x384>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FMOV D2, #1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FABS D24, D24	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMAXNM D3, D24, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMUL D27, D2, D3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
LDR D21, [X9]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D29, D27, D27	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FADD D4, D21, D21	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMADD D30, D22, D22, D29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FSQRT D31, D30	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-16	1-0.50
FMUL D23, D23, D31	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMUL D28, D28, D31	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FDIV D18, D23, D27	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	1-0.50
FDIV D1, D28, D22	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	1-0.50
FABS D20, D18	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FABS D17, D1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMINNM D0, D17, D20	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMUL D16, D0, D0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMUL D19, D4, D16	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMUL D25, D19, D26	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMUL D26, D25, D26	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
STR D26, [X7]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
ADD X2, X2, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X5, X5, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X4, X4, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X3, X3, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X6, X6, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X9, X9, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X7, X7, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X11, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.NE 44ab70 <__viscosity_kernel_module_MOD_viscosity_kernel._omp_fn.0+0x1d0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FCMPE D22, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
FMOV D2, #-1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FNEG D22, D22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
B.GT 44ac58 <__viscosity_kernel_module_MOD_viscosity_kernel._omp_fn.0+0x2b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B 44ac54 <__viscosity_kernel_module_MOD_viscosity_kernel._omp_fn.0+0x2b4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STR XZR, [X7]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 44aca8 <__viscosity_kernel_module_MOD_viscosity_kernel._omp_fn.0+0x308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50

Function	viscosity_kernel._omp_fn.0
Source file and lines	viscosity_kernel.f90:56-89
Module	exec

Ignoring paths for analysis
Too many paths. Rerun with max-paths=5
RecMII not computed since number of paths is unknown or > max_paths

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = max(0,x) (Fortran instrinsic procedure)

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 16.50 to 4.50 cycles (3.67x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)
To reference allocatable arrays, use "allocatable" instead of "pointer" pointers or qualify them with the "contiguous" attribute (Fortran 2008)
For structures, limit to one indirection. For example, use a_b%c instead of a%b%c with a_b set to a%b before this loop

Vectorization

Details

35% of VPU instructions are used in vector version (process two or more data elements in vector registers):

41% of VPU loads are used in vector version.
0% of VPU stores are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with fassociative-math (included in Ofast or ffast-math) to extend loop vectorization to FP reductions.
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: Fortran storage order is column-major: do i do j a(i,j) = b(i,j) (slow, non stride 1) => do i do j a(j,i) = b(i,j) (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): do i a(i)%x = b(i)%x (slow, non stride 1) => do i a%x(i) = b%x(i) (fast, stride 1)

FMA

Detected 4 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 54 FP arithmetical operations:

23: addition or subtraction (4 inside FMA instructions)
21: multiply (4 inside FMA instructions)
9: divide
1: square root

The binary loop is loading 136 bytes. The binary loop is storing 16 bytes.

Arithmetic intensity

Arithmetic intensity is 0.36 FP operations per loaded or stored byte.

General properties

nb instructions	95
loop length	380
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

11.88 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	3.50	3.50	2.25	2.25	2.25	2.25	16.50	16.50	16.50	16.50	4.67	4.67	4.67	0.50	0.50
cycles	3.50	3.50	2.25	2.25	2.25	2.25	16.50	16.50	16.50	16.50	4.67	4.67	4.67	0.50	0.50

Execution ports to units layout:

P0:
P1:
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

10.00-5.00

Cycles summary

Front-end	11.88
Overall L1	16.50

Vectorization ratios

all	35%
load	41%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 16.50 cycles. At this rate:

8% of peak load performance is reached (8.24 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (0.97 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the loop is: 44ab70

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
LDP D19, D4, [X3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D17, D5, [X4]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D28, D29, [X5]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDP D1, D18, [X2]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FADD D0, D19, D4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FADD D2, D5, D4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
LDR D20, [X1, X12,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FADD D16, D17, D5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FADD D30, D29, D28	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
LDR D23, [X1, X10,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDR D21, [X14, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FSUB D3, D2, S19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FSUB D25, D16, S0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
LDUR D22, [X1, #504]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FSUB D31, D30, S1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FSUB D26, D20, S23	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
LDR D23, [X13, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FADD D20, D1, D28	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FADD D1, D18, D29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
LDP D28, D2, [X6]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FSUB D24, D3, S17	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
LDR D5, [X1, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D17, D25, D6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FSUB D18, D31, S18	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FADD D21, D23, D21	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FSUB D19, D1, S20	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FADD D3, D28, D2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMUL D27, D24, D6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FSUB D22, D5, S22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMUL D4, D18, D6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FDIV D24, D26, D21	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	1-0.50
FMUL D16, D19, D6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FDIV D0, D4, D23	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	1-0.50
FDIV D27, D27, D28	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	1-0.50
FMUL D30, D24, D24	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FDIV D26, D17, D23	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	1-0.50
FDIV D29, D22, D3	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	1-0.50
FADD D31, D0, D27	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FDIV D18, D16, D28	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	1-0.50
FMUL D1, D26, D30	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMUL D20, D29, D29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMUL D21, D31, D29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMADD D0, D20, D18, D1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FADD D4, D20, D30	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMAXNM D17, D4, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMADD D16, D24, D21, D0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FDIV D26, D16, D17	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	1-0.50
FCMPE D26, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.GT 44ad38 <__viscosity_kernel_module_MOD_viscosity_kernel._omp_fn.0+0x398>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FMUL D19, D28, D19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMADD D25, D23, D25, D19	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FCMPE D25, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
B.GE 44ad38 <__viscosity_kernel_module_MOD_viscosity_kernel._omp_fn.0+0x398>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FCMPE D29, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
FABS D5, D29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMAXNM D22, D5, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
B.MI 44ad24 <__viscosity_kernel_module_MOD_viscosity_kernel._omp_fn.0+0x384>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FMOV D2, #1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FABS D24, D24	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMAXNM D3, D24, D7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMUL D27, D2, D3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
LDR D21, [X9]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
FMUL D29, D27, D27	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FADD D4, D21, D21	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMADD D30, D22, D22, D29	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	4	0.25
FSQRT D31, D30	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-16	1-0.50
FMUL D23, D23, D31	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMUL D28, D28, D31	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FDIV D18, D23, D27	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	1-0.50
FDIV D1, D28, D22	1	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	0	0	7-15	1-0.50
FABS D20, D18	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FABS D17, D1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMINNM D0, D17, D20	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FMUL D16, D0, D0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMUL D19, D4, D16	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMUL D25, D19, D26	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
FMUL D26, D25, D26	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25
STR D26, [X7]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50
ADD X2, X2, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X5, X5, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X4, X4, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X3, X3, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X6, X6, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X1, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X9, X9, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X7, X7, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X11, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.NE 44ab70 <__viscosity_kernel_module_MOD_viscosity_kernel._omp_fn.0+0x1d0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
FCMPE D22, #0	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1
FMOV D2, #-1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
FNEG D22, D22	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
B.GT 44ac58 <__viscosity_kernel_module_MOD_viscosity_kernel._omp_fn.0+0x2b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
B 44ac54 <__viscosity_kernel_module_MOD_viscosity_kernel._omp_fn.0+0x2b4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
STR XZR, [X7]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
B 44aca8 <__viscosity_kernel_module_MOD_viscosity_kernel._omp_fn.0+0x308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

FMA

Workaround

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

FMA

Workaround

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code