| Loop Id: 119 | Module: exec | Source: PdV_kernel.f90:114-135 [...] | Coverage: 0.01% |
|---|
| Loop Id: 119 | Module: exec | Source: PdV_kernel.f90:114-135 [...] | Coverage: 0.01% |
|---|
0x41cf08 LDR W20, [SP, #100] |
0x41cf0c LDR W27, [SP, #128] |
0x41cf10 LDR W25, [SP, #120] |
0x41cf14 ADD W22, W20, #1 |
0x41cf18 STR W22, [SP, #100] |
0x41cf1c CMP W25, W27 |
0x41cf20 B.GT 41d054 |
0x41cf24 ADD X27, X14, #8 |
0x41cf28 ADD X26, X13, #8 |
0x41cf2c ORR P1.B, P2/Z, P2.B, P2.B |
0x41cf30 ADD X25, X7, #8 |
0x41cf34 ADD X24, X12, #8 |
0x41cf38 ADD X23, X6, #8 |
0x41cf3c ADD X22, X11, #8 |
0x41cf40 ADD X21, X9, #8 |
0x41cf44 ADD X20, X10, #8 |
0x41cf48 ADD X19, X8, #8 |
0x41cf4c MOVZ X1, #0 |
(120) 0x41cf50 LD1D {Z1.D}, P1/Z, [X26, X1,LSL #3] |
(120) 0x41cf54 LD1D {Z2.D}, P1/Z, [X25, X1,LSL #3] |
(120) 0x41cf58 LD1D {Z0.D}, P1/Z, [X24, X1,LSL #3] |
(120) 0x41cf5c LD1D {Z6.D}, P1/Z, [X23, X1,LSL #3] |
(120) 0x41cf60 LD1D {Z16.D}, P1/Z, [X27, X1,LSL #3] |
(120) 0x41cf64 FADD Z5.D, Z2.D, Z1.D |
(120) 0x41cf68 FADD Z7.D, Z0.D, Z5.D |
(120) 0x41cf6c FADD Z17.D, Z6.D, Z7.D |
(120) 0x41cf70 LD1RD {Z18.D}, P0/Z, [X28] |
(120) 0x41cf74 LD1D {Z20.D}, P1/Z, [X13, X1,LSL #3] |
(120) 0x41cf78 LD1D {Z22.D}, P1/Z, [X7, X1,LSL #3] |
(120) 0x41cf7c LD1D {Z25.D}, P1/Z, [X12, X1,LSL #3] |
(120) 0x41cf80 LD1D {Z26.D}, P1/Z, [X6, X1,LSL #3] |
(120) 0x41cf84 LD1D {Z28.D}, P1/Z, [X14, X1,LSL #3] |
(120) 0x41cf88 LD1D {Z30.D}, P1/Z, [X10, X1,LSL #3] |
(120) 0x41cf8c LD1D {Z1.D}, P1/Z, [X20, X1,LSL #3] |
(120) 0x41cf90 LD1D {Z5.D}, P1/Z, [X8, X1,LSL #3] |
(120) 0x41cf94 LD1D {Z7.D}, P1/Z, [X19, X1,LSL #3] |
(120) 0x41cf98 LD1D {Z6.D}, P1/Z, [X15, X1,LSL #3] |
(120) 0x41cf9c FMUL Z19.D, Z17.D, Z16.D |
(120) 0x41cfa0 FADD Z24.D, Z22.D, Z20.D |
(120) 0x41cfa4 FADD Z0.D, Z1.D, Z30.D |
(120) 0x41cfa8 FADD Z27.D, Z25.D, Z24.D |
(120) 0x41cfac FADD Z16.D, Z5.D, Z0.D |
(120) 0x41cfb0 FADD Z29.D, Z26.D, Z27.D |
(120) 0x41cfb4 FADD Z17.D, Z7.D, Z16.D |
(120) 0x41cfb8 FMUL Z31.D, Z29.D, Z28.D |
(120) 0x41cfbc FMUL Z21.D, Z19.D, Z3.D |
(120) 0x41cfc0 FMUL Z2.D, Z31.D, Z3.D |
(120) 0x41cfc4 FMUL Z23.D, Z21.D, Z18.D |
(120) 0x41cfc8 FMSB Z2.D, P0/M, Z18.D, Z23.D |
(120) 0x41cfcc LD1D {Z31.D}, P1/Z, [X0, X1,LSL #3] |
(120) 0x41cfd0 LD1D {Z19.D}, P1/Z, [X11, X1,LSL #3] |
(120) 0x41cfd4 LD1D {Z21.D}, P1/Z, [X22, X1,LSL #3] |
(120) 0x41cfd8 LD1D {Z24.D}, P1/Z, [X9, X1,LSL #3] |
(120) 0x41cfdc LD1D {Z25.D}, P1/Z, [X21, X1,LSL #3] |
(120) 0x41cfe0 LD1D {Z27.D}, P1/Z, [X5, X1,LSL #3] |
(120) 0x41cfe4 LD1D {Z29.D}, P1/Z, [X17, X1,LSL #3] |
(120) 0x41cfe8 LD1D {Z16.D}, P1/Z, [X18, X1,LSL #3] |
(120) 0x41cfec FMUL Z20.D, Z17.D, Z6.D |
(120) 0x41cff0 FADD Z23.D, Z21.D, Z19.D |
(120) 0x41cff4 FMUL Z22.D, Z20.D, Z3.D |
(120) 0x41cff8 FADD Z26.D, Z24.D, Z23.D |
(120) 0x41cffc FMAD Z22.D, P0/M, Z18.D, Z2.D |
(120) 0x41d000 FADD Z28.D, Z25.D, Z26.D |
(120) 0x41d004 LD1D {Z2.D}, P1/Z, [X30, X1,LSL #3] |
(120) 0x41d008 FMUL Z30.D, Z28.D, Z27.D |
(120) 0x41d00c FDIV Z29.D, P0/M, Z29.D, Z31.D |
(120) 0x41d010 FMUL Z0.D, Z30.D, Z3.D |
(120) 0x41d014 FMSB Z0.D, P0/M, Z18.D, Z22.D |
(120) 0x41d018 LD1D {Z18.D}, P1/Z, [X16, X1,LSL #3] |
(120) 0x41d01c FADD Z5.D, Z2.D, Z0.D |
(120) 0x41d020 FDIV Z18.D, P0/M, Z18.D, Z31.D |
(120) 0x41d024 FDIVR Z5.D, P0/M, Z5.D, Z2.D |
(120) 0x41d028 FADD Z1.D, Z18.D, Z29.D |
(120) 0x41d02c FDIVR Z2.D, P0/M, Z2.D, Z4.D |
(120) 0x41d030 FMUL Z7.D, Z1.D, Z0.D |
(120) 0x41d034 FMSB Z7.D, P0/M, Z2.D, Z16.D |
(120) 0x41d038 ST1D {Z7.D}, P1, [X3, X1,LSL #3] |
(120) 0x41d03c LD1D {Z6.D}, P1/Z, [X0, X1,LSL #3] |
(120) 0x41d040 FMUL Z17.D, Z6.D, Z5.D |
(120) 0x41d044 ST1D {Z17.D}, P1, [X2, X1,LSL #3] |
(120) 0x41d048 INCD X1, ALL |
(120) 0x41d04c WHILELO P1.D, X1, X4 |
(120) 0x41d050 B.NE 41cf50 |
0x41d054 LDR W27, [SP, #136] |
0x41d058 LDR W26, [SP, #152] |
0x41d05c LDR W23, [SP, #112] |
0x41d060 LDR X25, [SP, #160] |
0x41d064 CMP W27, W26 |
0x41d068 CSEL W22, W23, W27, #1 |
0x41d06c STR W22, [SP, #112] |
0x41d070 LDR X27, [SP, #168] |
0x41d074 LDR X26, [SP, #176] |
0x41d078 ADD X14, X14, X25 |
0x41d07c LDR X21, [SP, #192] |
0x41d080 ADD X13, X13, X27 |
0x41d084 ADD X7, X7, X27 |
0x41d088 LDR X24, [SP, #200] |
0x41d08c ADD X12, X12, X26 |
0x41d090 ADD X6, X6, X26 |
0x41d094 LDR W19, [SP, #104] |
0x41d098 CSINC W1, W19, WZR, #1 |
0x41d09c ADD X11, X11, X21 |
0x41d0a0 ADD X10, X10, X21 |
0x41d0a4 STR W1, [SP, #104] |
0x41d0a8 LDR W20, [SP, #100] |
0x41d0ac ADD X9, X9, X24 |
0x41d0b0 ADD X8, X8, X24 |
0x41d0b4 LDR W26, [SP, #144] |
0x41d0b8 LDR X25, [SP, #184] |
0x41d0bc LDR X24, [SP, #208] |
0x41d0c0 LDR X23, [SP, #216] |
0x41d0c4 ADD X5, X5, X25 |
0x41d0c8 ADD X15, X15, X25 |
0x41d0cc LDR X22, [SP, #224] |
0x41d0d0 ADD X30, X30, X24 |
0x41d0d4 LDR X21, [SP, #232] |
0x41d0d8 ADD X17, X17, X23 |
0x41d0dc LDR X19, [SP, #240] |
0x41d0e0 ADD X0, X0, X22 |
0x41d0e4 LDR X1, [SP, #248] |
0x41d0e8 ADD X16, X16, X21 |
0x41d0ec LDR X27, [SP, #256] |
0x41d0f0 ADD X18, X18, X19 |
0x41d0f4 ADD X3, X3, X1 |
0x41d0f8 ADD X2, X2, X27 |
0x41d0fc CMP W26, W20 |
0x41d100 B.GT 41cf08 |
/home/hbollore/qaas-runs/170-309-0949/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/PdV_kernel.f90: 114 - 135 |
-------------------------------------------------------------------------------- |
114: +xvel1(j ,k )+xvel1(j ,k+1)))*0.25_8*dt |
115: right_flux= (xarea(j+1,k )*(xvel0(j+1,k )+xvel0(j+1,k+1) & |
116: +xvel1(j+1,k )+xvel1(j+1,k+1)))*0.25_8*dt |
117: bottom_flux=(yarea(j ,k )*(yvel0(j ,k )+yvel0(j+1,k ) & |
118: +yvel1(j ,k )+yvel1(j+1,k )))*0.25_8*dt |
119: top_flux= (yarea(j ,k+1)*(yvel0(j ,k+1)+yvel0(j+1,k+1) & |
120: +yvel1(j ,k+1)+yvel1(j+1,k+1)))*0.25_8*dt |
121: total_flux=right_flux-left_flux+top_flux-bottom_flux |
122: |
123: volume_change_s=volume(j,k)/(volume(j,k)+total_flux) |
[...] |
129: recip_volume=1.0/volume(j,k) |
130: |
131: energy_change=(pressure(j,k)/density0(j,k)+viscosity(j,k)/density0(j,k))*total_flux*recip_volume |
132: |
133: energy1(j,k)=energy0(j,k)-energy_change |
134: |
135: density1(j,k)=density0(j,k)*volume_change_s |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.75 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 5.41 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.02 |
| Bottlenecks | |
| Function | pdv_kernel._omp_fn.0 |
| Source | PdV_kernel.f90:114-114,PdV_kernel.f90:135-135 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 8.63 |
| CQA cycles if no scalar integer | 4.92 |
| CQA cycles if FP arith vectorized | 8.63 |
| CQA cycles if fully vectorized | 1.59 |
| Front-end cycles | 7.06 |
| DIV/SQRT cycles | 1.00 |
| P0 cycles | 1.00 |
| P1 cycles | 7.38 |
| P2 cycles | 7.38 |
| P3 cycles | 7.38 |
| P4 cycles | 7.38 |
| P5 cycles | 0.00 |
| P6 cycles | 0.00 |
| P7 cycles | 0.00 |
| P8 cycles | 0.00 |
| P9 cycles | 8.50 |
| P10 cycles | 8.17 |
| P11 cycles | 8.33 |
| P12 cycles | 1.50 |
| P13 cycles | 1.50 |
| P14 cycles | 0.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 56.50 |
| Nb uops | 56.50 |
| Nb loads | NA |
| Nb stores | 3.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 17.63 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 140.00 |
| Bytes stored | 12.00 |
| Stride 0 | NA |
| Stride 1 | NA |
| Stride n | NA |
| Stride unknown | NA |
| Stride indirect | NA |
| Vectorization ratio all | 1.67 |
| Vectorization ratio load | NA |
| Vectorization ratio store | NA |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | 0.00 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 12.50 |
| Vector-efficiency ratio all | 23.27 |
| Vector-efficiency ratio load | NA |
| Vector-efficiency ratio store | NA |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | 24.43 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 14.06 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 6.56 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 4.67 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.03 |
| Bottlenecks | P2, P3, P4, P5, |
| Function | pdv_kernel._omp_fn.0 |
| Source | PdV_kernel.f90:114-114,PdV_kernel.f90:135-135 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 8.75 |
| CQA cycles if no scalar integer | 1.33 |
| CQA cycles if FP arith vectorized | 8.75 |
| CQA cycles if fully vectorized | 1.88 |
| Front-end cycles | 7.75 |
| DIV/SQRT cycles | 1.00 |
| P0 cycles | 1.00 |
| P1 cycles | 8.75 |
| P2 cycles | 8.75 |
| P3 cycles | 8.75 |
| P4 cycles | 8.75 |
| P5 cycles | 0.00 |
| P6 cycles | 0.00 |
| P7 cycles | 0.00 |
| P8 cycles | 0.00 |
| P9 cycles | 8.50 |
| P10 cycles | 8.17 |
| P11 cycles | 8.33 |
| P12 cycles | 1.50 |
| P13 cycles | 1.50 |
| P14 cycles | 0.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 62.00 |
| Nb uops | 62.00 |
| Nb loads | NA |
| Nb stores | 3.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 17.37 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 140.00 |
| Bytes stored | 12.00 |
| Stride 0 | NA |
| Stride 1 | NA |
| Stride n | NA |
| Stride unknown | NA |
| Stride indirect | NA |
| Vectorization ratio all | 3.33 |
| Vectorization ratio load | NA |
| Vectorization ratio store | NA |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | 0.00 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 25.00 |
| Vector-efficiency ratio all | 23.33 |
| Vector-efficiency ratio load | NA |
| Vector-efficiency ratio store | NA |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | 24.52 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 15.63 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 6.48 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.02 |
| Bottlenecks | P10, |
| Function | pdv_kernel._omp_fn.0 |
| Source | PdV_kernel.f90:114-114,PdV_kernel.f90:135-135 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 8.50 |
| CQA cycles if no scalar integer | 8.50 |
| CQA cycles if FP arith vectorized | 8.50 |
| CQA cycles if fully vectorized | 1.31 |
| Front-end cycles | 6.38 |
| DIV/SQRT cycles | 1.00 |
| P0 cycles | 1.00 |
| P1 cycles | 6.00 |
| P2 cycles | 6.00 |
| P3 cycles | 6.00 |
| P4 cycles | 6.00 |
| P5 cycles | 0.00 |
| P6 cycles | 0.00 |
| P7 cycles | 0.00 |
| P8 cycles | 0.00 |
| P9 cycles | 8.50 |
| P10 cycles | 8.17 |
| P11 cycles | 8.33 |
| P12 cycles | 1.50 |
| P13 cycles | 1.50 |
| P14 cycles | 0.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 51.00 |
| Nb uops | 51.00 |
| Nb loads | NA |
| Nb stores | 3.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 17.88 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 140.00 |
| Bytes stored | 12.00 |
| Stride 0 | NA |
| Stride 1 | NA |
| Stride n | NA |
| Stride unknown | NA |
| Stride indirect | NA |
| Vectorization ratio all | 0.00 |
| Vectorization ratio load | NA |
| Vectorization ratio store | NA |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | 0.00 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 0.00 |
| Vector-efficiency ratio all | 23.21 |
| Vector-efficiency ratio load | NA |
| Vector-efficiency ratio store | NA |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | 24.34 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 12.50 |
| Path / |
| Function | pdv_kernel._omp_fn.0 |
| Source file and lines | PdV_kernel.f90:114-135 |
| Module | exec |
 |
| nb instructions | 56.50 |
| loop length | 226 |
| nb stack references | 0 |
| front end | 7.06 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 1.00 | 1.00 | 7.38 | 7.38 | 7.38 | 7.38 | 0.00 | 0.00 | 0.00 | 0.00 | 8.50 | 8.17 | 8.33 | 1.50 | 1.50 |
| cycles | 1.00 | 1.00 | 7.38 | 7.38 | 7.38 | 7.38 | 0.00 | 0.00 | 0.00 | 0.00 | 8.50 | 8.17 | 8.33 | 1.50 | 1.50 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 1.00 |
| Front-end | 7.06 |
| Data deps. | 1.00 |
| Overall L1 | 8.63 |
| all | 1% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 12% |
| Function | pdv_kernel._omp_fn.0 |
| Source file and lines | PdV_kernel.f90:114-135 |
| Module | exec |
|
| nb instructions | 62 |
| loop length | 248 |
| nb stack references | 0 |
| front end | 7.75 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 1.00 | 1.00 | 8.75 | 8.75 | 8.75 | 8.75 | 0.00 | 0.00 | 0.00 | 0.00 | 8.50 | 8.17 | 8.33 | 1.50 | 1.50 |
| cycles | 1.00 | 1.00 | 8.75 | 8.75 | 8.75 | 8.75 | 0.00 | 0.00 | 0.00 | 0.00 | 8.50 | 8.17 | 8.33 | 1.50 | 1.50 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 1.00 |
| Front-end | 7.75 |
| Data deps. | 1.00 |
| Overall L1 | 8.75 |
| all | 3% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 25% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| LDR W20, [SP, #100] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| LDR W27, [SP, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| LDR W25, [SP, #120] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| ADD W22, W20, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| STR W22, [SP, #100] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
| CMP W25, W27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
| B.GT 41d054 <__pdv_kernel_module_MOD_pdv_kernel._omp_fn.0+0x774> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
| ADD X27, X14, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| ADD X26, X13, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| ORR P1.B, P2/Z, P2.B, P2.B | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
| ADD X25, X7, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| ADD X24, X12, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| ADD X23, X6, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| ADD X22, X11, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| ADD X21, X9, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| ADD X20, X10, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| ADD X19, X8, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| MOVZ X1, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| LDR W27, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| LDR W26, [SP, #152] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| LDR W23, [SP, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| LDR X25, [SP, #160] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| CMP W27, W26 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
| CSEL W22, W23, W27, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| STR W22, [SP, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
| LDR X27, [SP, #168] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| LDR X26, [SP, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| ADD X14, X14, X25 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| LDR X21, [SP, #192] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| ADD X13, X13, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| ADD X7, X7, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| LDR X24, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| ADD X12, X12, X26 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| ADD X6, X6, X26 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| LDR W19, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| CSINC W1, W19, WZR, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| ADD X11, X11, X21 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| ADD X10, X10, X21 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| STR W1, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
| LDR W20, [SP, #100] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| ADD X9, X9, X24 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| ADD X8, X8, X24 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| LDR W26, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| LDR X25, [SP, #184] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| LDR X24, [SP, #208] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| LDR X23, [SP, #216] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| ADD X5, X5, X25 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| ADD X15, X15, X25 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| LDR X22, [SP, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| ADD X30, X30, X24 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| LDR X21, [SP, #232] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| ADD X17, X17, X23 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| LDR X19, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| ADD X0, X0, X22 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| LDR X1, [SP, #248] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| ADD X16, X16, X21 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| LDR X27, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| ADD X18, X18, X19 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| ADD X3, X3, X1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| ADD X2, X2, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| CMP W26, W20 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
| B.GT 41cf08 <__pdv_kernel_module_MOD_pdv_kernel._omp_fn.0+0x628> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
| Function | pdv_kernel._omp_fn.0 |
| Source file and lines | PdV_kernel.f90:114-135 |
| Module | exec |
|
| nb instructions | 51 |
| loop length | 204 |
| nb stack references | 0 |
| front end | 6.38 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 1.00 | 1.00 | 6.00 | 6.00 | 6.00 | 6.00 | 0.00 | 0.00 | 0.00 | 0.00 | 8.50 | 8.17 | 8.33 | 1.50 | 1.50 |
| cycles | 1.00 | 1.00 | 6.00 | 6.00 | 6.00 | 6.00 | 0.00 | 0.00 | 0.00 | 0.00 | 8.50 | 8.17 | 8.33 | 1.50 | 1.50 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 1.00 |
| Front-end | 6.38 |
| Data deps. | 1.00 |
| Overall L1 | 8.50 |
| all | 0% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 0% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| LDR W20, [SP, #100] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| LDR W27, [SP, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| LDR W25, [SP, #120] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| ADD W22, W20, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| STR W22, [SP, #100] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
| CMP W25, W27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
| B.GT 41d054 <__pdv_kernel_module_MOD_pdv_kernel._omp_fn.0+0x774> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
| LDR W27, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| LDR W26, [SP, #152] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| LDR W23, [SP, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| LDR X25, [SP, #160] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| CMP W27, W26 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
| CSEL W22, W23, W27, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| STR W22, [SP, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
| LDR X27, [SP, #168] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| LDR X26, [SP, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| ADD X14, X14, X25 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| LDR X21, [SP, #192] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| ADD X13, X13, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| ADD X7, X7, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| LDR X24, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| ADD X12, X12, X26 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| ADD X6, X6, X26 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| LDR W19, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| CSINC W1, W19, WZR, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| ADD X11, X11, X21 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| ADD X10, X10, X21 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| STR W1, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
| LDR W20, [SP, #100] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| ADD X9, X9, X24 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| ADD X8, X8, X24 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| LDR W26, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| LDR X25, [SP, #184] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| LDR X24, [SP, #208] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| LDR X23, [SP, #216] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| ADD X5, X5, X25 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| ADD X15, X15, X25 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| LDR X22, [SP, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| ADD X30, X30, X24 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| LDR X21, [SP, #232] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| ADD X17, X17, X23 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| LDR X19, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| ADD X0, X0, X22 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| LDR X1, [SP, #248] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| ADD X16, X16, X21 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| LDR X27, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
| ADD X18, X18, X19 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| ADD X3, X3, X1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| ADD X2, X2, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| CMP W26, W20 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
| B.GT 41cf08 <__pdv_kernel_module_MOD_pdv_kernel._omp_fn.0+0x628> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |