OV - exec - Function __nv_viscosity_kernel_module_viscosity_kernel__F1L50_1

	Function: __nv_viscosity_kernel_module_viscosity_kernel__F1L50_1_	Module: exec	Source: viscosity_kernel.f90-pp.f90:50-96	Coverage: 2.49%

/home/hbollore/qaas-runs/170-308-3604/intel/CloverLeafFC/build/armclang_1/CMakeFiles/clover_leaf.dir/CloverLeaf_ref/kernels/viscosity_kernel.f90-pp.f90: 50 - 96

--------------------------------------------------------------------------------

50: # 50 "/home/hbollore/qaas-runs/170-308-3604/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/viscosity_kernel.f90"

51:     !$OMP PARALLEL

52: # 52 "/home/hbollore/qaas-runs/170-308-3604/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/viscosity_kernel.f90"

53:     !$OMP DO PRIVATE(ugrad,vgrad,div,strain2,pgradx,pgrady,pgradx2,pgrady2,limiter,pgrad,xgrad,ygrad,grad,grad2,dirx,diry)

54:     DO k=y_min,y_max

55:     !$OMP SIMD

56:       DO j=x_min,x_max

57:         ugrad=(xvel0(j+1,k  )+xvel0(j+1,k+1))-(xvel0(j  ,k  )+xvel0(j  ,k+1))

58: # 58 "/home/hbollore/qaas-runs/170-308-3604/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/viscosity_kernel.f90"

59:         vgrad=(yvel0(j  ,k+1)+yvel0(j+1,k+1))-(yvel0(j  ,k  )+yvel0(j+1,k  ))

60: # 60 "/home/hbollore/qaas-runs/170-308-3604/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/viscosity_kernel.f90"

61:         div = (celldx(j)*(ugrad)+  celldy(k)*(vgrad))

62: # 62 "/home/hbollore/qaas-runs/170-308-3604/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/viscosity_kernel.f90"

63:         strain2 = 0.5_8*(xvel0(j,  k+1) + xvel0(j+1,k+1)-xvel0(j  ,k  )-xvel0(j+1,k  ))/celldy(k) &

64:           + 0.5_8*(yvel0(j+1,k  ) + yvel0(j+1,k+1)-yvel0(j  ,k  )-yvel0(j  ,k+1))/celldx(j)

65: # 65 "/home/hbollore/qaas-runs/170-308-3604/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/viscosity_kernel.f90"

66:         pgradx=(pressure(j+1,k)-pressure(j-1,k))/(celldx(j)+celldx(j+1))

67:         pgrady=(pressure(j,k+1)-pressure(j,k-1))/(celldy(k)+celldy(k+1))

68: # 68 "/home/hbollore/qaas-runs/170-308-3604/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/viscosity_kernel.f90"

69:         pgradx2 = pgradx*pgradx

70:         pgrady2 = pgrady*pgrady

71: # 71 "/home/hbollore/qaas-runs/170-308-3604/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/viscosity_kernel.f90"

72:         limiter = ((0.5_8*(ugrad)/celldx(j))*pgradx2+(0.5_8*(vgrad)/celldy(k))*pgrady2+strain2*pgradx*pgrady)  &

73:           /MAX(pgradx2+pgrady2,1.0e-16_8)

74: # 74 "/home/hbollore/qaas-runs/170-308-3604/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/viscosity_kernel.f90"

75:         IF ((limiter.GT.0.0).OR.(div.GE.0.0))THEN

76:           viscosity(j,k) = 0.0

77:         ELSE

78:           dirx=1.0_8

79:           IF(pgradx.LT.0.0) dirx=-1.0_8

80:           pgradx = dirx*MAX(1.0e-16_8,ABS(pgradx))

81:           diry=1.0_8

82:           IF(pgradx.LT.0.0) diry=-1.0_8

83:           pgrady = diry*MAX(1.0e-16_8,ABS(pgrady))

84:           pgrad = SQRT(pgradx**2+pgrady**2)

85:           xgrad = ABS(celldx(j)*pgrad/pgradx)

86:           ygrad = ABS(celldy(k)*pgrad/pgrady)

87:           grad  = MIN(xgrad,ygrad)

88:           grad2 = grad*grad

89: # 89 "/home/hbollore/qaas-runs/170-308-3604/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/viscosity_kernel.f90"

90:           viscosity(j,k)=2.0_8*density0(j,k)*grad2*limiter*limiter

91:         ENDIF

92: # 92 "/home/hbollore/qaas-runs/170-308-3604/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/viscosity_kernel.f90"

93:       ENDDO

94:     ENDDO

95:   !$OMP END DO

96: # 96 "/home/hbollore/qaas-runs/170-308-3604/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/viscosity_kernel.f90"

0x449f90 SUB	SP, SP, #208

0x449f94 STP	X29, X30, [SP, #112]

0x449f98 STP	X28, X27, [SP, #128]

0x449f9c STP	X26, X25, [SP, #144]

0x449fa0 STP	X24, X23, [SP, #160]

0x449fa4 STP	X22, X21, [SP, #176]

0x449fa8 STP	X20, X19, [SP, #192]

0x449fac LDP	X8, X9, [X2]

0x449fb0 LDR	W21, [X0]

0x449fb4 ORR	X0, XZR, XZR

0x449fb8 ORR	X20, XZR, X2

0x449fbc ADD	X3, SP, #108

0x449fc0 ADD	X4, SP, #104

0x449fc4 ADD	X5, SP, #100

0x449fc8 STR	WZR, [SP, #108]

0x449fcc ADD	X6, SP, #96

0x449fd0 MOVZ	W2, #34

0x449fd4 MOVZ	W7, #1

0x449fd8 LDR	W19, [X9]

0x449fdc LDR	W8, [X8]

0x449fe0 ORR	W1, WZR, W21

0x449fe4 STP	W19, W8, [SP, #100]

0x449fe8 MOVZ	W8, #1

0x449fec STR	W8, [SP, #96]

0x449ff0 STR	W8, [SP]

0x449ff4 BL	404c10

0x449ff8 LDRSW	X8, [SP, #104]

0x449ffc CMP	W8, W19

0x44a000 B.GT	44a594

0x44a004 LDR	W9, [SP, #100]

0x44a008 SUBS	W9, W9, W8

0x44a00c B.MI	44a594

0x44a010 LDP	X11, X10, [X20, #16]

0x44a014 PTRUE	P0.D, ALL

0x44a018 CNTD	X0, ALL

0x44a01c FMOV	D0, #0.5000000

0x44a020 DUP	Z4.D, #0

0x44a024 ADD	W9, W9, #1

0x44a028 ADD	X13, X20, #208

0x44a02c ADD	X15, X8, #1

0x44a030 LDR	W10, [X10]

0x44a034 LDRSW	X5, [X11]

0x44a038 SUB	X17, X8, #1

0x44a03c UBFM	X18, X8, #61, #60

0x44a040 MOVZ	X1, #1

0x44a044 STR	W21, [SP, #12]

0x44a048 SUB	W6, W10, W5

0x44a04c SUB	W10, W10, W5

0x44a050 STR	X5, [SP, #32]

0x44a054 INDEX	Z2.D, X5, #1

0x44a058 ADD	W11, W6, #1

0x44a05c STR	W6, [SP, #28]

0x44a060 STR	W11, [SP, #92]

0x44a064 CMP	W11, #1

0x44a068 MOVZ	W11, #1

0x44a06c CSINC	W11, W11, W6, #10

0x44a070 SUB	W10, W10, W11

0x44a074 ADD	W10, W10, #1

0x44a078 ADD	X16, X10, #1

0x44a07c UBFM	X10, X5, #61, #60

0x44a080 STR	X10, [SP, #16]

0x44a084 ADRP	X10,

0x44a088 LDR	D1, [X10, #2424]

0x44a08c ADRP	X10,

0x44a090 ADD	X10, X10, #2424

0x44a094 STR	X16, [SP, #80]

0x44a098 LD1RD	{Z3.D}, P0/Z, [X10]

0x44a09c B	44a0bc

0x44a0a0 LDR	X16, [SP, #80]

(1020) 0x44a0a4 ADD	X8, X8, #1

(1020) 0x44a0a8 SUBS	W9, W9, #1

(1020) 0x44a0ac ADD	X15, X15, #1

(1020) 0x44a0b0 ADD	X17, X17, #1

(1020) 0x44a0b4 ADD	X18, X18, #8

(1020) 0x44a0b8 B.LE	44a590

(1020) 0x44a0bc TBNZ	W6, #31, 44a0a4

0x44a0c0 LDR	X10, [X20, #56]

0x44a0c4 LDR	X11, [X20, #144]

0x44a0c8 LDR	X29, [X20, #32]

0x44a0cc ORR	X24, XZR, X5

0x44a0d0 CMP	X16, X0

0x44a0d4 LDR	X30, [X20, #112]

0x44a0d8 LDR	W28, [SP, #92]

0x44a0dc LDR	X2, [X10]

0x44a0e0 LDP	X10, X19, [X20, #96]

0x44a0e4 LDR	X3, [X10]

0x44a0e8 LDP	X10, X4, [X20, #168]

0x44a0ec LDR	X10, [X10]

0x44a0f0 SUB	X10, X8, X10

0x44a0f4 ADD	X10, X11, X10,LSL #3

0x44a0f8 LDP	X12, X11, [X20, #128]

0x44a0fc LDP	D5, D6, [X10]

0x44a100 LDR	X23, [X11]

0x44a104 LDR	X11, [X20, #192]

0x44a108 LDR	X21, [X12]

0x44a10c LDR	X22, [X11]

0x44a110 FADD	D6, D5, D6

0x44a114 B.CC	44a38c

0x44a118 UDIV	X10, X16, X0

0x44a11c MADD	X11, X21, X8, XZR

0x44a120 MADD	X12, X2, X8, X5

0x44a124 ORR	X6, XZR, X16

0x44a128 ORR	X7, XZR, X30

0x44a12c LDR	X30, [X20, #200]

0x44a130 ORR	X25, XZR, XZR

0x44a134 DUP	Z16.D, Z5.D[0]

0x44a138 DUP	Z17.D, Z6.D[0]

0x44a13c ORR	Z18.D, Z2.D, Z2.D

0x44a140 ADD	X26, X4, #8

0x44a144 SUB	X27, X4, #8

0x44a148 SUB	X11, X11, X22

0x44a14c SUB	X12, X12, X3

0x44a150 STP	X23, X7, [SP, #64]

0x44a154 UBFM	X14, X12, #61, #60

0x44a158 ORR	X12, XZR, X19

0x44a15c STP	X12, X29, [SP, #48]

0x44a160 ADD	X12, X12, X14

0x44a164 DUP	Z7.D, X11

0x44a168 MADD	X11, X2, X15, X5

0x44a16c SUB	X11, X11, X3

0x44a170 UBFM	X11, X11, #61, #60

0x44a174 ADD	X19, X19, X11

0x44a178 ADD	X16, X29, X11

0x44a17c ADD	X11, X29, X14

0x44a180 MADD	X14, X10, X0, XZR

0x44a184 SUB	X10, X6, X14

0x44a188 ADD	X24, X14, X5

0x44a18c STR	X10, [SP, #40]

0x44a190 LDR	W10, [SP, #92]

0x44a194 DUP	Z19.D, X0

0x44a198 SUB	W28, W10, W14

0x44a19c LDR	X10, [SP, #16]

0x44a1a0 ADD	X10, X7, X10

0x44a1a4 SUB	X29, X10, X23,LSL #3

0x44a1a8 MADD	X10, X21, X15, X5

0x44a1ac MADD	X5, X21, X17, X5

0x44a1b0 SUB	X10, X10, X22

0x44a1b4 SUB	X5, X5, X22

0x44a1b8 ADD	X10, X4, X10,LSL #3

0x44a1bc ADD	X5, X4, X5,LSL #3

(1022) 0x44a1c0 UBFM	X6, X25, #61, #60

(1022) 0x44a1c4 ADD	X7, X16, X6

(1022) 0x44a1c8 ADD	X23, X11, X6

(1022) 0x44a1cc LD1D	{Z20.D}, P0/Z, [X7, X1,LSL #3]

(1022) 0x44a1d0 LD1D	{Z21.D}, P0/Z, [X23, X1,LSL #3]

(1022) 0x44a1d4 LD1D	{Z23.D}, P0/Z, [X7, MUL VL]

(1022) 0x44a1d8 ADD	X7, X19, X6

(1022) 0x44a1dc LD1D	{Z24.D}, P0/Z, [X23, MUL VL]

(1022) 0x44a1e0 LD1D	{Z26.D}, P0/Z, [X7, X1,LSL #3]

(1022) 0x44a1e4 LD1D	{Z27.D}, P0/Z, [X7, MUL VL]

(1022) 0x44a1e8 ADD	X7, X12, X6

(1022) 0x44a1ec ADD	X6, X29, X6

(1022) 0x44a1f0 LD1D	{Z28.D}, P0/Z, [X7, X1,LSL #3]

(1022) 0x44a1f4 FADD	Z25.D, Z23.D, Z24.D

(1022) 0x44a1f8 LD1D	{Z29.D}, P0/Z, [X7, MUL VL]

(1022) 0x44a1fc LD1D	{Z31.D}, P0/Z, [X6, MUL VL]

(1022) 0x44a200 FADD	Z22.D, Z20.D, Z21.D

(1022) 0x44a204 FADD	Z20.D, Z20.D, Z23.D

(1022) 0x44a208 FSUB	Z22.D, Z22.D, Z25.D

(1022) 0x44a20c FADD	Z25.D, Z26.D, Z27.D

(1022) 0x44a210 FSUB	Z20.D, Z20.D, Z24.D

(1022) 0x44a214 FADD	Z26.D, Z26.D, Z28.D

(1022) 0x44a218 FSUB	Z20.D, Z20.D, Z21.D

(1022) 0x44a21c FADD	Z30.D, Z28.D, Z29.D

(1022) 0x44a220 FSUB	Z26.D, Z26.D, Z29.D

(1022) 0x44a224 FMUL	Z20.D, P0/M, Z20.D, #0

(1022) 0x44a228 MOVPRFX	Z21, Z20

(1022) 0x44a22c FDIV	Z21.D, P0/M, Z21.D, Z16.D

(1022) 0x44a230 ADD	Z20.D, Z7.D, Z18.D

(1022) 0x44a234 FSUB	Z25.D, Z25.D, Z30.D

(1022) 0x44a238 MOVPRFX	Z29, Z25

(1022) 0x44a23c FMUL	Z29.D, P0/M, Z29.D, #0

(1022) 0x44a240 FDIV	Z29.D, P0/M, Z29.D, Z16.D

(1022) 0x44a244 ADD	Z18.D, Z18.D, Z19.D

(1022) 0x44a248 FSUB	Z26.D, Z26.D, Z27.D

(1022) 0x44a24c FMOV	X7, D20

(1022) 0x44a250 FMUL	Z27.D, Z22.D, Z31.D

(1022) 0x44a254 FMUL	Z22.D, P0/M, Z22.D, #0

(1022) 0x44a258 FMUL	Z26.D, P0/M, Z26.D, #0

(1022) 0x44a25c LD1D	{Z23.D}, P0/Z, [X26, X7,LSL #3]

(1022) 0x44a260 LD1D	{Z24.D}, P0/Z, [X27, X7,LSL #3]

(1022) 0x44a264 FDIV	Z22.D, P0/M, Z22.D, Z31.D

(1022) 0x44a268 FMAD	Z25.D, P0/M, Z16.D, Z27.D

(1022) 0x44a26c FDIV	Z26.D, P0/M, Z26.D, Z31.D

(1022) 0x44a270 FCMGE	P2.D, P0/Z, Z25.D, #0

(1022) 0x44a274 FSUB	Z23.D, Z23.D, Z24.D

(1022) 0x44a278 LD1D	{Z24.D}, P0/Z, [X6, X1,LSL #3]

(1022) 0x44a27c FADD	Z24.D, Z31.D, Z24.D

(1022) 0x44a280 FDIV	Z23.D, P0/M, Z23.D, Z24.D

(1022) 0x44a284 LD1D	{Z24.D}, P0/Z, [X10, X25,LSL #3]

(1022) 0x44a288 FADD	Z21.D, Z21.D, Z26.D

(1022) 0x44a28c LD1D	{Z26.D}, P0/Z, [X5, X25,LSL #3]

(1022) 0x44a290 ADD	X25, X25, X0

(1022) 0x44a294 CMP	X14, X25

(1022) 0x44a298 FSUB	Z24.D, Z24.D, Z26.D

(1022) 0x44a29c FDIV	Z24.D, P0/M, Z24.D, Z17.D

(1022) 0x44a2a0 FMUL	Z26.D, Z23.D, Z23.D

(1022) 0x44a2a4 FMUL	Z21.D, Z21.D, Z23.D

(1022) 0x44a2a8 FMUL	Z22.D, Z22.D, Z26.D

(1022) 0x44a2ac FMUL	Z28.D, Z24.D, Z24.D

(1022) 0x44a2b0 FMLA	Z22.D, P0/M, Z28.D, Z29.D

(1022) 0x44a2b4 FMAD	Z21.D, P0/M, Z24.D, Z22.D

(1022) 0x44a2b8 FADD	Z22.D, Z26.D, Z28.D

(1022) 0x44a2bc FCMGE	P1.D, P0/Z, Z22.D, Z3.D

(1022) 0x44a2c0 SEL	Z22.D, P1, Z22.D, Z3.D

(1022) 0x44a2c4 FDIV	Z21.D, P0/M, Z21.D, Z22.D

(1022) 0x44a2c8 MOVPRFX	Z22, Z23

(1022) 0x44a2cc FABS	Z22.D, P0/M, Z23.D

(1022) 0x44a2d0 FCMGE	P3.D, P0/Z, Z22.D, Z3.D

(1022) 0x44a2d4 SEL	Z22.D, P3, Z22.D, Z3.D

(1022) 0x44a2d8 FCMLT	P3.D, P0/Z, Z23.D, #0

(1022) 0x44a2dc MOVPRFX	Z23, Z22

(1022) 0x44a2e0 FNEG	Z23.D, P0/M, Z22.D

(1022) 0x44a2e4 EOR	P3.B, P0/Z, P3.B, P0.B

(1022) 0x44a2e8 SEL	Z22.D, P3, Z22.D, Z23.D

(1022) 0x44a2ec MOVPRFX	Z23, Z24

(1022) 0x44a2f0 FABS	Z23.D, P0/M, Z24.D

(1022) 0x44a2f4 FCMLT	P3.D, P0/Z, Z22.D, #0

(1022) 0x44a2f8 EOR	P3.B, P0/Z, P3.B, P0.B

(1022) 0x44a2fc FCMGT	P1.D, P0/Z, Z21.D, #0

(1022) 0x44a300 EOR	P1.B, P0/Z, P1.B, P0.B

(1022) 0x44a304 BIC	P1.B, P1/Z, P1.B, P2.B

(1022) 0x44a308 FCMGE	P2.D, P0/Z, Z23.D, Z3.D

(1022) 0x44a30c SEL	Z23.D, P2, Z23.D, Z3.D

(1022) 0x44a310 MOVPRFX	Z24, Z23

(1022) 0x44a314 FNEG	Z24.D, P0/M, Z23.D

(1022) 0x44a318 SEL	Z23.D, P3, Z23.D, Z24.D

(1022) 0x44a31c FMUL	Z24.D, Z23.D, Z23.D

(1022) 0x44a320 FMLA	Z24.D, P0/M, Z22.D, Z22.D

(1022) 0x44a324 FSQRT	Z24.D, P0/M, Z24.D

(1022) 0x44a328 FMUL	Z25.D, Z31.D, Z24.D

(1022) 0x44a32c FMUL	Z24.D, Z16.D, Z24.D

(1022) 0x44a330 FDIVR	Z22.D, P0/M, Z22.D, Z25.D

(1022) 0x44a334 FDIVR	Z23.D, P0/M, Z23.D, Z24.D

(1022) 0x44a338 FABS	Z22.D, P0/M, Z22.D

(1022) 0x44a33c FABS	Z23.D, P0/M, Z23.D

(1022) 0x44a340 FCMGE	P2.D, P0/Z, Z22.D, Z23.D

(1022) 0x44a344 SEL	Z22.D, P2, Z23.D, Z22.D

(1022) 0x44a348 LD1D	{Z23.D}, P1/Z, [X13, Z4.D,LSL #3]

(1022) 0x44a34c FMUL	Z22.D, Z22.D, Z22.D

(1022) 0x44a350 ADR	Z23.D, [Z23, Z20.D,LSL #3]

(1022) 0x44a354 LD1D	{Z23.D}, P1/Z, [V23.D]

(1022) 0x44a358 FADD	Z23.D, Z23.D, Z23.D

(1022) 0x44a35c FMUL	Z22.D, Z22.D, Z23.D

(1022) 0x44a360 FMUL	Z22.D, Z21.D, Z22.D

(1022) 0x44a364 FMUL	Z21.D, Z21.D, Z22.D

(1022) 0x44a368 SEL	Z21.D, P1, Z21.D, Z4.D

(1022) 0x44a36c ST1D	{Z21.D}, P0, [X30, Z20.D,LSL #3]

(1022) 0x44a370 B.NE	44a1c0

0x44a374 LDP	X5, X10, [SP, #32]

0x44a378 LDR	W6, [SP, #28]

0x44a37c LDP	X30, X16, [SP, #72]

0x44a380 LDP	X29, X23, [SP, #56]

0x44a384 LDR	X19, [SP, #48]

0x44a388 CBZ	X10, 44a0a4

0x44a38c MADD	X11, X21, X17, X24

0x44a390 MADD	X14, X2, X15, X24

0x44a394 ADD	X12, X19, #8

0x44a398 ADD	X16, X29, #8

0x44a39c ADD	W26, W28, #1

0x44a3a0 LDR	X10, [X20, #200]

0x44a3a4 ORR	X19, XZR, X23

0x44a3a8 ORR	X25, XZR, XZR

0x44a3ac SUB	X11, X11, X22

0x44a3b0 SUB	X14, X14, X3

0x44a3b4 ADD	X7, X4, X11,LSL #3

0x44a3b8 UBFM	X11, X14, #61, #60

0x44a3bc UBFM	X14, X24, #61, #60

0x44a3c0 ADD	X23, X12, X11

0x44a3c4 ADD	X27, X16, X11

0x44a3c8 MADD	X11, X21, X15, X24

0x44a3cc SUB	X11, X11, X22

0x44a3d0 ADD	X28, X4, X11,LSL #3

0x44a3d4 MADD	X11, X2, X8, X24

0x44a3d8 MADD	X2, X21, X18, X14

0x44a3dc SUB	X11, X11, X3

0x44a3e0 SUB	X2, X2, X22,LSL #3

0x44a3e4 UBFM	X11, X11, #61, #60

0x44a3e8 ADD	X3, X12, X11

0x44a3ec ADD	X29, X16, X11

0x44a3f0 MADD	X11, X21, X8, X24

0x44a3f4 SUB	X12, X14, X19,LSL #3

0x44a3f8 SUB	X11, X11, X22

0x44a3fc ADD	X12, X30, X12

0x44a400 UBFM	X16, X11, #61, #60

0x44a404 ADD	X11, X4, X16

0x44a408 ADD	X14, X10, X16

0x44a40c SUB	X11, X11, #8

0x44a410 B	44a434

0x44a414 HINT	#0

0x44a418 HINT	#0

0x44a41c HINT	#0

(1021) 0x44a420 SUB	W26, W26, #1

(1021) 0x44a424 STR	D21, [X14, X25]

(1021) 0x44a428 ADD	X25, X25, #8

(1021) 0x44a42c CMP	W26, #1

(1021) 0x44a430 B.LE	44a0a0

(1021) 0x44a434 ADD	X10, X27, X25

(1021) 0x44a438 ADD	X16, X29, X25

(1021) 0x44a43c LDP	D20, D18, [X10, #1016]

(1021) 0x44a440 LDP	D21, D19, [X16, #1016]

(1021) 0x44a444 ADD	X10, X23, X25

(1021) 0x44a448 FADD	D7, D18, D19

(1021) 0x44a44c FADD	D16, D20, D21

(1021) 0x44a450 FADD	D18, D18, D20

(1021) 0x44a454 FSUB	D16, D7, S16

(1021) 0x44a458 LDP	D22, D7, [X10, #1016]

(1021) 0x44a45c ADD	X10, X3, X25

(1021) 0x44a460 FSUB	D18, D18, S21

(1021) 0x44a464 LDR	D21, [X7, X25]

(1021) 0x44a468 LDP	D24, D23, [X10, #1016]

(1021) 0x44a46c ADD	X10, X12, X25

(1021) 0x44a470 FSUB	D18, D18, S19

(1021) 0x44a474 FMUL	D18, D18, D0

(1021) 0x44a478 FADD	D17, D7, D22

(1021) 0x44a47c FADD	D7, D7, D23

(1021) 0x44a480 FDIV	D18, D18, D5

(1021) 0x44a484 FSUB	D7, D7, S24

(1021) 0x44a488 FADD	D25, D23, D24

(1021) 0x44a48c FMUL	D24, D16, D0

(1021) 0x44a490 FSUB	D7, D7, S22

(1021) 0x44a494 FSUB	D17, D17, S25

(1021) 0x44a498 FMUL	D22, D7, D0

(1021) 0x44a49c LDP	D7, D23, [X10]

(1021) 0x44a4a0 ADD	X10, X11, X25

(1021) 0x44a4a4 LDR	D19, [X10, #16]

(1021) 0x44a4a8 LDR	D20, [X10]

(1021) 0x44a4ac FDIV	D22, D22, D7

(1021) 0x44a4b0 FDIV	D24, D24, D7

(1021) 0x44a4b4 FSUB	D19, D19, S20

(1021) 0x44a4b8 FADD	D20, D7, D23

(1021) 0x44a4bc FMUL	D23, D17, D0

(1021) 0x44a4c0 FDIV	D19, D19, D20

(1021) 0x44a4c4 LDR	D20, [X28, X25]

(1021) 0x44a4c8 FDIV	D23, D23, D5

(1021) 0x44a4cc FSUB	D20, D20, S21

(1021) 0x44a4d0 FDIV	D20, D20, D6

(1021) 0x44a4d4 FADD	D18, D18, D22

(1021) 0x44a4d8 FMUL	D21, D19, D19

(1021) 0x44a4dc FMUL	D18, D18, D19

(1021) 0x44a4e0 FMUL	D24, D24, D21

(1021) 0x44a4e4 FMUL	D22, D20, D20

(1021) 0x44a4e8 FMADD	D23, D22, D23, D24

(1021) 0x44a4ec FADD	D21, D21, D22

(1021) 0x44a4f0 FMAXNM	D21, D21, D1

(1021) 0x44a4f4 FMADD	D18, D20, D18, D23

(1021) 0x44a4f8 FDIV	D18, D18, D21

(1021) 0x44a4fc MOVI	D21, #0

(1021) 0x44a500 FCMP	D18, #0

(1021) 0x44a504 B.GT	44a420

(1021) 0x44a508 FMUL	D16, D16, D7

(1021) 0x44a50c FMADD	D16, D5, D17, D16

(1021) 0x44a510 FCMP	D16, #0

(1021) 0x44a514 B.GE	44a420

(1021) 0x44a518 FABS	D16, D19

(1021) 0x44a51c FCMP	D19, #0

(1021) 0x44a520 LDR	X10, [X13]

(1021) 0x44a524 ADD	X10, X10, X2

(1021) 0x44a528 FMAXNM	D16, D16, D1

(1021) 0x44a52c FNEG	D17, D16

(1021) 0x44a530 FCSEL	D16, D16, D17, #5

(1021) 0x44a534 FABS	D17, D20

(1021) 0x44a538 FMAXNM	D17, D17, D1

(1021) 0x44a53c FCMP	D16, #0

(1021) 0x44a540 FNEG	D19, D17

(1021) 0x44a544 FCSEL	D17, D17, D19, #5

(1021) 0x44a548 FMUL	D19, D17, D17

(1021) 0x44a54c FMADD	D19, D16, D16, D19

(1021) 0x44a550 FSQRT	D19, D19

(1021) 0x44a554 FMUL	D7, D7, D19

(1021) 0x44a558 FDIV	D7, D7, D16

(1021) 0x44a55c FMUL	D16, D5, D19

(1021) 0x44a560 FDIV	D16, D16, D17

(1021) 0x44a564 FABS	D7, D7

(1021) 0x44a568 FABS	D16, D16

(1021) 0x44a56c FCMP	D7, D16

(1021) 0x44a570 FCSEL	D7, D16, D7, #10

(1021) 0x44a574 LDR	D16, [X10, X25]

(1021) 0x44a578 FMUL	D7, D7, D7

(1021) 0x44a57c FADD	D16, D16, D16

(1021) 0x44a580 FMUL	D7, D7, D16

(1021) 0x44a584 FMUL	D7, D18, D7

(1021) 0x44a588 FMUL	D21, D18, D7

(1021) 0x44a58c B	44a420

0x44a590 LDR	W21, [SP, #12]

0x44a594 ORR	X0, XZR, XZR

0x44a598 ORR	W1, WZR, W21

0x44a59c BL	404d30

0x44a5a0 ORR	X0, XZR, XZR

0x44a5a4 ORR	W1, WZR, W21

0x44a5a8 BL	404900

0x44a5ac LDP	X20, X19, [SP, #192]

0x44a5b0 LDP	X22, X21, [SP, #176]

0x44a5b4 LDP	X24, X23, [SP, #160]

0x44a5b8 LDP	X26, X25, [SP, #144]

0x44a5bc LDP	X28, X27, [SP, #128]

0x44a5c0 LDP	X29, X30, [SP, #112]

0x44a5c4 ADD	SP, SP, #208

0x44a5c8 RET

0x44a5cc HINT	#0

0x44a5d0 HINT	#0

0x44a5d4 HINT	#0

0x44a5d8 HINT	#0

0x44a5dc HINT	#0

Path /

Average path: Display a virtual path defined by average values of all real paths

Source file and lines	viscosity_kernel.f90-pp.f90:50-96
Module	exec

The function is defined in /home/hbollore/qaas-runs/170-308-3604/intel/CloverLeafFC/build/armclang_1/CMakeFiles/clover_leaf.dir/CloverLeaf_ref/kernels/viscosity_kernel.f90-pp.f90:50-96.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 27.75 to 3.00 cycles (9.25x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)
To reference allocatable arrays, use "allocatable" instead of "pointer" pointers or qualify them with the "contiguous" attribute (Fortran 2008)
For structures, limit to one indirection. For example, use a_b%c instead of a%b%c with a_b set to a%b before this function

Vectorization

Your function is probably not vectorized. Only 28% of vector register length is used (average across all VPU instructions). By vectorizing your function, you can lower the cost of an iteration from 27.75 to 20.42 cycles (1.36x speedup).

Details

Store and arithmetical VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): do i a(i)%x = b(i)%x (slow, non stride 1) => do i a%x(i) = b%x(i) (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 27.75 to 1.50 cycles (18.50x speedup).

Matching between your function (in the source code) and the binary function

The binary function is composed of 1 FP arithmetical operations:

1: addition or subtraction

The binary function is loading 428 bytes. The binary function is storing 192 bytes.

Arithmetic intensity

Arithmetic intensity is 0.00 FP operations per loaded or stored byte.

General properties

nb instructions	196
loop length	784
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

23.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	5.00	5.00	27.75	27.75	27.75	27.75	2.50	2.50	1.00	1.00	21.00	21.00	21.00	9.50	9.50
cycles	5.00	5.00	27.75	27.75	27.75	27.75	2.50	2.50	1.00	1.00	21.00	21.00	21.00	9.50	9.50

Execution ports to units layout:

P0:
P1:
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

1.00-0.50

Cycles summary

Front-end	23.50
Overall L1	27.75

Vectorization ratios

all	7%
load	33%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	0%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	14%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 27.75 cycles. At this rate:

16% of peak load performance is reached (15.42 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
14% of peak store performance is reached (6.92 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 449f90

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
SUB SP, SP, #208	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X29, X30, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X28, X27, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X26, X25, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X24, X23, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X22, X21, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X20, X19, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDP X8, X9, [X2]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDR W21, [X0]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X0, XZR, XZR	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X20, XZR, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X3, SP, #108	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X4, SP, #104	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X5, SP, #100	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR WZR, [SP, #108]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X6, SP, #96	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W2, #34	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W7, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR W19, [X9]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR W8, [X8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR W1, WZR, W21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP W19, W8, [SP, #100]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MOVZ W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR W8, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W8, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
BL 404c10 <@plt_start@+0x340>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDRSW X8, [SP, #104]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP W8, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 44a594 <__nv_viscosity_kernel_module_viscosity_kernel__F1L50_1_+0x604>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR W9, [SP, #100]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SUBS W9, W9, W8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.MI 44a594 <__nv_viscosity_kernel_module_viscosity_kernel__F1L50_1_+0x604>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDP X11, X10, [X20, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
PTRUE P0.D, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
CNTD X0, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
FMOV D0, #0.5000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
DUP Z4.D, #0	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
ADD W9, W9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X13, X20, #208	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X15, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR W10, [X10]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDRSW X5, [X11]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SUB X17, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
UBFM X18, X8, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X1, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR W21, [SP, #12]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
SUB W6, W10, W5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB W10, W10, W5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X5, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
INDEX Z2.D, X5, #1	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	5	2
ADD W11, W6, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR W6, [SP, #28]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W11, [SP, #92]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CMP W11, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
MOVZ W11, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CSINC W11, W11, W6, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB W10, W10, W11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD W10, W10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X16, X10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
UBFM X10, X5, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X10, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADRP X10, <45d084>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR D1, [X10, #2424]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
ADRP X10, <45d08c>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X10, X10, #2424	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X16, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LD1RD {Z3.D}, P0/Z, [X10]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
B 44a0bc <__nv_viscosity_kernel_module_viscosity_kernel__F1L50_1_+0x12c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X16, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X10, [X20, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X20, #144]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X29, [X20, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X24, XZR, X5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X16, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
LDR X30, [X20, #112]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR W28, [SP, #92]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X2, [X10]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDP X10, X19, [X20, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDR X3, [X10]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDP X10, X4, [X20, #168]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDR X10, [X10]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SUB X10, X8, X10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X10, X11, X10,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDP X12, X11, [X20, #128]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP D5, D6, [X10]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDR X23, [X11]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X20, #192]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X21, [X12]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X22, [X11]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
FADD D6, D5, D6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
B.CC 44a38c <__nv_viscosity_kernel_module_viscosity_kernel__F1L50_1_+0x3fc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
UDIV X10, X16, X0	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	5-20	1-0.50
MADD X11, X21, X8, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
MADD X12, X2, X8, X5	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ORR X6, XZR, X16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X7, XZR, X30	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X30, [X20, #200]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X25, XZR, XZR	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
DUP Z16.D, Z5.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
DUP Z17.D, Z6.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
ORR Z18.D, Z2.D, Z2.D	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
ADD X26, X4, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB X27, X4, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB X11, X11, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB X12, X12, X3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X23, X7, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
UBFM X14, X12, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X12, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X12, X29, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X12, X12, X14	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
DUP Z7.D, X11	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	1
MADD X11, X2, X15, X5	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
SUB X11, X11, X3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
UBFM X11, X11, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X19, X19, X11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X16, X29, X11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X11, X29, X14	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MADD X14, X10, X0, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
SUB X10, X6, X14	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X24, X14, X5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X10, [SP, #40]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR W10, [SP, #92]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
DUP Z19.D, X0	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	1
SUB W28, W10, W14	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X10, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X10, X7, X10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB X29, X10, X23,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MADD X10, X21, X15, X5	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
MADD X5, X21, X17, X5	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
SUB X10, X10, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB X5, X5, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X10, X4, X10,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X5, X4, X5,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDP X5, X10, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDR W6, [SP, #28]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDP X30, X16, [SP, #72]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X29, X23, [SP, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDR X19, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X10, 44a0a4 <__nv_viscosity_kernel_module_viscosity_kernel__F1L50_1_+0x114>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MADD X11, X21, X17, X24	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
MADD X14, X2, X15, X24	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X12, X19, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X16, X29, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD W26, W28, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X10, [X20, #200]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X19, XZR, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X25, XZR, XZR	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB X11, X11, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB X14, X14, X3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X7, X4, X11,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
UBFM X11, X14, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
UBFM X14, X24, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X23, X12, X11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X27, X16, X11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MADD X11, X21, X15, X24	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
SUB X11, X11, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X28, X4, X11,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MADD X11, X2, X8, X24	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
MADD X2, X21, X18, X14	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
SUB X11, X11, X3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB X2, X2, X22,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
UBFM X11, X11, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X3, X12, X11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X29, X16, X11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MADD X11, X21, X8, X24	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
SUB X12, X14, X19,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB X11, X11, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X12, X30, X12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
UBFM X16, X11, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X11, X4, X16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X14, X10, X16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB X11, X11, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 44a434 <__nv_viscosity_kernel_module_viscosity_kernel__F1L50_1_+0x4a4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0
HINT #0
HINT #0
LDR W21, [SP, #12]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X0, XZR, XZR	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR W1, WZR, W21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 404d30 <@plt_start@+0x460>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, XZR	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR W1, WZR, W21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 404900 <@plt_start@+0x30>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDP X20, X19, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X22, X21, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X24, X23, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X26, X25, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X28, X27, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X29, X30, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
ADD SP, SP, #208	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0
HINT #0
HINT #0
HINT #0
HINT #0

Source file and lines	viscosity_kernel.f90-pp.f90:50-96
Module	exec

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 27.75 to 3.00 cycles (9.25x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)
To reference allocatable arrays, use "allocatable" instead of "pointer" pointers or qualify them with the "contiguous" attribute (Fortran 2008)
For structures, limit to one indirection. For example, use a_b%c instead of a%b%c with a_b set to a%b before this function

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): do i a(i)%x = b(i)%x (slow, non stride 1) => do i a%x(i) = b%x(i) (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 27.75 to 1.50 cycles (18.50x speedup).

Matching between your function (in the source code) and the binary function

The binary function is composed of 1 FP arithmetical operations:

1: addition or subtraction

The binary function is loading 428 bytes. The binary function is storing 192 bytes.

Arithmetic intensity

Arithmetic intensity is 0.00 FP operations per loaded or stored byte.

General properties

nb instructions	196
loop length	784
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

23.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	5.00	5.00	27.75	27.75	27.75	27.75	2.50	2.50	1.00	1.00	21.00	21.00	21.00	9.50	9.50
cycles	5.00	5.00	27.75	27.75	27.75	27.75	2.50	2.50	1.00	1.00	21.00	21.00	21.00	9.50	9.50

Execution ports to units layout:

P0:
P1:
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

1.00-0.50

Cycles summary

Front-end	23.50
Overall L1	27.75

Vectorization ratios

all	7%
load	33%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	0%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	14%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 27.75 cycles. At this rate:

16% of peak load performance is reached (15.42 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
14% of peak store performance is reached (6.92 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 449f90

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput
SUB SP, SP, #208	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X29, X30, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X28, X27, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X26, X25, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X24, X23, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X22, X21, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STP X20, X19, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDP X8, X9, [X2]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDR W21, [X0]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X0, XZR, XZR	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X20, XZR, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X3, SP, #108	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X4, SP, #104	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X5, SP, #100	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR WZR, [SP, #108]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X6, SP, #96	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W2, #34	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ W7, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR W19, [X9]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR W8, [X8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR W1, WZR, W21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP W19, W8, [SP, #100]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
MOVZ W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR W8, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W8, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
BL 404c10 <@plt_start@+0x340>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDRSW X8, [SP, #104]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CMP W8, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.GT 44a594 <__nv_viscosity_kernel_module_viscosity_kernel__F1L50_1_+0x604>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR W9, [SP, #100]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SUBS W9, W9, W8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
B.MI 44a594 <__nv_viscosity_kernel_module_viscosity_kernel__F1L50_1_+0x604>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDP X11, X10, [X20, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
PTRUE P0.D, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
CNTD X0, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
FMOV D0, #0.5000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
DUP Z4.D, #0	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
ADD W9, W9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X13, X20, #208	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X15, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR W10, [X10]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDRSW X5, [X11]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SUB X17, X8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
UBFM X18, X8, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MOVZ X1, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR W21, [SP, #12]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
SUB W6, W10, W5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB W10, W10, W5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X5, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
INDEX Z2.D, X5, #1	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	5	2
ADD W11, W6, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR W6, [SP, #28]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
STR W11, [SP, #92]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
CMP W11, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
MOVZ W11, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CSINC W11, W11, W6, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB W10, W10, W11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD W10, W10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X16, X10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
UBFM X10, X5, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X10, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADRP X10, <45d084>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR D1, [X10, #2424]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
ADRP X10, <45d08c>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X10, X10, #2424	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X16, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LD1RD {Z3.D}, P0/Z, [X10]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	6	0.50
B 44a0bc <__nv_viscosity_kernel_module_viscosity_kernel__F1L50_1_+0x12c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDR X16, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X10, [X20, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X20, #144]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X29, [X20, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X24, XZR, X5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
CMP X16, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33
LDR X30, [X20, #112]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR W28, [SP, #92]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X2, [X10]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDP X10, X19, [X20, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDR X3, [X10]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDP X10, X4, [X20, #168]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDR X10, [X10]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
SUB X10, X8, X10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X10, X11, X10,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDP X12, X11, [X20, #128]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP D5, D6, [X10]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33
LDR X23, [X11]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X11, [X20, #192]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X21, [X12]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDR X22, [X11]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
FADD D6, D5, D6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25
B.CC 44a38c <__nv_viscosity_kernel_module_viscosity_kernel__F1L50_1_+0x3fc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
UDIV X10, X16, X0	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	5-20	1-0.50
MADD X11, X21, X8, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
MADD X12, X2, X8, X5	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ORR X6, XZR, X16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X7, XZR, X30	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X30, [X20, #200]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X25, XZR, XZR	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
DUP Z16.D, Z5.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
DUP Z17.D, Z6.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
ORR Z18.D, Z2.D, Z2.D	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50
ADD X26, X4, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB X27, X4, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB X11, X11, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB X12, X12, X3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X23, X7, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
UBFM X14, X12, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X12, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STP X12, X29, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
ADD X12, X12, X14	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
DUP Z7.D, X11	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	1
MADD X11, X2, X15, X5	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
SUB X11, X11, X3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
UBFM X11, X11, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X19, X19, X11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X16, X29, X11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X11, X29, X14	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MADD X14, X10, X0, XZR	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
SUB X10, X6, X14	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X24, X14, X5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
STR X10, [SP, #40]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50
LDR W10, [SP, #92]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
DUP Z19.D, X0	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	1
SUB W28, W10, W14	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X10, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ADD X10, X7, X10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB X29, X10, X23,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MADD X10, X21, X15, X5	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
MADD X5, X21, X17, X5	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
SUB X10, X10, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB X5, X5, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X10, X4, X10,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X5, X4, X5,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDP X5, X10, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDR W6, [SP, #28]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
LDP X30, X16, [SP, #72]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X29, X23, [SP, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDR X19, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
CBZ X10, 44a0a4 <__nv_viscosity_kernel_module_viscosity_kernel__F1L50_1_+0x114>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MADD X11, X21, X17, X24	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
MADD X14, X2, X15, X24	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
ADD X12, X19, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X16, X29, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD W26, W28, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
LDR X10, [X20, #200]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X19, XZR, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR X25, XZR, XZR	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB X11, X11, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB X14, X14, X3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X7, X4, X11,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
UBFM X11, X14, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
UBFM X14, X24, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X23, X12, X11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X27, X16, X11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MADD X11, X21, X15, X24	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
SUB X11, X11, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X28, X4, X11,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MADD X11, X2, X8, X24	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
MADD X2, X21, X18, X14	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
SUB X11, X11, X3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB X2, X2, X22,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
UBFM X11, X11, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X3, X12, X11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X29, X16, X11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
MADD X11, X21, X8, X24	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1
SUB X12, X14, X19,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB X11, X11, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X12, X30, X12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
UBFM X16, X11, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X11, X4, X16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ADD X14, X10, X16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
SUB X11, X11, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
B 44a434 <__nv_viscosity_kernel_module_viscosity_kernel__F1L50_1_+0x4a4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0
HINT #0
HINT #0
LDR W21, [SP, #12]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33
ORR X0, XZR, XZR	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR W1, WZR, W21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 404d30 <@plt_start@+0x460>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
ORR X0, XZR, XZR	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
ORR W1, WZR, W21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
BL 404900 <@plt_start@+0x30>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
LDP X20, X19, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X22, X21, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X24, X23, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X26, X25, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X28, X27, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
LDP X29, X30, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1
ADD SP, SP, #208	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
HINT #0
HINT #0
HINT #0
HINT #0
HINT #0

Name	Coverage (%)	Time (s)
▼__nv_viscosity_kernel_module_viscosity_kernel__F1L50_1_–	2.49	3.37
○Loop 1022 - viscosity_kernel.f90-pp.f90:56-89 - exec	2.48	3.35
○Loop 1020 - viscosity_kernel.f90-pp.f90:53-93 - exec	0	0
○Loop 1021 - viscosity_kernel.f90-pp.f90:56-92 - exec	0	0

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