| Loop Id: 61 | Module: exec | Source: PdV_kernel.f90:111-135 [...] | Coverage: 6.36% |
|---|
| Loop Id: 61 | Module: exec | Source: PdV_kernel.f90:111-135 [...] | Coverage: 6.36% |
|---|
0x412c90 VMOVUPD -0x8(%RDX,%R13,8),%YMM3 [10] |
0x412c97 VMOVUPD (%RDX,%R13,8),%YMM4 [10] |
0x412c9d VADDPD -0x8(%RAX,%R13,8),%YMM3,%YMM3 [5] |
0x412ca4 VADDPD -0x8(%R8,%R13,8),%YMM3,%YMM3 [13] |
0x412cab VADDPD -0x8(%R15,%R13,8),%YMM3,%YMM3 [3] |
0x412cb2 VMULPD -0x8(%R10,%R13,8),%YMM2,%YMM5 [6] |
0x412cb9 VADDPD (%RAX,%R13,8),%YMM4,%YMM4 [5] |
0x412cbf VADDPD (%R8,%R13,8),%YMM4,%YMM4 [13] |
0x412cc5 VADDPD (%R15,%R13,8),%YMM4,%YMM4 [3] |
0x412ccb VMULPD (%R10,%R13,8),%YMM2,%YMM6 [6] |
0x412cd1 VMOVUPD (%RCX,%R13,8),%YMM7 [11] |
0x412cd7 VADDPD -0x8(%RCX,%R13,8),%YMM7,%YMM7 [11] |
0x412cde VADDPD -0x8(%R12,%R13,8),%YMM7,%YMM7 [1] |
0x412ce5 VADDPD (%R12,%R13,8),%YMM7,%YMM7 [1] |
0x412ceb VMULPD (%R11,%R13,8),%YMM2,%YMM8 [12] |
0x412cf1 VMULPD %YMM7,%YMM8,%YMM7 |
0x412cf5 VFMADD231PD %YMM5,%YMM3,%YMM7 |
0x412cfa VFNMADD231PD %YMM6,%YMM4,%YMM7 |
0x412cff VMOVUPD (%R9,%R13,8),%YMM3 [7] |
0x412d05 VADDPD -0x8(%R9,%R13,8),%YMM3,%YMM3 [7] |
0x412d0c VADDPD -0x8(%RSI,%R13,8),%YMM3,%YMM3 [9] |
0x412d13 VADDPD (%RSI,%R13,8),%YMM3,%YMM3 [9] |
0x412d19 VMULPD (%RBX,%R13,8),%YMM2,%YMM4 [4] |
0x412d1f VMOVUPD (%R14,%R13,8),%YMM5 [2] |
0x412d25 MOV -0x40(%RBP),%RDI [8] |
0x412d29 VMOVUPD (%RDI,%R13,8),%YMM6 [19] |
0x412d2f VFMSUB213PD %YMM7,%YMM3,%YMM4 |
0x412d34 MOV -0x68(%RBP),%RDI [8] |
0x412d38 VADDPD (%RDI,%R13,8),%YMM6,%YMM3 [18] |
0x412d3e VMULPD %YMM3,%YMM4,%YMM3 |
0x412d42 MOV -0x38(%RBP),%RDI [8] |
0x412d46 VMULPD (%RDI,%R13,8),%YMM5,%YMM6 [17] |
0x412d4c VDIVPD %YMM6,%YMM3,%YMM3 |
0x412d50 MOV -0x70(%RBP),%RDI [8] |
0x412d54 VMOVUPD (%RDI,%R13,8),%YMM7 [16] |
0x412d5a VSUBPD %YMM3,%YMM7,%YMM3 |
0x412d5e MOV -0x50(%RBP),%RDI [8] |
0x412d62 VMOVUPD %YMM3,(%RDI,%R13,8) [15] |
0x412d68 VADDPD %YMM5,%YMM4,%YMM3 |
0x412d6c VDIVPD %YMM3,%YMM6,%YMM3 |
0x412d70 MOV -0x30(%RBP),%RDI [8] |
0x412d74 VMOVUPD %YMM3,(%RDI,%R13,8) [14] |
0x412d7a ADD $0x4,%R13 |
0x412d7e CMP -0xa8(%RBP),%R13 [8] |
0x412d85 JB 412c90 |
/home/eoseret/qaas_runs_GNR/173-814-3702/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/PdV_kernel.f90: 111 - 135 |
-------------------------------------------------------------------------------- |
111: DO j=x_min,x_max |
112: |
113: left_flux= (xarea(j ,k )*(xvel0(j ,k )+xvel0(j ,k+1) & |
114: +xvel1(j ,k )+xvel1(j ,k+1)))*0.25_8*dt |
115: right_flux= (xarea(j+1,k )*(xvel0(j+1,k )+xvel0(j+1,k+1) & |
116: +xvel1(j+1,k )+xvel1(j+1,k+1)))*0.25_8*dt |
117: bottom_flux=(yarea(j ,k )*(yvel0(j ,k )+yvel0(j+1,k ) & |
118: +yvel1(j ,k )+yvel1(j+1,k )))*0.25_8*dt |
119: top_flux= (yarea(j ,k+1)*(yvel0(j ,k+1)+yvel0(j+1,k+1) & |
120: +yvel1(j ,k+1)+yvel1(j+1,k+1)))*0.25_8*dt |
121: total_flux=right_flux-left_flux+top_flux-bottom_flux |
122: |
123: volume_change_s=volume(j,k)/(volume(j,k)+total_flux) |
[...] |
131: energy_change=(pressure(j,k)/density0(j,k)+viscosity(j,k)/density0(j,k))*total_flux*recip_volume |
132: |
133: energy1(j,k)=energy0(j,k)-energy_change |
134: |
135: density1(j,k)=density0(j,k)*volume_change_s |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ►99.98+ | __kmp_invoke_microtask | libiomp5.so | |
| ○ | __kmp_invoke_task_func | libiomp5.so |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 1.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.28 |
| Bottlenecks | P0, |
| Function | pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2 |
| Source | PdV_kernel.f90:111-123,PdV_kernel.f90:131-135 |
| Source loop unroll info | unrolled by 4 |
| Source loop unroll confidence level | high |
| Unroll/vectorization loop type | main |
| Unroll factor | 4 |
| CQA cycles | 16.00 |
| CQA cycles if no scalar integer | 16.00 |
| CQA cycles if FP arith vectorized | 16.00 |
| CQA cycles if fully vectorized | 16.00 |
| Front-end cycles | 10.33 |
| P0 cycles | 9.00 |
| P1 cycles | 12.50 |
| P2 cycles | 10.67 |
| P3 cycles | 10.67 |
| P4 cycles | 1.00 |
| P5 cycles | 9.00 |
| P6 cycles | 1.00 |
| P7 cycles | 1.00 |
| P8 cycles | 1.00 |
| P9 cycles | 1.00 |
| P10 cycles | 0.00 |
| P11 cycles | 10.67 |
| DIV/SQRT cycles | 16.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 45.00 |
| Nb uops | 44.00 |
| Nb loads | 32.00 |
| Nb stores | 2.00 |
| Nb stack references | 7.00 |
| FLOP/cycle | 7.50 |
| Nb FLOP add-sub | 60.00 |
| Nb FLOP mul | 28.00 |
| Nb FLOP fma | 12.00 |
| Nb FLOP div | 8.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 57.50 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 856.00 |
| Bytes stored | 64.00 |
| Stride 0 | 1.00 |
| Stride 1 | 9.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 100.00 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | 100.00 |
| Vectorization ratio add_sub | 100.00 |
| Vectorization ratio fma | 100.00 |
| Vectorization ratio div_sqrt | 100.00 |
| Vectorization ratio other | NA |
| Vector-efficiency ratio all | 50.00 |
| Vector-efficiency ratio load | 50.00 |
| Vector-efficiency ratio store | 50.00 |
| Vector-efficiency ratio mul | 50.00 |
| Vector-efficiency ratio add_sub | 50.00 |
| Vector-efficiency ratio fma | 50.00 |
| Vector-efficiency ratio div_sqrt | 50.00 |
| Vector-efficiency ratio other | NA |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 1.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.28 |
| Bottlenecks | P0, |
| Function | pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2 |
| Source | PdV_kernel.f90:111-123,PdV_kernel.f90:131-135 |
| Source loop unroll info | unrolled by 4 |
| Source loop unroll confidence level | high |
| Unroll/vectorization loop type | main |
| Unroll factor | 4 |
| CQA cycles | 16.00 |
| CQA cycles if no scalar integer | 16.00 |
| CQA cycles if FP arith vectorized | 16.00 |
| CQA cycles if fully vectorized | 16.00 |
| Front-end cycles | 10.33 |
| P0 cycles | 9.00 |
| P1 cycles | 12.50 |
| P2 cycles | 10.67 |
| P3 cycles | 10.67 |
| P4 cycles | 1.00 |
| P5 cycles | 9.00 |
| P6 cycles | 1.00 |
| P7 cycles | 1.00 |
| P8 cycles | 1.00 |
| P9 cycles | 1.00 |
| P10 cycles | 0.00 |
| P11 cycles | 10.67 |
| DIV/SQRT cycles | 16.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 45.00 |
| Nb uops | 44.00 |
| Nb loads | 32.00 |
| Nb stores | 2.00 |
| Nb stack references | 7.00 |
| FLOP/cycle | 7.50 |
| Nb FLOP add-sub | 60.00 |
| Nb FLOP mul | 28.00 |
| Nb FLOP fma | 12.00 |
| Nb FLOP div | 8.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 57.50 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 856.00 |
| Bytes stored | 64.00 |
| Stride 0 | 1.00 |
| Stride 1 | 9.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 100.00 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | 100.00 |
| Vectorization ratio add_sub | 100.00 |
| Vectorization ratio fma | 100.00 |
| Vectorization ratio div_sqrt | 100.00 |
| Vectorization ratio other | NA |
| Vector-efficiency ratio all | 50.00 |
| Vector-efficiency ratio load | 50.00 |
| Vector-efficiency ratio store | 50.00 |
| Vector-efficiency ratio mul | 50.00 |
| Vector-efficiency ratio add_sub | 50.00 |
| Vector-efficiency ratio fma | 50.00 |
| Vector-efficiency ratio div_sqrt | 50.00 |
| Vector-efficiency ratio other | NA |
| Path / |
| Function | pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2 |
| Source file and lines | PdV_kernel.f90:111-135 |
| Module | exec |
 |
 |
| nb instructions | 45 |
| nb uops | 44 |
| loop length | 251 |
| used x86 registers | 15 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 7 |
| used zmm registers | 0 |
| nb stack references | 7 |
| ADD-SUB / MUL ratio | 2.14 |
| micro-operation queue | 10.33 cycles |
| front end | 10.33 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 9.00 | 9.00 | 10.67 | 10.67 | 1.00 | 9.00 | 1.00 | 1.00 | 1.00 | 1.00 | 0.00 | 10.67 |
| cycles | 9.00 | 12.50 | 10.67 | 10.67 | 1.00 | 9.00 | 1.00 | 1.00 | 1.00 | 1.00 | 0.00 | 10.67 |
| Cycles executing div or sqrt instructions | 16.00 |
| Longest recurrence chain latency (RecMII) | 1.00 |
| Front-end | 10.33 |
| Dispatch | 12.50 |
| DIV/SQRT | 16.00 |
| Data deps. | 1.00 |
| Overall L1 | 16.00 |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | 100% |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 50% |
| load | 50% |
| store | 50% |
| mul | 50% |
| add-sub | 50% |
| fma | 50% |
| div/sqrt | 50% |
| other | NA (no other vectorizable/vectorized instructions) |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VMOVUPD -0x8(%RDX,%R13,8),%YMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VMOVUPD (%RDX,%R13,8),%YMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VADDPD -0x8(%RAX,%R13,8),%YMM3,%YMM3 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 | vect (50.0%) |
| VADDPD -0x8(%R8,%R13,8),%YMM3,%YMM3 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 | vect (50.0%) |
| VADDPD -0x8(%R15,%R13,8),%YMM3,%YMM3 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 | vect (50.0%) |
| VMULPD -0x8(%R10,%R13,8),%YMM2,%YMM5 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (50.0%) |
| VADDPD (%RAX,%R13,8),%YMM4,%YMM4 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 | vect (50.0%) |
| VADDPD (%R8,%R13,8),%YMM4,%YMM4 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 | vect (50.0%) |
| VADDPD (%R15,%R13,8),%YMM4,%YMM4 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 | vect (50.0%) |
| VMULPD (%R10,%R13,8),%YMM2,%YMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (50.0%) |
| VMOVUPD (%RCX,%R13,8),%YMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VADDPD -0x8(%RCX,%R13,8),%YMM7,%YMM7 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 | vect (50.0%) |
| VADDPD -0x8(%R12,%R13,8),%YMM7,%YMM7 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 | vect (50.0%) |
| VADDPD (%R12,%R13,8),%YMM7,%YMM7 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 | vect (50.0%) |
| VMULPD (%R11,%R13,8),%YMM2,%YMM8 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (50.0%) |
| VMULPD %YMM7,%YMM8,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (50.0%) |
| VFMADD231PD %YMM5,%YMM3,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (50.0%) |
| VFNMADD231PD %YMM6,%YMM4,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (50.0%) |
| VMOVUPD (%R9,%R13,8),%YMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VADDPD -0x8(%R9,%R13,8),%YMM3,%YMM3 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 | vect (50.0%) |
| VADDPD -0x8(%RSI,%R13,8),%YMM3,%YMM3 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 | vect (50.0%) |
| VADDPD (%RSI,%R13,8),%YMM3,%YMM3 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 | vect (50.0%) |
| VMULPD (%RBX,%R13,8),%YMM2,%YMM4 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (50.0%) |
| VMOVUPD (%R14,%R13,8),%YMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| MOV -0x40(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VMOVUPD (%RDI,%R13,8),%YMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VFMSUB213PD %YMM7,%YMM3,%YMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (50.0%) |
| MOV -0x68(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VADDPD (%RDI,%R13,8),%YMM6,%YMM3 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 | vect (50.0%) |
| VMULPD %YMM3,%YMM4,%YMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (50.0%) |
| MOV -0x38(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VMULPD (%RDI,%R13,8),%YMM5,%YMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (50.0%) |
| VDIVPD %YMM6,%YMM3,%YMM3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 | vect (50.0%) |
| MOV -0x70(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VMOVUPD (%RDI,%R13,8),%YMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VSUBPD %YMM3,%YMM7,%YMM3 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (50.0%) |
| MOV -0x50(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VMOVUPD %YMM3,(%RDI,%R13,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| VADDPD %YMM5,%YMM4,%YMM3 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (50.0%) |
| VDIVPD %YMM3,%YMM6,%YMM3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 | vect (50.0%) |
| MOV -0x30(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VMOVUPD %YMM3,(%RDI,%R13,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| ADD $0x4,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| CMP -0xa8(%RBP),%R13 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | N/A |
| JB 412c90 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x870> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| Function | pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2 |
| Source file and lines | PdV_kernel.f90:111-135 |
| Module | exec |
|
|
| nb instructions | 45 |
| nb uops | 44 |
| loop length | 251 |
| used x86 registers | 15 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 7 |
| used zmm registers | 0 |
| nb stack references | 7 |
| ADD-SUB / MUL ratio | 2.14 |
| micro-operation queue | 10.33 cycles |
| front end | 10.33 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 9.00 | 9.00 | 10.67 | 10.67 | 1.00 | 9.00 | 1.00 | 1.00 | 1.00 | 1.00 | 0.00 | 10.67 |
| cycles | 9.00 | 12.50 | 10.67 | 10.67 | 1.00 | 9.00 | 1.00 | 1.00 | 1.00 | 1.00 | 0.00 | 10.67 |
| Cycles executing div or sqrt instructions | 16.00 |
| Longest recurrence chain latency (RecMII) | 1.00 |
| Front-end | 10.33 |
| Dispatch | 12.50 |
| DIV/SQRT | 16.00 |
| Data deps. | 1.00 |
| Overall L1 | 16.00 |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | 100% |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 50% |
| load | 50% |
| store | 50% |
| mul | 50% |
| add-sub | 50% |
| fma | 50% |
| div/sqrt | 50% |
| other | NA (no other vectorizable/vectorized instructions) |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VMOVUPD -0x8(%RDX,%R13,8),%YMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VMOVUPD (%RDX,%R13,8),%YMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VADDPD -0x8(%RAX,%R13,8),%YMM3,%YMM3 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 | vect (50.0%) |
| VADDPD -0x8(%R8,%R13,8),%YMM3,%YMM3 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 | vect (50.0%) |
| VADDPD -0x8(%R15,%R13,8),%YMM3,%YMM3 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 | vect (50.0%) |
| VMULPD -0x8(%R10,%R13,8),%YMM2,%YMM5 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (50.0%) |
| VADDPD (%RAX,%R13,8),%YMM4,%YMM4 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 | vect (50.0%) |
| VADDPD (%R8,%R13,8),%YMM4,%YMM4 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 | vect (50.0%) |
| VADDPD (%R15,%R13,8),%YMM4,%YMM4 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 | vect (50.0%) |
| VMULPD (%R10,%R13,8),%YMM2,%YMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (50.0%) |
| VMOVUPD (%RCX,%R13,8),%YMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VADDPD -0x8(%RCX,%R13,8),%YMM7,%YMM7 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 | vect (50.0%) |
| VADDPD -0x8(%R12,%R13,8),%YMM7,%YMM7 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 | vect (50.0%) |
| VADDPD (%R12,%R13,8),%YMM7,%YMM7 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 | vect (50.0%) |
| VMULPD (%R11,%R13,8),%YMM2,%YMM8 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (50.0%) |
| VMULPD %YMM7,%YMM8,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (50.0%) |
| VFMADD231PD %YMM5,%YMM3,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (50.0%) |
| VFNMADD231PD %YMM6,%YMM4,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (50.0%) |
| VMOVUPD (%R9,%R13,8),%YMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VADDPD -0x8(%R9,%R13,8),%YMM3,%YMM3 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 | vect (50.0%) |
| VADDPD -0x8(%RSI,%R13,8),%YMM3,%YMM3 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 | vect (50.0%) |
| VADDPD (%RSI,%R13,8),%YMM3,%YMM3 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 | vect (50.0%) |
| VMULPD (%RBX,%R13,8),%YMM2,%YMM4 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (50.0%) |
| VMOVUPD (%R14,%R13,8),%YMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| MOV -0x40(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VMOVUPD (%RDI,%R13,8),%YMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VFMSUB213PD %YMM7,%YMM3,%YMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (50.0%) |
| MOV -0x68(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VADDPD (%RDI,%R13,8),%YMM6,%YMM3 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 | vect (50.0%) |
| VMULPD %YMM3,%YMM4,%YMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (50.0%) |
| MOV -0x38(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VMULPD (%RDI,%R13,8),%YMM5,%YMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (50.0%) |
| VDIVPD %YMM6,%YMM3,%YMM3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 | vect (50.0%) |
| MOV -0x70(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VMOVUPD (%RDI,%R13,8),%YMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 | vect (50.0%) |
| VSUBPD %YMM3,%YMM7,%YMM3 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (50.0%) |
| MOV -0x50(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VMOVUPD %YMM3,(%RDI,%R13,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| VADDPD %YMM5,%YMM4,%YMM3 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (50.0%) |
| VDIVPD %YMM3,%YMM6,%YMM3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 | vect (50.0%) |
| MOV -0x30(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VMOVUPD %YMM3,(%RDI,%R13,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 | vect (50.0%) |
| ADD $0x4,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| CMP -0xa8(%RBP),%R13 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 | N/A |
| JB 412c90 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x870> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |