OV - exec - Function __reset_field_kernel_module_MOD_reset_field_kernel._omp

	Function: __reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0	Module: exec	Source: reset_field_kernel.f90:47-63	Coverage (incl. loops): 4.99% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_GNR/173-814-3702/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90: 47 - 63

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47:     !$OMP PARALLEL

48:     !$OMP DO

49:     DO k=y_min,y_max

50:     !$OMP SIMD

51:       DO j=x_min,x_max

52:         density0(j,k)=density1(j,k)

53:         energy0(j,k)=energy1(j,k)

54:       ENDDO

55:     ENDDO

56:     !$OMP END DO

57:

58:     !$OMP DO

59:     DO k=y_min,y_max+1

60:     !$OMP SIMD

61:       DO j=x_min,x_max+1

62:         xvel0(j,k)=xvel1(j,k)

63:         yvel0(j,k)=yvel1(j,k)

0x43b700 PUSH	%RBP

0x43b701 MOV	%RSP,%RBP

0x43b704 PUSH	%R15

0x43b706 PUSH	%R14

0x43b708 PUSH	%R13

0x43b70a PUSH	%R12

0x43b70c PUSH	%RBX

0x43b70d MOV	%RDI,%RBX

0x43b710 AND	$-0x40,%RSP

0x43b714 SUB	$0xc0,%RSP

0x43b71b MOV	0xd0(%RDI),%RDX

0x43b722 MOV	0xc8(%RDI),%RCX

0x43b729 MOV	0xc0(%RDI),%RSI

0x43b730 MOV	0xb8(%RDI),%R8

0x43b737 MOV	0xb0(%RDI),%R9

0x43b73e MOV	0xa0(%RDI),%R10

0x43b745 MOV	0xd8(%RDI),%RAX

0x43b74c MOV	0xa8(%RDI),%R15

0x43b753 MOV	0x10(%RDI),%RDI

0x43b757 MOV	%RDX,0x88(%RSP)

0x43b75f MOV	(%RDI),%R13D

0x43b762 MOV	%RCX,0x20(%RSP)

0x43b767 MOV	%RSI,0x80(%RSP)

0x43b76f MOV	%R8,0x18(%RSP)

0x43b774 MOV	%R9,0x78(%RSP)

0x43b779 MOV	%R10,0x70(%RSP)

0x43b77e MOV	%RAX,0x28(%RSP)

0x43b783 CALL	402370 <@plt_start@+0x350>

0x43b788 MOV	%EAX,%R14D

0x43b78b CALL	4022e0 <@plt_start@+0x2c0>

0x43b790 MOV	0x18(%RBX),%R11

0x43b794 MOV	%EAX,%R12D

0x43b797 MOV	(%R11),%EAX

0x43b79a INC	%EAX

0x43b79c SUB	%R13D,%EAX

0x43b79f CLTD

0x43b7a0 IDIV	%R14D

0x43b7a3 CMP	%EDX,%R12D

0x43b7a6 JL	43c36f

0x43b7ac MOV	%EAX,%ECX

0x43b7ae IMUL	%R12D,%ECX

0x43b7b2 ADD	%ECX,%EDX

0x43b7b4 ADD	%EDX,%EAX

0x43b7b6 CMP	%EAX,%EDX

0x43b7b8 JGE	43bd64

0x43b7be MOV	0x28(%RBX),%R9

0x43b7c2 MOV	0x30(%RBX),%RCX

0x43b7c6 ADD	%R13D,%EDX

0x43b7c9 MOV	(%RBX),%RSI

0x43b7cc MOV	0x8(%RBX),%R8

0x43b7d0 MOV	0x20(%RBX),%RDI

0x43b7d4 MOV	%R9,0xb8(%RSP)

0x43b7dc MOV	0x60(%RBX),%R9

0x43b7e0 MOV	%RCX,0x38(%RSP)

0x43b7e5 MOVSXD	%EDX,%RCX

0x43b7e8 MOVSXD	(%RSI),%R10

0x43b7eb MOV	(%R8),%R11D

0x43b7ee MOV	%RDI,0xb0(%RSP)

0x43b7f6 MOV	0x70(%RBX),%R8

0x43b7fa MOV	%R9,0x58(%RSP)

0x43b7ff MOV	0x68(%RBX),%RDI

0x43b803 IMUL	%RCX,%R9

0x43b807 ADD	%R10,%RDI

0x43b80a MOV	%R8,0x60(%RSP)

0x43b80f MOV	0x78(%RBX),%RSI

0x43b813 IMUL	%RCX,%R8

0x43b817 ADD	%R9,%RDI

0x43b81a MOV	0x90(%RBX),%R9

0x43b821 ADD	%R10,%RSI

0x43b824 ADD	%R8,%RSI

0x43b827 MOV	%R9,0x50(%RSP)

0x43b82c MOV	0x98(%RBX),%R8

0x43b833 IMUL	%RCX,%R9

0x43b837 ADD	%R10,%R8

0x43b83a ADD	%R13D,%EAX

0x43b83d ADD	%R9,%R8

0x43b840 MOV	0x80(%RBX),%R9

0x43b847 MOV	%EAX,0x98(%RSP)

0x43b84e MOV	%R9,0x68(%RSP)

0x43b853 MOV	0x88(%RBX),%R9

0x43b85a MOV	0x38(%RBX),%RAX

0x43b85e ADD	%R10,%R9

0x43b861 MOV	%R9,0xa8(%RSP)

0x43b869 MOV	0x68(%RSP),%R9

0x43b86e MOV	%RAX,0x90(%RSP)

0x43b876 IMUL	%R9,%RCX

0x43b87a MOV	0xa8(%RSP),%R9

0x43b882 MOV	%R10,%R13

0x43b885 LEA	0x1(%R11),%EAX

0x43b889 ADD	%RCX,%R9

0x43b88c CMP	%R11D,%R10D

0x43b88f MOV	%R10D,0x48(%RSP)

0x43b894 MOV	%R11D,0xa0(%RSP)

0x43b89c CMOVLE	%EAX,%R13D

0x43b8a0 JG	43c38a

0x43b8a6 SUB	%R10D,%R11D

0x43b8a9 MOV	%R11D,0xa4(%RSP)

0x43b8b1 INC	%R11D

0x43b8b4 MOV	%R11D,%ECX

0x43b8b7 MOV	%R11D,%EAX

0x43b8ba SHR	$0x3,%ECX

0x43b8bd SAL	$0x6,%RCX

0x43b8c1 AND	$-0x8,%EAX

0x43b8c4 AND	$0x7,%R11D

0x43b8c8 MOV	%RCX,0xa8(%RSP)

0x43b8d0 MOV	%EAX,0x44(%RSP)

0x43b8d4 MOV	%R15,0x10(%RSP)

0x43b8d9 MOV	%R14D,0x30(%RSP)

0x43b8de MOV	%R12D,0xc(%RSP)

0x43b8e3 MOV	%R13D,0x8(%RSP)

0x43b8e8 MOV	%RBX,(%RSP)

0x43b8ec MOV	%R11D,0x40(%RSP)

0x43b8f1 MOV	0x38(%RSP),%R11

0x43b8f6 MOV	%R10,0x38(%RSP)

0x43b8fb MOV	0x90(%RSP),%R10

0x43b903 NOPL	(%RAX,%RAX,1)

(299) 0x43b908 CMPL	$0x6,0xa4(%RSP)

(299) 0x43b910 JBE	43c348

(299) 0x43b916 MOV	0xa8(%RSP),%R15

(299) 0x43b91e MOV	0xb8(%RSP),%RBX

(299) 0x43b926 LEA	-0x40(%R15),%R14

(299) 0x43b92a MOV	0xb0(%RSP),%R12

(299) 0x43b932 SHR	$0x6,%R14

(299) 0x43b936 INC	%R14

(299) 0x43b939 LEA	(%RBX,%RSI,8),%R13

(299) 0x43b93d LEA	(%R12,%RDI,8),%R12

(299) 0x43b941 LEA	(%R10,%R8,8),%RBX

(299) 0x43b945 LEA	(%R11,%R9,8),%RCX

(299) 0x43b949 XOR	%EAX,%EAX

(299) 0x43b94b AND	$0x7,%R14D

(299) 0x43b94f JE	43ba7b

(299) 0x43b955 CMP	$0x1,%R14

(299) 0x43b959 JE	43ba49

(299) 0x43b95f CMP	$0x2,%R14

(299) 0x43b963 JE	43ba28

(299) 0x43b969 CMP	$0x3,%R14

(299) 0x43b96d JE	43ba07

(299) 0x43b973 CMP	$0x4,%R14

(299) 0x43b977 JE	43b9e6

(299) 0x43b979 CMP	$0x5,%R14

(299) 0x43b97d JE	43b9c5

(299) 0x43b97f CMP	$0x6,%R14

(299) 0x43b983 JE	43b9a4

(299) 0x43b985 VMOVUPD	(%R13),%ZMM0

(299) 0x43b98c MOV	$0x40,%EAX

(299) 0x43b991 VMOVUPD	%ZMM0,(%R12)

(299) 0x43b998 VMOVUPD	(%RBX),%ZMM1

(299) 0x43b99e VMOVUPD	%ZMM1,(%RCX)

(299) 0x43b9a4 VMOVUPD	(%R13,%RAX,1),%ZMM2

(299) 0x43b9ac VMOVUPD	%ZMM2,(%R12,%RAX,1)

(299) 0x43b9b3 VMOVUPD	(%RBX,%RAX,1),%ZMM3

(299) 0x43b9ba VMOVUPD	%ZMM3,(%RCX,%RAX,1)

(299) 0x43b9c1 ADD	$0x40,%RAX

(299) 0x43b9c5 VMOVUPD	(%R13,%RAX,1),%ZMM4

(299) 0x43b9cd VMOVUPD	%ZMM4,(%R12,%RAX,1)

(299) 0x43b9d4 VMOVUPD	(%RBX,%RAX,1),%ZMM5

(299) 0x43b9db VMOVUPD	%ZMM5,(%RCX,%RAX,1)

(299) 0x43b9e2 ADD	$0x40,%RAX

(299) 0x43b9e6 VMOVUPD	(%R13,%RAX,1),%ZMM6

(299) 0x43b9ee VMOVUPD	%ZMM6,(%R12,%RAX,1)

(299) 0x43b9f5 VMOVUPD	(%RBX,%RAX,1),%ZMM7

(299) 0x43b9fc VMOVUPD	%ZMM7,(%RCX,%RAX,1)

(299) 0x43ba03 ADD	$0x40,%RAX

(299) 0x43ba07 VMOVUPD	(%R13,%RAX,1),%ZMM8

(299) 0x43ba0f VMOVUPD	%ZMM8,(%R12,%RAX,1)

(299) 0x43ba16 VMOVUPD	(%RBX,%RAX,1),%ZMM9

(299) 0x43ba1d VMOVUPD	%ZMM9,(%RCX,%RAX,1)

(299) 0x43ba24 ADD	$0x40,%RAX

(299) 0x43ba28 VMOVUPD	(%R13,%RAX,1),%ZMM10

(299) 0x43ba30 VMOVUPD	%ZMM10,(%R12,%RAX,1)

(299) 0x43ba37 VMOVUPD	(%RBX,%RAX,1),%ZMM11

(299) 0x43ba3e VMOVUPD	%ZMM11,(%RCX,%RAX,1)

(299) 0x43ba45 ADD	$0x40,%RAX

(299) 0x43ba49 VMOVUPD	(%R13,%RAX,1),%ZMM12

(299) 0x43ba51 MOV	0xa8(%RSP),%R15

(299) 0x43ba59 VMOVUPD	%ZMM12,(%R12,%RAX,1)

(299) 0x43ba60 VMOVUPD	(%RBX,%RAX,1),%ZMM13

(299) 0x43ba67 VMOVUPD	%ZMM13,(%RCX,%RAX,1)

(299) 0x43ba6e ADD	$0x40,%RAX

(299) 0x43ba72 CMP	%R15,%RAX

(299) 0x43ba75 JE	43bb8f

  (300) 0x43ba7b VMOVUPD	(%R13,%RAX,1),%ZMM14

  (300) 0x43ba83 VMOVUPD	%ZMM14,(%R12,%RAX,1)

  (300) 0x43ba8a VMOVUPD	(%RBX,%RAX,1),%ZMM15

  (300) 0x43ba91 VMOVUPD	%ZMM15,(%RCX,%RAX,1)

  (300) 0x43ba98 VMOVUPD	0x40(%R13,%RAX,1),%ZMM0

  (300) 0x43baa0 VMOVUPD	%ZMM0,0x40(%R12,%RAX,1)

  (300) 0x43baa8 VMOVUPD	0x40(%RBX,%RAX,1),%ZMM1

  (300) 0x43bab0 VMOVUPD	%ZMM1,0x40(%RCX,%RAX,1)

  (300) 0x43bab8 VMOVUPD	0x80(%R13,%RAX,1),%ZMM2

  (300) 0x43bac0 VMOVUPD	%ZMM2,0x80(%R12,%RAX,1)

  (300) 0x43bac8 VMOVUPD	0x80(%RBX,%RAX,1),%ZMM3

  (300) 0x43bad0 VMOVUPD	%ZMM3,0x80(%RCX,%RAX,1)

  (300) 0x43bad8 VMOVUPD	0xc0(%R13,%RAX,1),%ZMM4

  (300) 0x43bae0 VMOVUPD	%ZMM4,0xc0(%R12,%RAX,1)

  (300) 0x43bae8 VMOVUPD	0xc0(%RBX,%RAX,1),%ZMM5

  (300) 0x43baf0 VMOVUPD	%ZMM5,0xc0(%RCX,%RAX,1)

  (300) 0x43baf8 VMOVUPD	0x100(%R13,%RAX,1),%ZMM6

  (300) 0x43bb00 VMOVUPD	%ZMM6,0x100(%R12,%RAX,1)

  (300) 0x43bb08 VMOVUPD	0x100(%RBX,%RAX,1),%ZMM7

  (300) 0x43bb10 VMOVUPD	%ZMM7,0x100(%RCX,%RAX,1)

  (300) 0x43bb18 VMOVUPD	0x140(%R13,%RAX,1),%ZMM8

  (300) 0x43bb20 VMOVUPD	%ZMM8,0x140(%R12,%RAX,1)

  (300) 0x43bb28 VMOVUPD	0x140(%RBX,%RAX,1),%ZMM9

  (300) 0x43bb30 VMOVUPD	%ZMM9,0x140(%RCX,%RAX,1)

  (300) 0x43bb38 VMOVUPD	0x180(%R13,%RAX,1),%ZMM10

  (300) 0x43bb40 VMOVUPD	%ZMM10,0x180(%R12,%RAX,1)

  (300) 0x43bb48 VMOVUPD	0x180(%RBX,%RAX,1),%ZMM11

  (300) 0x43bb50 VMOVUPD	%ZMM11,0x180(%RCX,%RAX,1)

  (300) 0x43bb58 VMOVUPD	0x1c0(%R13,%RAX,1),%ZMM12

  (300) 0x43bb60 VMOVUPD	%ZMM12,0x1c0(%R12,%RAX,1)

  (300) 0x43bb68 VMOVUPD	0x1c0(%RBX,%RAX,1),%ZMM13

  (300) 0x43bb70 VMOVUPD	%ZMM13,0x1c0(%RCX,%RAX,1)

  (300) 0x43bb78 MOV	0xa8(%RSP),%R14

  (300) 0x43bb80 ADD	$0x200,%RAX

  (300) 0x43bb86 CMP	%R14,%RAX

  (300) 0x43bb89 JNE	43ba7b

(299) 0x43bb8f MOV	0x44(%RSP),%EAX

(299) 0x43bb93 MOV	0x48(%RSP),%R13D

(299) 0x43bb98 MOV	0x40(%RSP),%R12D

(299) 0x43bb9d MOV	%EAX,%R14D

(299) 0x43bba0 ADD	%R13D,%EAX

(299) 0x43bba3 TEST	%R12D,%R12D

(299) 0x43bba6 JE	43bd05

(299) 0x43bbac MOV	0xa4(%RSP),%ECX

(299) 0x43bbb3 SUB	%R14D,%ECX

(299) 0x43bbb6 LEA	0x1(%RCX),%EBX

(299) 0x43bbb9 CMP	$0x2,%ECX

(299) 0x43bbbc JBE	43bc08

(299) 0x43bbbe MOV	0xb8(%RSP),%R15

(299) 0x43bbc6 LEA	(%RSI,%R14,1),%R13

(299) 0x43bbca VMOVUPD	(%R15,%R13,8),%YMM14

(299) 0x43bbd0 MOV	0xb0(%RSP),%RCX

(299) 0x43bbd8 LEA	(%RDI,%R14,1),%R12

(299) 0x43bbdc VMOVUPD	%YMM14,(%RCX,%R12,8)

(299) 0x43bbe2 LEA	(%R8,%R14,1),%R13

(299) 0x43bbe6 VMOVUPD	(%R10,%R13,8),%YMM15

(299) 0x43bbec ADD	%R9,%R14

(299) 0x43bbef VMOVUPD	%YMM15,(%R11,%R14,8)

(299) 0x43bbf5 MOV	%EBX,%R14D

(299) 0x43bbf8 AND	$-0x4,%R14D

(299) 0x43bbfc ADD	%R14D,%EAX

(299) 0x43bbff AND	$0x3,%EBX

(299) 0x43bc02 JE	43bd05

(299) 0x43bc08 MOV	0x38(%RSP),%R15

(299) 0x43bc0d MOV	%R9,%RBX

(299) 0x43bc10 SUB	%R15,%RBX

(299) 0x43bc13 MOV	%RSI,%R14

(299) 0x43bc16 MOVSXD	%EAX,%RCX

(299) 0x43bc19 MOV	%RBX,0x90(%RSP)

(299) 0x43bc21 SUB	%R15,%R14

(299) 0x43bc24 MOV	0xb8(%RSP),%RBX

(299) 0x43bc2c MOV	%RDI,%R13

(299) 0x43bc2f MOV	%R8,%R12

(299) 0x43bc32 SUB	%R15,%R13

(299) 0x43bc35 SUB	%R15,%R12

(299) 0x43bc38 LEA	(%R14,%RCX,1),%R15

(299) 0x43bc3c VMOVSD	(%RBX,%R15,8),%XMM0

(299) 0x43bc42 MOV	0xb0(%RSP),%RBX

(299) 0x43bc4a LEA	(%R13,%RCX,1),%R15

(299) 0x43bc4f VMOVSD	%XMM0,(%RBX,%R15,8)

(299) 0x43bc55 LEA	(%R12,%RCX,1),%R15

(299) 0x43bc59 MOV	0x90(%RSP),%RBX

(299) 0x43bc61 VMOVSD	(%R10,%R15,8),%XMM1

(299) 0x43bc67 ADD	%RBX,%RCX

(299) 0x43bc6a VMOVSD	%XMM1,(%R11,%RCX,8)

(299) 0x43bc70 LEA	0x1(%RAX),%ECX

(299) 0x43bc73 CMP	%ECX,0xa0(%RSP)

(299) 0x43bc7a JL	43bd05

(299) 0x43bc80 MOVSXD	%ECX,%RCX

(299) 0x43bc83 MOV	0xb8(%RSP),%RBX

(299) 0x43bc8b LEA	(%R14,%RCX,1),%R15

(299) 0x43bc8f VMOVSD	(%RBX,%R15,8),%XMM2

(299) 0x43bc95 MOV	0xb0(%RSP),%RBX

(299) 0x43bc9d LEA	(%R13,%RCX,1),%R15

(299) 0x43bca2 VMOVSD	%XMM2,(%RBX,%R15,8)

(299) 0x43bca8 LEA	(%R12,%RCX,1),%R15

(299) 0x43bcac VMOVSD	(%R10,%R15,8),%XMM3

(299) 0x43bcb2 MOV	0x90(%RSP),%R15

(299) 0x43bcba ADD	$0x2,%EAX

(299) 0x43bcbd ADD	%R15,%RCX

(299) 0x43bcc0 VMOVSD	%XMM3,(%R11,%RCX,8)

(299) 0x43bcc6 CMP	%EAX,0xa0(%RSP)

(299) 0x43bccd JL	43bd05

(299) 0x43bccf CLTQ

(299) 0x43bcd1 MOV	0xb8(%RSP),%RCX

(299) 0x43bcd9 ADD	%RAX,%R14

(299) 0x43bcdc VMOVSD	(%RCX,%R14,8),%XMM4

(299) 0x43bce2 MOV	0xb0(%RSP),%R14

(299) 0x43bcea ADD	%RAX,%R13

(299) 0x43bced VMOVSD	%XMM4,(%R14,%R13,8)

(299) 0x43bcf3 ADD	%RAX,%R12

(299) 0x43bcf6 VMOVSD	(%R10,%R12,8),%XMM5

(299) 0x43bcfc ADD	%RAX,%R15

(299) 0x43bcff VMOVSD	%XMM5,(%R11,%R15,8)

(299) 0x43bd05 MOV	0x60(%RSP),%RAX

(299) 0x43bd0a MOV	0x58(%RSP),%R13

(299) 0x43bd0f MOV	0x50(%RSP),%R12

(299) 0x43bd14 MOV	0x68(%RSP),%RBX

(299) 0x43bd19 INC	%EDX

(299) 0x43bd1b ADD	%RAX,%RSI

(299) 0x43bd1e ADD	%R13,%RDI

(299) 0x43bd21 ADD	%R12,%R8

(299) 0x43bd24 ADD	%RBX,%R9

(299) 0x43bd27 CMP	%EDX,0x98(%RSP)

(299) 0x43bd2e JG	43b908

0x43bd34 MOV	0x10(%RSP),%R15

0x43bd39 MOV	0x30(%RSP),%R14D

0x43bd3e MOV	0xc(%RSP),%R12D

0x43bd43 MOV	0x8(%RSP),%R13D

0x43bd48 MOV	(%RSP),%RBX

0x43bd4c VZEROUPPER

0x43bd4f MOV	%R13D,0xa4(%RSP)

0x43bd57 MOV	0xa4(%RSP),%EDX

0x43bd5e MOV	%EDX,0xe0(%RBX)

0x43bd64 CALL	402360 <@plt_start@+0x340>

0x43bd69 MOV	0x18(%RBX),%R8

0x43bd6d MOV	0x10(%RBX),%RSI

0x43bd71 MOV	(%R8),%EAX

0x43bd74 MOV	(%RSI),%EDI

0x43bd76 ADD	$0x2,%EAX

0x43bd79 SUB	%EDI,%EAX

0x43bd7b CLTD

0x43bd7c IDIV	%R14D

0x43bd7f CMP	%EDX,%R12D

0x43bd82 JL	43c366

0x43bd88 MOV	%R12D,%R9D

0x43bd8b IMUL	%EAX,%R9D

0x43bd8f ADD	%EDX,%R9D

0x43bd92 ADD	%R9D,%EAX

0x43bd95 CMP	%EAX,%R9D

0x43bd98 JGE	43c30e

0x43bd9e ADD	%EDI,%EAX

0x43bda0 ADD	%EDI,%R9D

0x43bda3 MOV	(%RBX),%R11

0x43bda6 MOV	0x8(%RBX),%RCX

0x43bdaa MOV	0x58(%RBX),%R8

0x43bdae MOV	0x78(%RSP),%RDX

0x43bdb3 MOV	%EAX,0xa0(%RSP)

0x43bdba MOVSXD	%R9D,%RAX

0x43bdbd MOVSXD	(%R11),%R10

0x43bdc0 IMUL	%RAX,%RDX

0x43bdc4 MOV	(%RCX),%R14D

0x43bdc7 MOV	%R8,0x90(%RSP)

0x43bdcf MOV	0x48(%RBX),%RSI

0x43bdd3 MOV	0x18(%RSP),%R8

0x43bdd8 MOV	0x88(%RSP),%RCX

0x43bde0 MOV	0x40(%RBX),%RDI

0x43bde4 IMUL	%RAX,%RCX

0x43bde8 ADD	%R10,%R8

0x43bdeb MOV	%RSI,0xb0(%RSP)

0x43bdf3 MOV	0x28(%RSP),%RSI

0x43bdf8 ADD	%RDX,%R8

0x43bdfb MOV	%RDI,0xa8(%RSP)

0x43be03 MOV	0x80(%RSP),%RDX

0x43be0b LEA	(%R15,%R10,1),%RDI

0x43be0f MOV	0x70(%RSP),%R15

0x43be14 ADD	%R10,%RSI

0x43be17 IMUL	%RAX,%R15

0x43be1b ADD	%RCX,%RSI

0x43be1e IMUL	%RDX,%RAX

0x43be22 MOV	0x20(%RSP),%RCX

0x43be27 LEA	0x2(%R14),%R12D

0x43be2b ADD	%R10,%RCX

0x43be2e ADD	%RAX,%RCX

0x43be31 ADD	%R15,%RDI

0x43be34 CMP	%R12D,%R10D

0x43be37 MOV	%R14D,0x44(%RSP)

0x43be3c MOV	%R12D,0xa4(%RSP)

0x43be44 CMOVGE	%R10D,%R12D

0x43be48 SUB	%R10D,%R14D

0x43be4b LEA	0x2(%R14),%R13D

0x43be4f MOV	%R12D,0x40(%RSP)

0x43be54 MOV	%R13D,%R12D

0x43be57 MOV	%R13D,%EAX

0x43be5a SHR	$0x3,%R12D

0x43be5e MOV	%R14D,0x50(%RSP)

0x43be63 SAL	$0x6,%R12

0x43be67 LEA	0x1(%R14),%R14D

0x43be6b AND	$-0x8,%EAX

0x43be6e AND	$0x7,%R13D

0x43be72 MOV	%R14D,0x68(%RSP)

0x43be77 MOV	%R12,0x98(%RSP)

0x43be7f MOV	%EAX,0x60(%RSP)

0x43be83 MOV	%R13D,0x58(%RSP)

0x43be88 MOV	%RBX,0x38(%RSP)

0x43be8d MOV	%R10D,0xb8(%RSP)

0x43be95 MOV	%R10,0x48(%RSP)

0x43be9a MOV	0x50(%RBX),%R11

0x43be9e MOV	0x90(%RSP),%R10

0x43bea6 KXORB	%K0,%K0,%K0

0x43beaa NOPW	(%RAX,%RAX,1)

(296) 0x43beb0 MOV	0xa4(%RSP),%EBX

(296) 0x43beb7 CMP	%EBX,0xb8(%RSP)

(296) 0x43bebe JGE	43c298

(296) 0x43bec4 CMPL	$0x6,0x68(%RSP)

(296) 0x43bec9 JBE	43c358

(296) 0x43becf MOV	0xb0(%RSP),%R15

(296) 0x43bed7 MOV	0xa8(%RSP),%R14

(296) 0x43bedf LEA	(%R15,%R8,8),%R13

(296) 0x43bee3 MOV	0x98(%RSP),%R15

(296) 0x43beeb LEA	(%R14,%RDI,8),%R12

(296) 0x43beef LEA	-0x40(%R15),%R14

(296) 0x43bef3 SHR	$0x6,%R14

(296) 0x43bef7 INC	%R14

(296) 0x43befa LEA	(%R10,%RSI,8),%RBX

(296) 0x43befe LEA	(%R11,%RCX,8),%RDX

(296) 0x43bf02 XOR	%EAX,%EAX

(296) 0x43bf04 AND	$0x7,%R14D

(296) 0x43bf08 JE	43c012

(296) 0x43bf0e CMP	$0x1,%R14

(296) 0x43bf12 JE	43bfe3

(296) 0x43bf18 CMP	$0x2,%R14

(296) 0x43bf1c JE	43bfc2

(296) 0x43bf22 CMP	$0x3,%R14

(296) 0x43bf26 JE	43bfa1

(296) 0x43bf28 CMP	$0x4,%R14

(296) 0x43bf2c JE	43bf80

(296) 0x43bf2e CMP	$0x5,%R14

(296) 0x43bf32 JE	43bf5f

(296) 0x43bf34 CMP	$0x6,%R14

(296) 0x43bf38 JNE	43c320

(296) 0x43bf3e VMOVUPD	(%R13,%RAX,1),%ZMM8

(296) 0x43bf46 VMOVUPD	%ZMM8,(%R12,%RAX,1)

(296) 0x43bf4d VMOVUPD	(%RBX,%RAX,1),%ZMM9

(296) 0x43bf54 VMOVUPD	%ZMM9,(%RDX,%RAX,1)

(296) 0x43bf5b ADD	$0x40,%RAX

(296) 0x43bf5f VMOVUPD	(%R13,%RAX,1),%ZMM10

(296) 0x43bf67 VMOVUPD	%ZMM10,(%R12,%RAX,1)

(296) 0x43bf6e VMOVUPD	(%RBX,%RAX,1),%ZMM11

(296) 0x43bf75 VMOVUPD	%ZMM11,(%RDX,%RAX,1)

(296) 0x43bf7c ADD	$0x40,%RAX

(296) 0x43bf80 VMOVUPD	(%R13,%RAX,1),%ZMM12

(296) 0x43bf88 VMOVUPD	%ZMM12,(%R12,%RAX,1)

(296) 0x43bf8f VMOVUPD	(%RBX,%RAX,1),%ZMM13

(296) 0x43bf96 VMOVUPD	%ZMM13,(%RDX,%RAX,1)

(296) 0x43bf9d ADD	$0x40,%RAX

(296) 0x43bfa1 VMOVUPD	(%R13,%RAX,1),%ZMM14

(296) 0x43bfa9 VMOVUPD	%ZMM14,(%R12,%RAX,1)

(296) 0x43bfb0 VMOVUPD	(%RBX,%RAX,1),%ZMM15

(296) 0x43bfb7 VMOVUPD	%ZMM15,(%RDX,%RAX,1)

(296) 0x43bfbe ADD	$0x40,%RAX

(296) 0x43bfc2 VMOVUPD	(%R13,%RAX,1),%ZMM0

(296) 0x43bfca VMOVUPD	%ZMM0,(%R12,%RAX,1)

(296) 0x43bfd1 VMOVUPD	(%RBX,%RAX,1),%ZMM1

(296) 0x43bfd8 VMOVUPD	%ZMM1,(%RDX,%RAX,1)

(296) 0x43bfdf ADD	$0x40,%RAX

(296) 0x43bfe3 VMOVUPD	(%R13,%RAX,1),%ZMM2

(296) 0x43bfeb VMOVUPD	%ZMM2,(%R12,%RAX,1)

(296) 0x43bff2 VMOVUPD	(%RBX,%RAX,1),%ZMM3

(296) 0x43bff9 VMOVUPD	%ZMM3,(%RDX,%RAX,1)

(296) 0x43c000 ADD	$0x40,%RAX

(296) 0x43c004 CMP	%RAX,0x98(%RSP)

(296) 0x43c00c JE	43c123

  (297) 0x43c012 VMOVUPD	(%R13,%RAX,1),%ZMM4

  (297) 0x43c01a VMOVUPD	%ZMM4,(%R12,%RAX,1)

  (297) 0x43c021 VMOVUPD	(%RBX,%RAX,1),%ZMM5

  (297) 0x43c028 VMOVUPD	%ZMM5,(%RDX,%RAX,1)

  (297) 0x43c02f VMOVUPD	0x40(%R13,%RAX,1),%ZMM6

  (297) 0x43c037 VMOVUPD	%ZMM6,0x40(%R12,%RAX,1)

  (297) 0x43c03f VMOVUPD	0x40(%RBX,%RAX,1),%ZMM7

  (297) 0x43c047 VMOVUPD	%ZMM7,0x40(%RDX,%RAX,1)

  (297) 0x43c04f VMOVUPD	0x80(%R13,%RAX,1),%ZMM8

  (297) 0x43c057 VMOVUPD	%ZMM8,0x80(%R12,%RAX,1)

  (297) 0x43c05f VMOVUPD	0x80(%RBX,%RAX,1),%ZMM9

  (297) 0x43c067 VMOVUPD	%ZMM9,0x80(%RDX,%RAX,1)

  (297) 0x43c06f VMOVUPD	0xc0(%R13,%RAX,1),%ZMM10

  (297) 0x43c077 VMOVUPD	%ZMM10,0xc0(%R12,%RAX,1)

  (297) 0x43c07f VMOVUPD	0xc0(%RBX,%RAX,1),%ZMM11

  (297) 0x43c087 VMOVUPD	%ZMM11,0xc0(%RDX,%RAX,1)

  (297) 0x43c08f VMOVUPD	0x100(%R13,%RAX,1),%ZMM12

  (297) 0x43c097 VMOVUPD	%ZMM12,0x100(%R12,%RAX,1)

  (297) 0x43c09f VMOVUPD	0x100(%RBX,%RAX,1),%ZMM13

  (297) 0x43c0a7 VMOVUPD	%ZMM13,0x100(%RDX,%RAX,1)

  (297) 0x43c0af VMOVUPD	0x140(%R13,%RAX,1),%ZMM14

  (297) 0x43c0b7 VMOVUPD	%ZMM14,0x140(%R12,%RAX,1)

  (297) 0x43c0bf VMOVUPD	0x140(%RBX,%RAX,1),%ZMM15

  (297) 0x43c0c7 VMOVUPD	%ZMM15,0x140(%RDX,%RAX,1)

  (297) 0x43c0cf VMOVUPD	0x180(%R13,%RAX,1),%ZMM0

  (297) 0x43c0d7 VMOVUPD	%ZMM0,0x180(%R12,%RAX,1)

  (297) 0x43c0df VMOVUPD	0x180(%RBX,%RAX,1),%ZMM1

  (297) 0x43c0e7 VMOVUPD	%ZMM1,0x180(%RDX,%RAX,1)

  (297) 0x43c0ef VMOVUPD	0x1c0(%R13,%RAX,1),%ZMM2

  (297) 0x43c0f7 VMOVUPD	%ZMM2,0x1c0(%R12,%RAX,1)

  (297) 0x43c0ff VMOVUPD	0x1c0(%RBX,%RAX,1),%ZMM3

  (297) 0x43c107 VMOVUPD	%ZMM3,0x1c0(%RDX,%RAX,1)

  (297) 0x43c10f ADD	$0x200,%RAX

  (297) 0x43c115 CMP	%RAX,0x98(%RSP)

  (297) 0x43c11d JNE	43c012

(296) 0x43c123 MOV	0x60(%RSP),%EAX

(296) 0x43c127 MOV	0xb8(%RSP),%R13D

(296) 0x43c12f MOV	0x58(%RSP),%R12D

(296) 0x43c134 MOV	%EAX,%EDX

(296) 0x43c136 ADD	%R13D,%EAX

(296) 0x43c139 TEST	%R12D,%R12D

(296) 0x43c13c JE	43c298

(296) 0x43c142 MOV	0x50(%RSP),%R15D

(296) 0x43c147 SUB	%EDX,%R15D

(296) 0x43c14a LEA	0x2(%R15),%EBX

(296) 0x43c14e INC	%R15D

(296) 0x43c151 CMP	$0x2,%R15D

(296) 0x43c155 JBE	43c19f

(296) 0x43c157 MOV	0xb0(%RSP),%R13

(296) 0x43c15f LEA	(%RDX,%R8,1),%R14

(296) 0x43c163 VMOVUPD	(%R13,%R14,8),%YMM4

(296) 0x43c16a MOV	0xa8(%RSP),%R15

(296) 0x43c172 LEA	(%RDI,%RDX,1),%R12

(296) 0x43c176 VMOVUPD	%YMM4,(%R15,%R12,8)

(296) 0x43c17c LEA	(%RSI,%RDX,1),%R14

(296) 0x43c180 VMOVUPD	(%R10,%R14,8),%YMM5

(296) 0x43c186 ADD	%RCX,%RDX

(296) 0x43c189 VMOVUPD	%YMM5,(%R11,%RDX,8)

(296) 0x43c18f MOV	%EBX,%EDX

(296) 0x43c191 AND	$-0x4,%EDX

(296) 0x43c194 ADD	%EDX,%EAX

(296) 0x43c196 AND	$0x3,%EBX

(296) 0x43c199 JE	43c298

(296) 0x43c19f MOV	0x48(%RSP),%R15

(296) 0x43c1a4 MOV	%RCX,%RBX

(296) 0x43c1a7 SUB	%R15,%RBX

(296) 0x43c1aa MOV	%R8,%R14

(296) 0x43c1ad MOVSXD	%EAX,%RDX

(296) 0x43c1b0 MOV	%RBX,0x90(%RSP)

(296) 0x43c1b8 SUB	%R15,%R14

(296) 0x43c1bb MOV	0xb0(%RSP),%RBX

(296) 0x43c1c3 MOV	%RDI,%R13

(296) 0x43c1c6 MOV	%RSI,%R12

(296) 0x43c1c9 SUB	%R15,%R13

(296) 0x43c1cc SUB	%R15,%R12

(296) 0x43c1cf LEA	(%RDX,%R14,1),%R15

(296) 0x43c1d3 VMOVSD	(%RBX,%R15,8),%XMM6

(296) 0x43c1d9 MOV	0xa8(%RSP),%RBX

(296) 0x43c1e1 LEA	(%RDX,%R13,1),%R15

(296) 0x43c1e5 VMOVSD	%XMM6,(%RBX,%R15,8)

(296) 0x43c1eb LEA	(%RDX,%R12,1),%R15

(296) 0x43c1ef MOV	0x90(%RSP),%RBX

(296) 0x43c1f7 VMOVSD	(%R10,%R15,8),%XMM7

(296) 0x43c1fd ADD	%RBX,%RDX

(296) 0x43c200 VMOVSD	%XMM7,(%R11,%RDX,8)

(296) 0x43c206 LEA	0x1(%RAX),%EDX

(296) 0x43c209 CMP	%EDX,0xa4(%RSP)

(296) 0x43c210 JLE	43c298

(296) 0x43c216 MOVSXD	%EDX,%RDX

(296) 0x43c219 MOV	0xb0(%RSP),%RBX

(296) 0x43c221 LEA	(%R14,%RDX,1),%R15

(296) 0x43c225 VMOVSD	(%RBX,%R15,8),%XMM8

(296) 0x43c22b MOV	0xa8(%RSP),%RBX

(296) 0x43c233 LEA	(%R13,%RDX,1),%R15

(296) 0x43c238 VMOVSD	%XMM8,(%RBX,%R15,8)

(296) 0x43c23e LEA	(%R12,%RDX,1),%R15

(296) 0x43c242 VMOVSD	(%R10,%R15,8),%XMM9

(296) 0x43c248 MOV	0x90(%RSP),%R15

(296) 0x43c250 ADD	%R15,%RDX

(296) 0x43c253 VMOVSD	%XMM9,(%R11,%RDX,8)

(296) 0x43c259 CMP	%EAX,0x44(%RSP)

(296) 0x43c25d JLE	43c298

(296) 0x43c25f ADD	$0x2,%EAX

(296) 0x43c262 CLTQ

(296) 0x43c264 MOV	0xb0(%RSP),%RDX

(296) 0x43c26c ADD	%RAX,%R14

(296) 0x43c26f VMOVSD	(%RDX,%R14,8),%XMM10

(296) 0x43c275 MOV	0xa8(%RSP),%R14

(296) 0x43c27d ADD	%RAX,%R13

(296) 0x43c280 VMOVSD	%XMM10,(%R14,%R13,8)

(296) 0x43c286 ADD	%RAX,%R12

(296) 0x43c289 VMOVSD	(%R10,%R12,8),%XMM11

(296) 0x43c28f ADD	%RAX,%R15

(296) 0x43c292 VMOVSD	%XMM11,(%R11,%R15,8)

(296) 0x43c298 MOV	0xa4(%RSP),%EAX

(296) 0x43c29f CMP	%EAX,0xb8(%RSP)

(296) 0x43c2a6 JG	43c2bd

(296) 0x43c2a8 MOV	0x40(%RSP),%R13D

(296) 0x43c2ad MOV	$0x1,%R12D

(296) 0x43c2b3 MOV	%R13D,0x34(%RSP)

(296) 0x43c2b8 KMOVB	%R12D,%K0

(296) 0x43c2bd MOV	0x78(%RSP),%RBX

(296) 0x43c2c2 MOV	0x70(%RSP),%RDX

(296) 0x43c2c7 MOV	0x88(%RSP),%R14

(296) 0x43c2cf MOV	0x80(%RSP),%R15

(296) 0x43c2d7 INC	%R9D

(296) 0x43c2da ADD	%RBX,%R8

(296) 0x43c2dd ADD	%RDX,%RDI

(296) 0x43c2e0 ADD	%R14,%RSI

(296) 0x43c2e3 ADD	%R15,%RCX

(296) 0x43c2e6 CMP	%R9D,0xa0(%RSP)

(296) 0x43c2ee JG	43beb0

0x43c2f4 MOV	0x38(%RSP),%R9

0x43c2f9 KORTESTB	%K0,%K0

0x43c2fd JE	43c378

0x43c2ff MOV	0x34(%RSP),%R11D

0x43c304 MOV	%R11D,0xe0(%R9)

0x43c30b VZEROUPPER

0x43c30e LEA	-0x28(%RBP),%RSP

0x43c312 POP	%RBX

0x43c313 POP	%R12

0x43c315 POP	%R13

0x43c317 POP	%R14

0x43c319 POP	%R15

0x43c31b POP	%RBP

0x43c31c RET

0x43c31d NOPL	(%RAX)

(296) 0x43c320 VMOVUPD	(%R13),%ZMM6

(296) 0x43c327 MOV	$0x40,%EAX

(296) 0x43c32c VMOVUPD	%ZMM6,(%R12)

(296) 0x43c333 VMOVUPD	(%RBX),%ZMM7

(296) 0x43c339 VMOVUPD	%ZMM7,(%RDX)

(296) 0x43c33f JMP	43bf3e

0x43c344 NOPL	(%RAX)

(299) 0x43c348 MOV	0x48(%RSP),%EAX

(299) 0x43c34c XOR	%R14D,%R14D

(299) 0x43c34f JMP	43bbac

0x43c354 NOPL	(%RAX)

(296) 0x43c358 MOV	0xb8(%RSP),%EAX

(296) 0x43c35f XOR	%EDX,%EDX

(296) 0x43c361 JMP	43c142

0x43c366 INC	%EAX

0x43c368 XOR	%EDX,%EDX

0x43c36a JMP	43bd88

0x43c36f INC	%EAX

0x43c371 XOR	%EDX,%EDX

0x43c373 JMP	43b7ac

0x43c378 VZEROUPPER

0x43c37b LEA	-0x28(%RBP),%RSP

0x43c37f POP	%RBX

0x43c380 POP	%R12

0x43c382 POP	%R13

0x43c384 POP	%R14

0x43c386 POP	%R15

0x43c388 POP	%RBP

0x43c389 RET

0x43c38a XOR	%R10D,%R10D

0x43c38d NOPL	(%RAX)

(298) 0x43c390 INC	%EDX

(298) 0x43c392 CMP	%R13D,%EAX

(298) 0x43c395 JE	43c3ae

(298) 0x43c397 CMP	%EDX,0x98(%RSP)

(298) 0x43c39e JG	43c390

0x43c3a0 TEST	%R10B,%R10B

0x43c3a3 JNE	43bd57

0x43c3a9 JMP	43bd64

(298) 0x43c3ae CMP	%EDX,0x98(%RSP)

(298) 0x43c3b5 JLE	43bd4f

(298) 0x43c3bb MOV	%EAX,0xa4(%RSP)

(298) 0x43c3c2 MOV	$0x1,%R10D

(298) 0x43c3c8 JMP	43c390

0x43c3ca NOPW	(%RAX,%RAX,1)

Coverage (%)	Name	Source Location	Module
○97.60	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○2.40	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_7

Source file and lines	reset_field_kernel.f90:47-63
Module	exec

The function is defined in /home/eoseret/qaas_runs_GNR/173-814-3702/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:47-63.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is probably not vectorized. Only 9% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 42.00 to 3.06 cycles (13.71x speedup).

Details

Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): do i a(i)%x = b(i)%x (slow, non stride 1) => do i a%x(i) = b%x(i) (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

unknown: 3 occurrences►
- /home/eoseret/qaas_runs_GNR/173-814-3702/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:47
- /home/eoseret/qaas_runs_GNR/173-814-3702/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:47
- /home/eoseret/qaas_runs_GNR/173-814-3702/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:50

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

IDIV: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-814-3702/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:48
- /home/eoseret/qaas_runs_GNR/173-814-3702/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:58
VZEROUPPER: 3 occurrences►
- /home/eoseret/qaas_runs_GNR/173-814-3702/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:53
- /home/eoseret/qaas_runs_GNR/173-814-3702/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:60
- /home/eoseret/qaas_runs_GNR/173-814-3702/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:48

Conversion instructions

Detected expensive conversion instructions.

Details

CLTD: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-814-3702/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:48
- /home/eoseret/qaas_runs_GNR/173-814-3702/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:58

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 428 bytes. The binary function is storing 292 bytes.

General properties

nb instructions	240
nb uops	252
loop length	1014
used x86 registers	16
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	29

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	42.00 cycles
front end	42.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	17.30	17.20	24.67	24.67	28.00	17.20	17.10	28.00	28.00	28.00	17.20	24.67
cycles	17.30	26.47	24.67	24.67	28.00	17.20	17.10	28.00	28.00	28.00	17.20	24.67

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

12.00

Cycles summary

Front-end	42.00
Dispatch	28.00
DIV/SQRT	12.00
Overall L1	42.00

Vectorization ratios

all	3%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	14%

Vector efficiency ratios

all	9%
load	8%
store	9%
mul	12%
add-sub	6%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	6%
other	9%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 42.00 cycles. At this rate:

5% of peak load performance is reached (10.19 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
5% of peak store performance is reached (6.95 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 42.00 to 28.00 cycles (1.50x speedup).

ASM code

In the binary file, the address of the function is: 43b700

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RDI,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x40,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
SUB $0xc0,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV 0xd0(%RDI),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0xc8(%RDI),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xc0(%RDI),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xb8(%RDI),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xb0(%RDI),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xa0(%RDI),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xd8(%RDI),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xa8(%RDI),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x10(%RDI),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RDX,0x88(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV (%RDI),%R13D	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (6.3%)
MOV %RCX,0x20(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RSI,0x80(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R8,0x18(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R9,0x78(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R10,0x70(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RAX,0x28(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CALL 402370 <@plt_start@+0x350>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %EAX,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 4022e0 <@plt_start@+0x2c0>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV 0x18(%RBX),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %EAX,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV (%R11),%EAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
SUB %R13D,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CLTD	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	scal (6.3%)
IDIV %R14D	4	0	3	0	0	0	0	0	0	0	0	0	0	11-16	6	scal (6.3%)
CMP %EDX,%R12D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JL 43c36f <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xc6f>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %EAX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
IMUL %R12D,%ECX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD %ECX,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
ADD %EDX,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CMP %EAX,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JGE 43bd64 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x664>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x28(%RBX),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x30(%RBX),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD %R13D,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV (%RBX),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x8(%RBX),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x20(%RBX),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R9,0xb8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x60(%RBX),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RCX,0x38(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVSXD %EDX,%RCX	1	0	0.33	0	0	0	0.33	0	0	0	0	0.33	0	1	0.33	N/A
MOVSXD (%RSI),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R8),%R11D	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RDI,0xb0(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x70(%RBX),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R9,0x58(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x68(%RBX),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
IMUL %RCX,%R9	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD %R10,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R8,0x60(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x78(%RBX),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
IMUL %RCX,%R8	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD %R9,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV 0x90(%RBX),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD %R10,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %R8,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R9,0x50(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x98(%RBX),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
IMUL %RCX,%R9	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD %R10,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %R13D,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %R9,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV 0x80(%RBX),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %EAX,0x98(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %R9,0x68(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x88(%RBX),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x38(%RBX),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD %R10,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R9,0xa8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x68(%RSP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,0x90(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
IMUL %R9,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
MOV 0xa8(%RSP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R10,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
LEA 0x1(%R11),%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
ADD %RCX,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CMP %R11D,%R10D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV %R10D,0x48(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %R11D,0xa0(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
CMOVLE %EAX,%R13D	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	scal (6.3%)
JG 43c38a <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xc8a>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
SUB %R10D,%R11D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R11D,0xa4(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
INC %R11D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R11D,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R11D,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SHR $0x3,%ECX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
SAL $0x6,%RCX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
AND $-0x8,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
AND $0x7,%R11D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
MOV %RCX,0xa8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %EAX,0x44(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %R15,0x10(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R14D,0x30(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %R12D,0xc(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %R13D,0x8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %RBX,(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R11D,0x40(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV 0x38(%RSP),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R10,0x38(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x90(%RSP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x10(%RSP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x30(%RSP),%R14D	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xc(%RSP),%R12D	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (6.3%)
MOV 0x8(%RSP),%R13D	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (6.3%)
MOV (%RSP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
MOV %R13D,0xa4(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV 0xa4(%RSP),%EDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (6.3%)
MOV %EDX,0xe0(%RBX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
CALL 402360 <@plt_start@+0x340>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV 0x18(%RBX),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x10(%RBX),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R8),%EAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RSI),%EDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD $0x2,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
SUB %EDI,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CLTD	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	scal (6.3%)
IDIV %R14D	4	0	3	0	0	0	0	0	0	0	0	0	0	11-16	6	scal (6.3%)
CMP %EDX,%R12D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JL 43c366 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xc66>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R12D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
IMUL %EAX,%R9D	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD %EDX,%R9D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %R9D,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CMP %EAX,%R9D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JGE 43c30e <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xc0e>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
ADD %EDI,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %EDI,%R9D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV (%RBX),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x8(%RBX),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x58(%RBX),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x78(%RSP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV %EAX,0xa0(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOVSXD %R9D,%RAX	1	0	0.33	0	0	0	0.33	0	0	0	0	0.33	0	1	0.33	N/A
MOVSXD (%R11),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
IMUL %RAX,%RDX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
MOV (%RCX),%R14D	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R8,0x90(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x48(%RBX),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x18(%RSP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x88(%RSP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x40(%RBX),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
IMUL %RAX,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD %R10,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RSI,0xb0(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x28(%RSP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD %RDX,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RDI,0xa8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x80(%RSP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
LEA (%R15,%R10,1),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x70(%RSP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD %R10,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
IMUL %RAX,%R15	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD %RCX,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
IMUL %RDX,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
MOV 0x20(%RSP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA 0x2(%R14),%R12D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
ADD %R10,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RAX,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %R15,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CMP %R12D,%R10D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV %R14D,0x44(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %R12D,0xa4(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
CMOVGE %R10D,%R12D	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	scal (6.3%)
SUB %R10D,%R14D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
LEA 0x2(%R14),%R13D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
MOV %R12D,0x40(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %R13D,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV %R13D,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SHR $0x3,%R12D	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	scal (6.3%)
MOV %R14D,0x50(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
SAL $0x6,%R12	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	scal (12.5%)
LEA 0x1(%R14),%R14D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
AND $-0x8,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
AND $0x7,%R13D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	scal (6.3%)
MOV %R14D,0x68(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %R12,0x98(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %EAX,0x60(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %R13D,0x58(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %RBX,0x38(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R10D,0xb8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %R10,0x48(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x50(%RBX),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x90(%RSP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
KXORB %K0,%K0,%K0	1	1	0	0	0	0	0	0	0	0	0	0	0	1	1	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x38(%RSP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
KORTESTB %K0,%K0	1	1	0	0	0	0	0	0	0	0	0	0	0	0	1	N/A
JE 43c378 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xc78>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x34(%RSP),%R11D	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R11D,0xe0(%R9)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
LEA -0x28(%RBP),%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
INC %EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
JMP 43bd88 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x688>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
INC %EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
JMP 43b7ac <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xac>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
LEA -0x28(%RBP),%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
XOR %R10D,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
TEST %R10B,%R10B	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	N/A
JNE 43bd57 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x657>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
JMP 43bd64 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x664>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_7

Source file and lines	reset_field_kernel.f90:47-63
Module	exec

gain
potential
hint
expert

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): do i a(i)%x = b(i)%x (slow, non stride 1) => do i a%x(i) = b%x(i) (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

unknown: 3 occurrences►
- /home/eoseret/qaas_runs_GNR/173-814-3702/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:47
- /home/eoseret/qaas_runs_GNR/173-814-3702/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:47
- /home/eoseret/qaas_runs_GNR/173-814-3702/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:50

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

IDIV: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-814-3702/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:48
- /home/eoseret/qaas_runs_GNR/173-814-3702/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:58
VZEROUPPER: 3 occurrences►
- /home/eoseret/qaas_runs_GNR/173-814-3702/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:53
- /home/eoseret/qaas_runs_GNR/173-814-3702/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:60
- /home/eoseret/qaas_runs_GNR/173-814-3702/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:48

Conversion instructions

Detected expensive conversion instructions.

Details

CLTD: 2 occurrences►
- /home/eoseret/qaas_runs_GNR/173-814-3702/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:48
- /home/eoseret/qaas_runs_GNR/173-814-3702/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/reset_field_kernel.f90:58

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 428 bytes. The binary function is storing 292 bytes.

General properties

nb instructions	240
nb uops	252
loop length	1014
used x86 registers	16
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	29

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	42.00 cycles
front end	42.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	17.30	17.20	24.67	24.67	28.00	17.20	17.10	28.00	28.00	28.00	17.20	24.67
cycles	17.30	26.47	24.67	24.67	28.00	17.20	17.10	28.00	28.00	28.00	17.20	24.67

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

12.00

Cycles summary

Front-end	42.00
Dispatch	28.00
DIV/SQRT	12.00
Overall L1	42.00

Vectorization ratios

all	3%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	14%

Vector efficiency ratios

all	9%
load	8%
store	9%
mul	12%
add-sub	6%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	6%
other	9%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 42.00 cycles. At this rate:

5% of peak load performance is reached (10.19 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
5% of peak store performance is reached (6.95 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 43b700

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RDI,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND $-0x40,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
SUB $0xc0,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV 0xd0(%RDI),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0xc8(%RDI),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xc0(%RDI),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xb8(%RDI),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xb0(%RDI),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xa0(%RDI),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xd8(%RDI),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xa8(%RDI),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x10(%RDI),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RDX,0x88(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV (%RDI),%R13D	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (6.3%)
MOV %RCX,0x20(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RSI,0x80(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R8,0x18(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R9,0x78(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R10,0x70(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RAX,0x28(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CALL 402370 <@plt_start@+0x350>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV %EAX,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CALL 4022e0 <@plt_start@+0x2c0>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV 0x18(%RBX),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %EAX,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV (%R11),%EAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
SUB %R13D,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CLTD	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	scal (6.3%)
IDIV %R14D	4	0	3	0	0	0	0	0	0	0	0	0	0	11-16	6	scal (6.3%)
CMP %EDX,%R12D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JL 43c36f <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xc6f>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %EAX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
IMUL %R12D,%ECX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD %ECX,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
ADD %EDX,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CMP %EAX,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JGE 43bd64 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x664>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x28(%RBX),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x30(%RBX),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD %R13D,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV (%RBX),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x8(%RBX),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x20(%RBX),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R9,0xb8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x60(%RBX),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RCX,0x38(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVSXD %EDX,%RCX	1	0	0.33	0	0	0	0.33	0	0	0	0	0.33	0	1	0.33	N/A
MOVSXD (%RSI),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R8),%R11D	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RDI,0xb0(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x70(%RBX),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R9,0x58(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x68(%RBX),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
IMUL %RCX,%R9	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD %R10,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R8,0x60(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x78(%RBX),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
IMUL %RCX,%R8	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD %R9,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV 0x90(%RBX),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD %R10,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %R8,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R9,0x50(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x98(%RBX),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
IMUL %RCX,%R9	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD %R10,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %R13D,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %R9,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV 0x80(%RBX),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %EAX,0x98(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %R9,0x68(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x88(%RBX),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x38(%RBX),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD %R10,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R9,0xa8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x68(%RSP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RAX,0x90(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
IMUL %R9,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
MOV 0xa8(%RSP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R10,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
LEA 0x1(%R11),%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
ADD %RCX,%R9	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CMP %R11D,%R10D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV %R10D,0x48(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %R11D,0xa0(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
CMOVLE %EAX,%R13D	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	scal (6.3%)
JG 43c38a <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xc8a>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
SUB %R10D,%R11D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R11D,0xa4(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
INC %R11D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %R11D,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R11D,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SHR $0x3,%ECX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
SAL $0x6,%RCX	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	N/A
AND $-0x8,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
AND $0x7,%R11D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
MOV %RCX,0xa8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %EAX,0x44(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %R15,0x10(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R14D,0x30(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %R12D,0xc(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %R13D,0x8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %RBX,(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R11D,0x40(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV 0x38(%RSP),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R10,0x38(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x90(%RSP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x10(%RSP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x30(%RSP),%R14D	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0xc(%RSP),%R12D	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (6.3%)
MOV 0x8(%RSP),%R13D	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (6.3%)
MOV (%RSP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
MOV %R13D,0xa4(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV 0xa4(%RSP),%EDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (6.3%)
MOV %EDX,0xe0(%RBX)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
CALL 402360 <@plt_start@+0x340>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV 0x18(%RBX),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x10(%RBX),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R8),%EAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RSI),%EDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD $0x2,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
SUB %EDI,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CLTD	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	scal (6.3%)
IDIV %R14D	4	0	3	0	0	0	0	0	0	0	0	0	0	11-16	6	scal (6.3%)
CMP %EDX,%R12D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JL 43c366 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xc66>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R12D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
IMUL %EAX,%R9D	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD %EDX,%R9D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %R9D,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CMP %EAX,%R9D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
JGE 43c30e <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xc0e>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
ADD %EDI,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %EDI,%R9D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV (%RBX),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x8(%RBX),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x58(%RBX),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x78(%RSP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV %EAX,0xa0(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOVSXD %R9D,%RAX	1	0	0.33	0	0	0	0.33	0	0	0	0	0.33	0	1	0.33	N/A
MOVSXD (%R11),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
IMUL %RAX,%RDX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	scal (12.5%)
MOV (%RCX),%R14D	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R8,0x90(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x48(%RBX),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x18(%RSP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x88(%RSP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x40(%RBX),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
IMUL %RAX,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD %R10,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RSI,0xb0(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x28(%RSP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD %RDX,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RDI,0xa8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x80(%RSP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
LEA (%R15,%R10,1),%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x70(%RSP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD %R10,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
IMUL %RAX,%R15	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
ADD %RCX,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
IMUL %RDX,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	3	1	N/A
MOV 0x20(%RSP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
LEA 0x2(%R14),%R12D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
ADD %R10,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %RAX,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
ADD %R15,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
CMP %R12D,%R10D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV %R14D,0x44(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %R12D,0xa4(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
CMOVGE %R10D,%R12D	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	1	0.50	scal (6.3%)
SUB %R10D,%R14D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
LEA 0x2(%R14),%R13D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
MOV %R12D,0x40(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %R13D,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV %R13D,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SHR $0x3,%R12D	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	scal (6.3%)
MOV %R14D,0x50(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
SAL $0x6,%R12	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0-2	0.50	scal (12.5%)
LEA 0x1(%R14),%R14D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
AND $-0x8,%EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
AND $0x7,%R13D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	scal (6.3%)
MOV %R14D,0x68(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %R12,0x98(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %EAX,0x60(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %R13D,0x58(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %RBX,0x38(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R10D,0xb8(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %R10,0x48(%RSP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x50(%RBX),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x90(%RSP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
KXORB %K0,%K0,%K0	1	1	0	0	0	0	0	0	0	0	0	0	0	1	1	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x38(%RSP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
KORTESTB %K0,%K0	1	1	0	0	0	0	0	0	0	0	0	0	0	0	1	N/A
JE 43c378 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xc78>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV 0x34(%RSP),%R11D	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R11D,0xe0(%R9)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
LEA -0x28(%RBP),%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
INC %EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
JMP 43bd88 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x688>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
INC %EAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
JMP 43b7ac <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0xac>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
VZEROUPPER	2	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
LEA -0x28(%RBP),%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
XOR %R10D,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
TEST %R10B,%R10B	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	N/A
JNE 43bd57 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x657>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
JMP 43bd64 <__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0+0x664>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

Name	Coverage (%)	Time (s)
▼__reset_field_kernel_module_MOD_reset_field_kernel._omp_fn.0–	4.99	1.77
▼Loop 296 - reset_field_kernel.f90:50-63 - exec–	0.00	0.00
○Loop 297 - reset_field_kernel.f90:62-63 - exec	2.68	0.95
▼Loop 299 - reset_field_kernel.f90:50-53 - exec–	0.00	0.00
○Loop 300 - reset_field_kernel.f90:52-53 - exec	2.31	0.82
○Loop 298 - reset_field_kernel.f90:50-50 - exec	0.00	0.00

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