OV - exec - Loop 253

	Loop Id: 253	Module: exec	Source: calc_dt.cpp:52-75 [...]	Coverage: 3.26%

0x438960 VMOVDQA64	0x4c0(%RSP),%ZMM9    [35]

0x438968 VMOVDQA32	%ZMM6,%ZMM2

0x43896e KMOVB	%K1,%K3

0x438972 VPADDD	0xc0(%RSP),%ZMM6,%ZMM6    [35]

0x43897a INC	%EDI

0x43897c VEXTRACTI32X8	$0x1,%ZMM2,%YMM4

0x438983 VPMOVSXDQ	%YMM2,%ZMM1

0x438989 KMOVB	%K1,%K4

0x43898d VPADDD	0x80(%RSP),%ZMM2,%ZMM2    [35]

0x438995 KMOVB	%K1,%K5

0x438999 VPMOVSXDQ	%YMM4,%ZMM0

0x43899f VMOVDQA64	0x480(%RSP),%ZMM4    [35]

0x4389a7 VPSLLQ	$0x3,%ZMM1,%ZMM3

0x4389ae KMOVB	%K1,%K6

0x4389b2 VPSLLQ	$0x3,%ZMM0,%ZMM11

0x4389b9 KMOVB	%K1,%K7

0x4389bd KMOVB	%K1,%K2

0x4389c1 VPADDQ	%ZMM9,%ZMM3,%ZMM10

0x4389c7 VPADDQ	%ZMM9,%ZMM11,%ZMM7

0x4389cd VMOVDQA64	0x400(%RSP),%ZMM9    [35]

0x4389d5 VMOVDQA64	0x440(%RSP),%ZMM11    [35]

0x4389dd VGATHERQPD	(,%ZMM10,1),%ZMM18{%K3}    [6]

0x4389e8 VGATHERQPD	(,%ZMM7,1),%ZMM17{%K4}    [5]

0x4389f3 KMOVB	%K1,%K3

0x4389f7 KMOVB	%K1,%K4

0x4389fb VGATHERQPD	(%RCX,%ZMM4,1),%ZMM20{%K5}    [37]

0x438a02 KMOVB	%K1,%K5

0x438a06 VMINPD	%ZMM20,%ZMM18,%ZMM18

0x438a0c VMINPD	%ZMM20,%ZMM17,%ZMM17

0x438a12 VPADDQ	%ZMM9,%ZMM1,%ZMM3

0x438a18 VPADDQ	%ZMM9,%ZMM0,%ZMM4

0x438a1e VPSLLQ	$0x3,%ZMM3,%ZMM10

0x438a25 VPADDQ	%ZMM11,%ZMM10,%ZMM7

0x438a2b VMOVDQA64	0x380(%RSP),%ZMM10    [35]

0x438a33 VPSLLQ	$0x3,%ZMM4,%ZMM9

0x438a3a VPADDQ	%ZMM11,%ZMM9,%ZMM3

0x438a40 VMOVDQA64	0x3c0(%RSP),%ZMM9    [35]

0x438a48 VGATHERQPD	(,%ZMM7,1),%ZMM27{%K6}    [4]

0x438a53 KMOVB	%K1,%K6

0x438a57 VGATHERQPD	(,%ZMM3,1),%ZMM4{%K7}    [36]

0x438a62 KMOVB	%K1,%K7

0x438a66 VPADDQ	%ZMM10,%ZMM1,%ZMM11

0x438a6c VPADDQ	%ZMM10,%ZMM0,%ZMM19

0x438a72 VMOVDQA64	0x300(%RSP),%ZMM10    [35]

0x438a7a VPSLLQ	$0x3,%ZMM19,%ZMM16

0x438a81 VPSLLQ	$0x3,%ZMM11,%ZMM7

0x438a88 VPADDQ	%ZMM9,%ZMM16,%ZMM31

0x438a8e VPADDQ	%ZMM9,%ZMM7,%ZMM11

0x438a94 VMOVDQA64	0x340(%RSP),%ZMM9    [35]

0x438a9c VGATHERQPD	(,%ZMM11,1),%ZMM3{%K2}    [10]

0x438aa7 KMOVB	%K1,%K2

0x438aab VGATHERQPD	(,%ZMM31,1),%ZMM7{%K3}    [11]

0x438ab6 VADDPD	%ZMM3,%ZMM3,%ZMM3

0x438abc VADDPD	%ZMM7,%ZMM7,%ZMM11

0x438ac2 KMOVB	%K1,%K3

0x438ac6 VPADDQ	%ZMM10,%ZMM1,%ZMM30

0x438acc VPADDQ	%ZMM10,%ZMM0,%ZMM31

0x438ad2 VPSLLQ	$0x3,%ZMM30,%ZMM29

0x438ad9 VPSLLQ	$0x3,%ZMM31,%ZMM30

0x438ae0 VPADDQ	%ZMM9,%ZMM29,%ZMM19

0x438ae6 VPADDQ	%ZMM9,%ZMM30,%ZMM29

0x438aec VGATHERQPD	(,%ZMM19,1),%ZMM16{%K4}    [30]

0x438af7 KMOVB	%K1,%K4

0x438afb VGATHERQPD	(,%ZMM29,1),%ZMM19{%K5}    [32]

0x438b06 VDIVPD	%ZMM16,%ZMM3,%ZMM10

0x438b0c KMOVB	%K1,%K5

0x438b10 VDIVPD	%ZMM19,%ZMM11,%ZMM7

0x438b16 VMOVAPD	0x2c0(%RSP),%ZMM11    [35]

0x438b1e VFMADD231PD	%ZMM27,%ZMM27,%ZMM10

0x438b24 VMULPD	%ZMM11,%ZMM18,%ZMM27

0x438b2a VMULPD	%ZMM11,%ZMM17,%ZMM20

0x438b30 VPMOVSXDQ	%YMM2,%ZMM17

0x438b36 VSQRTPD	%ZMM10,%ZMM9

0x438b3c VFMADD132PD	%ZMM4,%ZMM7,%ZMM4

0x438b42 VMAXPD	%ZMM24,%ZMM9,%ZMM7

0x438b48 VDIVPD	%ZMM7,%ZMM27,%ZMM3

0x438b4e VSQRTPD	%ZMM4,%ZMM4

0x438b54 VMAXPD	%ZMM24,%ZMM4,%ZMM10

0x438b5a VPADDQ	%ZMM8,%ZMM1,%ZMM4

0x438b60 VPSLLQ	$0x3,%ZMM4,%ZMM11

0x438b67 VPADDQ	%ZMM26,%ZMM1,%ZMM4

0x438b6d VPADDQ	%ZMM15,%ZMM11,%ZMM7

0x438b73 VPSLLQ	$0x3,%ZMM4,%ZMM11

0x438b7a VPADDQ	%ZMM21,%ZMM1,%ZMM4

0x438b80 VDIVPD	%ZMM10,%ZMM20,%ZMM9

0x438b86 VMOVAPD	%ZMM3,0x600(%RSP)    [35]

0x438b8e VPADDQ	%ZMM8,%ZMM0,%ZMM3

0x438b94 VPSLLQ	$0x3,%ZMM3,%ZMM10

0x438b9b VPADDQ	%ZMM26,%ZMM0,%ZMM3

0x438ba1 VMOVAPD	%ZMM9,0x5c0(%RSP)    [35]

0x438ba9 VPADDQ	%ZMM15,%ZMM10,%ZMM9

0x438baf VPSLLQ	$0x3,%ZMM3,%ZMM10

0x438bb6 VGATHERQPD	(,%ZMM9,1),%ZMM31{%K7}    [29]

0x438bc1 KMOVB	%K1,%K7

0x438bc5 VPADDQ	%ZMM15,%ZMM10,%ZMM9

0x438bcb VGATHERQPD	(,%ZMM7,1),%ZMM16{%K6}    [25]

0x438bd6 VPADDQ	%ZMM15,%ZMM11,%ZMM7

0x438bdc KMOVB	%K1,%K6

0x438be0 VGATHERQPD	(,%ZMM9,1),%ZMM11{%K3}    [28]

0x438beb VPADDQ	%ZMM21,%ZMM0,%ZMM10

0x438bf1 VGATHERQPD	(,%ZMM7,1),%ZMM30{%K2}    [24]

0x438bfc VADDPD	%ZMM11,%ZMM31,%ZMM18

0x438c02 VPSLLQ	$0x3,%ZMM4,%ZMM7

0x438c09 VEXTRACTI32X8	$0x1,%ZMM2,%YMM11

0x438c10 VPADDQ	%ZMM14,%ZMM7,%ZMM3

0x438c16 VPSLLQ	$0x3,%ZMM10,%ZMM9

0x438c1d VPMOVSXDQ	%YMM11,%ZMM2

0x438c23 VPADDQ	%ZMM14,%ZMM9,%ZMM7

0x438c29 VGATHERQPD	(,%ZMM3,1),%ZMM29{%K4}    [19]

0x438c34 VPADDQ	%ZMM17,%ZMM8,%ZMM3

0x438c3a VGATHERQPD	(,%ZMM7,1),%ZMM4{%K5}    [23]

0x438c45 VADDPD	%ZMM30,%ZMM16,%ZMM19

0x438c4b VPSLLQ	$0x3,%ZMM3,%ZMM10

0x438c52 VMULPD	%ZMM4,%ZMM18,%ZMM18

0x438c58 KMOVB	%K1,%K2

0x438c5c VPADDQ	%ZMM15,%ZMM10,%ZMM9

0x438c62 KMOVB	%K1,%K3

0x438c66 KMOVB	%K1,%K4

0x438c6a VGATHERQPD	(,%ZMM9,1),%ZMM4{%K6}    [27]

0x438c75 VPADDQ	%ZMM2,%ZMM8,%ZMM7

0x438c7b VPSLLQ	$0x3,%ZMM7,%ZMM11

0x438c82 KMOVB	%K1,%K5

0x438c86 VMULPD	%ZMM29,%ZMM19,%ZMM19

0x438c8c VPADDQ	%ZMM17,%ZMM26,%ZMM9

0x438c92 VPADDQ	%ZMM15,%ZMM11,%ZMM10

0x438c98 VPSLLQ	$0x3,%ZMM9,%ZMM7

0x438c9f KMOVB	%K1,%K6

0x438ca3 VPADDQ	%ZMM15,%ZMM7,%ZMM11

0x438ca9 VGATHERQPD	(,%ZMM11,1),%ZMM16{%K2}    [14]

0x438cb4 KMOVB	%K1,%K2

0x438cb8 VGATHERQPD	(,%ZMM10,1),%ZMM3{%K7}    [13]

0x438cc3 VPADDQ	%ZMM17,%ZMM21,%ZMM11

0x438cc9 VPADDQ	%ZMM2,%ZMM26,%ZMM10

0x438ccf VADDPD	%ZMM16,%ZMM4,%ZMM4

0x438cd5 KMOVB	%K1,%K7

0x438cd9 VPSLLQ	$0x3,%ZMM10,%ZMM9

0x438ce0 VPSLLQ	$0x3,%ZMM11,%ZMM10

0x438ce7 VPADDQ	%ZMM15,%ZMM9,%ZMM7

0x438ced VPADDQ	%ZMM14,%ZMM10,%ZMM9

0x438cf3 VGATHERQPD	(,%ZMM7,1),%ZMM27{%K3}    [22]

0x438cfe KMOVB	%K1,%K3

0x438d02 VGATHERQPD	(,%ZMM9,1),%ZMM31{%K4}    [26]

0x438d0d VPADDQ	%ZMM2,%ZMM21,%ZMM7

0x438d13 VMOVDQA64	0x240(%RSP),%ZMM9    [35]

0x438d1b VPSLLQ	$0x3,%ZMM7,%ZMM11

0x438d22 VPADDQ	%ZMM14,%ZMM11,%ZMM10

0x438d28 VMOVDQA64	0x280(%RSP),%ZMM11    [35]

0x438d30 VADDPD	%ZMM27,%ZMM3,%ZMM3

0x438d36 VGATHERQPD	(,%ZMM10,1),%ZMM20{%K5}    [12]

0x438d41 VMULPD	%ZMM31,%ZMM4,%ZMM4

0x438d47 KMOVB	%K1,%K4

0x438d4b VMULPD	%ZMM20,%ZMM3,%ZMM3

0x438d51 KMOVB	%K1,%K5

0x438d55 VPADDQ	%ZMM9,%ZMM1,%ZMM30

0x438d5b VPADDQ	%ZMM9,%ZMM0,%ZMM27

0x438d61 VPSLLQ	$0x3,%ZMM30,%ZMM29

0x438d68 VPSLLQ	$0x3,%ZMM27,%ZMM31

0x438d6f VPADDQ	%ZMM11,%ZMM29,%ZMM16

0x438d75 VPADDQ	%ZMM11,%ZMM31,%ZMM20

0x438d7b VMOVAPD	0x200(%RSP),%ZMM11    [35]

0x438d83 VGATHERQPD	(,%ZMM16,1),%ZMM7{%K6}    [20]

0x438d8e VANDPD	%ZMM12,%ZMM4,%ZMM27

0x438d94 VANDPD	%ZMM12,%ZMM19,%ZMM29

0x438d9a VMULPD	%ZMM24,%ZMM7,%ZMM10

0x438da0 VMAXPD	%ZMM29,%ZMM27,%ZMM31

0x438da6 VGATHERQPD	(,%ZMM20,1),%ZMM30{%K7}    [9]

0x438db1 VMULPD	%ZMM24,%ZMM30,%ZMM9

0x438db7 KMOVB	%K1,%K6

0x438dbb VANDPD	%ZMM12,%ZMM18,%ZMM29

0x438dc1 KMOVB	%K1,%K7

0x438dc5 VMAXPD	%ZMM10,%ZMM31,%ZMM20

0x438dcb VANDPD	%ZMM12,%ZMM3,%ZMM31

0x438dd1 VMULPD	%ZMM11,%ZMM7,%ZMM16

0x438dd7 VMULPD	%ZMM11,%ZMM30,%ZMM27

0x438ddd VDIVPD	%ZMM20,%ZMM16,%ZMM16

0x438de3 VMAXPD	%ZMM29,%ZMM31,%ZMM20

0x438de9 VMOVAPD	%ZMM16,0x580(%RSP)    [35]

0x438df1 VMAXPD	%ZMM9,%ZMM20,%ZMM16

0x438df7 VPADDQ	%ZMM22,%ZMM0,%ZMM20

0x438dfd VDIVPD	%ZMM16,%ZMM27,%ZMM11

0x438e03 VPADDQ	%ZMM22,%ZMM1,%ZMM27

0x438e09 VPSLLQ	$0x3,%ZMM20,%ZMM16

0x438e10 VPSLLQ	$0x3,%ZMM27,%ZMM31

0x438e17 VPADDQ	%ZMM13,%ZMM31,%ZMM29

0x438e1d VPADDQ	%ZMM13,%ZMM16,%ZMM31

0x438e23 VMOVAPD	%ZMM11,0x540(%RSP)    [35]

0x438e2b VGATHERQPD	(,%ZMM29,1),%ZMM27{%K2}    [31]

0x438e36 KMOVB	%K1,%K2

0x438e3a VPADDQ	%ZMM22,%ZMM17,%ZMM29

0x438e40 VGATHERQPD	(,%ZMM31,1),%ZMM20{%K3}    [3]

0x438e4b VPSLLQ	$0x3,%ZMM29,%ZMM16

0x438e52 VPADDQ	%ZMM13,%ZMM16,%ZMM29

0x438e58 KMOVB	%K1,%K3

0x438e5c VPADDQ	%ZMM22,%ZMM2,%ZMM16

0x438e62 VGATHERQPD	(,%ZMM29,1),%ZMM31{%K4}    [18]

0x438e6d VPSLLQ	$0x3,%ZMM16,%ZMM29

0x438e74 VPADDQ	%ZMM13,%ZMM29,%ZMM16

0x438e7a VPADDQ	%ZMM5,%ZMM17,%ZMM17

0x438e80 VGATHERQPD	(,%ZMM16,1),%ZMM11{%K5}    [21]

0x438e8b VADDPD	%ZMM31,%ZMM27,%ZMM27

0x438e91 VPADDQ	%ZMM5,%ZMM1,%ZMM31

0x438e97 VPADDQ	%ZMM5,%ZMM2,%ZMM2

0x438e9d VMOVAPD	%ZMM11,0x500(%RSP)    [35]

0x438ea5 VMOVDQA64	0x1c0(%RSP),%ZMM11    [35]

0x438ead VADDPD	0x500(%RSP),%ZMM20,%ZMM20    [35]

0x438eb5 KMOVB	%K1,%K4

0x438eb9 KMOVB	%K1,%K5

0x438ebd VPSLLQ	$0x3,%ZMM2,%ZMM2

0x438ec4 VPADDQ	%ZMM11,%ZMM1,%ZMM29

0x438eca VPSLLQ	$0x3,%ZMM29,%ZMM16

0x438ed1 VPADDQ	%ZMM25,%ZMM16,%ZMM29

0x438ed7 VGATHERQPD	(,%ZMM29,1),%ZMM16{%K6}    [17]

0x438ee2 KMOVB	%K1,%K6

0x438ee6 VPADDQ	%ZMM11,%ZMM0,%ZMM29

0x438eec VMULPD	%ZMM16,%ZMM27,%ZMM27

0x438ef2 VPSLLQ	$0x3,%ZMM29,%ZMM29

0x438ef9 VPSLLQ	$0x3,%ZMM31,%ZMM16

0x438f00 VPADDQ	%ZMM25,%ZMM29,%ZMM29

0x438f06 VPADDQ	%ZMM5,%ZMM0,%ZMM31

0x438f0c VGATHERQPD	(,%ZMM29,1),%ZMM11{%K7}    [16]

0x438f17 VPADDQ	%ZMM13,%ZMM16,%ZMM29

0x438f1d VPSLLQ	$0x3,%ZMM31,%ZMM16

0x438f24 VMULPD	%ZMM11,%ZMM20,%ZMM20

0x438f2a KMOVB	%K1,%K7

0x438f2e VPADDQ	%ZMM13,%ZMM16,%ZMM31

0x438f34 VGATHERQPD	(,%ZMM29,1),%ZMM11{%K2}    [15]

0x438f3f VPSLLQ	$0x3,%ZMM17,%ZMM16

0x438f46 VGATHERQPD	(,%ZMM31,1),%ZMM29{%K3}    [2]

0x438f51 VPADDQ	%ZMM13,%ZMM16,%ZMM31

0x438f57 VGATHERQPD	(,%ZMM31,1),%ZMM17{%K4}    [1]

0x438f62 VMOVDQA64	0x180(%RSP),%ZMM31    [35]

0x438f6a VPADDQ	%ZMM13,%ZMM2,%ZMM16

0x438f70 VADDPD	%ZMM27,%ZMM19,%ZMM19

0x438f76 VGATHERQPD	(,%ZMM16,1),%ZMM2{%K5}    [8]

0x438f81 VADDPD	%ZMM17,%ZMM11,%ZMM11

0x438f87 VANDPD	%ZMM12,%ZMM27,%ZMM17

0x438f8d VADDPD	%ZMM2,%ZMM29,%ZMM29

0x438f93 VADDPD	%ZMM20,%ZMM18,%ZMM18

0x438f99 VPADDQ	%ZMM31,%ZMM1,%ZMM1

0x438f9f VPADDQ	%ZMM31,%ZMM0,%ZMM0

0x438fa5 VPSLLQ	$0x3,%ZMM1,%ZMM1

0x438fac VPADDQ	%ZMM25,%ZMM1,%ZMM16

0x438fb2 VPSLLQ	$0x3,%ZMM0,%ZMM0

0x438fb9 VPADDQ	%ZMM25,%ZMM0,%ZMM0

0x438fbf VGATHERQPD	(,%ZMM16,1),%ZMM1{%K6}    [7]

0x438fca VGATHERQPD	(,%ZMM0,1),%ZMM31{%K7}    [34]

0x438fd5 VMULPD	%ZMM1,%ZMM11,%ZMM1

0x438fdb VMOVAPD	0x140(%RSP),%ZMM11    [35]

0x438fe3 VMULPD	%ZMM31,%ZMM29,%ZMM16

0x438fe9 VANDPD	%ZMM12,%ZMM1,%ZMM0

0x438fef VADDPD	%ZMM1,%ZMM4,%ZMM4

0x438ff5 VADDPD	%ZMM16,%ZMM3,%ZMM3

0x438ffb VMAXPD	%ZMM17,%ZMM0,%ZMM0

0x439001 VSUBPD	%ZMM19,%ZMM4,%ZMM1

0x439007 VBROADCASTSD	0x2a56f(%RIP),%ZMM4    [33]

0x439011 VMULPD	%ZMM11,%ZMM7,%ZMM2

0x439017 VMAXPD	%ZMM10,%ZMM0,%ZMM10

0x43901d VMULPD	%ZMM11,%ZMM30,%ZMM31

0x439023 VANDPD	%ZMM12,%ZMM16,%ZMM11

0x439029 VDIVPD	%ZMM10,%ZMM2,%ZMM0

0x43902f VANDPD	%ZMM12,%ZMM20,%ZMM2

0x439035 VMAXPD	%ZMM2,%ZMM11,%ZMM10

0x43903b VMULPD	0x2b7fb(%RIP),%ZMM1,%ZMM11    [33]

0x439045 VSUBPD	%ZMM18,%ZMM3,%ZMM2

0x43904b VMOVAPD	%ZMM23,%ZMM1

0x439051 VMAXPD	%ZMM9,%ZMM10,%ZMM9

0x439057 VMULPD	0x2b7df(%RIP),%ZMM2,%ZMM10    [33]

0x439061 VDIVPD	%ZMM9,%ZMM31,%ZMM29

0x439067 VDIVPD	%ZMM7,%ZMM11,%ZMM7

0x43906d VDIVPD	%ZMM30,%ZMM10,%ZMM9

0x439073 VCMPPD	$0x1,0x2b802(%RIP),%ZMM7,%K2    [33]

0x43907e VDIVPD	%ZMM7,%ZMM4,%ZMM11

0x439084 VMOVAPD	0x100(%RSP),%ZMM7    [35]

0x43908c VMULPD	%ZMM7,%ZMM11,%ZMM1{%K2}

0x439092 VMINPD	0x600(%RSP),%ZMM1,%ZMM3    [35]

0x43909a VCMPPD	$0x1,0x2b7db(%RIP),%ZMM9,%K3    [33]

0x4390a5 VBROADCASTSD	0x2a4d1(%RIP),%ZMM2    [33]

0x4390af VMINPD	0x680(%RSP),%ZMM23,%ZMM4    [35]

0x4390b7 VMINPD	0x540(%RSP),%ZMM4,%ZMM11    [35]

0x4390bf VDIVPD	%ZMM9,%ZMM2,%ZMM10

0x4390c5 VMOVAPD	%ZMM23,%ZMM9

0x4390cb VMINPD	0x640(%RSP),%ZMM23,%ZMM2    [35]

0x4390d3 VMINPD	%ZMM0,%ZMM3,%ZMM0

0x4390d9 VMULPD	%ZMM7,%ZMM10,%ZMM9{%K3}

0x4390df VMINPD	0x5c0(%RSP),%ZMM9,%ZMM1    [35]

0x4390e7 VMINPD	0x580(%RSP),%ZMM2,%ZMM10    [35]

0x4390ef VMINPD	%ZMM29,%ZMM1,%ZMM7

0x4390f5 VMINPD	%ZMM0,%ZMM10,%ZMM0

0x4390fb VMINPD	%ZMM7,%ZMM11,%ZMM3

0x439101 VMOVAPD	%ZMM0,0x640(%RSP)    [35]

0x439109 VMOVAPD	%ZMM3,0x680(%RSP)    [35]

0x439111 CMP	%ESI,%EDI

0x439113 JNE	438960

/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h: 46 - 69

--------------------------------------------------------------------------------

46:   T &operator[](size_t i) const { return data[i]; }

[...]

69:   T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; }

/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp: 52 - 75

--------------------------------------------------------------------------------

52:       double dsx = celldx[i];

53:       double dsy = celldy[j];

54:       double cc = soundspeed(i, j) * soundspeed(i, j);

55:       cc = cc + 2.0 * viscosity_a(i, j) / density0(i, j);

56:       cc = std::fmax(std::sqrt(cc), g_small);

57:       double dtct = dtc_safe * std::fmin(dsx, dsy) / cc;

58:       double div = 0.0;

59:       double dv1 = (xvel0(i, j) + xvel0(i + 0, j + 1)) * xarea(i, j);

60:       double dv2 = (xvel0(i + 1, j + 0) + xvel0(i + 1, j + 1)) * xarea(i + 1, j + 0);

61:       div = div + dv2 - dv1;

62:       double dtut = dtu_safe * 2.0 * volume(i, j) / std::fmax(std::fmax(std::fabs(dv1), std::fabs(dv2)), g_small * volume(i, j));

63:       dv1 = (yvel0(i, j) + yvel0(i + 1, j + 0)) * yarea(i, j);

64:       dv2 = (yvel0(i + 0, j + 1) + yvel0(i + 1, j + 1)) * yarea(i + 0, j + 1);

65:       div = div + dv2 - dv1;

66:       double dtvt = dtv_safe * 2.0 * volume(i, j) / std::fmax(std::fmax(std::fabs(dv1), std::fabs(dv2)), g_small * volume(i, j));

67:       div = div / (2.0 * volume(i, j));

68:       double dtdivt;

69:       if (div < -g_small) {

70:         dtdivt = dtdiv_safe * (-1.0 / div);

71:       } else {

72:         dtdivt = g_big;

73:       }

74:       double mins = std::fmin(dtct, std::fmin(dtut, std::fmin(dtvt, std::fmin(dtdivt, g_big))));

75:       dt_min_val0 = std::fmin(mins, dt_min_val0);

Coverage (%)	Name	Source Location	Module
►96.46+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►2.31+	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0
○	calc_dt_kernel(int, int, int, [...]	calc_dt.cpp:49	exec
○	calc_dt(global_variables&, int[...]	calc_dt.cpp:131	exec
○	timestep(global_variables&, pa[...]	timestep.cpp:78	exec
○	hydro(global_variables&, paral[...]	hydro.cpp:60	exec
○	main	new_allocator.h:104	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	new_allocator.h:104	exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Metric	Value
CQA speedup if no scalar integer	1.02
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	1.01
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.34
Bottlenecks	micro-operation queue,
Function	calc_dt_kernel(int, int, int, int, double, double, double, double, double, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer1D&, clover::Buffer1D&, clover::Buffer1D&, clover::Buffer1D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, double&, int&, double&, double&, int&, int&, int&) [clone ._omp_fn.0]
Source	context.h:46-46,context.h:69-69,calc_dt.cpp:52-75
Source loop unroll info	unrolled by 16
Source loop unroll confidence level	medium
Unroll/vectorization loop type	main
Unroll factor	16
CQA cycles	243.25
CQA cycles if no scalar integer	238.88
CQA cycles if FP arith vectorized	243.25
CQA cycles if fully vectorized	240.97
Front-end cycles	243.25
P0 cycles	0.33
P1 cycles	0.33
P2 cycles	0.33
P3 cycles	0.33
P4 cycles	0.33
P5 cycles	0.33
P6 cycles	79.50
P7 cycles	79.50
P8 cycles	79.50
P9 cycles	79.50
P10 cycles	179.25
P11 cycles	179.25
P12 cycles	179.25
P13 cycles	179.25
P14 cycles	182.00
P15 cycles	182.00
DIV/SQRT cycles	65.00
Inter-iter dependencies cycles	1
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	293.00
Nb uops	1946.00
Nb loads	66.00
Nb stores	7.00
Nb stack references	25.00
FLOP/cycle	1.78
Nb FLOP add-sub	128.00
Nb FLOP mul	160.00
Nb FLOP fma	16.00
Nb FLOP div	96.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	16.00
Nb FLOP rsqrt	0.00
Bytes/cycle	18.75
Bytes prefetched	0.00
Bytes loaded	4112.00
Bytes stored	448.00
Stride 0	2.00
Stride 1	0.00
Stride n	0.00
Stride unknown	0.00
Stride indirect	35.00
Vectorization ratio all	99.22
Vectorization ratio load	96.97
Vectorization ratio store	100.00
Vectorization ratio mul	100.00
Vectorization ratio add_sub	100.00
Vectorization ratio fma	100.00
Vectorization ratio div_sqrt	100.00
Vectorization ratio other	98.21
Vector-efficiency ratio all	98.14
Vector-efficiency ratio load	97.35
Vector-efficiency ratio store	100.00
Vector-efficiency ratio mul	100.00
Vector-efficiency ratio add_sub	100.00
Vector-efficiency ratio fma	100.00
Vector-efficiency ratio div_sqrt	100.00
Vector-efficiency ratio other	95.76

Metric	Value
CQA speedup if no scalar integer	1.02
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	1.01
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.34
Bottlenecks	micro-operation queue,
Function	calc_dt_kernel(int, int, int, int, double, double, double, double, double, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer1D&, clover::Buffer1D&, clover::Buffer1D&, clover::Buffer1D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, double&, int&, double&, double&, int&, int&, int&) [clone ._omp_fn.0]
Source	context.h:46-46,context.h:69-69,calc_dt.cpp:52-75
Source loop unroll info	unrolled by 16
Source loop unroll confidence level	medium
Unroll/vectorization loop type	main
Unroll factor	16
CQA cycles	243.25
CQA cycles if no scalar integer	238.88
CQA cycles if FP arith vectorized	243.25
CQA cycles if fully vectorized	240.97
Front-end cycles	243.25
P0 cycles	0.33
P1 cycles	0.33
P2 cycles	0.33
P3 cycles	0.33
P4 cycles	0.33
P5 cycles	0.33
P6 cycles	79.50
P7 cycles	79.50
P8 cycles	79.50
P9 cycles	79.50
P10 cycles	179.25
P11 cycles	179.25
P12 cycles	179.25
P13 cycles	179.25
P14 cycles	182.00
P15 cycles	182.00
DIV/SQRT cycles	65.00
Inter-iter dependencies cycles	1
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	293.00
Nb uops	1946.00
Nb loads	66.00
Nb stores	7.00
Nb stack references	25.00
FLOP/cycle	1.78
Nb FLOP add-sub	128.00
Nb FLOP mul	160.00
Nb FLOP fma	16.00
Nb FLOP div	96.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	16.00
Nb FLOP rsqrt	0.00
Bytes/cycle	18.75
Bytes prefetched	0.00
Bytes loaded	4112.00
Bytes stored	448.00
Stride 0	2.00
Stride 1	0.00
Stride n	0.00
Stride unknown	0.00
Stride indirect	35.00
Vectorization ratio all	99.22
Vectorization ratio load	96.97
Vectorization ratio store	100.00
Vectorization ratio mul	100.00
Vectorization ratio add_sub	100.00
Vectorization ratio fma	100.00
Vectorization ratio div_sqrt	100.00
Vectorization ratio other	98.21
Vector-efficiency ratio all	98.14
Vector-efficiency ratio load	97.35
Vector-efficiency ratio store	100.00
Vector-efficiency ratio mul	100.00
Vector-efficiency ratio add_sub	100.00
Vector-efficiency ratio fma	100.00
Vector-efficiency ratio div_sqrt	100.00
Vector-efficiency ratio other	95.76

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	calc_dt_kernel(int, int, int, int, double, double, double, double, double, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer1D&, clover::Buffer1D&, clover::Buffer1D&, clover::Buffer1D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, double&, int&, double&, double&, int&, int&, int&) [clone ._omp_fn.0]
Source file and lines	calc_dt.cpp:52-75
Module	exec

The loop is defined in:

/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:46,69
/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:52-75

It is main loop of related source loop which is unrolled by 16 (including vectorization).

gain
potential
hint
expert

Vectorization

Your loop is highly vectorized. 98% of vector register length is used (average across all SSE/AVX instructions). By fully vectorizing your loop, you can lower the cost of an iteration from 243.25 to 240.97 cycles (1.01x speedup).

Details

99% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

96% of SSE/AVX loads are used in vector version.
98% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized loop can use their full power.

Workaround

Use vector aligned instructions:

align your arrays on 64 bytes boundaries: replace { void *p = malloc (size); } with { void *p; posix_memalign (&p, 64, size); }.
inform your compiler that your arrays are vector aligned: if array 'foo' is 64 bytes-aligned, define a pointer 'p_foo' as __builtin_assume_aligned (foo, 64) and use it instead of 'foo' in the loop.

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

Masked instructions

Detected masked instructions.

Details

Vector registers are partially exploited, which is expected if your loop is irregular or mixes elements of different sizes.

Workaround

If your loop is irregular, try to remove or hoist conditional structures out of your loop. If it mixes elements of different sizes, try to uniformize them.

FMA

Detected 16 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible. For instance a + b*c is a valid FMA (MUL then ADD). However (a+b)* c cannot be translated into an FMA (ADD then MUL).

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

VCMPPD: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:69
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:69
VGATHERQPD: 35 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:52
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:52
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:53
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:54
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:54
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:55
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:55
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:55
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:55
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:59
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:59
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:59
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:59
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:59
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:59
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:60
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:60
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:60
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:60
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:60
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:60
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:62
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:62
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:63
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:63
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:63
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:63
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:63
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:63
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:64
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:64
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:64
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:64
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:64
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:64
VMOVAPD: 7 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:57
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:57
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:62
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:62
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:63
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:75
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:75

Slow data structures access

Detected data structures (typically arrays) that cannot be efficiently read/written

Details

Irregular (variable stride) or indirect: 35 occurrence(s)

Non-unit stride (uncontiguous) accesses are not efficiently using data caches

Workaround

Try to remove indirect accesses. If applicable, precompute elements out of the innermost loop.

Gather/scatter instructions

Detected gather/scatter instructions (typically caused by indirect accesses).

Details

VGATHERQPD: 35 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:52
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:52
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:53
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:54
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:54
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:55
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:55
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:55
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:55
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:59
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:59
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:59
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:59
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:59
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:59
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:60
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:60
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:60
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:60
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:60
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:60
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:62
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:62
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:63
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:63
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:63
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:63
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:63
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:63
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:64
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:64
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:64
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:64
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:64
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:64

Workaround

Try to simplify your code and/or replace indirect accesses with unit-stride ones.

Type of elements and instruction set

76 AVX-512 instructions are processing arithmetic or math operations on double precision FP elements in vector mode (eight at a time).

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 432 FP arithmetical operations:

144: addition or subtraction (16 inside FMA instructions)
176: multiply (16 inside FMA instructions)
96: divide
16: square root

The binary loop is loading 4112 bytes (514 double precision FP elements). The binary loop is storing 448 bytes (56 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.09 FP operations per loaded or stored byte.

General properties

nb instructions	293
nb uops	1946
loop length	1977
used x86 registers	4
used mmx registers	0
used xmm registers	0
used ymm registers	3
used zmm registers	31
nb stack references	25
ADD-SUB / MUL ratio	0.80

Front-end

ASSUMED MACRO FUSION FIT IN UOP CACHE

micro-operation queue	243.25 cycles
front end	243.25 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	0.33	0.33	0.33	0.33	0.33	0.33	79.50	79.50	79.50	79.50	179.25	179.25	179.25	179.25	182.00	182.00
cycles	0.33	0.33	0.33	0.33	0.33	0.33	79.50	79.50	79.50	79.50	179.25	179.25	179.25	179.25	182.00	182.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions	65.00
Longest recurrence chain latency (RecMII)	1.00

Cycles summary

Front-end	243.25
Dispatch	182.00
DIV/SQRT	65.00
Data deps.	1.00
Overall L1	243.25

Vectorization ratios

INT

all	100%
load	100%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	100%
fma	NA (no fma vectorizable/vectorized instructions)
other	100%

all	98%
load	96%
store	100%
mul	100%
add-sub	100%
fma	100%
div/sqrt	100%
other	97%

INT+FP

all	99%
load	96%
store	100%
mul	100%
add-sub	100%
fma	100%
div/sqrt	100%
other	98%

Vector efficiency ratios

INT

all	97%
load	100%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	100%
fma	NA (no fma vectorizable/vectorized instructions)
other	92%

all	98%
load	96%
store	100%
mul	100%
add-sub	100%
fma	100%
div/sqrt	100%
other	97%

INT+FP

all	98%
load	97%
store	100%
mul	100%
add-sub	100%
fma	100%
div/sqrt	100%
other	95%

Cycles and memory resources usage

Detected masked instructions: assuming all mask elements are active. Assuming all data fit into the L1 cache, each iteration of the binary loop takes 243.25 cycles. At this rate:

6% of peak load performance is reached (16.90 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
1% of peak store performance is reached (1.84 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 243.25 to 182.00 cycles (1.34x speedup).

ASM code

In the binary file, the address of the loop is: 438960

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
VMOVDQA64 0x4c0(%RSP),%ZMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VMOVDQA32 %ZMM6,%ZMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (100.0%)
KMOVB %K1,%K3	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPADDD 0xc0(%RSP),%ZMM6,%ZMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	vect (100.0%)
INC %EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VEXTRACTI32X8 $0x1,%ZMM2,%YMM4	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	4	0.50	vect (50.0%)
VPMOVSXDQ %YMM2,%ZMM1	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	4	0.50	vect (50.0%)
KMOVB %K1,%K4	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPADDD 0x80(%RSP),%ZMM2,%ZMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	vect (100.0%)
KMOVB %K1,%K5	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPMOVSXDQ %YMM4,%ZMM0	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	4	0.50	vect (50.0%)
VMOVDQA64 0x480(%RSP),%ZMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VPSLLQ $0x3,%ZMM1,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
KMOVB %K1,%K6	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPSLLQ $0x3,%ZMM0,%ZMM11	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
KMOVB %K1,%K7	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
KMOVB %K1,%K2	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPADDQ %ZMM9,%ZMM3,%ZMM10	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPADDQ %ZMM9,%ZMM11,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VMOVDQA64 0x400(%RSP),%ZMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VMOVDQA64 0x440(%RSP),%ZMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VGATHERQPD (,%ZMM10,1),%ZMM18{%K3}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VGATHERQPD (,%ZMM7,1),%ZMM17{%K4}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
KMOVB %K1,%K3	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
KMOVB %K1,%K4	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VGATHERQPD (%RCX,%ZMM4,1),%ZMM20{%K5}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
KMOVB %K1,%K5	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VMINPD %ZMM20,%ZMM18,%ZMM18	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VMINPD %ZMM20,%ZMM17,%ZMM17	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VPADDQ %ZMM9,%ZMM1,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPADDQ %ZMM9,%ZMM0,%ZMM4	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPSLLQ $0x3,%ZMM3,%ZMM10	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM11,%ZMM10,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VMOVDQA64 0x380(%RSP),%ZMM10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VPSLLQ $0x3,%ZMM4,%ZMM9	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM11,%ZMM9,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VMOVDQA64 0x3c0(%RSP),%ZMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VGATHERQPD (,%ZMM7,1),%ZMM27{%K6}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
KMOVB %K1,%K6	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VGATHERQPD (,%ZMM3,1),%ZMM4{%K7}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
KMOVB %K1,%K7	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPADDQ %ZMM10,%ZMM1,%ZMM11	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPADDQ %ZMM10,%ZMM0,%ZMM19	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VMOVDQA64 0x300(%RSP),%ZMM10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VPSLLQ $0x3,%ZMM19,%ZMM16	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPSLLQ $0x3,%ZMM11,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM9,%ZMM16,%ZMM31	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPADDQ %ZMM9,%ZMM7,%ZMM11	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VMOVDQA64 0x340(%RSP),%ZMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VGATHERQPD (,%ZMM11,1),%ZMM3{%K2}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
KMOVB %K1,%K2	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VGATHERQPD (,%ZMM31,1),%ZMM7{%K3}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VADDPD %ZMM3,%ZMM3,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VADDPD %ZMM7,%ZMM7,%ZMM11	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
KMOVB %K1,%K3	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPADDQ %ZMM10,%ZMM1,%ZMM30	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPADDQ %ZMM10,%ZMM0,%ZMM31	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPSLLQ $0x3,%ZMM30,%ZMM29	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPSLLQ $0x3,%ZMM31,%ZMM30	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM9,%ZMM29,%ZMM19	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPADDQ %ZMM9,%ZMM30,%ZMM29	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VGATHERQPD (,%ZMM19,1),%ZMM16{%K4}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
KMOVB %K1,%K4	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VGATHERQPD (,%ZMM29,1),%ZMM19{%K5}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VDIVPD %ZMM16,%ZMM3,%ZMM10	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	4	vect (100.0%)
KMOVB %K1,%K5	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VDIVPD %ZMM19,%ZMM11,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	4	vect (100.0%)
VMOVAPD 0x2c0(%RSP),%ZMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VFMADD231PD %ZMM27,%ZMM27,%ZMM10	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (100.0%)
VMULPD %ZMM11,%ZMM18,%ZMM27	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
VMULPD %ZMM11,%ZMM17,%ZMM20	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
VPMOVSXDQ %YMM2,%ZMM17	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	4	0.50	vect (50.0%)
VSQRTPD %ZMM10,%ZMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	21	8.50	vect (100.0%)
VFMADD132PD %ZMM4,%ZMM7,%ZMM4	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (100.0%)
VMAXPD %ZMM24,%ZMM9,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VDIVPD %ZMM7,%ZMM27,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	4	vect (100.0%)
VSQRTPD %ZMM4,%ZMM4	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	21	8.50	vect (100.0%)
VMAXPD %ZMM24,%ZMM4,%ZMM10	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VPADDQ %ZMM8,%ZMM1,%ZMM4	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPSLLQ $0x3,%ZMM4,%ZMM11	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM26,%ZMM1,%ZMM4	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPADDQ %ZMM15,%ZMM11,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPSLLQ $0x3,%ZMM4,%ZMM11	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM21,%ZMM1,%ZMM4	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VDIVPD %ZMM10,%ZMM20,%ZMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	4	vect (100.0%)
VMOVAPD %ZMM3,0x600(%RSP)	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	1	4	1	vect (100.0%)
VPADDQ %ZMM8,%ZMM0,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPSLLQ $0x3,%ZMM3,%ZMM10	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM26,%ZMM0,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VMOVAPD %ZMM9,0x5c0(%RSP)	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	1	4	1	vect (100.0%)
VPADDQ %ZMM15,%ZMM10,%ZMM9	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPSLLQ $0x3,%ZMM3,%ZMM10	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VGATHERQPD (,%ZMM9,1),%ZMM31{%K7}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
KMOVB %K1,%K7	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPADDQ %ZMM15,%ZMM10,%ZMM9	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VGATHERQPD (,%ZMM7,1),%ZMM16{%K6}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VPADDQ %ZMM15,%ZMM11,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
KMOVB %K1,%K6	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VGATHERQPD (,%ZMM9,1),%ZMM11{%K3}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VPADDQ %ZMM21,%ZMM0,%ZMM10	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VGATHERQPD (,%ZMM7,1),%ZMM30{%K2}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VADDPD %ZMM11,%ZMM31,%ZMM18	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VPSLLQ $0x3,%ZMM4,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VEXTRACTI32X8 $0x1,%ZMM2,%YMM11	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	4	0.50	vect (50.0%)
VPADDQ %ZMM14,%ZMM7,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPSLLQ $0x3,%ZMM10,%ZMM9	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPMOVSXDQ %YMM11,%ZMM2	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	4	0.50	vect (50.0%)
VPADDQ %ZMM14,%ZMM9,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VGATHERQPD (,%ZMM3,1),%ZMM29{%K4}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VPADDQ %ZMM17,%ZMM8,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VGATHERQPD (,%ZMM7,1),%ZMM4{%K5}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VADDPD %ZMM30,%ZMM16,%ZMM19	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VPSLLQ $0x3,%ZMM3,%ZMM10	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VMULPD %ZMM4,%ZMM18,%ZMM18	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
KMOVB %K1,%K2	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPADDQ %ZMM15,%ZMM10,%ZMM9	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
KMOVB %K1,%K3	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
KMOVB %K1,%K4	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VGATHERQPD (,%ZMM9,1),%ZMM4{%K6}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VPADDQ %ZMM2,%ZMM8,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPSLLQ $0x3,%ZMM7,%ZMM11	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
KMOVB %K1,%K5	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VMULPD %ZMM29,%ZMM19,%ZMM19	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
VPADDQ %ZMM17,%ZMM26,%ZMM9	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPADDQ %ZMM15,%ZMM11,%ZMM10	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPSLLQ $0x3,%ZMM9,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
KMOVB %K1,%K6	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPADDQ %ZMM15,%ZMM7,%ZMM11	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VGATHERQPD (,%ZMM11,1),%ZMM16{%K2}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
KMOVB %K1,%K2	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VGATHERQPD (,%ZMM10,1),%ZMM3{%K7}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VPADDQ %ZMM17,%ZMM21,%ZMM11	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPADDQ %ZMM2,%ZMM26,%ZMM10	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VADDPD %ZMM16,%ZMM4,%ZMM4	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
KMOVB %K1,%K7	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPSLLQ $0x3,%ZMM10,%ZMM9	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPSLLQ $0x3,%ZMM11,%ZMM10	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM15,%ZMM9,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPADDQ %ZMM14,%ZMM10,%ZMM9	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VGATHERQPD (,%ZMM7,1),%ZMM27{%K3}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
KMOVB %K1,%K3	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VGATHERQPD (,%ZMM9,1),%ZMM31{%K4}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VPADDQ %ZMM2,%ZMM21,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VMOVDQA64 0x240(%RSP),%ZMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VPSLLQ $0x3,%ZMM7,%ZMM11	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM14,%ZMM11,%ZMM10	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VMOVDQA64 0x280(%RSP),%ZMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VADDPD %ZMM27,%ZMM3,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VGATHERQPD (,%ZMM10,1),%ZMM20{%K5}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VMULPD %ZMM31,%ZMM4,%ZMM4	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
KMOVB %K1,%K4	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VMULPD %ZMM20,%ZMM3,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
KMOVB %K1,%K5	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPADDQ %ZMM9,%ZMM1,%ZMM30	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPADDQ %ZMM9,%ZMM0,%ZMM27	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPSLLQ $0x3,%ZMM30,%ZMM29	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPSLLQ $0x3,%ZMM27,%ZMM31	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM11,%ZMM29,%ZMM16	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPADDQ %ZMM11,%ZMM31,%ZMM20	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VMOVAPD 0x200(%RSP),%ZMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VGATHERQPD (,%ZMM16,1),%ZMM7{%K6}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VANDPD %ZMM12,%ZMM4,%ZMM27	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VANDPD %ZMM12,%ZMM19,%ZMM29	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VMULPD %ZMM24,%ZMM7,%ZMM10	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
VMAXPD %ZMM29,%ZMM27,%ZMM31	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VGATHERQPD (,%ZMM20,1),%ZMM30{%K7}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VMULPD %ZMM24,%ZMM30,%ZMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
KMOVB %K1,%K6	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VANDPD %ZMM12,%ZMM18,%ZMM29	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
KMOVB %K1,%K7	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VMAXPD %ZMM10,%ZMM31,%ZMM20	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VANDPD %ZMM12,%ZMM3,%ZMM31	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VMULPD %ZMM11,%ZMM7,%ZMM16	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
VMULPD %ZMM11,%ZMM30,%ZMM27	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
VDIVPD %ZMM20,%ZMM16,%ZMM16	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	4	vect (100.0%)
VMAXPD %ZMM29,%ZMM31,%ZMM20	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VMOVAPD %ZMM16,0x580(%RSP)	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	1	4	1	vect (100.0%)
VMAXPD %ZMM9,%ZMM20,%ZMM16	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VPADDQ %ZMM22,%ZMM0,%ZMM20	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VDIVPD %ZMM16,%ZMM27,%ZMM11	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	4	vect (100.0%)
VPADDQ %ZMM22,%ZMM1,%ZMM27	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPSLLQ $0x3,%ZMM20,%ZMM16	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPSLLQ $0x3,%ZMM27,%ZMM31	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM13,%ZMM31,%ZMM29	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPADDQ %ZMM13,%ZMM16,%ZMM31	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VMOVAPD %ZMM11,0x540(%RSP)	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	1	4	1	vect (100.0%)
VGATHERQPD (,%ZMM29,1),%ZMM27{%K2}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
KMOVB %K1,%K2	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPADDQ %ZMM22,%ZMM17,%ZMM29	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VGATHERQPD (,%ZMM31,1),%ZMM20{%K3}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VPSLLQ $0x3,%ZMM29,%ZMM16	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM13,%ZMM16,%ZMM29	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
KMOVB %K1,%K3	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPADDQ %ZMM22,%ZMM2,%ZMM16	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VGATHERQPD (,%ZMM29,1),%ZMM31{%K4}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VPSLLQ $0x3,%ZMM16,%ZMM29	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM13,%ZMM29,%ZMM16	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPADDQ %ZMM5,%ZMM17,%ZMM17	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VGATHERQPD (,%ZMM16,1),%ZMM11{%K5}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VADDPD %ZMM31,%ZMM27,%ZMM27	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VPADDQ %ZMM5,%ZMM1,%ZMM31	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPADDQ %ZMM5,%ZMM2,%ZMM2	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VMOVAPD %ZMM11,0x500(%RSP)	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	1	4	1	vect (100.0%)
VMOVDQA64 0x1c0(%RSP),%ZMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VADDPD 0x500(%RSP),%ZMM20,%ZMM20	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
KMOVB %K1,%K4	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
KMOVB %K1,%K5	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPSLLQ $0x3,%ZMM2,%ZMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM11,%ZMM1,%ZMM29	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPSLLQ $0x3,%ZMM29,%ZMM16	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM25,%ZMM16,%ZMM29	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VGATHERQPD (,%ZMM29,1),%ZMM16{%K6}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
KMOVB %K1,%K6	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPADDQ %ZMM11,%ZMM0,%ZMM29	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VMULPD %ZMM16,%ZMM27,%ZMM27	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
VPSLLQ $0x3,%ZMM29,%ZMM29	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPSLLQ $0x3,%ZMM31,%ZMM16	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM25,%ZMM29,%ZMM29	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPADDQ %ZMM5,%ZMM0,%ZMM31	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VGATHERQPD (,%ZMM29,1),%ZMM11{%K7}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VPADDQ %ZMM13,%ZMM16,%ZMM29	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPSLLQ $0x3,%ZMM31,%ZMM16	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VMULPD %ZMM11,%ZMM20,%ZMM20	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
KMOVB %K1,%K7	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPADDQ %ZMM13,%ZMM16,%ZMM31	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VGATHERQPD (,%ZMM29,1),%ZMM11{%K2}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VPSLLQ $0x3,%ZMM17,%ZMM16	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VGATHERQPD (,%ZMM31,1),%ZMM29{%K3}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VPADDQ %ZMM13,%ZMM16,%ZMM31	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VGATHERQPD (,%ZMM31,1),%ZMM17{%K4}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VMOVDQA64 0x180(%RSP),%ZMM31	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VPADDQ %ZMM13,%ZMM2,%ZMM16	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VADDPD %ZMM27,%ZMM19,%ZMM19	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VGATHERQPD (,%ZMM16,1),%ZMM2{%K5}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VADDPD %ZMM17,%ZMM11,%ZMM11	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VANDPD %ZMM12,%ZMM27,%ZMM17	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VADDPD %ZMM2,%ZMM29,%ZMM29	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VADDPD %ZMM20,%ZMM18,%ZMM18	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VPADDQ %ZMM31,%ZMM1,%ZMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPADDQ %ZMM31,%ZMM0,%ZMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPSLLQ $0x3,%ZMM1,%ZMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM25,%ZMM1,%ZMM16	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPSLLQ $0x3,%ZMM0,%ZMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM25,%ZMM0,%ZMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VGATHERQPD (,%ZMM16,1),%ZMM1{%K6}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VGATHERQPD (,%ZMM0,1),%ZMM31{%K7}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VMULPD %ZMM1,%ZMM11,%ZMM1	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
VMOVAPD 0x140(%RSP),%ZMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VMULPD %ZMM31,%ZMM29,%ZMM16	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
VANDPD %ZMM12,%ZMM1,%ZMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VADDPD %ZMM1,%ZMM4,%ZMM4	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VADDPD %ZMM16,%ZMM3,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VMAXPD %ZMM17,%ZMM0,%ZMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VSUBPD %ZMM19,%ZMM4,%ZMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VBROADCASTSD 0x2a56f(%RIP),%ZMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMULPD %ZMM11,%ZMM7,%ZMM2	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
VMAXPD %ZMM10,%ZMM0,%ZMM10	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VMULPD %ZMM11,%ZMM30,%ZMM31	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
VANDPD %ZMM12,%ZMM16,%ZMM11	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VDIVPD %ZMM10,%ZMM2,%ZMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	4	vect (100.0%)
VANDPD %ZMM12,%ZMM20,%ZMM2	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VMAXPD %ZMM2,%ZMM11,%ZMM10	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VMULPD 0x2b7fb(%RIP),%ZMM1,%ZMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
VSUBPD %ZMM18,%ZMM3,%ZMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VMOVAPD %ZMM23,%ZMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (100.0%)
VMAXPD %ZMM9,%ZMM10,%ZMM9	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VMULPD 0x2b7df(%RIP),%ZMM2,%ZMM10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
VDIVPD %ZMM9,%ZMM31,%ZMM29	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	4	vect (100.0%)
VDIVPD %ZMM7,%ZMM11,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	4	vect (100.0%)
VDIVPD %ZMM30,%ZMM10,%ZMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	4	vect (100.0%)
VCMPPD $0x1,0x2b802(%RIP),%ZMM7,%K2	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0.50	0.50	0	0	0	6	0.50	vect (100.0%)
VDIVPD %ZMM7,%ZMM4,%ZMM11	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	4	vect (100.0%)
VMOVAPD 0x100(%RSP),%ZMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VMULPD %ZMM7,%ZMM11,%ZMM1{%K2}	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
VMINPD 0x600(%RSP),%ZMM1,%ZMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VCMPPD $0x1,0x2b7db(%RIP),%ZMM9,%K3	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0.50	0.50	0	0	0	6	0.50	vect (100.0%)
VBROADCASTSD 0x2a4d1(%RIP),%ZMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMINPD 0x680(%RSP),%ZMM23,%ZMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VMINPD 0x540(%RSP),%ZMM4,%ZMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VDIVPD %ZMM9,%ZMM2,%ZMM10	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	4	vect (100.0%)
VMOVAPD %ZMM23,%ZMM9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (100.0%)
VMINPD 0x640(%RSP),%ZMM23,%ZMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VMINPD %ZMM0,%ZMM3,%ZMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VMULPD %ZMM7,%ZMM10,%ZMM9{%K3}	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
VMINPD 0x5c0(%RSP),%ZMM9,%ZMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VMINPD 0x580(%RSP),%ZMM2,%ZMM10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VMINPD %ZMM29,%ZMM1,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VMINPD %ZMM0,%ZMM10,%ZMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VMINPD %ZMM7,%ZMM11,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VMOVAPD %ZMM0,0x640(%RSP)	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	1	4	1	vect (100.0%)
VMOVAPD %ZMM3,0x680(%RSP)	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	1	4	1	vect (100.0%)
CMP %ESI,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JNE 438960 <_Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_S2_S2_S2_S2_RdRiS6_S6_S7_S7_S7_._omp_fn.0+0x4a0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A

Function	calc_dt_kernel(int, int, int, int, double, double, double, double, double, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer1D&, clover::Buffer1D&, clover::Buffer1D&, clover::Buffer1D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, double&, int&, double&, double&, int&, int&, int&) [clone ._omp_fn.0]
Source file and lines	calc_dt.cpp:52-75
Module	exec

The loop is defined in:

/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:46,69
/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:52-75

It is main loop of related source loop which is unrolled by 16 (including vectorization).

gain
potential
hint
expert

Vectorization

Details

99% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

96% of SSE/AVX loads are used in vector version.
98% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized loop can use their full power.

Workaround

Use vector aligned instructions:

align your arrays on 64 bytes boundaries: replace { void *p = malloc (size); } with { void *p; posix_memalign (&p, 64, size); }.
inform your compiler that your arrays are vector aligned: if array 'foo' is 64 bytes-aligned, define a pointer 'p_foo' as __builtin_assume_aligned (foo, 64) and use it instead of 'foo' in the loop.

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

Masked instructions

Detected masked instructions.

Details

Vector registers are partially exploited, which is expected if your loop is irregular or mixes elements of different sizes.

Workaround

If your loop is irregular, try to remove or hoist conditional structures out of your loop. If it mixes elements of different sizes, try to uniformize them.

FMA

Detected 16 FMA (fused multiply-add) operations. Presence of both ADD/SUB and MUL operations.

Workaround

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

VCMPPD: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:69
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:69
VGATHERQPD: 35 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:52
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:52
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:53
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:54
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:54
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:55
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:55
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:55
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:55
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:59
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:59
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:59
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:59
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:59
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:59
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:60
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:60
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:60
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:60
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:60
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:60
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:62
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:62
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:63
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:63
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:63
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:63
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:63
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:63
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:64
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:64
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:64
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:64
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:64
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:64
VMOVAPD: 7 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:57
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:57
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:62
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:62
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:63
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:75
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:75

Slow data structures access

Detected data structures (typically arrays) that cannot be efficiently read/written

Details

Irregular (variable stride) or indirect: 35 occurrence(s)

Non-unit stride (uncontiguous) accesses are not efficiently using data caches

Workaround

Try to remove indirect accesses. If applicable, precompute elements out of the innermost loop.

Gather/scatter instructions

Detected gather/scatter instructions (typically caused by indirect accesses).

Details

VGATHERQPD: 35 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:52
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:52
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:53
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:54
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:54
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:55
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:55
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:55
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:55
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:59
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:59
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:59
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:59
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:59
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:59
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:60
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:60
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:60
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:60
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:60
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:60
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:62
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:62
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:63
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:63
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:63
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:63
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:63
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:63
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:64
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:64
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:64
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:64
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:64
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:64

Workaround

Try to simplify your code and/or replace indirect accesses with unit-stride ones.

Type of elements and instruction set

76 AVX-512 instructions are processing arithmetic or math operations on double precision FP elements in vector mode (eight at a time).

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 432 FP arithmetical operations:

144: addition or subtraction (16 inside FMA instructions)
176: multiply (16 inside FMA instructions)
96: divide
16: square root

The binary loop is loading 4112 bytes (514 double precision FP elements). The binary loop is storing 448 bytes (56 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.09 FP operations per loaded or stored byte.

General properties

nb instructions	293
nb uops	1946
loop length	1977
used x86 registers	4
used mmx registers	0
used xmm registers	0
used ymm registers	3
used zmm registers	31
nb stack references	25
ADD-SUB / MUL ratio	0.80

Front-end

ASSUMED MACRO FUSION FIT IN UOP CACHE

micro-operation queue	243.25 cycles
front end	243.25 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	0.33	0.33	0.33	0.33	0.33	0.33	79.50	79.50	79.50	79.50	179.25	179.25	179.25	179.25	182.00	182.00
cycles	0.33	0.33	0.33	0.33	0.33	0.33	79.50	79.50	79.50	79.50	179.25	179.25	179.25	179.25	182.00	182.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions	65.00
Longest recurrence chain latency (RecMII)	1.00

Cycles summary

Front-end	243.25
Dispatch	182.00
DIV/SQRT	65.00
Data deps.	1.00
Overall L1	243.25

Vectorization ratios

INT

all	100%
load	100%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	100%
fma	NA (no fma vectorizable/vectorized instructions)
other	100%

all	98%
load	96%
store	100%
mul	100%
add-sub	100%
fma	100%
div/sqrt	100%
other	97%

INT+FP

all	99%
load	96%
store	100%
mul	100%
add-sub	100%
fma	100%
div/sqrt	100%
other	98%

Vector efficiency ratios

INT

all	97%
load	100%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	100%
fma	NA (no fma vectorizable/vectorized instructions)
other	92%

all	98%
load	96%
store	100%
mul	100%
add-sub	100%
fma	100%
div/sqrt	100%
other	97%

INT+FP

all	98%
load	97%
store	100%
mul	100%
add-sub	100%
fma	100%
div/sqrt	100%
other	95%

Cycles and memory resources usage

Detected masked instructions: assuming all mask elements are active. Assuming all data fit into the L1 cache, each iteration of the binary loop takes 243.25 cycles. At this rate:

6% of peak load performance is reached (16.90 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
1% of peak store performance is reached (1.84 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the loop is: 438960

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
VMOVDQA64 0x4c0(%RSP),%ZMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VMOVDQA32 %ZMM6,%ZMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (100.0%)
KMOVB %K1,%K3	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPADDD 0xc0(%RSP),%ZMM6,%ZMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	vect (100.0%)
INC %EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VEXTRACTI32X8 $0x1,%ZMM2,%YMM4	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	4	0.50	vect (50.0%)
VPMOVSXDQ %YMM2,%ZMM1	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	4	0.50	vect (50.0%)
KMOVB %K1,%K4	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPADDD 0x80(%RSP),%ZMM2,%ZMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	vect (100.0%)
KMOVB %K1,%K5	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPMOVSXDQ %YMM4,%ZMM0	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	4	0.50	vect (50.0%)
VMOVDQA64 0x480(%RSP),%ZMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VPSLLQ $0x3,%ZMM1,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
KMOVB %K1,%K6	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPSLLQ $0x3,%ZMM0,%ZMM11	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
KMOVB %K1,%K7	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
KMOVB %K1,%K2	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPADDQ %ZMM9,%ZMM3,%ZMM10	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPADDQ %ZMM9,%ZMM11,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VMOVDQA64 0x400(%RSP),%ZMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VMOVDQA64 0x440(%RSP),%ZMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VGATHERQPD (,%ZMM10,1),%ZMM18{%K3}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VGATHERQPD (,%ZMM7,1),%ZMM17{%K4}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
KMOVB %K1,%K3	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
KMOVB %K1,%K4	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VGATHERQPD (%RCX,%ZMM4,1),%ZMM20{%K5}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
KMOVB %K1,%K5	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VMINPD %ZMM20,%ZMM18,%ZMM18	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VMINPD %ZMM20,%ZMM17,%ZMM17	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VPADDQ %ZMM9,%ZMM1,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPADDQ %ZMM9,%ZMM0,%ZMM4	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPSLLQ $0x3,%ZMM3,%ZMM10	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM11,%ZMM10,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VMOVDQA64 0x380(%RSP),%ZMM10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VPSLLQ $0x3,%ZMM4,%ZMM9	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM11,%ZMM9,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VMOVDQA64 0x3c0(%RSP),%ZMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VGATHERQPD (,%ZMM7,1),%ZMM27{%K6}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
KMOVB %K1,%K6	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VGATHERQPD (,%ZMM3,1),%ZMM4{%K7}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
KMOVB %K1,%K7	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPADDQ %ZMM10,%ZMM1,%ZMM11	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPADDQ %ZMM10,%ZMM0,%ZMM19	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VMOVDQA64 0x300(%RSP),%ZMM10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VPSLLQ $0x3,%ZMM19,%ZMM16	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPSLLQ $0x3,%ZMM11,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM9,%ZMM16,%ZMM31	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPADDQ %ZMM9,%ZMM7,%ZMM11	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VMOVDQA64 0x340(%RSP),%ZMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VGATHERQPD (,%ZMM11,1),%ZMM3{%K2}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
KMOVB %K1,%K2	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VGATHERQPD (,%ZMM31,1),%ZMM7{%K3}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VADDPD %ZMM3,%ZMM3,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VADDPD %ZMM7,%ZMM7,%ZMM11	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
KMOVB %K1,%K3	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPADDQ %ZMM10,%ZMM1,%ZMM30	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPADDQ %ZMM10,%ZMM0,%ZMM31	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPSLLQ $0x3,%ZMM30,%ZMM29	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPSLLQ $0x3,%ZMM31,%ZMM30	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM9,%ZMM29,%ZMM19	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPADDQ %ZMM9,%ZMM30,%ZMM29	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VGATHERQPD (,%ZMM19,1),%ZMM16{%K4}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
KMOVB %K1,%K4	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VGATHERQPD (,%ZMM29,1),%ZMM19{%K5}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VDIVPD %ZMM16,%ZMM3,%ZMM10	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	4	vect (100.0%)
KMOVB %K1,%K5	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VDIVPD %ZMM19,%ZMM11,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	4	vect (100.0%)
VMOVAPD 0x2c0(%RSP),%ZMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VFMADD231PD %ZMM27,%ZMM27,%ZMM10	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (100.0%)
VMULPD %ZMM11,%ZMM18,%ZMM27	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
VMULPD %ZMM11,%ZMM17,%ZMM20	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
VPMOVSXDQ %YMM2,%ZMM17	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	4	0.50	vect (50.0%)
VSQRTPD %ZMM10,%ZMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	21	8.50	vect (100.0%)
VFMADD132PD %ZMM4,%ZMM7,%ZMM4	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	4	0.50	vect (100.0%)
VMAXPD %ZMM24,%ZMM9,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VDIVPD %ZMM7,%ZMM27,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	4	vect (100.0%)
VSQRTPD %ZMM4,%ZMM4	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	21	8.50	vect (100.0%)
VMAXPD %ZMM24,%ZMM4,%ZMM10	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VPADDQ %ZMM8,%ZMM1,%ZMM4	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPSLLQ $0x3,%ZMM4,%ZMM11	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM26,%ZMM1,%ZMM4	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPADDQ %ZMM15,%ZMM11,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPSLLQ $0x3,%ZMM4,%ZMM11	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM21,%ZMM1,%ZMM4	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VDIVPD %ZMM10,%ZMM20,%ZMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	4	vect (100.0%)
VMOVAPD %ZMM3,0x600(%RSP)	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	1	4	1	vect (100.0%)
VPADDQ %ZMM8,%ZMM0,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPSLLQ $0x3,%ZMM3,%ZMM10	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM26,%ZMM0,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VMOVAPD %ZMM9,0x5c0(%RSP)	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	1	4	1	vect (100.0%)
VPADDQ %ZMM15,%ZMM10,%ZMM9	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPSLLQ $0x3,%ZMM3,%ZMM10	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VGATHERQPD (,%ZMM9,1),%ZMM31{%K7}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
KMOVB %K1,%K7	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPADDQ %ZMM15,%ZMM10,%ZMM9	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VGATHERQPD (,%ZMM7,1),%ZMM16{%K6}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VPADDQ %ZMM15,%ZMM11,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
KMOVB %K1,%K6	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VGATHERQPD (,%ZMM9,1),%ZMM11{%K3}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VPADDQ %ZMM21,%ZMM0,%ZMM10	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VGATHERQPD (,%ZMM7,1),%ZMM30{%K2}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VADDPD %ZMM11,%ZMM31,%ZMM18	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VPSLLQ $0x3,%ZMM4,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VEXTRACTI32X8 $0x1,%ZMM2,%YMM11	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	4	0.50	vect (50.0%)
VPADDQ %ZMM14,%ZMM7,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPSLLQ $0x3,%ZMM10,%ZMM9	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPMOVSXDQ %YMM11,%ZMM2	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	4	0.50	vect (50.0%)
VPADDQ %ZMM14,%ZMM9,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VGATHERQPD (,%ZMM3,1),%ZMM29{%K4}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VPADDQ %ZMM17,%ZMM8,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VGATHERQPD (,%ZMM7,1),%ZMM4{%K5}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VADDPD %ZMM30,%ZMM16,%ZMM19	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VPSLLQ $0x3,%ZMM3,%ZMM10	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VMULPD %ZMM4,%ZMM18,%ZMM18	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
KMOVB %K1,%K2	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPADDQ %ZMM15,%ZMM10,%ZMM9	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
KMOVB %K1,%K3	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
KMOVB %K1,%K4	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VGATHERQPD (,%ZMM9,1),%ZMM4{%K6}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VPADDQ %ZMM2,%ZMM8,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPSLLQ $0x3,%ZMM7,%ZMM11	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
KMOVB %K1,%K5	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VMULPD %ZMM29,%ZMM19,%ZMM19	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
VPADDQ %ZMM17,%ZMM26,%ZMM9	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPADDQ %ZMM15,%ZMM11,%ZMM10	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPSLLQ $0x3,%ZMM9,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
KMOVB %K1,%K6	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPADDQ %ZMM15,%ZMM7,%ZMM11	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VGATHERQPD (,%ZMM11,1),%ZMM16{%K2}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
KMOVB %K1,%K2	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VGATHERQPD (,%ZMM10,1),%ZMM3{%K7}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VPADDQ %ZMM17,%ZMM21,%ZMM11	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPADDQ %ZMM2,%ZMM26,%ZMM10	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VADDPD %ZMM16,%ZMM4,%ZMM4	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
KMOVB %K1,%K7	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPSLLQ $0x3,%ZMM10,%ZMM9	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPSLLQ $0x3,%ZMM11,%ZMM10	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM15,%ZMM9,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPADDQ %ZMM14,%ZMM10,%ZMM9	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VGATHERQPD (,%ZMM7,1),%ZMM27{%K3}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
KMOVB %K1,%K3	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VGATHERQPD (,%ZMM9,1),%ZMM31{%K4}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VPADDQ %ZMM2,%ZMM21,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VMOVDQA64 0x240(%RSP),%ZMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VPSLLQ $0x3,%ZMM7,%ZMM11	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM14,%ZMM11,%ZMM10	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VMOVDQA64 0x280(%RSP),%ZMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VADDPD %ZMM27,%ZMM3,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VGATHERQPD (,%ZMM10,1),%ZMM20{%K5}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VMULPD %ZMM31,%ZMM4,%ZMM4	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
KMOVB %K1,%K4	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VMULPD %ZMM20,%ZMM3,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
KMOVB %K1,%K5	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPADDQ %ZMM9,%ZMM1,%ZMM30	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPADDQ %ZMM9,%ZMM0,%ZMM27	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPSLLQ $0x3,%ZMM30,%ZMM29	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPSLLQ $0x3,%ZMM27,%ZMM31	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM11,%ZMM29,%ZMM16	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPADDQ %ZMM11,%ZMM31,%ZMM20	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VMOVAPD 0x200(%RSP),%ZMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VGATHERQPD (,%ZMM16,1),%ZMM7{%K6}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VANDPD %ZMM12,%ZMM4,%ZMM27	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VANDPD %ZMM12,%ZMM19,%ZMM29	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VMULPD %ZMM24,%ZMM7,%ZMM10	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
VMAXPD %ZMM29,%ZMM27,%ZMM31	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VGATHERQPD (,%ZMM20,1),%ZMM30{%K7}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VMULPD %ZMM24,%ZMM30,%ZMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
KMOVB %K1,%K6	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VANDPD %ZMM12,%ZMM18,%ZMM29	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
KMOVB %K1,%K7	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VMAXPD %ZMM10,%ZMM31,%ZMM20	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VANDPD %ZMM12,%ZMM3,%ZMM31	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VMULPD %ZMM11,%ZMM7,%ZMM16	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
VMULPD %ZMM11,%ZMM30,%ZMM27	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
VDIVPD %ZMM20,%ZMM16,%ZMM16	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	4	vect (100.0%)
VMAXPD %ZMM29,%ZMM31,%ZMM20	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VMOVAPD %ZMM16,0x580(%RSP)	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	1	4	1	vect (100.0%)
VMAXPD %ZMM9,%ZMM20,%ZMM16	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VPADDQ %ZMM22,%ZMM0,%ZMM20	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VDIVPD %ZMM16,%ZMM27,%ZMM11	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	4	vect (100.0%)
VPADDQ %ZMM22,%ZMM1,%ZMM27	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPSLLQ $0x3,%ZMM20,%ZMM16	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPSLLQ $0x3,%ZMM27,%ZMM31	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM13,%ZMM31,%ZMM29	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPADDQ %ZMM13,%ZMM16,%ZMM31	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VMOVAPD %ZMM11,0x540(%RSP)	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	1	4	1	vect (100.0%)
VGATHERQPD (,%ZMM29,1),%ZMM27{%K2}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
KMOVB %K1,%K2	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPADDQ %ZMM22,%ZMM17,%ZMM29	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VGATHERQPD (,%ZMM31,1),%ZMM20{%K3}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VPSLLQ $0x3,%ZMM29,%ZMM16	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM13,%ZMM16,%ZMM29	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
KMOVB %K1,%K3	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPADDQ %ZMM22,%ZMM2,%ZMM16	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VGATHERQPD (,%ZMM29,1),%ZMM31{%K4}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VPSLLQ $0x3,%ZMM16,%ZMM29	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM13,%ZMM29,%ZMM16	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPADDQ %ZMM5,%ZMM17,%ZMM17	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VGATHERQPD (,%ZMM16,1),%ZMM11{%K5}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VADDPD %ZMM31,%ZMM27,%ZMM27	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VPADDQ %ZMM5,%ZMM1,%ZMM31	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPADDQ %ZMM5,%ZMM2,%ZMM2	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VMOVAPD %ZMM11,0x500(%RSP)	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	1	4	1	vect (100.0%)
VMOVDQA64 0x1c0(%RSP),%ZMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VADDPD 0x500(%RSP),%ZMM20,%ZMM20	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
KMOVB %K1,%K4	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
KMOVB %K1,%K5	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPSLLQ $0x3,%ZMM2,%ZMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM11,%ZMM1,%ZMM29	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPSLLQ $0x3,%ZMM29,%ZMM16	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM25,%ZMM16,%ZMM29	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VGATHERQPD (,%ZMM29,1),%ZMM16{%K6}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
KMOVB %K1,%K6	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPADDQ %ZMM11,%ZMM0,%ZMM29	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VMULPD %ZMM16,%ZMM27,%ZMM27	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
VPSLLQ $0x3,%ZMM29,%ZMM29	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPSLLQ $0x3,%ZMM31,%ZMM16	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM25,%ZMM29,%ZMM29	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPADDQ %ZMM5,%ZMM0,%ZMM31	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VGATHERQPD (,%ZMM29,1),%ZMM11{%K7}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VPADDQ %ZMM13,%ZMM16,%ZMM29	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPSLLQ $0x3,%ZMM31,%ZMM16	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VMULPD %ZMM11,%ZMM20,%ZMM20	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
KMOVB %K1,%K7	1	0	0	0	0	0	0	0	0	0	0	0.50	0	0	0.50	0	0	1	0.50	N/A
VPADDQ %ZMM13,%ZMM16,%ZMM31	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VGATHERQPD (,%ZMM29,1),%ZMM11{%K2}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VPSLLQ $0x3,%ZMM17,%ZMM16	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VGATHERQPD (,%ZMM31,1),%ZMM29{%K3}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VPADDQ %ZMM13,%ZMM16,%ZMM31	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VGATHERQPD (,%ZMM31,1),%ZMM17{%K4}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VMOVDQA64 0x180(%RSP),%ZMM31	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VPADDQ %ZMM13,%ZMM2,%ZMM16	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VADDPD %ZMM27,%ZMM19,%ZMM19	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VGATHERQPD (,%ZMM16,1),%ZMM2{%K5}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VADDPD %ZMM17,%ZMM11,%ZMM11	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VANDPD %ZMM12,%ZMM27,%ZMM17	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VADDPD %ZMM2,%ZMM29,%ZMM29	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VADDPD %ZMM20,%ZMM18,%ZMM18	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VPADDQ %ZMM31,%ZMM1,%ZMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPADDQ %ZMM31,%ZMM0,%ZMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPSLLQ $0x3,%ZMM1,%ZMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM25,%ZMM1,%ZMM16	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VPSLLQ $0x3,%ZMM0,%ZMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (100.0%)
VPADDQ %ZMM25,%ZMM0,%ZMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VGATHERQPD (,%ZMM16,1),%ZMM1{%K6}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VGATHERQPD (,%ZMM0,1),%ZMM31{%K7}	48	0	0	0	0	0	0	2	2	2	2	2.50	4	4.50	3	5	5	0-16	8.94	vect (100.0%)
VMULPD %ZMM1,%ZMM11,%ZMM1	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
VMOVAPD 0x140(%RSP),%ZMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VMULPD %ZMM31,%ZMM29,%ZMM16	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
VANDPD %ZMM12,%ZMM1,%ZMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VADDPD %ZMM1,%ZMM4,%ZMM4	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VADDPD %ZMM16,%ZMM3,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VMAXPD %ZMM17,%ZMM0,%ZMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VSUBPD %ZMM19,%ZMM4,%ZMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VBROADCASTSD 0x2a56f(%RIP),%ZMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMULPD %ZMM11,%ZMM7,%ZMM2	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
VMAXPD %ZMM10,%ZMM0,%ZMM10	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VMULPD %ZMM11,%ZMM30,%ZMM31	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
VANDPD %ZMM12,%ZMM16,%ZMM11	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VDIVPD %ZMM10,%ZMM2,%ZMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	4	vect (100.0%)
VANDPD %ZMM12,%ZMM20,%ZMM2	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (100.0%)
VMAXPD %ZMM2,%ZMM11,%ZMM10	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VMULPD 0x2b7fb(%RIP),%ZMM1,%ZMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
VSUBPD %ZMM18,%ZMM3,%ZMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VMOVAPD %ZMM23,%ZMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (100.0%)
VMAXPD %ZMM9,%ZMM10,%ZMM9	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VMULPD 0x2b7df(%RIP),%ZMM2,%ZMM10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
VDIVPD %ZMM9,%ZMM31,%ZMM29	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	4	vect (100.0%)
VDIVPD %ZMM7,%ZMM11,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	4	vect (100.0%)
VDIVPD %ZMM30,%ZMM10,%ZMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	4	vect (100.0%)
VCMPPD $0x1,0x2b802(%RIP),%ZMM7,%K2	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0.50	0.50	0	0	0	6	0.50	vect (100.0%)
VDIVPD %ZMM7,%ZMM4,%ZMM11	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	4	vect (100.0%)
VMOVAPD 0x100(%RSP),%ZMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (100.0%)
VMULPD %ZMM7,%ZMM11,%ZMM1{%K2}	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
VMINPD 0x600(%RSP),%ZMM1,%ZMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VCMPPD $0x1,0x2b7db(%RIP),%ZMM9,%K3	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0.50	0.50	0	0	0	6	0.50	vect (100.0%)
VBROADCASTSD 0x2a4d1(%RIP),%ZMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMINPD 0x680(%RSP),%ZMM23,%ZMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VMINPD 0x540(%RSP),%ZMM4,%ZMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VDIVPD %ZMM9,%ZMM2,%ZMM10	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	4	vect (100.0%)
VMOVAPD %ZMM23,%ZMM9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (100.0%)
VMINPD 0x640(%RSP),%ZMM23,%ZMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VMINPD %ZMM0,%ZMM3,%ZMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VMULPD %ZMM7,%ZMM10,%ZMM9{%K3}	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50	vect (100.0%)
VMINPD 0x5c0(%RSP),%ZMM9,%ZMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VMINPD 0x580(%RSP),%ZMM2,%ZMM10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VMINPD %ZMM29,%ZMM1,%ZMM7	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VMINPD %ZMM0,%ZMM10,%ZMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VMINPD %ZMM7,%ZMM11,%ZMM3	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (100.0%)
VMOVAPD %ZMM0,0x640(%RSP)	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	1	4	1	vect (100.0%)
VMOVAPD %ZMM3,0x680(%RSP)	2	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	1	1	4	1	vect (100.0%)
CMP %ESI,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JNE 438960 <_Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_S2_S2_S2_S2_RdRiS6_S6_S7_S7_S7_._omp_fn.0+0x4a0>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A

Report Configuration

Vectorization

Details

Workaround

Execution units bottlenecks

Masked instructions

Details

Workaround

FMA

Workaround

Complex instructions

Details

Slow data structures access

Details

Workaround

Gather/scatter instructions

Details

Workaround

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Vectorization

Details

Workaround

Execution units bottlenecks

Masked instructions

Details

Workaround

FMA

Workaround

Complex instructions

Details

Slow data structures access

Details

Workaround

Gather/scatter instructions

Details

Workaround

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code