| Loop Id: 234 | Module: exec | Source: advec_mom.cpp:114-139 [...] | Coverage: 3.65% |
|---|
| Loop Id: 234 | Module: exec | Source: advec_mom.cpp:114-139 [...] | Coverage: 3.65% |
|---|
0x434cd0 VMOVUPD (%R8,%RAX,1),%ZMM23 [3] |
0x434cd7 VMOVUPD 0x40(%R8,%RAX,1),%ZMM22 [3] |
0x434cdf VMOVDQA32 %ZMM15,%ZMM1 |
0x434ce5 KMOVB %K1,%K6 |
0x434ce9 VPADDD %ZMM26,%ZMM15,%ZMM15 |
0x434cef VPMOVSXDQ %YMM1,%ZMM8 |
0x434cf5 VEXTRACTI32X8 $0x1,%ZMM1,%YMM7 |
0x434cfc VPADDD %ZMM25,%ZMM1,%ZMM13 |
0x434d02 VPADDD %ZMM16,%ZMM1,%ZMM6 |
0x434d08 VPMOVSXDQ %YMM7,%ZMM5 |
0x434d0e VEXTRACTI32X8 $0x1,%ZMM13,%YMM9 |
0x434d15 KMOVB %K1,%K7 |
0x434d19 VPMOVSXDQ %YMM13,%ZMM21 |
0x434d1f VMOVDQA64 %ZMM8,%ZMM20 |
0x434d25 VMOVDQA %YMM13,%YMM12 |
0x434d2a VPMOVSXDQ %YMM9,%ZMM14 |
0x434d30 VCMPPD $0x1,%ZMM0,%ZMM23,%K4 |
0x434d37 VCMPPD $0x1,%ZMM0,%ZMM22,%K3 |
0x434d3e VMOVDQA64 %ZMM5,%ZMM3 |
0x434d44 KUNPCKBW %K4,%K3,%K2 |
0x434d48 VPMOVSXDQ %YMM12,%ZMM20{%K4} |
0x434d4e VMOVDQA64 %ZMM8,%ZMM21{%K4} |
0x434d54 VPADDD %ZMM24,%ZMM1,%ZMM6{%K2} |
0x434d5a KNOTW %K2,%K5 |
0x434d5e KMOVB %K1,%K4 |
0x434d62 VPMOVSXDQ %YMM9,%ZMM3{%K3} |
0x434d68 KMOVB %K1,%K2 |
0x434d6c VMOVDQA64 %ZMM5,%ZMM14{%K3} |
0x434d72 VPADDD %ZMM16,%ZMM1,%ZMM13{%K5} |
0x434d78 VGATHERQPD (%RDX,%ZMM20,8),%ZMM8{%K6} [6] |
0x434d7f KMOVB %K1,%K3 |
0x434d83 KMOVB %K1,%K5 |
0x434d87 VGATHERDPD (%RDX,%YMM6,8),%ZMM2{%K4} [6] |
0x434d8e VSHUFI32X4 $-0x12,%ZMM6,%ZMM6,%ZMM1 |
0x434d95 VGATHERQPD (%RDX,%ZMM21,8),%ZMM6{%K2} [6] |
0x434d9c VGATHERQPD (%RDX,%ZMM3,8),%ZMM7{%K7} [6] |
0x434da3 VSUBPD %ZMM2,%ZMM8,%ZMM9 |
0x434da9 VSUBPD %ZMM8,%ZMM6,%ZMM4 |
0x434daf VGATHERDPD (%RDX,%YMM1,8),%ZMM5{%K3} [6] |
0x434db6 VGATHERQPD (%RDX,%ZMM14,8),%ZMM21{%K5} [6] |
0x434dbd VMOVAPD %ZMM0,%ZMM6 |
0x434dc3 VSUBPD %ZMM7,%ZMM21,%ZMM2 |
0x434dc9 VSUBPD %ZMM5,%ZMM7,%ZMM12 |
0x434dcf VMULPD %ZMM4,%ZMM9,%ZMM14 |
0x434dd5 VANDPD %ZMM11,%ZMM4,%ZMM21 |
0x434ddb VANDPD %ZMM11,%ZMM9,%ZMM9 |
0x434de1 VMULPD %ZMM2,%ZMM12,%ZMM1 |
0x434de7 VANDPD %ZMM11,%ZMM12,%ZMM12 |
0x434ded VCMPPD $0xe,%ZMM0,%ZMM14,%K3 |
0x434df4 VANDPD %ZMM11,%ZMM2,%ZMM14 |
0x434dfa VMOVUPD (%RAX),%ZMM28{%K3} [2] |
0x434e00 VCMPPD $0xe,%ZMM0,%ZMM1,%K2 |
0x434e07 VMOVUPD 0x40(%RAX),%ZMM27{%K2} [2] |
0x434e0e KMOVB %K3,%K4 |
0x434e12 VCMPPD $0xe,%ZMM0,%ZMM4,%K7{%K3} |
0x434e19 KMOVB %K2,%K5 |
0x434e1d VCMPPD $0xe,%ZMM0,%ZMM2,%K6{%K2} |
0x434e24 VANDPD %ZMM11,%ZMM22,%ZMM2 |
0x434e2a VGATHERQPD (%R9,%ZMM20,8),%ZMM6{%K4} [4] |
0x434e31 VMOVAPD %ZMM0,%ZMM20 |
0x434e37 VGATHERQPD (%R9,%ZMM3,8),%ZMM20{%K5} [4] |
0x434e3e VANDPD %ZMM11,%ZMM23,%ZMM3 |
0x434e44 VDIVPD %ZMM6,%ZMM3,%ZMM4 |
0x434e4a VMOVAPD %ZMM0,%ZMM6 |
0x434e50 VBLENDMPD %ZMM10,%ZMM19,%ZMM1{%K7} |
0x434e56 KMOVB %K2,%K7 |
0x434e5a VBLENDMPD %ZMM10,%ZMM19,%ZMM5{%K6} |
0x434e60 KMOVB %K3,%K6 |
0x434e64 VDIVPD %ZMM20,%ZMM2,%ZMM3 |
0x434e6a VMOVAPD %ZMM0,%ZMM2 |
0x434e70 VGATHERDPD (%RCX,%YMM13,8),%ZMM2{%K6} [5] |
0x434e77 VSHUFI32X4 $-0x12,%ZMM13,%ZMM13,%ZMM13 |
0x434e7e VGATHERDPD (%RCX,%YMM13,8),%ZMM6{%K7} [5] |
0x434e85 VSUBPD %ZMM3,%ZMM18,%ZMM20 |
0x434e8b VADDPD %ZMM10,%ZMM3,%ZMM13 |
0x434e91 VSUBPD %ZMM3,%ZMM10,%ZMM3 |
0x434e97 VMULPD %ZMM12,%ZMM13,%ZMM13 |
0x434e9d VMULPD %ZMM14,%ZMM20,%ZMM20 |
0x434ea3 VMINPD %ZMM14,%ZMM12,%ZMM12 |
0x434ea9 VMULPD %ZMM5,%ZMM3,%ZMM5 |
0x434eaf VADDPD %ZMM10,%ZMM4,%ZMM3 |
0x434eb5 VDIVPD %ZMM27,%ZMM20,%ZMM20 |
0x434ebb VDIVPD %ZMM6,%ZMM13,%ZMM6 |
0x434ec1 VADDPD %ZMM6,%ZMM20,%ZMM13 |
0x434ec7 VMULPD %ZMM17,%ZMM27,%ZMM20 |
0x434ecd VSUBPD %ZMM4,%ZMM18,%ZMM6 |
0x434ed3 VSUBPD %ZMM4,%ZMM10,%ZMM4 |
0x434ed9 VMULPD %ZMM20,%ZMM13,%ZMM20 |
0x434edf VMULPD %ZMM21,%ZMM6,%ZMM13 |
0x434ee5 VMINPD %ZMM21,%ZMM9,%ZMM21 |
0x434eeb VMULPD %ZMM9,%ZMM3,%ZMM6 |
0x434ef1 VMULPD %ZMM1,%ZMM4,%ZMM1 |
0x434ef7 VMINPD %ZMM12,%ZMM20,%ZMM14 |
0x434efd VDIVPD %ZMM28,%ZMM13,%ZMM12 |
0x434f03 VFMADD231PD %ZMM5,%ZMM14,%ZMM7{%K2} |
0x434f09 VMULPD %ZMM22,%ZMM7,%ZMM7 |
0x434f0f VDIVPD %ZMM2,%ZMM6,%ZMM2 |
0x434f15 VMOVUPD %ZMM7,0x40(%R13,%RAX,1) [1] |
0x434f1d VADDPD %ZMM2,%ZMM12,%ZMM13 |
0x434f23 VMULPD %ZMM17,%ZMM28,%ZMM12 |
0x434f29 VMULPD %ZMM12,%ZMM13,%ZMM3 |
0x434f2f VMINPD %ZMM21,%ZMM3,%ZMM9 |
0x434f35 VFMADD231PD %ZMM1,%ZMM9,%ZMM8{%K3} |
0x434f3b VMULPD %ZMM23,%ZMM8,%ZMM8 |
0x434f41 VMOVUPD %ZMM8,(%R13,%RAX,1) [1] |
0x434f49 SUB $-0x80,%RAX |
0x434f4d CMP %RAX,%R11 |
0x434f50 JNE 434cd0 |
/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h: 69 - 69 |
-------------------------------------------------------------------------------- |
69: T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; } |
/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_mom.cpp: 114 - 139 |
-------------------------------------------------------------------------------- |
114: if (node_flux(i, j) < 0.0) { |
[...] |
120: upwind = i - 1; |
121: donor = i; |
122: downwind = i + 1; |
123: dif = upwind; |
124: } |
125: sigma = std::fabs(node_flux(i, j)) / (node_mass_pre(donor, j)); |
126: width = celldx[i]; |
127: vdiffuw = vel1(donor, j) - vel1(upwind, j); |
128: vdiffdw = vel1(downwind, j) - vel1(donor, j); |
129: limiter = 0.0; |
130: if (vdiffuw * vdiffdw > 0.0) { |
131: auw = std::fabs(vdiffuw); |
132: adw = std::fabs(vdiffdw); |
133: wind = 1.0; |
134: if (vdiffdw <= 0.0) wind = -1.0; |
135: limiter = |
136: wind * std::fmin(std::fmin(width * ((2.0 - sigma) * adw / width + (1.0 + sigma) * auw / celldx[dif]) / 6.0, auw), adw); |
137: } |
138: advec_vel_s = vel1(donor, j) + (1.0 - sigma) * limiter; |
139: mom_flux(i, j) = advec_vel_s * node_flux(i, j); |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ►96.65+ | gomp_thread_start | team.c:130 | libgomp.so.1.0.0 |
| ○ | start_thread | libc.so.6 | |
| ○ | __GI___clone3 | libc.so.6 |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.02 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 1.02 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.32 |
| Bottlenecks | micro-operation queue, |
| Function | advec_mom_kernel(int, int, int, int, clover::Buffer2D |
| Source | context.h:69-69,advec_mom.cpp:114-114,advec_mom.cpp:120-139 |
| Source loop unroll info | unrolled by 16 |
| Source loop unroll confidence level | high |
| Unroll/vectorization loop type | main |
| Unroll factor | 16 |
| CQA cycles | 71.13 |
| CQA cycles if no scalar integer | 69.63 |
| CQA cycles if FP arith vectorized | 71.13 |
| CQA cycles if fully vectorized | 69.81 |
| Front-end cycles | 71.13 |
| P0 cycles | 0.33 |
| P1 cycles | 0.33 |
| P2 cycles | 0.33 |
| P3 cycles | 0.33 |
| P4 cycles | 0.33 |
| P5 cycles | 0.33 |
| P6 cycles | 21.50 |
| P7 cycles | 21.50 |
| P8 cycles | 21.50 |
| P9 cycles | 21.50 |
| P10 cycles | 53.75 |
| P11 cycles | 53.75 |
| P12 cycles | 53.75 |
| P13 cycles | 53.75 |
| P14 cycles | 51.00 |
| P15 cycles | 51.00 |
| DIV/SQRT cycles | 24.00 |
| Inter-iter dependencies cycles | 19 - 35 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 108.00 |
| Nb uops | 569.00 |
| Nb loads | 14.00 |
| Nb stores | 2.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 4.05 |
| Nb FLOP add-sub | 96.00 |
| Nb FLOP mul | 112.00 |
| Nb FLOP fma | 16.00 |
| Nb FLOP div | 48.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 14.40 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 896.00 |
| Bytes stored | 128.00 |
| Stride 0 | 0.00 |
| Stride 1 | 3.00 |
| Stride n | 0.00 |
| Stride unknown | 1.00 |
| Stride indirect | 2.00 |
| Vectorization ratio all | 100.00 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | 100.00 |
| Vectorization ratio add_sub | 100.00 |
| Vectorization ratio fma | 100.00 |
| Vectorization ratio div_sqrt | 100.00 |
| Vectorization ratio other | 100.00 |
| Vector-efficiency ratio all | 94.09 |
| Vector-efficiency ratio load | 100.00 |
| Vector-efficiency ratio store | 100.00 |
| Vector-efficiency ratio mul | 100.00 |
| Vector-efficiency ratio add_sub | 100.00 |
| Vector-efficiency ratio fma | 100.00 |
| Vector-efficiency ratio div_sqrt | 100.00 |
| Vector-efficiency ratio other | 88.54 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.02 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 1.02 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.32 |
| Bottlenecks | micro-operation queue, |
| Function | advec_mom_kernel(int, int, int, int, clover::Buffer2D |
| Source | context.h:69-69,advec_mom.cpp:114-114,advec_mom.cpp:120-139 |
| Source loop unroll info | unrolled by 16 |
| Source loop unroll confidence level | high |
| Unroll/vectorization loop type | main |
| Unroll factor | 16 |
| CQA cycles | 71.13 |
| CQA cycles if no scalar integer | 69.63 |
| CQA cycles if FP arith vectorized | 71.13 |
| CQA cycles if fully vectorized | 69.81 |
| Front-end cycles | 71.13 |
| P0 cycles | 0.33 |
| P1 cycles | 0.33 |
| P2 cycles | 0.33 |
| P3 cycles | 0.33 |
| P4 cycles | 0.33 |
| P5 cycles | 0.33 |
| P6 cycles | 21.50 |
| P7 cycles | 21.50 |
| P8 cycles | 21.50 |
| P9 cycles | 21.50 |
| P10 cycles | 53.75 |
| P11 cycles | 53.75 |
| P12 cycles | 53.75 |
| P13 cycles | 53.75 |
| P14 cycles | 51.00 |
| P15 cycles | 51.00 |
| DIV/SQRT cycles | 24.00 |
| Inter-iter dependencies cycles | 19 - 35 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 108.00 |
| Nb uops | 569.00 |
| Nb loads | 14.00 |
| Nb stores | 2.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 4.05 |
| Nb FLOP add-sub | 96.00 |
| Nb FLOP mul | 112.00 |
| Nb FLOP fma | 16.00 |
| Nb FLOP div | 48.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 14.40 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 896.00 |
| Bytes stored | 128.00 |
| Stride 0 | 0.00 |
| Stride 1 | 3.00 |
| Stride n | 0.00 |
| Stride unknown | 1.00 |
| Stride indirect | 2.00 |
| Vectorization ratio all | 100.00 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | 100.00 |
| Vectorization ratio add_sub | 100.00 |
| Vectorization ratio fma | 100.00 |
| Vectorization ratio div_sqrt | 100.00 |
| Vectorization ratio other | 100.00 |
| Vector-efficiency ratio all | 94.09 |
| Vector-efficiency ratio load | 100.00 |
| Vector-efficiency ratio store | 100.00 |
| Vector-efficiency ratio mul | 100.00 |
| Vector-efficiency ratio add_sub | 100.00 |
| Vector-efficiency ratio fma | 100.00 |
| Vector-efficiency ratio div_sqrt | 100.00 |
| Vector-efficiency ratio other | 88.54 |
| Path / |
 |
| nb instructions | 108 |
| nb uops | 569 |
| loop length | 646 |
| used x86 registers | 7 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 6 |
| used zmm registers | 29 |
| nb stack references | 0 |
| ADD-SUB / MUL ratio | 0.86 |
| micro-operation queue | 71.13 cycles |
| front end | 71.13 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 21.50 | 21.50 | 21.50 | 21.50 | 53.75 | 53.75 | 53.75 | 53.75 | 51.00 | 51.00 |
| cycles | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 21.50 | 21.50 | 21.50 | 21.50 | 53.75 | 53.75 | 53.75 | 53.75 | 51.00 | 51.00 |
| Cycles executing div or sqrt instructions | 24.00 |
| Longest recurrence chain latency (RecMII) | 19.00-35.00 |
| Front-end | 71.13 |
| Dispatch | 53.75 |
| DIV/SQRT | 24.00 |
| Data deps. | 19.00-35.00 |
| Overall L1 | 71.13 |
| all | 100% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 100% |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | 100% |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | 100% |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | 100% |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | 100% |
| all | 73% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 65% |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | 100% |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | 100% |
| all | 94% |
| load | 100% |
| store | 100% |
| mul | 100% |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | 88% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VMOVUPD (%R8,%RAX,1),%ZMM23 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD 0x40(%R8,%RAX,1),%ZMM22 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVDQA32 %ZMM15,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (100.0%) |
| KMOVB %K1,%K6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| VPADDD %ZMM26,%ZMM15,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (100.0%) |
| VPMOVSXDQ %YMM1,%ZMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 0.50 | vect (50.0%) |
| VEXTRACTI32X8 $0x1,%ZMM1,%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 0.50 | vect (50.0%) |
| VPADDD %ZMM25,%ZMM1,%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (100.0%) |
| VPADDD %ZMM16,%ZMM1,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (100.0%) |
| VPMOVSXDQ %YMM7,%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 0.50 | vect (50.0%) |
| VEXTRACTI32X8 $0x1,%ZMM13,%YMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 0.50 | vect (50.0%) |
| KMOVB %K1,%K7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| VPMOVSXDQ %YMM13,%ZMM21 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 0.50 | vect (50.0%) |
| VMOVDQA64 %ZMM8,%ZMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (100.0%) |
| VMOVDQA %YMM13,%YMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (50.0%) |
| VPMOVSXDQ %YMM9,%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 0.50 | vect (50.0%) |
| VCMPPD $0x1,%ZMM0,%ZMM23,%K4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 | vect (100.0%) |
| VCMPPD $0x1,%ZMM0,%ZMM22,%K3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 | vect (100.0%) |
| VMOVDQA64 %ZMM5,%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (100.0%) |
| KUNPCKBW %K4,%K3,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| VPMOVSXDQ %YMM12,%ZMM20{%K4} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 0.50 | vect (50.0%) |
| VMOVDQA64 %ZMM8,%ZMM21{%K4} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (100.0%) |
| VPADDD %ZMM24,%ZMM1,%ZMM6{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (100.0%) |
| KNOTW %K2,%K5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| KMOVB %K1,%K4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| VPMOVSXDQ %YMM9,%ZMM3{%K3} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 0.50 | vect (50.0%) |
| KMOVB %K1,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| VMOVDQA64 %ZMM5,%ZMM14{%K3} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (100.0%) |
| VPADDD %ZMM16,%ZMM1,%ZMM13{%K5} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (100.0%) |
| VGATHERQPD (%RDX,%ZMM20,8),%ZMM8{%K6} | 48 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 2 | 2 | 2 | 2.50 | 4 | 4.50 | 3 | 5 | 5 | 0-16 | 8.94 | vect (100.0%) |
| KMOVB %K1,%K3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| KMOVB %K1,%K5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| VGATHERDPD (%RDX,%YMM6,8),%ZMM2{%K4} | 46 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 2 | 2 | 2 | 2.50 | 3.50 | 4 | 3 | 5 | 5 | 0-16 | 8 | vect (100.0%) |
| VSHUFI32X4 $-0x12,%ZMM6,%ZMM6,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 0.50 | vect (50.0%) |
| VGATHERQPD (%RDX,%ZMM21,8),%ZMM6{%K2} | 48 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 2 | 2 | 2 | 2.50 | 4 | 4.50 | 3 | 5 | 5 | 0-16 | 8.94 | vect (100.0%) |
| VGATHERQPD (%RDX,%ZMM3,8),%ZMM7{%K7} | 48 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 2 | 2 | 2 | 2.50 | 4 | 4.50 | 3 | 5 | 5 | 0-16 | 8.94 | vect (100.0%) |
| VSUBPD %ZMM2,%ZMM8,%ZMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM8,%ZMM6,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VGATHERDPD (%RDX,%YMM1,8),%ZMM5{%K3} | 46 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 2 | 2 | 2 | 2.50 | 3.50 | 4 | 3 | 5 | 5 | 0-16 | 8 | vect (100.0%) |
| VGATHERQPD (%RDX,%ZMM14,8),%ZMM21{%K5} | 48 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 2 | 2 | 2 | 2.50 | 4 | 4.50 | 3 | 5 | 5 | 0-16 | 8.94 | vect (100.0%) |
| VMOVAPD %ZMM0,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (100.0%) |
| VSUBPD %ZMM7,%ZMM21,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM5,%ZMM7,%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMULPD %ZMM4,%ZMM9,%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VANDPD %ZMM11,%ZMM4,%ZMM21 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (100.0%) |
| VANDPD %ZMM11,%ZMM9,%ZMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (100.0%) |
| VMULPD %ZMM2,%ZMM12,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VANDPD %ZMM11,%ZMM12,%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (100.0%) |
| VCMPPD $0xe,%ZMM0,%ZMM14,%K3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 | vect (100.0%) |
| VANDPD %ZMM11,%ZMM2,%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (100.0%) |
| VMOVUPD (%RAX),%ZMM28{%K3} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VCMPPD $0xe,%ZMM0,%ZMM1,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 | vect (100.0%) |
| VMOVUPD 0x40(%RAX),%ZMM27{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| KMOVB %K3,%K4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| VCMPPD $0xe,%ZMM0,%ZMM4,%K7{%K3} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 | vect (100.0%) |
| KMOVB %K2,%K5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| VCMPPD $0xe,%ZMM0,%ZMM2,%K6{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 | vect (100.0%) |
| VANDPD %ZMM11,%ZMM22,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (100.0%) |
| VGATHERQPD (%R9,%ZMM20,8),%ZMM6{%K4} | 48 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 2 | 2 | 2 | 2.50 | 4 | 4.50 | 3 | 5 | 5 | 0-16 | 8.94 | vect (100.0%) |
| VMOVAPD %ZMM0,%ZMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (100.0%) |
| VGATHERQPD (%R9,%ZMM3,8),%ZMM20{%K5} | 48 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 2 | 2 | 2 | 2.50 | 4 | 4.50 | 3 | 5 | 5 | 0-16 | 8.94 | vect (100.0%) |
| VANDPD %ZMM11,%ZMM23,%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (100.0%) |
| VDIVPD %ZMM6,%ZMM3,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 4 | vect (100.0%) |
| VMOVAPD %ZMM0,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (100.0%) |
| VBLENDMPD %ZMM10,%ZMM19,%ZMM1{%K7} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (100.0%) |
| KMOVB %K2,%K7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| VBLENDMPD %ZMM10,%ZMM19,%ZMM5{%K6} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (100.0%) |
| KMOVB %K3,%K6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| VDIVPD %ZMM20,%ZMM2,%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 4 | vect (100.0%) |
| VMOVAPD %ZMM0,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (100.0%) |
| VGATHERDPD (%RCX,%YMM13,8),%ZMM2{%K6} | 46 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 2 | 2 | 2 | 2.50 | 3.50 | 4 | 3 | 5 | 5 | 0-16 | 8 | vect (100.0%) |
| VSHUFI32X4 $-0x12,%ZMM13,%ZMM13,%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 0.50 | vect (50.0%) |
| VGATHERDPD (%RCX,%YMM13,8),%ZMM6{%K7} | 46 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 2 | 2 | 2 | 2.50 | 3.50 | 4 | 3 | 5 | 5 | 0-16 | 8 | vect (100.0%) |
| VSUBPD %ZMM3,%ZMM18,%ZMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VADDPD %ZMM10,%ZMM3,%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM3,%ZMM10,%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMULPD %ZMM12,%ZMM13,%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD %ZMM14,%ZMM20,%ZMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMINPD %ZMM14,%ZMM12,%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMULPD %ZMM5,%ZMM3,%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VADDPD %ZMM10,%ZMM4,%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VDIVPD %ZMM27,%ZMM20,%ZMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 4 | vect (100.0%) |
| VDIVPD %ZMM6,%ZMM13,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 4 | vect (100.0%) |
| VADDPD %ZMM6,%ZMM20,%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMULPD %ZMM17,%ZMM27,%ZMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM4,%ZMM18,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM4,%ZMM10,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMULPD %ZMM20,%ZMM13,%ZMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD %ZMM21,%ZMM6,%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMINPD %ZMM21,%ZMM9,%ZMM21 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMULPD %ZMM9,%ZMM3,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD %ZMM1,%ZMM4,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMINPD %ZMM12,%ZMM20,%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VDIVPD %ZMM28,%ZMM13,%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 4 | vect (100.0%) |
| VFMADD231PD %ZMM5,%ZMM14,%ZMM7{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VMULPD %ZMM22,%ZMM7,%ZMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VDIVPD %ZMM2,%ZMM6,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 4 | vect (100.0%) |
| VMOVUPD %ZMM7,0x40(%R13,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| VADDPD %ZMM2,%ZMM12,%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMULPD %ZMM17,%ZMM28,%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD %ZMM12,%ZMM13,%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMINPD %ZMM21,%ZMM3,%ZMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VFMADD231PD %ZMM1,%ZMM9,%ZMM8{%K3} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VMULPD %ZMM23,%ZMM8,%ZMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD %ZMM8,(%R13,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| SUB $-0x80,%RAX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| CMP %RAX,%R11 | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| JNE 434cd0 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii._omp_fn.6+0x310> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
|
| nb instructions | 108 |
| nb uops | 569 |
| loop length | 646 |
| used x86 registers | 7 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 6 |
| used zmm registers | 29 |
| nb stack references | 0 |
| ADD-SUB / MUL ratio | 0.86 |
| micro-operation queue | 71.13 cycles |
| front end | 71.13 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 21.50 | 21.50 | 21.50 | 21.50 | 53.75 | 53.75 | 53.75 | 53.75 | 51.00 | 51.00 |
| cycles | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 21.50 | 21.50 | 21.50 | 21.50 | 53.75 | 53.75 | 53.75 | 53.75 | 51.00 | 51.00 |
| Cycles executing div or sqrt instructions | 24.00 |
| Longest recurrence chain latency (RecMII) | 19.00-35.00 |
| Front-end | 71.13 |
| Dispatch | 53.75 |
| DIV/SQRT | 24.00 |
| Data deps. | 19.00-35.00 |
| Overall L1 | 71.13 |
| all | 100% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 100% |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | 100% |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | 100% |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | 100% |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | 100% |
| all | 73% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 65% |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | 100% |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | 100% |
| all | 94% |
| load | 100% |
| store | 100% |
| mul | 100% |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | 88% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VMOVUPD (%R8,%RAX,1),%ZMM23 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD 0x40(%R8,%RAX,1),%ZMM22 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVDQA32 %ZMM15,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (100.0%) |
| KMOVB %K1,%K6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| VPADDD %ZMM26,%ZMM15,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (100.0%) |
| VPMOVSXDQ %YMM1,%ZMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 0.50 | vect (50.0%) |
| VEXTRACTI32X8 $0x1,%ZMM1,%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 0.50 | vect (50.0%) |
| VPADDD %ZMM25,%ZMM1,%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (100.0%) |
| VPADDD %ZMM16,%ZMM1,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (100.0%) |
| VPMOVSXDQ %YMM7,%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 0.50 | vect (50.0%) |
| VEXTRACTI32X8 $0x1,%ZMM13,%YMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 0.50 | vect (50.0%) |
| KMOVB %K1,%K7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| VPMOVSXDQ %YMM13,%ZMM21 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 0.50 | vect (50.0%) |
| VMOVDQA64 %ZMM8,%ZMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (100.0%) |
| VMOVDQA %YMM13,%YMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (50.0%) |
| VPMOVSXDQ %YMM9,%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 0.50 | vect (50.0%) |
| VCMPPD $0x1,%ZMM0,%ZMM23,%K4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 | vect (100.0%) |
| VCMPPD $0x1,%ZMM0,%ZMM22,%K3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 | vect (100.0%) |
| VMOVDQA64 %ZMM5,%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (100.0%) |
| KUNPCKBW %K4,%K3,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| VPMOVSXDQ %YMM12,%ZMM20{%K4} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 0.50 | vect (50.0%) |
| VMOVDQA64 %ZMM8,%ZMM21{%K4} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (100.0%) |
| VPADDD %ZMM24,%ZMM1,%ZMM6{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (100.0%) |
| KNOTW %K2,%K5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| KMOVB %K1,%K4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| VPMOVSXDQ %YMM9,%ZMM3{%K3} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 0.50 | vect (50.0%) |
| KMOVB %K1,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| VMOVDQA64 %ZMM5,%ZMM14{%K3} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (100.0%) |
| VPADDD %ZMM16,%ZMM1,%ZMM13{%K5} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (100.0%) |
| VGATHERQPD (%RDX,%ZMM20,8),%ZMM8{%K6} | 48 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 2 | 2 | 2 | 2.50 | 4 | 4.50 | 3 | 5 | 5 | 0-16 | 8.94 | vect (100.0%) |
| KMOVB %K1,%K3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| KMOVB %K1,%K5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| VGATHERDPD (%RDX,%YMM6,8),%ZMM2{%K4} | 46 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 2 | 2 | 2 | 2.50 | 3.50 | 4 | 3 | 5 | 5 | 0-16 | 8 | vect (100.0%) |
| VSHUFI32X4 $-0x12,%ZMM6,%ZMM6,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 0.50 | vect (50.0%) |
| VGATHERQPD (%RDX,%ZMM21,8),%ZMM6{%K2} | 48 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 2 | 2 | 2 | 2.50 | 4 | 4.50 | 3 | 5 | 5 | 0-16 | 8.94 | vect (100.0%) |
| VGATHERQPD (%RDX,%ZMM3,8),%ZMM7{%K7} | 48 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 2 | 2 | 2 | 2.50 | 4 | 4.50 | 3 | 5 | 5 | 0-16 | 8.94 | vect (100.0%) |
| VSUBPD %ZMM2,%ZMM8,%ZMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM8,%ZMM6,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VGATHERDPD (%RDX,%YMM1,8),%ZMM5{%K3} | 46 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 2 | 2 | 2 | 2.50 | 3.50 | 4 | 3 | 5 | 5 | 0-16 | 8 | vect (100.0%) |
| VGATHERQPD (%RDX,%ZMM14,8),%ZMM21{%K5} | 48 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 2 | 2 | 2 | 2.50 | 4 | 4.50 | 3 | 5 | 5 | 0-16 | 8.94 | vect (100.0%) |
| VMOVAPD %ZMM0,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (100.0%) |
| VSUBPD %ZMM7,%ZMM21,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM5,%ZMM7,%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMULPD %ZMM4,%ZMM9,%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VANDPD %ZMM11,%ZMM4,%ZMM21 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (100.0%) |
| VANDPD %ZMM11,%ZMM9,%ZMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (100.0%) |
| VMULPD %ZMM2,%ZMM12,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VANDPD %ZMM11,%ZMM12,%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (100.0%) |
| VCMPPD $0xe,%ZMM0,%ZMM14,%K3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 | vect (100.0%) |
| VANDPD %ZMM11,%ZMM2,%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (100.0%) |
| VMOVUPD (%RAX),%ZMM28{%K3} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VCMPPD $0xe,%ZMM0,%ZMM1,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 | vect (100.0%) |
| VMOVUPD 0x40(%RAX),%ZMM27{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| KMOVB %K3,%K4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| VCMPPD $0xe,%ZMM0,%ZMM4,%K7{%K3} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 | vect (100.0%) |
| KMOVB %K2,%K5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| VCMPPD $0xe,%ZMM0,%ZMM2,%K6{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 | vect (100.0%) |
| VANDPD %ZMM11,%ZMM22,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (100.0%) |
| VGATHERQPD (%R9,%ZMM20,8),%ZMM6{%K4} | 48 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 2 | 2 | 2 | 2.50 | 4 | 4.50 | 3 | 5 | 5 | 0-16 | 8.94 | vect (100.0%) |
| VMOVAPD %ZMM0,%ZMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (100.0%) |
| VGATHERQPD (%R9,%ZMM3,8),%ZMM20{%K5} | 48 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 2 | 2 | 2 | 2.50 | 4 | 4.50 | 3 | 5 | 5 | 0-16 | 8.94 | vect (100.0%) |
| VANDPD %ZMM11,%ZMM23,%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (100.0%) |
| VDIVPD %ZMM6,%ZMM3,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 4 | vect (100.0%) |
| VMOVAPD %ZMM0,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (100.0%) |
| VBLENDMPD %ZMM10,%ZMM19,%ZMM1{%K7} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (100.0%) |
| KMOVB %K2,%K7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| VBLENDMPD %ZMM10,%ZMM19,%ZMM5{%K6} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (100.0%) |
| KMOVB %K3,%K6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
| VDIVPD %ZMM20,%ZMM2,%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 4 | vect (100.0%) |
| VMOVAPD %ZMM0,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (100.0%) |
| VGATHERDPD (%RCX,%YMM13,8),%ZMM2{%K6} | 46 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 2 | 2 | 2 | 2.50 | 3.50 | 4 | 3 | 5 | 5 | 0-16 | 8 | vect (100.0%) |
| VSHUFI32X4 $-0x12,%ZMM13,%ZMM13,%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 0.50 | vect (50.0%) |
| VGATHERDPD (%RCX,%YMM13,8),%ZMM6{%K7} | 46 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 2 | 2 | 2 | 2.50 | 3.50 | 4 | 3 | 5 | 5 | 0-16 | 8 | vect (100.0%) |
| VSUBPD %ZMM3,%ZMM18,%ZMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VADDPD %ZMM10,%ZMM3,%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM3,%ZMM10,%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMULPD %ZMM12,%ZMM13,%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD %ZMM14,%ZMM20,%ZMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMINPD %ZMM14,%ZMM12,%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMULPD %ZMM5,%ZMM3,%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VADDPD %ZMM10,%ZMM4,%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VDIVPD %ZMM27,%ZMM20,%ZMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 4 | vect (100.0%) |
| VDIVPD %ZMM6,%ZMM13,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 4 | vect (100.0%) |
| VADDPD %ZMM6,%ZMM20,%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMULPD %ZMM17,%ZMM27,%ZMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM4,%ZMM18,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM4,%ZMM10,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMULPD %ZMM20,%ZMM13,%ZMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD %ZMM21,%ZMM6,%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMINPD %ZMM21,%ZMM9,%ZMM21 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMULPD %ZMM9,%ZMM3,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD %ZMM1,%ZMM4,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMINPD %ZMM12,%ZMM20,%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VDIVPD %ZMM28,%ZMM13,%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 4 | vect (100.0%) |
| VFMADD231PD %ZMM5,%ZMM14,%ZMM7{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VMULPD %ZMM22,%ZMM7,%ZMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VDIVPD %ZMM2,%ZMM6,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 4 | vect (100.0%) |
| VMOVUPD %ZMM7,0x40(%R13,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| VADDPD %ZMM2,%ZMM12,%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VMULPD %ZMM17,%ZMM28,%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD %ZMM12,%ZMM13,%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMINPD %ZMM21,%ZMM3,%ZMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VFMADD231PD %ZMM1,%ZMM9,%ZMM8{%K3} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VMULPD %ZMM23,%ZMM8,%ZMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD %ZMM8,(%R13,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| SUB $-0x80,%RAX | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| CMP %RAX,%R11 | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| JNE 434cd0 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii._omp_fn.6+0x310> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |