| Loop Id: 231 | Module: exec | Source: advec_mom.cpp:221-221 [...] | Coverage: 4.36% |
|---|
| Loop Id: 231 | Module: exec | Source: advec_mom.cpp:221-221 [...] | Coverage: 4.36% |
|---|
0x4346cd VMOVUPD (%R11,%RSI,1),%ZMM12 [4] |
0x4346d4 VMOVUPD (%R10,%RSI,1),%ZMM4 [1] |
0x4346db VFMSUB132PD (%R14,%RSI,1),%ZMM12,%ZMM4 [2] |
0x4346e2 VADDPD (%RDX,%RSI,1),%ZMM4,%ZMM7 [5] |
0x4346e9 VDIVPD (%R15,%RSI,1),%ZMM7,%ZMM13 [3] |
0x4346f0 VMOVUPD %ZMM13,(%R14,%RSI,1) [2] |
0x4346f7 VMOVUPD 0x40(%R11,%RSI,1),%ZMM15 [4] |
0x4346ff VMOVUPD 0x40(%R10,%RSI,1),%ZMM14 [1] |
0x434707 VFMSUB132PD 0x40(%R14,%RSI,1),%ZMM15,%ZMM14 [2] |
0x43470f VADDPD 0x40(%RDX,%RSI,1),%ZMM14,%ZMM0 [5] |
0x434717 VDIVPD 0x40(%R15,%RSI,1),%ZMM0,%ZMM3 [3] |
0x43471f VMOVUPD %ZMM3,0x40(%R14,%RSI,1) [2] |
0x434727 VMOVUPD 0x80(%R10,%RSI,1),%ZMM2 [1] |
0x43472f VMOVUPD 0x80(%R11,%RSI,1),%ZMM4 [4] |
0x434737 VFMSUB132PD 0x80(%R14,%RSI,1),%ZMM4,%ZMM2 [2] |
0x43473f VADDPD 0x80(%RDX,%RSI,1),%ZMM2,%ZMM12 [5] |
0x434747 VDIVPD 0x80(%R15,%RSI,1),%ZMM12,%ZMM7 [3] |
0x43474f VMOVUPD %ZMM7,0x80(%R14,%RSI,1) [2] |
0x434757 VMOVUPD 0xc0(%R10,%RSI,1),%ZMM13 [1] |
0x43475f VMOVUPD 0xc0(%R11,%RSI,1),%ZMM14 [4] |
0x434767 VFMSUB132PD 0xc0(%R14,%RSI,1),%ZMM14,%ZMM13 [2] |
0x43476f VADDPD 0xc0(%RDX,%RSI,1),%ZMM13,%ZMM15 [5] |
0x434777 VDIVPD 0xc0(%R15,%RSI,1),%ZMM15,%ZMM0 [3] |
0x43477f VMOVUPD %ZMM0,0xc0(%R14,%RSI,1) [2] |
0x434787 ADD $0x100,%RSI |
0x43478e CMP %R13,%RSI |
0x434791 JNE 4346cd |
/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h: 69 - 69 |
-------------------------------------------------------------------------------- |
69: T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; } |
/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_mom.cpp: 221 - 221 |
-------------------------------------------------------------------------------- |
221: vel1(i, j) = (vel1(i, j) * node_mass_pre(i, j) + mom_flux(i + 0, j - 1) - mom_flux(i, j)) / node_mass_post(i, j); |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ►96.77+ | gomp_thread_start | team.c:130 | libgomp.so.1.0.0 |
| ○ | start_thread | libc.so.6 | |
| ○ | __GI___clone3 | libc.so.6 |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 1.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 2.67 |
| Bottlenecks | P10, P11, |
| Function | advec_mom_kernel(int, int, int, int, clover::Buffer2D |
| Source | context.h:69-69,advec_mom.cpp:221-221 |
| Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
| Source loop unroll confidence level | max |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 16.00 |
| CQA cycles if no scalar integer | 16.00 |
| CQA cycles if FP arith vectorized | 16.00 |
| CQA cycles if fully vectorized | 16.00 |
| Front-end cycles | 3.25 |
| P0 cycles | 0.33 |
| P1 cycles | 0.33 |
| P2 cycles | 0.33 |
| P3 cycles | 0.33 |
| P4 cycles | 0.33 |
| P5 cycles | 0.33 |
| P6 cycles | 6.00 |
| P7 cycles | 6.00 |
| P8 cycles | 6.00 |
| P9 cycles | 6.00 |
| P10 cycles | 4.00 |
| P11 cycles | 4.00 |
| P12 cycles | 2.00 |
| P13 cycles | 2.00 |
| P14 cycles | 2.00 |
| P15 cycles | 2.00 |
| DIV/SQRT cycles | 16.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 27.00 |
| Nb uops | 26.00 |
| Nb loads | 20.00 |
| Nb stores | 4.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 8.00 |
| Nb FLOP add-sub | 32.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 32.00 |
| Nb FLOP div | 32.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 96.00 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 1280.00 |
| Bytes stored | 256.00 |
| Stride 0 | 0.00 |
| Stride 1 | 5.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 100.00 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | 100.00 |
| Vectorization ratio fma | 100.00 |
| Vectorization ratio div_sqrt | 100.00 |
| Vectorization ratio other | NA |
| Vector-efficiency ratio all | 100.00 |
| Vector-efficiency ratio load | 100.00 |
| Vector-efficiency ratio store | 100.00 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | 100.00 |
| Vector-efficiency ratio fma | 100.00 |
| Vector-efficiency ratio div_sqrt | 100.00 |
| Vector-efficiency ratio other | NA |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 1.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 2.67 |
| Bottlenecks | P10, P11, |
| Function | advec_mom_kernel(int, int, int, int, clover::Buffer2D |
| Source | context.h:69-69,advec_mom.cpp:221-221 |
| Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
| Source loop unroll confidence level | max |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 16.00 |
| CQA cycles if no scalar integer | 16.00 |
| CQA cycles if FP arith vectorized | 16.00 |
| CQA cycles if fully vectorized | 16.00 |
| Front-end cycles | 3.25 |
| P0 cycles | 0.33 |
| P1 cycles | 0.33 |
| P2 cycles | 0.33 |
| P3 cycles | 0.33 |
| P4 cycles | 0.33 |
| P5 cycles | 0.33 |
| P6 cycles | 6.00 |
| P7 cycles | 6.00 |
| P8 cycles | 6.00 |
| P9 cycles | 6.00 |
| P10 cycles | 4.00 |
| P11 cycles | 4.00 |
| P12 cycles | 2.00 |
| P13 cycles | 2.00 |
| P14 cycles | 2.00 |
| P15 cycles | 2.00 |
| DIV/SQRT cycles | 16.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 27.00 |
| Nb uops | 26.00 |
| Nb loads | 20.00 |
| Nb stores | 4.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 8.00 |
| Nb FLOP add-sub | 32.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 32.00 |
| Nb FLOP div | 32.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 96.00 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 1280.00 |
| Bytes stored | 256.00 |
| Stride 0 | 0.00 |
| Stride 1 | 5.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 100.00 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | 100.00 |
| Vectorization ratio fma | 100.00 |
| Vectorization ratio div_sqrt | 100.00 |
| Vectorization ratio other | NA |
| Vector-efficiency ratio all | 100.00 |
| Vector-efficiency ratio load | 100.00 |
| Vector-efficiency ratio store | 100.00 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | 100.00 |
| Vector-efficiency ratio fma | 100.00 |
| Vector-efficiency ratio div_sqrt | 100.00 |
| Vector-efficiency ratio other | NA |
| Path / |
| nb instructions | 27 |
| nb uops | 26 |
| loop length | 202 |
| used x86 registers | 7 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 0 |
| used zmm registers | 9 |
| nb stack references | 0 |
| micro-operation queue | 3.25 cycles |
| front end | 3.25 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 6.00 | 6.00 | 6.00 | 6.00 | 4.00 | 4.00 | 2.00 | 2.00 | 2.00 | 2.00 |
| cycles | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 6.00 | 6.00 | 6.00 | 6.00 | 4.00 | 4.00 | 2.00 | 2.00 | 2.00 | 2.00 |
| Cycles executing div or sqrt instructions | 16.00 |
| Longest recurrence chain latency (RecMII) | 1.00 |
| Front-end | 3.25 |
| Dispatch | 6.00 |
| DIV/SQRT | 16.00 |
| Data deps. | 1.00 |
| Overall L1 | 16.00 |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | NA (no other vectorizable/vectorized instructions) |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VMOVUPD (%R11,%RSI,1),%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD (%R10,%RSI,1),%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VFMSUB132PD (%R14,%RSI,1),%ZMM12,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VADDPD (%RDX,%RSI,1),%ZMM4,%ZMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VDIVPD (%R15,%RSI,1),%ZMM7,%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 4 | vect (100.0%) |
| VMOVUPD %ZMM13,(%R14,%RSI,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| VMOVUPD 0x40(%R11,%RSI,1),%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD 0x40(%R10,%RSI,1),%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VFMSUB132PD 0x40(%R14,%RSI,1),%ZMM15,%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VADDPD 0x40(%RDX,%RSI,1),%ZMM14,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VDIVPD 0x40(%R15,%RSI,1),%ZMM0,%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 4 | vect (100.0%) |
| VMOVUPD %ZMM3,0x40(%R14,%RSI,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| VMOVUPD 0x80(%R10,%RSI,1),%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD 0x80(%R11,%RSI,1),%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VFMSUB132PD 0x80(%R14,%RSI,1),%ZMM4,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VADDPD 0x80(%RDX,%RSI,1),%ZMM2,%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VDIVPD 0x80(%R15,%RSI,1),%ZMM12,%ZMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 4 | vect (100.0%) |
| VMOVUPD %ZMM7,0x80(%R14,%RSI,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| VMOVUPD 0xc0(%R10,%RSI,1),%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD 0xc0(%R11,%RSI,1),%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VFMSUB132PD 0xc0(%R14,%RSI,1),%ZMM14,%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VADDPD 0xc0(%RDX,%RSI,1),%ZMM13,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VDIVPD 0xc0(%R15,%RSI,1),%ZMM15,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 4 | vect (100.0%) |
| VMOVUPD %ZMM0,0xc0(%R14,%RSI,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| ADD $0x100,%RSI | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| CMP %R13,%RSI | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| JNE 4346cd <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii._omp_fn.11+0x25d> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
| nb instructions | 27 |
| nb uops | 26 |
| loop length | 202 |
| used x86 registers | 7 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 0 |
| used zmm registers | 9 |
| nb stack references | 0 |
| micro-operation queue | 3.25 cycles |
| front end | 3.25 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 6.00 | 6.00 | 6.00 | 6.00 | 4.00 | 4.00 | 2.00 | 2.00 | 2.00 | 2.00 |
| cycles | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 0.33 | 6.00 | 6.00 | 6.00 | 6.00 | 4.00 | 4.00 | 2.00 | 2.00 | 2.00 | 2.00 |
| Cycles executing div or sqrt instructions | 16.00 |
| Longest recurrence chain latency (RecMII) | 1.00 |
| Front-end | 3.25 |
| Dispatch | 6.00 |
| DIV/SQRT | 16.00 |
| Data deps. | 1.00 |
| Overall L1 | 16.00 |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | NA (no other vectorizable/vectorized instructions) |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VMOVUPD (%R11,%RSI,1),%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD (%R10,%RSI,1),%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VFMSUB132PD (%R14,%RSI,1),%ZMM12,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VADDPD (%RDX,%RSI,1),%ZMM4,%ZMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VDIVPD (%R15,%RSI,1),%ZMM7,%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 4 | vect (100.0%) |
| VMOVUPD %ZMM13,(%R14,%RSI,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| VMOVUPD 0x40(%R11,%RSI,1),%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD 0x40(%R10,%RSI,1),%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VFMSUB132PD 0x40(%R14,%RSI,1),%ZMM15,%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VADDPD 0x40(%RDX,%RSI,1),%ZMM14,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VDIVPD 0x40(%R15,%RSI,1),%ZMM0,%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 4 | vect (100.0%) |
| VMOVUPD %ZMM3,0x40(%R14,%RSI,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| VMOVUPD 0x80(%R10,%RSI,1),%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD 0x80(%R11,%RSI,1),%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VFMSUB132PD 0x80(%R14,%RSI,1),%ZMM4,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VADDPD 0x80(%RDX,%RSI,1),%ZMM2,%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VDIVPD 0x80(%R15,%RSI,1),%ZMM12,%ZMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 4 | vect (100.0%) |
| VMOVUPD %ZMM7,0x80(%R14,%RSI,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| VMOVUPD 0xc0(%R10,%RSI,1),%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVUPD 0xc0(%R11,%RSI,1),%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VFMSUB132PD 0xc0(%R14,%RSI,1),%ZMM14,%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VADDPD 0xc0(%RDX,%RSI,1),%ZMM13,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| VDIVPD 0xc0(%R15,%RSI,1),%ZMM15,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 4 | vect (100.0%) |
| VMOVUPD %ZMM0,0xc0(%R14,%RSI,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (100.0%) |
| ADD $0x100,%RSI | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| CMP %R13,%RSI | 1 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| JNE 4346cd <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii._omp_fn.11+0x25d> | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
