OV - exec - Function clover_pack_message_right(global_variables&, int, int, int, int, clover::Buffer2D<double>&, clover::Buffer1D<double>&, int, int, int, int, int, int, int) [clone .extracted]

	Function: clover_pack_message_right(global_variables&, int, int, int, int, clover::Buffer2D<double>& ...	Module: exec	Source: pack_kernel.cpp:120-124 [...]	Coverage (incl. loops): 0.01% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h: 46 - 69

--------------------------------------------------------------------------------

46:   T &operator[](size_t i) const { return data[i]; }

[...]

69:   T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; }

/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/pack_kernel.cpp: 120 - 124

--------------------------------------------------------------------------------

120: #pragma omp parallel for simd

121:   for (int k = (y_min - depth + 1); k < (y_max + y_inc + depth + 2); k++) {

122:     for (int j = 0; j < depth; ++j) {

123:       int index = buffer_offset + j + k * depth;

124:       right_snd[index] = field(x_max + 1 - j, k);

0x43bd90 PUSH	%RBP

0x43bd91 MOV	%RSP,%RBP

0x43bd94 PUSH	%R15

0x43bd96 PUSH	%R14

0x43bd98 PUSH	%R13

0x43bd9a PUSH	%R12

0x43bd9c PUSH	%RBX

0x43bd9d SUB	$0xa8,%RSP

0x43bda4 MOV	%R8,-0xb8(%RBP)

0x43bdab MOV	%RCX,-0xb0(%RBP)

0x43bdb2 MOV	0x18(%RBP),%EAX

0x43bdb5 MOV	%RAX,-0x58(%RBP)

0x43bdb9 MOV	0x10(%RBP),%EBX

0x43bdbc MOV	0x28(%RBP),%EAX

0x43bdbf MOVL	$0,-0x4c(%RBP)

0x43bdc6 CMP	$-0x1,%EAX

0x43bdc9 JE	43be42

0x43bdcb MOV	%R9,%R13

0x43bdce MOV	%RDX,%R14

0x43bdd1 MOV	(%RDI),%ESI

0x43bdd3 MOVL	$0,-0x38(%RBP)

0x43bdda MOV	%EAX,-0x34(%RBP)

0x43bddd MOVL	$0x1,-0x48(%RBP)

0x43bde4 SUB	$0x8,%RSP

0x43bde8 LEA	-0x48(%RBP),%RAX

0x43bdec LEA	-0x4c(%RBP),%RCX

0x43bdf0 LEA	-0x38(%RBP),%R8

0x43bdf4 LEA	-0x34(%RBP),%R9

0x43bdf8 MOV	$0x4925c0,%EDI

0x43bdfd MOV	%ESI,-0x3c(%RBP)

0x43be00 MOV	$0x22,%EDX

0x43be05 PUSH	$0x1

0x43be07 PUSH	$0x1

0x43be09 PUSH	%RAX

0x43be0a CALL	4042d0 <__kmpc_for_static_init_4u@plt>

0x43be0f ADD	$0x20,%RSP

0x43be13 MOV	-0x38(%RBP),%EAX

0x43be16 MOV	-0x34(%RBP),%ECX

0x43be19 MOV	%RAX,-0x60(%RBP)

0x43be1d MOV	%ECX,-0x40(%RBP)

0x43be20 CMP	%ECX,%EAX

0x43be22 JBE	43be54

0x43be24 MOV	$0x4925e0,%EDI

0x43be29 MOV	-0x3c(%RBP),%ESI

0x43be2c ADD	$0xa8,%RSP

0x43be33 POP	%RBX

0x43be34 POP	%R12

0x43be36 POP	%R13

0x43be38 POP	%R14

0x43be3a POP	%R15

0x43be3c POP	%RBP

0x43be3d JMP	404050

0x43be42 ADD	$0xa8,%RSP

0x43be49 POP	%RBX

0x43be4a POP	%R12

0x43be4c POP	%R13

0x43be4e POP	%R14

0x43be50 POP	%R15

0x43be52 POP	%RBP

0x43be53 RET

0x43be54 MOV	$-0x100000000,%RDX

0x43be5e MOV	%R13,%RSI

0x43be61 SAL	$0x20,%RSI

0x43be65 MOVSXD	%R13D,%RDI

0x43be68 MOV	%RDI,%R8

0x43be6b SHR	$0x3,%R8

0x43be6f MOV	-0x58(%RBP),%RAX

0x43be73 MOV	-0x60(%RBP),%RCX

0x43be77 ADD	%ECX,%EAX

0x43be79 IMUL	%R13D,%EAX

0x43be7d MOV	%RDI,-0x98(%RBP)

0x43be84 AND	$-0x8,%RDI

0x43be88 MOV	%R14,%RCX

0x43be8b SAL	$0x20,%RCX

0x43be8f MOV	%RCX,-0x78(%RBP)

0x43be93 LEA	(%RAX,%RBX,1),%ECX

0x43be96 LEA	(%RAX,%RBX,1),%R11D

0x43be9a ADD	$0x7,%R11D

0x43be9e MOV	%R13D,%EAX

0x43bea1 AND	$0x7,%EAX

0x43bea4 MOV	%RAX,-0x70(%RBP)

0x43bea8 MOV	%R8,-0x80(%RBP)

0x43beac LEA	(%RCX,%R8,8),%R10D

0x43beb0 MOV	%RDI,-0x90(%RBP)

0x43beb7 SUB	%EDI,%R14D

0x43beba INC	%R14D

0x43bebd SAL	$0x20,%R14

0x43bec1 MOV	%R14,-0x88(%RBP)

0x43bec8 XOR	%R8D,%R8D

0x43becb SHR	$0x23,%RSI

0x43becf MOV	%RSI,-0xa0(%RBP)

0x43bed6 MOV	$-0x800000000,%R15

0x43bee0 MOV	%R13,-0xa8(%RBP)

0x43bee7 JMP	43bf04

0x43bee9 NOPL	(%RAX)

(376) 0x43bef0 INC	%R8D

(376) 0x43bef3 INC	%EAX

(376) 0x43bef5 ADD	%R13D,%R11D

(376) 0x43bef8 ADD	%R13D,%R10D

(376) 0x43befb CMP	-0x40(%RBP),%EAX

(376) 0x43befe JA	43be24

(376) 0x43bf04 MOV	-0x60(%RBP),%RAX

(376) 0x43bf08 ADD	%R8D,%EAX

(376) 0x43bf0b TEST	%R13D,%R13D

(376) 0x43bf0e JLE	43bef0

(376) 0x43bf10 MOV	%R8,-0xc8(%RBP)

(376) 0x43bf17 MOV	%R10D,-0x44(%RBP)

(376) 0x43bf1b MOV	%R11D,-0x30(%RBP)

(376) 0x43bf1f MOV	-0x58(%RBP),%RSI

(376) 0x43bf23 MOV	%RAX,-0xc0(%RBP)

(376) 0x43bf2a ADD	%ESI,%EAX

(376) 0x43bf2c MOV	%EAX,-0x2c(%RBP)

(376) 0x43bf2f MOV	-0xb0(%RBP),%RSI

(376) 0x43bf36 MOV	(%RSI),%RAX

(376) 0x43bf39 MOV	%RAX,-0x68(%RBP)

(376) 0x43bf3d MOV	0x10(%RSI),%RBX

(376) 0x43bf41 MOV	-0xb8(%RBP),%RSI

(376) 0x43bf48 MOV	0x8(%RSI),%R12

(376) 0x43bf4c CMPQ	$0,-0xa0(%RBP)

(376) 0x43bf54 MOV	$-0x200000000,%RAX

(376) 0x43bf5e MOV	$0x100000000,%R11

(376) 0x43bf68 MOV	$-0x400000000,%R10

(376) 0x43bf72 MOV	$-0x500000000,%R8

(376) 0x43bf7c MOV	%RDX,%RCX

(376) 0x43bf7f MOV	$-0x600000000,%RDX

(376) 0x43bf89 JE	43c0b4

(376) 0x43bf8f MOVSXD	-0x2c(%RBP),%R14

(376) 0x43bf93 IMUL	-0x68(%RBP),%R14

(376) 0x43bf98 MOV	-0x30(%RBP),%ESI

(376) 0x43bf9b MOV	%ESI,%R13D

(376) 0x43bf9e MOV	-0x80(%RBP),%RDI

(376) 0x43bfa2 MOV	-0x78(%RBP),%RSI

(376) 0x43bfa6 NOPW	%CS:(%RAX,%RAX,1)

  (378) 0x43bfb0 LEA	(%RSI,%R11,1),%R9

  (378) 0x43bfb4 SAR	$0x20,%R9

  (378) 0x43bfb8 ADD	%R14,%R9

  (378) 0x43bfbb MOVSD	(%RBX,%R9,8),%XMM0

  (378) 0x43bfc1 LEA	-0x7(%R13),%R9D

  (378) 0x43bfc5 MOVSXD	%R9D,%R9

  (378) 0x43bfc8 MOVSD	%XMM0,(%R12,%R9,8)

  (378) 0x43bfce MOV	%RSI,%R9

  (378) 0x43bfd1 SAR	$0x20,%R9

  (378) 0x43bfd5 ADD	%R14,%R9

  (378) 0x43bfd8 MOVSD	(%RBX,%R9,8),%XMM0

  (378) 0x43bfde LEA	-0x6(%R13),%R9D

  (378) 0x43bfe2 MOVSXD	%R9D,%R9

  (378) 0x43bfe5 MOVSD	%XMM0,(%R12,%R9,8)

  (378) 0x43bfeb LEA	(%RSI,%RCX,1),%R9

  (378) 0x43bfef SAR	$0x20,%R9

  (378) 0x43bff3 ADD	%R14,%R9

  (378) 0x43bff6 MOVSD	(%RBX,%R9,8),%XMM0

  (378) 0x43bffc LEA	-0x5(%R13),%R9D

  (378) 0x43c000 MOVSXD	%R9D,%R9

  (378) 0x43c003 MOVSD	%XMM0,(%R12,%R9,8)

  (378) 0x43c009 LEA	(%RSI,%RAX,1),%R9

  (378) 0x43c00d SAR	$0x20,%R9

  (378) 0x43c011 ADD	%R14,%R9

  (378) 0x43c014 MOVSD	(%RBX,%R9,8),%XMM0

  (378) 0x43c01a LEA	-0x4(%R13),%R9D

  (378) 0x43c01e MOVSXD	%R9D,%R9

  (378) 0x43c021 MOVSD	%XMM0,(%R12,%R9,8)

  (378) 0x43c027 MOV	$-0x300000000,%R9

  (378) 0x43c031 ADD	%RSI,%R9

  (378) 0x43c034 SAR	$0x20,%R9

  (378) 0x43c038 ADD	%R14,%R9

  (378) 0x43c03b MOVSD	(%RBX,%R9,8),%XMM0

  (378) 0x43c041 LEA	-0x3(%R13),%R9D

  (378) 0x43c045 MOVSXD	%R9D,%R9

  (378) 0x43c048 MOVSD	%XMM0,(%R12,%R9,8)

  (378) 0x43c04e LEA	(%RSI,%R10,1),%R9

  (378) 0x43c052 SAR	$0x20,%R9

  (378) 0x43c056 ADD	%R14,%R9

  (378) 0x43c059 MOVSD	(%RBX,%R9,8),%XMM0

  (378) 0x43c05f LEA	-0x2(%R13),%R9D

  (378) 0x43c063 MOVSXD	%R9D,%R9

  (378) 0x43c066 MOVSD	%XMM0,(%R12,%R9,8)

  (378) 0x43c06c LEA	(%RSI,%R8,1),%R9

  (378) 0x43c070 SAR	$0x20,%R9

  (378) 0x43c074 ADD	%R14,%R9

  (378) 0x43c077 MOVSD	(%RBX,%R9,8),%XMM0

  (378) 0x43c07d LEA	-0x1(%R13),%R9D

  (378) 0x43c081 MOVSXD	%R9D,%R9

  (378) 0x43c084 MOVSD	%XMM0,(%R12,%R9,8)

  (378) 0x43c08a LEA	(%RSI,%RDX,1),%R9

  (378) 0x43c08e SAR	$0x20,%R9

  (378) 0x43c092 ADD	%R14,%R9

  (378) 0x43c095 MOVSD	(%RBX,%R9,8),%XMM0

  (378) 0x43c09b MOVSXD	%R13D,%R13

  (378) 0x43c09e MOVSD	%XMM0,(%R12,%R13,8)

  (378) 0x43c0a4 ADD	%R15,%RSI

  (378) 0x43c0a7 ADD	$0x8,%R13D

  (378) 0x43c0ab DEC	%RDI

  (378) 0x43c0ae JNE	43bfb0

(376) 0x43c0b4 MOV	-0x90(%RBP),%RSI

(376) 0x43c0bb CMP	%RSI,-0x98(%RBP)

(376) 0x43c0c2 MOV	-0xa8(%RBP),%R13

(376) 0x43c0c9 MOV	-0x30(%RBP),%R11D

(376) 0x43c0cd MOV	-0x44(%RBP),%R10D

(376) 0x43c0d1 MOV	-0xc8(%RBP),%R8

(376) 0x43c0d8 MOV	%RCX,%RDX

(376) 0x43c0db MOV	-0xc0(%RBP),%RAX

(376) 0x43c0e2 MOV	-0x68(%RBP),%RCX

(376) 0x43c0e6 JBE	43bef0

(376) 0x43c0ec MOVSXD	-0x2c(%RBP),%RSI

(376) 0x43c0f0 IMUL	%RSI,%RCX

(376) 0x43c0f4 MOV	-0x88(%RBP),%RSI

(376) 0x43c0fb MOV	%R10D,%EDI

(376) 0x43c0fe MOV	-0x70(%RBP),%R14

(376) 0x43c102 NOPW	%CS:(%RAX,%RAX,1)

  (377) 0x43c110 MOVSXD	%EDI,%RDI

  (377) 0x43c113 MOV	%RSI,%R9

  (377) 0x43c116 SAR	$0x20,%R9

  (377) 0x43c11a ADD	%RCX,%R9

  (377) 0x43c11d MOVSD	(%RBX,%R9,8),%XMM0

  (377) 0x43c123 MOVSD	%XMM0,(%R12,%RDI,8)

  (377) 0x43c129 INC	%EDI

  (377) 0x43c12b ADD	%RDX,%RSI

  (377) 0x43c12e DEC	%R14

  (377) 0x43c131 JNE	43c110

(376) 0x43c133 JMP	43bef0

0x43c138 NOPL	(%RAX,%RAX,1)

Coverage (%)	Name	Module
►46.77+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
○	__GI___clone3	libc.so.6
►36.32+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
►6.47+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
►3.48+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_10

Source file and lines	pack_kernel.cpp:120-124
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:46,69
/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/pack_kernel.cpp:120-124

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is not vectorized. Only 10% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 11.88 to 0.89 cycles (13.36x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

__kmpc_for_static_init_4u@plt: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/pack_kernel.cpp:120

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 44 bytes. The binary function is storing 120 bytes.

General properties

nb instructions	96
nb uops	95
loop length	360
used x86 registers	16
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	21

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	11.88 cycles
front end	11.88 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	6.33	6.33	6.33	6.33	6.33	6.33	7.00	7.00	7.00	7.00	0.00	0.00	0.00	0.00	0.00	0.00
cycles	6.33	6.33	6.33	6.33	6.33	6.33	7.00	7.00	7.00	7.00	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	11.88
Dispatch	7.00
Overall L1	11.88

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	10%
load	6%
store	10%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	11%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	10%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 11.88 cycles. At this rate:

1% of peak load performance is reached (3.71 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
7% of peak store performance is reached (10.11 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 11.88 to 7.00 cycles (1.70x speedup).

ASM code

In the binary file, the address of the function is: 43bd90

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0xa8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV %R8,-0xb8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RCX,-0xb0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x18(%RBP),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,-0x58(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RBP),%EBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x28(%RBP),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOVL $0,-0x4c(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
CMP $-0x1,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JE 43be42 <_Z25clover_pack_message_rightR16global_variablesiiiiRN6clover8Buffer2DIdEERNS1_8Buffer1DIdEEiiiiiii.extracted+0xb2>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV %R9,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV %RDX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
MOVL $0,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV %EAX,-0x34(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOVL $0x1,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
LEA -0x48(%RBP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x4c(%RBP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x38(%RBP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x34(%RBP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV $0x4925c0,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %ESI,-0x3c(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 4042d0 <__kmpc_for_static_init_4u@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x38(%RBP),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV -0x34(%RBP),%ECX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %ECX,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
CMP %ECX,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JBE 43be54 <_Z25clover_pack_message_rightR16global_variablesiiiiRN6clover8Buffer2DIdEERNS1_8Buffer1DIdEEiiiiiii.extracted+0xc4>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV $0x4925e0,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV -0x3c(%RBP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
ADD $0xa8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 404050 <__kmpc_for_static_fini@plt>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
ADD $0xa8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50	N/A
MOV $-0x100000000,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV %R13,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
SAL $0x20,%RSI	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.33	scal (12.5%)
MOVSXD %R13D,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RDI,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SHR $0x3,%R8	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.33	N/A
MOV -0x58(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV -0x60(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
ADD %ECX,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
IMUL %R13D,%EAX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	N/A
MOV %RDI,-0x98(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
AND $-0x8,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %R14,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SAL $0x20,%RCX	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.33	N/A
MOV %RCX,-0x78(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
LEA (%RAX,%RBX,1),%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA (%RAX,%RBX,1),%R11D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
ADD $0x7,%R11D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
MOV %R13D,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $0x7,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RAX,-0x70(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R8,-0x80(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
LEA (%RCX,%R8,8),%R10D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %RDI,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
SUB %EDI,%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
INC %R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
SAL $0x20,%R14	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.33	N/A
MOV %R14,-0x88(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
XOR %R8D,%R8D	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
SHR $0x23,%RSI	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.33	scal (12.5%)
MOV %RSI,-0xa0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV $-0x800000000,%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV %R13,-0xa8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
JMP 43bf04 <_Z25clover_pack_message_rightR16global_variablesiiiiRN6clover8Buffer2DIdEERNS1_8Buffer1DIdEEiiiiiii.extracted+0x174>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_10

Source file and lines	pack_kernel.cpp:120-124
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:46,69
/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/pack_kernel.cpp:120-124

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

__kmpc_for_static_init_4u@plt: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/pack_kernel.cpp:120

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 44 bytes. The binary function is storing 120 bytes.

General properties

nb instructions	96
nb uops	95
loop length	360
used x86 registers	16
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	21

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	11.88 cycles
front end	11.88 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	6.33	6.33	6.33	6.33	6.33	6.33	7.00	7.00	7.00	7.00	0.00	0.00	0.00	0.00	0.00	0.00
cycles	6.33	6.33	6.33	6.33	6.33	6.33	7.00	7.00	7.00	7.00	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	11.88
Dispatch	7.00
Overall L1	11.88

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	10%
load	6%
store	10%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	11%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	10%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 11.88 cycles. At this rate:

1% of peak load performance is reached (3.71 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
7% of peak store performance is reached (10.11 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 43bd90

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0xa8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV %R8,-0xb8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RCX,-0xb0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x18(%RBP),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,-0x58(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RBP),%EBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x28(%RBP),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOVL $0,-0x4c(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
CMP $-0x1,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JE 43be42 <_Z25clover_pack_message_rightR16global_variablesiiiiRN6clover8Buffer2DIdEERNS1_8Buffer1DIdEEiiiiiii.extracted+0xb2>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV %R9,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV %RDX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
MOVL $0,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV %EAX,-0x34(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOVL $0x1,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
LEA -0x48(%RBP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x4c(%RBP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x38(%RBP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x34(%RBP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV $0x4925c0,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %ESI,-0x3c(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 4042d0 <__kmpc_for_static_init_4u@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x38(%RBP),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV -0x34(%RBP),%ECX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %ECX,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
CMP %ECX,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JBE 43be54 <_Z25clover_pack_message_rightR16global_variablesiiiiRN6clover8Buffer2DIdEERNS1_8Buffer1DIdEEiiiiiii.extracted+0xc4>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV $0x4925e0,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV -0x3c(%RBP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
ADD $0xa8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 404050 <__kmpc_for_static_fini@plt>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
ADD $0xa8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50	N/A
MOV $-0x100000000,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV %R13,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
SAL $0x20,%RSI	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.33	scal (12.5%)
MOVSXD %R13D,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RDI,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SHR $0x3,%R8	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.33	N/A
MOV -0x58(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV -0x60(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
ADD %ECX,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
IMUL %R13D,%EAX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	N/A
MOV %RDI,-0x98(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
AND $-0x8,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %R14,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SAL $0x20,%RCX	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.33	N/A
MOV %RCX,-0x78(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
LEA (%RAX,%RBX,1),%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA (%RAX,%RBX,1),%R11D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
ADD $0x7,%R11D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
MOV %R13D,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $0x7,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %RAX,-0x70(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R8,-0x80(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
LEA (%RCX,%R8,8),%R10D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %RDI,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
SUB %EDI,%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
INC %R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
SAL $0x20,%R14	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.33	N/A
MOV %R14,-0x88(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
XOR %R8D,%R8D	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
SHR $0x23,%RSI	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.33	scal (12.5%)
MOV %RSI,-0xa0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV $-0x800000000,%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV %R13,-0xa8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
JMP 43bf04 <_Z25clover_pack_message_rightR16global_variablesiiiiRN6clover8Buffer2DIdEERNS1_8Buffer1DIdEEiiiiiii.extracted+0x174>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼clover_pack_message_right(global_variables&, int, int, int, int, clover::Buffer2D&, clover::Buffer1D&, int, int, int, int, int, int, int) [clone .extracted]–	0.01	0.00
▼Loop 376 - pack_kernel.cpp:120-124 - exec–	0.00	0.01
○Loop 377 - pack_kernel.cpp:122-124 - exec	0.01	0.01
○Loop 378 - pack_kernel.cpp:122-124 - exec	0.00	0.00

Report Configuration

Vectorization

Details

Workaround

Execution units bottlenecks

CALL instructions

Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Vectorization

Details

Workaround

Execution units bottlenecks

CALL instructions

Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code