OV - exec - Function field_summary(global_variables&, parallel_&) [clone .omp

	Function: field_summary(global_variables&, parallel_&) [clone .omp_outlined]	Module: exec	Source: field_summary.cpp:75-91 [...]	Coverage (incl. loops): 0.29% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h: 69 - 69

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69:   T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; }

/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp: 75 - 91

--------------------------------------------------------------------------------

75: #pragma omp parallel for simd reduction(+ : press) reduction(+ : ke) reduction(+ : ie) reduction(+ : mass) reduction(+ : vol)

76:     for (int idx = (0); idx < ((ymax - ymin + 1) * (xmax - xmin + 1)); idx++) {

77:       const int j = xmin + 1 + idx % (xmax - xmin + 1);

78:       const int k = ymin + 1 + idx / (xmax - xmin + 1);

79:       double vsqrd = 0.0;

80:       for (int kv = k; kv <= k + 1; ++kv) {

81:         for (int jv = j; jv <= j + 1; ++jv) {

82:           vsqrd += 0.25 * (field.xvel0(jv, kv) * field.xvel0(jv, kv) + field.yvel0(jv, kv) * field.yvel0(jv, kv));

83:         }

84:       }

85:       double cell_vol = field.volume(j, k);

86:       double cell_mass = cell_vol * field.density0(j, k);

87:       vol += cell_vol;

88:       mass += cell_mass;

89:       ie += cell_mass * field.energy0(j, k);

90:       ke += cell_mass * 0.5 * vsqrd;

91:       press += cell_vol * field.pressure(j, k);

0x23d0a0 PUSH	%RBP

0x23d0a1 MOV	%RSP,%RBP

0x23d0a4 PUSH	%R15

0x23d0a6 PUSH	%R14

0x23d0a8 PUSH	%R13

0x23d0aa PUSH	%R12

0x23d0ac PUSH	%RBX

0x23d0ad AND	$-0x20,%RSP

0x23d0b1 SUB	$0x220,%RSP

0x23d0b8 MOV	(%RDX),%EAX

0x23d0ba MOV	(%R8),%R14D

0x23d0bd SUB	(%RCX),%EAX

0x23d0bf SUB	(%R9),%R14D

0x23d0c2 INC	%EAX

0x23d0c4 INC	%R14D

0x23d0c7 IMUL	%EAX,%R14D

0x23d0cb TEST	%R14D,%R14D

0x23d0ce JLE	23e04a

0x23d0d4 MOV	(%RDI),%ESI

0x23d0d6 DEC	%R14D

0x23d0d9 MOV	%RCX,%R15

0x23d0dc MOV	%R8,%RBX

0x23d0df MOV	%R9,%R12

0x23d0e2 MOVL	$0,0x4c(%RSP)

0x23d0ea MOVL	$0x1,0x9c(%RSP)

0x23d0f5 MOVL	$0,0x98(%RSP)

0x23d100 MOV	%R14D,0x34(%RSP)

0x23d105 SUB	$0x8,%RSP

0x23d109 LEA	0xa0(%RSP),%RCX

0x23d111 LEA	0xa4(%RSP),%RAX

0x23d119 LEA	0x1e020(%RIP),%RDI

0x23d120 LEA	0x54(%RSP),%R8

0x23d125 LEA	0x3c(%RSP),%R9

0x23d12a MOV	%ESI,0x38(%RSP)

0x23d12e MOV	$0x22,%EDX

0x23d133 PUSH	$0x1

0x23d135 PUSH	$0x1

0x23d137 PUSH	%RAX

0x23d138 CALL	2596a0 <@plt_start@+0x550>

0x23d13d ADD	$0x20,%RSP

0x23d141 MOV	0x34(%RSP),%EAX

0x23d145 MOV	0x4c(%RSP),%ECX

0x23d149 VXORPD	%XMM1,%XMM1,%XMM1

0x23d14d VXORPD	%XMM2,%XMM2,%XMM2

0x23d151 VXORPD	%XMM3,%XMM3,%XMM3

0x23d155 VXORPD	%XMM4,%XMM4,%XMM4

0x23d159 VXORPD	%XMM0,%XMM0,%XMM0

0x23d15d CMP	%R14D,%EAX

0x23d160 CMOVL	%EAX,%R14D

0x23d164 MOV	%R14D,0x48(%RSP)

0x23d169 MOV	%R14D,0x34(%RSP)

0x23d16e CMP	%R14D,%ECX

0x23d171 JG	23de14

0x23d177 MOV	(%R15),%EDX

0x23d17a MOV	0x10(%RBP),%RAX

0x23d17e MOV	(%R12),%R10D

0x23d182 MOV	(%RBX),%R13D

0x23d185 INC	%EDX

0x23d187 MOV	0x290(%RAX),%RSI

0x23d18e MOV	0xb8(%RAX),%R14

0x23d195 MOV	0xa8(%RAX),%R15

0x23d19c MOV	0xe8(%RAX),%R12

0x23d1a3 MOV	0x2a0(%RAX),%RBX

0x23d1aa MOV	(%RAX),%RDI

0x23d1ad MOV	0x10(%RAX),%R8

0x23d1b1 MOV	0x40(%RAX),%R11

0x23d1b5 MOV	0x70(%RAX),%R9

0x23d1b9 SUB	%R10D,%R13D

0x23d1bc INC	%R10D

0x23d1bf MOV	%EDX,0x40(%RSP)

0x23d1c3 MOV	0xd8(%RAX),%RDX

0x23d1ca INC	%R13D

0x23d1cd MOV	%R13D,0x44(%RSP)

0x23d1d2 MOV	%RSI,0xc0(%RSP)

0x23d1da MOV	%RDX,0x58(%RSP)

0x23d1df MOV	0x30(%RAX),%RDX

0x23d1e3 MOV	0x60(%RAX),%RAX

0x23d1e7 MOV	%RDX,0xa0(%RSP)

0x23d1ef MOV	0x48(%RSP),%EDX

0x23d1f3 MOV	%RAX,0xb8(%RSP)

0x23d1fb SUB	%ECX,%EDX

0x23d1fd INC	%EDX

0x23d1ff CMP	$0x8,%EDX

0x23d202 JB	23dd13

0x23d208 VPBROADCASTD	%ECX,%XMM0

0x23d20e VPADDD	-0x2bf16(%RIP),%XMM0,%XMM1

0x23d216 VPBROADCASTD	%R10D,%XMM0

0x23d21c MOV	%R10D,0x90(%RSP)

0x23d224 MOV	0x40(%RSP),%R10D

0x23d229 VBROADCASTSD	-0x2c0ea(%RIP),%YMM9

0x23d232 VBROADCASTSS	-0x3a63b(%RIP),%XMM3

0x23d23b VBROADCASTSS	-0x3a638(%RIP),%XMM4

0x23d244 MOV	%EDX,0x8c(%RSP)

0x23d24b AND	$-0x8,%EDX

0x23d24e VPBROADCASTD	%R13D,%XMM2

0x23d254 VPBROADCASTQ	%R15,%YMM5

0x23d25a VXORPD	%XMM7,%XMM7,%XMM7

0x23d25e VXORPD	%XMM12,%XMM12,%XMM12

0x23d263 VXORPD	%XMM13,%XMM13,%XMM13

0x23d268 VXORPD	%XMM19,%XMM19,%XMM19

0x23d26e VXORPD	%XMM8,%XMM8,%XMM8

0x23d273 VXORPD	%XMM20,%XMM20,%XMM20

0x23d279 VXORPD	%XMM21,%XMM21,%XMM21

0x23d27f VXORPD	%XMM22,%XMM22,%XMM22

0x23d285 VXORPD	%XMM23,%XMM23,%XMM23

0x23d28b MOV	%R15,0xb0(%RSP)

0x23d293 MOV	%RDI,0xa8(%RSP)

0x23d29b VMOVDQA	%XMM0,0x130(%RSP)

0x23d2a4 ADD	%EDX,%ECX

0x23d2a6 MOV	%EDX,0x88(%RSP)

0x23d2ad VPBROADCASTD	%R10D,%XMM0

0x23d2b3 MOV	0x58(%RSP),%R10

0x23d2b8 VMOVDQA	%XMM0,0x120(%RSP)

0x23d2c1 VPBROADCASTQ	%RSI,%YMM0

0x23d2c7 MOV	0xa0(%RSP),%RSI

0x23d2cf VMOVDQA	%YMM0,0x1c0(%RSP)

0x23d2d8 VPBROADCASTQ	%RDI,%YMM0

0x23d2de VMOVDQA	%YMM0,0x1a0(%RSP)

0x23d2e7 VMOVAPD	%XMM3,0x110(%RSP)

0x23d2f0 VMOVAPD	%XMM4,0x100(%RSP)

0x23d2f9 VMOVAPD	%YMM9,0x140(%RSP)

0x23d302 VPBROADCASTQ	%R10,%YMM6

0x23d308 VPBROADCASTQ	%RSI,%YMM0

0x23d30e VMOVDQA	%YMM0,0x180(%RSP)

0x23d317 VPBROADCASTQ	%RAX,%YMM0

0x23d31d MOV	%EDX,%EAX

0x23d31f VMOVDQA	%YMM0,0x160(%RSP)

0x23d328 VPXOR	%XMM0,%XMM0,%XMM0

0x23d32c NOPL	(%RAX)

(208) 0x23d330 MOV	%EAX,0x94(%RSP)

(208) 0x23d337 VPEXTRD	$0x1,%XMM1,%EAX

(208) 0x23d33d VPEXTRD	$0x1,%XMM2,%ESI

(208) 0x23d343 VMOVAPD	%YMM8,0x1e0(%RSP)

(208) 0x23d34c VMOVD	%XMM2,%EDI

(208) 0x23d350 VMOVD	%XMM2,%R10D

(208) 0x23d355 VPCMPEQD	%YMM14,%YMM14,%YMM14

(208) 0x23d35a CLTD

(208) 0x23d35b IDIV	%ESI

(208) 0x23d35d MOV	%EAX,%ESI

(208) 0x23d35f VMOVD	%XMM1,%EAX

(208) 0x23d363 CLTD

(208) 0x23d364 IDIV	%EDI

(208) 0x23d366 VPEXTRD	$0x2,%XMM1,%EDX

(208) 0x23d36c VPEXTRD	$0x2,%XMM2,%EDI

(208) 0x23d372 VMOVD	%EAX,%XMM3

(208) 0x23d376 MOV	%EDX,%EAX

(208) 0x23d378 CLTD

(208) 0x23d379 IDIV	%EDI

(208) 0x23d37b VPINSRD	$0x1,%ESI,%XMM3,%XMM3

(208) 0x23d381 VPEXTRD	$0x3,%XMM2,%ESI

(208) 0x23d387 VPADDD	0x110(%RSP),%XMM1,%XMM4

(208) 0x23d390 MOV	%EAX,%EDI

(208) 0x23d392 VPEXTRD	$0x3,%XMM1,%EAX

(208) 0x23d398 VPINSRD	$0x2,%EDI,%XMM3,%XMM3

(208) 0x23d39e VPEXTRD	$0x1,%XMM2,%EDI

(208) 0x23d3a4 CLTD

(208) 0x23d3a5 IDIV	%ESI

(208) 0x23d3a7 MOV	%EAX,%ESI

(208) 0x23d3a9 VPEXTRD	$0x1,%XMM4,%EAX

(208) 0x23d3af VPINSRD	$0x3,%ESI,%XMM3,%XMM3

(208) 0x23d3b5 VPEXTRD	$0x2,%XMM2,%ESI

(208) 0x23d3bb CLTD

(208) 0x23d3bc VPMULLD	%XMM2,%XMM3,%XMM9

(208) 0x23d3c1 IDIV	%EDI

(208) 0x23d3c3 VPSUBD	%XMM9,%XMM1,%XMM9

(208) 0x23d3c8 MOV	%EAX,%EDI

(208) 0x23d3ca VMOVD	%XMM4,%EAX

(208) 0x23d3ce CLTD

(208) 0x23d3cf IDIV	%R10D

(208) 0x23d3d2 VPEXTRD	$0x2,%XMM4,%EDX

(208) 0x23d3d8 VMOVD	%EAX,%XMM8

(208) 0x23d3dc MOV	%EDX,%EAX

(208) 0x23d3de CLTD

(208) 0x23d3df IDIV	%ESI

(208) 0x23d3e1 VPINSRD	$0x1,%EDI,%XMM8,%XMM8

(208) 0x23d3e7 VPEXTRD	$0x3,%XMM2,%EDI

(208) 0x23d3ed MOV	%EAX,%ESI

(208) 0x23d3ef VPEXTRD	$0x3,%XMM4,%EAX

(208) 0x23d3f5 VPINSRD	$0x2,%ESI,%XMM8,%XMM8

(208) 0x23d3fb CLTD

(208) 0x23d3fc IDIV	%EDI

(208) 0x23d3fe VMOVDQA	0x120(%RSP),%XMM11

(208) 0x23d407 VPADDD	0x100(%RSP),%XMM1,%XMM1

(208) 0x23d410 VPADDD	%XMM3,%XMM11,%XMM3

(208) 0x23d414 VPMOVSXDQ	%XMM3,%YMM27

(208) 0x23d41a VPINSRD	$0x3,%EAX,%XMM8,%XMM8

(208) 0x23d420 VPMULLD	%XMM2,%XMM8,%XMM10

(208) 0x23d425 VPADDD	%XMM8,%XMM11,%XMM8

(208) 0x23d42a VPMOVSXDQ	%XMM8,%YMM24

(208) 0x23d430 VPSUBD	%XMM10,%XMM4,%XMM4

(208) 0x23d435 VMOVDQA	0x130(%RSP),%XMM10

(208) 0x23d43e VPMULLQ	%YMM24,%YMM6,%YMM16

(208) 0x23d444 VPADDD	%XMM9,%XMM10,%XMM9

(208) 0x23d449 VPADDD	%XMM4,%XMM10,%XMM3

(208) 0x23d44d VPMULLQ	%YMM24,%YMM5,%YMM10

(208) 0x23d453 VPMULLQ	%YMM27,%YMM6,%YMM4

(208) 0x23d459 VPMOVSXDQ	%XMM9,%YMM26

(208) 0x23d45f VPMULLQ	%YMM27,%YMM5,%YMM9

(208) 0x23d465 VPMOVSXDQ	%XMM3,%YMM25

(208) 0x23d46b VPADDQ	%YMM25,%YMM10,%YMM8

(208) 0x23d471 VPADDQ	%YMM25,%YMM16,%YMM17

(208) 0x23d477 VPSUBQ	%YMM14,%YMM25,%YMM29

(208) 0x23d47d VPSUBQ	%YMM14,%YMM26,%YMM30

(208) 0x23d483 VPADDQ	%YMM26,%YMM9,%YMM3

(208) 0x23d489 VMOVQ	%XMM8,0x20(%RSP)

(208) 0x23d48f VPEXTRQ	$0x1,%XMM8,0x18(%RSP)

(208) 0x23d497 VEXTRACTI128	$0x1,%YMM8,%XMM8

(208) 0x23d49d VPEXTRQ	$0x1,%XMM17,0x38(%RSP)

(208) 0x23d4a6 VMOVQ	%XMM17,%RSI

(208) 0x23d4ac VPADDQ	%YMM16,%YMM29,%YMM16

(208) 0x23d4b2 VMOVQ	%XMM3,%RDX

(208) 0x23d4b7 VPEXTRQ	$0x1,%XMM3,%RDI

(208) 0x23d4bd VEXTRACTI128	$0x1,%YMM3,%XMM3

(208) 0x23d4c3 VPEXTRQ	$0x1,%XMM8,0x28(%RSP)

(208) 0x23d4cb VMOVQ	%XMM3,%R10

(208) 0x23d4d0 VMOVSD	(%R14,%RDX,8),%XMM11

(208) 0x23d4d6 VPEXTRQ	$0x1,%XMM3,%R15

(208) 0x23d4dc VMOVSD	(%R14,%R10,8),%XMM3

(208) 0x23d4e2 VMOVHPD	(%R14,%RDI,8),%XMM11,%XMM11

(208) 0x23d4e8 MOV	0x20(%RSP),%RDI

(208) 0x23d4ed VMOVHPD	(%R14,%R15,8),%XMM3,%XMM3

(208) 0x23d4f3 VMOVQ	%XMM8,%R15

(208) 0x23d4f8 VEXTRACTI32X4	$0x1,%YMM17,%XMM8

(208) 0x23d4ff VPEXTRQ	$0x1,%XMM8,0x20(%RSP)

(208) 0x23d507 VMOVSD	(%R14,%R15,8),%XMM17

(208) 0x23d50e VINSERTF128	$0x1,%XMM3,%YMM11,%YMM3

(208) 0x23d514 VPADDQ	%YMM26,%YMM4,%YMM11

(208) 0x23d51a VPADDQ	%YMM4,%YMM30,%YMM4

(208) 0x23d520 VMOVQ	%XMM11,%R13

(208) 0x23d525 VPEXTRQ	$0x1,%XMM11,%R10

(208) 0x23d52b VEXTRACTI128	$0x1,%YMM11,%XMM11

(208) 0x23d531 VMOVQ	%XMM11,%RAX

(208) 0x23d536 VMOVSD	(%R12,%R13,8),%XMM28

(208) 0x23d53d VPEXTRQ	$0x1,%XMM11,%RDX

(208) 0x23d543 VMOVSD	(%R14,%RDI,8),%XMM11

(208) 0x23d549 VMOVQ	%XMM8,%RDI

(208) 0x23d54e VMULPD	%YMM3,%YMM3,%YMM3

(208) 0x23d552 MOV	0x28(%RSP),%R13

(208) 0x23d557 VMOVSD	(%R12,%RAX,8),%XMM8

(208) 0x23d55d VMOVHPD	(%R12,%R10,8),%XMM28,%XMM28

(208) 0x23d564 MOV	0x18(%RSP),%RAX

(208) 0x23d569 VPEXTRQ	$0x1,%XMM16,0x18(%RSP)

(208) 0x23d572 VMOVHPD	(%R12,%RDX,8),%XMM8,%XMM8

(208) 0x23d578 VMOVHPD	(%R14,%RAX,8),%XMM11,%XMM11

(208) 0x23d57e VINSERTF32X4	$0x1,%XMM8,%YMM28,%YMM8

(208) 0x23d585 VMOVSD	(%R12,%RSI,8),%XMM28

(208) 0x23d58c VFMADD213PD	%YMM3,%YMM8,%YMM8

(208) 0x23d591 VPADDQ	%YMM9,%YMM30,%YMM3

(208) 0x23d597 VPADDQ	%YMM10,%YMM29,%YMM9

(208) 0x23d59d VMOVSD	(%R12,%RDI,8),%XMM10

(208) 0x23d5a3 MOV	0x38(%RSP),%RDI

(208) 0x23d5a8 VMOVQ	%XMM3,%RAX

(208) 0x23d5ad VPEXTRQ	$0x1,%XMM3,%RDX

(208) 0x23d5b3 VEXTRACTI128	$0x1,%YMM3,%XMM3

(208) 0x23d5b9 VMOVQ	%XMM9,%R10

(208) 0x23d5be VPEXTRQ	$0x1,%XMM9,%R15

(208) 0x23d5c4 VPEXTRQ	$0x1,%XMM3,%RSI

(208) 0x23d5ca VMOVHPD	(%R12,%RDI,8),%XMM28,%XMM28

(208) 0x23d5d1 VMOVQ	%XMM3,%RDI

(208) 0x23d5d6 VEXTRACTI128	$0x1,%YMM9,%XMM3

(208) 0x23d5dc VMOVHPD	(%R14,%R13,8),%XMM17,%XMM9

(208) 0x23d5e3 VMOVSD	(%R14,%RAX,8),%XMM17

(208) 0x23d5ea VMOVQ	%XMM3,%R13

(208) 0x23d5ef VPEXTRQ	$0x1,%XMM3,0x28(%RSP)

(208) 0x23d5f7 VMOVSD	(%R14,%RDI,8),%XMM3

(208) 0x23d5fd VMOVHPD	(%R14,%RDX,8),%XMM17,%XMM17

(208) 0x23d604 VMOVQ	%XMM4,%RDI

(208) 0x23d609 VMOVHPD	(%R14,%RSI,8),%XMM3,%XMM3

(208) 0x23d60f MOV	0x28(%RSP),%RAX

(208) 0x23d614 VMOVSD	(%R14,%R13,8),%XMM31

(208) 0x23d61b MOV	0x20(%RSP),%RSI

(208) 0x23d620 VMOVHPD	(%R14,%RAX,8),%XMM31,%XMM31

(208) 0x23d627 VMOVHPD	(%R12,%RSI,8),%XMM10,%XMM10

(208) 0x23d62d VMOVQ	%XMM16,%RAX

(208) 0x23d633 VINSERTF128	$0x1,%XMM9,%YMM11,%YMM11

(208) 0x23d639 VMOVSD	(%R12,%RDI,8),%XMM9

(208) 0x23d63f VINSERTF32X4	$0x1,%XMM3,%YMM17,%YMM3

(208) 0x23d646 VMOVSD	(%R14,%R10,8),%XMM17

(208) 0x23d64d VPEXTRQ	$0x1,%XMM4,%R10

(208) 0x23d653 VEXTRACTI128	$0x1,%YMM4,%XMM4

(208) 0x23d659 VMULPD	%YMM11,%YMM11,%YMM11

(208) 0x23d65e VMOVHPD	(%R14,%R15,8),%XMM17,%XMM17

(208) 0x23d665 VMOVQ	%XMM4,%R15

(208) 0x23d66a VPEXTRQ	$0x1,%XMM4,%R13

(208) 0x23d670 VEXTRACTI32X4	$0x1,%YMM16,%XMM4

(208) 0x23d677 VMOVHPD	(%R12,%R10,8),%XMM9,%XMM9

(208) 0x23d67d VMOVSD	(%R12,%RAX,8),%XMM16

(208) 0x23d684 VMOVQ	%XMM4,%RDX

(208) 0x23d689 VPEXTRQ	$0x1,%XMM4,%RSI

(208) 0x23d68f VMOVSD	(%R12,%R15,8),%XMM4

(208) 0x23d695 VFMADD213PD	%YMM8,%YMM3,%YMM3

(208) 0x23d69a VPSUBQ	%YMM14,%YMM27,%YMM8

(208) 0x23d6a0 VMOVHPD	(%R12,%R13,8),%XMM4,%XMM4

(208) 0x23d6a6 VPMULLQ	%YMM5,%YMM8,%YMM15

(208) 0x23d6ac VPMULLQ	%YMM6,%YMM8,%YMM8

(208) 0x23d6b2 VINSERTF32X4	$0x1,%XMM31,%YMM17,%YMM31

(208) 0x23d6b9 VMOVSD	(%R12,%RDX,8),%XMM17

(208) 0x23d6c0 MOV	0x18(%RSP),%RDX

(208) 0x23d6c5 VMOVHPD	(%R12,%RSI,8),%XMM17,%XMM17

(208) 0x23d6cc VINSERTF128	$0x1,%XMM4,%YMM9,%YMM9

(208) 0x23d6d2 VINSERTF32X4	$0x1,%XMM10,%YMM28,%YMM4

(208) 0x23d6d9 VPSUBQ	%YMM14,%YMM24,%YMM28

(208) 0x23d6df VPMULLQ	%YMM5,%YMM28,%YMM10

(208) 0x23d6e5 VPMULLQ	%YMM6,%YMM28,%YMM18

(208) 0x23d6eb VFMADD231PD	%YMM9,%YMM9,%YMM3

(208) 0x23d6f0 VPADDQ	%YMM26,%YMM15,%YMM9

(208) 0x23d6f6 VFMADD213PD	%YMM11,%YMM4,%YMM4

(208) 0x23d6fb VMOVHPD	(%R12,%RDX,8),%XMM16,%XMM16

(208) 0x23d702 VMOVQ	%XMM9,%RAX

(208) 0x23d707 VPEXTRQ	$0x1,%XMM9,%RDI

(208) 0x23d70d VEXTRACTI128	$0x1,%YMM9,%XMM9

(208) 0x23d713 VMOVQ	%XMM9,%R13

(208) 0x23d718 VPEXTRQ	$0x1,%XMM9,%R10

(208) 0x23d71e VPADDQ	%YMM25,%YMM10,%YMM9

(208) 0x23d724 VPADDQ	%YMM10,%YMM29,%YMM10

(208) 0x23d72a VMOVQ	%XMM9,0x18(%RSP)

(208) 0x23d730 VPEXTRQ	$0x1,%XMM9,0x28(%RSP)

(208) 0x23d738 VEXTRACTI128	$0x1,%YMM9,%XMM9

(208) 0x23d73e VMOVSD	(%R14,%R13,8),%XMM14

(208) 0x23d744 VPEXTRQ	$0x1,%XMM10,%R13

(208) 0x23d74a VMOVQ	%XMM9,%R15

(208) 0x23d74f VPEXTRQ	$0x1,%XMM9,0x20(%RSP)

(208) 0x23d757 VMOVHPD	(%R14,%R10,8),%XMM14,%XMM14

(208) 0x23d75d MOV	0x18(%RSP),%R10

(208) 0x23d762 VFMADD213PD	%YMM4,%YMM31,%YMM31

(208) 0x23d768 VINSERTF32X4	$0x1,%XMM17,%YMM16,%YMM9

(208) 0x23d76f VMOVSD	(%R14,%RAX,8),%XMM16

(208) 0x23d776 VMOVHPD	(%R14,%RDI,8),%XMM16,%XMM16

(208) 0x23d77d VFMADD231PD	%YMM9,%YMM9,%YMM31

(208) 0x23d783 VINSERTF32X4	$0x1,%XMM14,%YMM16,%YMM16

(208) 0x23d78a VPADDQ	%YMM26,%YMM8,%YMM14

(208) 0x23d790 VPADDQ	%YMM8,%YMM30,%YMM8

(208) 0x23d796 VMOVQ	%XMM14,%RSI

(208) 0x23d79b VPEXTRQ	$0x1,%XMM14,%RDI

(208) 0x23d7a1 VEXTRACTI128	$0x1,%YMM14,%XMM14

(208) 0x23d7a7 VPEXTRQ	$0x1,%XMM14,%RDX

(208) 0x23d7ad VMOVQ	%XMM14,%RAX

(208) 0x23d7b2 VPADDQ	%YMM25,%YMM18,%YMM14

(208) 0x23d7b8 VFMADD213PD	%YMM3,%YMM16,%YMM16

(208) 0x23d7be VMOVSD	(%R14,%R15,8),%XMM3

(208) 0x23d7c4 VMOVQ	%XMM10,%R15

(208) 0x23d7c9 VEXTRACTI128	$0x1,%YMM10,%XMM10

(208) 0x23d7cf VMOVQ	%XMM14,0x38(%RSP)

(208) 0x23d7d5 VPEXTRQ	$0x1,%XMM14,0x50(%RSP)

(208) 0x23d7dd VEXTRACTI128	$0x1,%YMM14,%XMM14

(208) 0x23d7e3 VPEXTRQ	$0x1,%XMM10,0x18(%RSP)

(208) 0x23d7eb VMOVQ	%XMM14,0xc8(%RSP)

(208) 0x23d7f4 VPEXTRQ	$0x1,%XMM14,0xd0(%RSP)

(208) 0x23d7ff VMOVSD	(%R12,%RAX,8),%XMM14

(208) 0x23d805 VMOVHPD	(%R12,%RDX,8),%XMM14,%XMM11

(208) 0x23d80b VMOVSD	(%R12,%RSI,8),%XMM14

(208) 0x23d811 MOV	0x20(%RSP),%RSI

(208) 0x23d816 VMOVHPD	(%R12,%RDI,8),%XMM14,%XMM14

(208) 0x23d81c VMOVHPD	(%R14,%RSI,8),%XMM3,%XMM3

(208) 0x23d822 VINSERTF32X4	$0x1,%XMM11,%YMM14,%YMM17

(208) 0x23d829 VPADDQ	%YMM15,%YMM30,%YMM11

(208) 0x23d82f VMOVQ	%XMM11,%RAX

(208) 0x23d834 VPEXTRQ	$0x1,%XMM11,%RDX

(208) 0x23d83a VEXTRACTI128	$0x1,%YMM11,%XMM11

(208) 0x23d840 VMOVQ	%XMM11,%RSI

(208) 0x23d845 VPEXTRQ	$0x1,%XMM11,%RDI

(208) 0x23d84b VMOVSD	(%R14,%R10,8),%XMM11

(208) 0x23d851 MOV	0x28(%RSP),%R10

(208) 0x23d856 VFMADD231PD	%YMM17,%YMM17,%YMM16

(208) 0x23d85c VMOVSD	(%R14,%RSI,8),%XMM4

(208) 0x23d862 VMOVQ	%XMM8,%RSI

(208) 0x23d867 VMOVHPD	(%R14,%RDI,8),%XMM4,%XMM4

(208) 0x23d86d MOV	0x18(%RSP),%RDI

(208) 0x23d872 VMOVHPD	(%R14,%R10,8),%XMM11,%XMM11

(208) 0x23d878 VMOVQ	%XMM10,%R10

(208) 0x23d87d VMOVSD	(%R14,%RAX,8),%XMM10

(208) 0x23d883 MOV	0xc8(%RSP),%RAX

(208) 0x23d88b VMOVHPD	(%R14,%RDX,8),%XMM10,%XMM10

(208) 0x23d891 VPEXTRQ	$0x1,%XMM8,%RDX

(208) 0x23d897 VEXTRACTI128	$0x1,%YMM8,%XMM8

(208) 0x23d89d VMOVSD	(%R14,%R10,8),%XMM15

(208) 0x23d8a3 VMOVQ	%XMM8,%R10

(208) 0x23d8a8 VINSERTF32X4	$0x1,%XMM4,%YMM10,%YMM28

(208) 0x23d8af VMOVSD	(%R12,%RAX,8),%XMM4

(208) 0x23d8b5 MOV	0x38(%RSP),%RAX

(208) 0x23d8ba VFMADD213PD	%YMM16,%YMM28,%YMM28

(208) 0x23d8c0 VMOVSD	(%R12,%RAX,8),%XMM10

(208) 0x23d8c6 MOV	0x50(%RSP),%RAX

(208) 0x23d8cb VMOVHPD	(%R12,%RAX,8),%XMM10,%XMM14

(208) 0x23d8d1 MOV	0xd0(%RSP),%RAX

(208) 0x23d8d9 VPADDQ	%YMM18,%YMM29,%YMM10

(208) 0x23d8df VINSERTF32X4	$0x1,%XMM3,%YMM11,%YMM29

(208) 0x23d8e6 VMOVDQA64	0x180(%RSP),%YMM18

(208) 0x23d8ee VEXTRACTI128	$0x1,%YMM10,%XMM9

(208) 0x23d8f4 VMOVQ	%XMM10,0x28(%RSP)

(208) 0x23d8fa VPEXTRQ	$0x1,%XMM10,0x20(%RSP)

(208) 0x23d902 VMOVHPD	(%R14,%RDI,8),%XMM15,%XMM10

(208) 0x23d908 VMOVSD	(%R12,%RSI,8),%XMM15

(208) 0x23d90e VMOVQ	%XMM9,0x38(%RSP)

(208) 0x23d914 VPEXTRQ	$0x1,%XMM9,0x18(%RSP)

(208) 0x23d91c VMOVSD	(%R12,%R10,8),%XMM9

(208) 0x23d922 VMOVHPD	(%R12,%RDX,8),%XMM15,%XMM3

(208) 0x23d928 VFMADD213PD	%YMM31,%YMM29,%YMM29

(208) 0x23d92e VMOVHPD	(%R12,%RAX,8),%XMM4,%XMM4

(208) 0x23d934 VPEXTRQ	$0x1,%XMM8,%RAX

(208) 0x23d93a VMOVSD	(%R14,%R15,8),%XMM8

(208) 0x23d940 VMOVHPD	(%R12,%RAX,8),%XMM9,%XMM9

(208) 0x23d946 VMOVHPD	(%R14,%R13,8),%XMM8,%XMM8

(208) 0x23d94c VINSERTF32X4	$0x1,%XMM4,%YMM14,%YMM17

(208) 0x23d953 VMOVDQA	0x1a0(%RSP),%YMM14

(208) 0x23d95c VINSERTF32X4	$0x1,%XMM9,%YMM3,%YMM30

(208) 0x23d963 VMOVDQA	0x1c0(%RSP),%YMM9

(208) 0x23d96c VINSERTF32X4	$0x1,%XMM10,%YMM8,%YMM31

(208) 0x23d973 VFMADD231PD	%YMM17,%YMM17,%YMM29

(208) 0x23d979 VFMADD231PD	%YMM30,%YMM30,%YMM28

(208) 0x23d97f VFMADD213PD	%YMM29,%YMM31,%YMM31

(208) 0x23d985 VPMULLQ	%YMM27,%YMM14,%YMM11

(208) 0x23d98b VPMULLQ	%YMM24,%YMM14,%YMM14

(208) 0x23d991 VPMULLQ	%YMM27,%YMM9,%YMM3

(208) 0x23d997 VPMULLQ	%YMM24,%YMM9,%YMM9

(208) 0x23d99d VPADDQ	%YMM26,%YMM11,%YMM11

(208) 0x23d9a3 VPADDQ	%YMM26,%YMM3,%YMM3

(208) 0x23d9a9 VPADDQ	%YMM25,%YMM9,%YMM9

(208) 0x23d9af VPEXTRQ	$0x1,%XMM11,0x50(%RSP)

(208) 0x23d9b7 VMOVQ	%XMM3,%R15

(208) 0x23d9bc VPEXTRQ	$0x1,%XMM3,%RDX

(208) 0x23d9c2 VEXTRACTI128	$0x1,%YMM3,%XMM3

(208) 0x23d9c8 VMOVQ	%XMM9,%RDI

(208) 0x23d9cd VPEXTRQ	$0x1,%XMM9,%R13

(208) 0x23d9d3 VMOVQ	%XMM3,%R10

(208) 0x23d9d8 VMOVSD	(%RBX,%R15,8),%XMM4

(208) 0x23d9de VPEXTRQ	$0x1,%XMM3,%RSI

(208) 0x23d9e4 VEXTRACTI128	$0x1,%YMM9,%XMM3

(208) 0x23d9ea VMOVSD	(%RBX,%R10,8),%XMM9

(208) 0x23d9f0 VMOVHPD	(%RBX,%RDX,8),%XMM4,%XMM4

(208) 0x23d9f5 VMOVQ	%XMM3,%RAX

(208) 0x23d9fa VPEXTRQ	$0x1,%XMM3,%R10

(208) 0x23da00 VMOVQ	%XMM11,%RDX

(208) 0x23da05 VMOVHPD	(%RBX,%RSI,8),%XMM9,%XMM3

(208) 0x23da0a VMOVSD	(%RBX,%RDI,8),%XMM9

(208) 0x23da0f VMOVHPD	(%RBX,%R13,8),%XMM9,%XMM15

(208) 0x23da15 VEXTRACTI128	$0x1,%YMM11,%XMM9

(208) 0x23da1b VMOVQ	%XMM9,%RSI

(208) 0x23da20 VPEXTRQ	$0x1,%XMM9,%RDI

(208) 0x23da26 VPADDQ	%YMM25,%YMM14,%YMM9

(208) 0x23da2c VMOVSD	(%R8,%RDX,8),%XMM14

(208) 0x23da32 MOV	0x50(%RSP),%RDX

(208) 0x23da37 VMOVQ	%XMM9,%R15

(208) 0x23da3c VPEXTRQ	$0x1,%XMM9,%R13

(208) 0x23da42 VEXTRACTI128	$0x1,%YMM9,%XMM9

(208) 0x23da48 VMOVHPD	(%R8,%RDX,8),%XMM14,%XMM14

(208) 0x23da4e VINSERTF128	$0x1,%XMM3,%YMM4,%YMM3

(208) 0x23da54 VMOVSD	(%RBX,%RAX,8),%XMM4

(208) 0x23da59 MOV	0x38(%RSP),%RAX

(208) 0x23da5e VMOVHPD	(%RBX,%R10,8),%XMM4,%XMM4

(208) 0x23da64 VMOVQ	%XMM9,%R10

(208) 0x23da69 VADDPD	%YMM0,%YMM3,%YMM0

(208) 0x23da6d VMOVSD	(%R12,%RAX,8),%XMM11

(208) 0x23da73 VPEXTRQ	$0x1,%XMM9,%RAX

(208) 0x23da79 VMOVSD	(%R8,%RSI,8),%XMM9

(208) 0x23da7f MOV	0x18(%RSP),%RSI

(208) 0x23da84 VMOVHPD	(%R8,%RDI,8),%XMM9,%XMM9

(208) 0x23da8a VINSERTF32X4	$0x1,%XMM4,%YMM15,%YMM16

(208) 0x23da91 VMOVSD	(%R8,%R15,8),%XMM4

(208) 0x23da97 VMOVDQA	0x160(%RSP),%YMM15

(208) 0x23daa0 VMOVHPD	(%R8,%R13,8),%XMM4,%XMM4

(208) 0x23daa6 VMOVHPD	(%R12,%RSI,8),%XMM11,%XMM10

(208) 0x23daac VADDPD	%YMM7,%YMM16,%YMM7

(208) 0x23dab2 VINSERTF128	$0x1,%XMM9,%YMM14,%YMM9

(208) 0x23dab8 VMOVSD	(%R8,%R10,8),%XMM14

(208) 0x23dabe VMOVHPD	(%R8,%RAX,8),%XMM14,%XMM14

(208) 0x23dac4 MOV	0x28(%RSP),%RAX

(208) 0x23dac9 VPMULLQ	%YMM27,%YMM15,%YMM8

(208) 0x23dacf VPADDQ	%YMM26,%YMM8,%YMM8

(208) 0x23dad5 VPEXTRQ	$0x1,%XMM8,%RDX

(208) 0x23dadb VINSERTF128	$0x1,%XMM14,%YMM4,%YMM4

(208) 0x23dae1 VMOVSD	(%R12,%RAX,8),%XMM14

(208) 0x23dae7 MOV	0x20(%RSP),%RAX

(208) 0x23daec VMULPD	%YMM16,%YMM4,%YMM4

(208) 0x23daf2 VMOVHPD	(%R12,%RAX,8),%XMM14,%XMM14

(208) 0x23daf8 VMOVQ	%XMM8,%RAX

(208) 0x23dafd VEXTRACTI128	$0x1,%YMM8,%XMM8

(208) 0x23db03 VADDPD	%YMM4,%YMM13,%YMM13

(208) 0x23db07 VMOVQ	%XMM8,%RSI

(208) 0x23db0c VMOVSD	(%R9,%RAX,8),%XMM11

(208) 0x23db12 VPEXTRQ	$0x1,%XMM8,%RDI

(208) 0x23db18 VMOVSD	(%R9,%RSI,8),%XMM8

(208) 0x23db1e VMOVHPD	(%R9,%RDX,8),%XMM11,%XMM11

(208) 0x23db24 VMOVHPD	(%R9,%RDI,8),%XMM8,%XMM8

(208) 0x23db2a VINSERTF128	$0x1,%XMM10,%YMM14,%YMM10

(208) 0x23db30 VMOVAPD	0x140(%RSP),%YMM14

(208) 0x23db39 VFMADD231PD	%YMM10,%YMM10,%YMM31

(208) 0x23db3f VINSERTF128	$0x1,%XMM8,%YMM11,%YMM8

(208) 0x23db45 VFMADD231PD	%YMM8,%YMM3,%YMM22

(208) 0x23db4b VMULPD	%YMM3,%YMM9,%YMM8

(208) 0x23db4f VPMULLQ	%YMM27,%YMM18,%YMM3

(208) 0x23db55 VPADDQ	%YMM26,%YMM3,%YMM3

(208) 0x23db5b VADDPD	%YMM12,%YMM8,%YMM12

(208) 0x23db60 VMOVQ	%XMM3,%RAX

(208) 0x23db65 VPEXTRQ	$0x1,%XMM3,%RDX

(208) 0x23db6b VEXTRACTI128	$0x1,%YMM3,%XMM3

(208) 0x23db71 VMOVQ	%XMM3,%RSI

(208) 0x23db76 VMOVSD	(%R11,%RAX,8),%XMM9

(208) 0x23db7c VPEXTRQ	$0x1,%XMM3,%RDI

(208) 0x23db82 VMOVSD	(%R11,%RSI,8),%XMM3

(208) 0x23db88 VMOVHPD	(%R11,%RDX,8),%XMM9,%XMM9

(208) 0x23db8e VMOVHPD	(%R11,%RDI,8),%XMM3,%XMM3

(208) 0x23db94 VINSERTF128	$0x1,%XMM3,%YMM9,%YMM3

(208) 0x23db9a VFMADD231PD	%YMM3,%YMM8,%YMM19

(208) 0x23dba0 VMULPD	%YMM14,%YMM28,%YMM3

(208) 0x23dba6 VFMADD231PD	%YMM3,%YMM8,%YMM20

(208) 0x23dbac VPMULLQ	%YMM24,%YMM18,%YMM3

(208) 0x23dbb2 VPADDQ	%YMM25,%YMM3,%YMM3

(208) 0x23dbb8 VMOVQ	%XMM3,%RDX

(208) 0x23dbbd VPEXTRQ	$0x1,%XMM3,%RAX

(208) 0x23dbc3 VEXTRACTI128	$0x1,%YMM3,%XMM3

(208) 0x23dbc9 VMOVQ	%XMM3,%RSI

(208) 0x23dbce VMOVSD	(%R11,%RDX,8),%XMM8

(208) 0x23dbd4 VPEXTRQ	$0x1,%XMM3,%RDI

(208) 0x23dbda VMOVSD	(%R11,%RSI,8),%XMM3

(208) 0x23dbe0 VMOVHPD	(%R11,%RAX,8),%XMM8,%XMM8

(208) 0x23dbe6 VMOVHPD	(%R11,%RDI,8),%XMM3,%XMM3

(208) 0x23dbec VINSERTF128	$0x1,%XMM3,%YMM8,%YMM3

(208) 0x23dbf2 VPMULLQ	%YMM24,%YMM15,%YMM8

(208) 0x23dbf8 VPADDQ	%YMM25,%YMM8,%YMM8

(208) 0x23dbfe VMOVQ	%XMM8,%RAX

(208) 0x23dc03 VPEXTRQ	$0x1,%XMM8,%RDX

(208) 0x23dc09 VEXTRACTI128	$0x1,%YMM8,%XMM8

(208) 0x23dc0f VMOVQ	%XMM8,%RSI

(208) 0x23dc14 VMOVSD	(%R9,%RAX,8),%XMM9

(208) 0x23dc1a VPEXTRQ	$0x1,%XMM8,%RDI

(208) 0x23dc20 MOV	0x94(%RSP),%EAX

(208) 0x23dc27 VMOVSD	(%R9,%RSI,8),%XMM8

(208) 0x23dc2d VMOVHPD	(%R9,%RDX,8),%XMM9,%XMM9

(208) 0x23dc33 VMOVHPD	(%R9,%RDI,8),%XMM8,%XMM8

(208) 0x23dc39 ADD	$-0x8,%EAX

(208) 0x23dc3c VINSERTF128	$0x1,%XMM8,%YMM9,%YMM8

(208) 0x23dc42 VMULPD	%YMM14,%YMM31,%YMM9

(208) 0x23dc48 VFMADD231PD	%YMM8,%YMM16,%YMM23

(208) 0x23dc4e VMOVAPD	0x1e0(%RSP),%YMM8

(208) 0x23dc57 VFMADD231PD	%YMM9,%YMM4,%YMM21

(208) 0x23dc5d VFMADD231PD	%YMM3,%YMM4,%YMM8

(208) 0x23dc62 JNE	23d330

0x23dc68 VADDPD	%YMM22,%YMM23,%YMM1

0x23dc6e VADDPD	%YMM0,%YMM7,%YMM0

0x23dc72 MOV	0x88(%RSP),%EAX

0x23dc79 MOV	0x90(%RSP),%R10D

0x23dc81 MOV	0x44(%RSP),%R13D

0x23dc86 MOV	0xb0(%RSP),%R15

0x23dc8e MOV	0xa8(%RSP),%RDI

0x23dc96 VEXTRACTF128	$0x1,%YMM1,%XMM2

0x23dc9c VADDPD	%XMM2,%XMM1,%XMM1

0x23dca0 VSHUFPD	$0x1,%XMM1,%XMM1,%XMM2

0x23dca5 VADDSD	%XMM2,%XMM1,%XMM1

0x23dca9 VADDPD	%YMM20,%YMM21,%YMM2

0x23dcaf VEXTRACTF128	$0x1,%YMM2,%XMM3

0x23dcb5 VADDPD	%XMM3,%XMM2,%XMM2

0x23dcb9 VSHUFPD	$0x1,%XMM2,%XMM2,%XMM3

0x23dcbe VADDSD	%XMM3,%XMM2,%XMM2

0x23dcc2 VADDPD	%YMM19,%YMM8,%YMM3

0x23dcc8 VEXTRACTF128	$0x1,%YMM3,%XMM4

0x23dcce VADDPD	%XMM4,%XMM3,%XMM3

0x23dcd2 VSHUFPD	$0x1,%XMM3,%XMM3,%XMM4

0x23dcd7 VADDSD	%XMM4,%XMM3,%XMM3

0x23dcdb VADDPD	%YMM12,%YMM13,%YMM4

0x23dce0 VEXTRACTF128	$0x1,%YMM4,%XMM5

0x23dce6 VADDPD	%XMM5,%XMM4,%XMM4

0x23dcea VSHUFPD	$0x1,%XMM4,%XMM4,%XMM5

0x23dcef VADDSD	%XMM5,%XMM4,%XMM4

0x23dcf3 VEXTRACTF128	$0x1,%YMM0,%XMM5

0x23dcf9 VADDPD	%XMM5,%XMM0,%XMM0

0x23dcfd VSHUFPD	$0x1,%XMM0,%XMM0,%XMM5

0x23dd02 VADDSD	%XMM5,%XMM0,%XMM0

0x23dd06 CMP	%EAX,0x8c(%RSP)

0x23dd0d JE	23de14

0x23dd13 VMOVSD	-0x2cbd3(%RIP),%XMM5

0x23dd1b NOPL	(%RAX,%RAX,1)

(207) 0x23dd20 MOV	%ECX,%EAX

(207) 0x23dd22 CLTD

(207) 0x23dd23 MOV	%R15,%RSI

(207) 0x23dd26 IDIV	%R13D

(207) 0x23dd29 MOV	%R10D,%R13D

(207) 0x23dd2c ADD	%R10D,%EDX

(207) 0x23dd2f MOV	%RDI,%R10

(207) 0x23dd32 MOV	0x58(%RSP),%RDI

(207) 0x23dd37 MOVSXD	%EDX,%RDX

(207) 0x23dd3a ADD	0x40(%RSP),%EAX

(207) 0x23dd3e CLTQ

(207) 0x23dd40 IMUL	%RAX,%RSI

(207) 0x23dd44 IMUL	%RAX,%RDI

(207) 0x23dd48 ADD	%RDX,%RSI

(207) 0x23dd4b ADD	%RDX,%RDI

(207) 0x23dd4e VMOVUPD	(%R14,%RSI,8),%XMM6

(207) 0x23dd54 LEA	0x1(%RAX),%RSI

(207) 0x23dd58 VINSERTF128	$0x1,(%R12,%RDI,8),%YMM6,%YMM6

(207) 0x23dd5f MOV	%RSI,%RDI

(207) 0x23dd62 IMUL	0x58(%RSP),%RSI

(207) 0x23dd68 IMUL	%R15,%RDI

(207) 0x23dd6c ADD	%RDX,%RDI

(207) 0x23dd6f VMOVUPD	(%R14,%RDI,8),%XMM7

(207) 0x23dd75 MOV	%R10,%RDI

(207) 0x23dd78 MOV	%R13D,%R10D

(207) 0x23dd7b MOV	0x44(%RSP),%R13D

(207) 0x23dd80 ADD	%RDX,%RSI

(207) 0x23dd83 VINSERTF128	$0x1,(%R12,%RSI,8),%YMM7,%YMM7

(207) 0x23dd8a MOV	0xc0(%RSP),%RSI

(207) 0x23dd92 IMUL	%RAX,%RSI

(207) 0x23dd96 ADD	%RDX,%RSI

(207) 0x23dd99 VMOVSD	(%RBX,%RSI,8),%XMM8

(207) 0x23dd9e MOV	%RDI,%RSI

(207) 0x23dda1 IMUL	%RAX,%RSI

(207) 0x23dda5 VMULPD	%YMM7,%YMM7,%YMM7

(207) 0x23dda9 ADD	%RDX,%RSI

(207) 0x23ddac VFMADD231PD	%YMM6,%YMM6,%YMM7

(207) 0x23ddb1 VMULSD	(%R8,%RSI,8),%XMM8,%XMM9

(207) 0x23ddb7 MOV	0xa0(%RSP),%RSI

(207) 0x23ddbf VEXTRACTF128	$0x1,%YMM7,%XMM6

(207) 0x23ddc5 VADDSD	%XMM0,%XMM8,%XMM0

(207) 0x23ddc9 IMUL	%RAX,%RSI

(207) 0x23ddcd VADDPD	%XMM6,%XMM7,%XMM6

(207) 0x23ddd1 ADD	%RDX,%RSI

(207) 0x23ddd4 VSHUFPD	$0x1,%XMM6,%XMM6,%XMM7

(207) 0x23ddd9 VFMADD231SD	(%R11,%RSI,8),%XMM9,%XMM3

(207) 0x23dddf MOV	0xb8(%RSP),%RSI

(207) 0x23dde7 VADDSD	%XMM7,%XMM6,%XMM6

(207) 0x23ddeb VADDSD	%XMM4,%XMM9,%XMM4

(207) 0x23ddef VMULSD	%XMM5,%XMM6,%XMM6

(207) 0x23ddf3 IMUL	%RSI,%RAX

(207) 0x23ddf7 VFMADD231SD	%XMM6,%XMM9,%XMM2

(207) 0x23ddfc ADD	%RDX,%RAX

(207) 0x23ddff VFMADD231SD	(%R9,%RAX,8),%XMM8,%XMM1

(207) 0x23de05 LEA	0x1(%RCX),%EAX

(207) 0x23de08 CMP	0x48(%RSP),%ECX

(207) 0x23de0c MOV	%EAX,%ECX

(207) 0x23de0e JL	23dd20

0x23de14 MOV	0x30(%RSP),%ESI

0x23de18 MOV	0x38(%RBP),%R13

0x23de1c MOV	0x30(%RBP),%R12

0x23de20 MOV	0x28(%RBP),%R15

0x23de24 MOV	0x20(%RBP),%R14

0x23de28 MOV	0x18(%RBP),%RBX

0x23de2c LEA	0x1d325(%RIP),%RDI

0x23de33 VMOVSD	%XMM0,0x60(%RSP)

0x23de39 VMOVSD	%XMM4,0x68(%RSP)

0x23de3f VMOVSD	%XMM3,0x70(%RSP)

0x23de45 VMOVSD	%XMM2,0x78(%RSP)

0x23de4b VMOVSD	%XMM1,0x80(%RSP)

0x23de54 VZEROUPPER

0x23de57 CALL	259690 <@plt_start@+0x540>

0x23de5c LEA	0x80(%RSP),%RAX

0x23de64 LEA	0x78(%RSP),%R10

0x23de69 LEA	0x70(%RSP),%R11

0x23de6e MOV	%RAX,0xd8(%RSP)

0x23de76 MOV	%R10,0xe0(%RSP)

0x23de7e LEA	0x60(%RSP),%RAX

0x23de83 LEA	0x68(%RSP),%R10

0x23de88 MOV	%R11,0xe8(%RSP)

0x23de90 MOV	%R10,0xf0(%RSP)

0x23de98 MOV	%RAX,0xf8(%RSP)

0x23dea0 SUB	$0x8,%RSP

0x23dea4 LEA	0x2110d(%RIP),%RAX

0x23deab MOV	0x38(%RSP),%ESI

0x23deaf LEA	0x1d2ba(%RIP),%RDI

0x23deb6 LEA	-0xe8d(%RIP),%R9

0x23debd LEA	0xe0(%RSP),%R8

0x23dec5 MOV	$0x28,%ECX

0x23deca MOV	$0x5,%EDX

0x23decf PUSH	%RAX

0x23ded0 CALL	2596b0 <@plt_start@+0x560>

0x23ded5 ADD	$0x10,%RSP

0x23ded9 CMP	$0x2,%EAX

0x23dedc JE	23df58

0x23dede CMP	$0x1,%EAX

0x23dee1 JNE	23e04a

0x23dee7 VMOVSD	0x80(%RSP),%XMM0

0x23def0 LEA	0x210c1(%RIP),%RDX

0x23def7 MOV	0x30(%RSP),%ESI

0x23defb LEA	0x1d26e(%RIP),%RDI

0x23df02 VADDSD	(%R13),%XMM0,%XMM0

0x23df08 VMOVSD	%XMM0,(%R13)

0x23df0e VMOVSD	0x78(%RSP),%XMM0

0x23df14 VADDSD	(%R12),%XMM0,%XMM0

0x23df1a VMOVSD	%XMM0,(%R12)

0x23df20 VMOVSD	0x70(%RSP),%XMM0

0x23df26 VADDSD	(%R15),%XMM0,%XMM0

0x23df2b VMOVSD	%XMM0,(%R15)

0x23df30 VMOVSD	0x68(%RSP),%XMM0

0x23df36 VADDSD	(%R14),%XMM0,%XMM0

0x23df3b VMOVSD	%XMM0,(%R14)

0x23df40 VMOVSD	0x60(%RSP),%XMM0

0x23df46 VADDSD	(%RBX),%XMM0,%XMM0

0x23df4a VMOVSD	%XMM0,(%RBX)

0x23df4e CALL	2596c0 <@plt_start@+0x570>

0x23df53 JMP	23e04a

0x23df58 VMOVSD	0x80(%RSP),%XMM0

0x23df61 VMOVSD	(%R13),%XMM1

0x23df67 NOPW	(%RAX,%RAX,1)

(202) 0x23df70 VADDSD	%XMM0,%XMM1,%XMM2

(202) 0x23df74 VMOVQ	%XMM1,%RAX

(202) 0x23df79 VMOVQ	%XMM2,%RCX

(202) 0x23df7e LOCK CMPXCHG	%RCX,(%R13)

(202) 0x23df84 VMOVQ	%RAX,%XMM1

(202) 0x23df89 JNE	23df70

0x23df8b VMOVSD	0x78(%RSP),%XMM0

0x23df91 VMOVSD	(%R12),%XMM1

0x23df97 NOPW	(%RAX,%RAX,1)

(203) 0x23dfa0 VADDSD	%XMM0,%XMM1,%XMM2

(203) 0x23dfa4 VMOVQ	%XMM1,%RAX

(203) 0x23dfa9 VMOVQ	%XMM2,%RCX

(203) 0x23dfae LOCK CMPXCHG	%RCX,(%R12)

(203) 0x23dfb4 VMOVQ	%RAX,%XMM1

(203) 0x23dfb9 JNE	23dfa0

0x23dfbb VMOVSD	0x70(%RSP),%XMM0

0x23dfc1 VMOVSD	(%R15),%XMM1

0x23dfc6 NOPW	%CS:(%RAX,%RAX,1)

(204) 0x23dfd0 VADDSD	%XMM0,%XMM1,%XMM2

(204) 0x23dfd4 VMOVQ	%XMM1,%RAX

(204) 0x23dfd9 VMOVQ	%XMM2,%RCX

(204) 0x23dfde LOCK CMPXCHG	%RCX,(%R15)

(204) 0x23dfe3 VMOVQ	%RAX,%XMM1

(204) 0x23dfe8 JNE	23dfd0

0x23dfea VMOVSD	0x68(%RSP),%XMM0

0x23dff0 VMOVSD	(%R14),%XMM1

0x23dff5 NOPW	%CS:(%RAX,%RAX,1)

(205) 0x23e000 VADDSD	%XMM0,%XMM1,%XMM2

(205) 0x23e004 VMOVQ	%XMM1,%RAX

(205) 0x23e009 VMOVQ	%XMM2,%RCX

(205) 0x23e00e LOCK CMPXCHG	%RCX,(%R14)

(205) 0x23e013 VMOVQ	%RAX,%XMM1

(205) 0x23e018 JNE	23e000

0x23e01a VMOVSD	0x60(%RSP),%XMM0

0x23e020 VMOVSD	(%RBX),%XMM1

0x23e024 NOPW	%CS:(%RAX,%RAX,1)

(206) 0x23e030 VADDSD	%XMM0,%XMM1,%XMM2

(206) 0x23e034 VMOVQ	%XMM1,%RAX

(206) 0x23e039 VMOVQ	%XMM2,%RCX

(206) 0x23e03e LOCK CMPXCHG	%RCX,(%RBX)

(206) 0x23e043 VMOVQ	%RAX,%XMM1

(206) 0x23e048 JNE	23e030

0x23e04a LEA	-0x28(%RBP),%RSP

0x23e04e POP	%RBX

0x23e04f POP	%R12

0x23e051 POP	%R13

0x23e053 POP	%R14

0x23e055 POP	%R15

0x23e057 POP	%RBP

0x23e058 RET

0x23e059 INT	$0x3

0x23e05a INT	$0x3

0x23e05b INT	$0x3

0x23e05c INT	$0x3

0x23e05d INT	$0x3

0x23e05e INT	$0x3

0x23e05f INT	$0x3

Coverage (%)	Name	Source Location	Module

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run aocc_8

Source file and lines	field_summary.cpp:75-91
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:69
/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:75-91

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 31.63 to 14.75 cycles (2.14x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is poorly vectorized. Only 17% of vector register length is used (average across all SSE/AVX instructions).

Details

33% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

2% of SSE/AVX loads are used in vector version.
21% of SSE/AVX stores are used in vector version.
50% of SSE/AVX addition or subtraction instructions are used in vector version.
57% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Workaround

Read the "512-bits vectorization" report at "Potential" confidence level.

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

512-bits vectorization

On some x86 processors supporting 512-bits vectorization, compilers are often too conservative and limit vectorization to 256 bits. Performance can then be improved by enforcing 512-bits vectorization, especially with many vectorized and high trip count loops. 512-bits vectorization performance overhead (compared to 256-bits) is generally lower on newer processors.

Workaround

Recompile with -mprefer-vector-width=512

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

unknown: 4 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:75
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:75
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:75
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:75

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVL: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:76
VPBROADCASTD: 4 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:76
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:76
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:76
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:76
VPBROADCASTQ: 6 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:76
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:76
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:76
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:76
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:76
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:76

Vector unaligned load/store instructions

Detected 5 suboptimal vector unaligned load/store instructions.

Details

VEXTRACTF128: 5 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:76
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:76
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:76
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:76
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:76

Workaround

Pass to your compiler a micro-architecture specialization option:
- use march=native
Use vector aligned instructions:
1. align your arrays on 64 bytes boundaries: replace { void *p = malloc (size); } with { void *p; posix_memalign (&p, 64, size); }.
2. inform your compiler that your arrays are vector aligned: if array 'foo' is 64 bytes-aligned, define a pointer 'p_foo' as __builtin_assume_aligned (foo, 64) and use it instead of 'foo' in the loop.

Type of elements and instruction set

10 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in scalar mode (one at a time). 5 SSE or AVX instructions are processing arithmetic or math operations on double precision FP elements in vector mode (two at a time). 5 AVX instructions are processing arithmetic or math operations on double precision FP elements in vector mode (four at a time).

Matching between your function (in the source code) and the binary function

The binary function is composed of 40 FP arithmetical operations:

40: addition or subtraction

The binary function is loading 452 bytes (56 double precision FP elements). The binary function is storing 440 bytes (55 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.04 FP operations per loaded or stored byte.

General properties

nb instructions	252
nb uops	253
loop length	1296
used x86 registers	16
used mmx registers	0
used xmm registers	15
used ymm registers	17
used zmm registers	0
nb stack references	47

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	31.63 cycles
front end	31.63 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	10.33	10.33	10.33	10.33	10.33	10.33	28.00	28.00	28.00	28.00	6.00	9.00	13.00	13.00	9.50	9.50
cycles	10.33	10.33	10.33	10.33	10.33	10.33	28.00	28.00	28.00	28.00	6.00	9.00	13.00	13.00	9.50	9.50

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	31.63
Dispatch	28.00
Overall L1	31.63

Vectorization ratios

INT

all	15%
load	7%
store	20%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	50%
fma	NA (no fma vectorizable/vectorized instructions)
other	11%

all	48%
load	0%
store	23%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	50%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	88%

INT+FP

all	33%
load	2%
store	21%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	50%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	57%

Vector efficiency ratios

INT

all	12%
load	9%
store	15%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	15%
fma	NA (no fma vectorizable/vectorized instructions)
other	10%

all	20%
load	11%
store	17%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	25%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	23%

INT+FP

all	17%
load	11%
store	16%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	24%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	18%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 31.63 cycles. At this rate:

5% of peak load performance is reached (14.29 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
10% of peak store performance is reached (13.91 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 31.63 to 28.00 cycles (1.13x speedup).

ASM code

In the binary file, the address of the function is: 23d0a0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
AND $-0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB $0x220,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%RDX),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R8),%R14D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
SUB (%RCX),%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	N/A
SUB (%R9),%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	N/A
INC %EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
INC %R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
IMUL %EAX,%R14D	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
TEST %R14D,%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JLE 23e04a <_Z13field_summaryR16global_variablesR9parallel_.omp_outlined+0xfaa>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
DEC %R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RCX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R8,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R9,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOVL $0,0x4c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOVL $0x1,0x9c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOVL $0,0x98(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %R14D,0x34(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA 0xa0(%RSP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0xa4(%RSP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x1e020(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x54(%RSP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x3c(%RSP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %ESI,0x38(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 2596a0 <@plt_start@+0x550>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x34(%RSP),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x4c(%RSP),%ECX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VXORPD %XMM1,%XMM1,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VXORPD %XMM2,%XMM2,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VXORPD %XMM3,%XMM3,%XMM3	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VXORPD %XMM4,%XMM4,%XMM4	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VXORPD %XMM0,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
CMP %R14D,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
CMOVL %EAX,%R14D	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV %R14D,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %R14D,0x34(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
CMP %R14D,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JG 23de14 <_Z13field_summaryR16global_variablesR9parallel_.omp_outlined+0xd74>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV (%R15),%EDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R12),%R10D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOV (%RBX),%R13D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
INC %EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x290(%RAX),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0xb8(%RAX),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xa8(%RAX),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xe8(%RAX),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x2a0(%RAX),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%RAX),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x40(%RAX),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x70(%RAX),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
SUB %R10D,%R13D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
INC %R10D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV %EDX,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV 0xd8(%RAX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
INC %R13D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R13D,0x44(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %RSI,0xc0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDX,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x30(%RAX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x60(%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDX,0xa0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x48(%RSP),%EDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,0xb8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
SUB %ECX,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
INC %EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP $0x8,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JB 23dd13 <_Z13field_summaryR16global_variablesR9parallel_.omp_outlined+0xc73>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
VPBROADCASTD %ECX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	1	scal (6.3%)
VPADDD -0x2bf16(%RIP),%XMM0,%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	vect (25.0%)
VPBROADCASTD %R10D,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	1	scal (6.3%)
MOV %R10D,0x90(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV 0x40(%RSP),%R10D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
VBROADCASTSD -0x2c0ea(%RIP),%YMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VBROADCASTSS -0x3a63b(%RIP),%XMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
VBROADCASTSS -0x3a638(%RIP),%XMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %EDX,0x8c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
AND $-0x8,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VPBROADCASTD %R13D,%XMM2	2	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	1	scal (6.3%)
VPBROADCASTQ %R15,%YMM5	2	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	1	scal (12.5%)
VXORPD %XMM7,%XMM7,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VXORPD %XMM12,%XMM12,%XMM12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VXORPD %XMM13,%XMM13,%XMM13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VXORPD %XMM19,%XMM19,%XMM19	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VXORPD %XMM8,%XMM8,%XMM8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VXORPD %XMM20,%XMM20,%XMM20	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VXORPD %XMM21,%XMM21,%XMM21	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VXORPD %XMM22,%XMM22,%XMM22	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VXORPD %XMM23,%XMM23,%XMM23	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOV %R15,0xb0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDI,0xa8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVDQA %XMM0,0x130(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
ADD %EDX,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %EDX,0x88(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
VPBROADCASTD %R10D,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	1	scal (6.3%)
MOV 0x58(%RSP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
VMOVDQA %XMM0,0x120(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VPBROADCASTQ %RSI,%YMM0	2	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	1	scal (12.5%)
MOV 0xa0(%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
VMOVDQA %YMM0,0x1c0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (50.0%)
VPBROADCASTQ %RDI,%YMM0	2	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	1	scal (12.5%)
VMOVDQA %YMM0,0x1a0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (50.0%)
VMOVAPD %XMM3,0x110(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVAPD %XMM4,0x100(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVAPD %YMM9,0x140(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (50.0%)
VPBROADCASTQ %R10,%YMM6	2	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	1	scal (12.5%)
VPBROADCASTQ %RSI,%YMM0	2	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	1	scal (12.5%)
VMOVDQA %YMM0,0x180(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (50.0%)
VPBROADCASTQ %RAX,%YMM0	2	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	1	scal (12.5%)
MOV %EDX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VMOVDQA %YMM0,0x160(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (50.0%)
VPXOR %XMM0,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	vect (25.0%)
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
VADDPD %YMM22,%YMM23,%YMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VADDPD %YMM0,%YMM7,%YMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
MOV 0x88(%RSP),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x90(%RSP),%R10D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOV 0x44(%RSP),%R13D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xb0(%RSP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xa8(%RSP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VEXTRACTF128 $0x1,%YMM1,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	3	0.50	vect (25.0%)
VADDPD %XMM2,%XMM1,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (25.0%)
VSHUFPD $0x1,%XMM1,%XMM1,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
VADDSD %XMM2,%XMM1,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	scal (12.5%)
VADDPD %YMM20,%YMM21,%YMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VEXTRACTF128 $0x1,%YMM2,%XMM3	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	3	0.50	vect (25.0%)
VADDPD %XMM3,%XMM2,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (25.0%)
VSHUFPD $0x1,%XMM2,%XMM2,%XMM3	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
VADDSD %XMM3,%XMM2,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	scal (12.5%)
VADDPD %YMM19,%YMM8,%YMM3	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VEXTRACTF128 $0x1,%YMM3,%XMM4	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	3	0.50	vect (25.0%)
VADDPD %XMM4,%XMM3,%XMM3	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (25.0%)
VSHUFPD $0x1,%XMM3,%XMM3,%XMM4	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
VADDSD %XMM4,%XMM3,%XMM3	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	scal (12.5%)
VADDPD %YMM12,%YMM13,%YMM4	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VEXTRACTF128 $0x1,%YMM4,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	3	0.50	vect (25.0%)
VADDPD %XMM5,%XMM4,%XMM4	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (25.0%)
VSHUFPD $0x1,%XMM4,%XMM4,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
VADDSD %XMM5,%XMM4,%XMM4	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	scal (12.5%)
VEXTRACTF128 $0x1,%YMM0,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	3	0.50	vect (25.0%)
VADDPD %XMM5,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (25.0%)
VSHUFPD $0x1,%XMM0,%XMM0,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
VADDSD %XMM5,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	scal (12.5%)
CMP %EAX,0x8c(%RSP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (6.3%)
JE 23de14 <_Z13field_summaryR16global_variablesR9parallel_.omp_outlined+0xd74>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
VMOVSD -0x2cbd3(%RIP),%XMM5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV 0x30(%RSP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOV 0x38(%RBP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x30(%RBP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x28(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x20(%RBP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x18(%RBP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA 0x1d325(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VMOVSD %XMM0,0x60(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVSD %XMM4,0x68(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVSD %XMM3,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVSD %XMM2,0x78(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVSD %XMM1,0x80(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 259690 <@plt_start@+0x540>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
LEA 0x80(%RSP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x78(%RSP),%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x70(%RSP),%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %RAX,0xd8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,0xe0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA 0x60(%RSP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x68(%RSP),%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R11,0xe8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,0xf0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RAX,0xf8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA 0x2110d(%RIP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV 0x38(%RSP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
LEA 0x1d2ba(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA -0xe8d(%RIP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0xe0(%RSP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV $0x28,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV $0x5,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 2596b0 <@plt_start@+0x560>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
ADD $0x10,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP $0x2,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JE 23df58 <_Z13field_summaryR16global_variablesR9parallel_.omp_outlined+0xeb8>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x1,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JNE 23e04a <_Z13field_summaryR16global_variablesR9parallel_.omp_outlined+0xfaa>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
VMOVSD 0x80(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
LEA 0x210c1(%RIP),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV 0x30(%RSP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
LEA 0x1d26e(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VADDSD (%R13),%XMM0,%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	0	0	2	0.50	scal (12.5%)
VMOVSD %XMM0,(%R13)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVSD 0x78(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VADDSD (%R12),%XMM0,%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	0	0	2	0.50	scal (12.5%)
VMOVSD %XMM0,(%R12)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVSD 0x70(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VADDSD (%R15),%XMM0,%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	0	0	2	0.50	scal (12.5%)
VMOVSD %XMM0,(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVSD 0x68(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VADDSD (%R14),%XMM0,%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	0	0	2	0.50	scal (12.5%)
VMOVSD %XMM0,(%R14)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVSD 0x60(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VADDSD (%RBX),%XMM0,%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	0	0	2	0.50	scal (12.5%)
VMOVSD %XMM0,(%RBX)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
CALL 2596c0 <@plt_start@+0x570>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
JMP 23e04a <_Z13field_summaryR16global_variablesR9parallel_.omp_outlined+0xfaa>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
VMOVSD 0x80(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD (%R13),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
VMOVSD 0x78(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD (%R12),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
VMOVSD 0x70(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD (%R15),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
VMOVSD 0x68(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD (%R14),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
VMOVSD 0x60(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD (%RBX),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
LEA -0x28(%RBP),%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
INT $0x3																				N/A
INT $0x3																				N/A
INT $0x3																				N/A
INT $0x3																				N/A
INT $0x3																				N/A
INT $0x3																				N/A
INT $0x3																				N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run aocc_8

Source file and lines	field_summary.cpp:75-91
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:69
/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:75-91

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is poorly vectorized. Only 17% of vector register length is used (average across all SSE/AVX instructions).

Details

33% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

2% of SSE/AVX loads are used in vector version.
21% of SSE/AVX stores are used in vector version.
50% of SSE/AVX addition or subtraction instructions are used in vector version.
57% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Workaround

Read the "512-bits vectorization" report at "Potential" confidence level.

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

512-bits vectorization

Workaround

Recompile with -mprefer-vector-width=512

CALL instructions

Detected function call instructions.

Details

unknown: 4 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:75
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:75
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:75
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:75

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVL: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:76
VPBROADCASTD: 4 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:76
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:76
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:76
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:76
VPBROADCASTQ: 6 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:76
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:76
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:76
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:76
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:76
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:76

Vector unaligned load/store instructions

Detected 5 suboptimal vector unaligned load/store instructions.

Details

VEXTRACTF128: 5 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:76
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:76
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:76
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:76
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:76

Workaround

Pass to your compiler a micro-architecture specialization option:
- use march=native
Use vector aligned instructions:
1. align your arrays on 64 bytes boundaries: replace { void *p = malloc (size); } with { void *p; posix_memalign (&p, 64, size); }.
2. inform your compiler that your arrays are vector aligned: if array 'foo' is 64 bytes-aligned, define a pointer 'p_foo' as __builtin_assume_aligned (foo, 64) and use it instead of 'foo' in the loop.

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

The binary function is composed of 40 FP arithmetical operations:

40: addition or subtraction

The binary function is loading 452 bytes (56 double precision FP elements). The binary function is storing 440 bytes (55 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.04 FP operations per loaded or stored byte.

General properties

nb instructions	252
nb uops	253
loop length	1296
used x86 registers	16
used mmx registers	0
used xmm registers	15
used ymm registers	17
used zmm registers	0
nb stack references	47

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	31.63 cycles
front end	31.63 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	10.33	10.33	10.33	10.33	10.33	10.33	28.00	28.00	28.00	28.00	6.00	9.00	13.00	13.00	9.50	9.50
cycles	10.33	10.33	10.33	10.33	10.33	10.33	28.00	28.00	28.00	28.00	6.00	9.00	13.00	13.00	9.50	9.50

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	31.63
Dispatch	28.00
Overall L1	31.63

Vectorization ratios

INT

all	15%
load	7%
store	20%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	50%
fma	NA (no fma vectorizable/vectorized instructions)
other	11%

all	48%
load	0%
store	23%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	50%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	88%

INT+FP

all	33%
load	2%
store	21%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	50%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	57%

Vector efficiency ratios

INT

all	12%
load	9%
store	15%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	15%
fma	NA (no fma vectorizable/vectorized instructions)
other	10%

all	20%
load	11%
store	17%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	25%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	23%

INT+FP

all	17%
load	11%
store	16%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	24%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	18%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 31.63 cycles. At this rate:

5% of peak load performance is reached (14.29 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
10% of peak store performance is reached (13.91 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 23d0a0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
AND $-0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB $0x220,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%RDX),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R8),%R14D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
SUB (%RCX),%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	N/A
SUB (%R9),%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	N/A
INC %EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
INC %R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
IMUL %EAX,%R14D	1	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0.33	N/A
TEST %R14D,%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JLE 23e04a <_Z13field_summaryR16global_variablesR9parallel_.omp_outlined+0xfaa>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
DEC %R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RCX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R8,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R9,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOVL $0,0x4c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOVL $0x1,0x9c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOVL $0,0x98(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %R14D,0x34(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA 0xa0(%RSP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0xa4(%RSP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x1e020(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x54(%RSP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x3c(%RSP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %ESI,0x38(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 2596a0 <@plt_start@+0x550>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x34(%RSP),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x4c(%RSP),%ECX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VXORPD %XMM1,%XMM1,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VXORPD %XMM2,%XMM2,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VXORPD %XMM3,%XMM3,%XMM3	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VXORPD %XMM4,%XMM4,%XMM4	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VXORPD %XMM0,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
CMP %R14D,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
CMOVL %EAX,%R14D	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
MOV %R14D,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %R14D,0x34(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
CMP %R14D,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JG 23de14 <_Z13field_summaryR16global_variablesR9parallel_.omp_outlined+0xd74>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV (%R15),%EDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R12),%R10D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOV (%RBX),%R13D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
INC %EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x290(%RAX),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0xb8(%RAX),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xa8(%RAX),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xe8(%RAX),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x2a0(%RAX),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%RAX),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x40(%RAX),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x70(%RAX),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
SUB %R10D,%R13D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
INC %R10D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV %EDX,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV 0xd8(%RAX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
INC %R13D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R13D,0x44(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %RSI,0xc0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDX,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x30(%RAX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x60(%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDX,0xa0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x48(%RSP),%EDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,0xb8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
SUB %ECX,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
INC %EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP $0x8,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JB 23dd13 <_Z13field_summaryR16global_variablesR9parallel_.omp_outlined+0xc73>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
VPBROADCASTD %ECX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	1	scal (6.3%)
VPADDD -0x2bf16(%RIP),%XMM0,%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	vect (25.0%)
VPBROADCASTD %R10D,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	1	scal (6.3%)
MOV %R10D,0x90(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV 0x40(%RSP),%R10D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
VBROADCASTSD -0x2c0ea(%RIP),%YMM9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VBROADCASTSS -0x3a63b(%RIP),%XMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
VBROADCASTSS -0x3a638(%RIP),%XMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %EDX,0x8c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
AND $-0x8,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
VPBROADCASTD %R13D,%XMM2	2	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	1	scal (6.3%)
VPBROADCASTQ %R15,%YMM5	2	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	1	scal (12.5%)
VXORPD %XMM7,%XMM7,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VXORPD %XMM12,%XMM12,%XMM12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VXORPD %XMM13,%XMM13,%XMM13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VXORPD %XMM19,%XMM19,%XMM19	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VXORPD %XMM8,%XMM8,%XMM8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VXORPD %XMM20,%XMM20,%XMM20	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VXORPD %XMM21,%XMM21,%XMM21	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VXORPD %XMM22,%XMM22,%XMM22	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
VXORPD %XMM23,%XMM23,%XMM23	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	vect (25.0%)
MOV %R15,0xb0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDI,0xa8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
VMOVDQA %XMM0,0x130(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
ADD %EDX,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %EDX,0x88(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
VPBROADCASTD %R10D,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	1	scal (6.3%)
MOV 0x58(%RSP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
VMOVDQA %XMM0,0x120(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VPBROADCASTQ %RSI,%YMM0	2	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	1	scal (12.5%)
MOV 0xa0(%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
VMOVDQA %YMM0,0x1c0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (50.0%)
VPBROADCASTQ %RDI,%YMM0	2	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	1	scal (12.5%)
VMOVDQA %YMM0,0x1a0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (50.0%)
VMOVAPD %XMM3,0x110(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVAPD %XMM4,0x100(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
VMOVAPD %YMM9,0x140(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (50.0%)
VPBROADCASTQ %R10,%YMM6	2	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	1	scal (12.5%)
VPBROADCASTQ %RSI,%YMM0	2	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	1	scal (12.5%)
VMOVDQA %YMM0,0x180(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (50.0%)
VPBROADCASTQ %RAX,%YMM0	2	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	1	scal (12.5%)
MOV %EDX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
VMOVDQA %YMM0,0x160(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (50.0%)
VPXOR %XMM0,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	vect (25.0%)
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
VADDPD %YMM22,%YMM23,%YMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VADDPD %YMM0,%YMM7,%YMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
MOV 0x88(%RSP),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x90(%RSP),%R10D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOV 0x44(%RSP),%R13D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xb0(%RSP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0xa8(%RSP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
VEXTRACTF128 $0x1,%YMM1,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	3	0.50	vect (25.0%)
VADDPD %XMM2,%XMM1,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (25.0%)
VSHUFPD $0x1,%XMM1,%XMM1,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
VADDSD %XMM2,%XMM1,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	scal (12.5%)
VADDPD %YMM20,%YMM21,%YMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VEXTRACTF128 $0x1,%YMM2,%XMM3	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	3	0.50	vect (25.0%)
VADDPD %XMM3,%XMM2,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (25.0%)
VSHUFPD $0x1,%XMM2,%XMM2,%XMM3	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
VADDSD %XMM3,%XMM2,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	scal (12.5%)
VADDPD %YMM19,%YMM8,%YMM3	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VEXTRACTF128 $0x1,%YMM3,%XMM4	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	3	0.50	vect (25.0%)
VADDPD %XMM4,%XMM3,%XMM3	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (25.0%)
VSHUFPD $0x1,%XMM3,%XMM3,%XMM4	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
VADDSD %XMM4,%XMM3,%XMM3	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	scal (12.5%)
VADDPD %YMM12,%YMM13,%YMM4	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (50.0%)
VEXTRACTF128 $0x1,%YMM4,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	3	0.50	vect (25.0%)
VADDPD %XMM5,%XMM4,%XMM4	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (25.0%)
VSHUFPD $0x1,%XMM4,%XMM4,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
VADDSD %XMM5,%XMM4,%XMM4	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	scal (12.5%)
VEXTRACTF128 $0x1,%YMM0,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	3	0.50	vect (25.0%)
VADDPD %XMM5,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	vect (25.0%)
VSHUFPD $0x1,%XMM0,%XMM0,%XMM5	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
VADDSD %XMM5,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	2	0.50	scal (12.5%)
CMP %EAX,0x8c(%RSP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (6.3%)
JE 23de14 <_Z13field_summaryR16global_variablesR9parallel_.omp_outlined+0xd74>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
VMOVSD -0x2cbd3(%RIP),%XMM5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV 0x30(%RSP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOV 0x38(%RBP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x30(%RBP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x28(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x20(%RBP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x18(%RBP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
LEA 0x1d325(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VMOVSD %XMM0,0x60(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVSD %XMM4,0x68(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVSD %XMM3,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVSD %XMM2,0x78(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVSD %XMM1,0x80(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	vect (25.0%)
CALL 259690 <@plt_start@+0x540>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
LEA 0x80(%RSP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x78(%RSP),%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x70(%RSP),%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %RAX,0xd8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,0xe0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
LEA 0x60(%RSP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x68(%RSP),%R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV %R11,0xe8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,0xf0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RAX,0xf8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA 0x2110d(%RIP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV 0x38(%RSP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
LEA 0x1d2ba(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA -0xe8d(%RIP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0xe0(%RSP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV $0x28,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV $0x5,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 2596b0 <@plt_start@+0x560>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
ADD $0x10,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP $0x2,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
JE 23df58 <_Z13field_summaryR16global_variablesR9parallel_.omp_outlined+0xeb8>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
CMP $0x1,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JNE 23e04a <_Z13field_summaryR16global_variablesR9parallel_.omp_outlined+0xfaa>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
VMOVSD 0x80(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
LEA 0x210c1(%RIP),%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV 0x30(%RSP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
LEA 0x1d26e(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
VADDSD (%R13),%XMM0,%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	0	0	2	0.50	scal (12.5%)
VMOVSD %XMM0,(%R13)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVSD 0x78(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VADDSD (%R12),%XMM0,%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	0	0	2	0.50	scal (12.5%)
VMOVSD %XMM0,(%R12)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVSD 0x70(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VADDSD (%R15),%XMM0,%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	0	0	2	0.50	scal (12.5%)
VMOVSD %XMM0,(%R15)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVSD 0x68(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VADDSD (%R14),%XMM0,%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	0	0	2	0.50	scal (12.5%)
VMOVSD %XMM0,(%R14)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
VMOVSD 0x60(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VADDSD (%RBX),%XMM0,%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0.50	0.50	0	0	2	0.50	scal (12.5%)
VMOVSD %XMM0,(%RBX)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	1	0.50	scal (12.5%)
CALL 2596c0 <@plt_start@+0x570>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
JMP 23e04a <_Z13field_summaryR16global_variablesR9parallel_.omp_outlined+0xfaa>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
VMOVSD 0x80(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD (%R13),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
VMOVSD 0x78(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD (%R12),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
VMOVSD 0x70(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD (%R15),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
VMOVSD 0x68(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD (%R14),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
VMOVSD 0x60(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
VMOVSD (%RBX),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
LEA -0x28(%RBP),%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
INT $0x3																				N/A
INT $0x3																				N/A
INT $0x3																				N/A
INT $0x3																				N/A
INT $0x3																				N/A
INT $0x3																				N/A
INT $0x3																				N/A

Name	Coverage (%)	Time (s)
▼field_summary(global_variables&, parallel_&) [clone .omp_outlined]–	0.29	0.11
○Loop 208 - field_summary.cpp:76-91 - exec	0.29	0.11
○Loop 206 - field_summary.cpp:75-75 - exec	0.00	0.00
○Loop 205 - field_summary.cpp:75-75 - exec	0.00	0.00
○Loop 204 - field_summary.cpp:75-75 - exec	0.00	0.00
○Loop 207 - field_summary.cpp:76-91 - exec	0.00	0.00
○Loop 202 - field_summary.cpp:75-75 - exec	0.00	0.00
○Loop 203 - field_summary.cpp:75-75 - exec	0.00	0.00

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512-bits vectorization

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Matching between your function (in the source code) and the binary function

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ASM code

Code clean check

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Vectorization

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Execution units bottlenecks

512-bits vectorization

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CALL instructions

Details

Complex instructions

Details

Vector unaligned load/store instructions

Details

Workaround

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code