OV - exec - Function viscosity_kernel(int, int, int, int, clover::Buffer1D<double>&, clover::Buffer1D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&) [clone ._omp

	Function: viscosity_kernel(int, int, int, int, clover::Buffer1D<double>&, clover::Buffer1D<double>&, ...	Module: exec	Source: :0-0	Coverage (incl. loops): 2.15% \| (excl. loops): 0.00%

  ***  This Panel is Intentionally Left Blank.  ***

It is due to a lack of debug symbols in the given object
(loop or function).

0x442ff0 PUSH	%R15

0x442ff2 PUSH	%R14

0x442ff4 PUSH	%R13

0x442ff6 PUSH	%R12

0x442ff8 PUSH	%RBP

0x442ff9 PUSH	%RBX

0x442ffa SUB	$0x128,%RSP

0x443001 MOV	0x40(%RDI),%EAX

0x443004 MOV	0x38(%RDI),%ESI

0x443007 LEA	0x1(%RAX),%R12D

0x44300b MOV	0x44(%RDI),%EAX

0x44300e LEA	0x1(%RSI),%ECX

0x443011 MOV	0x3c(%RDI),%ESI

0x443014 MOV	%ECX,0xec(%RSP)

0x44301b ADD	$0x2,%EAX

0x44301e MOV	%EAX,0xe8(%RSP)

0x443025 CMP	%EAX,%R12D

0x443028 JGE	443630

0x44302e MOV	%EAX,%EBP

0x443030 LEA	0x2(%RSI),%R14D

0x443034 SUB	%R12D,%EBP

0x443037 CMP	%R14D,%ECX

0x44303a JGE	443630

0x443040 MOV	%R14D,%R15D

0x443043 MOV	%RDI,%RBX

0x443046 SUB	%ECX,%R15D

0x443049 IMUL	%R15D,%EBP

0x44304d MOV	%R15D,0xf0(%RSP)

0x443055 CALL	404660 <omp_get_num_threads@plt>

0x44305a MOV	%EAX,%R13D

0x44305d CALL	404550 <omp_get_thread_num@plt>

0x443062 XOR	%EDX,%EDX

0x443064 MOV	%EAX,%ECX

0x443066 MOV	%EBP,%EAX

0x443068 DIV	%R13D

0x44306b MOV	%EAX,%EBP

0x44306d CMP	%EDX,%ECX

0x44306f JB	4436ce

0x443075 IMUL	%EBP,%ECX

0x443078 ADD	%EDX,%ECX

0x44307a LEA	(%RBP,%RCX,1),%EAX

0x44307e MOV	%EAX,0xf4(%RSP)

0x443085 CMP	%EAX,%ECX

0x443087 JAE	443630

0x44308d XOR	%EDX,%EDX

0x44308f MOV	%ECX,%EAX

0x443091 MOV	0xec(%RSP),%ESI

0x443098 MOV	0x18(%RBX),%R8

0x44309c DIVL	0xf0(%RSP)

0x4430a3 MOV	%R8,%R9

0x4430a6 LEA	(%RDX,%RSI,1),%R13D

0x4430aa MOV	0x28(%RBX),%RSI

0x4430ae MOV	%R14D,%EDX

0x4430b1 ADD	%R12D,%EAX

0x4430b4 SUB	%R13D,%EDX

0x4430b7 MOVSXD	%EAX,%R11

0x4430ba MOV	%RSI,0xf8(%RSP)

0x4430c2 MOV	0x30(%RBX),%RSI

0x4430c6 CMP	%EDX,%EBP

0x4430c8 CMOVBE	%EBP,%EDX

0x4430cb MOV	%RSI,0x100(%RSP)

0x4430d3 MOV	(%RBX),%RSI

0x4430d6 LEA	(%RCX,%RDX,1),%EAX

0x4430d9 MOV	%EDX,%R12D

0x4430dc MOV	%RSI,0x108(%RSP)

0x4430e4 MOV	0x8(%RBX),%RSI

0x4430e8 MOV	%RSI,0x110(%RSP)

0x4430f0 MOV	0x10(%RBX),%RSI

0x4430f4 MOV	%RSI,0xe0(%RSP)

0x4430fc MOV	0x20(%RBX),%RSI

0x443100 MOV	%RSI,0x118(%RSP)

0x443108 CMP	%EAX,%ECX

0x44310a JAE	443699

  (712) 0x443110 MOV	0xf8(%RSP),%RCX

  (712) 0x443118 LEA	0x2(%R11),%EDX

  (712) 0x44311c SUB	$0x1,%R12D

  (712) 0x443120 LEA	0x1(%R11),%R10

  (712) 0x443124 MOV	0x100(%RSP),%RDI

  (712) 0x44312c MOVSXD	%EDX,%RDX

  (712) 0x44312f MOV	%EAX,0xcc(%RSP)

  (712) 0x443136 MOV	0x10(%RCX),%RBX

  (712) 0x44313a MOV	(%RCX),%R15

  (712) 0x44313d MOV	%R9,0xd0(%RSP)

  (712) 0x443145 MOV	0x10(%RDI),%RCX

  (712) 0x443149 MOV	(%RDI),%RDI

  (712) 0x44314c MOV	%R11,0xc0(%RSP)

  (712) 0x443154 MOV	%R15,%RBP

  (712) 0x443157 MOV	%R10,0xd8(%RSP)

  (712) 0x44315f MOV	%RDI,(%RSP)

  (712) 0x443163 MOV	%RDI,%RSI

  (712) 0x443166 MOV	0x108(%RSP),%RDI

  (712) 0x44316e IMUL	%R11,%RBP

  (712) 0x443172 IMUL	%R10,%RSI

  (712) 0x443176 MOV	%RCX,0x8(%RSP)

  (712) 0x44317b MOV	(%R9),%RCX

  (712) 0x44317e MOV	0x8(%RDI),%RDI

  (712) 0x443182 ADD	%RBP,%R15

  (712) 0x443185 LEA	(,%RCX,8),%R8

  (712) 0x44318d MOV	%RDI,0x90(%RSP)

  (712) 0x443195 MOV	0x110(%RSP),%RDI

  (712) 0x44319d IMUL	%R11,%RCX

  (712) 0x4431a1 MOV	0x8(%RDI),%R14

  (712) 0x4431a5 LEA	(%R14,%R11,8),%RDI

  (712) 0x4431a9 LEA	(%R14,%RDX,8),%R14

  (712) 0x4431ad MOV	(%RSP),%RDX

  (712) 0x4431b1 MOV	%R14,0x80(%RSP)

  (712) 0x4431b9 MOVSXD	%R13D,%R14

  (712) 0x4431bc LEA	0x1(%R14),%R13

  (712) 0x4431c0 MOV	%RDI,0x88(%RSP)

  (712) 0x4431c8 MOV	0x10(%R9),%RDI

  (712) 0x4431cc ADD	%R13,%R12

  (712) 0x4431cf MOV	%R13,%RAX

  (712) 0x4431d2 MOV	%R12,0xa8(%RSP)

  (712) 0x4431da LEA	(%RBX,%RBP,8),%R12

  (712) 0x4431de MOV	%R12,0x98(%RSP)

  (712) 0x4431e6 LEA	(%RBX,%R15,8),%R12

  (712) 0x4431ea MOV	%R8,%R15

  (712) 0x4431ed MOV	0x8(%RSP),%RBX

  (712) 0x4431f2 IMUL	%R10,%R15

  (712) 0x4431f6 LEA	(%RBX,%RSI,8),%RBP

  (712) 0x4431fa SUB	%RDX,%RSI

  (712) 0x4431fd LEA	(%RBX,%RSI,8),%RSI

  (712) 0x443201 LEA	(%RDI,%RCX,8),%RBX

  (712) 0x443205 MOV	%RBP,%R13

  (712) 0x443208 MOV	%RSI,0xb0(%RSP)

  (712) 0x443210 LEA	-0x1(%R11),%ESI

  (712) 0x443214 ADD	%RDI,%R15

  (712) 0x443217 MOV	%RBX,%RBP

  (712) 0x44321a MOVSXD	%ESI,%RSI

  (712) 0x44321d MOV	%R14,%RBX

  (712) 0x443220 MOV	%RAX,%R14

  (712) 0x443223 IMUL	%R8,%RSI

  (712) 0x443227 LEA	(%RDI,%RSI,1),%RCX

  (712) 0x44322b MOV	%RCX,0xb8(%RSP)

  (712) 0x443233 MOV	0x118(%RSP),%RCX

  (712) 0x44323b MOV	(%RCX),%RDI

  (712) 0x44323e MOV	0x10(%RCX),%RSI

  (712) 0x443242 IMUL	%R11,%RDI

  (712) 0x443246 LEA	(%RSI,%RDI,8),%RSI

  (712) 0x44324a MOV	%RSI,0xa0(%RSP)

  (712) 0x443252 JMP	44327a

0x443254 NOPL	(%RAX)

    (713) 0x443258 MOV	0xa0(%RSP),%RAX

    (713) 0x443260 MOVSD	%XMM0,(%RAX,%RBX,8)

    (713) 0x443265 MOV	%R14,%RBX

    (713) 0x443268 CMP	%R14,0xa8(%RSP)

    (713) 0x443270 JE	443648

    (713) 0x443276 ADD	$0x1,%R14

    (713) 0x44327a MOV	0x98(%RSP),%RAX

    (713) 0x443282 MOVSD	0x8(%R12,%RBX,8),%XMM2

    (713) 0x443289 MOVSD	(%R12,%RBX,8),%XMM15

    (713) 0x44328f MOVSD	(%R13,%RBX,8),%XMM10

    (713) 0x443296 MOVSD	0x8(%RAX,%RBX,8),%XMM13

    (713) 0x44329d MOVSD	(%RAX,%RBX,8),%XMM14

    (713) 0x4432a3 MOVSD	%XMM2,0x70(%RSP)

    (713) 0x4432a9 MOV	0xb0(%RSP),%RAX

    (713) 0x4432b1 MOVSD	0x8(%R13,%RBX,8),%XMM3

    (713) 0x4432b8 MOVAPD	%XMM10,%XMM7

    (713) 0x4432bd MOVSD	%XMM15,0x60(%RSP)

    (713) 0x4432c4 MOVAPD	%XMM13,%XMM1

    (713) 0x4432c9 MOVAPD	%XMM14,%XMM0

    (713) 0x4432ce MOV	0x88(%RSP),%RDX

    (713) 0x4432d6 MOVSD	0x8(%RBP,%RBX,8),%XMM5

    (713) 0x4432dc ADDSD	%XMM15,%XMM0

    (713) 0x4432e1 ADDSD	%XMM2,%XMM1

    (713) 0x4432e5 MOVSD	(%RAX,%RBX,8),%XMM11

    (713) 0x4432eb MOVSD	0x8(%RAX,%RBX,8),%XMM12

    (713) 0x4432f2 ADDSD	%XMM3,%XMM7

    (713) 0x4432f6 MOV	0x90(%RSP),%RAX

    (713) 0x4432fe SUBSD	-0x8(%RBP,%RBX,8),%XMM5

    (713) 0x443304 MOVSD	%XMM13,0x78(%RSP)

    (713) 0x44330b MOVSD	(%R15,%RBX,8),%XMM4

    (713) 0x443311 MOVSD	%XMM14,0x68(%RSP)

    (713) 0x443318 SUBSD	%XMM0,%XMM1

    (713) 0x44331c MOVAPD	%XMM11,%XMM0

    (713) 0x443321 MOVSD	%XMM10,0x58(%RSP)

    (713) 0x443328 ADDSD	%XMM12,%XMM0

    (713) 0x44332d MOVAPD	%XMM7,%XMM6

    (713) 0x443331 MOVSD	(%RDX),%XMM7

    (713) 0x443335 MOVSD	%XMM3,0x50(%RSP)

    (713) 0x44333b MOVSD	%XMM11,0x48(%RSP)

    (713) 0x443342 MOVSD	%XMM12,0x40(%RSP)

    (713) 0x443349 SUBSD	%XMM0,%XMM6

    (713) 0x44334d MOVSD	%XMM1,(%RSP)

    (713) 0x443352 MOVSD	%XMM6,0x8(%RSP)

    (713) 0x443358 MOVSD	(%RAX,%RBX,8),%XMM6

    (713) 0x44335d MOVAPD	%XMM6,%XMM0

    (713) 0x443361 ADDSD	0x8(%RAX,%RBX,8),%XMM0

    (713) 0x443367 MOVSD	%XMM6,0x38(%RSP)

    (713) 0x44336d MOV	0xb8(%RSP),%RAX

    (713) 0x443375 SUBSD	(%RAX,%RBX,8),%XMM4

    (713) 0x44337a MOV	0x80(%RSP),%RAX

    (713) 0x443382 MOVSD	%XMM7,0x30(%RSP)

    (713) 0x443388 DIVSD	%XMM0,%XMM5

    (713) 0x44338c MOVAPD	%XMM7,%XMM0

    (713) 0x443390 MOVSD	0x1210(%RIP),%XMM1

    (713) 0x443398 ADDSD	(%RAX),%XMM0

    (713) 0x44339c DIVSD	%XMM0,%XMM4

    (713) 0x4433a0 MOVAPD	%XMM5,%XMM9

    (713) 0x4433a5 MOVSD	%XMM5,0x28(%RSP)

    (713) 0x4433ab MULSD	%XMM5,%XMM9

    (713) 0x4433b0 MOVAPD	%XMM9,%XMM0

    (713) 0x4433b5 MOVSD	%XMM9,0x18(%RSP)

    (713) 0x4433bc MOVAPD	%XMM4,%XMM5

    (713) 0x4433c0 MOVSD	%XMM4,0x20(%RSP)

    (713) 0x4433c6 MULSD	%XMM4,%XMM5

    (713) 0x4433ca ADDSD	%XMM5,%XMM0

    (713) 0x4433ce MOVSD	%XMM5,0x10(%RSP)

    (713) 0x4433d4 CALL	4043d0 <fmax@plt>

    (713) 0x4433d9 MOVSD	0x60(%RSP),%XMM15

    (713) 0x4433e0 MOVSD	0x70(%RSP),%XMM2

    (713) 0x4433e6 MOVSD	0x40(%RSP),%XMM12

    (713) 0x4433ed MOVSD	0x50(%RSP),%XMM3

    (713) 0x4433f3 ADDSD	%XMM15,%XMM2

    (713) 0x4433f8 MOVSD	0x68(%RSP),%XMM14

    (713) 0x4433ff MOVSD	0x48(%RSP),%XMM11

    (713) 0x443406 ADDSD	%XMM12,%XMM3

    (713) 0x44340b MOVSD	0x78(%RSP),%XMM13

    (713) 0x443412 MOVSD	0x58(%RSP),%XMM10

    (713) 0x443419 MOVSD	0x30(%RSP),%XMM7

    (713) 0x44341f MOVSD	0x38(%RSP),%XMM6

    (713) 0x443425 SUBSD	%XMM14,%XMM2

    (713) 0x44342a MOVSD	0x1556(%RIP),%XMM1

    (713) 0x443432 MULSD	(%RSP),%XMM1

    (713) 0x443437 SUBSD	%XMM11,%XMM3

    (713) 0x44343c MOVSD	0x28(%RSP),%XMM5

    (713) 0x443442 MOVSD	0x18(%RSP),%XMM9

    (713) 0x443449 MOVSD	0x10(%RSP),%XMM8

    (713) 0x443450 MOVSD	0x20(%RSP),%XMM4

    (713) 0x443456 SUBSD	%XMM13,%XMM2

    (713) 0x44345b MULSD	0x1525(%RIP),%XMM2

    (713) 0x443463 SUBSD	%XMM10,%XMM3

    (713) 0x443468 MULSD	0x1518(%RIP),%XMM3

    (713) 0x443470 DIVSD	%XMM6,%XMM1

    (713) 0x443474 DIVSD	%XMM6,%XMM3

    (713) 0x443478 MULSD	%XMM9,%XMM1

    (713) 0x44347d DIVSD	%XMM7,%XMM2

    (713) 0x443481 ADDSD	%XMM3,%XMM2

    (713) 0x443485 MOVSD	0x14fb(%RIP),%XMM3

    (713) 0x44348d MULSD	0x8(%RSP),%XMM3

    (713) 0x443493 MULSD	%XMM5,%XMM2

    (713) 0x443497 DIVSD	%XMM7,%XMM3

    (713) 0x44349b MULSD	%XMM4,%XMM2

    (713) 0x44349f MULSD	%XMM8,%XMM3

    (713) 0x4434a4 ADDSD	%XMM3,%XMM1

    (713) 0x4434a8 ADDSD	%XMM1,%XMM2

    (713) 0x4434ac PXOR	%XMM1,%XMM1

    (713) 0x4434b0 DIVSD	%XMM0,%XMM2

    (713) 0x4434b4 PXOR	%XMM0,%XMM0

    (713) 0x4434b8 COMISD	%XMM1,%XMM2

    (713) 0x4434bc JA	443258

    (713) 0x4434c2 MOVSD	(%RSP),%XMM1

    (713) 0x4434c7 MOVSD	0x8(%RSP),%XMM3

    (713) 0x4434cd MOVSD	%XMM4,0x18(%RSP)

    (713) 0x4434d3 PXOR	%XMM4,%XMM4

    (713) 0x4434d7 MOVSD	%XMM2,0x20(%RSP)

    (713) 0x4434dd MULSD	%XMM6,%XMM1

    (713) 0x4434e1 MOVSD	%XMM6,0x10(%RSP)

    (713) 0x4434e7 MULSD	%XMM7,%XMM3

    (713) 0x4434eb MOVSD	%XMM7,(%RSP)

    (713) 0x4434f0 ADDSD	%XMM3,%XMM1

    (713) 0x4434f4 COMISD	%XMM4,%XMM1

    (713) 0x4434f8 JAE	443258

    (713) 0x4434fe MOVAPD	%XMM5,%XMM0

    (713) 0x443502 MOVSD	0x109e(%RIP),%XMM1

    (713) 0x44350a ANDPD	0x16de(%RIP),%XMM0

    (713) 0x443512 MOVSD	%XMM5,0x8(%RSP)

    (713) 0x443518 CALL	4043d0 <fmax@plt>

    (713) 0x44351d MOVSD	0x8(%RSP),%XMM5

    (713) 0x443523 PXOR	%XMM6,%XMM6

    (713) 0x443527 MOVSD	(%RSP),%XMM7

    (713) 0x44352c MOVSD	0x18(%RSP),%XMM4

    (713) 0x443532 MOVSD	0x20(%RSP),%XMM2

    (713) 0x443538 MOVAPD	%XMM0,%XMM3

    (713) 0x44353c COMISD	%XMM5,%XMM6

    (713) 0x443540 MOVSD	0x10(%RSP),%XMM6

    (713) 0x443546 JA	4436a8

    (713) 0x44354c MOV	0x1cdd(%RIP),%RAX

    (713) 0x443553 MOV	%RAX,(%RSP)

    (713) 0x443557 ANDPD	0x1691(%RIP),%XMM4

    (713) 0x44355f MOVSD	0x1041(%RIP),%XMM1

    (713) 0x443567 MOVSD	%XMM2,0x18(%RSP)

    (713) 0x44356d MOVSD	%XMM3,0x20(%RSP)

    (713) 0x443573 MOVAPD	%XMM4,%XMM0

    (713) 0x443577 MOVSD	%XMM7,0x10(%RSP)

    (713) 0x44357d MOVSD	%XMM6,0x8(%RSP)

    (713) 0x443583 CALL	4043d0 <fmax@plt>

    (713) 0x443588 MOVSD	(%RSP),%XMM1

    (713) 0x44358d MOVSD	0x20(%RSP),%XMM3

    (713) 0x443593 MOVSD	0x10(%RSP),%XMM7

    (713) 0x443599 MOVSD	0x8(%RSP),%XMM6

    (713) 0x44359f MULSD	%XMM0,%XMM1

    (713) 0x4435a3 MOVAPD	%XMM3,%XMM0

    (713) 0x4435a7 MULSD	%XMM3,%XMM0

    (713) 0x4435ab MOVAPD	%XMM1,%XMM4

    (713) 0x4435af MULSD	%XMM1,%XMM4

    (713) 0x4435b3 ADDSD	%XMM4,%XMM0

    (713) 0x4435b7 SQRTSD	%XMM0,%XMM0

    (713) 0x4435bb MULSD	%XMM0,%XMM7

    (713) 0x4435bf MULSD	%XMM0,%XMM6

    (713) 0x4435c3 DIVSD	%XMM1,%XMM7

    (713) 0x4435c7 DIVSD	%XMM3,%XMM6

    (713) 0x4435cb ANDPD	0x161d(%RIP),%XMM7

    (713) 0x4435d3 MOVAPD	%XMM7,%XMM1

    (713) 0x4435d7 ANDPD	0x1611(%RIP),%XMM6

    (713) 0x4435df MOVAPD	%XMM6,%XMM0

    (713) 0x4435e3 CALL	4041a0 <fmin@plt>

    (713) 0x4435e8 MOV	0xe0(%RSP),%RAX

    (713) 0x4435f0 MOV	0xc0(%RSP),%RSI

    (713) 0x4435f8 MULSD	%XMM0,%XMM0

    (713) 0x4435fc MOVSD	0x18(%RSP),%XMM2

    (713) 0x443602 IMUL	(%RAX),%RSI

    (713) 0x443606 MOV	0x10(%RAX),%RDI

    (713) 0x44360a ADD	%RBX,%RSI

    (713) 0x44360d MOVSD	(%RDI,%RSI,8),%XMM1

    (713) 0x443612 ADDSD	%XMM1,%XMM1

    (713) 0x443616 MULSD	%XMM0,%XMM1

    (713) 0x44361a MULSD	%XMM2,%XMM1

    (713) 0x44361e MULSD	%XMM2,%XMM1

    (713) 0x443622 MOVAPD	%XMM1,%XMM0

    (713) 0x443626 JMP	443258

0x44362b NOPL	(%RAX,%RAX,1)

0x443630 ADD	$0x128,%RSP

0x443637 POP	%RBX

0x443638 POP	%RBP

0x443639 POP	%R12

0x44363b POP	%R13

0x44363d POP	%R14

0x44363f POP	%R15

0x443641 RET

0x443642 NOPW	(%RAX,%RAX,1)

  (712) 0x443648 MOV	0xcc(%RSP),%EAX

  (712) 0x44364f MOV	0xd0(%RSP),%R9

  (712) 0x443657 MOV	0xd8(%RSP),%R10

  (712) 0x44365f MOV	%R10,%R11

  (712) 0x443662 CMP	%R10D,0xe8(%RSP)

  (712) 0x44366a JLE	443630

  (712) 0x44366c MOV	0xf4(%RSP),%EBP

  (712) 0x443673 MOV	0xf0(%RSP),%EDX

  (712) 0x44367a MOV	%EAX,%ECX

  (712) 0x44367c MOV	0xec(%RSP),%R13D

  (712) 0x443684 SUB	%EAX,%EBP

  (712) 0x443686 CMP	%EDX,%EBP

  (712) 0x443688 CMOVBE	%EBP,%EDX

  (712) 0x44368b LEA	(%RCX,%RDX,1),%EAX

  (712) 0x44368e MOV	%EDX,%R12D

  (712) 0x443691 CMP	%EAX,%ECX

  (712) 0x443693 JB	443110

(714) 0x443699 MOV	%ECX,%EAX

(714) 0x44369b LEA	0x1(%R11),%R10

(714) 0x44369f JMP	44365f

0x4436a1 NOPL	(%RAX)

    (713) 0x4436a8 PXOR	%XMM5,%XMM5

    (713) 0x4436ac XORPD	0x267c(%RIP),%XMM0

    (713) 0x4436b4 COMISD	%XMM5,%XMM3

    (713) 0x4436b8 MOVAPD	%XMM0,%XMM3

    (713) 0x4436bc JBE	4436d8

    (713) 0x4436be MOV	0xedb(%RIP),%RAX

    (713) 0x4436c5 MOV	%RAX,(%RSP)

    (713) 0x4436c9 JMP	443557

0x4436ce ADD	$0x1,%EBP

0x4436d1 XOR	%EDX,%EDX

0x4436d3 JMP	443075

    (713) 0x4436d8 MOVSD	0x1b50(%RIP),%XMM5

    (713) 0x4436e0 MOVSD	%XMM5,(%RSP)

    (713) 0x4436e5 JMP	443557

0x4436ea NOPW	(%RAX,%RAX,1)

Coverage (%)	Name	Source Location	Module
►96.76+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	start_thread		libc.so.6
○	__GI___clone3		libc.so.6
►3.18+	GOMP_parallel	libgomp.h:982	libgomp.so.1.0.0
○	viscosity(global_variables&)		exec
○	timestep(global_variables&, pa[...]		exec
○	hydro(global_variables&, paral[...]		exec
○	main		exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start		exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_0

Source file and lines
Module	exec

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is not vectorized. Only 8% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 12.00 to 0.75 cycles (16.00x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA)

Execution units bottlenecks

Performance is limited by execution of divide and square root operations (the divide/square root unit is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 12.00 to 11.13 cycles (1.08x speedup).

Workaround

Reduce the number of division or square root instructions:

If denominator is constant over iterations, use reciprocal (replace x/y with x*(1/y)). Check precision impact.

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 12.00 to 10.88 cycles (1.10x speedup).

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

omp_get_num_threads@plt: 1 occurrences►
omp_get_thread_num@plt: 1 occurrences►

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVBE: 1 occurrences►
DIV: 2 occurrences►

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 80 bytes. The binary function is storing 64 bytes.

General properties

nb instructions	89
nb uops	89
loop length	344
used x86 registers	15
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	10

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	11.13 cycles
front end	11.13 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	6.50	6.50	6.50	6.50	6.50	6.50	6.25	6.25	6.25	6.25	0.00	0.00	0.00	0.00	0.00	0.00
cycles	6.50	6.50	6.50	6.50	6.50	6.50	6.25	6.25	6.25	6.25	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

12.00

Cycles summary

Front-end	11.13
Dispatch	6.50
DIV/SQRT	12.00
Overall L1	12.00

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	0%

Vector efficiency ratios

all	8%
load	9%
store	10%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	6%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	6%
other	6%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 12.00 cycles. At this rate:

2% of peak load performance is reached (6.67 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
4% of peak store performance is reached (5.33 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 442ff0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	Latency	Recip. throughput	Vectorization
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x128,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV 0x40(%RDI),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x38(%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
LEA 0x1(%RAX),%R12D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV 0x44(%RDI),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
LEA 0x1(%RSI),%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV 0x3c(%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %ECX,0xec(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
ADD $0x2,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %EAX,0xe8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
CMP %EAX,%R12D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JGE 443630 <_Z16viscosity_kerneliiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_._omp_fn.0+0x640>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV %EAX,%EBP	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA 0x2(%RSI),%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
SUB %R12D,%EBP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %R14D,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JGE 443630 <_Z16viscosity_kerneliiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_._omp_fn.0+0x640>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV %R14D,%R15D	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV %RDI,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %ECX,%R15D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
IMUL %R15D,%EBP	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	N/A
MOV %R15D,0xf0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
CALL 404660 <omp_get_num_threads@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
MOV %EAX,%R13D	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
CALL 404550 <omp_get_thread_num@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %EAX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %EBP,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
DIV %R13D	2	0	0	0	2	0	0	0	0	0	0	10-17	6	scal (6.3%)
MOV %EAX,%EBP	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %EDX,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JB 4436ce <_Z16viscosity_kerneliiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_._omp_fn.0+0x6de>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
IMUL %EBP,%ECX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	N/A
ADD %EDX,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA (%RBP,%RCX,1),%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %EAX,0xf4(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
CMP %EAX,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JAE 443630 <_Z16viscosity_kerneliiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_._omp_fn.0+0x640>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %ECX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0xec(%RSP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x18(%RBX),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
DIVL 0xf0(%RSP)	2	0	0	0	2	0	0	0.25	0.25	0.25	0.25	10-17	6	scal (6.3%)
MOV %R8,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
LEA (%RDX,%RSI,1),%R13D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV 0x28(%RBX),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %R14D,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %R12D,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
SUB %R13D,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOVSXD %EAX,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
MOV %RSI,0xf8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x30(%RBX),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP %EDX,%EBP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
CMOVBE %EBP,%EDX	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	1	0.33	N/A
MOV %RSI,0x100(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%RBX),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
LEA (%RCX,%RDX,1),%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %EDX,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV %RSI,0x108(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x8(%RBX),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RSI,0x110(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RBX),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RSI,0xe0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x20(%RBX),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RSI,0x118(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
CMP %EAX,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JAE 443699 <_Z16viscosity_kerneliiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_._omp_fn.0+0x6a9>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
ADD $0x128,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
ADD $0x1,%EBP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 443075 <_Z16viscosity_kerneliiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_._omp_fn.0+0x85>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_0

Source file and lines
Module	exec

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA)

Execution units bottlenecks

Workaround

Reduce the number of division or square root instructions:

If denominator is constant over iterations, use reciprocal (replace x/y with x*(1/y)). Check precision impact.

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 12.00 to 10.88 cycles (1.10x speedup).

CALL instructions

Detected function call instructions.

Details

omp_get_num_threads@plt: 1 occurrences►
omp_get_thread_num@plt: 1 occurrences►

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVBE: 1 occurrences►
DIV: 2 occurrences►

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 80 bytes. The binary function is storing 64 bytes.

General properties

nb instructions	89
nb uops	89
loop length	344
used x86 registers	15
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	10

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	11.13 cycles
front end	11.13 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	6.50	6.50	6.50	6.50	6.50	6.50	6.25	6.25	6.25	6.25	0.00	0.00	0.00	0.00	0.00	0.00
cycles	6.50	6.50	6.50	6.50	6.50	6.50	6.25	6.25	6.25	6.25	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

12.00

Cycles summary

Front-end	11.13
Dispatch	6.50
DIV/SQRT	12.00
Overall L1	12.00

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	0%
other	0%

Vector efficiency ratios

all	8%
load	9%
store	10%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	6%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	6%
other	6%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 12.00 cycles. At this rate:

2% of peak load performance is reached (6.67 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
4% of peak store performance is reached (5.33 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 442ff0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	Latency	Recip. throughput	Vectorization
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x128,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV 0x40(%RDI),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x38(%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
LEA 0x1(%RAX),%R12D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV 0x44(%RDI),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
LEA 0x1(%RSI),%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV 0x3c(%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %ECX,0xec(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
ADD $0x2,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV %EAX,0xe8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
CMP %EAX,%R12D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JGE 443630 <_Z16viscosity_kerneliiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_._omp_fn.0+0x640>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV %EAX,%EBP	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA 0x2(%RSI),%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
SUB %R12D,%EBP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %R14D,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JGE 443630 <_Z16viscosity_kerneliiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_._omp_fn.0+0x640>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV %R14D,%R15D	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV %RDI,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %ECX,%R15D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
IMUL %R15D,%EBP	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	N/A
MOV %R15D,0xf0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
CALL 404660 <omp_get_num_threads@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
MOV %EAX,%R13D	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
CALL 404550 <omp_get_thread_num@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %EAX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %EBP,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
DIV %R13D	2	0	0	0	2	0	0	0	0	0	0	10-17	6	scal (6.3%)
MOV %EAX,%EBP	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %EDX,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JB 4436ce <_Z16viscosity_kerneliiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_._omp_fn.0+0x6de>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
IMUL %EBP,%ECX	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	N/A
ADD %EDX,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA (%RBP,%RCX,1),%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %EAX,0xf4(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
CMP %EAX,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JAE 443630 <_Z16viscosity_kerneliiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_._omp_fn.0+0x640>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV %ECX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0xec(%RSP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x18(%RBX),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
DIVL 0xf0(%RSP)	2	0	0	0	2	0	0	0.25	0.25	0.25	0.25	10-17	6	scal (6.3%)
MOV %R8,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
LEA (%RDX,%RSI,1),%R13D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV 0x28(%RBX),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %R14D,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD %R12D,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
SUB %R13D,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOVSXD %EAX,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
MOV %RSI,0xf8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x30(%RBX),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP %EDX,%EBP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
CMOVBE %EBP,%EDX	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	1	0.33	N/A
MOV %RSI,0x100(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%RBX),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
LEA (%RCX,%RDX,1),%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %EDX,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOV %RSI,0x108(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x8(%RBX),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RSI,0x110(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RBX),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RSI,0xe0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x20(%RBX),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RSI,0x118(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
CMP %EAX,%ECX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JAE 443699 <_Z16viscosity_kerneliiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_._omp_fn.0+0x6a9>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
ADD $0x128,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
ADD $0x1,%EBP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
JMP 443075 <_Z16viscosity_kerneliiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_._omp_fn.0+0x85>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼viscosity_kernel(int, int, int, int, clover::Buffer1D&, clover::Buffer1D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&) [clone ._omp_fn.0]–	2.15	0.83
▼Loop 714 - - exec–	0.00	0.00
▼Loop 712 - - exec–	0.00	0.01
○Loop 713 - - exec	2.15	0.82

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Expensive FP math instructions/calls

CALL instructions

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Complex instructions

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Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code