OV - exec - Function generate_chunk(int, global_variables&) [clone .extracted.9]

	Function: generate_chunk(int, global_variables&) [clone .extracted.9]	Module: exec	Source: :0-0	Coverage (incl. loops): 0.03% \| (excl. loops): 0.00%

  ***  This Panel is Intentionally Left Blank.  ***

It is due to a lack of debug symbols in the given object
(loop or function).

0x431820 PUSH	%RBP

0x431821 PUSH	%R15

0x431823 PUSH	%R14

0x431825 PUSH	%R13

0x431827 PUSH	%R12

0x431829 PUSH	%RBX

0x43182a SUB	$0xe8,%RSP

0x431831 MOV	0x138(%RSP),%RAX

0x431839 MOV	0x128(%RSP),%R13

0x431841 MOV	0x120(%RSP),%R12

0x431849 MOVL	$0,0x1c(%RSP)

0x431851 TEST	%RAX,%RAX

0x431854 JS	431dfc

0x43185a MOV	%R9,%RBX

0x43185d MOV	%R8,%R14

0x431860 MOV	%RDX,%R15

0x431863 MOV	%RCX,0x10(%RSP)

0x431868 MOV	(%RDI),%EBP

0x43186a MOVQ	$0,0x28(%RSP)

0x431873 MOV	%RAX,0x20(%RSP)

0x431878 MOVQ	$0x1,0x78(%RSP)

0x431881 SUB	$0x8,%RSP

0x431885 LEA	0x80(%RSP),%RAX

0x43188d LEA	0x24(%RSP),%RCX

0x431892 LEA	0x30(%RSP),%R8

0x431897 LEA	0x28(%RSP),%R9

0x43189c MOV	$0x47d170,%EDI

0x4318a1 MOV	%EBP,%ESI

0x4318a3 MOV	$0x22,%EDX

0x4318a8 PUSH	$0x1

0x4318aa PUSH	$0x1

0x4318ac PUSH	%RAX

0x4318ad CALL	4031e0 <__kmpc_for_static_init_8@plt>

0x4318b2 ADD	$0x20,%RSP

0x4318b6 MOV	0x28(%RSP),%RSI

0x4318bb MOV	0x20(%RSP),%RDI

0x4318c0 MOV	%RDI,%RAX

0x4318c3 SUB	%RSI,%RAX

0x4318c6 JB	431ddf

0x4318cc MOV	%EBP,0x4(%RSP)

0x4318d0 MOV	0x40(%R12),%R8

0x4318d5 MOV	0x30(%R12),%R9

0x4318da MOV	(%R12),%R10

0x4318de MOV	0x10(%R12),%R11

0x4318e3 MOV	0xb8(%R12),%RCX

0x4318eb MOV	%RCX,0x8(%RSP)

0x4318f0 MOV	0xa8(%R12),%RCX

0x4318f8 MOV	0xe8(%R12),%RDX

0x431900 MOV	0xd8(%R12),%R12

0x431908 MOV	0x10(%RSP),%RBP

0x43190d MOVQ	(%RBP),%XMM1

0x431912 INC	%RAX

0x431915 MOV	%RAX,0x58(%RSP)

0x43191a AND	$-0x4,%RAX

0x43191e MOV	%RDX,0x10(%RSP)

0x431923 MOV	%RCX,0x70(%RSP)

0x431928 MOV	%R12,0x68(%RSP)

0x43192d JE	431e0e

0x431933 MOV	%RAX,0x30(%RSP)

0x431938 DEC	%RAX

0x43193b MOV	%RAX,0x60(%RSP)

0x431940 MOVQ	%R13,%XMM0

0x431945 PSHUFD	$0x44,%XMM0,%XMM8

0x43194b MOV	%R9,0x48(%RSP)

0x431950 MOVQ	%R9,%XMM0

0x431955 PSHUFD	$0x44,%XMM0,%XMM13

0x43195b MOV	%R8,0x50(%RSP)

0x431960 MOVQ	%R8,%XMM0

0x431965 PSHUFD	$0x44,%XMM0,%XMM0

0x43196a MOVDQA	%XMM0,0xd0(%RSP)

0x431973 MOVDQA	%XMM1,0x80(%RSP)

0x43197c PUNPCKLQDQ	%XMM1,%XMM1

0x431980 MOVDQA	%XMM1,0xc0(%RSP)

0x431989 MOV	%R10,0x40(%RSP)

0x43198e MOVQ	%R10,%XMM0

0x431993 PSHUFD	$0x44,%XMM0,%XMM12

0x431999 MOV	%R11,0x38(%RSP)

0x43199e MOVQ	%R11,%XMM0

0x4319a3 PSHUFD	$0x44,%XMM0,%XMM0

0x4319a8 MOVDQA	%XMM0,0xb0(%RSP)

0x4319b1 MOVQ	%RCX,%XMM0

0x4319b6 PSHUFD	$0x44,%XMM0,%XMM14

0x4319bc MOVQ	0x8(%RSP),%XMM0

0x4319c2 PSHUFD	$0x44,%XMM0,%XMM0

0x4319c7 MOVDQA	%XMM0,0xa0(%RSP)

0x4319d0 MOVQ	%R12,%XMM0

0x4319d5 PSHUFD	$0x44,%XMM0,%XMM15

0x4319db MOVQ	%RDX,%XMM0

0x4319e0 PSHUFD	$0x44,%XMM0,%XMM0

0x4319e5 MOVDQA	%XMM0,0x90(%RSP)

0x4319ee XOR	%EBP,%EBP

0x4319f0 MOV	$0x458f00,%R12

0x4319f7 NOPW	(%RAX,%RAX,1)

(238) 0x431a00 LEA	(%RSI,%RBP,1),%RAX

(238) 0x431a04 MOVQ	%RAX,%XMM0

(238) 0x431a09 PSHUFD	$0x44,%XMM0,%XMM10

(238) 0x431a0f MOVDQA	%XMM10,%XMM9

(238) 0x431a14 PADDQ	0x39b33(%RIP),%XMM9

(238) 0x431a1d PADDQ	0x399ea(%RIP),%XMM10

(238) 0x431a26 MOVDQA	%XMM10,%XMM0

(238) 0x431a2b MOVDQA	%XMM8,%XMM1

(238) 0x431a30 CALL	%R12

(238) 0x431a33 MOVDQA	%XMM0,%XMM11

(238) 0x431a38 MOVDQA	%XMM9,%XMM0

(238) 0x431a3d MOVDQA	%XMM8,%XMM1

(238) 0x431a42 CALL	%R12

(238) 0x431a45 MOVDQA	%XMM8,%XMM1

(238) 0x431a4a PSRLQ	$0x20,%XMM1

(238) 0x431a4f PMULUDQ	%XMM11,%XMM1

(238) 0x431a54 MOVDQA	%XMM11,%XMM2

(238) 0x431a59 PSRLQ	$0x20,%XMM2

(238) 0x431a5e PMULUDQ	%XMM8,%XMM2

(238) 0x431a63 PADDQ	%XMM1,%XMM2

(238) 0x431a67 PSLLQ	$0x20,%XMM2

(238) 0x431a6c MOVDQA	%XMM11,%XMM1

(238) 0x431a71 PMULUDQ	%XMM8,%XMM1

(238) 0x431a76 PADDQ	%XMM2,%XMM1

(238) 0x431a7a MOVDQA	%XMM8,%XMM2

(238) 0x431a7f PSRLQ	$0x20,%XMM2

(238) 0x431a84 PMULUDQ	%XMM0,%XMM2

(238) 0x431a88 MOVDQA	%XMM0,%XMM3

(238) 0x431a8c PSRLQ	$0x20,%XMM3

(238) 0x431a91 PMULUDQ	%XMM8,%XMM3

(238) 0x431a96 PADDQ	%XMM2,%XMM3

(238) 0x431a9a PSLLQ	$0x20,%XMM3

(238) 0x431a9f MOVDQA	%XMM0,%XMM2

(238) 0x431aa3 PMULUDQ	%XMM8,%XMM2

(238) 0x431aa8 PADDQ	%XMM3,%XMM2

(238) 0x431aac PSUBQ	%XMM2,%XMM9

(238) 0x431ab1 PSUBQ	%XMM1,%XMM10

(238) 0x431ab6 PSHUFD	$-0x18,%XMM11,%XMM1

(238) 0x431abc PSLLQ	$0x20,%XMM11

(238) 0x431ac2 PSRAD	$0x1f,%XMM11

(238) 0x431ac8 PSHUFD	$-0x13,%XMM11,%XMM2

(238) 0x431ace PUNPCKLDQ	%XMM2,%XMM1

(238) 0x431ad2 PSHUFD	$-0x18,%XMM0,%XMM2

(238) 0x431ad7 PSLLQ	$0x20,%XMM0

(238) 0x431adc PSRAD	$0x1f,%XMM0

(238) 0x431ae1 PSHUFD	$-0x13,%XMM0,%XMM3

(238) 0x431ae6 PUNPCKLDQ	%XMM3,%XMM2

(238) 0x431aea MOVDQA	%XMM13,%XMM3

(238) 0x431aef PSRLQ	$0x20,%XMM3

(238) 0x431af4 MOVDQA	%XMM3,%XMM4

(238) 0x431af8 PMULUDQ	%XMM2,%XMM4

(238) 0x431afc PSRLQ	$0x20,%XMM0

(238) 0x431b01 MOVDQA	%XMM13,%XMM5

(238) 0x431b06 PMULUDQ	%XMM0,%XMM5

(238) 0x431b0a PADDQ	%XMM4,%XMM5

(238) 0x431b0e PMULUDQ	%XMM1,%XMM3

(238) 0x431b12 PSRLQ	$0x20,%XMM11

(238) 0x431b18 MOVDQA	%XMM13,%XMM4

(238) 0x431b1d PMULUDQ	%XMM11,%XMM4

(238) 0x431b22 PADDQ	%XMM3,%XMM4

(238) 0x431b26 MOVDQA	%XMM13,%XMM3

(238) 0x431b2b PMULUDQ	%XMM1,%XMM3

(238) 0x431b2f PSLLQ	$0x20,%XMM4

(238) 0x431b34 PADDQ	%XMM10,%XMM3

(238) 0x431b39 PADDQ	%XMM4,%XMM3

(238) 0x431b3d MOVDQA	%XMM13,%XMM4

(238) 0x431b42 PMULUDQ	%XMM2,%XMM4

(238) 0x431b46 PSLLQ	$0x20,%XMM5

(238) 0x431b4b PADDQ	%XMM9,%XMM4

(238) 0x431b50 PADDQ	%XMM5,%XMM4

(238) 0x431b54 PSLLQ	$0x3,%XMM4

(238) 0x431b59 MOVDQA	0xd0(%RSP),%XMM5

(238) 0x431b62 PADDQ	%XMM5,%XMM4

(238) 0x431b66 PSLLQ	$0x3,%XMM3

(238) 0x431b6b PADDQ	%XMM5,%XMM3

(238) 0x431b6f MOVQ	%XMM3,%RAX

(238) 0x431b74 MOVAPS	0xc0(%RSP),%XMM5

(238) 0x431b7c MOVLPS	%XMM5,(%RAX)

(238) 0x431b7f PSHUFD	$-0x12,%XMM3,%XMM3

(238) 0x431b84 MOVQ	%XMM3,%RAX

(238) 0x431b89 MOVHPS	%XMM5,(%RAX)

(238) 0x431b8c MOVQ	%XMM4,%RAX

(238) 0x431b91 MOVLPS	%XMM5,(%RAX)

(238) 0x431b94 PSHUFD	$-0x12,%XMM4,%XMM3

(238) 0x431b99 MOVQ	%XMM3,%RAX

(238) 0x431b9e MOVHPS	%XMM5,(%RAX)

(238) 0x431ba1 MOVDQA	%XMM12,%XMM3

(238) 0x431ba6 PSRLQ	$0x20,%XMM3

(238) 0x431bab MOVDQA	%XMM3,%XMM4

(238) 0x431baf PMULUDQ	%XMM2,%XMM4

(238) 0x431bb3 MOVDQA	%XMM12,%XMM5

(238) 0x431bb8 PMULUDQ	%XMM0,%XMM5

(238) 0x431bbc PADDQ	%XMM4,%XMM5

(238) 0x431bc0 PMULUDQ	%XMM1,%XMM3

(238) 0x431bc4 MOVDQA	%XMM12,%XMM4

(238) 0x431bc9 PMULUDQ	%XMM11,%XMM4

(238) 0x431bce PADDQ	%XMM3,%XMM4

(238) 0x431bd2 MOVDQA	%XMM12,%XMM3

(238) 0x431bd7 PMULUDQ	%XMM1,%XMM3

(238) 0x431bdb PSLLQ	$0x20,%XMM4

(238) 0x431be0 PADDQ	%XMM10,%XMM3

(238) 0x431be5 PADDQ	%XMM4,%XMM3

(238) 0x431be9 MOVDQA	%XMM12,%XMM4

(238) 0x431bee PMULUDQ	%XMM2,%XMM4

(238) 0x431bf2 PSLLQ	$0x20,%XMM5

(238) 0x431bf7 PADDQ	%XMM9,%XMM4

(238) 0x431bfc PADDQ	%XMM5,%XMM4

(238) 0x431c00 MOVSD	(%R15),%XMM5

(238) 0x431c05 PSLLQ	$0x3,%XMM4

(238) 0x431c0a MOVDQA	0xb0(%RSP),%XMM6

(238) 0x431c13 PADDQ	%XMM6,%XMM4

(238) 0x431c17 PSLLQ	$0x3,%XMM3

(238) 0x431c1c PADDQ	%XMM6,%XMM3

(238) 0x431c20 MOVQ	%XMM3,%RAX

(238) 0x431c25 MOVSD	%XMM5,(%RAX)

(238) 0x431c29 PSHUFD	$-0x12,%XMM3,%XMM3

(238) 0x431c2e MOVQ	%XMM3,%RAX

(238) 0x431c33 MOVSD	%XMM5,(%RAX)

(238) 0x431c37 MOVQ	%XMM4,%RAX

(238) 0x431c3c MOVSD	%XMM5,(%RAX)

(238) 0x431c40 PSHUFD	$-0x12,%XMM4,%XMM3

(238) 0x431c45 MOVQ	%XMM3,%RAX

(238) 0x431c4a MOVSD	%XMM5,(%RAX)

(238) 0x431c4e MOVDQA	%XMM14,%XMM3

(238) 0x431c53 PSRLQ	$0x20,%XMM3

(238) 0x431c58 MOVDQA	%XMM3,%XMM4

(238) 0x431c5c PMULUDQ	%XMM2,%XMM4

(238) 0x431c60 MOVDQA	%XMM14,%XMM5

(238) 0x431c65 PMULUDQ	%XMM0,%XMM5

(238) 0x431c69 PADDQ	%XMM4,%XMM5

(238) 0x431c6d PMULUDQ	%XMM1,%XMM3

(238) 0x431c71 MOVDQA	%XMM14,%XMM4

(238) 0x431c76 PMULUDQ	%XMM11,%XMM4

(238) 0x431c7b PADDQ	%XMM3,%XMM4

(238) 0x431c7f MOVDQA	%XMM14,%XMM3

(238) 0x431c84 PMULUDQ	%XMM1,%XMM3

(238) 0x431c88 PSLLQ	$0x20,%XMM4

(238) 0x431c8d PADDQ	%XMM10,%XMM3

(238) 0x431c92 PADDQ	%XMM4,%XMM3

(238) 0x431c96 MOVDQA	%XMM14,%XMM4

(238) 0x431c9b PMULUDQ	%XMM2,%XMM4

(238) 0x431c9f PSLLQ	$0x20,%XMM5

(238) 0x431ca4 PADDQ	%XMM9,%XMM4

(238) 0x431ca9 PADDQ	%XMM5,%XMM4

(238) 0x431cad PSLLQ	$0x3,%XMM3

(238) 0x431cb2 MOVDQA	0xa0(%RSP),%XMM5

(238) 0x431cbb PADDQ	%XMM5,%XMM3

(238) 0x431cbf MOVQ	%XMM3,%RAX

(238) 0x431cc4 PSHUFD	$-0x12,%XMM3,%XMM3

(238) 0x431cc9 MOVQ	%XMM3,%RCX

(238) 0x431cce MOVSD	(%R14),%XMM3

(238) 0x431cd3 PSLLQ	$0x3,%XMM4

(238) 0x431cd8 PADDQ	%XMM5,%XMM4

(238) 0x431cdc MOVSD	%XMM3,(%RAX)

(238) 0x431ce0 MOVSD	%XMM3,(%RCX)

(238) 0x431ce4 MOVQ	%XMM4,%RAX

(238) 0x431ce9 MOVSD	%XMM3,(%RAX)

(238) 0x431ced PSHUFD	$-0x12,%XMM4,%XMM4

(238) 0x431cf2 MOVQ	%XMM4,%RAX

(238) 0x431cf7 MOVSD	%XMM3,(%RAX)

(238) 0x431cfb MOVDQA	%XMM15,%XMM3

(238) 0x431d00 PMULUDQ	%XMM2,%XMM3

(238) 0x431d04 MOVDQA	%XMM15,%XMM4

(238) 0x431d09 PSRLQ	$0x20,%XMM4

(238) 0x431d0e PMULUDQ	%XMM4,%XMM2

(238) 0x431d12 PMULUDQ	%XMM15,%XMM0

(238) 0x431d17 PADDQ	%XMM2,%XMM0

(238) 0x431d1b MOVDQA	%XMM15,%XMM2

(238) 0x431d20 PMULUDQ	%XMM1,%XMM2

(238) 0x431d24 PMULUDQ	%XMM1,%XMM4

(238) 0x431d28 PMULUDQ	%XMM15,%XMM11

(238) 0x431d2d PADDQ	%XMM4,%XMM11

(238) 0x431d32 PADDQ	%XMM10,%XMM2

(238) 0x431d37 PSLLQ	$0x20,%XMM11

(238) 0x431d3d PADDQ	%XMM11,%XMM2

(238) 0x431d42 PADDQ	%XMM9,%XMM3

(238) 0x431d47 PSLLQ	$0x20,%XMM0

(238) 0x431d4c PADDQ	%XMM0,%XMM3

(238) 0x431d50 PSLLQ	$0x3,%XMM2

(238) 0x431d55 MOVDQA	0x90(%RSP),%XMM1

(238) 0x431d5e PADDQ	%XMM1,%XMM2

(238) 0x431d62 MOVQ	%XMM2,%RAX

(238) 0x431d67 PSHUFD	$-0x12,%XMM2,%XMM0

(238) 0x431d6c MOVQ	%XMM0,%RCX

(238) 0x431d71 PSLLQ	$0x3,%XMM3

(238) 0x431d76 PADDQ	%XMM1,%XMM3

(238) 0x431d7a MOVQ	%XMM3,%RDX

(238) 0x431d7f PSHUFD	$-0x12,%XMM3,%XMM0

(238) 0x431d84 MOVQ	%XMM0,%R8

(238) 0x431d89 MOVQ	(%RBX),%XMM0

(238) 0x431d8d MOVQ	%XMM0,(%RAX)

(238) 0x431d91 MOVQ	%XMM0,(%RCX)

(238) 0x431d95 MOVQ	%XMM0,(%RDX)

(238) 0x431d99 MOVQ	%XMM0,(%R8)

(238) 0x431d9e ADD	$0x4,%RBP

(238) 0x431da2 CMP	0x60(%RSP),%RBP

(238) 0x431da7 JBE	431a00

0x431dad MOV	0x30(%RSP),%RAX

0x431db2 CMP	%RAX,0x58(%RSP)

0x431db7 MOV	0x4(%RSP),%EBP

0x431dbb MOV	0x50(%RSP),%R8

0x431dc0 MOV	0x48(%RSP),%R9

0x431dc5 MOV	0x40(%RSP),%R10

0x431dca MOV	0x38(%RSP),%R11

0x431dcf MOV	0x8(%RSP),%R12

0x431dd4 MOVDQA	0x80(%RSP),%XMM1

0x431ddd JNE	431e19

0x431ddf MOV	$0x47d190,%EDI

0x431de4 MOV	%EBP,%ESI

0x431de6 ADD	$0xe8,%RSP

0x431ded POP	%RBX

0x431dee POP	%R12

0x431df0 POP	%R13

0x431df2 POP	%R14

0x431df4 POP	%R15

0x431df6 POP	%RBP

0x431df7 JMP	403050

0x431dfc ADD	$0xe8,%RSP

0x431e03 POP	%RBX

0x431e04 POP	%R12

0x431e06 POP	%R13

0x431e08 POP	%R14

0x431e0a POP	%R15

0x431e0c POP	%RBP

0x431e0d RET

0x431e0e XOR	%EAX,%EAX

0x431e10 MOV	0x8(%RSP),%R12

0x431e15 MOV	0x4(%RSP),%EBP

0x431e19 INC	%RDI

0x431e1c ADD	%RAX,%RSI

0x431e1f JMP	431e99

0x431e21 NOPW	%CS:(%RAX,%RAX,1)

(237) 0x431e30 MOV	%RSI,%RAX

(237) 0x431e33 CQTO

(237) 0x431e35 IDIV	%R13

(237) 0x431e38 CLTQ

(237) 0x431e3a MOV	%R9,%RCX

(237) 0x431e3d IMUL	%RAX,%RCX

(237) 0x431e41 ADD	%RDX,%RCX

(237) 0x431e44 MOVQ	%XMM1,(%R8,%RCX,8)

(237) 0x431e4a MOV	%R10,%RCX

(237) 0x431e4d IMUL	%RAX,%RCX

(237) 0x431e51 ADD	%RDX,%RCX

(237) 0x431e54 MOVSD	(%R15),%XMM0

(237) 0x431e59 MOVSD	%XMM0,(%R11,%RCX,8)

(237) 0x431e5f MOV	0x70(%RSP),%RCX

(237) 0x431e64 IMUL	%RAX,%RCX

(237) 0x431e68 ADD	%RDX,%RCX

(237) 0x431e6b MOVSD	(%R14),%XMM0

(237) 0x431e70 MOVSD	%XMM0,(%R12,%RCX,8)

(237) 0x431e76 IMUL	0x68(%RSP),%RAX

(237) 0x431e7c ADD	%RDX,%RAX

(237) 0x431e7f MOVQ	(%RBX),%XMM0

(237) 0x431e83 MOV	0x10(%RSP),%RCX

(237) 0x431e88 MOVQ	%XMM0,(%RCX,%RAX,8)

(237) 0x431e8d INC	%RSI

(237) 0x431e90 CMP	%RSI,%RDI

(237) 0x431e93 JE	431ddf

(237) 0x431e99 MOV	%RSI,%RAX

(237) 0x431e9c OR	%R13,%RAX

(237) 0x431e9f SHR	$0x20,%RAX

(237) 0x431ea3 JNE	431e30

(237) 0x431ea5 MOV	%ESI,%EAX

(237) 0x431ea7 XOR	%EDX,%EDX

(237) 0x431ea9 DIV	%R13D

(237) 0x431eac JMP	431e38

0x431eae XCHG	%AX,%AX

Coverage (%)	Name	Module
►97.23+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
○	__GI___clone3	libc.so.6
►2.77+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_fork_call	libiomp5.so
○	__kmpc_fork_call	libiomp5.so
○	generate_chunk(int, global_var[...]	exec
○	start(parallel_&, global_confi[...]	exec
○	initialise(parallel_&, std::ve[...]	exec
○	main	exec
○	__libc_start_call_main	libc.so.6
○	__libc_start_main	libc.so.6
○	_start	exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_0

Source file and lines
Module	exec

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 16.88 to 6.13 cycles (2.76x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is poorly vectorized. Only 15% of vector register length is used (average across all SSE/AVX instructions). By fully vectorizing your function, you can lower the cost of an iteration from 16.88 to 1.69 cycles (9.97x speedup).

Details

25% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

6% of SSE/AVX loads are used in vector version.
26% of SSE/AVX stores are used in vector version.
37% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

__kmpc_for_static_init_8@plt: 1 occurrences►

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

MOVQ: 8 occurrences►

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 220 bytes. The binary function is storing 224 bytes.

General properties

nb instructions	129
nb uops	135
loop length	613
used x86 registers	16
used mmx registers	0
used xmm registers	7
used ymm registers	0
used zmm registers	0
nb stack references	27

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	16.88 cycles
front end	16.88 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	4.83	4.83	4.83	4.83	4.83	4.83	13.00	13.00	13.00	13.00	4.50	4.50	4.50	4.50	3.00	3.00
cycles	4.83	4.83	4.83	4.83	4.83	4.83	13.00	13.00	13.00	13.00	4.50	4.50	4.50	4.50	3.00	3.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	16.88
Dispatch	13.00
Overall L1	16.88

Vectorization ratios

all	25%
load	6%
store	26%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	37%

Vector efficiency ratios

all	15%
load	13%
store	14%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	16%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 16.88 cycles. At this rate:

5% of peak load performance is reached (13.04 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
10% of peak store performance is reached (13.27 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 16.88 to 13.00 cycles (1.30x speedup).

ASM code

In the binary file, the address of the function is: 431820

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0xe8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x138(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x128(%RSP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x120(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOVL $0,0x1c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
TEST %RAX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JS 431dfc <_Z14generate_chunkiR16global_variables.extracted.9+0x5dc>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %R9,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV %R8,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV %RDX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV %RCX,0x10(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%RDI),%EBP	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOVQ $0,0x28(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %RAX,0x20(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ $0x1,0x78(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA 0x80(%RSP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x24(%RSP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x30(%RSP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x28(%RSP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV $0x47d170,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %EBP,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 4031e0 <__kmpc_for_static_init_8@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x28(%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x20(%RSP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDI,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %RSI,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JB 431ddf <_Z14generate_chunkiR16global_variables.extracted.9+0x5bf>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %EBP,0x4(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV 0x40(%R12),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x30(%R12),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV (%R12),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x10(%R12),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0xb8(%R12),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV %RCX,0x8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xa8(%R12),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0xe8(%R12),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0xd8(%R12),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%RSP),%RBP	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOVQ (%RBP),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
AND $-0x4,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,0x10(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RCX,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R12,0x68(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
JE 431e0e <_Z14generate_chunkiR16global_variables.extracted.9+0x5ee>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %RAX,0x30(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
DEC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,0x60(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ %R13,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM8	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOV %R9,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ %R9,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM13	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOV %R8,0x50(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ %R8,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xd0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVDQA %XMM1,0x80(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
PUNPCKLQDQ %XMM1,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
MOVDQA %XMM1,0xc0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOV %R10,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ %R10,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM12	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOV %R11,0x38(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ %R11,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xb0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RCX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM14	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVQ 0x8(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xa0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R12,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM15	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVQ %RDX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x90(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
XOR %EBP,%EBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV $0x458f00,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV 0x30(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMP %RAX,0x58(%RSP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOV 0x4(%RSP),%EBP	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x50(%RSP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x48(%RSP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x40(%RSP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x38(%RSP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x8(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOVDQA 0x80(%RSP),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
JNE 431e19 <_Z14generate_chunkiR16global_variables.extracted.9+0x5f9>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV $0x47d190,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %EBP,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD $0xe8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 403050 <__kmpc_for_static_fini@plt>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD $0xe8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV 0x8(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x4(%RSP),%EBP	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
INC %RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %RAX,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 431e99 <_Z14generate_chunkiR16global_variables.extracted.9+0x679>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_0

Source file and lines
Module	exec

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 16.88 to 6.13 cycles (2.76x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

25% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

6% of SSE/AVX loads are used in vector version.
26% of SSE/AVX stores are used in vector version.
37% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

__kmpc_for_static_init_8@plt: 1 occurrences►

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

MOVQ: 8 occurrences►

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 220 bytes. The binary function is storing 224 bytes.

General properties

nb instructions	129
nb uops	135
loop length	613
used x86 registers	16
used mmx registers	0
used xmm registers	7
used ymm registers	0
used zmm registers	0
nb stack references	27

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	16.88 cycles
front end	16.88 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	4.83	4.83	4.83	4.83	4.83	4.83	13.00	13.00	13.00	13.00	4.50	4.50	4.50	4.50	3.00	3.00
cycles	4.83	4.83	4.83	4.83	4.83	4.83	13.00	13.00	13.00	13.00	4.50	4.50	4.50	4.50	3.00	3.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	16.88
Dispatch	13.00
Overall L1	16.88

Vectorization ratios

all	25%
load	6%
store	26%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	37%

Vector efficiency ratios

all	15%
load	13%
store	14%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	16%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 16.88 cycles. At this rate:

5% of peak load performance is reached (13.04 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
10% of peak store performance is reached (13.27 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 431820

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0xe8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x138(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x128(%RSP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x120(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOVL $0,0x1c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
TEST %RAX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JS 431dfc <_Z14generate_chunkiR16global_variables.extracted.9+0x5dc>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %R9,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV %R8,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV %RDX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV %RCX,0x10(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%RDI),%EBP	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOVQ $0,0x28(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %RAX,0x20(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ $0x1,0x78(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA 0x80(%RSP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x24(%RSP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x30(%RSP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x28(%RSP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV $0x47d170,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %EBP,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 4031e0 <__kmpc_for_static_init_8@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x28(%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x20(%RSP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDI,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %RSI,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JB 431ddf <_Z14generate_chunkiR16global_variables.extracted.9+0x5bf>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %EBP,0x4(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV 0x40(%R12),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x30(%R12),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV (%R12),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x10(%R12),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0xb8(%R12),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV %RCX,0x8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0xa8(%R12),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0xe8(%R12),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0xd8(%R12),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%RSP),%RBP	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOVQ (%RBP),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
AND $-0x4,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,0x10(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RCX,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R12,0x68(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
JE 431e0e <_Z14generate_chunkiR16global_variables.extracted.9+0x5ee>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %RAX,0x30(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
DEC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,0x60(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ %R13,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM8	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOV %R9,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ %R9,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM13	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOV %R8,0x50(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ %R8,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xd0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVDQA %XMM1,0x80(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
PUNPCKLQDQ %XMM1,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	scal (12.5%)
MOVDQA %XMM1,0xc0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOV %R10,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ %R10,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM12	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOV %R11,0x38(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ %R11,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xb0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RCX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM14	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVQ 0x8(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xa0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R12,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM15	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVQ %RDX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x90(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
XOR %EBP,%EBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV $0x458f00,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV 0x30(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMP %RAX,0x58(%RSP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOV 0x4(%RSP),%EBP	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x50(%RSP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x48(%RSP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x40(%RSP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x38(%RSP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x8(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOVDQA 0x80(%RSP),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
JNE 431e19 <_Z14generate_chunkiR16global_variables.extracted.9+0x5f9>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV $0x47d190,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %EBP,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD $0xe8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 403050 <__kmpc_for_static_fini@plt>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD $0xe8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOV 0x8(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x4(%RSP),%EBP	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
INC %RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADD %RAX,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 431e99 <_Z14generate_chunkiR16global_variables.extracted.9+0x679>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼generate_chunk(int, global_variables&) [clone .extracted.9]–	0.03	0.01
○Loop 238 - - exec	0.03	0.01
○Loop 237 - - exec	0.00	0.00

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