OV - exec - Function advec_mom_kernel(int, int, int, int, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer1D<double>&, clover::Buffer1D<double>&, int, int, int) [clone .extracted.44]

	Function: advec_mom_kernel(int, int, int, int, clover::Buffer2D<double>&, clover::Buffer2D<double>&, ...	Module: exec	Source: :0-0	Coverage (incl. loops): 2.83% \| (excl. loops): 0.00%

  ***  This Panel is Intentionally Left Blank.  ***

It is due to a lack of debug symbols in the given object
(loop or function).

0x4248f0 PUSH	%RBP

0x4248f1 PUSH	%R15

0x4248f3 PUSH	%R14

0x4248f5 PUSH	%R13

0x4248f7 PUSH	%R12

0x4248f9 PUSH	%RBX

0x4248fa SUB	$0x138,%RSP

0x424901 MOV	%RCX,%R15

0x424904 MOV	0x198(%RSP),%RAX

0x42490c MOV	0x188(%RSP),%RBP

0x424914 MOV	0x180(%RSP),%R10

0x42491c MOV	0x170(%RSP),%RBX

0x424924 MOV	0x178(%RSP),%ECX

0x42492b MOV	%ECX,0x4(%RSP)

0x42492f MOVL	$0,0xc(%RSP)

0x424937 TEST	%RAX,%RAX

0x42493a JS	425010

0x424940 MOV	%R9,%R14

0x424943 MOV	%R8,%R12

0x424946 MOV	%RDX,%R13

0x424949 MOV	(%RDI),%ESI

0x42494b MOVQ	$0,0x20(%RSP)

0x424954 MOV	%RAX,0x18(%RSP)

0x424959 MOVQ	$0x1,0x88(%RSP)

0x424965 SUB	$0x8,%RSP

0x424969 LEA	0x90(%RSP),%RAX

0x424971 LEA	0x14(%RSP),%RCX

0x424976 LEA	0x28(%RSP),%R8

0x42497b LEA	0x20(%RSP),%R9

0x424980 MOV	$0x47c970,%EDI

0x424985 MOV	%ESI,0x10(%RSP)

0x424989 MOV	$0x22,%EDX

0x42498e PUSH	$0x1

0x424990 PUSH	$0x1

0x424992 PUSH	%RAX

0x424993 MOV	%R10,0x30(%RSP)

0x424998 CALL	4031e0 <__kmpc_for_static_init_8@plt>

0x42499d MOV	0x30(%RSP),%R10

0x4249a2 ADD	$0x20,%RSP

0x4249a6 MOV	0x20(%RSP),%RCX

0x4249ab MOV	0x18(%RSP),%RDX

0x4249b0 CMP	%RDX,%RCX

0x4249b3 JA	424ff1

0x4249b9 MOV	%RDX,%RAX

0x4249bc SUB	%R10D,%EBP

0x4249bf MOV	(%R13),%RDX

0x4249c3 MOV	0x10(%R13),%R11

0x4249c7 MOV	(%RBX),%R13

0x4249ca MOV	0x10(%RBX),%RBX

0x4249ce MOV	(%R12),%RSI

0x4249d2 MOV	0x10(%R12),%R12

0x4249d7 MOV	(%R15),%RDI

0x4249da MOV	0x10(%R15),%R8

0x4249de MOV	(%R14),%R9

0x4249e1 MOV	0x10(%R14),%R14

0x4249e5 INC	%RAX

0x4249e8 MOV	%RAX,0x80(%RSP)

0x4249f0 MOV	%RAX,%R15

0x4249f3 SUB	%RCX,%R15

0x4249f6 MOV	$-0x2,%EAX

0x4249fb AND	%R15,%RAX

0x4249fe MOV	%R8,0x70(%RSP)

0x424a03 MOV	%RDI,0x78(%RSP)

0x424a08 MOV	%R9,0x68(%RSP)

0x424a0d MOV	%R14,0x60(%RSP)

0x424a12 JE	425022

0x424a18 MOV	%R15,0x28(%RSP)

0x424a1d MOV	%RBP,0x50(%RSP)

0x424a22 MOVD	%EBP,%XMM0

0x424a26 PSHUFD	$0x44,%XMM0,%XMM1

0x424a2b MOVD	0x4(%RSP),%XMM0

0x424a31 PSHUFD	$0x50,%XMM0,%XMM0

0x424a36 MOVDQA	%XMM0,0x110(%RSP)

0x424a3f MOVD	%R10D,%XMM0

0x424a44 PSHUFD	$0x50,%XMM0,%XMM0

0x424a49 MOVDQA	%XMM0,0x100(%RSP)

0x424a52 MOV	%RDX,0x48(%RSP)

0x424a57 MOVQ	%RDX,%XMM0

0x424a5c PSHUFD	$0x44,%XMM0,%XMM14

0x424a62 MOVQ	%R11,%XMM0

0x424a67 PSHUFD	$0x44,%XMM0,%XMM4

0x424a6c MOV	%R13,0x40(%RSP)

0x424a71 MOVQ	%R13,%XMM0

0x424a76 PSHUFD	$0x44,%XMM0,%XMM7

0x424a7b MOVQ	%RBX,%XMM0

0x424a80 PSHUFD	$0x44,%XMM0,%XMM6

0x424a85 MOV	%RSI,0x38(%RSP)

0x424a8a MOVQ	%RSI,%XMM0

0x424a8f PSHUFD	$0x44,%XMM0,%XMM0

0x424a94 MOVDQA	%XMM0,0xf0(%RSP)

0x424a9d MOV	%R12,0x30(%RSP)

0x424aa2 MOVQ	%R12,%XMM0

0x424aa7 PSHUFD	$0x44,%XMM0,%XMM0

0x424aac MOVDQA	%XMM0,0xe0(%RSP)

0x424ab5 MOVQ	%RDI,%XMM0

0x424aba PSHUFD	$0x44,%XMM0,%XMM0

0x424abf MOVDQA	%XMM0,0xd0(%RSP)

0x424ac8 MOVQ	%R8,%XMM0

0x424acd PSHUFD	$0x44,%XMM0,%XMM0

0x424ad2 MOVDQA	%XMM0,0xc0(%RSP)

0x424adb MOVQ	%R9,%XMM0

0x424ae0 PSHUFD	$0x44,%XMM0,%XMM0

0x424ae5 MOVDQA	%XMM0,0xb0(%RSP)

0x424aee MOVQ	%R14,%XMM0

0x424af3 PSHUFD	$0x44,%XMM0,%XMM0

0x424af8 MOVDQA	%XMM0,0xa0(%RSP)

0x424b01 MOVQ	%RCX,%XMM0

0x424b06 PSHUFD	$0x44,%XMM0,%XMM13

0x424b0c PADDQ	0x468fb(%RIP),%XMM13

0x424b15 XOR	%R12D,%R12D

0x424b18 MOVDQA	%XMM1,0x120(%RSP)

0x424b21 PSHUFD	$-0x12,%XMM1,%XMM0

0x424b26 MOVDQA	%XMM0,0x90(%RSP)

0x424b2f MOV	%RAX,0x58(%RSP)

0x424b34 NOPW	%CS:(%RAX,%RAX,1)

(179) 0x424b40 MOVQ	%XMM13,%RSI

(179) 0x424b45 MOVDQA	0x120(%RSP),%XMM0

(179) 0x424b4e MOVQ	%XMM0,%R9

(179) 0x424b53 MOV	%RSI,%RAX

(179) 0x424b56 XOR	%EDX,%EDX

(179) 0x424b58 DIV	%R9

(179) 0x424b5b MOV	%RAX,%RDI

(179) 0x424b5e PSHUFD	$-0x12,%XMM13,%XMM0

(179) 0x424b64 MOVQ	%XMM0,%R8

(179) 0x424b69 MOVDQA	0x90(%RSP),%XMM0

(179) 0x424b72 MOVQ	%XMM0,%R14

(179) 0x424b77 MOV	%R8,%RAX

(179) 0x424b7a XOR	%EDX,%EDX

(179) 0x424b7c DIV	%R14

(179) 0x424b7f MOVQ	%RDI,%XMM0

(179) 0x424b84 MOVQ	%RAX,%XMM1

(179) 0x424b89 PUNPCKLQDQ	%XMM1,%XMM0

(179) 0x424b8d PSHUFD	$-0x18,%XMM0,%XMM2

(179) 0x424b92 PADDD	0x110(%RSP),%XMM2

(179) 0x424b9b MOV	%RSI,%RAX

(179) 0x424b9e CQTO

(179) 0x424ba0 IDIV	%R9

(179) 0x424ba3 MOV	%RDX,%RSI

(179) 0x424ba6 MOV	%R8,%RAX

(179) 0x424ba9 CQTO

(179) 0x424bab MOVQ	%RSI,%XMM0

(179) 0x424bb0 IDIV	%R14

(179) 0x424bb3 MOVQ	%RDX,%XMM1

(179) 0x424bb8 PUNPCKLQDQ	%XMM1,%XMM0

(179) 0x424bbc PSHUFD	$-0x18,%XMM0,%XMM0

(179) 0x424bc1 PXOR	%XMM3,%XMM3

(179) 0x424bc5 MOVDQA	%XMM2,%XMM1

(179) 0x424bc9 PADDD	0x100(%RSP),%XMM0

(179) 0x424bd2 PCMPEQD	%XMM11,%XMM11

(179) 0x424bd7 PADDD	%XMM11,%XMM1

(179) 0x424bdc PXOR	%XMM15,%XMM15

(179) 0x424be1 PCMPGTD	%XMM1,%XMM15

(179) 0x424be6 PCMPGTD	%XMM0,%XMM3

(179) 0x424bea PUNPCKLDQ	%XMM15,%XMM1

(179) 0x424bef MOVDQA	%XMM14,%XMM10

(179) 0x424bf4 PMULUDQ	%XMM1,%XMM10

(179) 0x424bf9 MOVDQA	%XMM0,%XMM8

(179) 0x424bfe MOVDQA	%XMM14,%XMM5

(179) 0x424c03 PSRLQ	$0x20,%XMM5

(179) 0x424c08 MOVDQA	%XMM5,%XMM12

(179) 0x424c0d PUNPCKLDQ	%XMM3,%XMM8

(179) 0x424c12 PMULUDQ	%XMM1,%XMM12

(179) 0x424c17 PXOR	%XMM9,%XMM9

(179) 0x424c1c PUNPCKLDQ	%XMM9,%XMM15

(179) 0x424c21 MOVDQA	%XMM14,%XMM3

(179) 0x424c26 PMULUDQ	%XMM15,%XMM3

(179) 0x424c2b PADDQ	%XMM12,%XMM3

(179) 0x424c30 PSLLQ	$0x20,%XMM3

(179) 0x424c35 MOVDQA	%XMM7,%XMM12

(179) 0x424c3a PADDQ	%XMM10,%XMM3

(179) 0x424c3f PMULUDQ	%XMM1,%XMM12

(179) 0x424c44 MOVDQA	%XMM7,%XMM10

(179) 0x424c49 PSRLQ	$0x20,%XMM10

(179) 0x424c4f PMULUDQ	%XMM10,%XMM1

(179) 0x424c54 PMULUDQ	%XMM7,%XMM15

(179) 0x424c59 PADDQ	%XMM1,%XMM15

(179) 0x424c5e MOVDQA	%XMM3,%XMM1

(179) 0x424c62 PADDQ	%XMM8,%XMM1

(179) 0x424c67 PSLLQ	$0x3,%XMM1

(179) 0x424c6c PADDQ	%XMM4,%XMM1

(179) 0x424c70 PSLLQ	$0x20,%XMM15

(179) 0x424c76 MOVQ	%XMM1,%RDX

(179) 0x424c7b PADDQ	%XMM12,%XMM15

(179) 0x424c80 MOVDQA	%XMM15,%XMM12

(179) 0x424c85 PADDQ	%XMM8,%XMM12

(179) 0x424c8a PSHUFD	$-0x12,%XMM1,%XMM1

(179) 0x424c8f PSLLQ	$0x3,%XMM12

(179) 0x424c95 PADDQ	%XMM6,%XMM12

(179) 0x424c9a MOVQ	%XMM12,%RDI

(179) 0x424c9f MOVQ	%XMM1,%RAX

(179) 0x424ca4 PSHUFD	$-0x12,%XMM12,%XMM1

(179) 0x424caa PXOR	%XMM12,%XMM12

(179) 0x424caf PCMPGTD	%XMM2,%XMM12

(179) 0x424cb4 MOVQ	%XMM1,%RSI

(179) 0x424cb9 PUNPCKLDQ	%XMM12,%XMM2

(179) 0x424cbe PUNPCKLDQ	%XMM9,%XMM12

(179) 0x424cc3 MOVDQA	%XMM14,%XMM1

(179) 0x424cc8 PMULUDQ	%XMM2,%XMM5

(179) 0x424ccc PMULUDQ	%XMM12,%XMM1

(179) 0x424cd1 PADDQ	%XMM5,%XMM1

(179) 0x424cd5 MOVDQA	%XMM14,%XMM5

(179) 0x424cda PMULUDQ	%XMM2,%XMM5

(179) 0x424cde PSLLQ	$0x20,%XMM1

(179) 0x424ce3 PADDQ	%XMM5,%XMM1

(179) 0x424ce7 MOVDQA	%XMM1,%XMM5

(179) 0x424ceb PADDQ	%XMM8,%XMM5

(179) 0x424cf0 PSLLQ	$0x3,%XMM5

(179) 0x424cf5 PADDQ	%XMM4,%XMM5

(179) 0x424cf9 MOVQ	%XMM5,%R8

(179) 0x424cfe PSHUFD	$-0x12,%XMM5,%XMM5

(179) 0x424d03 MOVQ	%XMM5,%R9

(179) 0x424d08 MOVDQA	%XMM7,%XMM5

(179) 0x424d0c PMULUDQ	%XMM12,%XMM5

(179) 0x424d11 PMULUDQ	%XMM2,%XMM10

(179) 0x424d16 PADDQ	%XMM10,%XMM5

(179) 0x424d1b MOVDQA	%XMM7,%XMM10

(179) 0x424d20 PMULUDQ	%XMM2,%XMM10

(179) 0x424d25 PSLLQ	$0x20,%XMM5

(179) 0x424d2a PADDQ	%XMM10,%XMM5

(179) 0x424d2f PADDD	%XMM11,%XMM0

(179) 0x424d34 PXOR	%XMM10,%XMM10

(179) 0x424d39 PCMPGTD	%XMM0,%XMM10

(179) 0x424d3e PUNPCKLDQ	%XMM10,%XMM0

(179) 0x424d43 MOVDQA	%XMM5,%XMM10

(179) 0x424d48 PADDQ	%XMM8,%XMM10

(179) 0x424d4d PSLLQ	$0x3,%XMM10

(179) 0x424d53 PADDQ	%XMM6,%XMM10

(179) 0x424d58 PADDQ	%XMM0,%XMM3

(179) 0x424d5c PSLLQ	$0x3,%XMM3

(179) 0x424d61 MOVQ	%XMM10,%R14

(179) 0x424d66 PADDQ	%XMM4,%XMM3

(179) 0x424d6a MOVQ	%XMM3,%R10

(179) 0x424d6f PSHUFD	$-0x12,%XMM3,%XMM3

(179) 0x424d74 PSHUFD	$-0x12,%XMM10,%XMM10

(179) 0x424d7a MOVQ	%XMM3,%R15

(179) 0x424d7f PADDQ	%XMM0,%XMM15

(179) 0x424d84 PSLLQ	$0x3,%XMM15

(179) 0x424d8a MOVQ	%XMM10,%RBP

(179) 0x424d8f PADDQ	%XMM6,%XMM15

(179) 0x424d94 MOVQ	%XMM15,%R13

(179) 0x424d99 PSHUFD	$-0x12,%XMM15,%XMM3

(179) 0x424d9f MOVSD	(%R10),%XMM15

(179) 0x424da4 MOVQ	%XMM3,%R10

(179) 0x424da9 PADDQ	%XMM0,%XMM1

(179) 0x424dad PSLLQ	$0x3,%XMM1

(179) 0x424db2 MOVSD	(%RDX),%XMM9

(179) 0x424db7 PADDQ	%XMM4,%XMM1

(179) 0x424dbb MOVQ	%XMM1,%RDX

(179) 0x424dc0 PSHUFD	$-0x12,%XMM1,%XMM1

(179) 0x424dc5 MOVSD	(%RDI),%XMM10

(179) 0x424dca MOVQ	%XMM1,%RDI

(179) 0x424dcf MOVSD	(%R13),%XMM11

(179) 0x424dd5 MOVHPD	(%R15),%XMM15

(179) 0x424dda PADDQ	%XMM0,%XMM5

(179) 0x424dde PSLLQ	$0x3,%XMM5

(179) 0x424de3 MOVHPD	(%R10),%XMM11

(179) 0x424de8 PADDQ	%XMM6,%XMM5

(179) 0x424dec MOVQ	%XMM5,%R10

(179) 0x424df1 MOVHPD	(%RAX),%XMM9

(179) 0x424df6 PSHUFD	$-0x12,%XMM5,%XMM3

(179) 0x424dfb MOVQ	%XMM3,%RAX

(179) 0x424e00 MOVHPD	(%RSI),%XMM10

(179) 0x424e05 MOVSD	(%RDX),%XMM5

(179) 0x424e09 MOVHPD	(%RDI),%XMM5

(179) 0x424e0d MULPD	%XMM15,%XMM11

(179) 0x424e12 MOVSD	(%R10),%XMM3

(179) 0x424e17 MOVHPD	(%RAX),%XMM3

(179) 0x424e1b MULPD	%XMM5,%XMM3

(179) 0x424e1f MOVSD	(%R8),%XMM15

(179) 0x424e24 MOVHPD	(%R9),%XMM15

(179) 0x424e29 MULPD	%XMM9,%XMM10

(179) 0x424e2e MOVSD	(%R14),%XMM5

(179) 0x424e33 MOVHPD	(%RBP),%XMM5

(179) 0x424e38 MULPD	%XMM15,%XMM5

(179) 0x424e3d MOVDQA	0xf0(%RSP),%XMM1

(179) 0x424e46 MOVDQA	%XMM1,%XMM9

(179) 0x424e4b PSRLQ	$0x20,%XMM9

(179) 0x424e51 PMULUDQ	%XMM2,%XMM9

(179) 0x424e56 ADDPD	%XMM11,%XMM3

(179) 0x424e5b MOVDQA	%XMM1,%XMM15

(179) 0x424e60 PMULUDQ	%XMM12,%XMM15

(179) 0x424e65 PADDQ	%XMM9,%XMM15

(179) 0x424e6a PMULUDQ	%XMM2,%XMM1

(179) 0x424e6e PSLLQ	$0x20,%XMM15

(179) 0x424e74 PADDQ	%XMM8,%XMM1

(179) 0x424e79 ADDPD	%XMM10,%XMM5

(179) 0x424e7e PADDQ	%XMM15,%XMM1

(179) 0x424e83 MOVDQA	0xd0(%RSP),%XMM11

(179) 0x424e8d MOVDQA	%XMM11,%XMM9

(179) 0x424e92 MOVDQA	%XMM11,%XMM10

(179) 0x424e97 ADDPD	%XMM5,%XMM3

(179) 0x424e9b PSRLQ	$0x20,%XMM10

(179) 0x424ea1 PMULUDQ	%XMM2,%XMM10

(179) 0x424ea6 MOVDQA	%XMM11,%XMM5

(179) 0x424eab PMULUDQ	%XMM2,%XMM9

(179) 0x424eb0 PMULUDQ	%XMM12,%XMM5

(179) 0x424eb5 PADDQ	%XMM10,%XMM5

(179) 0x424eba PSLLQ	$0x20,%XMM5

(179) 0x424ebf PADDQ	%XMM9,%XMM5

(179) 0x424ec4 MOVDQA	0xb0(%RSP),%XMM11

(179) 0x424ece MOVDQA	%XMM11,%XMM9

(179) 0x424ed3 MOVDQA	%XMM11,%XMM10

(179) 0x424ed8 PSRLQ	$0x20,%XMM10

(179) 0x424ede PMULUDQ	%XMM2,%XMM9

(179) 0x424ee3 PMULUDQ	%XMM2,%XMM10

(179) 0x424ee8 PMULUDQ	%XMM11,%XMM12

(179) 0x424eed PADDQ	%XMM10,%XMM12

(179) 0x424ef2 PSLLQ	$0x3,%XMM1

(179) 0x424ef7 PADDQ	0xe0(%RSP),%XMM1

(179) 0x424f00 MOVQ	%XMM1,%RAX

(179) 0x424f05 PSHUFD	$-0x12,%XMM1,%XMM1

(179) 0x424f0a MOVQ	%XMM1,%RDX

(179) 0x424f0f PADDQ	%XMM5,%XMM0

(179) 0x424f13 PADDQ	%XMM8,%XMM5

(179) 0x424f18 PADDQ	%XMM8,%XMM9

(179) 0x424f1d PSLLQ	$0x3,%XMM0

(179) 0x424f22 MOVDQA	0xc0(%RSP),%XMM1

(179) 0x424f2b PADDQ	%XMM1,%XMM0

(179) 0x424f2f MOVQ	%XMM0,%RSI

(179) 0x424f34 PSHUFD	$-0x12,%XMM0,%XMM0

(179) 0x424f39 MOVQ	%XMM0,%RDI

(179) 0x424f3e MULPD	0x464da(%RIP),%XMM3

(179) 0x424f46 MOVLPD	%XMM3,(%RAX)

(179) 0x424f4a PSLLQ	$0x3,%XMM5

(179) 0x424f4f MOVHPD	%XMM3,(%RDX)

(179) 0x424f53 PADDQ	%XMM1,%XMM5

(179) 0x424f57 MOVQ	%XMM5,%RAX

(179) 0x424f5c PSHUFD	$-0x12,%XMM5,%XMM0

(179) 0x424f61 MOVQ	%XMM0,%RDX

(179) 0x424f66 MOVSD	(%RSI),%XMM0

(179) 0x424f6a MOVHPD	(%RDI),%XMM0

(179) 0x424f6e SUBPD	%XMM0,%XMM3

(179) 0x424f72 MOVSD	(%RAX),%XMM0

(179) 0x424f76 MOVHPD	(%RDX),%XMM0

(179) 0x424f7a ADDPD	%XMM3,%XMM0

(179) 0x424f7e PSLLQ	$0x20,%XMM12

(179) 0x424f84 PADDQ	%XMM12,%XMM9

(179) 0x424f89 PSLLQ	$0x3,%XMM9

(179) 0x424f8f PADDQ	0xa0(%RSP),%XMM9

(179) 0x424f99 MOVQ	%XMM9,%RAX

(179) 0x424f9e PSHUFD	$-0x12,%XMM9,%XMM1

(179) 0x424fa4 MOVQ	%XMM1,%RDX

(179) 0x424fa9 MOVLPD	%XMM0,(%RAX)

(179) 0x424fad MOV	0x58(%RSP),%RAX

(179) 0x424fb2 MOVHPD	%XMM0,(%RDX)

(179) 0x424fb6 PADDQ	0x46471(%RIP),%XMM13

(179) 0x424fbf ADD	$0x2,%R12

(179) 0x424fc3 CMP	%RAX,%R12

(179) 0x424fc6 JB	424b40

0x424fcc CMP	%RAX,0x28(%RSP)

0x424fd1 MOV	0x50(%RSP),%RBP

0x424fd6 MOV	0x10(%RSP),%R10

0x424fdb MOV	0x48(%RSP),%R14

0x424fe0 MOV	0x40(%RSP),%R13

0x424fe5 MOV	0x38(%RSP),%R15

0x424fea MOV	0x30(%RSP),%R12

0x424fef JNE	42502d

0x424ff1 MOV	$0x47c990,%EDI

0x424ff6 MOV	0x8(%RSP),%ESI

0x424ffa ADD	$0x138,%RSP

0x425001 POP	%RBX

0x425002 POP	%R12

0x425004 POP	%R13

0x425006 POP	%R14

0x425008 POP	%R15

0x42500a POP	%RBP

0x42500b JMP	403050

0x425010 ADD	$0x138,%RSP

0x425017 POP	%RBX

0x425018 POP	%R12

0x42501a POP	%R13

0x42501c POP	%R14

0x42501e POP	%R15

0x425020 POP	%RBP

0x425021 RET

0x425022 MOV	%RDX,%R14

0x425025 MOV	%RSI,%R15

0x425028 JMP	42513d

0x42502d ADD	%RAX,%RCX

0x425030 JMP	42513d

0x425035 NOPW	%CS:(%RAX,%RAX,1)

(178) 0x425040 MOV	%RCX,%RAX

(178) 0x425043 CQTO

(178) 0x425045 IDIV	%RBP

(178) 0x425048 ADD	%R10D,%EDX

(178) 0x42504b MOVSXD	%EDX,%RAX

(178) 0x42504e LEA	-0x1(%RSI),%EDX

(178) 0x425051 MOVSXD	%EDX,%RDI

(178) 0x425054 MOV	%R14,%R8

(178) 0x425057 IMUL	%RDI,%R8

(178) 0x42505b IMUL	%R13,%RDI

(178) 0x42505f MOVSXD	%ESI,%RDX

(178) 0x425062 MOV	%R13,%RSI

(178) 0x425065 IMUL	%RDX,%RSI

(178) 0x425069 LEA	(%RDI,%RAX,1),%R9

(178) 0x42506d DEC	%R9

(178) 0x425070 ADD	%RAX,%RDI

(178) 0x425073 MOVSD	(%RBX,%RDI,8),%XMM0

(178) 0x425078 LEA	(%RSI,%RAX,1),%RDI

(178) 0x42507c DEC	%RDI

(178) 0x42507f ADD	%RAX,%RSI

(178) 0x425082 MOVHPD	(%RBX,%RSI,8),%XMM0

(178) 0x425087 MOVSD	(%RBX,%R9,8),%XMM1

(178) 0x42508d MOV	%R14,%RSI

(178) 0x425090 MOVHPD	(%RBX,%RDI,8),%XMM1

(178) 0x425095 IMUL	%RDX,%RSI

(178) 0x425099 LEA	(%R8,%RAX,1),%RDI

(178) 0x42509d DEC	%RDI

(178) 0x4250a0 ADD	%RAX,%R8

(178) 0x4250a3 MOVSD	(%R11,%R8,8),%XMM2

(178) 0x4250a9 LEA	(%RSI,%RAX,1),%R8

(178) 0x4250ad DEC	%R8

(178) 0x4250b0 ADD	%RAX,%RSI

(178) 0x4250b3 MOVHPD	(%R11,%RSI,8),%XMM2

(178) 0x4250b9 MULPD	%XMM0,%XMM2

(178) 0x4250bd MOVSD	(%R11,%RDI,8),%XMM0

(178) 0x4250c3 MOVHPD	(%R11,%R8,8),%XMM0

(178) 0x4250c9 MULPD	%XMM1,%XMM0

(178) 0x4250cd ADDPD	%XMM2,%XMM0

(178) 0x4250d1 MOVAPD	%XMM0,%XMM1

(178) 0x4250d5 UNPCKHPD	%XMM0,%XMM1

(178) 0x4250d9 ADDSD	%XMM0,%XMM1

(178) 0x4250dd MULSD	0x4631b(%RIP),%XMM1

(178) 0x4250e5 MOV	%R15,%RSI

(178) 0x4250e8 IMUL	%RDX,%RSI

(178) 0x4250ec ADD	%RAX,%RSI

(178) 0x4250ef MOVSD	%XMM1,(%R12,%RSI,8)

(178) 0x4250f5 MOV	0x78(%RSP),%RSI

(178) 0x4250fa IMUL	%RDX,%RSI

(178) 0x4250fe LEA	(%RSI,%RAX,1),%RDI

(178) 0x425102 DEC	%RDI

(178) 0x425105 MOV	0x70(%RSP),%R8

(178) 0x42510a SUBSD	(%R8,%RDI,8),%XMM1

(178) 0x425110 ADD	%RAX,%RSI

(178) 0x425113 ADDSD	(%R8,%RSI,8),%XMM1

(178) 0x425119 IMUL	0x68(%RSP),%RDX

(178) 0x42511f ADD	%RAX,%RDX

(178) 0x425122 MOV	0x60(%RSP),%RAX

(178) 0x425127 MOVSD	%XMM1,(%RAX,%RDX,8)

(178) 0x42512c INC	%RCX

(178) 0x42512f CMP	%RCX,0x80(%RSP)

(178) 0x425137 JE	424ff1

(178) 0x42513d MOV	%RCX,%RDI

(178) 0x425140 SHR	$0x20,%RDI

(178) 0x425144 JE	425160

(178) 0x425146 MOV	%RCX,%RAX

(178) 0x425149 XOR	%EDX,%EDX

(178) 0x42514b DIV	%RBP

(178) 0x42514e MOV	%RAX,%RSI

(178) 0x425151 ADD	0x4(%RSP),%ESI

(178) 0x425155 TEST	%RDI,%RDI

(178) 0x425158 JNE	425040

(178) 0x42515e JMP	425175

(178) 0x425160 MOV	%ECX,%EAX

(178) 0x425162 XOR	%EDX,%EDX

(178) 0x425164 DIV	%EBP

(178) 0x425166 MOV	%EAX,%ESI

(178) 0x425168 ADD	0x4(%RSP),%ESI

(178) 0x42516c TEST	%RDI,%RDI

(178) 0x42516f JNE	425040

(178) 0x425175 MOV	%ECX,%EAX

(178) 0x425177 XOR	%EDX,%EDX

(178) 0x425179 DIV	%EBP

(178) 0x42517b JMP	425048

Coverage (%)	Name	Module
►48.16+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
○	__GI___clone3	libc.so.6
►40.95+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
►5.42+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
►2.32+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
►1.59+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_fork_call	libiomp5.so
○	__kmpc_fork_call	libiomp5.so
○	advec_mom_kernel(int, int, int[...]	exec
○	advec_mom_driver(global_variab[...]	exec
○	advection(global_variables&)	exec
○	hydro(global_variables&, paral[...]	exec
○	main	exec
○	__libc_start_call_main	libc.so.6
○	__libc_start_main	libc.so.6
○	_start	exec
►1.56+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_fork_call	libiomp5.so
○	__kmpc_fork_call	libiomp5.so
○	advec_mom_kernel(int, int, int[...]	exec
○	advec_mom_driver(global_variab[...]	exec
○	advection(global_variables&)	exec
○	hydro(global_variables&, paral[...]	exec
○	main	exec
○	__libc_start_call_main	libc.so.6
○	__libc_start_main	libc.so.6
○	_start	exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_0

Source file and lines
Module	exec

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 19.88 to 8.13 cycles (2.45x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is poorly vectorized. Only 15% of vector register length is used (average across all SSE/AVX instructions). By fully vectorizing your function, you can lower the cost of an iteration from 19.88 to 2.14 cycles (9.30x speedup).

Details

33% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

6% of SSE/AVX loads are used in vector version.
34% of SSE/AVX stores are used in vector version.
50% of SSE/AVX addition or subtraction instructions are used in vector version.
46% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

__kmpc_for_static_init_8@plt: 1 occurrences►

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

MOVD: 2 occurrences►
MOVQ: 11 occurrences►

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 224 bytes. The binary function is storing 300 bytes.

General properties

nb instructions	147
nb uops	159
loop length	708
used x86 registers	16
used mmx registers	0
used xmm registers	7
used ymm registers	0
used zmm registers	0
nb stack references	35

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	19.88 cycles
front end	19.88 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	5.00	5.00	5.00	5.00	5.00	5.00	14.75	14.75	14.75	14.75	7.25	7.25	7.25	7.25	5.00	5.00
cycles	5.00	5.00	5.00	5.00	5.00	5.00	14.75	14.75	14.75	14.75	7.25	7.25	7.25	7.25	5.00	5.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	19.88
Dispatch	14.75
Overall L1	19.88

Vectorization ratios

all	33%
load	6%
store	34%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	50%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	46%

Vector efficiency ratios

all	15%
load	12%
store	15%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	15%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	17%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 19.88 cycles. At this rate:

4% of peak load performance is reached (11.27 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
11% of peak store performance is reached (15.09 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 19.88 to 14.75 cycles (1.35x speedup).

ASM code

In the binary file, the address of the function is: 4248f0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x138,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RCX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x198(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x188(%RSP),%RBP	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x180(%RSP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x170(%RSP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x178(%RSP),%ECX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %ECX,0x4(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOVL $0,0xc(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
TEST %RAX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JS 425010 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.44+0x720>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %R9,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R8,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOVQ $0,0x20(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %RAX,0x18(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ $0x1,0x88(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA 0x90(%RSP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x14(%RSP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x28(%RSP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x20(%RSP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV $0x47c970,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %ESI,0x10(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %R10,0x30(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CALL 4031e0 <__kmpc_for_static_init_8@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV 0x30(%RSP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x20(%RSP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x18(%RSP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
CMP %RDX,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JA 424ff1 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.44+0x701>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %RDX,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %R10D,%EBP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV (%R13),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x10(%R13),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV (%RBX),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%RBX),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R12),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x10(%R12),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R15),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%R15),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV (%R14),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x10(%R14),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,0x80(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RAX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %RCX,%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV $-0x2,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND %R15,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R8,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDI,0x78(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R9,0x68(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R14,0x60(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
JE 425022 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.44+0x732>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %R15,0x28(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RBP,0x50(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVD %EBP,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (6.3%)
PSHUFD $0x44,%XMM0,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVD 0x4(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	scal (6.3%)
PSHUFD $0x50,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x110(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVD %R10D,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (6.3%)
PSHUFD $0x50,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x100(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOV %RDX,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ %RDX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM14	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVQ %R11,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM4	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOV %R13,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ %R13,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVQ %RBX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM6	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOV %RSI,0x38(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ %RSI,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xf0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOV %R12,0x30(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ %R12,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xe0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RDI,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xd0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R8,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xc0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R9,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xb0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R14,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xa0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RCX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM13	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
PADDQ 0x468fb(%RIP),%XMM13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	vect (25.0%)
XOR %R12D,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOVDQA %XMM1,0x120(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
PSHUFD $-0x12,%XMM1,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x90(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOV %RAX,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CMP %RAX,0x28(%RSP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOV 0x50(%RSP),%RBP	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x10(%RSP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x48(%RSP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x40(%RSP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x38(%RSP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x30(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JNE 42502d <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.44+0x73d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV $0x47c990,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x8(%RSP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
ADD $0x138,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 403050 <__kmpc_for_static_fini@plt>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD $0x138,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RDX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RSI,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 42513d <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.44+0x84d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %RAX,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 42513d <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.44+0x84d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_0

Source file and lines
Module	exec

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 19.88 to 8.13 cycles (2.45x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

33% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

6% of SSE/AVX loads are used in vector version.
34% of SSE/AVX stores are used in vector version.
50% of SSE/AVX addition or subtraction instructions are used in vector version.
46% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

__kmpc_for_static_init_8@plt: 1 occurrences►

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

MOVD: 2 occurrences►
MOVQ: 11 occurrences►

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 224 bytes. The binary function is storing 300 bytes.

General properties

nb instructions	147
nb uops	159
loop length	708
used x86 registers	16
used mmx registers	0
used xmm registers	7
used ymm registers	0
used zmm registers	0
nb stack references	35

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	19.88 cycles
front end	19.88 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	5.00	5.00	5.00	5.00	5.00	5.00	14.75	14.75	14.75	14.75	7.25	7.25	7.25	7.25	5.00	5.00
cycles	5.00	5.00	5.00	5.00	5.00	5.00	14.75	14.75	14.75	14.75	7.25	7.25	7.25	7.25	5.00	5.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	19.88
Dispatch	14.75
Overall L1	19.88

Vectorization ratios

all	33%
load	6%
store	34%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	50%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	46%

Vector efficiency ratios

all	15%
load	12%
store	15%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	15%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	17%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 19.88 cycles. At this rate:

4% of peak load performance is reached (11.27 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
11% of peak store performance is reached (15.09 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 4248f0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x138,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RCX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x198(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x188(%RSP),%RBP	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x180(%RSP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x170(%RSP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x178(%RSP),%ECX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %ECX,0x4(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOVL $0,0xc(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
TEST %RAX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JS 425010 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.44+0x720>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %R9,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R8,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOVQ $0,0x20(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %RAX,0x18(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ $0x1,0x88(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA 0x90(%RSP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x14(%RSP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x28(%RSP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x20(%RSP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV $0x47c970,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %ESI,0x10(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %R10,0x30(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CALL 4031e0 <__kmpc_for_static_init_8@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV 0x30(%RSP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x20(%RSP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x18(%RSP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
CMP %RDX,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JA 424ff1 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.44+0x701>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %RDX,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %R10D,%EBP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV (%R13),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x10(%R13),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV (%RBX),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%RBX),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R12),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x10(%R12),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R15),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%R15),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV (%R14),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x10(%R14),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RAX,0x80(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RAX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %RCX,%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV $-0x2,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND %R15,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R8,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDI,0x78(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R9,0x68(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R14,0x60(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
JE 425022 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.44+0x732>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %R15,0x28(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RBP,0x50(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVD %EBP,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (6.3%)
PSHUFD $0x44,%XMM0,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVD 0x4(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	scal (6.3%)
PSHUFD $0x50,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x110(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVD %R10D,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (6.3%)
PSHUFD $0x50,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x100(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOV %RDX,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ %RDX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM14	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVQ %R11,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM4	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOV %R13,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ %R13,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVQ %RBX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM6	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOV %RSI,0x38(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ %RSI,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xf0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOV %R12,0x30(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ %R12,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xe0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RDI,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xd0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R8,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xc0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R9,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xb0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R14,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xa0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RCX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM13	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
PADDQ 0x468fb(%RIP),%XMM13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	vect (25.0%)
XOR %R12D,%R12D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOVDQA %XMM1,0x120(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
PSHUFD $-0x12,%XMM1,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x90(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOV %RAX,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CMP %RAX,0x28(%RSP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOV 0x50(%RSP),%RBP	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x10(%RSP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x48(%RSP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x40(%RSP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x38(%RSP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x30(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JNE 42502d <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.44+0x73d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV $0x47c990,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x8(%RSP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
ADD $0x138,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 403050 <__kmpc_for_static_fini@plt>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD $0x138,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RDX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RSI,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 42513d <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.44+0x84d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %RAX,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 42513d <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.44+0x84d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼advec_mom_kernel(int, int, int, int, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clo...–	2.83	1.16
○Loop 179 - - exec	2.83	1.16
○Loop 178 - - exec	0.00	0.00

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Code clean check

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CALL instructions

Details

Complex instructions

Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code