OV - exec - Function advec_mom_kernel(int, int, int, int, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer1D<double>&, clover::Buffer1D<double>&, int, int, int) [clone .extracted.16]

	Function: advec_mom_kernel(int, int, int, int, clover::Buffer2D<double>&, clover::Buffer2D<double>&, ...	Module: exec	Source: :0-0	Coverage (incl. loops): 2.85% \| (excl. loops): 0.00%

  ***  This Panel is Intentionally Left Blank.  ***

It is due to a lack of debug symbols in the given object
(loop or function).

0x422cb0 PUSH	%RBP

0x422cb1 PUSH	%R15

0x422cb3 PUSH	%R14

0x422cb5 PUSH	%R13

0x422cb7 PUSH	%R12

0x422cb9 PUSH	%RBX

0x422cba SUB	$0x168,%RSP

0x422cc1 MOV	%RCX,%R15

0x422cc4 MOV	%RDX,%R13

0x422cc7 MOV	0x1c8(%RSP),%RAX

0x422ccf MOV	0x1b8(%RSP),%RBP

0x422cd7 MOV	0x1b0(%RSP),%RCX

0x422cdf MOV	0x1a0(%RSP),%RBX

0x422ce7 MOV	0x1a8(%RSP),%EDX

0x422cee MOV	%EDX,0x4(%RSP)

0x422cf2 MOVL	$0,0x1c(%RSP)

0x422cfa TEST	%RAX,%RAX

0x422cfd JS	4233fe

0x422d03 MOV	%R9,%R14

0x422d06 MOV	%R8,%R12

0x422d09 MOV	%RCX,0x10(%RSP)

0x422d0e MOV	(%RDI),%ESI

0x422d10 MOVQ	$0,0x30(%RSP)

0x422d19 MOV	%RAX,0x28(%RSP)

0x422d1e MOVQ	$0x1,0x78(%RSP)

0x422d27 SUB	$0x8,%RSP

0x422d2b LEA	0x80(%RSP),%RAX

0x422d33 LEA	0x24(%RSP),%RCX

0x422d38 LEA	0x38(%RSP),%R8

0x422d3d LEA	0x30(%RSP),%R9

0x422d42 MOV	$0x47c7f0,%EDI

0x422d47 MOV	%ESI,0x20(%RSP)

0x422d4b MOV	$0x22,%EDX

0x422d50 PUSH	$0x1

0x422d52 PUSH	$0x1

0x422d54 PUSH	%RAX

0x422d55 CALL	4031e0 <__kmpc_for_static_init_8@plt>

0x422d5a ADD	$0x20,%RSP

0x422d5e MOV	0x30(%RSP),%RCX

0x422d63 MOV	0x28(%RSP),%RAX

0x422d68 CMP	%RAX,%RCX

0x422d6b JA	4233df

0x422d71 MOV	%RAX,%RDX

0x422d74 MOV	0x10(%RSP),%RAX

0x422d79 SUB	%EAX,%EBP

0x422d7b MOV	(%R13),%RSI

0x422d7f MOV	0x10(%R13),%R10

0x422d83 MOV	(%RBX),%R8

0x422d86 MOV	0x10(%RBX),%R13

0x422d8a MOV	(%R12),%RDI

0x422d8e MOV	0x10(%R12),%R9

0x422d93 MOV	%R9,0x8(%RSP)

0x422d98 MOV	(%R15),%R12

0x422d9b MOV	0x10(%R15),%R9

0x422d9f MOV	(%R14),%RBX

0x422da2 MOV	0x10(%R14),%R14

0x422da6 INC	%RDX

0x422da9 MOV	%RDX,0x70(%RSP)

0x422dae SUB	%RCX,%RDX

0x422db1 MOV	$-0x2,%R11D

0x422db7 AND	%RDX,%R11

0x422dba MOV	%R9,0x68(%RSP)

0x422dbf MOV	%R8,0x20(%RSP)

0x422dc4 MOV	%RBX,0x60(%RSP)

0x422dc9 MOV	%R14,0x58(%RSP)

0x422dce JE	423410

0x422dd4 MOV	%RDX,0x38(%RSP)

0x422dd9 MOV	%RBP,0x50(%RSP)

0x422dde MOVD	%EBP,%XMM0

0x422de2 PSHUFD	$0x44,%XMM0,%XMM1

0x422de7 MOVD	0x4(%RSP),%XMM0

0x422ded PSHUFD	$0x50,%XMM0,%XMM0

0x422df2 MOVDQA	%XMM0,0x140(%RSP)

0x422dfb MOVD	%EAX,%XMM0

0x422dff PSHUFD	$0x50,%XMM0,%XMM0

0x422e04 MOVDQA	%XMM0,0x130(%RSP)

0x422e0d MOV	%RSI,0x48(%RSP)

0x422e12 MOVQ	%RSI,%XMM0

0x422e17 PSHUFD	$0x44,%XMM0,%XMM0

0x422e1c MOVDQA	%XMM0,0x100(%RSP)

0x422e25 MOVQ	%R10,%XMM0

0x422e2a PSHUFD	$0x44,%XMM0,%XMM0

0x422e2f MOVDQA	%XMM0,0x120(%RSP)

0x422e38 MOVQ	%R8,%XMM0

0x422e3d PSHUFD	$0x44,%XMM0,%XMM0

0x422e42 MOVDQA	%XMM0,0x90(%RSP)

0x422e4b MOVQ	%R13,%XMM0

0x422e50 PSHUFD	$0x44,%XMM0,%XMM0

0x422e55 MOVDQA	%XMM0,0x110(%RSP)

0x422e5e MOV	%RDI,0x40(%RSP)

0x422e63 MOVQ	%RDI,%XMM0

0x422e68 PSHUFD	$0x44,%XMM0,%XMM0

0x422e6d MOVDQA	%XMM0,0xf0(%RSP)

0x422e76 MOVQ	0x8(%RSP),%XMM0

0x422e7c PSHUFD	$0x44,%XMM0,%XMM0

0x422e81 MOVDQA	%XMM0,0xe0(%RSP)

0x422e8a MOVQ	%R12,%XMM0

0x422e8f PSHUFD	$0x44,%XMM0,%XMM0

0x422e94 MOVDQA	%XMM0,0x80(%RSP)

0x422e9d MOVQ	%R9,%XMM0

0x422ea2 PSHUFD	$0x44,%XMM0,%XMM0

0x422ea7 MOVDQA	%XMM0,0xd0(%RSP)

0x422eb0 MOVQ	%RBX,%XMM0

0x422eb5 PSHUFD	$0x44,%XMM0,%XMM0

0x422eba MOVDQA	%XMM0,0xc0(%RSP)

0x422ec3 MOVQ	%R14,%XMM0

0x422ec8 PSHUFD	$0x44,%XMM0,%XMM0

0x422ecd MOVDQA	%XMM0,0xb0(%RSP)

0x422ed6 MOVQ	%RCX,%XMM0

0x422edb PSHUFD	$0x44,%XMM0,%XMM13

0x422ee1 PADDQ	0x48526(%RIP),%XMM13

0x422eea XOR	%EBX,%EBX

0x422eec MOVDQA	%XMM1,0x150(%RSP)

0x422ef5 PSHUFD	$-0x12,%XMM1,%XMM0

0x422efa MOVDQA	%XMM0,0xa0(%RSP)

0x422f03 PXOR	%XMM6,%XMM6

0x422f07 NOPW	(%RAX,%RAX,1)

(171) 0x422f10 MOVQ	%XMM13,%RSI

(171) 0x422f15 MOVDQA	0x150(%RSP),%XMM0

(171) 0x422f1e MOVQ	%XMM0,%R8

(171) 0x422f23 MOV	%RSI,%RAX

(171) 0x422f26 XOR	%EDX,%EDX

(171) 0x422f28 DIV	%R8

(171) 0x422f2b PSHUFD	$-0x12,%XMM13,%XMM0

(171) 0x422f31 MOVQ	%XMM0,%RDI

(171) 0x422f36 MOVDQA	0xa0(%RSP),%XMM0

(171) 0x422f3f MOVQ	%XMM0,%R14

(171) 0x422f44 MOVQ	%RAX,%XMM0

(171) 0x422f49 MOV	%RDI,%RAX

(171) 0x422f4c XOR	%EDX,%EDX

(171) 0x422f4e DIV	%R14

(171) 0x422f51 MOVQ	%RAX,%XMM1

(171) 0x422f56 PUNPCKLQDQ	%XMM1,%XMM0

(171) 0x422f5a PSHUFD	$-0x18,%XMM0,%XMM15

(171) 0x422f60 PADDD	0x140(%RSP),%XMM15

(171) 0x422f6a MOV	%RSI,%RAX

(171) 0x422f6d CQTO

(171) 0x422f6f IDIV	%R8

(171) 0x422f72 MOVQ	%RDX,%XMM0

(171) 0x422f77 MOV	%RDI,%RAX

(171) 0x422f7a CQTO

(171) 0x422f7c IDIV	%R14

(171) 0x422f7f MOVQ	%RDX,%XMM1

(171) 0x422f84 PXOR	%XMM5,%XMM5

(171) 0x422f88 PUNPCKLQDQ	%XMM1,%XMM0

(171) 0x422f8c MOVDQA	%XMM15,%XMM2

(171) 0x422f91 PCMPEQD	%XMM1,%XMM1

(171) 0x422f95 PADDD	%XMM1,%XMM2

(171) 0x422f99 PXOR	%XMM12,%XMM12

(171) 0x422f9e PSHUFD	$-0x18,%XMM0,%XMM0

(171) 0x422fa3 PCMPGTD	%XMM2,%XMM12

(171) 0x422fa8 PUNPCKLDQ	%XMM12,%XMM2

(171) 0x422fad MOVDQA	0x100(%RSP),%XMM7

(171) 0x422fb6 MOVDQA	%XMM7,%XMM8

(171) 0x422fbb PADDD	0x130(%RSP),%XMM0

(171) 0x422fc4 PMULUDQ	%XMM2,%XMM8

(171) 0x422fc9 MOVDQA	%XMM7,%XMM10

(171) 0x422fce PSRLQ	$0x20,%XMM10

(171) 0x422fd4 PCMPGTD	%XMM0,%XMM5

(171) 0x422fd8 MOVDQA	%XMM10,%XMM14

(171) 0x422fdd PMULUDQ	%XMM2,%XMM14

(171) 0x422fe2 PUNPCKLDQ	%XMM6,%XMM12

(171) 0x422fe7 MOVDQA	%XMM0,%XMM1

(171) 0x422feb MOVDQA	%XMM7,%XMM3

(171) 0x422fef PMULUDQ	%XMM12,%XMM3

(171) 0x422ff4 MOVDQA	0x90(%RSP),%XMM9

(171) 0x422ffe MOVDQA	%XMM9,%XMM4

(171) 0x423003 PUNPCKLDQ	%XMM5,%XMM1

(171) 0x423007 PSRLQ	$0x20,%XMM4

(171) 0x42300c MOVDQA	%XMM4,%XMM11

(171) 0x423011 PMULUDQ	%XMM2,%XMM11

(171) 0x423016 PADDQ	%XMM14,%XMM3

(171) 0x42301b MOVDQA	%XMM9,%XMM5

(171) 0x423020 PMULUDQ	%XMM12,%XMM5

(171) 0x423025 PADDQ	%XMM11,%XMM5

(171) 0x42302a PSLLQ	$0x20,%XMM3

(171) 0x42302f MOVDQA	%XMM9,%XMM11

(171) 0x423034 PMULUDQ	%XMM2,%XMM11

(171) 0x423039 PSLLQ	$0x20,%XMM5

(171) 0x42303e PADDQ	%XMM8,%XMM3

(171) 0x423043 PXOR	%XMM8,%XMM8

(171) 0x423048 PCMPGTD	%XMM15,%XMM8

(171) 0x42304d PUNPCKLDQ	%XMM8,%XMM15

(171) 0x423052 PADDQ	%XMM11,%XMM5

(171) 0x423057 PMULUDQ	%XMM15,%XMM10

(171) 0x42305c PUNPCKLDQ	%XMM6,%XMM8

(171) 0x423061 MOVDQA	%XMM7,%XMM14

(171) 0x423066 PMULUDQ	%XMM8,%XMM14

(171) 0x42306b PADDQ	%XMM10,%XMM14

(171) 0x423070 MOVDQA	%XMM7,%XMM10

(171) 0x423075 PMULUDQ	%XMM15,%XMM10

(171) 0x42307a PSLLQ	$0x20,%XMM14

(171) 0x423080 PADDQ	%XMM10,%XMM14

(171) 0x423085 PMULUDQ	%XMM15,%XMM4

(171) 0x42308a MOVDQA	%XMM9,%XMM10

(171) 0x42308f PMULUDQ	%XMM8,%XMM10

(171) 0x423094 PADDQ	%XMM4,%XMM10

(171) 0x423099 PMULUDQ	%XMM15,%XMM9

(171) 0x42309e PSLLQ	$0x20,%XMM10

(171) 0x4230a4 PADDQ	%XMM9,%XMM10

(171) 0x4230a9 MOVDQA	%XMM14,%XMM4

(171) 0x4230ae PADDQ	%XMM1,%XMM4

(171) 0x4230b2 PSLLQ	$0x3,%XMM4

(171) 0x4230b7 MOVDQA	0x120(%RSP),%XMM11

(171) 0x4230c1 PADDQ	%XMM11,%XMM4

(171) 0x4230c6 MOVQ	%XMM4,%RSI

(171) 0x4230cb PSHUFD	$-0x12,%XMM4,%XMM4

(171) 0x4230d0 MOVQ	%XMM4,%RDX

(171) 0x4230d5 MOVDQA	%XMM3,%XMM4

(171) 0x4230d9 PADDQ	%XMM1,%XMM4

(171) 0x4230dd PSLLQ	$0x3,%XMM4

(171) 0x4230e2 PADDQ	%XMM11,%XMM4

(171) 0x4230e7 MOVQ	%XMM4,%RAX

(171) 0x4230ec PSHUFD	$-0x12,%XMM4,%XMM4

(171) 0x4230f1 PADDD	0x48367(%RIP),%XMM0

(171) 0x4230f9 MOVQ	%XMM4,%RDI

(171) 0x4230fe PXOR	%XMM4,%XMM4

(171) 0x423102 PCMPGTD	%XMM0,%XMM4

(171) 0x423106 PUNPCKLDQ	%XMM4,%XMM0

(171) 0x42310a MOVDQA	%XMM5,%XMM4

(171) 0x42310e PADDQ	%XMM1,%XMM4

(171) 0x423112 PSLLQ	$0x3,%XMM4

(171) 0x423117 MOVDQA	0x110(%RSP),%XMM7

(171) 0x423120 PADDQ	%XMM7,%XMM4

(171) 0x423124 MOVQ	%XMM4,%R8

(171) 0x423129 PSHUFD	$-0x12,%XMM4,%XMM4

(171) 0x42312e PADDQ	%XMM0,%XMM3

(171) 0x423132 PADDQ	%XMM0,%XMM5

(171) 0x423136 MOVQ	%XMM4,%R14

(171) 0x42313b PADDQ	%XMM0,%XMM14

(171) 0x423140 PADDQ	%XMM10,%XMM0

(171) 0x423145 MOVSD	(%RSI),%XMM4

(171) 0x423149 PADDQ	%XMM1,%XMM10

(171) 0x42314e PSLLQ	$0x3,%XMM10

(171) 0x423154 PADDQ	%XMM7,%XMM10

(171) 0x423159 MOVQ	%XMM10,%RSI

(171) 0x42315e PSHUFD	$-0x12,%XMM10,%XMM10

(171) 0x423164 PSLLQ	$0x3,%XMM3

(171) 0x423169 MOVHPD	(%RDX),%XMM4

(171) 0x42316d PADDQ	%XMM11,%XMM3

(171) 0x423172 MOVQ	%XMM3,%RDX

(171) 0x423177 PSHUFD	$-0x12,%XMM3,%XMM3

(171) 0x42317c MOVQ	%XMM10,%RBP

(171) 0x423181 MOVQ	%XMM3,%R9

(171) 0x423186 PSLLQ	$0x3,%XMM5

(171) 0x42318b PADDQ	%XMM7,%XMM5

(171) 0x42318f MOVSD	(%RDX),%XMM3

(171) 0x423193 MOVQ	%XMM5,%RDX

(171) 0x423198 PSHUFD	$-0x12,%XMM5,%XMM5

(171) 0x42319d MOVQ	%XMM5,%R15

(171) 0x4231a2 MOVSD	(%RAX),%XMM5

(171) 0x4231a6 PSLLQ	$0x3,%XMM14

(171) 0x4231ac PADDQ	%XMM11,%XMM14

(171) 0x4231b1 MOVQ	%XMM14,%RAX

(171) 0x4231b6 MOVSD	(%R8),%XMM11

(171) 0x4231bb PSHUFD	$-0x12,%XMM14,%XMM10

(171) 0x4231c1 MOVQ	%XMM10,%R8

(171) 0x4231c6 MOVHPD	(%R9),%XMM3

(171) 0x4231cb MOVSD	(%RSI),%XMM10

(171) 0x4231d0 PSLLQ	$0x3,%XMM0

(171) 0x4231d5 MOVHPD	(%RDI),%XMM5

(171) 0x4231d9 PADDQ	%XMM7,%XMM0

(171) 0x4231dd MOVQ	%XMM0,%RSI

(171) 0x4231e2 MOVHPD	(%R14),%XMM11

(171) 0x4231e7 PSHUFD	$-0x12,%XMM0,%XMM0

(171) 0x4231ec MOVQ	%XMM0,%RDI

(171) 0x4231f1 MOVHPD	(%RBP),%XMM10

(171) 0x4231f7 MOVSD	(%RDX),%XMM14

(171) 0x4231fc MOVHPD	(%R15),%XMM14

(171) 0x423201 MULPD	%XMM3,%XMM14

(171) 0x423206 MOVSD	(%RAX),%XMM3

(171) 0x42320a MOVHPD	(%R8),%XMM3

(171) 0x42320f MULPD	%XMM5,%XMM11

(171) 0x423214 MOVSD	(%RSI),%XMM0

(171) 0x423218 MOVHPD	(%RDI),%XMM0

(171) 0x42321c MULPD	%XMM4,%XMM10

(171) 0x423221 MULPD	%XMM3,%XMM0

(171) 0x423225 MOVDQA	0xf0(%RSP),%XMM5

(171) 0x42322e MOVDQA	%XMM5,%XMM3

(171) 0x423232 PSRLQ	$0x20,%XMM3

(171) 0x423237 PMULUDQ	%XMM15,%XMM3

(171) 0x42323c MOVDQA	%XMM5,%XMM4

(171) 0x423240 PMULUDQ	%XMM8,%XMM4

(171) 0x423245 PADDQ	%XMM3,%XMM4

(171) 0x423249 ADDPD	%XMM14,%XMM0

(171) 0x42324e MOVDQA	%XMM5,%XMM3

(171) 0x423252 PMULUDQ	%XMM15,%XMM3

(171) 0x423257 PADDQ	%XMM1,%XMM3

(171) 0x42325b PSLLQ	$0x20,%XMM4

(171) 0x423260 PADDQ	%XMM4,%XMM3

(171) 0x423264 MOVDQA	0x80(%RSP),%XMM4

(171) 0x42326d MOVDQA	%XMM4,%XMM5

(171) 0x423271 PMULUDQ	%XMM2,%XMM5

(171) 0x423275 ADDPD	%XMM11,%XMM10

(171) 0x42327a MOVDQA	%XMM4,%XMM11

(171) 0x42327f PSRLQ	$0x20,%XMM11

(171) 0x423285 PMULUDQ	%XMM11,%XMM2

(171) 0x42328a PMULUDQ	%XMM4,%XMM12

(171) 0x42328f PADDQ	%XMM2,%XMM12

(171) 0x423294 PSLLQ	$0x20,%XMM12

(171) 0x42329a PADDQ	%XMM1,%XMM5

(171) 0x42329e PADDQ	%XMM12,%XMM5

(171) 0x4232a3 MOVDQA	%XMM4,%XMM2

(171) 0x4232a7 PMULUDQ	%XMM15,%XMM2

(171) 0x4232ac PMULUDQ	%XMM15,%XMM11

(171) 0x4232b1 ADDPD	%XMM10,%XMM0

(171) 0x4232b6 PMULUDQ	%XMM8,%XMM4

(171) 0x4232bb PADDQ	%XMM11,%XMM4

(171) 0x4232c0 PSLLQ	$0x20,%XMM4

(171) 0x4232c5 PADDQ	%XMM1,%XMM2

(171) 0x4232c9 MOVDQA	0xc0(%RSP),%XMM7

(171) 0x4232d2 MOVDQA	%XMM7,%XMM10

(171) 0x4232d7 PMULUDQ	%XMM15,%XMM10

(171) 0x4232dc PADDQ	%XMM4,%XMM2

(171) 0x4232e0 MOVDQA	%XMM7,%XMM4

(171) 0x4232e4 PSRLQ	$0x20,%XMM4

(171) 0x4232e9 PMULUDQ	%XMM15,%XMM4

(171) 0x4232ee PSLLQ	$0x3,%XMM3

(171) 0x4232f3 PADDQ	0xe0(%RSP),%XMM3

(171) 0x4232fc MOVQ	%XMM3,%RAX

(171) 0x423301 PSHUFD	$-0x12,%XMM3,%XMM3

(171) 0x423306 MOVQ	%XMM3,%RDX

(171) 0x42330b PMULUDQ	%XMM7,%XMM8

(171) 0x423310 PADDQ	%XMM4,%XMM8

(171) 0x423315 PADDQ	%XMM1,%XMM10

(171) 0x42331a PSLLQ	$0x3,%XMM5

(171) 0x42331f MOVDQA	0xd0(%RSP),%XMM3

(171) 0x423328 PADDQ	%XMM3,%XMM5

(171) 0x42332c MOVQ	%XMM5,%RSI

(171) 0x423331 PSHUFD	$-0x12,%XMM5,%XMM1

(171) 0x423336 MOVQ	%XMM1,%RDI

(171) 0x42333b MULPD	0x480dd(%RIP),%XMM0

(171) 0x423343 MOVLPD	%XMM0,(%RAX)

(171) 0x423347 PSLLQ	$0x3,%XMM2

(171) 0x42334c MOVHPD	%XMM0,(%RDX)

(171) 0x423350 PADDQ	%XMM3,%XMM2

(171) 0x423354 MOVQ	%XMM2,%RAX

(171) 0x423359 PSHUFD	$-0x12,%XMM2,%XMM1

(171) 0x42335e MOVQ	%XMM1,%RDX

(171) 0x423363 MOVSD	(%RSI),%XMM1

(171) 0x423367 MOVHPD	(%RDI),%XMM1

(171) 0x42336b SUBPD	%XMM1,%XMM0

(171) 0x42336f MOVSD	(%RAX),%XMM1

(171) 0x423373 MOVHPD	(%RDX),%XMM1

(171) 0x423377 ADDPD	%XMM0,%XMM1

(171) 0x42337b PSLLQ	$0x20,%XMM8

(171) 0x423381 PADDQ	%XMM8,%XMM10

(171) 0x423386 PSLLQ	$0x3,%XMM10

(171) 0x42338c PADDQ	0xb0(%RSP),%XMM10

(171) 0x423396 MOVQ	%XMM10,%RAX

(171) 0x42339b PSHUFD	$-0x12,%XMM10,%XMM0

(171) 0x4233a1 MOVQ	%XMM0,%RDX

(171) 0x4233a6 MOVLPD	%XMM1,(%RAX)

(171) 0x4233aa MOVHPD	%XMM1,(%RDX)

(171) 0x4233ae PADDQ	0x48079(%RIP),%XMM13

(171) 0x4233b7 ADD	$0x2,%RBX

(171) 0x4233bb CMP	%R11,%RBX

(171) 0x4233be JB	422f10

0x4233c4 CMP	%R11,0x38(%RSP)

0x4233c9 MOV	0x50(%RSP),%RBP

0x4233ce MOV	0x48(%RSP),%RBX

0x4233d3 MOV	0x40(%RSP),%R14

0x4233d8 MOV	0x8(%RSP),%R15

0x4233dd JNE	423420

0x4233df MOV	$0x47c810,%EDI

0x4233e4 MOV	0x18(%RSP),%ESI

0x4233e8 ADD	$0x168,%RSP

0x4233ef POP	%RBX

0x4233f0 POP	%R12

0x4233f2 POP	%R13

0x4233f4 POP	%R14

0x4233f6 POP	%R15

0x4233f8 POP	%RBP

0x4233f9 JMP	403050

0x4233fe ADD	$0x168,%RSP

0x423405 POP	%RBX

0x423406 POP	%R12

0x423408 POP	%R13

0x42340a POP	%R14

0x42340c POP	%R15

0x42340e POP	%RBP

0x42340f RET

0x423410 MOV	%RSI,%RBX

0x423413 MOV	%RDI,%R14

0x423416 MOV	0x8(%RSP),%R15

0x42341b JMP	423532

0x423420 ADD	%R11,%RCX

0x423423 JMP	423532

0x423428 NOPL	(%RAX,%RAX,1)

(170) 0x423430 MOV	%RCX,%RAX

(170) 0x423433 CQTO

(170) 0x423435 IDIV	%RBP

(170) 0x423438 ADD	%R8D,%EDX

(170) 0x42343b MOVSXD	%EDX,%RAX

(170) 0x42343e LEA	-0x1(%RSI),%EDX

(170) 0x423441 MOVSXD	%EDX,%RDI

(170) 0x423444 MOV	%R9,%R8

(170) 0x423447 IMUL	%RDI,%R8

(170) 0x42344b MOVSXD	%ESI,%RDX

(170) 0x42344e MOV	%R9,%RSI

(170) 0x423451 IMUL	%RDX,%RSI

(170) 0x423455 LEA	(%R8,%RAX,1),%R9

(170) 0x423459 DEC	%R9

(170) 0x42345c ADD	%RAX,%R8

(170) 0x42345f MOVSD	(%R13,%R8,8),%XMM0

(170) 0x423466 LEA	(%RSI,%RAX,1),%R8

(170) 0x42346a DEC	%R8

(170) 0x42346d ADD	%RAX,%RSI

(170) 0x423470 MOVHPD	(%R13,%RSI,8),%XMM0

(170) 0x423477 MOV	%RBX,%RSI

(170) 0x42347a IMUL	%RDI,%RSI

(170) 0x42347e MOVSD	(%R13,%R9,8),%XMM1

(170) 0x423485 MOV	%RBX,%R9

(170) 0x423488 IMUL	%RDX,%R9

(170) 0x42348c MOVHPD	(%R13,%R8,8),%XMM1

(170) 0x423493 LEA	(%RSI,%RAX,1),%R8

(170) 0x423497 DEC	%R8

(170) 0x42349a ADD	%RAX,%RSI

(170) 0x42349d MOVSD	(%R10,%RSI,8),%XMM2

(170) 0x4234a3 LEA	(%R9,%RAX,1),%RSI

(170) 0x4234a7 DEC	%RSI

(170) 0x4234aa ADD	%RAX,%R9

(170) 0x4234ad MOVHPD	(%R10,%R9,8),%XMM2

(170) 0x4234b3 MOVSD	(%R10,%R8,8),%XMM3

(170) 0x4234b9 MULPD	%XMM0,%XMM2

(170) 0x4234bd MOVHPD	(%R10,%RSI,8),%XMM3

(170) 0x4234c3 MULPD	%XMM1,%XMM3

(170) 0x4234c7 ADDPD	%XMM2,%XMM3

(170) 0x4234cb MOVAPD	%XMM3,%XMM0

(170) 0x4234cf UNPCKHPD	%XMM3,%XMM0

(170) 0x4234d3 ADDSD	%XMM3,%XMM0

(170) 0x4234d7 MULSD	0x47f21(%RIP),%XMM0

(170) 0x4234df MOV	%R14,%RSI

(170) 0x4234e2 IMUL	%RDX,%RSI

(170) 0x4234e6 ADD	%RAX,%RSI

(170) 0x4234e9 MOVSD	%XMM0,(%R15,%RSI,8)

(170) 0x4234ef IMUL	%R12,%RDI

(170) 0x4234f3 ADD	%RAX,%RDI

(170) 0x4234f6 MOV	0x68(%RSP),%R8

(170) 0x4234fb SUBSD	(%R8,%RDI,8),%XMM0

(170) 0x423501 MOV	%R12,%RSI

(170) 0x423504 IMUL	%RDX,%RSI

(170) 0x423508 ADD	%RAX,%RSI

(170) 0x42350b ADDSD	(%R8,%RSI,8),%XMM0

(170) 0x423511 IMUL	0x60(%RSP),%RDX

(170) 0x423517 ADD	%RAX,%RDX

(170) 0x42351a MOV	0x58(%RSP),%RAX

(170) 0x42351f MOVSD	%XMM0,(%RAX,%RDX,8)

(170) 0x423524 INC	%RCX

(170) 0x423527 CMP	%RCX,0x70(%RSP)

(170) 0x42352c JE	4233df

(170) 0x423532 MOV	%RCX,%RDI

(170) 0x423535 SHR	$0x20,%RDI

(170) 0x423539 JE	423550

(170) 0x42353b MOV	%RCX,%RAX

(170) 0x42353e XOR	%EDX,%EDX

(170) 0x423540 DIV	%RBP

(170) 0x423543 MOV	%RAX,%RSI

(170) 0x423546 JMP	423558

0x423548 NOPL	(%RAX,%RAX,1)

(170) 0x423550 MOV	%ECX,%EAX

(170) 0x423552 XOR	%EDX,%EDX

(170) 0x423554 DIV	%EBP

(170) 0x423556 MOV	%EAX,%ESI

(170) 0x423558 MOV	0x10(%RSP),%R8

(170) 0x42355d MOV	0x20(%RSP),%R9

(170) 0x423562 ADD	0x4(%RSP),%ESI

(170) 0x423566 TEST	%RDI,%RDI

(170) 0x423569 JNE	423430

(170) 0x42356f MOV	%ECX,%EAX

(170) 0x423571 XOR	%EDX,%EDX

(170) 0x423573 DIV	%EBP

(170) 0x423575 JMP	423438

0x42357a NOPW	(%RAX,%RAX,1)

Coverage (%)	Name	Module
►47.03+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
○	__GI___clone3	libc.so.6
►41.58+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
►5.33+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
►2.32+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
►1.55+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_fork_call	libiomp5.so
○	__kmpc_fork_call	libiomp5.so
○	advec_mom_kernel(int, int, int[...]	exec
○	advec_mom_driver(global_variab[...]	exec
○	advection(global_variables&)	exec
○	hydro(global_variables&, paral[...]	exec
○	main	exec
○	__libc_start_call_main	libc.so.6
○	__libc_start_main	libc.so.6
○	_start	exec
►1.51+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_fork_call	libiomp5.so
○	__kmpc_fork_call	libiomp5.so
○	advec_mom_kernel(int, int, int[...]	exec
○	advec_mom_driver(global_variab[...]	exec
○	advection(global_variables&)	exec
○	hydro(global_variables&, paral[...]	exec
○	main	exec
○	__libc_start_call_main	libc.so.6
○	__libc_start_main	libc.so.6
○	_start	exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_0

Source file and lines
Module	exec

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 19.88 to 8.25 cycles (2.41x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is poorly vectorized. Only 16% of vector register length is used (average across all SSE/AVX instructions). By fully vectorizing your function, you can lower the cost of an iteration from 19.88 to 2.19 cycles (9.06x speedup).

Details

38% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

7% of SSE/AVX loads are used in vector version.
45% of SSE/AVX stores are used in vector version.
25% of SSE/AVX addition or subtraction instructions are used in vector version.
48% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

__kmpc_for_static_init_8@plt: 1 occurrences►

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

MOVD: 2 occurrences►
MOVQ: 10 occurrences►

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 224 bytes. The binary function is storing 348 bytes.

General properties

nb instructions	150
nb uops	159
loop length	730
used x86 registers	16
used mmx registers	0
used xmm registers	4
used ymm registers	0
used zmm registers	0
nb stack references	37

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	19.88 cycles
front end	19.88 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	5.00	5.00	5.00	5.00	5.00	5.00	15.25	15.25	15.25	15.25	7.00	7.00	7.00	7.00	7.00	7.00
cycles	5.00	5.00	5.00	5.00	5.00	5.00	15.25	15.25	15.25	15.25	7.00	7.00	7.00	7.00	7.00	7.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	19.88
Dispatch	15.25
Overall L1	19.88

Vectorization ratios

all	38%
load	7%
store	45%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	25%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	48%

Vector efficiency ratios

all	16%
load	11%
store	17%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	14%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	17%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 19.88 cycles. At this rate:

4% of peak load performance is reached (11.27 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
13% of peak store performance is reached (17.51 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 19.88 to 15.25 cycles (1.30x speedup).

ASM code

In the binary file, the address of the function is: 422cb0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x168,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RCX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x1c8(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x1b8(%RSP),%RBP	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x1b0(%RSP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x1a0(%RSP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x1a8(%RSP),%EDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOV %EDX,0x4(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOVL $0,0x1c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
TEST %RAX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JS 4233fe <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.16+0x74e>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %R9,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R8,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RCX,0x10(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOVQ $0,0x30(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %RAX,0x28(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ $0x1,0x78(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA 0x80(%RSP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x24(%RSP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x38(%RSP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x30(%RSP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV $0x47c7f0,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %ESI,0x20(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 4031e0 <__kmpc_for_static_init_8@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x30(%RSP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x28(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMP %RAX,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JA 4233df <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.16+0x72f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %RAX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV 0x10(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
SUB %EAX,%EBP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV (%R13),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x10(%R13),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV (%RBX),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x10(%RBX),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R12),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%R12),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV %R9,0x8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%R15),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%R15),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV (%R14),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%R14),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
INC %RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RDX,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
SUB %RCX,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV $-0x2,%R11D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND %RDX,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R9,0x68(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R8,0x20(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RBX,0x60(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R14,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
JE 423410 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.16+0x760>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %RDX,0x38(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RBP,0x50(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVD %EBP,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (6.3%)
PSHUFD $0x44,%XMM0,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVD 0x4(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	scal (6.3%)
PSHUFD $0x50,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x140(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVD %EAX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (6.3%)
PSHUFD $0x50,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x130(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOV %RSI,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ %RSI,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x100(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R10,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x120(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R8,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x90(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R13,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x110(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOV %RDI,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ %RDI,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xf0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ 0x8(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xe0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R12,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x80(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R9,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xd0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RBX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xc0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R14,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xb0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RCX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM13	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
PADDQ 0x48526(%RIP),%XMM13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	vect (25.0%)
XOR %EBX,%EBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOVDQA %XMM1,0x150(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
PSHUFD $-0x12,%XMM1,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xa0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
PXOR %XMM6,%XMM6	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	vect (25.0%)
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CMP %R11,0x38(%RSP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOV 0x50(%RSP),%RBP	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x48(%RSP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x40(%RSP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x8(%RSP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JNE 423420 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.16+0x770>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV $0x47c810,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x18(%RSP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
ADD $0x168,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 403050 <__kmpc_for_static_fini@plt>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD $0x168,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSI,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDI,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x8(%RSP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JMP 423532 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.16+0x882>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %R11,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 423532 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.16+0x882>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_0

Source file and lines
Module	exec

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 19.88 to 8.25 cycles (2.41x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

38% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

7% of SSE/AVX loads are used in vector version.
45% of SSE/AVX stores are used in vector version.
25% of SSE/AVX addition or subtraction instructions are used in vector version.
48% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

__kmpc_for_static_init_8@plt: 1 occurrences►

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

MOVD: 2 occurrences►
MOVQ: 10 occurrences►

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 224 bytes. The binary function is storing 348 bytes.

General properties

nb instructions	150
nb uops	159
loop length	730
used x86 registers	16
used mmx registers	0
used xmm registers	4
used ymm registers	0
used zmm registers	0
nb stack references	37

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	19.88 cycles
front end	19.88 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	5.00	5.00	5.00	5.00	5.00	5.00	15.25	15.25	15.25	15.25	7.00	7.00	7.00	7.00	7.00	7.00
cycles	5.00	5.00	5.00	5.00	5.00	5.00	15.25	15.25	15.25	15.25	7.00	7.00	7.00	7.00	7.00	7.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	19.88
Dispatch	15.25
Overall L1	19.88

Vectorization ratios

all	38%
load	7%
store	45%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	25%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	48%

Vector efficiency ratios

all	16%
load	11%
store	17%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	14%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	17%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 19.88 cycles. At this rate:

4% of peak load performance is reached (11.27 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
13% of peak store performance is reached (17.51 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 422cb0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x168,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RCX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x1c8(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x1b8(%RSP),%RBP	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x1b0(%RSP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x1a0(%RSP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x1a8(%RSP),%EDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOV %EDX,0x4(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOVL $0,0x1c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
TEST %RAX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JS 4233fe <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.16+0x74e>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %R9,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R8,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RCX,0x10(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOVQ $0,0x30(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %RAX,0x28(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ $0x1,0x78(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA 0x80(%RSP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x24(%RSP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x38(%RSP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x30(%RSP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV $0x47c7f0,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %ESI,0x20(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 4031e0 <__kmpc_for_static_init_8@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x30(%RSP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x28(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMP %RAX,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JA 4233df <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.16+0x72f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %RAX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV 0x10(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
SUB %EAX,%EBP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV (%R13),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x10(%R13),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV (%RBX),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x10(%RBX),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R12),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%R12),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV %R9,0x8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%R15),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%R15),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV (%R14),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%R14),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
INC %RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RDX,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
SUB %RCX,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV $-0x2,%R11D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND %RDX,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R9,0x68(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R8,0x20(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RBX,0x60(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R14,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
JE 423410 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.16+0x760>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %RDX,0x38(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RBP,0x50(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVD %EBP,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (6.3%)
PSHUFD $0x44,%XMM0,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVD 0x4(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	scal (6.3%)
PSHUFD $0x50,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x140(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVD %EAX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (6.3%)
PSHUFD $0x50,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x130(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOV %RSI,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ %RSI,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x100(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R10,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x120(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R8,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x90(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R13,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x110(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOV %RDI,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ %RDI,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xf0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ 0x8(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xe0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R12,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x80(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R9,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xd0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RBX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xc0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R14,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xb0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RCX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM13	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
PADDQ 0x48526(%RIP),%XMM13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	vect (25.0%)
XOR %EBX,%EBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOVDQA %XMM1,0x150(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
PSHUFD $-0x12,%XMM1,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xa0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
PXOR %XMM6,%XMM6	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	vect (25.0%)
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CMP %R11,0x38(%RSP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOV 0x50(%RSP),%RBP	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x48(%RSP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x40(%RSP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x8(%RSP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JNE 423420 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.16+0x770>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV $0x47c810,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x18(%RSP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
ADD $0x168,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 403050 <__kmpc_for_static_fini@plt>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD $0x168,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSI,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDI,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x8(%RSP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JMP 423532 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.16+0x882>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %R11,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 423532 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.16+0x882>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼advec_mom_kernel(int, int, int, int, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clo...–	2.85	1.17
○Loop 171 - - exec	2.85	1.17
○Loop 170 - - exec	0.00	0.00

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CALL instructions

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Complex instructions

Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code