OV - exec - Function advec_mom_kernel(int, int, int, int, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer1D<double>&, clover::Buffer1D<double>&, int, int, int) [clone .extracted.9]

	Function: advec_mom_kernel(int, int, int, int, clover::Buffer2D<double>&, clover::Buffer2D<double>&, ...	Module: exec	Source: :0-0	Coverage (incl. loops): 5.92% \| (excl. loops): 0.00%

  ***  This Panel is Intentionally Left Blank.  ***

It is due to a lack of debug symbols in the given object
(loop or function).

0x4222f0 PUSH	%RBP

0x4222f1 PUSH	%R15

0x4222f3 PUSH	%R14

0x4222f5 PUSH	%R13

0x4222f7 PUSH	%R12

0x4222f9 PUSH	%RBX

0x4222fa SUB	$0x148,%RSP

0x422301 MOV	%RCX,%R13

0x422304 MOV	0x1a8(%RSP),%RAX

0x42230c MOV	0x198(%RSP),%RBP

0x422314 MOV	0x190(%RSP),%RBX

0x42231c MOV	0x180(%RSP),%RCX

0x422324 MOV	%RCX,0x10(%RSP)

0x422329 MOV	0x188(%RSP),%ECX

0x422330 MOV	%ECX,0x4(%RSP)

0x422334 MOVL	$0,0xc(%RSP)

0x42233c TEST	%RAX,%RAX

0x42233f JS	422a45

0x422345 MOV	%R9,%R14

0x422348 MOV	%R8,%R12

0x42234b MOV	%RDX,%R15

0x42234e MOV	(%RDI),%ESI

0x422350 MOVQ	$0,0x20(%RSP)

0x422359 MOV	%RAX,0x18(%RSP)

0x42235e MOVQ	$0x1,0x58(%RSP)

0x422367 SUB	$0x8,%RSP

0x42236b LEA	0x60(%RSP),%RAX

0x422370 LEA	0x14(%RSP),%RCX

0x422375 LEA	0x28(%RSP),%R8

0x42237a LEA	0x20(%RSP),%R9

0x42237f MOV	$0x47c790,%EDI

0x422384 MOV	%ESI,0x10(%RSP)

0x422388 MOV	$0x22,%EDX

0x42238d PUSH	$0x1

0x42238f PUSH	$0x1

0x422391 PUSH	%RAX

0x422392 CALL	4031e0 <__kmpc_for_static_init_8@plt>

0x422397 ADD	$0x20,%RSP

0x42239b MOV	0x20(%RSP),%RCX

0x4223a0 MOV	0x18(%RSP),%RAX

0x4223a5 CMP	%RAX,%RCX

0x4223a8 JA	422a5e

0x4223ae MOV	%RAX,%RDX

0x4223b1 SUB	%EBX,%EBP

0x4223b3 MOV	(%R13),%RAX

0x4223b7 MOV	0x10(%R13),%R11

0x4223bb MOV	(%R12),%R8

0x4223bf MOV	0x10(%R12),%RSI

0x4223c4 MOV	(%R15),%RDI

0x4223c7 MOV	0x10(%R15),%R15

0x4223cb MOV	(%R14),%R10

0x4223ce MOV	0x10(%R14),%R9

0x4223d2 INC	%RDX

0x4223d5 MOV	%RDX,0x50(%RSP)

0x4223da SUB	%RCX,%RDX

0x4223dd MOV	$-0x2,%R13D

0x4223e3 AND	%RDX,%R13

0x4223e6 MOV	%RSI,0x48(%RSP)

0x4223eb MOV	%RDI,0x40(%RSP)

0x4223f0 MOV	%R10,0x38(%RSP)

0x4223f5 MOV	%R9,0x30(%RSP)

0x4223fa JE	422a7d

0x422400 MOV	%RDX,0x28(%RSP)

0x422405 MOVD	%EBP,%XMM0

0x422409 PSHUFD	$0x44,%XMM0,%XMM1

0x42240e MOVD	0x4(%RSP),%XMM0

0x422414 PSHUFD	$0x50,%XMM0,%XMM0

0x422419 MOVDQA	%XMM0,0x120(%RSP)

0x422422 MOVQ	%RBX,%XMM0

0x422427 PSHUFD	$0x44,%XMM0,%XMM0

0x42242c MOVDQA	%XMM0,0x110(%RSP)

0x422435 MOVQ	%RAX,%XMM0

0x42243a PSHUFD	$0x44,%XMM0,%XMM2

0x42243f MOVQ	%R11,%XMM0

0x422444 PSHUFD	$0x44,%XMM0,%XMM0

0x422449 MOVDQA	%XMM0,0xf0(%RSP)

0x422452 MOVQ	%R8,%XMM0

0x422457 PSHUFD	$0x44,%XMM0,%XMM0

0x42245c MOVDQA	%XMM0,0xe0(%RSP)

0x422465 MOVQ	%RSI,%XMM0

0x42246a PSHUFD	$0x44,%XMM0,%XMM0

0x42246f MOVDQA	%XMM0,0xd0(%RSP)

0x422478 MOVQ	%RDI,%XMM0

0x42247d PSHUFD	$0x44,%XMM0,%XMM0

0x422482 MOVDQA	%XMM0,0xc0(%RSP)

0x42248b MOVQ	%R15,%XMM0

0x422490 PSHUFD	$0x44,%XMM0,%XMM0

0x422495 MOVDQA	%XMM0,0xb0(%RSP)

0x42249e MOVQ	%R10,%XMM0

0x4224a3 PSHUFD	$0x44,%XMM0,%XMM0

0x4224a8 MOVDQA	%XMM0,0xa0(%RSP)

0x4224b1 MOVQ	%R9,%XMM0

0x4224b6 PSHUFD	$0x44,%XMM0,%XMM0

0x4224bb MOVDQA	%XMM0,0x90(%RSP)

0x4224c4 MOVQ	%RCX,%XMM0

0x4224c9 PSHUFD	$0x44,%XMM0,%XMM7

0x4224ce PADDQ	0x48f3a(%RIP),%XMM7

0x4224d6 XOR	%R10D,%R10D

0x4224d9 MOVDQA	%XMM1,0x130(%RSP)

0x4224e2 PSHUFD	$-0x12,%XMM1,%XMM0

0x4224e7 MOVDQA	%XMM0,0x80(%RSP)

0x4224f0 MOVDQA	%XMM2,0x100(%RSP)

0x4224f9 PSRLQ	$0x20,%XMM2

0x4224fe MOVDQA	%XMM2,0x70(%RSP)

0x422504 MOV	%RAX,%R14

0x422507 MOVDQA	0xb0(%RSP),%XMM11

0x422511 JMP	4225fd

0x422516 NOPW	%CS:(%RAX,%RAX,1)

(169) 0x422520 MOVDQA	0x60(%RSP),%XMM7

(169) 0x422526 DIVPD	%XMM8,%XMM15

(169) 0x42252b ADDPD	%XMM9,%XMM15

(169) 0x422530 XORPD	%XMM8,%XMM8

(169) 0x422535 CMPPD	$0x1,%XMM3,%XMM8

(169) 0x42253b MULPD	0x48f5d(%RIP),%XMM5

(169) 0x422543 MULPD	%XMM15,%XMM5

(169) 0x422548 MINPD	%XMM4,%XMM0

(169) 0x42254c MINPD	%XMM5,%XMM0

(169) 0x422550 MOVAPD	%XMM0,%XMM3

(169) 0x422554 XORPD	0x48f54(%RIP),%XMM3

(169) 0x42255c ANDPD	%XMM8,%XMM0

(169) 0x422561 ANDNPD	%XMM3,%XMM8

(169) 0x422566 ORPD	%XMM0,%XMM8

(169) 0x42256b ANDPD	%XMM8,%XMM14

(169) 0x422570 MOVAPD	0x48f08(%RIP),%XMM0

(169) 0x422578 SUBPD	%XMM13,%XMM0

(169) 0x42257d MULPD	%XMM14,%XMM0

(169) 0x422582 ADDPD	%XMM12,%XMM0

(169) 0x422587 MULPD	%XMM6,%XMM0

(169) 0x42258b MOVDQA	0xa0(%RSP),%XMM5

(169) 0x422594 MOVDQA	%XMM5,%XMM3

(169) 0x422598 PSRLQ	$0x20,%XMM3

(169) 0x42259d PMULUDQ	%XMM2,%XMM3

(169) 0x4225a1 MOVDQA	%XMM5,%XMM4

(169) 0x4225a5 PMULUDQ	%XMM2,%XMM4

(169) 0x4225a9 PSRLQ	$0x20,%XMM2

(169) 0x4225ae PMULUDQ	%XMM5,%XMM2

(169) 0x4225b2 PADDQ	%XMM3,%XMM2

(169) 0x4225b6 PADDQ	%XMM1,%XMM4

(169) 0x4225ba PSLLQ	$0x20,%XMM2

(169) 0x4225bf PADDQ	%XMM2,%XMM4

(169) 0x4225c3 PSLLQ	$0x3,%XMM4

(169) 0x4225c8 PADDQ	0x90(%RSP),%XMM4

(169) 0x4225d1 MOVQ	%XMM4,%RAX

(169) 0x4225d6 PSHUFD	$-0x12,%XMM4,%XMM1

(169) 0x4225db MOVQ	%XMM1,%RDX

(169) 0x4225e0 MOVLPD	%XMM0,(%RAX)

(169) 0x4225e4 MOVHPD	%XMM0,(%RDX)

(169) 0x4225e8 PADDQ	0x48e40(%RIP),%XMM7

(169) 0x4225f0 ADD	$0x2,%R10

(169) 0x4225f4 CMP	%R13,%R10

(169) 0x4225f7 JAE	422a57

(169) 0x4225fd MOV	%R8,%R12

(169) 0x422600 MOV	%RBX,%R8

(169) 0x422603 MOV	%R11,%RBX

(169) 0x422606 MOV	%R14,%R11

(169) 0x422609 MOVQ	%XMM7,%RSI

(169) 0x42260e MOVDQA	0x130(%RSP),%XMM0

(169) 0x422617 MOVQ	%XMM0,%R9

(169) 0x42261c MOV	%RSI,%RAX

(169) 0x42261f XOR	%EDX,%EDX

(169) 0x422621 DIV	%R9

(169) 0x422624 MOVQ	%RAX,%XMM0

(169) 0x422629 MOVDQA	%XMM7,0x60(%RSP)

(169) 0x42262f PSHUFD	$-0x12,%XMM7,%XMM1

(169) 0x422634 MOVQ	%XMM1,%RDI

(169) 0x422639 MOVDQA	0x80(%RSP),%XMM1

(169) 0x422642 MOVQ	%XMM1,%R14

(169) 0x422647 MOV	%RDI,%RAX

(169) 0x42264a XOR	%EDX,%EDX

(169) 0x42264c DIV	%R14

(169) 0x42264f MOVQ	%RAX,%XMM1

(169) 0x422654 PUNPCKLQDQ	%XMM1,%XMM0

(169) 0x422658 PSHUFD	$-0x18,%XMM0,%XMM0

(169) 0x42265d PADDD	0x120(%RSP),%XMM0

(169) 0x422666 MOV	%RSI,%RAX

(169) 0x422669 CQTO

(169) 0x42266b IDIV	%R9

(169) 0x42266e MOVQ	%RDX,%XMM1

(169) 0x422673 MOV	%RDI,%RAX

(169) 0x422676 CQTO

(169) 0x422678 IDIV	%R14

(169) 0x42267b MOVQ	%RDX,%XMM2

(169) 0x422680 PUNPCKLQDQ	%XMM2,%XMM1

(169) 0x422684 PADDQ	0x110(%RSP),%XMM1

(169) 0x42268d PSLLQ	$0x20,%XMM1

(169) 0x422692 PSHUFD	$-0x13,%XMM1,%XMM1

(169) 0x422697 MOVDQA	%XMM1,%XMM2

(169) 0x42269b PSRAD	$0x1f,%XMM2

(169) 0x4226a0 PUNPCKLDQ	%XMM2,%XMM1

(169) 0x4226a4 PXOR	%XMM3,%XMM3

(169) 0x4226a8 PCMPGTD	%XMM0,%XMM3

(169) 0x4226ac MOVDQA	%XMM0,%XMM2

(169) 0x4226b0 PUNPCKLDQ	%XMM3,%XMM2

(169) 0x4226b4 MOVDQA	0x100(%RSP),%XMM6

(169) 0x4226bd MOVDQA	%XMM6,%XMM4

(169) 0x4226c1 PMULUDQ	%XMM2,%XMM4

(169) 0x4226c5 MOVDQA	0x70(%RSP),%XMM5

(169) 0x4226cb PMULUDQ	%XMM2,%XMM5

(169) 0x4226cf PSHUFD	$-0x2c,%XMM3,%XMM3

(169) 0x4226d4 PMULUDQ	%XMM6,%XMM3

(169) 0x4226d8 PADDQ	%XMM5,%XMM3

(169) 0x4226dc PSLLQ	$0x20,%XMM3

(169) 0x4226e1 PADDQ	%XMM1,%XMM4

(169) 0x4226e5 PADDQ	%XMM3,%XMM4

(169) 0x4226e9 PSLLQ	$0x3,%XMM4

(169) 0x4226ee PADDQ	0xf0(%RSP),%XMM4

(169) 0x4226f7 MOVQ	%XMM4,%RAX

(169) 0x4226fc PSHUFD	$-0x12,%XMM4,%XMM3

(169) 0x422701 MOVQ	%XMM3,%RDX

(169) 0x422706 MOVSD	(%RAX),%XMM6

(169) 0x42270a MOVHPD	(%RDX),%XMM6

(169) 0x42270e MOVAPD	%XMM6,%XMM4

(169) 0x422712 CMPPD	$0x1,0x48085(%RIP),%XMM4

(169) 0x42271b MOVDQA	%XMM0,%XMM13

(169) 0x422720 PCMPEQD	%XMM3,%XMM3

(169) 0x422724 PSUBD	%XMM3,%XMM13

(169) 0x422729 MOVDQA	%XMM0,%XMM15

(169) 0x42272e PADDD	%XMM3,%XMM15

(169) 0x422733 PXOR	%XMM3,%XMM3

(169) 0x422737 PCMPGTD	%XMM13,%XMM3

(169) 0x42273c MOVDQA	%XMM13,%XMM10

(169) 0x422741 PUNPCKLDQ	%XMM3,%XMM10

(169) 0x422746 PADDD	0x48df2(%RIP),%XMM0

(169) 0x42274e MOVAPD	%XMM4,%XMM5

(169) 0x422752 ANDNPD	%XMM10,%XMM5

(169) 0x422757 MOVDQA	%XMM2,%XMM3

(169) 0x42275b PAND	%XMM4,%XMM3

(169) 0x42275f POR	%XMM5,%XMM3

(169) 0x422763 MOVDQA	%XMM4,%XMM5

(169) 0x422767 PANDN	%XMM2,%XMM5

(169) 0x42276b PAND	%XMM4,%XMM10

(169) 0x422770 POR	%XMM5,%XMM10

(169) 0x422775 MOVDQA	%XMM10,%XMM5

(169) 0x42277a PSRLQ	$0x20,%XMM5

(169) 0x42277f MOVDQA	0xc0(%RSP),%XMM7

(169) 0x422788 MOVDQA	%XMM7,%XMM14

(169) 0x42278d PSRLQ	$0x20,%XMM14

(169) 0x422793 MOVDQA	%XMM14,%XMM8

(169) 0x422798 PMULUDQ	%XMM10,%XMM8

(169) 0x42279d MOVDQA	%XMM7,%XMM9

(169) 0x4227a2 PMULUDQ	%XMM5,%XMM9

(169) 0x4227a7 PADDQ	%XMM8,%XMM9

(169) 0x4227ac PSLLQ	$0x20,%XMM9

(169) 0x4227b2 MOVDQA	%XMM7,%XMM8

(169) 0x4227b7 PMULUDQ	%XMM10,%XMM8

(169) 0x4227bc PADDQ	%XMM1,%XMM8

(169) 0x4227c1 PADDQ	%XMM9,%XMM8

(169) 0x4227c6 PSLLQ	$0x3,%XMM8

(169) 0x4227cc PADDQ	%XMM11,%XMM8

(169) 0x4227d1 MOVQ	%XMM8,%RAX

(169) 0x4227d6 PSHUFD	$-0x12,%XMM8,%XMM8

(169) 0x4227dc MOVQ	%XMM8,%RDX

(169) 0x4227e1 PXOR	%XMM8,%XMM8

(169) 0x4227e6 PCMPGTD	%XMM15,%XMM8

(169) 0x4227eb MOVDQA	%XMM15,%XMM9

(169) 0x4227f0 PUNPCKLDQ	%XMM8,%XMM9

(169) 0x4227f5 MOVDQA	%XMM4,%XMM8

(169) 0x4227fa PANDN	%XMM9,%XMM8

(169) 0x4227ff PXOR	%XMM9,%XMM9

(169) 0x422804 PCMPGTD	%XMM0,%XMM9

(169) 0x422809 PUNPCKLDQ	%XMM9,%XMM0

(169) 0x42280e PAND	%XMM4,%XMM0

(169) 0x422812 POR	%XMM8,%XMM0

(169) 0x422817 MOVDQA	%XMM14,%XMM8

(169) 0x42281c PMULUDQ	%XMM0,%XMM8

(169) 0x422821 MOVDQA	%XMM7,%XMM9

(169) 0x422826 PMULUDQ	%XMM0,%XMM9

(169) 0x42282b PSRLQ	$0x20,%XMM0

(169) 0x422830 PMULUDQ	%XMM7,%XMM0

(169) 0x422834 PADDQ	%XMM8,%XMM0

(169) 0x422839 MOVSD	(%RAX),%XMM12

(169) 0x42283e MOVHPD	(%RDX),%XMM12

(169) 0x422843 PSLLQ	$0x20,%XMM0

(169) 0x422848 PADDQ	%XMM1,%XMM9

(169) 0x42284d PADDQ	%XMM0,%XMM9

(169) 0x422852 PSLLQ	$0x3,%XMM9

(169) 0x422858 PADDQ	%XMM11,%XMM9

(169) 0x42285d MOVQ	%XMM9,%RAX

(169) 0x422862 PSHUFD	$-0x12,%XMM9,%XMM0

(169) 0x422868 MOVQ	%XMM0,%RDX

(169) 0x42286d MOVSD	(%RAX),%XMM8

(169) 0x422872 MOVHPD	(%RDX),%XMM8

(169) 0x422877 PMULUDQ	%XMM3,%XMM14

(169) 0x42287c MOVDQA	%XMM7,%XMM9

(169) 0x422881 PMULUDQ	%XMM3,%XMM9

(169) 0x422886 PSRLQ	$0x20,%XMM3

(169) 0x42288b PMULUDQ	%XMM7,%XMM3

(169) 0x42288f PADDQ	%XMM14,%XMM3

(169) 0x422894 MOVAPD	%XMM12,%XMM0

(169) 0x422899 PSLLQ	$0x20,%XMM3

(169) 0x42289e PADDQ	%XMM1,%XMM9

(169) 0x4228a3 PADDQ	%XMM3,%XMM9

(169) 0x4228a8 PSLLQ	$0x3,%XMM9

(169) 0x4228ae PADDQ	%XMM11,%XMM9

(169) 0x4228b3 MOVQ	%XMM9,%RAX

(169) 0x4228b8 PSHUFD	$-0x12,%XMM9,%XMM3

(169) 0x4228be MOVQ	%XMM3,%RDX

(169) 0x4228c3 MOVSD	(%RAX),%XMM3

(169) 0x4228c7 MOVHPD	(%RDX),%XMM3

(169) 0x4228cb SUBPD	%XMM8,%XMM0

(169) 0x4228d0 SUBPD	%XMM12,%XMM3

(169) 0x4228d5 MOVAPD	%XMM3,%XMM8

(169) 0x4228da MULPD	%XMM0,%XMM8

(169) 0x4228df PXOR	%XMM14,%XMM14

(169) 0x4228e4 CMPPD	$0x1,%XMM8,%XMM14

(169) 0x4228ea MOVMSKPD	%XMM14,%EAX

(169) 0x4228ef TEST	%EAX,%EAX

(169) 0x4228f1 JE	4228fe

(169) 0x4228f3 MOV	0x10(%RSP),%RDX

(169) 0x4228f8 MOVQ	0x8(%RDX),%XMM9

(169) 0x4228fe MOVDQA	0xe0(%RSP),%XMM7

(169) 0x422907 MOVDQA	%XMM7,%XMM8

(169) 0x42290c PSRLQ	$0x20,%XMM8

(169) 0x422912 PMULUDQ	%XMM10,%XMM8

(169) 0x422917 PMULUDQ	%XMM7,%XMM5

(169) 0x42291b PADDQ	%XMM8,%XMM5

(169) 0x422920 PSLLQ	$0x20,%XMM5

(169) 0x422925 PMULUDQ	%XMM7,%XMM10

(169) 0x42292a PADDQ	%XMM1,%XMM10

(169) 0x42292f PADDQ	%XMM5,%XMM10

(169) 0x422934 PSLLQ	$0x3,%XMM10

(169) 0x42293a PADDQ	0xd0(%RSP),%XMM10

(169) 0x422944 MOVQ	%XMM10,%RDX

(169) 0x422949 PSHUFD	$-0x12,%XMM10,%XMM5

(169) 0x42294f MOVQ	%XMM5,%RSI

(169) 0x422954 MOVSD	(%RDX),%XMM8

(169) 0x422959 MOVHPD	(%RSI),%XMM8

(169) 0x42295e PSHUFD	$0x44,%XMM9,%XMM10

(169) 0x422964 MOVDQA	%XMM2,%XMM9

(169) 0x422969 PSLLQ	$0x3,%XMM9

(169) 0x42296f PADDQ	%XMM10,%XMM9

(169) 0x422974 TEST	$0x1,%AL

(169) 0x422976 JE	422981

(169) 0x422978 MOVQ	%XMM9,%RDX

(169) 0x42297d MOVSD	(%RDX),%XMM5

(169) 0x422981 TEST	$0x2,%AL

(169) 0x422983 MOV	%R11,%R14

(169) 0x422986 MOVAPD	0x48142(%RIP),%XMM7

(169) 0x42298e JE	42299f

(169) 0x422990 PSHUFD	$-0x12,%XMM9,%XMM9

(169) 0x422996 MOVQ	%XMM9,%RDX

(169) 0x42299b MOVHPD	(%RDX),%XMM5

(169) 0x42299f MOV	%RBX,%R11

(169) 0x4229a2 MOV	%R8,%RBX

(169) 0x4229a5 MOV	%R12,%R8

(169) 0x4229a8 SHUFPS	$-0x18,%XMM4,%XMM4

(169) 0x4229ac PAND	%XMM4,%XMM13

(169) 0x4229b1 PANDN	%XMM15,%XMM4

(169) 0x4229b6 POR	%XMM13,%XMM4

(169) 0x4229bb MOVAPD	%XMM6,%XMM13

(169) 0x4229c0 ANDPD	%XMM7,%XMM13

(169) 0x4229c5 DIVPD	%XMM8,%XMM13

(169) 0x4229ca MOVAPD	%XMM13,%XMM15

(169) 0x4229cf ADDPD	0x48aa8(%RIP),%XMM15

(169) 0x4229d8 XORPD	%XMM8,%XMM8

(169) 0x4229dd PCMPGTD	%XMM4,%XMM8

(169) 0x4229e2 PUNPCKLDQ	%XMM8,%XMM4

(169) 0x4229e7 PSLLQ	$0x3,%XMM4

(169) 0x4229ec PADDQ	%XMM4,%XMM10

(169) 0x4229f1 TEST	$0x1,%AL

(169) 0x4229f3 JE	4229ff

(169) 0x4229f5 MOVQ	%XMM10,%RDX

(169) 0x4229fa MOVSD	(%RDX),%XMM8

(169) 0x4229ff ANDPD	%XMM7,%XMM0

(169) 0x422a03 MOVAPD	%XMM3,%XMM4

(169) 0x422a07 ANDPD	%XMM7,%XMM4

(169) 0x422a0b MOVAPD	0x48a7c(%RIP),%XMM9

(169) 0x422a14 SUBPD	%XMM13,%XMM9

(169) 0x422a19 MULPD	%XMM4,%XMM9

(169) 0x422a1e DIVPD	%XMM5,%XMM9

(169) 0x422a23 MULPD	%XMM0,%XMM15

(169) 0x422a28 TEST	$0x2,%AL

(169) 0x422a2a JE	422520

(169) 0x422a30 PSHUFD	$-0x12,%XMM10,%XMM10

(169) 0x422a36 MOVQ	%XMM10,%RAX

(169) 0x422a3b MOVHPD	(%RAX),%XMM8

(169) 0x422a40 JMP	422520

0x422a45 ADD	$0x148,%RSP

0x422a4c POP	%RBX

0x422a4d POP	%R12

0x422a4f POP	%R13

0x422a51 POP	%R14

0x422a53 POP	%R15

0x422a55 POP	%RBP

0x422a56 RET

0x422a57 CMP	%R13,0x28(%RSP)

0x422a5c JNE	422a82

0x422a5e MOV	$0x47c7b0,%EDI

0x422a63 MOV	0x8(%RSP),%ESI

0x422a67 ADD	$0x148,%RSP

0x422a6e POP	%RBX

0x422a6f POP	%R12

0x422a71 POP	%R13

0x422a73 POP	%R14

0x422a75 POP	%R15

0x422a77 POP	%RBP

0x422a78 JMP	403050

0x422a7d MOV	%RAX,%R14

0x422a80 JMP	422a85

0x422a82 ADD	%R13,%RCX

0x422a85 PXOR	%XMM0,%XMM0

0x422a89 MOVAPD	0x4803f(%RIP),%XMM1

0x422a91 MOVSD	0x48a27(%RIP),%XMM2

0x422a99 MOVSD	0x47fd7(%RIP),%XMM3

0x422aa1 MOVSD	0x48a1f(%RIP),%XMM4

0x422aa9 MOVAPD	0x489ff(%RIP),%XMM5

0x422ab1 MOV	%RBP,%R13

0x422ab4 JMP	422afe

0x422ab6 NOPW	%CS:(%RAX,%RAX,1)

(168) 0x422ac0 MOVAPD	%XMM3,%XMM9

(168) 0x422ac5 SUBSD	%XMM7,%XMM9

(168) 0x422aca MULSD	%XMM11,%XMM9

(168) 0x422acf ADDSD	%XMM8,%XMM9

(168) 0x422ad4 MULSD	%XMM6,%XMM9

(168) 0x422ad9 IMUL	0x38(%RSP),%RDX

(168) 0x422adf ADD	%RAX,%RDX

(168) 0x422ae2 MOV	0x30(%RSP),%RAX

(168) 0x422ae7 MOVSD	%XMM9,(%RAX,%RDX,8)

(168) 0x422aed INC	%RCX

(168) 0x422af0 CMP	%RCX,0x50(%RSP)

(168) 0x422af5 MOV	%R13,%RBP

(168) 0x422af8 JE	422a5e

(168) 0x422afe MOV	%RCX,%RDI

(168) 0x422b01 SHR	$0x20,%RDI

(168) 0x422b05 JE	422b30

(168) 0x422b07 MOV	%RCX,%RAX

(168) 0x422b0a XOR	%EDX,%EDX

(168) 0x422b0c DIV	%RBP

(168) 0x422b0f MOV	%RAX,%RSI

(168) 0x422b12 TEST	%RDI,%RDI

(168) 0x422b15 JE	422b3d

(168) 0x422b17 MOV	%RCX,%RAX

(168) 0x422b1a CQTO

(168) 0x422b1c IDIV	%RBP

(168) 0x422b1f JMP	422b43

0x422b21 NOPW	%CS:(%RAX,%RAX,1)

(168) 0x422b30 MOV	%ECX,%EAX

(168) 0x422b32 XOR	%EDX,%EDX

(168) 0x422b34 DIV	%EBP

(168) 0x422b36 MOV	%EAX,%ESI

(168) 0x422b38 TEST	%RDI,%RDI

(168) 0x422b3b JNE	422b17

(168) 0x422b3d MOV	%ECX,%EAX

(168) 0x422b3f XOR	%EDX,%EDX

(168) 0x422b41 DIV	%EBP

(168) 0x422b43 ADD	0x4(%RSP),%ESI

(168) 0x422b47 ADD	%EBX,%EDX

(168) 0x422b49 MOVSXD	%EDX,%RAX

(168) 0x422b4c MOVSXD	%ESI,%RDX

(168) 0x422b4f MOV	%R14,%RDI

(168) 0x422b52 IMUL	%RDX,%RDI

(168) 0x422b56 ADD	%RAX,%RDI

(168) 0x422b59 MOVSD	(%R11,%RDI,8),%XMM6

(168) 0x422b5f LEA	0x1(%RDX),%EDI

(168) 0x422b62 UCOMISD	%XMM6,%XMM0

(168) 0x422b66 MOVSXD	%EDI,%R10

(168) 0x422b69 JBE	422b80

(168) 0x422b6b ADD	$0x2,%ESI

(168) 0x422b6e MOV	%RDX,%R12

(168) 0x422b71 JMP	422b8a

0x422b73 NOPW	%CS:(%RAX,%RAX,1)

(168) 0x422b80 DEC	%ESI

(168) 0x422b82 MOV	%R10,%R12

(168) 0x422b85 MOV	%RDX,%R10

(168) 0x422b88 MOV	%ESI,%EDI

(168) 0x422b8a MOVAPD	%XMM6,%XMM7

(168) 0x422b8e ANDPD	%XMM1,%XMM7

(168) 0x422b92 MOV	%R8,%R9

(168) 0x422b95 IMUL	%R10,%R9

(168) 0x422b99 ADD	%RAX,%R9

(168) 0x422b9c MOV	0x48(%RSP),%RBP

(168) 0x422ba1 DIVSD	(%RBP,%R9,8),%XMM7

(168) 0x422ba8 MOV	0x40(%RSP),%R9

(168) 0x422bad IMUL	%R9,%R10

(168) 0x422bb1 ADD	%RAX,%R10

(168) 0x422bb4 MOVSXD	%ESI,%RSI

(168) 0x422bb7 IMUL	%R9,%RSI

(168) 0x422bbb ADD	%RAX,%RSI

(168) 0x422bbe IMUL	%R9,%R12

(168) 0x422bc2 ADD	%RAX,%R12

(168) 0x422bc5 MOVSD	(%R15,%R10,8),%XMM8

(168) 0x422bcb MOVAPD	%XMM8,%XMM9

(168) 0x422bd0 MOVHPD	(%R15,%R12,8),%XMM9

(168) 0x422bd6 MOVSD	(%R15,%RSI,8),%XMM10

(168) 0x422bdc UNPCKLPD	%XMM8,%XMM10

(168) 0x422be1 SUBPD	%XMM10,%XMM9

(168) 0x422be6 MOVAPD	%XMM9,%XMM10

(168) 0x422beb UNPCKHPD	%XMM9,%XMM10

(168) 0x422bf0 MOVAPD	%XMM10,%XMM12

(168) 0x422bf5 MULSD	%XMM9,%XMM12

(168) 0x422bfa PXOR	%XMM11,%XMM11

(168) 0x422bff UCOMISD	%XMM11,%XMM12

(168) 0x422c04 JBE	422ac0

(168) 0x422c0a MOV	0x10(%RSP),%RSI

(168) 0x422c0f MOV	0x8(%RSI),%RSI

(168) 0x422c13 ANDPD	%XMM1,%XMM9

(168) 0x422c18 MOVAPD	%XMM2,%XMM11

(168) 0x422c1d SUBSD	%XMM7,%XMM11

(168) 0x422c22 MOVAPD	%XMM7,%XMM12

(168) 0x422c27 ADDSD	%XMM3,%XMM12

(168) 0x422c2c UNPCKLPD	%XMM11,%XMM12

(168) 0x422c31 MOVSXD	%EDI,%RDI

(168) 0x422c34 MOVSD	(%RSI,%RDX,8),%XMM11

(168) 0x422c3a MULPD	%XMM9,%XMM12

(168) 0x422c3f MOVSD	(%RSI,%RDI,8),%XMM13

(168) 0x422c45 UNPCKLPD	%XMM11,%XMM13

(168) 0x422c4a DIVPD	%XMM13,%XMM12

(168) 0x422c4f MOVAPD	%XMM12,%XMM13

(168) 0x422c54 UNPCKHPD	%XMM12,%XMM13

(168) 0x422c59 ADDSD	%XMM12,%XMM13

(168) 0x422c5e MULSD	%XMM4,%XMM11

(168) 0x422c63 MULSD	%XMM13,%XMM11

(168) 0x422c68 PSHUFD	$-0x12,%XMM9,%XMM12

(168) 0x422c6e MINSD	%XMM9,%XMM12

(168) 0x422c73 MINSD	%XMM11,%XMM12

(168) 0x422c78 XORPD	%XMM11,%XMM11

(168) 0x422c7d CMPSD	$0x1,%XMM10,%XMM11

(168) 0x422c83 MOVAPD	%XMM11,%XMM9

(168) 0x422c88 ANDPD	%XMM12,%XMM9

(168) 0x422c8d XORPD	%XMM5,%XMM12

(168) 0x422c92 ANDNPD	%XMM12,%XMM11

(168) 0x422c97 ORPD	%XMM9,%XMM11

(168) 0x422c9c JMP	422ac0

0x422ca1 NOPW	%CS:(%RAX,%RAX,1)

Coverage (%)	Name	Module
►47.79+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
○	__GI___clone3	libc.so.6
►41.18+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
►5.36+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
►2.34+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_0

Source file and lines
Module	exec

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 18.75 to 8.88 cycles (2.11x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is poorly vectorized. Only 16% of vector register length is used (average across all SSE/AVX instructions). By fully vectorizing your function, you can lower the cost of an iteration from 18.75 to 2.12 cycles (8.83x speedup).

Details

41% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

22% of SSE/AVX loads are used in vector version.
50% of SSE/AVX stores are used in vector version.
25% of SSE/AVX addition or subtraction instructions are used in vector version.
46% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

__kmpc_for_static_init_8@plt: 1 occurrences►

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

MOVD: 1 occurrences►
MOVQ: 10 occurrences►

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 224 bytes. The binary function is storing 300 bytes.

General properties

nb instructions	143
nb uops	150
loop length	726
used x86 registers	16
used mmx registers	0
used xmm registers	8
used ymm registers	0
used zmm registers	0
nb stack references	33

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	18.75 cycles
front end	18.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	5.17	5.17	5.17	5.17	5.17	5.17	13.25	13.25	13.25	13.25	6.50	6.50	6.50	6.50	6.50	6.50
cycles	5.17	5.17	5.17	5.17	5.17	5.17	13.25	13.25	13.25	13.25	6.50	6.50	6.50	6.50	6.50	6.50

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	18.75
Dispatch	13.25
Overall L1	18.75

Vectorization ratios

INT

all	41%
load	15%
store	50%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	25%
fma	NA (no fma vectorizable/vectorized instructions)
other	46%

all	40%
load	40%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	41%
load	22%
store	50%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	25%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	46%

Vector efficiency ratios

INT

all	16%
load	12%
store	17%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	14%
fma	NA (no fma vectorizable/vectorized instructions)
other	17%

all	17%
load	17%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	16%
load	14%
store	17%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	14%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	17%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 18.75 cycles. At this rate:

4% of peak load performance is reached (11.95 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
12% of peak store performance is reached (16.00 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 18.75 to 13.25 cycles (1.42x speedup).

ASM code

In the binary file, the address of the function is: 4222f0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x148,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RCX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x1a8(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x198(%RSP),%RBP	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x190(%RSP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x180(%RSP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RCX,0x10(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x188(%RSP),%ECX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %ECX,0x4(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOVL $0,0xc(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
TEST %RAX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JS 422a45 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.9+0x755>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %R9,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R8,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOVQ $0,0x20(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %RAX,0x18(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ $0x1,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA 0x60(%RSP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x14(%RSP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x28(%RSP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x20(%RSP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV $0x47c790,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %ESI,0x10(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 4031e0 <__kmpc_for_static_init_8@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x20(%RSP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x18(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMP %RAX,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JA 422a5e <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.9+0x76e>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %RAX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
SUB %EBX,%EBP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV (%R13),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%R13),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV (%R12),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x10(%R12),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV (%R15),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%R15),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R14),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x10(%R14),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
INC %RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RDX,0x50(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
SUB %RCX,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV $-0x2,%R13D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND %RDX,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RSI,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDI,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,0x38(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R9,0x30(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
JE 422a7d <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.9+0x78d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %RDX,0x28(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVD %EBP,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (6.3%)
PSHUFD $0x44,%XMM0,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVD 0x4(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	scal (6.3%)
PSHUFD $0x50,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x120(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RBX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x110(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RAX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVQ %R11,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xf0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R8,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xe0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RSI,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xd0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RDI,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xc0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R15,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xb0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R10,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xa0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R9,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x90(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RCX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
PADDQ 0x48f3a(%RIP),%XMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	vect (25.0%)
XOR %R10D,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
MOVDQA %XMM1,0x130(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
PSHUFD $-0x12,%XMM1,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x80(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVDQA %XMM2,0x100(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
PSRLQ $0x20,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM2,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOVDQA 0xb0(%RSP),%XMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
JMP 4225fd <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.9+0x30d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
ADD $0x148,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP %R13,0x28(%RSP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JNE 422a82 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.9+0x792>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV $0x47c7b0,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x8(%RSP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
ADD $0x148,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 403050 <__kmpc_for_static_fini@plt>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 422a85 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.9+0x795>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %R13,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PXOR %XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	vect (25.0%)
MOVAPD 0x4803f(%RIP),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
MOVSD 0x48a27(%RIP),%XMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOVSD 0x47fd7(%RIP),%XMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOVSD 0x48a1f(%RIP),%XMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOVAPD 0x489ff(%RIP),%XMM5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
MOV %RBP,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 422afe <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.9+0x80e>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_0

Source file and lines
Module	exec

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 18.75 to 8.88 cycles (2.11x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

41% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

22% of SSE/AVX loads are used in vector version.
50% of SSE/AVX stores are used in vector version.
25% of SSE/AVX addition or subtraction instructions are used in vector version.
46% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

__kmpc_for_static_init_8@plt: 1 occurrences►

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

MOVD: 1 occurrences►
MOVQ: 10 occurrences►

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 224 bytes. The binary function is storing 300 bytes.

General properties

nb instructions	143
nb uops	150
loop length	726
used x86 registers	16
used mmx registers	0
used xmm registers	8
used ymm registers	0
used zmm registers	0
nb stack references	33

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	18.75 cycles
front end	18.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	5.17	5.17	5.17	5.17	5.17	5.17	13.25	13.25	13.25	13.25	6.50	6.50	6.50	6.50	6.50	6.50
cycles	5.17	5.17	5.17	5.17	5.17	5.17	13.25	13.25	13.25	13.25	6.50	6.50	6.50	6.50	6.50	6.50

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	18.75
Dispatch	13.25
Overall L1	18.75

Vectorization ratios

INT

all	41%
load	15%
store	50%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	25%
fma	NA (no fma vectorizable/vectorized instructions)
other	46%

all	40%
load	40%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	41%
load	22%
store	50%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	25%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	46%

Vector efficiency ratios

INT

all	16%
load	12%
store	17%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	14%
fma	NA (no fma vectorizable/vectorized instructions)
other	17%

all	17%
load	17%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	16%
load	14%
store	17%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	14%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	17%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 18.75 cycles. At this rate:

4% of peak load performance is reached (11.95 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
12% of peak store performance is reached (16.00 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 4222f0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x148,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RCX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x1a8(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x198(%RSP),%RBP	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x190(%RSP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x180(%RSP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RCX,0x10(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x188(%RSP),%ECX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %ECX,0x4(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOVL $0,0xc(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
TEST %RAX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JS 422a45 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.9+0x755>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %R9,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R8,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOVQ $0,0x20(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %RAX,0x18(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ $0x1,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA 0x60(%RSP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x14(%RSP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x28(%RSP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x20(%RSP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV $0x47c790,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %ESI,0x10(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 4031e0 <__kmpc_for_static_init_8@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x20(%RSP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x18(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMP %RAX,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JA 422a5e <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.9+0x76e>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %RAX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
SUB %EBX,%EBP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV (%R13),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%R13),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV (%R12),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x10(%R12),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV (%R15),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%R15),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R14),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x10(%R14),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
INC %RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RDX,0x50(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
SUB %RCX,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV $-0x2,%R13D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
AND %RDX,%R13	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RSI,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDI,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,0x38(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R9,0x30(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
JE 422a7d <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.9+0x78d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %RDX,0x28(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVD %EBP,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (6.3%)
PSHUFD $0x44,%XMM0,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVD 0x4(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	scal (6.3%)
PSHUFD $0x50,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x120(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RBX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x110(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RAX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVQ %R11,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xf0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R8,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xe0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RSI,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xd0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RDI,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xc0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R15,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xb0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R10,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xa0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R9,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x90(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RCX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
PADDQ 0x48f3a(%RIP),%XMM7	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	vect (25.0%)
XOR %R10D,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
MOVDQA %XMM1,0x130(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
PSHUFD $-0x12,%XMM1,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x80(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVDQA %XMM2,0x100(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
PSRLQ $0x20,%XMM2	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM2,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOVDQA 0xb0(%RSP),%XMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
JMP 4225fd <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.9+0x30d>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
ADD $0x148,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP %R13,0x28(%RSP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
JNE 422a82 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.9+0x792>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV $0x47c7b0,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x8(%RSP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
ADD $0x148,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 403050 <__kmpc_for_static_fini@plt>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 422a85 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.9+0x795>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %R13,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PXOR %XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	vect (25.0%)
MOVAPD 0x4803f(%RIP),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
MOVSD 0x48a27(%RIP),%XMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOVSD 0x47fd7(%RIP),%XMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOVSD 0x48a1f(%RIP),%XMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOVAPD 0x489ff(%RIP),%XMM5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
MOV %RBP,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 422afe <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.9+0x80e>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼advec_mom_kernel(int, int, int, int, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clo...–	5.92	2.43
○Loop 169 - - exec	5.92	2.43
○Loop 168 - - exec	0.00	0.00

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Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code