OV - exec - Function advec_cell_kernel(int, int, int, int, int, int, clover::Buffer1D<double>&, clover::Buffer1D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&) [clone .extracted.23]

	Function: advec_cell_kernel(int, int, int, int, int, int, clover::Buffer1D<double>&, clover::Buffer1 ...	Module: exec	Source: :0-0	Coverage (incl. loops): 1.37% \| (excl. loops): 0.00%

  ***  This Panel is Intentionally Left Blank.  ***

It is due to a lack of debug symbols in the given object
(loop or function).

0x41edc0 PUSH	%RBP

0x41edc1 PUSH	%R15

0x41edc3 PUSH	%R14

0x41edc5 PUSH	%R13

0x41edc7 PUSH	%R12

0x41edc9 PUSH	%RBX

0x41edca SUB	$0x128,%RSP

0x41edd1 MOV	%RCX,%R15

0x41edd4 MOV	0x188(%RSP),%RAX

0x41eddc MOV	0x178(%RSP),%RBP

0x41ede4 MOV	0x170(%RSP),%R10

0x41edec MOV	0x160(%RSP),%RBX

0x41edf4 MOV	0x168(%RSP),%ECX

0x41edfb MOV	%ECX,0xc(%RSP)

0x41edff MOVL	$0,0x14(%RSP)

0x41ee07 TEST	%RAX,%RAX

0x41ee0a JS	41f381

0x41ee10 MOV	%R9,%R14

0x41ee13 MOV	%R8,%R12

0x41ee16 MOV	%RDX,%R13

0x41ee19 MOV	(%RDI),%ESI

0x41ee1b MOVQ	$0,0x30(%RSP)

0x41ee24 MOV	%RAX,0x28(%RSP)

0x41ee29 MOVQ	$0x1,0x78(%RSP)

0x41ee32 SUB	$0x8,%RSP

0x41ee36 LEA	0x80(%RSP),%RAX

0x41ee3e LEA	0x1c(%RSP),%RCX

0x41ee43 LEA	0x38(%RSP),%R8

0x41ee48 LEA	0x30(%RSP),%R9

0x41ee4d MOV	$0x47c550,%EDI

0x41ee52 MOV	%ESI,0x18(%RSP)

0x41ee56 MOV	$0x22,%EDX

0x41ee5b PUSH	$0x1

0x41ee5d PUSH	$0x1

0x41ee5f PUSH	%RAX

0x41ee60 MOV	%R10,0x40(%RSP)

0x41ee65 CALL	4031e0 <__kmpc_for_static_init_8@plt>

0x41ee6a MOV	0x40(%RSP),%R10

0x41ee6f ADD	$0x20,%RSP

0x41ee73 MOV	0x30(%RSP),%RCX

0x41ee78 MOV	0x28(%RSP),%R9

0x41ee7d CMP	%R9,%RCX

0x41ee80 JA	41f362

0x41ee86 SUB	%R10D,%EBP

0x41ee89 MOV	(%R13),%RAX

0x41ee8d MOV	0x10(%R13),%RDX

0x41ee91 MOV	(%R12),%R13

0x41ee95 MOV	0x10(%R12),%R12

0x41ee9a MOV	(%R15),%RSI

0x41ee9d MOV	0x10(%R15),%R15

0x41eea1 MOV	(%R14),%RDI

0x41eea4 MOV	0x10(%R14),%R8

0x41eea8 MOV	(%RBX),%R14

0x41eeab MOV	0x10(%RBX),%RBX

0x41eeaf INC	%R9

0x41eeb2 MOV	%R9,0x18(%RSP)

0x41eeb7 SUB	%RCX,%R9

0x41eeba MOV	$-0x2,%R11D

0x41eec0 MOV	%R9,0x48(%RSP)

0x41eec5 AND	%R9,%R11

0x41eec8 MOV	%RSI,0x70(%RSP)

0x41eecd MOV	%RDI,0x68(%RSP)

0x41eed2 MOV	%R8,0x60(%RSP)

0x41eed7 MOV	%R14,0x58(%RSP)

0x41eedc MOV	%RBX,0x50(%RSP)

0x41eee1 JE	41f393

0x41eee7 MOVD	%EBP,%XMM0

0x41eeeb PSHUFD	$0x44,%XMM0,%XMM1

0x41eef0 MOVD	0xc(%RSP),%XMM0

0x41eef6 PSHUFD	$0x50,%XMM0,%XMM0

0x41eefb MOVDQA	%XMM0,0x100(%RSP)

0x41ef04 MOVD	%R10D,%XMM0

0x41ef09 PSHUFD	$0x50,%XMM0,%XMM0

0x41ef0e MOVDQA	%XMM0,0xf0(%RSP)

0x41ef17 MOV	%RAX,0x40(%RSP)

0x41ef1c MOVQ	%RAX,%XMM0

0x41ef21 PSHUFD	$0x44,%XMM0,%XMM0

0x41ef26 MOVDQA	%XMM0,0x80(%RSP)

0x41ef2f MOV	%RDX,0x38(%RSP)

0x41ef34 MOVQ	%RDX,%XMM0

0x41ef39 PSHUFD	$0x44,%XMM0,%XMM0

0x41ef3e MOVDQA	%XMM0,0xe0(%RSP)

0x41ef47 MOVQ	%R13,%XMM0

0x41ef4c PSHUFD	$0x44,%XMM0,%XMM14

0x41ef52 MOVQ	%R12,%XMM0

0x41ef57 PSHUFD	$0x44,%XMM0,%XMM0

0x41ef5c MOVDQA	%XMM0,0xd0(%RSP)

0x41ef65 MOVQ	%RSI,%XMM0

0x41ef6a PSHUFD	$0x44,%XMM0,%XMM7

0x41ef6f MOVQ	%R15,%XMM0

0x41ef74 PSHUFD	$0x44,%XMM0,%XMM0

0x41ef79 MOVDQA	%XMM0,0xc0(%RSP)

0x41ef82 MOVQ	%RDI,%XMM0

0x41ef87 PSHUFD	$0x44,%XMM0,%XMM9

0x41ef8d MOVQ	%R8,%XMM0

0x41ef92 PSHUFD	$0x44,%XMM0,%XMM0

0x41ef97 MOVDQA	%XMM0,0xb0(%RSP)

0x41efa0 MOVQ	%R14,%XMM0

0x41efa5 PSHUFD	$0x44,%XMM0,%XMM11

0x41efab MOVQ	%RBX,%XMM0

0x41efb0 PSHUFD	$0x44,%XMM0,%XMM0

0x41efb5 MOVDQA	%XMM0,0xa0(%RSP)

0x41efbe MOVQ	%RCX,%XMM0

0x41efc3 PSHUFD	$0x44,%XMM0,%XMM13

0x41efc9 PADDQ	0x4c43e(%RIP),%XMM13

0x41efd2 XOR	%R14D,%R14D

0x41efd5 MOVDQA	%XMM1,0x110(%RSP)

0x41efde PSHUFD	$-0x12,%XMM1,%XMM0

0x41efe3 MOVDQA	%XMM0,0x90(%RSP)

0x41efec PCMPEQD	%XMM6,%XMM6

(157) 0x41eff0 MOVQ	%XMM13,%RSI

(157) 0x41eff5 MOVDQA	0x110(%RSP),%XMM0

(157) 0x41effe MOVQ	%XMM0,%RBX

(157) 0x41f003 MOV	%RSI,%RAX

(157) 0x41f006 XOR	%EDX,%EDX

(157) 0x41f008 DIV	%RBX

(157) 0x41f00b MOV	%RAX,%RDI

(157) 0x41f00e PSHUFD	$-0x12,%XMM13,%XMM0

(157) 0x41f014 MOVQ	%XMM0,%R8

(157) 0x41f019 MOVDQA	0x90(%RSP),%XMM0

(157) 0x41f022 MOVQ	%XMM0,%R10

(157) 0x41f027 MOV	%R8,%RAX

(157) 0x41f02a XOR	%EDX,%EDX

(157) 0x41f02c DIV	%R10

(157) 0x41f02f MOVQ	%RDI,%XMM0

(157) 0x41f034 MOVQ	%RAX,%XMM1

(157) 0x41f039 PUNPCKLQDQ	%XMM1,%XMM0

(157) 0x41f03d PSHUFD	$-0x18,%XMM0,%XMM4

(157) 0x41f042 MOV	%RSI,%RAX

(157) 0x41f045 CQTO

(157) 0x41f047 IDIV	%RBX

(157) 0x41f04a MOV	%RDX,%RSI

(157) 0x41f04d PADDD	0x100(%RSP),%XMM4

(157) 0x41f056 MOV	%R8,%RAX

(157) 0x41f059 CQTO

(157) 0x41f05b MOVQ	%RSI,%XMM0

(157) 0x41f060 IDIV	%R10

(157) 0x41f063 MOVQ	%RDX,%XMM1

(157) 0x41f068 PUNPCKLQDQ	%XMM1,%XMM0

(157) 0x41f06c PSHUFD	$-0x18,%XMM0,%XMM2

(157) 0x41f071 PXOR	%XMM5,%XMM5

(157) 0x41f075 PXOR	%XMM1,%XMM1

(157) 0x41f079 PADDD	0xf0(%RSP),%XMM2

(157) 0x41f082 PCMPGTD	%XMM4,%XMM1

(157) 0x41f086 MOVDQA	%XMM4,%XMM12

(157) 0x41f08b PUNPCKLDQ	%XMM1,%XMM12

(157) 0x41f090 PCMPGTD	%XMM2,%XMM5

(157) 0x41f094 MOVDQA	0x80(%RSP),%XMM10

(157) 0x41f09e MOVDQA	%XMM10,%XMM3

(157) 0x41f0a3 PMULUDQ	%XMM12,%XMM3

(157) 0x41f0a8 MOVDQA	%XMM10,%XMM15

(157) 0x41f0ad MOVDQA	%XMM2,%XMM0

(157) 0x41f0b1 PSRLQ	$0x20,%XMM15

(157) 0x41f0b7 PMULUDQ	%XMM12,%XMM15

(157) 0x41f0bc PUNPCKLDQ	0x4b6dc(%RIP),%XMM1

(157) 0x41f0c4 PUNPCKLDQ	%XMM5,%XMM0

(157) 0x41f0c8 PMULUDQ	%XMM1,%XMM10

(157) 0x41f0cd PADDQ	%XMM15,%XMM10

(157) 0x41f0d2 PADDQ	%XMM0,%XMM3

(157) 0x41f0d6 PSUBD	%XMM6,%XMM4

(157) 0x41f0da PXOR	%XMM8,%XMM8

(157) 0x41f0df PCMPGTD	%XMM4,%XMM8

(157) 0x41f0e4 PSLLQ	$0x20,%XMM10

(157) 0x41f0ea PUNPCKLDQ	%XMM8,%XMM4

(157) 0x41f0ef MOVDQA	%XMM14,%XMM5

(157) 0x41f0f4 PMULUDQ	%XMM4,%XMM5

(157) 0x41f0f8 PADDQ	%XMM10,%XMM3

(157) 0x41f0fd MOVDQA	%XMM14,%XMM15

(157) 0x41f102 PSRLQ	$0x20,%XMM15

(157) 0x41f108 PSHUFD	$-0x2c,%XMM8,%XMM8

(157) 0x41f10e PMULUDQ	%XMM15,%XMM4

(157) 0x41f113 PMULUDQ	%XMM14,%XMM8

(157) 0x41f118 PADDQ	%XMM4,%XMM8

(157) 0x41f11d PADDQ	%XMM0,%XMM5

(157) 0x41f121 PSLLQ	$0x20,%XMM8

(157) 0x41f127 PADDQ	%XMM8,%XMM5

(157) 0x41f12c MOVDQA	%XMM14,%XMM4

(157) 0x41f131 PMULUDQ	%XMM1,%XMM4

(157) 0x41f135 PMULUDQ	%XMM12,%XMM15

(157) 0x41f13a PADDQ	%XMM15,%XMM4

(157) 0x41f13f PSLLQ	$0x3,%XMM3

(157) 0x41f144 PADDQ	0xe0(%RSP),%XMM3

(157) 0x41f14d MOVQ	%XMM3,%RSI

(157) 0x41f152 PSHUFD	$-0x12,%XMM3,%XMM3

(157) 0x41f157 PSLLQ	$0x3,%XMM5

(157) 0x41f15c MOVDQA	0xd0(%RSP),%XMM8

(157) 0x41f166 PADDQ	%XMM8,%XMM5

(157) 0x41f16b MOVQ	%XMM3,%R8

(157) 0x41f170 MOVDQA	%XMM14,%XMM3

(157) 0x41f175 PMULUDQ	%XMM12,%XMM3

(157) 0x41f17a PSLLQ	$0x20,%XMM4

(157) 0x41f17f MOVQ	%XMM5,%RAX

(157) 0x41f184 PADDQ	%XMM0,%XMM3

(157) 0x41f188 PADDQ	%XMM4,%XMM3

(157) 0x41f18c PSUBD	%XMM6,%XMM2

(157) 0x41f190 PSHUFD	$-0x12,%XMM5,%XMM4

(157) 0x41f195 PXOR	%XMM5,%XMM5

(157) 0x41f199 PCMPGTD	%XMM2,%XMM5

(157) 0x41f19d PUNPCKLDQ	%XMM5,%XMM2

(157) 0x41f1a1 MOVQ	%XMM4,%RDX

(157) 0x41f1a6 MOVDQA	%XMM7,%XMM4

(157) 0x41f1aa PSRLQ	$0x20,%XMM4

(157) 0x41f1af MOVDQA	%XMM7,%XMM5

(157) 0x41f1b3 PMULUDQ	%XMM12,%XMM4

(157) 0x41f1b8 PMULUDQ	%XMM1,%XMM5

(157) 0x41f1bc PADDQ	%XMM4,%XMM5

(157) 0x41f1c0 MOVDQA	%XMM7,%XMM4

(157) 0x41f1c4 PSLLQ	$0x3,%XMM3

(157) 0x41f1c9 PMULUDQ	%XMM12,%XMM4

(157) 0x41f1ce PSLLQ	$0x20,%XMM5

(157) 0x41f1d3 PADDQ	%XMM4,%XMM5

(157) 0x41f1d7 MOVSD	(%RSI),%XMM4

(157) 0x41f1db PADDQ	%XMM8,%XMM3

(157) 0x41f1e0 MOVQ	%XMM3,%RSI

(157) 0x41f1e5 PSHUFD	$-0x12,%XMM3,%XMM3

(157) 0x41f1ea MOVQ	%XMM3,%RDI

(157) 0x41f1ef PADDQ	%XMM5,%XMM2

(157) 0x41f1f3 PSLLQ	$0x3,%XMM2

(157) 0x41f1f8 MOVHPD	(%R8),%XMM4

(157) 0x41f1fd MOVDQA	0xc0(%RSP),%XMM8

(157) 0x41f207 PADDQ	%XMM8,%XMM2

(157) 0x41f20c MOVQ	%XMM2,%R8

(157) 0x41f211 PSHUFD	$-0x12,%XMM2,%XMM2

(157) 0x41f216 MOVSD	(%RAX),%XMM3

(157) 0x41f21a MOVQ	%XMM2,%R10

(157) 0x41f21f PADDQ	%XMM0,%XMM5

(157) 0x41f223 MOVHPD	(%RDX),%XMM3

(157) 0x41f227 PSLLQ	$0x3,%XMM5

(157) 0x41f22c PADDQ	%XMM8,%XMM5

(157) 0x41f231 MOVQ	%XMM5,%RBX

(157) 0x41f236 MOVSD	(%R8),%XMM2

(157) 0x41f23b PSHUFD	$-0x12,%XMM5,%XMM5

(157) 0x41f240 MOVQ	%XMM5,%R8

(157) 0x41f245 MOVHPD	(%R10),%XMM2

(157) 0x41f24a MOVSD	(%RSI),%XMM5

(157) 0x41f24e MOVHPD	(%RDI),%XMM5

(157) 0x41f252 ADDPD	%XMM4,%XMM3

(157) 0x41f256 MOVSD	(%RBX),%XMM4

(157) 0x41f25a MOVHPD	(%R8),%XMM4

(157) 0x41f25f ADDPD	%XMM5,%XMM4

(157) 0x41f263 MOVDQA	%XMM9,%XMM5

(157) 0x41f268 PSRLQ	$0x20,%XMM5

(157) 0x41f26d PMULUDQ	%XMM12,%XMM5

(157) 0x41f272 ADDPD	%XMM3,%XMM2

(157) 0x41f276 MOVDQA	%XMM9,%XMM3

(157) 0x41f27b PMULUDQ	%XMM1,%XMM3

(157) 0x41f27f PADDQ	%XMM5,%XMM3

(157) 0x41f283 SUBPD	%XMM4,%XMM2

(157) 0x41f287 MOVDQA	%XMM9,%XMM4

(157) 0x41f28c PMULUDQ	%XMM12,%XMM4

(157) 0x41f291 PADDQ	%XMM0,%XMM4

(157) 0x41f295 PSLLQ	$0x20,%XMM3

(157) 0x41f29a PADDQ	%XMM3,%XMM4

(157) 0x41f29e PSLLQ	$0x3,%XMM4

(157) 0x41f2a3 PADDQ	0xb0(%RSP),%XMM4

(157) 0x41f2ac MOVQ	%XMM4,%R8

(157) 0x41f2b1 PSHUFD	$-0x12,%XMM4,%XMM3

(157) 0x41f2b6 MOVQ	%XMM3,%R10

(157) 0x41f2bb MOVDQA	%XMM11,%XMM3

(157) 0x41f2c0 PMULUDQ	%XMM12,%XMM3

(157) 0x41f2c5 MOVDQA	%XMM11,%XMM4

(157) 0x41f2ca PSRLQ	$0x20,%XMM4

(157) 0x41f2cf PMULUDQ	%XMM12,%XMM4

(157) 0x41f2d4 PMULUDQ	%XMM11,%XMM1

(157) 0x41f2d9 PADDQ	%XMM4,%XMM1

(157) 0x41f2dd MOVLPD	%XMM2,(%R8)

(157) 0x41f2e2 MOVHPD	%XMM2,(%R10)

(157) 0x41f2e7 PADDQ	%XMM0,%XMM3

(157) 0x41f2eb MOVSD	(%RAX),%XMM0

(157) 0x41f2ef MOVHPD	(%RDX),%XMM0

(157) 0x41f2f3 SUBPD	%XMM0,%XMM2

(157) 0x41f2f7 MOVSD	(%RSI),%XMM0

(157) 0x41f2fb MOVHPD	(%RDI),%XMM0

(157) 0x41f2ff ADDPD	%XMM0,%XMM2

(157) 0x41f303 PSLLQ	$0x20,%XMM1

(157) 0x41f308 PADDQ	%XMM1,%XMM3

(157) 0x41f30c PSLLQ	$0x3,%XMM3

(157) 0x41f311 PADDQ	0xa0(%RSP),%XMM3

(157) 0x41f31a MOVQ	%XMM3,%RAX

(157) 0x41f31f PSHUFD	$-0x12,%XMM3,%XMM0

(157) 0x41f324 MOVQ	%XMM0,%RDX

(157) 0x41f329 MOVLPD	%XMM2,(%RAX)

(157) 0x41f32d MOVHPD	%XMM2,(%RDX)

(157) 0x41f331 PADDQ	0x4c0f6(%RIP),%XMM13

(157) 0x41f33a ADD	$0x2,%R14

(157) 0x41f33e CMP	%R11,%R14

(157) 0x41f341 JB	41eff0

0x41f347 CMP	%R11,0x48(%RSP)

0x41f34c MOV	0x20(%RSP),%R10

0x41f351 MOV	0x40(%RSP),%RBX

0x41f356 MOV	0x38(%RSP),%R14

0x41f35b MOV	0x18(%RSP),%R9

0x41f360 JNE	41f3a3

0x41f362 MOV	$0x47c570,%EDI

0x41f367 MOV	0x10(%RSP),%ESI

0x41f36b ADD	$0x128,%RSP

0x41f372 POP	%RBX

0x41f373 POP	%R12

0x41f375 POP	%R13

0x41f377 POP	%R14

0x41f379 POP	%R15

0x41f37b POP	%RBP

0x41f37c JMP	403050

0x41f381 ADD	$0x128,%RSP

0x41f388 POP	%RBX

0x41f389 POP	%R12

0x41f38b POP	%R13

0x41f38d POP	%R14

0x41f38f POP	%R15

0x41f391 POP	%RBP

0x41f392 RET

0x41f393 MOV	%RAX,%RBX

0x41f396 MOV	%RDX,%R14

0x41f399 MOV	0x18(%RSP),%R9

0x41f39e JMP	41f453

0x41f3a3 ADD	%R11,%RCX

0x41f3a6 JMP	41f453

0x41f3ab NOPL	(%RAX,%RAX,1)

(156) 0x41f3b0 MOV	%RCX,%RAX

(156) 0x41f3b3 CQTO

(156) 0x41f3b5 IDIV	%RBP

(156) 0x41f3b8 ADD	%R10D,%EDX

(156) 0x41f3bb MOVSXD	%EDX,%RAX

(156) 0x41f3be MOVSXD	%ESI,%RDX

(156) 0x41f3c1 MOV	%RBX,%RSI

(156) 0x41f3c4 IMUL	%RDX,%RSI

(156) 0x41f3c8 ADD	%RAX,%RSI

(156) 0x41f3cb LEA	0x1(%RDX),%EDI

(156) 0x41f3ce MOVSXD	%EDI,%RDI

(156) 0x41f3d1 IMUL	%R13,%RDI

(156) 0x41f3d5 ADD	%RAX,%RDI

(156) 0x41f3d8 MOVSD	(%R12,%RDI,8),%XMM0

(156) 0x41f3de MOV	%R13,%R8

(156) 0x41f3e1 IMUL	%RDX,%R8

(156) 0x41f3e5 ADD	%RAX,%R8

(156) 0x41f3e8 ADDSD	(%R14,%RSI,8),%XMM0

(156) 0x41f3ee MOVSD	(%R12,%R8,8),%XMM1

(156) 0x41f3f4 MOV	0x70(%RSP),%RSI

(156) 0x41f3f9 IMUL	%RDX,%RSI

(156) 0x41f3fd ADD	%RAX,%RSI

(156) 0x41f400 ADDSD	0x8(%R15,%RSI,8),%XMM0

(156) 0x41f407 ADDSD	(%R15,%RSI,8),%XMM1

(156) 0x41f40d SUBSD	%XMM1,%XMM0

(156) 0x41f411 MOV	0x68(%RSP),%RSI

(156) 0x41f416 IMUL	%RDX,%RSI

(156) 0x41f41a ADD	%RAX,%RSI

(156) 0x41f41d MOV	0x60(%RSP),%R11

(156) 0x41f422 MOVSD	%XMM0,(%R11,%RSI,8)

(156) 0x41f428 SUBSD	(%R12,%RDI,8),%XMM0

(156) 0x41f42e ADDSD	(%R12,%R8,8),%XMM0

(156) 0x41f434 IMUL	0x58(%RSP),%RDX

(156) 0x41f43a ADD	%RAX,%RDX

(156) 0x41f43d MOV	0x50(%RSP),%RAX

(156) 0x41f442 MOVSD	%XMM0,(%RAX,%RDX,8)

(156) 0x41f447 INC	%RCX

(156) 0x41f44a CMP	%RCX,%R9

(156) 0x41f44d JE	41f362

(156) 0x41f453 MOV	%RCX,%RDI

(156) 0x41f456 SHR	$0x20,%RDI

(156) 0x41f45a JE	41f480

(156) 0x41f45c MOV	%RCX,%RAX

(156) 0x41f45f XOR	%EDX,%EDX

(156) 0x41f461 DIV	%RBP

(156) 0x41f464 MOV	%RAX,%RSI

(156) 0x41f467 ADD	0xc(%RSP),%ESI

(156) 0x41f46b TEST	%RDI,%RDI

(156) 0x41f46e JNE	41f3b0

(156) 0x41f474 JMP	41f495

0x41f476 NOPW	%CS:(%RAX,%RAX,1)

(156) 0x41f480 MOV	%ECX,%EAX

(156) 0x41f482 XOR	%EDX,%EDX

(156) 0x41f484 DIV	%EBP

(156) 0x41f486 MOV	%EAX,%ESI

(156) 0x41f488 ADD	0xc(%RSP),%ESI

(156) 0x41f48c TEST	%RDI,%RDI

(156) 0x41f48f JNE	41f3b0

(156) 0x41f495 MOV	%ECX,%EAX

(156) 0x41f497 XOR	%EDX,%EDX

(156) 0x41f499 DIV	%EBP

(156) 0x41f49b JMP	41f3b8

Coverage (%)	Name	Module
►48.49+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
○	__GI___clone3	libc.so.6
►40.40+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
►5.36+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
►3.08+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_fork_call	libiomp5.so
○	__kmpc_fork_call	libiomp5.so
○	advec_cell_kernel(int, int, in[...]	exec
○	advec_cell_driver(global_varia[...]	exec
○	advection(global_variables&)	exec
○	hydro(global_variables&, paral[...]	exec
○	main	exec
○	__libc_start_call_main	libc.so.6
○	__libc_start_main	libc.so.6
○	_start	exec
►2.44+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_0

Source file and lines
Module	exec

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 19.25 to 7.75 cycles (2.48x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is poorly vectorized. Only 15% of vector register length is used (average across all SSE/AVX instructions). By fully vectorizing your function, you can lower the cost of an iteration from 19.25 to 2.11 cycles (9.12x speedup).

Details

35% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

6% of SSE/AVX loads are used in vector version.
38% of SSE/AVX stores are used in vector version.
25% of SSE/AVX addition or subtraction instructions are used in vector version.
48% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

__kmpc_for_static_init_8@plt: 1 occurrences►

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

MOVD: 2 occurrences►
MOVQ: 11 occurrences►

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 216 bytes. The binary function is storing 276 bytes.

General properties

nb instructions	142
nb uops	154
loop length	675
used x86 registers	16
used mmx registers	0
used xmm registers	8
used ymm registers	0
used zmm registers	0
nb stack references	32

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	19.25 cycles
front end	19.25 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	5.00	5.00	5.00	5.00	5.00	5.00	13.75	13.75	13.75	13.75	7.50	7.50	7.50	7.50	5.00	5.00
cycles	5.00	5.00	5.00	5.00	5.00	5.00	13.75	13.75	13.75	13.75	7.50	7.50	7.50	7.50	5.00	5.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	19.25
Dispatch	13.75
Overall L1	19.25

Vectorization ratios

all	35%
load	6%
store	38%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	25%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	48%

Vector efficiency ratios

all	15%
load	12%
store	16%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	14%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	17%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 19.25 cycles. At this rate:

4% of peak load performance is reached (11.22 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
11% of peak store performance is reached (14.34 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 19.25 to 13.75 cycles (1.40x speedup).

ASM code

In the binary file, the address of the function is: 41edc0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x128,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RCX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x188(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x178(%RSP),%RBP	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x170(%RSP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x160(%RSP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x168(%RSP),%ECX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %ECX,0xc(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOVL $0,0x14(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
TEST %RAX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JS 41f381 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.23+0x5c1>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %R9,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R8,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOVQ $0,0x30(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %RAX,0x28(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ $0x1,0x78(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA 0x80(%RSP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x1c(%RSP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x38(%RSP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x30(%RSP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV $0x47c550,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %ESI,0x18(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %R10,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CALL 4031e0 <__kmpc_for_static_init_8@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV 0x40(%RSP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x30(%RSP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x28(%RSP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
CMP %R9,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JA 41f362 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.23+0x5a2>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
SUB %R10D,%EBP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV (%R13),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%R13),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV (%R12),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%R12),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R15),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x10(%R15),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R14),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%R14),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV (%RBX),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%RBX),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
INC %R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %R9,0x18(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
SUB %RCX,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV $-0x2,%R11D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R9,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
AND %R9,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RSI,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDI,0x68(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R8,0x60(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R14,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RBX,0x50(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
JE 41f393 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.23+0x5d3>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOVD %EBP,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (6.3%)
PSHUFD $0x44,%XMM0,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVD 0xc(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	scal (6.3%)
PSHUFD $0x50,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x100(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVD %R10D,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (6.3%)
PSHUFD $0x50,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xf0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOV %RAX,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ %RAX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x80(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOV %RDX,0x38(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ %RDX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xe0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R13,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM14	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVQ %R12,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xd0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RSI,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVQ %R15,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xc0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RDI,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM9	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVQ %R8,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xb0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R14,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM11	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVQ %RBX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xa0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RCX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM13	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
PADDQ 0x4c43e(%RIP),%XMM13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	vect (25.0%)
XOR %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOVDQA %XMM1,0x110(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
PSHUFD $-0x12,%XMM1,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x90(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
PCMPEQD %XMM6,%XMM6	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
CMP %R11,0x48(%RSP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOV 0x20(%RSP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x40(%RSP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x38(%RSP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x18(%RSP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
JNE 41f3a3 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.23+0x5e3>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV $0x47c570,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x10(%RSP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
ADD $0x128,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 403050 <__kmpc_for_static_fini@plt>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD $0x128,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x18(%RSP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
JMP 41f453 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.23+0x693>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %R11,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 41f453 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.23+0x693>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_0

Source file and lines
Module	exec

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 19.25 to 7.75 cycles (2.48x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

35% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

6% of SSE/AVX loads are used in vector version.
38% of SSE/AVX stores are used in vector version.
25% of SSE/AVX addition or subtraction instructions are used in vector version.
48% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

__kmpc_for_static_init_8@plt: 1 occurrences►

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

MOVD: 2 occurrences►
MOVQ: 11 occurrences►

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 216 bytes. The binary function is storing 276 bytes.

General properties

nb instructions	142
nb uops	154
loop length	675
used x86 registers	16
used mmx registers	0
used xmm registers	8
used ymm registers	0
used zmm registers	0
nb stack references	32

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	19.25 cycles
front end	19.25 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	5.00	5.00	5.00	5.00	5.00	5.00	13.75	13.75	13.75	13.75	7.50	7.50	7.50	7.50	5.00	5.00
cycles	5.00	5.00	5.00	5.00	5.00	5.00	13.75	13.75	13.75	13.75	7.50	7.50	7.50	7.50	5.00	5.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	19.25
Dispatch	13.75
Overall L1	19.25

Vectorization ratios

all	35%
load	6%
store	38%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	25%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	48%

Vector efficiency ratios

all	15%
load	12%
store	16%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	14%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	17%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 19.25 cycles. At this rate:

4% of peak load performance is reached (11.22 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
11% of peak store performance is reached (14.34 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 41edc0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x128,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RCX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x188(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x178(%RSP),%RBP	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x170(%RSP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x160(%RSP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x168(%RSP),%ECX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %ECX,0xc(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOVL $0,0x14(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
TEST %RAX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JS 41f381 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.23+0x5c1>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %R9,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R8,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOVQ $0,0x30(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %RAX,0x28(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ $0x1,0x78(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA 0x80(%RSP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x1c(%RSP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x38(%RSP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x30(%RSP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV $0x47c550,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %ESI,0x18(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %R10,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CALL 4031e0 <__kmpc_for_static_init_8@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
MOV 0x40(%RSP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x30(%RSP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x28(%RSP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
CMP %R9,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JA 41f362 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.23+0x5a2>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
SUB %R10D,%EBP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV (%R13),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%R13),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV (%R12),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%R12),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R15),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x10(%R15),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R14),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%R14),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV (%RBX),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%RBX),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
INC %R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %R9,0x18(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
SUB %RCX,%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV $-0x2,%R11D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R9,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
AND %R9,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RSI,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDI,0x68(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R8,0x60(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R14,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RBX,0x50(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
JE 41f393 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.23+0x5d3>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOVD %EBP,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (6.3%)
PSHUFD $0x44,%XMM0,%XMM1	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVD 0xc(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	scal (6.3%)
PSHUFD $0x50,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x100(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVD %R10D,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (6.3%)
PSHUFD $0x50,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xf0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOV %RAX,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ %RAX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x80(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOV %RDX,0x38(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ %RDX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xe0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R13,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM14	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVQ %R12,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xd0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RSI,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM7	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVQ %R15,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xc0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RDI,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM9	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVQ %R8,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xb0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R14,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM11	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVQ %RBX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xa0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RCX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM13	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
PADDQ 0x4c43e(%RIP),%XMM13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	vect (25.0%)
XOR %R14D,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOVDQA %XMM1,0x110(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
PSHUFD $-0x12,%XMM1,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x90(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
PCMPEQD %XMM6,%XMM6	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
CMP %R11,0x48(%RSP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOV 0x20(%RSP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x40(%RSP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x38(%RSP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x18(%RSP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
JNE 41f3a3 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.23+0x5e3>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV $0x47c570,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x10(%RSP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
ADD $0x128,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 403050 <__kmpc_for_static_fini@plt>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD $0x128,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x18(%RSP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
JMP 41f453 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.23+0x693>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %R11,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 41f453 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.23+0x693>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼advec_cell_kernel(int, int, int, int, int, int, clover::Buffer1D&, clover::Buffer1D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D–	1.37	0.56
○Loop 157 - - exec	1.37	0.56
○Loop 156 - - exec	0.00	0.00

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Vectorization

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Workaround

Execution units bottlenecks

CALL instructions

Details

Complex instructions

Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code