OV - exec - Function advec_cell_kernel(int, int, int, int, int, int, clover::Buffer1D<double>&, clover::Buffer1D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&) [clone .extracted.9]

	Function: advec_cell_kernel(int, int, int, int, int, int, clover::Buffer1D<double>&, clover::Buffer1 ...	Module: exec	Source: :0-0	Coverage (incl. loops): 3.84% \| (excl. loops): 0.00%

  ***  This Panel is Intentionally Left Blank.  ***

It is due to a lack of debug symbols in the given object
(loop or function).

0x41da50 PUSH	%RBP

0x41da51 PUSH	%R15

0x41da53 PUSH	%R14

0x41da55 PUSH	%R13

0x41da57 PUSH	%R12

0x41da59 PUSH	%RBX

0x41da5a SUB	$0x228,%RSP

0x41da61 MOV	%RDX,0x10(%RSP)

0x41da66 MOV	0x2a0(%RSP),%RAX

0x41da6e MOV	0x290(%RSP),%R14

0x41da76 MOV	0x288(%RSP),%RSI

0x41da7e MOV	0x278(%RSP),%RBX

0x41da86 MOV	0x270(%RSP),%R12

0x41da8e MOV	0x268(%RSP),%R13

0x41da96 MOV	0x260(%RSP),%RBP

0x41da9e MOV	0x280(%RSP),%EDX

0x41daa5 MOV	%EDX,0x4(%RSP)

0x41daa9 MOVL	$0,0x2c(%RSP)

0x41dab1 TEST	%RAX,%RAX

0x41dab4 JS	41e4d3

0x41daba MOV	%R8,%R15

0x41dabd MOV	%RCX,0x60(%RSP)

0x41dac2 MOV	%R9,0x70(%RSP)

0x41dac7 MOV	%RSI,0x48(%RSP)

0x41dacc MOV	(%RDI),%ESI

0x41dace MOVQ	$0,0x58(%RSP)

0x41dad7 MOV	%RAX,0x50(%RSP)

0x41dadc MOVQ	$0x1,0xb8(%RSP)

0x41dae8 SUB	$0x8,%RSP

0x41daec LEA	0xc0(%RSP),%RAX

0x41daf4 LEA	0x34(%RSP),%RCX

0x41daf9 LEA	0x60(%RSP),%R8

0x41dafe LEA	0x58(%RSP),%R9

0x41db03 MOV	$0x47c490,%EDI

0x41db08 MOV	%ESI,0x30(%RSP)

0x41db0c MOV	$0x22,%EDX

0x41db11 PUSH	$0x1

0x41db13 PUSH	$0x1

0x41db15 PUSH	%RAX

0x41db16 CALL	4031e0 <__kmpc_for_static_init_8@plt>

0x41db1b ADD	$0x20,%RSP

0x41db1f MOV	0x58(%RSP),%RCX

0x41db24 MOV	0x50(%RSP),%RAX

0x41db29 CMP	%RAX,%RCX

0x41db2c JA	41e4f4

0x41db32 MOV	%RAX,%RDI

0x41db35 MOV	%R14,%RDX

0x41db38 MOV	0x48(%RSP),%RSI

0x41db3d SUB	%ESI,%EDX

0x41db3f MOV	(%R13),%R10

0x41db43 MOV	0x10(%R13),%R8

0x41db47 MOV	(%R12),%RAX

0x41db4b MOV	%RAX,0x20(%RSP)

0x41db50 MOV	0x10(%R12),%RAX

0x41db55 MOV	%RAX,0x8(%RSP)

0x41db5a MOV	0x60(%RSP),%RAX

0x41db5f MOV	0x8(%RAX),%RAX

0x41db63 MOV	%RAX,0x18(%RSP)

0x41db68 MOV	(%R15),%R9

0x41db6b MOV	0x10(%R15),%R15

0x41db6f MOV	(%RBP),%R13

0x41db73 MOV	0x10(%RBP),%RAX

0x41db77 MOV	%RAX,0x38(%RSP)

0x41db7c MOV	0x70(%RSP),%RAX

0x41db81 MOV	(%RAX),%R11

0x41db84 MOV	0x10(%RAX),%R14

0x41db88 MOV	(%RBX),%RBP

0x41db8b MOV	0x10(%RBX),%RBX

0x41db8f MOV	0x10(%RSP),%RAX

0x41db94 ADD	$0x2,%EAX

0x41db97 INC	%RDI

0x41db9a MOV	%RDI,0xb0(%RSP)

0x41dba2 SUB	%RCX,%RDI

0x41dba5 MOV	$-0x2,%R12D

0x41dbab MOV	%RDI,0x88(%RSP)

0x41dbb3 AND	%RDI,%R12

0x41dbb6 MOV	%RBP,%RDI

0x41dbb9 MOV	%R13,%RBP

0x41dbbc MOV	0x20(%RSP),%R13

0x41dbc1 MOV	%RAX,0x10(%RSP)

0x41dbc6 MOV	%RDX,0x30(%RSP)

0x41dbcb MOV	%R10,0x40(%RSP)

0x41dbd0 MOV	%R8,0xa8(%RSP)

0x41dbd8 MOV	%RBP,0xa0(%RSP)

0x41dbe0 MOV	%RDI,0x98(%RSP)

0x41dbe8 MOV	%RBX,0x90(%RSP)

0x41dbf0 JE	41e516

0x41dbf6 MOVD	%EDX,%XMM0

0x41dbfa PSHUFD	$0x44,%XMM0,%XMM0

0x41dbff MOVDQA	%XMM0,0x1e0(%RSP)

0x41dc08 MOVD	0x4(%RSP),%XMM0

0x41dc0e PSHUFD	$0x50,%XMM0,%XMM0

0x41dc13 MOVDQA	%XMM0,0x1d0(%RSP)

0x41dc1c MOVQ	%RSI,%XMM0

0x41dc21 PSHUFD	$0x44,%XMM0,%XMM0

0x41dc26 MOVDQA	%XMM0,0x1c0(%RSP)

0x41dc2f MOVQ	%R10,%XMM0

0x41dc34 PSHUFD	$0x44,%XMM0,%XMM0

0x41dc39 MOVDQA	%XMM0,0x1b0(%RSP)

0x41dc42 MOVQ	%R8,%XMM0

0x41dc47 PSHUFD	$0x44,%XMM0,%XMM0

0x41dc4c MOVDQA	%XMM0,0x1a0(%RSP)

0x41dc55 MOVD	%EAX,%XMM0

0x41dc59 PSHUFD	$0x50,%XMM0,%XMM0

0x41dc5e MOVDQA	%XMM0,0x190(%RSP)

0x41dc67 MOVQ	%R13,%XMM0

0x41dc6c PSHUFD	$0x44,%XMM0,%XMM0

0x41dc71 MOVDQA	%XMM0,0x180(%RSP)

0x41dc7a MOVQ	0x8(%RSP),%XMM0

0x41dc80 PSHUFD	$0x44,%XMM0,%XMM0

0x41dc85 MOVDQA	%XMM0,0x170(%RSP)

0x41dc8e MOVQ	0x18(%RSP),%XMM0

0x41dc94 PSHUFD	$0x44,%XMM0,%XMM0

0x41dc99 MOVDQA	%XMM0,0x160(%RSP)

0x41dca2 MOVQ	%R9,%XMM0

0x41dca7 PSHUFD	$0x44,%XMM0,%XMM0

0x41dcac MOVDQA	%XMM0,0x150(%RSP)

0x41dcb5 MOVQ	%R15,%XMM0

0x41dcba PSHUFD	$0x44,%XMM0,%XMM0

0x41dcbf MOVDQA	%XMM0,0x140(%RSP)

0x41dcc8 MOVQ	%RBP,%XMM0

0x41dccd PSHUFD	$0x44,%XMM0,%XMM0

0x41dcd2 MOVDQA	%XMM0,0x130(%RSP)

0x41dcdb MOVQ	0x38(%RSP),%XMM0

0x41dce1 PSHUFD	$0x44,%XMM0,%XMM0

0x41dce6 MOVDQA	%XMM0,0x120(%RSP)

0x41dcef MOVQ	%R11,%XMM0

0x41dcf4 PSHUFD	$0x44,%XMM0,%XMM0

0x41dcf9 MOVDQA	%XMM0,0x110(%RSP)

0x41dd02 MOVQ	%R14,%XMM0

0x41dd07 PSHUFD	$0x44,%XMM0,%XMM0

0x41dd0c MOVDQA	%XMM0,0x100(%RSP)

0x41dd15 MOVQ	%RDI,%XMM0

0x41dd1a PSHUFD	$0x44,%XMM0,%XMM0

0x41dd1f MOVDQA	%XMM0,0xf0(%RSP)

0x41dd28 MOVQ	%RBX,%XMM0

0x41dd2d PSHUFD	$0x44,%XMM0,%XMM0

0x41dd32 MOVDQA	%XMM0,0xe0(%RSP)

0x41dd3b MOVQ	%RCX,%XMM0

0x41dd40 PSHUFD	$0x44,%XMM0,%XMM11

0x41dd46 PADDQ	0x4d6c1(%RIP),%XMM11

0x41dd4f XOR	%EBX,%EBX

0x41dd51 MOVAPD	0x4cd76(%RIP),%XMM12

0x41dd5a MOVAPD	0x4d71d(%RIP),%XMM14

0x41dd63 JMP	41de55

0x41dd68 NOPL	(%RAX,%RAX,1)

(153) 0x41dd70 MULPD	%XMM9,%XMM10

(153) 0x41dd75 DIVPD	%XMM10,%XMM2

(153) 0x41dd7a XORPD	%XMM1,%XMM1

(153) 0x41dd7e CMPPD	$0x1,%XMM7,%XMM1

(153) 0x41dd83 MOVAPD	%XMM14,%XMM6

(153) 0x41dd88 SUBPD	%XMM2,%XMM6

(153) 0x41dd8c SUBPD	%XMM14,%XMM2

(153) 0x41dd91 ANDPD	%XMM1,%XMM6

(153) 0x41dd95 ANDNPD	%XMM2,%XMM1

(153) 0x41dd99 ORPD	%XMM6,%XMM1

(153) 0x41dd9d ANDPD	%XMM12,%XMM4

(153) 0x41dda2 MOVAPD	%XMM4,%XMM2

(153) 0x41dda6 MULPD	%XMM15,%XMM4

(153) 0x41ddab ANDPD	%XMM12,%XMM7

(153) 0x41ddb0 MINPD	%XMM7,%XMM2

(153) 0x41ddb4 MULPD	0x70(%RSP),%XMM7

(153) 0x41ddba ADDPD	%XMM4,%XMM7

(153) 0x41ddbe MULPD	0x4d6da(%RIP),%XMM7

(153) 0x41ddc6 MINPD	%XMM2,%XMM7

(153) 0x41ddca MULPD	%XMM1,%XMM7

(153) 0x41ddce ANDPD	%XMM7,%XMM0

(153) 0x41ddd2 ADDPD	%XMM3,%XMM0

(153) 0x41ddd6 MULPD	%XMM5,%XMM0

(153) 0x41ddda MOVDQA	0xf0(%RSP),%XMM3

(153) 0x41dde3 MOVDQA	%XMM3,%XMM1

(153) 0x41dde7 PSRLQ	$0x20,%XMM1

(153) 0x41ddec PMULUDQ	%XMM8,%XMM1

(153) 0x41ddf1 MOVDQA	%XMM3,%XMM2

(153) 0x41ddf5 PMULUDQ	%XMM8,%XMM2

(153) 0x41ddfa PSRLQ	$0x20,%XMM8

(153) 0x41de00 PMULUDQ	%XMM3,%XMM8

(153) 0x41de05 PADDQ	%XMM1,%XMM8

(153) 0x41de0a PADDQ	%XMM13,%XMM2

(153) 0x41de0f PSLLQ	$0x20,%XMM8

(153) 0x41de15 PADDQ	%XMM8,%XMM2

(153) 0x41de1a PSLLQ	$0x3,%XMM2

(153) 0x41de1f PADDQ	0xe0(%RSP),%XMM2

(153) 0x41de28 MOVQ	%XMM2,%RAX

(153) 0x41de2d PSHUFD	$-0x12,%XMM2,%XMM1

(153) 0x41de32 MOVQ	%XMM1,%RDX

(153) 0x41de37 MOVLPD	%XMM0,(%RAX)

(153) 0x41de3b MOVHPD	%XMM0,(%RDX)

(153) 0x41de3f PADDQ	0x4d5e8(%RIP),%XMM11

(153) 0x41de48 ADD	$0x2,%RBX

(153) 0x41de4c CMP	%R12,%RBX

(153) 0x41de4f JAE	41e4e5

(153) 0x41de55 MOVQ	%XMM11,%RSI

(153) 0x41de5a MOVDQA	0x1e0(%RSP),%XMM2

(153) 0x41de63 MOVQ	%XMM2,%R8

(153) 0x41de68 MOV	%RSI,%RAX

(153) 0x41de6b XOR	%EDX,%EDX

(153) 0x41de6d DIV	%R8

(153) 0x41de70 MOVQ	%RAX,%XMM0

(153) 0x41de75 MOVDQA	%XMM11,0xd0(%RSP)

(153) 0x41de7f PSHUFD	$-0x12,%XMM11,%XMM1

(153) 0x41de85 MOVQ	%XMM1,%RDI

(153) 0x41de8a PSHUFD	$-0x12,%XMM2,%XMM1

(153) 0x41de8f MOVQ	%XMM1,%R13

(153) 0x41de94 MOV	%RDI,%RAX

(153) 0x41de97 XOR	%EDX,%EDX

(153) 0x41de99 DIV	%R13

(153) 0x41de9c MOVQ	%RAX,%XMM1

(153) 0x41dea1 PUNPCKLQDQ	%XMM1,%XMM0

(153) 0x41dea5 PSHUFD	$-0x18,%XMM0,%XMM4

(153) 0x41deaa PADDD	0x1d0(%RSP),%XMM4

(153) 0x41deb3 MOV	%RSI,%RAX

(153) 0x41deb6 CQTO

(153) 0x41deb8 IDIV	%R8

(153) 0x41debb MOVQ	%RDX,%XMM0

(153) 0x41dec0 MOV	%RDI,%RAX

(153) 0x41dec3 CQTO

(153) 0x41dec5 IDIV	%R13

(153) 0x41dec8 MOVQ	%RDX,%XMM1

(153) 0x41decd PUNPCKLQDQ	%XMM1,%XMM0

(153) 0x41ded1 PADDQ	0x1c0(%RSP),%XMM0

(153) 0x41deda PSLLQ	$0x20,%XMM0

(153) 0x41dedf PSHUFD	$-0x13,%XMM0,%XMM1

(153) 0x41dee4 MOVDQA	%XMM1,%XMM0

(153) 0x41dee8 PSRAD	$0x1f,%XMM0

(153) 0x41deed PUNPCKLDQ	%XMM0,%XMM1

(153) 0x41def1 PXOR	%XMM6,%XMM6

(153) 0x41def5 PCMPGTD	%XMM4,%XMM6

(153) 0x41def9 MOVDQA	%XMM4,%XMM5

(153) 0x41defd PUNPCKLDQ	%XMM6,%XMM5

(153) 0x41df01 MOVDQA	0x1b0(%RSP),%XMM3

(153) 0x41df0a MOVDQA	%XMM3,%XMM0

(153) 0x41df0e PMULUDQ	%XMM5,%XMM0

(153) 0x41df12 MOVDQA	%XMM3,%XMM2

(153) 0x41df16 PSRLQ	$0x20,%XMM2

(153) 0x41df1b PMULUDQ	%XMM5,%XMM2

(153) 0x41df1f MOVDQA	%XMM5,%XMM7

(153) 0x41df23 PUNPCKLDQ	0x4c875(%RIP),%XMM6

(153) 0x41df2b MOVDQA	%XMM6,0x60(%RSP)

(153) 0x41df31 PMULUDQ	%XMM6,%XMM3

(153) 0x41df35 PADDQ	%XMM2,%XMM3

(153) 0x41df39 PSLLQ	$0x20,%XMM3

(153) 0x41df3e PADDQ	%XMM1,%XMM0

(153) 0x41df42 MOVDQA	%XMM1,%XMM8

(153) 0x41df47 PADDQ	%XMM3,%XMM0

(153) 0x41df4b PSLLQ	$0x3,%XMM0

(153) 0x41df50 PADDQ	0x1a0(%RSP),%XMM0

(153) 0x41df59 MOVQ	%XMM0,%RAX

(153) 0x41df5e PSHUFD	$-0x12,%XMM0,%XMM0

(153) 0x41df63 MOVQ	%XMM0,%RDX

(153) 0x41df68 MOVSD	(%RAX),%XMM9

(153) 0x41df6d MOVHPD	(%RDX),%XMM9

(153) 0x41df72 PXOR	%XMM3,%XMM3

(153) 0x41df76 CMPPD	$0x1,%XMM9,%XMM3

(153) 0x41df7c MOVAPD	%XMM9,0x210(%RSP)

(153) 0x41df86 MOVDQA	%XMM4,%XMM5

(153) 0x41df8a PCMPEQD	%XMM1,%XMM1

(153) 0x41df8e PADDD	%XMM1,%XMM5

(153) 0x41df92 MOVDQA	%XMM4,%XMM0

(153) 0x41df96 PSUBD	%XMM1,%XMM0

(153) 0x41df9a MOVDQA	%XMM0,%XMM2

(153) 0x41df9e MOVDQA	0x190(%RSP),%XMM6

(153) 0x41dfa7 PCMPGTD	%XMM6,%XMM2

(153) 0x41dfab PAND	%XMM2,%XMM6

(153) 0x41dfaf PANDN	%XMM0,%XMM2

(153) 0x41dfb3 POR	%XMM6,%XMM2

(153) 0x41dfb7 PXOR	%XMM0,%XMM0

(153) 0x41dfbb PCMPGTD	%XMM5,%XMM0

(153) 0x41dfbf PUNPCKLDQ	%XMM0,%XMM5

(153) 0x41dfc3 PXOR	%XMM0,%XMM0

(153) 0x41dfc7 PCMPGTD	%XMM2,%XMM0

(153) 0x41dfcb PUNPCKLDQ	%XMM0,%XMM2

(153) 0x41dfcf PADDD	0x4d499(%RIP),%XMM4

(153) 0x41dfd7 PXOR	%XMM0,%XMM0

(153) 0x41dfdb PCMPGTD	%XMM4,%XMM0

(153) 0x41dfdf PUNPCKLDQ	%XMM0,%XMM4

(153) 0x41dfe3 MOVAPD	%XMM3,%XMM6

(153) 0x41dfe7 ANDNPD	%XMM2,%XMM6

(153) 0x41dfeb PAND	%XMM3,%XMM4

(153) 0x41dfef POR	%XMM6,%XMM4

(153) 0x41dff3 MOVDQA	%XMM3,%XMM2

(153) 0x41dff7 PANDN	%XMM5,%XMM2

(153) 0x41dffb PAND	%XMM3,%XMM5

(153) 0x41dfff POR	%XMM5,%XMM6

(153) 0x41e003 MOVDQA	%XMM7,%XMM10

(153) 0x41e008 PAND	%XMM3,%XMM10

(153) 0x41e00d POR	%XMM2,%XMM10

(153) 0x41e012 PANDN	%XMM7,%XMM3

(153) 0x41e016 MOVDQA	%XMM7,0x200(%RSP)

(153) 0x41e01f POR	%XMM5,%XMM3

(153) 0x41e023 ANDPD	%XMM12,%XMM9

(153) 0x41e028 MOVDQA	0x180(%RSP),%XMM1

(153) 0x41e031 MOVDQA	%XMM1,%XMM2

(153) 0x41e035 PSRLQ	$0x20,%XMM2

(153) 0x41e03a PMULUDQ	%XMM3,%XMM2

(153) 0x41e03e MOVDQA	%XMM3,%XMM12

(153) 0x41e043 PSRLQ	$0x20,%XMM12

(153) 0x41e049 MOVDQA	%XMM1,%XMM5

(153) 0x41e04d PMULUDQ	%XMM12,%XMM5

(153) 0x41e052 PADDQ	%XMM2,%XMM5

(153) 0x41e056 PSLLQ	$0x20,%XMM5

(153) 0x41e05b MOVDQA	%XMM1,%XMM2

(153) 0x41e05f PMULUDQ	%XMM3,%XMM2

(153) 0x41e063 PADDQ	%XMM8,%XMM2

(153) 0x41e068 PADDQ	%XMM5,%XMM2

(153) 0x41e06c PSLLQ	$0x3,%XMM2

(153) 0x41e071 PADDQ	0x170(%RSP),%XMM2

(153) 0x41e07a MOVQ	%XMM2,%RDX

(153) 0x41e07f PSHUFD	$-0x12,%XMM2,%XMM2

(153) 0x41e084 MOVQ	%XMM2,%RAX

(153) 0x41e089 MOVSD	(%RDX),%XMM2

(153) 0x41e08d MOVHPD	(%RAX),%XMM2

(153) 0x41e091 DIVPD	%XMM2,%XMM9

(153) 0x41e096 MOVAPD	%XMM9,%XMM2

(153) 0x41e09b ADDPD	%XMM14,%XMM2

(153) 0x41e0a0 MOVDQA	%XMM7,%XMM5

(153) 0x41e0a4 PSLLQ	$0x3,%XMM5

(153) 0x41e0a9 MOVDQA	0x160(%RSP),%XMM1

(153) 0x41e0b2 PADDQ	%XMM1,%XMM5

(153) 0x41e0b6 MOVQ	%XMM5,%RSI

(153) 0x41e0bb PSHUFD	$-0x12,%XMM5,%XMM5

(153) 0x41e0c0 MOVQ	%XMM5,%RDI

(153) 0x41e0c5 MOVSD	(%RSI),%XMM11

(153) 0x41e0ca MOVHPD	(%RDI),%XMM11

(153) 0x41e0cf MULPD	%XMM2,%XMM11

(153) 0x41e0d4 PSLLQ	$0x3,%XMM6

(153) 0x41e0d9 PADDQ	%XMM1,%XMM6

(153) 0x41e0dd MOVQ	%XMM6,%RSI

(153) 0x41e0e2 PSHUFD	$-0x12,%XMM6,%XMM2

(153) 0x41e0e7 MOVQ	%XMM2,%RDI

(153) 0x41e0ec MOVSD	(%RSI),%XMM2

(153) 0x41e0f0 MOVHPD	(%RDI),%XMM2

(153) 0x41e0f4 DIVPD	%XMM2,%XMM11

(153) 0x41e0f9 MOVDQA	0x150(%RSP),%XMM1

(153) 0x41e102 MOVDQA	%XMM1,%XMM6

(153) 0x41e106 PSRLQ	$0x20,%XMM6

(153) 0x41e10b MOVDQA	%XMM6,%XMM2

(153) 0x41e10f PMULUDQ	%XMM3,%XMM2

(153) 0x41e113 MOVDQA	%XMM1,%XMM7

(153) 0x41e117 PMULUDQ	%XMM12,%XMM7

(153) 0x41e11c PADDQ	%XMM2,%XMM7

(153) 0x41e120 PSLLQ	$0x20,%XMM7

(153) 0x41e125 MOVDQA	%XMM1,%XMM2

(153) 0x41e129 PMULUDQ	%XMM3,%XMM2

(153) 0x41e12d PADDQ	%XMM8,%XMM2

(153) 0x41e132 PADDQ	%XMM7,%XMM2

(153) 0x41e136 PSLLQ	$0x3,%XMM2

(153) 0x41e13b MOVDQA	0x140(%RSP),%XMM5

(153) 0x41e144 PADDQ	%XMM5,%XMM2

(153) 0x41e148 MOVQ	%XMM2,%RDI

(153) 0x41e14d PSHUFD	$-0x12,%XMM2,%XMM2

(153) 0x41e152 MOVQ	%XMM2,%RSI

(153) 0x41e157 MOVSD	(%RDI),%XMM2

(153) 0x41e15b MOVHPD	(%RSI),%XMM2

(153) 0x41e15f MOVDQA	%XMM6,%XMM7

(153) 0x41e163 PMULUDQ	%XMM4,%XMM7

(153) 0x41e167 MOVDQA	%XMM4,%XMM15

(153) 0x41e16c PSRLQ	$0x20,%XMM15

(153) 0x41e172 MOVDQA	%XMM1,%XMM13

(153) 0x41e177 PMULUDQ	%XMM15,%XMM13

(153) 0x41e17c PADDQ	%XMM7,%XMM13

(153) 0x41e181 PSLLQ	$0x20,%XMM13

(153) 0x41e187 MOVDQA	%XMM1,%XMM7

(153) 0x41e18b PMULUDQ	%XMM4,%XMM7

(153) 0x41e18f PADDQ	%XMM8,%XMM7

(153) 0x41e194 MOVDQA	%XMM8,%XMM0

(153) 0x41e199 MOVDQA	%XMM8,0x1f0(%RSP)

(153) 0x41e1a3 PADDQ	%XMM13,%XMM7

(153) 0x41e1a8 PSLLQ	$0x3,%XMM7

(153) 0x41e1ad PADDQ	%XMM5,%XMM7

(153) 0x41e1b1 MOVQ	%XMM7,%R8

(153) 0x41e1b6 PSHUFD	$-0x12,%XMM7,%XMM7

(153) 0x41e1bb MOVQ	%XMM7,%R13

(153) 0x41e1c0 MOVAPD	%XMM14,%XMM8

(153) 0x41e1c5 MOVSD	(%R8),%XMM14

(153) 0x41e1ca MOVHPD	(%R13),%XMM14

(153) 0x41e1d0 PMULUDQ	%XMM10,%XMM6

(153) 0x41e1d5 MOVDQA	%XMM10,%XMM7

(153) 0x41e1da PSRLQ	$0x20,%XMM7

(153) 0x41e1df MOVDQA	%XMM1,%XMM13

(153) 0x41e1e4 PMULUDQ	%XMM7,%XMM13

(153) 0x41e1e9 PADDQ	%XMM6,%XMM13

(153) 0x41e1ee PSLLQ	$0x20,%XMM13

(153) 0x41e1f4 MOVDQA	%XMM1,%XMM6

(153) 0x41e1f8 PMULUDQ	%XMM10,%XMM6

(153) 0x41e1fd PADDQ	%XMM0,%XMM6

(153) 0x41e201 PADDQ	%XMM13,%XMM6

(153) 0x41e206 MOVAPD	%XMM2,%XMM13

(153) 0x41e20b PSLLQ	$0x3,%XMM6

(153) 0x41e210 PADDQ	%XMM5,%XMM6

(153) 0x41e214 MOVQ	%XMM6,%R8

(153) 0x41e219 PSHUFD	$-0x12,%XMM6,%XMM6

(153) 0x41e21e MOVQ	%XMM6,%R13

(153) 0x41e223 MOVSD	(%R8),%XMM5

(153) 0x41e228 MOVHPD	(%R13),%XMM5

(153) 0x41e22e SUBPD	%XMM14,%XMM13

(153) 0x41e233 SUBPD	%XMM2,%XMM5

(153) 0x41e237 MOVAPD	%XMM5,%XMM6

(153) 0x41e23b MULPD	%XMM13,%XMM6

(153) 0x41e240 XORPD	%XMM14,%XMM14

(153) 0x41e245 CMPPD	$0x1,%XMM6,%XMM14

(153) 0x41e24b MOVAPD	0x4d23d(%RIP),%XMM0

(153) 0x41e253 SUBPD	%XMM9,%XMM0

(153) 0x41e258 XORPD	%XMM6,%XMM6

(153) 0x41e25c CMPPD	$0x1,%XMM5,%XMM6

(153) 0x41e261 MOVAPD	%XMM8,%XMM1

(153) 0x41e266 SUBPD	%XMM9,%XMM1

(153) 0x41e26b SUBPD	%XMM8,%XMM9

(153) 0x41e270 MOVAPD	0x4d227(%RIP),%XMM8

(153) 0x41e279 ANDPD	%XMM6,%XMM1

(153) 0x41e27d ANDNPD	%XMM9,%XMM6

(153) 0x41e282 ORPD	%XMM1,%XMM6

(153) 0x41e286 MOVAPD	0x4c842(%RIP),%XMM1

(153) 0x41e28e ANDPD	%XMM1,%XMM13

(153) 0x41e293 ANDPD	%XMM1,%XMM5

(153) 0x41e297 MOVAPD	%XMM13,%XMM1

(153) 0x41e29c MINPD	%XMM5,%XMM1

(153) 0x41e2a0 MOVAPD	%XMM11,0xc0(%RSP)

(153) 0x41e2aa MULPD	%XMM11,%XMM13

(153) 0x41e2af MOVAPD	%XMM0,0x70(%RSP)

(153) 0x41e2b5 MULPD	%XMM0,%XMM5

(153) 0x41e2b9 ADDPD	%XMM13,%XMM5

(153) 0x41e2be MULPD	%XMM8,%XMM5

(153) 0x41e2c3 MINPD	%XMM1,%XMM5

(153) 0x41e2c7 MULPD	%XMM6,%XMM5

(153) 0x41e2cb ANDPD	%XMM14,%XMM5

(153) 0x41e2d0 ADDPD	%XMM2,%XMM5

(153) 0x41e2d4 MULPD	0x210(%RSP),%XMM5

(153) 0x41e2dd MOVDQA	0x130(%RSP),%XMM2

(153) 0x41e2e6 MOVDQA	%XMM2,%XMM1

(153) 0x41e2ea PSRLQ	$0x20,%XMM1

(153) 0x41e2ef MOVDQA	0x200(%RSP),%XMM6

(153) 0x41e2f8 PMULUDQ	%XMM6,%XMM1

(153) 0x41e2fc MOVDQA	0x60(%RSP),%XMM0

(153) 0x41e302 PMULUDQ	%XMM2,%XMM0

(153) 0x41e306 PADDQ	%XMM1,%XMM0

(153) 0x41e30a MOVDQA	%XMM2,%XMM1

(153) 0x41e30e MOVDQA	%XMM6,%XMM8

(153) 0x41e313 PMULUDQ	%XMM6,%XMM1

(153) 0x41e317 PSLLQ	$0x20,%XMM0

(153) 0x41e31c MOVDQA	0x1f0(%RSP),%XMM13

(153) 0x41e326 PADDQ	%XMM13,%XMM1

(153) 0x41e32b PADDQ	%XMM0,%XMM1

(153) 0x41e32f PSLLQ	$0x3,%XMM1

(153) 0x41e334 PADDQ	0x120(%RSP),%XMM1

(153) 0x41e33d MOVQ	%XMM1,%R8

(153) 0x41e342 PSHUFD	$-0x12,%XMM1,%XMM1

(153) 0x41e347 MOVQ	%XMM1,%R13

(153) 0x41e34c MOVDQA	0x110(%RSP),%XMM2

(153) 0x41e355 MOVDQA	%XMM2,%XMM9

(153) 0x41e35a PSRLQ	$0x20,%XMM9

(153) 0x41e360 MOVDQA	%XMM9,%XMM1

(153) 0x41e365 PMULUDQ	%XMM3,%XMM1

(153) 0x41e369 PMULUDQ	%XMM2,%XMM12

(153) 0x41e36e PADDQ	%XMM1,%XMM12

(153) 0x41e373 PSLLQ	$0x20,%XMM12

(153) 0x41e379 PMULUDQ	%XMM2,%XMM3

(153) 0x41e37d PADDQ	%XMM13,%XMM3

(153) 0x41e382 PADDQ	%XMM12,%XMM3

(153) 0x41e387 PSLLQ	$0x3,%XMM3

(153) 0x41e38c MOVDQA	0x100(%RSP),%XMM6

(153) 0x41e395 PADDQ	%XMM6,%XMM3

(153) 0x41e399 MOVQ	%XMM3,%R10

(153) 0x41e39e PSHUFD	$-0x12,%XMM3,%XMM1

(153) 0x41e3a3 MOVQ	%XMM1,%RBP

(153) 0x41e3a8 MOVDQA	%XMM9,%XMM1

(153) 0x41e3ad PMULUDQ	%XMM4,%XMM1

(153) 0x41e3b1 PMULUDQ	%XMM2,%XMM15

(153) 0x41e3b6 PADDQ	%XMM1,%XMM15

(153) 0x41e3bb MOVLPD	%XMM5,(%R8)

(153) 0x41e3c0 MOVHPD	%XMM5,(%R13)

(153) 0x41e3c6 PSLLQ	$0x20,%XMM15

(153) 0x41e3cc PMULUDQ	%XMM2,%XMM4

(153) 0x41e3d0 PADDQ	%XMM13,%XMM4

(153) 0x41e3d5 PADDQ	%XMM15,%XMM4

(153) 0x41e3da MOVSD	(%R10),%XMM3

(153) 0x41e3df MOVHPD	(%RBP),%XMM3

(153) 0x41e3e4 PSLLQ	$0x3,%XMM4

(153) 0x41e3e9 PADDQ	%XMM6,%XMM4

(153) 0x41e3ed MOVQ	%XMM4,%R8

(153) 0x41e3f2 PSHUFD	$-0x12,%XMM4,%XMM1

(153) 0x41e3f7 MOVQ	%XMM1,%R10

(153) 0x41e3fc MOVSD	(%R8),%XMM1

(153) 0x41e401 MOVHPD	(%R10),%XMM1

(153) 0x41e406 PMULUDQ	%XMM10,%XMM9

(153) 0x41e40b PMULUDQ	%XMM2,%XMM7

(153) 0x41e40f PADDQ	%XMM9,%XMM7

(153) 0x41e414 MOVAPD	%XMM3,%XMM4

(153) 0x41e418 PSLLQ	$0x20,%XMM7

(153) 0x41e41d PMULUDQ	%XMM2,%XMM10

(153) 0x41e422 PADDQ	%XMM13,%XMM10

(153) 0x41e427 PADDQ	%XMM7,%XMM10

(153) 0x41e42c PSLLQ	$0x3,%XMM10

(153) 0x41e432 PADDQ	%XMM6,%XMM10

(153) 0x41e437 MOVQ	%XMM10,%R8

(153) 0x41e43c PSHUFD	$-0x12,%XMM10,%XMM0

(153) 0x41e442 MOVQ	%XMM0,%R10

(153) 0x41e447 MOVSD	(%R8),%XMM7

(153) 0x41e44c MOVHPD	(%R10),%XMM7

(153) 0x41e451 SUBPD	%XMM1,%XMM4

(153) 0x41e455 SUBPD	%XMM3,%XMM7

(153) 0x41e459 MOVAPD	%XMM7,%XMM1

(153) 0x41e45d MULPD	%XMM4,%XMM1

(153) 0x41e461 PXOR	%XMM0,%XMM0

(153) 0x41e465 CMPPD	$0x1,%XMM1,%XMM0

(153) 0x41e46a MOVMSKPD	%XMM0,%R8D

(153) 0x41e46f TEST	$0x1,%R8B

(153) 0x41e473 JE	41e47a

(153) 0x41e475 MOVSD	(%RDI),%XMM9

(153) 0x41e47a TEST	$0x2,%R8B

(153) 0x41e47e JE	41e485

(153) 0x41e480 MOVHPD	(%RSI),%XMM9

(153) 0x41e485 MOVDQA	0xd0(%RSP),%XMM11

(153) 0x41e48f MOVAPD	0x4c638(%RIP),%XMM12

(153) 0x41e498 MOVAPD	0x4cfdf(%RIP),%XMM14

(153) 0x41e4a1 MOVAPD	0xc0(%RSP),%XMM15

(153) 0x41e4ab TEST	$0x1,%R8B

(153) 0x41e4af JE	41e4b6

(153) 0x41e4b1 MOVSD	(%RDX),%XMM10

(153) 0x41e4b6 MOVAPD	%XMM5,%XMM2

(153) 0x41e4ba ANDPD	%XMM12,%XMM2

(153) 0x41e4bf TEST	$0x2,%R8B

(153) 0x41e4c3 JE	41dd70

(153) 0x41e4c9 MOVHPD	(%RAX),%XMM10

(153) 0x41e4ce JMP	41dd70

0x41e4d3 ADD	$0x228,%RSP

0x41e4da POP	%RBX

0x41e4db POP	%R12

0x41e4dd POP	%R13

0x41e4df POP	%R14

0x41e4e1 POP	%R15

0x41e4e3 POP	%RBP

0x41e4e4 RET

0x41e4e5 CMP	%R12,0x88(%RSP)

0x41e4ed MOV	0x40(%RSP),%R10

0x41e4f2 JNE	41e513

0x41e4f4 MOV	$0x47c4b0,%EDI

0x41e4f9 MOV	0x28(%RSP),%ESI

0x41e4fd ADD	$0x228,%RSP

0x41e504 POP	%RBX

0x41e505 POP	%R12

0x41e507 POP	%R13

0x41e509 POP	%R14

0x41e50b POP	%R15

0x41e50d POP	%RBP

0x41e50e JMP	403050

0x41e513 ADD	%R12,%RCX

0x41e516 MOVAPD	0x4c5b2(%RIP),%XMM1

0x41e51e MOVSD	0x4c552(%RIP),%XMM2

0x41e526 MOVSD	0x4cf92(%RIP),%XMM3

0x41e52e MOVAPD	0x4cf7a(%RIP),%XMM4

0x41e536 MOVAPD	0x4c592(%RIP),%XMM5

0x41e53e MOVSD	0x4cf82(%RIP),%XMM6

0x41e546 JMP	41e58a

0x41e548 NOPL	(%RAX,%RAX,1)

(152) 0x41e550 ADDSD	%XMM9,%XMM11

(152) 0x41e555 MULSD	%XMM10,%XMM11

(152) 0x41e55a IMUL	0x98(%RSP),%R8

(152) 0x41e563 ADD	%RAX,%R8

(152) 0x41e566 MOV	0x90(%RSP),%RAX

(152) 0x41e56e MOVSD	%XMM11,(%RAX,%R8,8)

(152) 0x41e574 INC	%RCX

(152) 0x41e577 CMP	%RCX,0xb0(%RSP)

(152) 0x41e57f MOV	0x40(%RSP),%R10

(152) 0x41e584 JE	41e4f4

(152) 0x41e58a MOV	%RCX,%RDI

(152) 0x41e58d SHR	$0x20,%RDI

(152) 0x41e591 JE	41e5c0

(152) 0x41e593 MOV	%RCX,%RAX

(152) 0x41e596 XOR	%EDX,%EDX

(152) 0x41e598 MOV	0x30(%RSP),%R8

(152) 0x41e59d DIV	%R8

(152) 0x41e5a0 MOV	%RAX,%RSI

(152) 0x41e5a3 MOV	0x18(%RSP),%R12

(152) 0x41e5a8 TEST	%RDI,%RDI

(152) 0x41e5ab JE	41e5d8

(152) 0x41e5ad MOV	%RCX,%RAX

(152) 0x41e5b0 CQTO

(152) 0x41e5b2 IDIV	%R8

(152) 0x41e5b5 JMP	41e5df

0x41e5b7 NOPW	(%RAX,%RAX,1)

(152) 0x41e5c0 MOV	%ECX,%EAX

(152) 0x41e5c2 XOR	%EDX,%EDX

(152) 0x41e5c4 MOV	0x30(%RSP),%R8

(152) 0x41e5c9 DIV	%R8D

(152) 0x41e5cc MOV	%EAX,%ESI

(152) 0x41e5ce MOV	0x18(%RSP),%R12

(152) 0x41e5d3 TEST	%RDI,%RDI

(152) 0x41e5d6 JNE	41e5ad

(152) 0x41e5d8 MOV	%ECX,%EAX

(152) 0x41e5da XOR	%EDX,%EDX

(152) 0x41e5dc DIV	%R8D

(152) 0x41e5df ADD	0x4(%RSP),%ESI

(152) 0x41e5e3 ADD	0x48(%RSP),%EDX

(152) 0x41e5e7 MOVSXD	%EDX,%RAX

(152) 0x41e5ea MOVSXD	%ESI,%R8

(152) 0x41e5ed MOV	%R10,%RDX

(152) 0x41e5f0 IMUL	%R8,%RDX

(152) 0x41e5f4 ADD	%RAX,%RDX

(152) 0x41e5f7 MOV	0xa8(%RSP),%RDI

(152) 0x41e5ff MOVSD	(%RDI,%RDX,8),%XMM9

(152) 0x41e605 LEA	-0x1(%R8),%EDX

(152) 0x41e609 PXOR	%XMM0,%XMM0

(152) 0x41e60d UCOMISD	%XMM9,%XMM0

(152) 0x41e612 JAE	41e630

(152) 0x41e614 ADD	$-0x2,%ESI

(152) 0x41e617 MOVSXD	%EDX,%R13

(152) 0x41e61a MOVSXD	%ESI,%RSI

(152) 0x41e61d MOV	%R8,%RDI

(152) 0x41e620 MOV	%R13,%RDX

(152) 0x41e623 JMP	41e648

0x41e625 NOPW	%CS:(%RAX,%RAX,1)

(152) 0x41e630 INC	%ESI

(152) 0x41e632 MOV	0x10(%RSP),%RDI

(152) 0x41e637 CMP	%ESI,%EDI

(152) 0x41e639 CMOVL	%EDI,%ESI

(152) 0x41e63c MOVSXD	%EDX,%RDI

(152) 0x41e63f MOVSXD	%ESI,%RSI

(152) 0x41e642 MOV	%RSI,%R13

(152) 0x41e645 MOV	%R8,%RDX

(152) 0x41e648 MOV	0x20(%RSP),%RBX

(152) 0x41e64d MOV	0x8(%RSP),%R10

(152) 0x41e652 MOVAPD	%XMM9,%XMM13

(152) 0x41e657 ANDPD	%XMM1,%XMM13

(152) 0x41e65c IMUL	%RDX,%RBX

(152) 0x41e660 ADD	%RAX,%RBX

(152) 0x41e663 DIVSD	(%R10,%RBX,8),%XMM13

(152) 0x41e669 MOVAPD	%XMM13,%XMM7

(152) 0x41e66e ADDSD	%XMM2,%XMM7

(152) 0x41e672 MULSD	(%R12,%R8,8),%XMM7

(152) 0x41e678 DIVSD	(%R12,%R13,8),%XMM7

(152) 0x41e67e MOVAPD	%XMM3,%XMM8

(152) 0x41e683 MOV	%R9,%RBP

(152) 0x41e686 IMUL	%RDX,%RBP

(152) 0x41e68a ADD	%RAX,%RBP

(152) 0x41e68d MOVSD	(%R15,%RBP,8),%XMM12

(152) 0x41e693 MOV	%R9,%R10

(152) 0x41e696 IMUL	%RSI,%R10

(152) 0x41e69a ADD	%RAX,%R10

(152) 0x41e69d MOVAPD	%XMM12,%XMM15

(152) 0x41e6a2 SUBSD	(%R15,%R10,8),%XMM15

(152) 0x41e6a8 SUBSD	%XMM13,%XMM8

(152) 0x41e6ad MOV	%R9,%R10

(152) 0x41e6b0 IMUL	%RDI,%R10

(152) 0x41e6b4 ADD	%RAX,%R10

(152) 0x41e6b7 MOVSD	(%R15,%R10,8),%XMM14

(152) 0x41e6bd SUBSD	%XMM12,%XMM14

(152) 0x41e6c2 MOVAPD	%XMM14,%XMM10

(152) 0x41e6c7 MULSD	%XMM15,%XMM10

(152) 0x41e6cc PXOR	%XMM11,%XMM11

(152) 0x41e6d1 UCOMISD	%XMM11,%XMM10

(152) 0x41e6d6 XORPD	%XMM10,%XMM10

(152) 0x41e6db JBE	41e742

(152) 0x41e6dd MOVAPD	%XMM2,%XMM10

(152) 0x41e6e2 SUBSD	%XMM13,%XMM10

(152) 0x41e6e7 XORPD	%XMM13,%XMM13

(152) 0x41e6ec CMPSD	$0x1,%XMM14,%XMM13

(152) 0x41e6f2 MOVAPD	%XMM13,%XMM0

(152) 0x41e6f7 ANDPD	%XMM10,%XMM0

(152) 0x41e6fc XORPD	%XMM4,%XMM10

(152) 0x41e701 ANDNPD	%XMM10,%XMM13

(152) 0x41e706 ORPD	%XMM0,%XMM13

(152) 0x41e70b ANDPD	%XMM5,%XMM15

(152) 0x41e710 ANDPD	%XMM5,%XMM14

(152) 0x41e715 MOVAPD	%XMM15,%XMM0

(152) 0x41e71a MINSD	%XMM14,%XMM0

(152) 0x41e71f MULSD	%XMM7,%XMM15

(152) 0x41e724 MULSD	%XMM8,%XMM14

(152) 0x41e729 ADDSD	%XMM15,%XMM14

(152) 0x41e72e MULSD	%XMM6,%XMM14

(152) 0x41e733 MINSD	%XMM0,%XMM14

(152) 0x41e738 MULSD	%XMM13,%XMM14

(152) 0x41e73d MOVAPD	%XMM14,%XMM10

(152) 0x41e742 ADDSD	%XMM12,%XMM10

(152) 0x41e747 MULSD	%XMM9,%XMM10

(152) 0x41e74c MOV	0xa0(%RSP),%R10

(152) 0x41e754 IMUL	%R8,%R10

(152) 0x41e758 ADD	%RAX,%R10

(152) 0x41e75b MOV	0x38(%RSP),%R13

(152) 0x41e760 MOVSD	%XMM10,(%R13,%R10,8)

(152) 0x41e767 IMUL	%R11,%RDX

(152) 0x41e76b ADD	%RAX,%RDX

(152) 0x41e76e MOVSD	(%R14,%RDX,8),%XMM9

(152) 0x41e774 IMUL	%R11,%RSI

(152) 0x41e778 ADD	%RAX,%RSI

(152) 0x41e77b MOVAPD	%XMM9,%XMM13

(152) 0x41e780 SUBSD	(%R14,%RSI,8),%XMM13

(152) 0x41e786 IMUL	%R11,%RDI

(152) 0x41e78a ADD	%RAX,%RDI

(152) 0x41e78d MOVSD	(%R14,%RDI,8),%XMM12

(152) 0x41e793 SUBSD	%XMM9,%XMM12

(152) 0x41e798 MOVAPD	%XMM12,%XMM0

(152) 0x41e79d MULSD	%XMM13,%XMM0

(152) 0x41e7a2 UCOMISD	%XMM11,%XMM0

(152) 0x41e7a7 JBE	41e550

(152) 0x41e7ad MOVAPD	%XMM10,%XMM0

(152) 0x41e7b2 ANDPD	%XMM5,%XMM0

(152) 0x41e7b6 MOV	0x8(%RSP),%RDX

(152) 0x41e7bb MOVSD	(%RDX,%RBX,8),%XMM11

(152) 0x41e7c1 MULSD	(%R15,%RBP,8),%XMM11

(152) 0x41e7c7 DIVSD	%XMM11,%XMM0

(152) 0x41e7cc MOVAPD	%XMM2,%XMM11

(152) 0x41e7d1 SUBSD	%XMM0,%XMM11

(152) 0x41e7d6 XORPD	%XMM0,%XMM0

(152) 0x41e7da CMPSD	$0x1,%XMM12,%XMM0

(152) 0x41e7e0 MOVAPD	%XMM0,%XMM14

(152) 0x41e7e5 ANDPD	%XMM11,%XMM14

(152) 0x41e7ea XORPD	%XMM4,%XMM11

(152) 0x41e7ef ANDNPD	%XMM11,%XMM0

(152) 0x41e7f4 ORPD	%XMM14,%XMM0

(152) 0x41e7f9 ANDPD	%XMM5,%XMM13

(152) 0x41e7fe ANDPD	%XMM5,%XMM12

(152) 0x41e803 MOVAPD	%XMM13,%XMM11

(152) 0x41e808 MINSD	%XMM12,%XMM11

(152) 0x41e80d MULSD	%XMM7,%XMM13

(152) 0x41e812 MULSD	%XMM8,%XMM12

(152) 0x41e817 ADDSD	%XMM13,%XMM12

(152) 0x41e81c MULSD	%XMM6,%XMM12

(152) 0x41e821 MINSD	%XMM11,%XMM12

(152) 0x41e826 MULSD	%XMM0,%XMM12

(152) 0x41e82b MOVAPD	%XMM12,%XMM11

(152) 0x41e830 JMP	41e550

0x41e835 NOPW	%CS:(%RAX,%RAX,1)

Coverage (%)	Name	Module
►48.33+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
○	__GI___clone3	libc.so.6
►40.69+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
►5.34+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
►2.29+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
►1.58+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_fork_call	libiomp5.so
○	__kmpc_fork_call	libiomp5.so
○	advec_cell_kernel(int, int, in[...]	exec
○	advec_cell_driver(global_varia[...]	exec
○	advection(global_variables&)	exec
○	hydro(global_variables&, paral[...]	exec
○	main	exec
○	__libc_start_call_main	libc.so.6
○	__libc_start_main	libc.so.6
○	_start	exec
►1.53+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_fork_call	libiomp5.so
○	__kmpc_fork_call	libiomp5.so
○	advec_cell_kernel(int, int, in[...]	exec
○	advec_cell_driver(global_varia[...]	exec
○	advection(global_variables&)	exec
○	hydro(global_variables&, paral[...]	exec
○	main	exec
○	__libc_start_call_main	libc.so.6
○	__libc_start_main	libc.so.6
○	_start	exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_0

Source file and lines
Module	exec

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 23.63 to 10.88 cycles (2.17x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is poorly vectorized. Only 16% of vector register length is used (average across all SSE/AVX instructions). By fully vectorizing your function, you can lower the cost of an iteration from 23.63 to 2.95 cycles (8.00x speedup).

Details

39% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

23% of SSE/AVX loads are used in vector version.
42% of SSE/AVX stores are used in vector version.
50% of SSE/AVX addition or subtraction instructions are used in vector version.
48% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

__kmpc_for_static_init_8@plt: 1 occurrences►

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

MOVD: 2 occurrences►
MOVQ: 12 occurrences►

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 392 bytes. The binary function is storing 444 bytes.

General properties

nb instructions	179
nb uops	189
loop length	956
used x86 registers	16
used mmx registers	0
used xmm registers	10
used ymm registers	0
used zmm registers	0
nb stack references	51

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	23.63 cycles
front end	23.63 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	5.17	5.17	5.17	5.17	5.17	5.17	21.50	21.50	21.50	21.50	8.25	8.25	8.25	8.25	8.50	8.50
cycles	5.17	5.17	5.17	5.17	5.17	5.17	21.50	21.50	21.50	21.50	8.25	8.25	8.25	8.25	8.50	8.50

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	23.63
Dispatch	21.50
Overall L1	23.63

Vectorization ratios

INT

all	37%
load	5%
store	42%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	50%
fma	NA (no fma vectorizable/vectorized instructions)
other	48%

all	62%
load	62%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	39%
load	23%
store	42%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	50%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	48%

Vector efficiency ratios

INT

all	16%
load	11%
store	17%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	15%
fma	NA (no fma vectorizable/vectorized instructions)
other	18%

all	20%
load	20%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	16%
load	14%
store	17%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	15%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	18%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 23.63 cycles. At this rate:

6% of peak load performance is reached (16.59 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
14% of peak store performance is reached (18.79 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 23.63 to 21.50 cycles (1.10x speedup).

ASM code

In the binary file, the address of the function is: 41da50

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x228,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,0x10(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x2a0(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x290(%RSP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x288(%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x278(%RSP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x270(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x268(%RSP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x260(%RSP),%RBP	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x280(%RSP),%EDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOV %EDX,0x4(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOVL $0,0x2c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
TEST %RAX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JS 41e4d3 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.9+0xa83>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %R8,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RCX,0x60(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R9,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RSI,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOVQ $0,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %RAX,0x50(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ $0x1,0xb8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA 0xc0(%RSP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x34(%RSP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x60(%RSP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x58(%RSP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV $0x47c490,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %ESI,0x30(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 4031e0 <__kmpc_for_static_init_8@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x58(%RSP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x50(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMP %RAX,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JA 41e4f4 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.9+0xaa4>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R14,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV 0x48(%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
SUB %ESI,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV (%R13),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x10(%R13),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV (%R12),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,0x20(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x10(%R12),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,0x8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x60(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x8(%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,0x18(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%R15),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x10(%R15),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RBP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,0x38(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x70(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x10(%RAX),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV (%RBX),%RBP	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%RBX),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD $0x2,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
INC %RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDI,0xb0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
SUB %RCX,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV $-0x2,%R12D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDI,0x88(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
AND %RDI,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RBP,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R13,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x20(%RSP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,0x10(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDX,0x30(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R8,0xa8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RBP,0xa0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDI,0x98(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RBX,0x90(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
JE 41e516 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.9+0xac6>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOVD %EDX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (6.3%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x1e0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVD 0x4(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	scal (6.3%)
PSHUFD $0x50,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x1d0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RSI,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x1c0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R10,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x1b0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R8,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x1a0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVD %EAX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (6.3%)
PSHUFD $0x50,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x190(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R13,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x180(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ 0x8(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x170(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ 0x18(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x160(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R9,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x150(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R15,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x140(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RBP,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x130(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ 0x38(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x120(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R11,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x110(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R14,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x100(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RDI,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xf0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RBX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xe0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RCX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM11	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
PADDQ 0x4d6c1(%RIP),%XMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	vect (25.0%)
XOR %EBX,%EBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOVAPD 0x4cd76(%RIP),%XMM12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
MOVAPD 0x4d71d(%RIP),%XMM14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
JMP 41de55 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.9+0x405>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
ADD $0x228,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP %R12,0x88(%RSP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOV 0x40(%RSP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
JNE 41e513 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.9+0xac3>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV $0x47c4b0,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x28(%RSP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
ADD $0x228,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 403050 <__kmpc_for_static_fini@plt>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %R12,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVAPD 0x4c5b2(%RIP),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
MOVSD 0x4c552(%RIP),%XMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOVSD 0x4cf92(%RIP),%XMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOVAPD 0x4cf7a(%RIP),%XMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
MOVAPD 0x4c592(%RIP),%XMM5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
MOVSD 0x4cf82(%RIP),%XMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
JMP 41e58a <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.9+0xb3a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_0

Source file and lines
Module	exec

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

39% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

23% of SSE/AVX loads are used in vector version.
42% of SSE/AVX stores are used in vector version.
50% of SSE/AVX addition or subtraction instructions are used in vector version.
48% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

__kmpc_for_static_init_8@plt: 1 occurrences►

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

MOVD: 2 occurrences►
MOVQ: 12 occurrences►

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 392 bytes. The binary function is storing 444 bytes.

General properties

nb instructions	179
nb uops	189
loop length	956
used x86 registers	16
used mmx registers	0
used xmm registers	10
used ymm registers	0
used zmm registers	0
nb stack references	51

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	23.63 cycles
front end	23.63 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	5.17	5.17	5.17	5.17	5.17	5.17	21.50	21.50	21.50	21.50	8.25	8.25	8.25	8.25	8.50	8.50
cycles	5.17	5.17	5.17	5.17	5.17	5.17	21.50	21.50	21.50	21.50	8.25	8.25	8.25	8.25	8.50	8.50

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	23.63
Dispatch	21.50
Overall L1	23.63

Vectorization ratios

INT

all	37%
load	5%
store	42%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	50%
fma	NA (no fma vectorizable/vectorized instructions)
other	48%

all	62%
load	62%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	39%
load	23%
store	42%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	50%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	48%

Vector efficiency ratios

INT

all	16%
load	11%
store	17%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	15%
fma	NA (no fma vectorizable/vectorized instructions)
other	18%

all	20%
load	20%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	16%
load	14%
store	17%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	15%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	18%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 23.63 cycles. At this rate:

6% of peak load performance is reached (16.59 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
14% of peak store performance is reached (18.79 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 41da50

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x228,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,0x10(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x2a0(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x290(%RSP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x288(%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x278(%RSP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x270(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x268(%RSP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x260(%RSP),%RBP	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x280(%RSP),%EDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOV %EDX,0x4(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOVL $0,0x2c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
TEST %RAX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JS 41e4d3 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.9+0xa83>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %R8,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RCX,0x60(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R9,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RSI,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOVQ $0,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %RAX,0x50(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ $0x1,0xb8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA 0xc0(%RSP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x34(%RSP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x60(%RSP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x58(%RSP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV $0x47c490,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %ESI,0x30(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 4031e0 <__kmpc_for_static_init_8@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x58(%RSP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x50(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
CMP %RAX,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JA 41e4f4 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.9+0xaa4>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %RAX,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R14,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV 0x48(%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
SUB %ESI,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV (%R13),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x10(%R13),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV (%R12),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,0x20(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x10(%R12),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,0x8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x60(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x8(%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,0x18(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%R15),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x10(%R15),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RBP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,0x38(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x70(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RAX),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x10(%RAX),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV (%RBX),%RBP	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%RBX),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
ADD $0x2,%EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
INC %RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDI,0xb0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
SUB %RCX,%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV $-0x2,%R12D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDI,0x88(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
AND %RDI,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RBP,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R13,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV 0x20(%RSP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RAX,0x10(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDX,0x30(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R8,0xa8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RBP,0xa0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDI,0x98(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RBX,0x90(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
JE 41e516 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.9+0xac6>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOVD %EDX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (6.3%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x1e0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVD 0x4(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	scal (6.3%)
PSHUFD $0x50,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x1d0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RSI,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x1c0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R10,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x1b0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R8,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x1a0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVD %EAX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (6.3%)
PSHUFD $0x50,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x190(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R13,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x180(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ 0x8(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x170(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ 0x18(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x160(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R9,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x150(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R15,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x140(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RBP,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x130(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ 0x38(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x120(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R11,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x110(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R14,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x100(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RDI,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xf0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RBX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xe0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RCX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM11	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
PADDQ 0x4d6c1(%RIP),%XMM11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	vect (25.0%)
XOR %EBX,%EBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	N/A
MOVAPD 0x4cd76(%RIP),%XMM12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
MOVAPD 0x4d71d(%RIP),%XMM14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
JMP 41de55 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.9+0x405>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
ADD $0x228,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP %R12,0x88(%RSP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOV 0x40(%RSP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
JNE 41e513 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.9+0xac3>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV $0x47c4b0,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x28(%RSP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
ADD $0x228,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 403050 <__kmpc_for_static_fini@plt>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %R12,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVAPD 0x4c5b2(%RIP),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
MOVSD 0x4c552(%RIP),%XMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOVSD 0x4cf92(%RIP),%XMM3	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
MOVAPD 0x4cf7a(%RIP),%XMM4	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
MOVAPD 0x4c592(%RIP),%XMM5	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	vect (25.0%)
MOVSD 0x4cf82(%RIP),%XMM6	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.50	scal (12.5%)
JMP 41e58a <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.9+0xb3a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼advec_cell_kernel(int, int, int, int, int, int, clover::Buffer1D&, clover::Buffer1D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D–	3.84	1.58
○Loop 153 - - exec	3.84	1.57
○Loop 152 - - exec	0.00	0.00

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CALL instructions

Details

Complex instructions

Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code