OV - exec - Function advec_cell_kernel(int, int, int, int, int, int, clover::Buffer1D<double>&, clover::Buffer1D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&) [clone .extracted]

	Function: advec_cell_kernel(int, int, int, int, int, int, clover::Buffer1D<double>&, clover::Buffer1 ...	Module: exec	Source: :0-0	Coverage (incl. loops): 3.13% \| (excl. loops): 0.00%

  ***  This Panel is Intentionally Left Blank.  ***

It is due to a lack of debug symbols in the given object
(loop or function).

0x41d190 PUSH	%RBP

0x41d191 PUSH	%R15

0x41d193 PUSH	%R14

0x41d195 PUSH	%R13

0x41d197 PUSH	%R12

0x41d199 PUSH	%RBX

0x41d19a SUB	$0x188,%RSP

0x41d1a1 MOV	%RCX,%RSI

0x41d1a4 MOV	0x1f0(%RSP),%RAX

0x41d1ac MOV	0x1e0(%RSP),%R14

0x41d1b4 MOV	0x1d8(%RSP),%R11

0x41d1bc MOV	0x1c8(%RSP),%RBX

0x41d1c4 MOV	0x1c0(%RSP),%RBP

0x41d1cc MOV	0x1d0(%RSP),%ECX

0x41d1d3 MOV	%ECX,0xc(%RSP)

0x41d1d7 MOVL	$0,0x3c(%RSP)

0x41d1df TEST	%RAX,%RAX

0x41d1e2 JS	41d8da

0x41d1e8 MOV	%R8,%R12

0x41d1eb MOV	%RDX,%R13

0x41d1ee MOV	%RSI,0x20(%RSP)

0x41d1f3 MOV	%R9,0x30(%RSP)

0x41d1f8 MOV	(%RDI),%ESI

0x41d1fa MOVQ	$0,0x60(%RSP)

0x41d203 MOV	%RAX,0x58(%RSP)

0x41d208 MOVQ	$0x1,0xb8(%RSP)

0x41d214 SUB	$0x8,%RSP

0x41d218 LEA	0xc0(%RSP),%RAX

0x41d220 LEA	0x44(%RSP),%RCX

0x41d225 LEA	0x68(%RSP),%R8

0x41d22a LEA	0x60(%RSP),%R9

0x41d22f MOV	$0x47c430,%EDI

0x41d234 MOV	%ESI,0x40(%RSP)

0x41d238 MOV	$0x22,%EDX

0x41d23d PUSH	$0x1

0x41d23f PUSH	$0x1

0x41d241 PUSH	%RAX

0x41d242 MOV	%R11,0x48(%RSP)

0x41d247 CALL	4031e0 <__kmpc_for_static_init_8@plt>

0x41d24c ADD	$0x20,%RSP

0x41d250 MOV	0x60(%RSP),%RCX

0x41d255 MOV	0x58(%RSP),%R15

0x41d25a CMP	%R15,%RCX

0x41d25d JA	41d8bb

0x41d263 MOV	%R14,%R10

0x41d266 MOV	0x28(%RSP),%RSI

0x41d26b SUB	%ESI,%R10D

0x41d26e MOV	(%R13),%RAX

0x41d272 MOV	0x10(%R13),%R13

0x41d276 MOV	(%RBP),%RDX

0x41d27a MOV	%RDX,0x18(%RSP)

0x41d27f MOV	0x10(%RBP),%R11

0x41d283 MOV	(%R12),%RDI

0x41d287 MOV	%RDI,0x10(%RSP)

0x41d28c MOV	0x10(%R12),%RDX

0x41d291 MOV	0x20(%RSP),%R9

0x41d296 MOV	(%R9),%R8

0x41d299 MOV	%R8,0x50(%RSP)

0x41d29e MOV	0x10(%R9),%RDI

0x41d2a2 MOV	(%RBX),%R9

0x41d2a5 MOV	0x10(%RBX),%R12

0x41d2a9 MOV	0x30(%RSP),%R14

0x41d2ae MOV	(%R14),%RBX

0x41d2b1 MOV	0x10(%R14),%R8

0x41d2b5 INC	%R15

0x41d2b8 MOV	%R15,%R14

0x41d2bb SUB	%RCX,%R14

0x41d2be MOV	$-0x2,%EBP

0x41d2c3 MOV	%R14,0x80(%RSP)

0x41d2cb AND	%R14,%RBP

0x41d2ce MOV	%RBX,%R14

0x41d2d1 MOV	%R12,%RBX

0x41d2d4 MOV	%R9,%R12

0x41d2d7 MOV	%RDX,0x40(%RSP)

0x41d2dc MOV	%RDI,0x20(%RSP)

0x41d2e1 MOV	%R9,0xa8(%RSP)

0x41d2e9 MOV	%RBX,0xa0(%RSP)

0x41d2f1 MOV	%R14,0x98(%RSP)

0x41d2f9 MOV	%R8,0x90(%RSP)

0x41d301 MOV	%RAX,0xb0(%RSP)

0x41d309 MOV	%R11,0x48(%RSP)

0x41d30e JE	41d8ec

0x41d314 MOV	%RDI,%R9

0x41d317 MOV	%R15,0x70(%RSP)

0x41d31c MOV	%R10,0x78(%RSP)

0x41d321 MOVD	%R10D,%XMM0

0x41d326 PSHUFD	$0x44,%XMM0,%XMM0

0x41d32b MOVDQA	%XMM0,0x170(%RSP)

0x41d334 MOVD	0xc(%RSP),%XMM0

0x41d33a PSHUFD	$0x50,%XMM0,%XMM0

0x41d33f MOVDQA	%XMM0,0x160(%RSP)

0x41d348 MOVQ	%RSI,%XMM0

0x41d34d PSHUFD	$0x44,%XMM0,%XMM0

0x41d352 MOVDQA	%XMM0,0x150(%RSP)

0x41d35b MOVQ	%RAX,%XMM0

0x41d360 PSHUFD	$0x44,%XMM0,%XMM0

0x41d365 MOVDQA	%XMM0,0x140(%RSP)

0x41d36e MOV	%R13,0x68(%RSP)

0x41d373 MOVQ	%R13,%XMM0

0x41d378 PSHUFD	$0x44,%XMM0,%XMM0

0x41d37d MOVDQA	%XMM0,0x130(%RSP)

0x41d386 MOVQ	0x18(%RSP),%XMM0

0x41d38c PSHUFD	$0x44,%XMM0,%XMM0

0x41d391 MOVDQA	%XMM0,0x120(%RSP)

0x41d39a MOVQ	%R11,%XMM0

0x41d39f PSHUFD	$0x44,%XMM0,%XMM0

0x41d3a4 MOVDQA	%XMM0,0x110(%RSP)

0x41d3ad MOVQ	0x10(%RSP),%XMM0

0x41d3b3 PSHUFD	$0x44,%XMM0,%XMM14

0x41d3b9 MOVQ	%RDX,%XMM0

0x41d3be PSHUFD	$0x44,%XMM0,%XMM0

0x41d3c3 MOVDQA	%XMM0,0x100(%RSP)

0x41d3cc MOVQ	0x50(%RSP),%XMM0

0x41d3d2 PSHUFD	$0x44,%XMM0,%XMM0

0x41d3d7 MOVDQA	%XMM0,0xc0(%RSP)

0x41d3e0 MOVQ	%RDI,%XMM0

0x41d3e5 PSHUFD	$0x44,%XMM0,%XMM0

0x41d3ea MOVDQA	%XMM0,0xf0(%RSP)

0x41d3f3 MOVQ	%R12,%XMM0

0x41d3f8 PSHUFD	$0x44,%XMM0,%XMM11

0x41d3fe MOVQ	%RBX,%XMM0

0x41d403 PSHUFD	$0x44,%XMM0,%XMM0

0x41d408 MOVDQA	%XMM0,0xe0(%RSP)

0x41d411 MOVQ	%R14,%XMM0

0x41d416 PSHUFD	$0x44,%XMM0,%XMM13

0x41d41c MOVQ	%R8,%XMM0

0x41d421 PSHUFD	$0x44,%XMM0,%XMM0

0x41d426 MOVDQA	%XMM0,0xd0(%RSP)

0x41d42f MOVQ	%RCX,%XMM0

0x41d434 PSHUFD	$0x44,%XMM0,%XMM15

0x41d43a PADDQ	0x4dfcd(%RIP),%XMM15

0x41d443 XOR	%R8D,%R8D

0x41d446 MOV	%RBP,0x88(%RSP)

0x41d44e XCHG	%AX,%AX

(151) 0x41d450 MOVQ	%XMM15,%RSI

(151) 0x41d455 MOVDQA	0x170(%RSP),%XMM2

(151) 0x41d45e MOVQ	%XMM2,%R9

(151) 0x41d463 XOR	%EDX,%EDX

(151) 0x41d465 MOV	%RSI,%RAX

(151) 0x41d468 DIV	%R9

(151) 0x41d46b PSHUFD	$-0x12,%XMM15,%XMM0

(151) 0x41d471 MOVQ	%RAX,%XMM1

(151) 0x41d476 MOVQ	%XMM0,%RDI

(151) 0x41d47b PSHUFD	$-0x12,%XMM2,%XMM0

(151) 0x41d480 MOVQ	%XMM0,%R10

(151) 0x41d485 MOV	%RDI,%RAX

(151) 0x41d488 XOR	%EDX,%EDX

(151) 0x41d48a DIV	%R10

(151) 0x41d48d MOVQ	%RAX,%XMM0

(151) 0x41d492 PUNPCKLQDQ	%XMM0,%XMM1

(151) 0x41d496 PSHUFD	$-0x18,%XMM1,%XMM10

(151) 0x41d49c PADDD	0x160(%RSP),%XMM10

(151) 0x41d4a6 MOV	%RSI,%RAX

(151) 0x41d4a9 CQTO

(151) 0x41d4ab IDIV	%R9

(151) 0x41d4ae MOVQ	%RDX,%XMM0

(151) 0x41d4b3 MOV	%RDI,%RAX

(151) 0x41d4b6 CQTO

(151) 0x41d4b8 IDIV	%R10

(151) 0x41d4bb MOVQ	%RDX,%XMM1

(151) 0x41d4c0 PUNPCKLQDQ	%XMM1,%XMM0

(151) 0x41d4c4 PADDQ	0x150(%RSP),%XMM0

(151) 0x41d4cd PSLLQ	$0x20,%XMM0

(151) 0x41d4d2 PXOR	%XMM6,%XMM6

(151) 0x41d4d6 PCMPGTD	%XMM10,%XMM6

(151) 0x41d4db MOVDQA	%XMM10,%XMM2

(151) 0x41d4e0 PSHUFD	$-0x13,%XMM0,%XMM4

(151) 0x41d4e5 PUNPCKLDQ	%XMM6,%XMM2

(151) 0x41d4e9 MOVDQA	0x140(%RSP),%XMM1

(151) 0x41d4f2 MOVDQA	%XMM1,%XMM3

(151) 0x41d4f6 PMULUDQ	%XMM2,%XMM3

(151) 0x41d4fa MOVDQA	%XMM4,%XMM0

(151) 0x41d4fe MOVDQA	%XMM1,%XMM5

(151) 0x41d502 PSRLQ	$0x20,%XMM5

(151) 0x41d507 PMULUDQ	%XMM2,%XMM5

(151) 0x41d50b PSRAD	$0x1f,%XMM0

(151) 0x41d510 PXOR	%XMM9,%XMM9

(151) 0x41d515 PUNPCKLDQ	%XMM9,%XMM6

(151) 0x41d51a PMULUDQ	%XMM6,%XMM1

(151) 0x41d51e PADDQ	%XMM5,%XMM1

(151) 0x41d522 MOVDQA	0x120(%RSP),%XMM8

(151) 0x41d52c MOVDQA	%XMM8,%XMM5

(151) 0x41d531 PMULUDQ	%XMM2,%XMM5

(151) 0x41d535 MOVDQA	%XMM8,%XMM7

(151) 0x41d53a PUNPCKLDQ	%XMM0,%XMM4

(151) 0x41d53e PSRLQ	$0x20,%XMM7

(151) 0x41d543 PMULUDQ	%XMM2,%XMM7

(151) 0x41d547 PSLLQ	$0x20,%XMM1

(151) 0x41d54c PMULUDQ	%XMM6,%XMM8

(151) 0x41d551 PADDQ	%XMM7,%XMM8

(151) 0x41d556 MOVDQA	%XMM14,%XMM0

(151) 0x41d55b PSLLQ	$0x20,%XMM8

(151) 0x41d561 PSRLQ	$0x20,%XMM0

(151) 0x41d566 MOVDQA	%XMM0,%XMM7

(151) 0x41d56a PMULUDQ	%XMM2,%XMM7

(151) 0x41d56e PADDQ	%XMM4,%XMM3

(151) 0x41d572 MOVDQA	%XMM14,%XMM12

(151) 0x41d577 PMULUDQ	%XMM6,%XMM12

(151) 0x41d57c PADDQ	%XMM7,%XMM12

(151) 0x41d581 PADDQ	%XMM4,%XMM5

(151) 0x41d585 MOVDQA	%XMM14,%XMM7

(151) 0x41d58a PMULUDQ	%XMM2,%XMM7

(151) 0x41d58e PSUBD	0x4dec9(%RIP),%XMM10

(151) 0x41d597 PADDQ	%XMM1,%XMM3

(151) 0x41d59b PXOR	%XMM1,%XMM1

(151) 0x41d59f PCMPGTD	%XMM10,%XMM1

(151) 0x41d5a4 PUNPCKLDQ	%XMM1,%XMM10

(151) 0x41d5a9 PADDQ	%XMM8,%XMM5

(151) 0x41d5ae PMULUDQ	%XMM10,%XMM0

(151) 0x41d5b3 PUNPCKLDQ	%XMM9,%XMM1

(151) 0x41d5b8 MOVDQA	%XMM14,%XMM8

(151) 0x41d5bd PSLLQ	$0x20,%XMM12

(151) 0x41d5c3 PMULUDQ	%XMM1,%XMM8

(151) 0x41d5c8 PADDQ	%XMM0,%XMM8

(151) 0x41d5cd MOVDQA	%XMM14,%XMM0

(151) 0x41d5d2 PADDQ	%XMM4,%XMM7

(151) 0x41d5d6 PMULUDQ	%XMM10,%XMM0

(151) 0x41d5db PSLLQ	$0x20,%XMM8

(151) 0x41d5e1 PADDQ	%XMM4,%XMM0

(151) 0x41d5e5 PADDQ	%XMM12,%XMM7

(151) 0x41d5ea MOVDQA	0xc0(%RSP),%XMM9

(151) 0x41d5f4 MOVDQA	%XMM9,%XMM12

(151) 0x41d5f9 PSRLQ	$0x20,%XMM12

(151) 0x41d5ff PMULUDQ	%XMM2,%XMM12

(151) 0x41d604 PADDQ	%XMM8,%XMM0

(151) 0x41d609 MOVDQA	%XMM9,%XMM8

(151) 0x41d60e PMULUDQ	%XMM6,%XMM8

(151) 0x41d613 PADDQ	%XMM12,%XMM8

(151) 0x41d618 PSLLQ	$0x3,%XMM3

(151) 0x41d61d PADDQ	0x130(%RSP),%XMM3

(151) 0x41d626 MOVQ	%XMM3,%RSI

(151) 0x41d62b PSHUFD	$-0x12,%XMM3,%XMM3

(151) 0x41d630 MOVQ	%XMM3,%RDX

(151) 0x41d635 PSLLQ	$0x3,%XMM5

(151) 0x41d63a PADDQ	0x110(%RSP),%XMM5

(151) 0x41d643 MOVQ	%XMM5,%R9

(151) 0x41d648 PSHUFD	$-0x12,%XMM5,%XMM3

(151) 0x41d64d PSLLQ	$0x3,%XMM7

(151) 0x41d652 MOVDQA	0x100(%RSP),%XMM12

(151) 0x41d65c PADDQ	%XMM12,%XMM7

(151) 0x41d661 MOVQ	%XMM7,%RDI

(151) 0x41d666 PSHUFD	$-0x12,%XMM7,%XMM5

(151) 0x41d66b PSLLQ	$0x3,%XMM0

(151) 0x41d670 PADDQ	%XMM12,%XMM0

(151) 0x41d675 MOVQ	%XMM0,0x30(%RSP)

(151) 0x41d67b MOVQ	%XMM3,%R13

(151) 0x41d680 MOVDQA	%XMM9,%XMM3

(151) 0x41d685 PMULUDQ	%XMM2,%XMM3

(151) 0x41d689 PSLLQ	$0x20,%XMM8

(151) 0x41d68f PSHUFD	$-0x12,%XMM0,%XMM7

(151) 0x41d694 PADDQ	%XMM4,%XMM3

(151) 0x41d698 PADDQ	%XMM8,%XMM3

(151) 0x41d69d MOVDQA	%XMM11,%XMM0

(151) 0x41d6a2 MOVQ	%XMM5,%R15

(151) 0x41d6a7 PSRLQ	$0x20,%XMM0

(151) 0x41d6ac MOVDQA	%XMM0,%XMM5

(151) 0x41d6b0 PMULUDQ	%XMM2,%XMM5

(151) 0x41d6b4 MOVQ	%XMM7,%R12

(151) 0x41d6b9 MOVDQA	%XMM11,%XMM7

(151) 0x41d6be PMULUDQ	%XMM6,%XMM7

(151) 0x41d6c2 PADDQ	%XMM5,%XMM7

(151) 0x41d6c6 PSLLQ	$0x3,%XMM3

(151) 0x41d6cb PADDQ	0xf0(%RSP),%XMM3

(151) 0x41d6d4 MOVQ	%XMM3,%R10

(151) 0x41d6d9 PSHUFD	$-0x12,%XMM3,%XMM3

(151) 0x41d6de MOVQ	%XMM3,%RBP

(151) 0x41d6e3 MOVDQA	%XMM11,%XMM3

(151) 0x41d6e8 PMULUDQ	%XMM2,%XMM3

(151) 0x41d6ec PSLLQ	$0x20,%XMM7

(151) 0x41d6f1 PADDQ	%XMM4,%XMM3

(151) 0x41d6f5 PADDQ	%XMM7,%XMM3

(151) 0x41d6f9 PMULUDQ	%XMM10,%XMM0

(151) 0x41d6fe MOVDQA	%XMM11,%XMM5

(151) 0x41d703 PMULUDQ	%XMM1,%XMM5

(151) 0x41d707 PADDQ	%XMM0,%XMM5

(151) 0x41d70b MOVDQA	%XMM11,%XMM0

(151) 0x41d710 PMULUDQ	%XMM10,%XMM0

(151) 0x41d715 PSLLQ	$0x20,%XMM5

(151) 0x41d71a PADDQ	%XMM4,%XMM0

(151) 0x41d71e PADDQ	%XMM5,%XMM0

(151) 0x41d722 PSLLQ	$0x3,%XMM3

(151) 0x41d727 MOVDQA	0xe0(%RSP),%XMM5

(151) 0x41d730 PADDQ	%XMM5,%XMM3

(151) 0x41d734 MOVQ	%XMM3,%RBX

(151) 0x41d739 PSHUFD	$-0x12,%XMM3,%XMM3

(151) 0x41d73e PSLLQ	$0x3,%XMM0

(151) 0x41d743 MOVQ	%XMM3,%R14

(151) 0x41d748 PADDQ	%XMM5,%XMM0

(151) 0x41d74c MOVQ	%XMM0,%R11

(151) 0x41d751 PSHUFD	$-0x12,%XMM0,%XMM0

(151) 0x41d756 MOVQ	%XMM0,%RAX

(151) 0x41d75b MOVDQA	%XMM13,%XMM3

(151) 0x41d760 MOVDQA	%XMM13,%XMM0

(151) 0x41d765 PSRLQ	$0x20,%XMM0

(151) 0x41d76a PMULUDQ	%XMM2,%XMM3

(151) 0x41d76e PMULUDQ	%XMM0,%XMM2

(151) 0x41d772 PMULUDQ	%XMM13,%XMM6

(151) 0x41d777 PADDQ	%XMM2,%XMM6

(151) 0x41d77b MOVSD	(%RSI),%XMM2

(151) 0x41d77f PSLLQ	$0x20,%XMM6

(151) 0x41d784 PADDQ	%XMM4,%XMM3

(151) 0x41d788 PADDQ	%XMM6,%XMM3

(151) 0x41d78c MOVSD	(%R9),%XMM5

(151) 0x41d791 MOVHPD	(%R13),%XMM5

(151) 0x41d797 PSLLQ	$0x3,%XMM3

(151) 0x41d79c MOVDQA	0xd0(%RSP),%XMM6

(151) 0x41d7a5 PADDQ	%XMM6,%XMM3

(151) 0x41d7a9 MOVQ	%XMM3,%R9

(151) 0x41d7ae PSHUFD	$-0x12,%XMM3,%XMM3

(151) 0x41d7b3 MOVQ	%XMM3,%R13

(151) 0x41d7b8 MOVSD	(%R9),%XMM3

(151) 0x41d7bd MOVHPD	(%RDX),%XMM2

(151) 0x41d7c1 MOVHPD	(%R13),%XMM3

(151) 0x41d7c7 MULPD	%XMM5,%XMM2

(151) 0x41d7cb ADDPD	%XMM5,%XMM3

(151) 0x41d7cf MOVDQA	%XMM13,%XMM5

(151) 0x41d7d4 PMULUDQ	%XMM10,%XMM5

(151) 0x41d7d9 PMULUDQ	%XMM10,%XMM0

(151) 0x41d7de PMULUDQ	%XMM13,%XMM1

(151) 0x41d7e3 PADDQ	%XMM0,%XMM1

(151) 0x41d7e7 MOVSD	(%RDI),%XMM0

(151) 0x41d7eb MOVHPD	(%R15),%XMM0

(151) 0x41d7f0 PADDQ	%XMM4,%XMM5

(151) 0x41d7f4 ADDPD	%XMM2,%XMM0

(151) 0x41d7f8 MOVSD	(%R10),%XMM4

(151) 0x41d7fd MOVHPD	(%RBP),%XMM4

(151) 0x41d802 MULPD	%XMM2,%XMM4

(151) 0x41d806 MOV	0x30(%RSP),%RDI

(151) 0x41d80b MOVSD	(%RDI),%XMM2

(151) 0x41d80f MOVHPD	(%R12),%XMM2

(151) 0x41d815 SUBPD	%XMM2,%XMM0

(151) 0x41d819 MOVSD	(%RBX),%XMM2

(151) 0x41d81d MOVHPD	(%R14),%XMM2

(151) 0x41d822 ADDPD	%XMM4,%XMM2

(151) 0x41d826 MOVSD	(%R11),%XMM4

(151) 0x41d82b MOVHPD	(%RAX),%XMM4

(151) 0x41d82f SUBPD	%XMM4,%XMM2

(151) 0x41d833 PSLLQ	$0x20,%XMM1

(151) 0x41d838 PADDQ	%XMM1,%XMM5

(151) 0x41d83c PSLLQ	$0x3,%XMM5

(151) 0x41d841 PADDQ	%XMM6,%XMM5

(151) 0x41d845 MOVQ	%XMM5,%RAX

(151) 0x41d84a PSHUFD	$-0x12,%XMM5,%XMM1

(151) 0x41d84f MOVQ	%XMM1,%RDI

(151) 0x41d854 MOVSD	(%RAX),%XMM1

(151) 0x41d858 MOVHPD	(%RDI),%XMM1

(151) 0x41d85c SUBPD	%XMM1,%XMM3

(151) 0x41d860 DIVPD	%XMM0,%XMM2

(151) 0x41d864 DIVPD	%XMM3,%XMM0

(151) 0x41d868 MOVLPD	%XMM0,(%RSI)

(151) 0x41d86c MOVHPD	%XMM0,(%RDX)

(151) 0x41d870 MOVLPD	%XMM2,(%R10)

(151) 0x41d875 MOVHPD	%XMM2,(%RBP)

(151) 0x41d87a MOV	0x88(%RSP),%RBP

(151) 0x41d882 PADDQ	0x4dba5(%RIP),%XMM15

(151) 0x41d88b ADD	$0x2,%R8

(151) 0x41d88f CMP	%RBP,%R8

(151) 0x41d892 JB	41d450

0x41d898 CMP	%RBP,0x80(%RSP)

0x41d8a0 MOV	0x78(%RSP),%R10

0x41d8a5 MOV	0x70(%RSP),%R15

0x41d8aa MOV	0x68(%RSP),%R13

0x41d8af MOV	0x18(%RSP),%R14

0x41d8b4 MOV	0x10(%RSP),%R12

0x41d8b9 JNE	41d8fb

0x41d8bb MOV	$0x47c450,%EDI

0x41d8c0 MOV	0x38(%RSP),%ESI

0x41d8c4 ADD	$0x188,%RSP

0x41d8cb POP	%RBX

0x41d8cc POP	%R12

0x41d8ce POP	%R13

0x41d8d0 POP	%R14

0x41d8d2 POP	%R15

0x41d8d4 POP	%RBP

0x41d8d5 JMP	403050

0x41d8da ADD	$0x188,%RSP

0x41d8e1 POP	%RBX

0x41d8e2 POP	%R12

0x41d8e4 POP	%R13

0x41d8e6 POP	%R14

0x41d8e8 POP	%R15

0x41d8ea POP	%RBP

0x41d8eb RET

0x41d8ec MOV	0x18(%RSP),%R14

0x41d8f1 MOV	0x10(%RSP),%R12

0x41d8f6 JMP	41da0a

0x41d8fb ADD	%RBP,%RCX

0x41d8fe JMP	41da0a

0x41d903 NOPW	%CS:(%RAX,%RAX,1)

(150) 0x41d910 MOV	%RCX,%RAX

(150) 0x41d913 CQTO

(150) 0x41d915 IDIV	%R10

(150) 0x41d918 MOV	0x28(%RSP),%RAX

(150) 0x41d91d ADD	%EAX,%EDX

(150) 0x41d91f MOVSXD	%EDX,%RDX

(150) 0x41d922 MOVSXD	%ESI,%RSI

(150) 0x41d925 MOV	0xb0(%RSP),%RAX

(150) 0x41d92d IMUL	%RSI,%RAX

(150) 0x41d931 ADD	%RDX,%RAX

(150) 0x41d934 MOV	%R14,%RDI

(150) 0x41d937 IMUL	%RSI,%RDI

(150) 0x41d93b ADD	%RDX,%RDI

(150) 0x41d93e MOVSD	(%R8,%RDI,8),%XMM1

(150) 0x41d944 MOVSD	(%R13,%RAX,8),%XMM0

(150) 0x41d94b MULSD	%XMM1,%XMM0

(150) 0x41d94f MOV	%R12,%RDI

(150) 0x41d952 IMUL	%RSI,%RDI

(150) 0x41d956 ADD	%RDX,%RDI

(150) 0x41d959 MOVSD	(%R9,%RDI,8),%XMM2

(150) 0x41d95f ADDSD	%XMM0,%XMM2

(150) 0x41d963 LEA	0x1(%RSI),%EDI

(150) 0x41d966 MOVSXD	%EDI,%RDI

(150) 0x41d969 MOV	%R12,%R8

(150) 0x41d96c IMUL	%RDI,%R8

(150) 0x41d970 ADD	%RDX,%R8

(150) 0x41d973 SUBSD	(%R9,%R8,8),%XMM2

(150) 0x41d979 MOV	0x50(%RSP),%R8

(150) 0x41d97e IMUL	%RSI,%R8

(150) 0x41d982 ADD	%RDX,%R8

(150) 0x41d985 MOV	0x20(%RSP),%RBP

(150) 0x41d98a MULSD	(%RBP,%R8,8),%XMM0

(150) 0x41d991 MOV	0xa8(%RSP),%R11

(150) 0x41d999 MOV	%R11,%R9

(150) 0x41d99c IMUL	%RSI,%R9

(150) 0x41d9a0 ADD	%RDX,%R9

(150) 0x41d9a3 MOV	0xa0(%RSP),%RBX

(150) 0x41d9ab ADDSD	(%RBX,%R9,8),%XMM0

(150) 0x41d9b1 IMUL	%RDI,%R11

(150) 0x41d9b5 ADD	%RDX,%R11

(150) 0x41d9b8 SUBSD	(%RBX,%R11,8),%XMM0

(150) 0x41d9be MOV	0x98(%RSP),%R9

(150) 0x41d9c6 IMUL	%R9,%RSI

(150) 0x41d9ca ADD	%RDX,%RSI

(150) 0x41d9cd MOV	0x90(%RSP),%R11

(150) 0x41d9d5 ADDSD	(%R11,%RSI,8),%XMM1

(150) 0x41d9db IMUL	%R9,%RDI

(150) 0x41d9df ADD	%RDX,%RDI

(150) 0x41d9e2 SUBSD	(%R11,%RDI,8),%XMM1

(150) 0x41d9e8 DIVSD	%XMM2,%XMM0

(150) 0x41d9ec DIVSD	%XMM1,%XMM2

(150) 0x41d9f0 MOVSD	%XMM2,(%R13,%RAX,8)

(150) 0x41d9f7 MOVSD	%XMM0,(%RBP,%R8,8)

(150) 0x41d9fe INC	%RCX

(150) 0x41da01 CMP	%RCX,%R15

(150) 0x41da04 JE	41d8bb

(150) 0x41da0a MOV	%RCX,%RDI

(150) 0x41da0d SHR	$0x20,%RDI

(150) 0x41da11 JE	41da20

(150) 0x41da13 MOV	%RCX,%RAX

(150) 0x41da16 XOR	%EDX,%EDX

(150) 0x41da18 DIV	%R10

(150) 0x41da1b MOV	%RAX,%RSI

(150) 0x41da1e JMP	41da29

(150) 0x41da20 MOV	%ECX,%EAX

(150) 0x41da22 XOR	%EDX,%EDX

(150) 0x41da24 DIV	%R10D

(150) 0x41da27 MOV	%EAX,%ESI

(150) 0x41da29 MOV	0x40(%RSP),%R9

(150) 0x41da2e MOV	0x48(%RSP),%R8

(150) 0x41da33 ADD	0xc(%RSP),%ESI

(150) 0x41da37 TEST	%RDI,%RDI

(150) 0x41da3a JNE	41d910

(150) 0x41da40 MOV	%ECX,%EAX

(150) 0x41da42 XOR	%EDX,%EDX

(150) 0x41da44 DIV	%R10D

(150) 0x41da47 JMP	41d918

0x41da4c NOPL	(%RAX)

Coverage (%)	Name	Module
►48.03+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
○	__GI___clone3	libc.so.6
►41.10+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
►5.34+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
○	_INTERNALea951ae6::__kmp_launc[...]	libiomp5.so
○	start_thread	libc.so.6
►2.29+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_launch_thread	libiomp5.so
►1.56+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_fork_call	libiomp5.so
○	__kmpc_fork_call	libiomp5.so
○	advec_cell_kernel(int, int, in[...]	exec
○	advec_cell_driver(global_varia[...]	exec
○	advection(global_variables&)	exec
○	hydro(global_variables&, paral[...]	exec
○	main	exec
○	__libc_start_call_main	libc.so.6
○	__libc_start_main	libc.so.6
○	_start	exec
►1.52+	__kmp_invoke_microtask	libiomp5.so
○	__kmp_invoke_task_func	libiomp5.so
○	__kmp_fork_call	libiomp5.so
○	__kmpc_fork_call	libiomp5.so
○	advec_cell_kernel(int, int, in[...]	exec
○	advec_cell_driver(global_varia[...]	exec
○	advection(global_variables&)	exec
○	hydro(global_variables&, paral[...]	exec
○	main	exec
○	__libc_start_call_main	libc.so.6
○	__libc_start_main	libc.so.6
○	_start	exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_0

Source file and lines
Module	exec

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 22.00 to 8.50 cycles (2.59x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is poorly vectorized. Only 15% of vector register length is used (average across all SSE/AVX instructions). By fully vectorizing your function, you can lower the cost of an iteration from 22.00 to 2.40 cycles (9.16x speedup).

Details

31% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

5% of SSE/AVX loads are used in vector version.
32% of SSE/AVX stores are used in vector version.
33% of SSE/AVX addition or subtraction instructions are used in vector version.
45% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

__kmpc_for_static_init_8@plt: 1 occurrences►

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

MOVD: 1 occurrences►
MOVQ: 11 occurrences►

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 296 bytes. The binary function is storing 380 bytes.

General properties

nb instructions	166
nb uops	176
loop length	828
used x86 registers	16
used mmx registers	0
used xmm registers	5
used ymm registers	0
used zmm registers	0
nb stack references	45

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	22.00 cycles
front end	22.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	5.00	5.00	5.00	5.00	5.00	5.00	19.00	19.00	19.00	19.00	7.25	7.25	7.25	7.25	6.00	6.00
cycles	5.00	5.00	5.00	5.00	5.00	5.00	19.00	19.00	19.00	19.00	7.25	7.25	7.25	7.25	6.00	6.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	22.00
Dispatch	19.00
Overall L1	22.00

Vectorization ratios

all	31%
load	5%
store	32%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	33%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	45%

Vector efficiency ratios

all	15%
load	12%
store	15%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	14%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	17%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 22.00 cycles. At this rate:

5% of peak load performance is reached (13.45 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
13% of peak store performance is reached (17.27 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 22.00 to 19.00 cycles (1.16x speedup).

ASM code

In the binary file, the address of the function is: 41d190

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x188,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RCX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV 0x1f0(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x1e0(%RSP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x1d8(%RSP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x1c8(%RSP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x1c0(%RSP),%RBP	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x1d0(%RSP),%ECX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %ECX,0xc(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOVL $0,0x3c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
TEST %RAX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JS 41d8da <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted+0x74a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %R8,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RSI,0x20(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R9,0x30(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOVQ $0,0x60(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %RAX,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ $0x1,0xb8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA 0xc0(%RSP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x44(%RSP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x68(%RSP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x60(%RSP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV $0x47c430,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %ESI,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %R11,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CALL 4031e0 <__kmpc_for_static_init_8@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x60(%RSP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x58(%RSP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
CMP %R15,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JA 41d8bb <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted+0x72b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %R14,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV 0x28(%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
SUB %ESI,%R10D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV (%R13),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%R13),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV %RDX,0x18(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x10(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV (%R12),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDI,0x10(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x10(%R12),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x20(%RSP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R9),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV %R8,0x50(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x10(%R9),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RBX),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%RBX),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x30(%RSP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R14),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%R14),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
INC %R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %R15,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %RCX,%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV $-0x2,%EBP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R14,0x80(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
AND %R14,%RBP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RBX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R12,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R9,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDX,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDI,0x20(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R9,0xa8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RBX,0xa0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R14,0x98(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R8,0x90(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RAX,0xb0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R11,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
JE 41d8ec <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted+0x75c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %RDI,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R15,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,0x78(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVD %R10D,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (6.3%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x170(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVD 0xc(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	scal (6.3%)
PSHUFD $0x50,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x160(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RSI,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x150(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RAX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x140(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOV %R13,0x68(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ %R13,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x130(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ 0x18(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x120(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R11,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x110(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ 0x10(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM14	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVQ %RDX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x100(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ 0x50(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xc0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RDI,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xf0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R12,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM11	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVQ %RBX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xe0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R14,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM13	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVQ %R8,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xd0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RCX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM15	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
PADDQ 0x4dfcd(%RIP),%XMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	vect (25.0%)
XOR %R8D,%R8D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
MOV %RBP,0x88(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CMP %RBP,0x80(%RSP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOV 0x78(%RSP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x70(%RSP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x68(%RSP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x18(%RSP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JNE 41d8fb <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted+0x76b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV $0x47c450,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x38(%RSP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
ADD $0x188,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 403050 <__kmpc_for_static_fini@plt>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD $0x188,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV 0x18(%RSP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JMP 41da0a <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted+0x87a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %RBP,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 41da0a <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted+0x87a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run icx_0

Source file and lines
Module	exec

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 22.00 to 8.50 cycles (2.59x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

31% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

5% of SSE/AVX loads are used in vector version.
32% of SSE/AVX stores are used in vector version.
33% of SSE/AVX addition or subtraction instructions are used in vector version.
45% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

__kmpc_for_static_init_8@plt: 1 occurrences►

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

MOVD: 1 occurrences►
MOVQ: 11 occurrences►

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 296 bytes. The binary function is storing 380 bytes.

General properties

nb instructions	166
nb uops	176
loop length	828
used x86 registers	16
used mmx registers	0
used xmm registers	5
used ymm registers	0
used zmm registers	0
nb stack references	45

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	22.00 cycles
front end	22.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	5.00	5.00	5.00	5.00	5.00	5.00	19.00	19.00	19.00	19.00	7.25	7.25	7.25	7.25	6.00	6.00
cycles	5.00	5.00	5.00	5.00	5.00	5.00	19.00	19.00	19.00	19.00	7.25	7.25	7.25	7.25	6.00	6.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	22.00
Dispatch	19.00
Overall L1	22.00

Vectorization ratios

all	31%
load	5%
store	32%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	33%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	45%

Vector efficiency ratios

all	15%
load	12%
store	15%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	14%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	17%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 22.00 cycles. At this rate:

5% of peak load performance is reached (13.45 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
13% of peak store performance is reached (17.27 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 41d190

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x188,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RCX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV 0x1f0(%RSP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x1e0(%RSP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x1d8(%RSP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x1c8(%RSP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x1c0(%RSP),%RBP	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x1d0(%RSP),%ECX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %ECX,0xc(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOVL $0,0x3c(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
TEST %RAX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JS 41d8da <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted+0x74a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %R8,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RSI,0x20(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R9,0x30(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
MOVQ $0,0x60(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV %RAX,0x58(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ $0x1,0xb8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LEA 0xc0(%RSP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x44(%RSP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x68(%RSP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LEA 0x60(%RSP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOV $0x47c430,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %ESI,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %R11,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
CALL 4031e0 <__kmpc_for_static_init_8@plt>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x60(%RSP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x58(%RSP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
CMP %R15,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
JA 41d8bb <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted+0x72b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %R14,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
MOV 0x28(%RSP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
SUB %ESI,%R10D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (6.3%)
MOV (%R13),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%R13),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV %RDX,0x18(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x10(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV (%R12),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV %RDI,0x10(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x10(%R12),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x20(%RSP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R9),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV %R8,0x50(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV 0x10(%R9),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%RBX),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%RBX),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x30(%RSP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV (%R14),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%R14),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
INC %R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %R15,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %RCX,%R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV $-0x2,%EBP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R14,0x80(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
AND %R14,%RBP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RBX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R12,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R9,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDX,0x40(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RDI,0x20(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R9,0xa8(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RBX,0xa0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R14,0x98(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R8,0x90(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %RAX,0xb0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R11,0x48(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
JE 41d8ec <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted+0x75c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV %RDI,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R15,0x70(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOV %R10,0x78(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVD %R10D,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (6.3%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x170(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVD 0xc(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.50	scal (6.3%)
PSHUFD $0x50,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x160(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RSI,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x150(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RAX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x140(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOV %R13,0x68(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
MOVQ %R13,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x130(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ 0x18(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x120(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R11,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x110(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ 0x10(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM14	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVQ %RDX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0x100(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ 0x50(%RSP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xc0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RDI,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xf0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R12,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM11	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVQ %RBX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xe0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %R14,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM13	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVQ %R8,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
MOVDQA %XMM0,0xd0(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	4	0.50	vect (25.0%)
MOVQ %RCX,%XMM0	2	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	6	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM15	1	0	0	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25	vect (25.0%)
PADDQ 0x4dfcd(%RIP),%XMM15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0.25	0	0	1	0.50	vect (25.0%)
XOR %R8D,%R8D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25	scal (6.3%)
MOV %RBP,0x88(%RSP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	4	0.50	scal (12.5%)
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
CMP %RBP,0x80(%RSP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOV 0x78(%RSP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x70(%RSP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (12.5%)
MOV 0x68(%RSP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x18(%RSP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JNE 41d8fb <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted+0x76b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50-1	N/A
MOV $0x47c450,%EDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x38(%RSP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	scal (6.3%)
ADD $0x188,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
JMP 403050 <__kmpc_for_static_fini@plt>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD $0x188,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV 0x18(%RSP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
MOV 0x10(%RSP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	3	0.25	N/A
JMP 41da0a <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted+0x87a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
ADD %RBP,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 41da0a <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted+0x87a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼advec_cell_kernel(int, int, int, int, int, int, clover::Buffer1D&, clover::Buffer1D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D–	3.13	1.29
○Loop 151 - - exec	3.13	1.29
○Loop 150 - - exec	0.00	0.00

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Type of elements and instruction set

Matching between your function (in the source code) and the binary function

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Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code