OV - exec - Function advec_cell_kernel(int, int, int, int, int, int, clover::Buffer1D<double>&, clover::Buffer1D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&) [clone .omp

	Function: advec_cell_kernel(int, int, int, int, int, int, clover::Buffer1D<double>&, clover::Buffer1 ...	Module: exec	Source: advec_cell.cpp:117-125 [...]	Coverage (incl. loops): 3.34% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_cell.cpp: 117 - 125

--------------------------------------------------------------------------------

117: #pragma omp parallel for simd collapse(2)

118:     for (int j = (y_min + 1); j < (y_max + 2); j++) {

119:       for (int i = (x_min + 1); i < (x_max + 2); i++) {

120:         double pre_mass_s = density1(i, j) * pre_vol(i, j);

121:         double post_mass_s = pre_mass_s + mass_flux_x(i, j) - mass_flux_x(i + 1, j + 0);

122:         double post_ener_s = (energy1(i, j) * pre_mass_s + ener_flux(i, j) - ener_flux(i + 1, j + 0)) / post_mass_s;

123:         double advec_vol_s = pre_vol(i, j) + vol_flux_x(i, j) - vol_flux_x(i + 1, j + 0);

124:         density1(i, j) = post_mass_s / advec_vol_s;

125:         energy1(i, j) = post_ener_s;

/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h: 69 - 69

--------------------------------------------------------------------------------

69:   T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; }

0x2317a0 PUSH	%RBP

0x2317a1 MOV	%RSP,%RBP

0x2317a4 PUSH	%R15

0x2317a6 PUSH	%R14

0x2317a8 PUSH	%R13

0x2317aa PUSH	%R12

0x2317ac PUSH	%RBX

0x2317ad SUB	$0xa8,%RSP

0x2317b4 MOV	(%RDX),%EAX

0x2317b6 MOV	(%RCX),%R14D

0x2317b9 INC	%EAX

0x2317bb ADD	$0x2,%R14D

0x2317bf MOV	%EAX,-0x30(%RBP)

0x2317c2 SUB	%EAX,%R14D

0x2317c5 JLE	231b55

0x2317cb MOV	(%R8),%R12D

0x2317ce MOV	(%R9),%R13D

0x2317d1 INC	%R12D

0x2317d4 ADD	$0x2,%R13D

0x2317d8 CMP	%R12D,%R13D

0x2317db JLE	231b55

0x2317e1 SUB	%R12D,%R13D

0x2317e4 IMUL	%R13,%R14

0x2317e8 DEC	%R14

0x2317eb MOVQ	$0,-0xa0(%RBP)

0x2317f6 MOV	%R14,-0x40(%RBP)

0x2317fa MOVQ	$0x1,-0xd0(%RBP)

0x231805 MOVL	$0,-0x48(%RBP)

0x23180c MOV	(%RDI),%ESI

0x23180e SUB	$0x8,%RSP

0x231812 LEA	-0xd0(%RBP),%RAX

0x231819 LEA	0x2c830(%RIP),%RDI

0x231820 LEA	-0x48(%RBP),%RCX

0x231824 LEA	-0xa0(%RBP),%R8

0x23182b LEA	-0x40(%RBP),%R9

0x23182f MOV	%ESI,-0x44(%RBP)

0x231832 MOV	$0x22,%EDX

0x231837 PUSH	$0x1

0x231839 PUSH	$0x1

0x23183b PUSH	%RAX

0x23183c CALL	25ccf0 <@plt_start@+0x530>

0x231841 ADD	$0x20,%RSP

0x231845 MOV	-0x40(%RBP),%RAX

0x231849 CMP	%R14,%RAX

0x23184c CMOVL	%RAX,%R14

0x231850 MOV	%R14,-0x40(%RBP)

0x231854 MOV	-0xa0(%RBP),%RSI

0x23185b CMP	%R14,%RSI

0x23185e JG	231b46

0x231864 MOV	0x38(%RBP),%RAX

0x231868 MOV	0x30(%RBP),%RCX

0x23186c MOV	0x28(%RBP),%RDX

0x231870 MOV	0x20(%RBP),%RDI

0x231874 MOV	0x18(%RBP),%R8

0x231878 MOV	0x10(%RBP),%R9

0x23187c MOV	(%R9),%RBX

0x23187f MOV	0x10(%R9),%R11

0x231883 MOV	(%R8),%R9

0x231886 MOV	%R9,-0x98(%RBP)

0x23188d MOV	0x10(%R8),%R8

0x231891 MOV	%R8,-0x90(%RBP)

0x231898 MOV	(%RDI),%R8

0x23189b MOV	%R8,-0x88(%RBP)

0x2318a2 MOV	0x10(%RDI),%RDI

0x2318a6 MOV	%RDI,-0x80(%RBP)

0x2318aa MOV	(%RDX),%RDI

0x2318ad MOV	%RDI,-0x78(%RBP)

0x2318b1 MOV	0x10(%RDX),%RDX

0x2318b5 MOV	%RDX,-0x70(%RBP)

0x2318b9 MOV	(%RCX),%RDX

0x2318bc MOV	%RDX,-0x68(%RBP)

0x2318c0 MOV	0x10(%RCX),%RCX

0x2318c4 MOV	%RCX,-0x60(%RBP)

0x2318c8 MOV	(%RAX),%RCX

0x2318cb MOV	%RCX,-0x58(%RBP)

0x2318cf MOV	0x10(%RAX),%RAX

0x2318d3 MOV	%RAX,-0x50(%RBP)

0x2318d7 MOV	%R14,%RAX

0x2318da SUB	%RSI,%RAX

0x2318dd INC	%RAX

0x2318e0 CMP	$0x2,%RAX

0x2318e4 JAE	2318ee

0x2318e6 MOV	%RSI,%RCX

0x2318e9 JMP	231c56

0x2318ee MOV	%RBX,-0x38(%RBP)

0x2318f2 MOV	%R12D,-0x2c(%RBP)

0x2318f6 MOV	%R14,-0xb8(%RBP)

0x2318fd MOV	%RAX,-0xb0(%RBP)

0x231904 MOV	%RAX,%R12

0x231907 AND	$-0x2,%R12

0x23190b LEA	(%RSI,%R12,1),%RCX

0x23190f MOV	%R12,-0xa8(%RBP)

0x231916 MOV	%R13,-0xc8(%RBP)

0x23191d MOV	%R11,-0xc0(%RBP)

0x231924 MOV	-0x60(%RBP),%R15

0x231928 JMP	231acb

0x23192d NOPL	(%RAX)

(150) 0x231930 CQTO

(150) 0x231932 IDIV	%R13

(150) 0x231935 ADD	%R9D,%EDI

(150) 0x231938 ADD	%R9D,%EAX

(150) 0x23193b ADD	%R10D,%R8D

(150) 0x23193e ADD	%R10D,%EDX

(150) 0x231941 MOVSXD	%R8D,%R14

(150) 0x231944 MOVSXD	%EDX,%R8

(150) 0x231947 MOVSXD	%EDI,%R13

(150) 0x23194a MOVSXD	%EAX,%RDI

(150) 0x23194d MOV	%R11,%RAX

(150) 0x231950 IMUL	%R13,%RAX

(150) 0x231954 MOV	%R11,%RDX

(150) 0x231957 MOV	-0x98(%RBP),%RBX

(150) 0x23195e MOV	%RBX,%R10

(150) 0x231961 IMUL	%R13,%R10

(150) 0x231965 IMUL	%RDI,%RBX

(150) 0x231969 ADD	%R14,%R10

(150) 0x23196c ADD	%R8,%RBX

(150) 0x23196f MOV	-0x90(%RBP),%R9

(150) 0x231976 MOVSD	(%R9,%R10,8),%XMM0

(150) 0x23197c MOVHPD	(%R9,%RBX,8),%XMM0

(150) 0x231982 IMUL	%RDI,%RDX

(150) 0x231986 MOV	-0x88(%RBP),%RBX

(150) 0x23198d MOV	%RBX,%R10

(150) 0x231990 IMUL	%R13,%R10

(150) 0x231994 IMUL	%RDI,%RBX

(150) 0x231998 LEA	(%R10,%R14,1),%R11

(150) 0x23199c MOV	-0x80(%RBP),%R9

(150) 0x2319a0 MOVSD	(%R9,%R11,8),%XMM1

(150) 0x2319a6 LEA	(%RBX,%R8,1),%R11

(150) 0x2319aa MOVHPD	(%R9,%R11,8),%XMM1

(150) 0x2319b0 LEA	0x1(%R10,%R14,1),%R10

(150) 0x2319b5 LEA	0x1(%RBX,%R8,1),%R11

(150) 0x2319ba MOVSD	(%R9,%R10,8),%XMM2

(150) 0x2319c0 MOVHPD	(%R9,%R11,8),%XMM2

(150) 0x2319c6 MOV	-0x68(%RBP),%R9

(150) 0x2319ca MOV	%R9,%R11

(150) 0x2319cd IMUL	%R13,%R11

(150) 0x2319d1 IMUL	%RDI,%R9

(150) 0x2319d5 LEA	(%R11,%R14,1),%R10

(150) 0x2319d9 MOVSD	(%R15,%R10,8),%XMM3

(150) 0x2319df LEA	(%R9,%R8,1),%R10

(150) 0x2319e3 MOVHPD	(%R15,%R10,8),%XMM3

(150) 0x2319e9 MOV	-0x78(%RBP),%RBX

(150) 0x2319ed MOV	%RBX,%R10

(150) 0x2319f0 IMUL	%R13,%R10

(150) 0x2319f4 ADD	%R14,%R11

(150) 0x2319f7 INC	%R11

(150) 0x2319fa MOVSD	(%R15,%R11,8),%XMM4

(150) 0x231a00 ADD	%R8,%R9

(150) 0x231a03 INC	%R9

(150) 0x231a06 MOVHPD	(%R15,%R9,8),%XMM4

(150) 0x231a0c IMUL	%RDI,%RBX

(150) 0x231a10 MOV	-0x58(%RBP),%R9

(150) 0x231a14 IMUL	%R9,%R13

(150) 0x231a18 IMUL	%R9,%RDI

(150) 0x231a1c LEA	(%R14,%R13,1),%R9

(150) 0x231a20 MOV	-0x50(%RBP),%R11

(150) 0x231a24 MOVSD	(%R11,%R9,8),%XMM5

(150) 0x231a2a LEA	(%RDI,%R8,1),%R9

(150) 0x231a2e MOVHPD	(%R11,%R9,8),%XMM5

(150) 0x231a34 ADD	%R14,%RAX

(150) 0x231a37 ADD	%R14,%R10

(150) 0x231a3a LEA	(%R14,%R13,1),%R9

(150) 0x231a3e INC	%R9

(150) 0x231a41 MOVSD	(%R11,%R9,8),%XMM6

(150) 0x231a47 ADD	%R8,%RDI

(150) 0x231a4a INC	%RDI

(150) 0x231a4d MOVHPD	(%R11,%RDI,8),%XMM6

(150) 0x231a53 ADD	%R8,%RDX

(150) 0x231a56 MOV	-0xc0(%RBP),%R11

(150) 0x231a5d MOVSD	(%R11,%RAX,8),%XMM7

(150) 0x231a63 MOVHPD	(%R11,%RDX,8),%XMM7

(150) 0x231a69 ADD	%R8,%RBX

(150) 0x231a6c MULPD	%XMM0,%XMM7

(150) 0x231a70 ADDPD	%XMM7,%XMM1

(150) 0x231a74 SUBPD	%XMM2,%XMM1

(150) 0x231a78 MOV	-0x70(%RBP),%RDI

(150) 0x231a7c MOVSD	(%RDI,%R10,8),%XMM2

(150) 0x231a82 MOVHPD	(%RDI,%RBX,8),%XMM2

(150) 0x231a87 MULPD	%XMM7,%XMM2

(150) 0x231a8b ADDPD	%XMM3,%XMM2

(150) 0x231a8f SUBPD	%XMM4,%XMM2

(150) 0x231a93 DIVPD	%XMM1,%XMM2

(150) 0x231a97 ADDPD	%XMM0,%XMM5

(150) 0x231a9b SUBPD	%XMM6,%XMM5

(150) 0x231a9f DIVPD	%XMM5,%XMM1

(150) 0x231aa3 MOVLPD	%XMM1,(%R11,%RAX,8)

(150) 0x231aa9 MOVHPD	%XMM1,(%R11,%RDX,8)

(150) 0x231aaf MOVLPD	%XMM2,(%RDI,%R10,8)

(150) 0x231ab5 MOVHPD	%XMM2,(%RDI,%RBX,8)

(150) 0x231aba ADD	$0x2,%RSI

(150) 0x231abe ADD	$-0x2,%R12

(150) 0x231ac2 MOV	-0xc8(%RBP),%R13

(150) 0x231ac9 JE	231b23

(150) 0x231acb MOV	%RSI,%RAX

(150) 0x231ace SHR	$0x20,%RAX

(150) 0x231ad2 JE	231af0

(150) 0x231ad4 MOV	%RSI,%RAX

(150) 0x231ad7 CQTO

(150) 0x231ad9 IDIV	%R13

(150) 0x231adc MOV	%RDX,%R8

(150) 0x231adf MOV	%RAX,%RDI

(150) 0x231ae2 JMP	231afc

0x231ae4 NOPW	%CS:(%RAX,%RAX,1)

(150) 0x231af0 MOV	%ESI,%EAX

(150) 0x231af2 XOR	%EDX,%EDX

(150) 0x231af4 DIV	%R13D

(150) 0x231af7 MOV	%EDX,%R8D

(150) 0x231afa MOV	%EAX,%EDI

(150) 0x231afc MOV	-0x30(%RBP),%R9D

(150) 0x231b00 MOV	-0x2c(%RBP),%R10D

(150) 0x231b04 MOV	-0x38(%RBP),%R11

(150) 0x231b08 LEA	0x1(%RSI),%RAX

(150) 0x231b0c MOV	%RAX,%RDX

(150) 0x231b0f SHR	$0x20,%RDX

(150) 0x231b13 JNE	231930

(150) 0x231b19 XOR	%EDX,%EDX

(150) 0x231b1b DIV	%R13D

(150) 0x231b1e JMP	231935

0x231b23 MOV	-0xa8(%RBP),%RAX

0x231b2a CMP	%RAX,-0xb0(%RBP)

0x231b31 MOV	-0xb8(%RBP),%R14

0x231b38 MOV	-0x2c(%RBP),%R12D

0x231b3c MOV	-0x38(%RBP),%RBX

0x231b40 JNE	231c56

0x231b46 LEA	0x2c51b(%RIP),%RDI

0x231b4d MOV	-0x44(%RBP),%ESI

0x231b50 CALL	25cd00 <@plt_start@+0x540>

0x231b55 ADD	$0xa8,%RSP

0x231b5c POP	%RBX

0x231b5d POP	%R12

0x231b5f POP	%R13

0x231b61 POP	%R14

0x231b63 POP	%R15

0x231b65 POP	%RBP

0x231b66 RET

0x231b67 NOPW	(%RAX,%RAX,1)

(149) 0x231b70 MOV	%RCX,%RAX

(149) 0x231b73 CQTO

(149) 0x231b75 IDIV	%R13

(149) 0x231b78 MOV	%RBX,%RDI

(149) 0x231b7b ADD	-0x30(%RBP),%EAX

(149) 0x231b7e ADD	%R12D,%EDX

(149) 0x231b81 MOVSXD	%EDX,%RDX

(149) 0x231b84 MOVSXD	%EAX,%RSI

(149) 0x231b87 MOV	%RBX,%RAX

(149) 0x231b8a IMUL	%RSI,%RAX

(149) 0x231b8e ADD	%RDX,%RAX

(149) 0x231b91 MOV	-0x98(%RBP),%RDI

(149) 0x231b98 IMUL	%RSI,%RDI

(149) 0x231b9c ADD	%RDX,%RDI

(149) 0x231b9f MOV	-0x90(%RBP),%R8

(149) 0x231ba6 MOVSD	(%R8,%RDI,8),%XMM1

(149) 0x231bac MOVSD	(%R11,%RAX,8),%XMM0

(149) 0x231bb2 MULSD	%XMM1,%XMM0

(149) 0x231bb6 MOV	-0x88(%RBP),%RDI

(149) 0x231bbd IMUL	%RSI,%RDI

(149) 0x231bc1 LEA	(%RDI,%RDX,1),%R8

(149) 0x231bc5 MOV	-0x80(%RBP),%R9

(149) 0x231bc9 MOVSD	(%R9,%R8,8),%XMM2

(149) 0x231bcf ADDSD	%XMM0,%XMM2

(149) 0x231bd3 ADD	%RDX,%RDI

(149) 0x231bd6 INC	%RDI

(149) 0x231bd9 SUBSD	(%R9,%RDI,8),%XMM2

(149) 0x231bdf MOV	-0x78(%RBP),%RDI

(149) 0x231be3 IMUL	%RSI,%RDI

(149) 0x231be7 ADD	%RDX,%RDI

(149) 0x231bea MOV	-0x68(%RBP),%R8

(149) 0x231bee IMUL	%RSI,%R8

(149) 0x231bf2 LEA	(%R8,%RDX,1),%R9

(149) 0x231bf6 MOV	-0x70(%RBP),%R10

(149) 0x231bfa MULSD	(%R10,%RDI,8),%XMM0

(149) 0x231c00 MOV	-0x60(%RBP),%R15

(149) 0x231c04 ADDSD	(%R15,%R9,8),%XMM0

(149) 0x231c0a ADD	%RDX,%R8

(149) 0x231c0d INC	%R8

(149) 0x231c10 SUBSD	(%R15,%R8,8),%XMM0

(149) 0x231c16 IMUL	-0x58(%RBP),%RSI

(149) 0x231c1b LEA	(%RSI,%RDX,1),%R8

(149) 0x231c1f MOV	-0x50(%RBP),%R9

(149) 0x231c23 ADDSD	(%R9,%R8,8),%XMM1

(149) 0x231c29 ADD	%RSI,%RDX

(149) 0x231c2c INC	%RDX

(149) 0x231c2f SUBSD	(%R9,%RDX,8),%XMM1

(149) 0x231c35 DIVSD	%XMM2,%XMM0

(149) 0x231c39 DIVSD	%XMM1,%XMM2

(149) 0x231c3d MOVSD	%XMM2,(%R11,%RAX,8)

(149) 0x231c43 MOVSD	%XMM0,(%R10,%RDI,8)

(149) 0x231c49 CMP	%R14,%RCX

(149) 0x231c4c LEA	0x1(%RCX),%RCX

(149) 0x231c50 JGE	231b46

(149) 0x231c56 MOV	%RCX,%RAX

(149) 0x231c59 SHR	$0x20,%RAX

(149) 0x231c5d JNE	231b70

(149) 0x231c63 MOV	%ECX,%EAX

(149) 0x231c65 XOR	%EDX,%EDX

(149) 0x231c67 DIV	%R13D

(149) 0x231c6a JMP	231b78

0x231c6f NOP

Coverage (%)	Name	Source Location	Module

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run orig_0

Source file and lines	advec_cell.cpp:117-125
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_cell.cpp:117-125
/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:69

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is not vectorized. Only 10% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 14.50 to 1.28 cycles (11.32x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Performance is limited by:

reading data from caches/RAM (load units are a bottleneck)
writing data to caches/RAM (the store unit is a bottleneck)

By removing all these bottlenecks, you can lower the cost of an iteration from 14.50 to 6.67 cycles (2.17x speedup).

Workaround

Read less array elements
Write less array elements

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

unknown: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_cell.cpp:117
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_cell.cpp:117

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVL: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_cell.cpp:118

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 228 bytes. The binary function is storing 176 bytes.

General properties

nb instructions	117
nb uops	116
loop length	490
used x86 registers	15
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	29

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	14.50 cycles
front end	14.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	6.67	6.67	6.67	6.67	6.67	6.67	14.50	14.50	14.50	14.50	0.00	0.00	0.00	0.00	0.00	0.00
cycles	6.67	6.67	6.67	6.67	6.67	6.67	14.50	14.50	14.50	14.50	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	14.50
Dispatch	14.50
Overall L1	14.50

Vectorization ratios

all	0%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	10%
load	10%
store	10%
mul	12%
add-sub	7%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	11%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 14.50 cycles. At this rate:

6% of peak load performance is reached (15.72 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
9% of peak store performance is reached (12.14 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 14.50 to 6.67 cycles (2.17x speedup).

ASM code

In the binary file, the address of the function is: 2317a0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0xa8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV (%RDX),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RCX),%R14D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
INC %EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
ADD $0x2,%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
MOV %EAX,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
SUB %EAX,%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JLE 231b55 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.omp_outlined.6+0x3b5>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R8),%R12D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%R9),%R13D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
INC %R12D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
ADD $0x2,%R13D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
CMP %R12D,%R13D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JLE 231b55 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.omp_outlined.6+0x3b5>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
SUB %R12D,%R13D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
IMUL %R13,%R14	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	scal (12.5%)
DEC %R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOVQ $0,-0xa0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV %R14,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOVQ $0x1,-0xd0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOVL $0,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA -0xd0(%RBP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA 0x2c830(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x48(%RBP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0xa0(%RBP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x40(%RBP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %ESI,-0x44(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 25ccf0 <@plt_start@+0x530>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV -0x40(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP %R14,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
CMOVL %RAX,%R14	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	1	0.33	scal (12.5%)
MOV %R14,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV -0xa0(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP %R14,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JG 231b46 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.omp_outlined.6+0x3a6>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV 0x38(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x30(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x28(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x20(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x18(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x10(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%R9),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV 0x10(%R9),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV (%R8),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %R9,-0x98(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%R8),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %R8,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%RDI),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %R8,-0x88(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RDI),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RDI,-0x80(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%RDX),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RDI,-0x78(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RDX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RDX,-0x70(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%RCX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RDX,-0x68(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RCX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%RAX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0x58(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,-0x50(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R14,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %RSI,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP $0x2,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JAE 2318ee <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.omp_outlined.6+0x14e>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV %RSI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 231c56 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.omp_outlined.6+0x4b6>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
MOV %RBX,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R12D,-0x2c(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV %R14,-0xb8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RAX,-0xb0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x2,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA (%RSI,%R12,1),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %R12,-0xa8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R13,-0xc8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R11,-0xc0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV -0x60(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
JMP 231acb <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.omp_outlined.6+0x32b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV -0xa8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP %RAX,-0xb0(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
MOV -0xb8(%RBP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV -0x2c(%RBP),%R12D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV -0x38(%RBP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
JNE 231c56 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.omp_outlined.6+0x4b6>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
LEA 0x2c51b(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV -0x44(%RBP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CALL 25cd00 <@plt_start@+0x540>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
ADD $0xa8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run orig_0

Source file and lines	advec_cell.cpp:117-125
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_cell.cpp:117-125
/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:69

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Performance is limited by:

reading data from caches/RAM (load units are a bottleneck)
writing data to caches/RAM (the store unit is a bottleneck)

By removing all these bottlenecks, you can lower the cost of an iteration from 14.50 to 6.67 cycles (2.17x speedup).

Workaround

Read less array elements
Write less array elements

No data for this section

CALL instructions

Detected function call instructions.

Details

unknown: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_cell.cpp:117
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_cell.cpp:117

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVL: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_cell.cpp:118

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 228 bytes. The binary function is storing 176 bytes.

General properties

nb instructions	117
nb uops	116
loop length	490
used x86 registers	15
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	29

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	14.50 cycles
front end	14.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	6.67	6.67	6.67	6.67	6.67	6.67	14.50	14.50	14.50	14.50	0.00	0.00	0.00	0.00	0.00	0.00
cycles	6.67	6.67	6.67	6.67	6.67	6.67	14.50	14.50	14.50	14.50	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	14.50
Dispatch	14.50
Overall L1	14.50

Vectorization ratios

all	0%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	10%
load	10%
store	10%
mul	12%
add-sub	7%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	11%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 14.50 cycles. At this rate:

6% of peak load performance is reached (15.72 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
9% of peak store performance is reached (12.14 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 2317a0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0xa8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV (%RDX),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RCX),%R14D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
INC %EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
ADD $0x2,%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
MOV %EAX,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
SUB %EAX,%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JLE 231b55 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.omp_outlined.6+0x3b5>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R8),%R12D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%R9),%R13D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
INC %R12D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
ADD $0x2,%R13D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
CMP %R12D,%R13D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JLE 231b55 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.omp_outlined.6+0x3b5>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
SUB %R12D,%R13D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
IMUL %R13,%R14	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	scal (12.5%)
DEC %R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOVQ $0,-0xa0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV %R14,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOVQ $0x1,-0xd0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOVL $0,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA -0xd0(%RBP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA 0x2c830(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x48(%RBP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0xa0(%RBP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x40(%RBP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %ESI,-0x44(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 25ccf0 <@plt_start@+0x530>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV -0x40(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP %R14,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
CMOVL %RAX,%R14	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	1	0.33	scal (12.5%)
MOV %R14,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV -0xa0(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP %R14,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JG 231b46 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.omp_outlined.6+0x3a6>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV 0x38(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x30(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x28(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x20(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x18(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x10(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%R9),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV 0x10(%R9),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV (%R8),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %R9,-0x98(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%R8),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %R8,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%RDI),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %R8,-0x88(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RDI),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RDI,-0x80(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%RDX),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RDI,-0x78(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RDX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RDX,-0x70(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%RCX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RDX,-0x68(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RCX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%RAX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0x58(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,-0x50(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R14,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %RSI,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP $0x2,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JAE 2318ee <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.omp_outlined.6+0x14e>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV %RSI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 231c56 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.omp_outlined.6+0x4b6>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
MOV %RBX,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R12D,-0x2c(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV %R14,-0xb8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RAX,-0xb0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RAX,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x2,%R12	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA (%RSI,%R12,1),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %R12,-0xa8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R13,-0xc8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R11,-0xc0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV -0x60(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
JMP 231acb <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.omp_outlined.6+0x32b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV -0xa8(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP %RAX,-0xb0(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
MOV -0xb8(%RBP),%R14	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV -0x2c(%RBP),%R12D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV -0x38(%RBP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
JNE 231c56 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.omp_outlined.6+0x4b6>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
LEA 0x2c51b(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV -0x44(%RBP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CALL 25cd00 <@plt_start@+0x540>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
ADD $0xa8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOP	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼advec_cell_kernel(int, int, int, int, int, int, clover::Buffer1D&, clover::Buffer1D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D–	3.34	1.30
○Loop 150 - advec_cell.cpp:118-125 - exec	3.34	1.30
○Loop 149 - advec_cell.cpp:118-125 - exec	0.00	0.00

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