OV - exec - Function advec_cell_kernel(int, int, int, int, int, int, clover::Buffer1D<double>&, clover::Buffer1D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&) [clone .omp

	Function: advec_cell_kernel(int, int, int, int, int, int, clover::Buffer1D<double>&, clover::Buffer1 ...	Module: exec	Source: advec_cell.cpp:54-58 [...]	Coverage (incl. loops): 1.25% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_cell.cpp: 54 - 58

--------------------------------------------------------------------------------

54: #pragma omp parallel for simd collapse(2)

55:       for (int j = (y_min - 2 + 1); j < (y_max + 2 + 2); j++) {

56:         for (int i = (x_min - 2 + 1); i < (x_max + 2 + 2); i++) {

57:           pre_vol(i, j) = volume(i, j) + vol_flux_x(i + 1, j + 0) - vol_flux_x(i, j);

58:           post_vol(i, j) = volume(i, j);

/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h: 69 - 69

--------------------------------------------------------------------------------

69:   T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; }

0x2302e0 PUSH	%RBP

0x2302e1 MOV	%RSP,%RBP

0x2302e4 PUSH	%R15

0x2302e6 PUSH	%R14

0x2302e8 PUSH	%R13

0x2302ea PUSH	%R12

0x2302ec PUSH	%RBX

0x2302ed SUB	$0x98,%RSP

0x2302f4 MOV	(%RDX),%R14D

0x2302f7 MOV	(%RCX),%R10D

0x2302fa ADD	$0x4,%R10D

0x2302fe CMP	%R14D,%R10D

0x230301 JL	2305d9

0x230307 MOV	(%R8),%R15D

0x23030a MOV	(%R9),%R13D

0x23030d ADD	$0x4,%R13D

0x230311 CMP	%R15D,%R13D

0x230314 JL	2305d9

0x23031a DEC	%R14D

0x23031d LEA	-0x1(%R15),%R12D

0x230321 SUB	%R12D,%R13D

0x230324 SUB	%R14D,%R10D

0x230327 IMUL	%R13,%R10

0x23032b DEC	%R10

0x23032e MOVQ	$0,-0x88(%RBP)

0x230339 MOV	%R10,-0x40(%RBP)

0x23033d MOVQ	$0x1,-0xb8(%RBP)

0x230348 MOVL	$0,-0x48(%RBP)

0x23034f MOV	(%RDI),%ESI

0x230351 SUB	$0x8,%RSP

0x230355 LEA	-0xb8(%RBP),%RAX

0x23035c LEA	0x2dc5d(%RIP),%RDI

0x230363 LEA	-0x48(%RBP),%RCX

0x230367 LEA	-0x88(%RBP),%R8

0x23036e LEA	-0x40(%RBP),%R9

0x230372 MOV	%ESI,-0x44(%RBP)

0x230375 MOV	$0x22,%EDX

0x23037a PUSH	$0x1

0x23037c PUSH	$0x1

0x23037e PUSH	%RAX

0x23037f MOV	%R10,%RBX

0x230382 CALL	25ccf0 <@plt_start@+0x530>

0x230387 MOV	%RBX,%R9

0x23038a ADD	$0x20,%RSP

0x23038e MOV	-0x40(%RBP),%RAX

0x230392 CMP	%RBX,%RAX

0x230395 CMOVL	%RAX,%R9

0x230399 MOV	%R9,-0x40(%RBP)

0x23039d MOV	-0x88(%RBP),%RSI

0x2303a4 CMP	%R9,%RSI

0x2303a7 JG	2305ca

0x2303ad MOV	0x28(%RBP),%RAX

0x2303b1 MOV	0x20(%RBP),%RCX

0x2303b5 MOV	0x18(%RBP),%RDX

0x2303b9 MOV	0x10(%RBP),%RDI

0x2303bd MOV	(%RDX),%R11

0x2303c0 MOV	0x10(%RDX),%R10

0x2303c4 MOV	(%RCX),%RDX

0x2303c7 MOV	%RDX,-0x80(%RBP)

0x2303cb MOV	0x10(%RCX),%RBX

0x2303cf MOV	(%RDI),%RCX

0x2303d2 MOV	%RCX,-0x78(%RBP)

0x2303d6 MOV	0x10(%RDI),%RCX

0x2303da MOV	%RCX,-0x70(%RBP)

0x2303de MOV	(%RAX),%RCX

0x2303e1 MOV	%RCX,-0x68(%RBP)

0x2303e5 MOV	0x10(%RAX),%RAX

0x2303e9 MOV	%RAX,-0x60(%RBP)

0x2303ed MOV	%R9,%RAX

0x2303f0 SUB	%RSI,%RAX

0x2303f3 INC	%RAX

0x2303f6 CMP	$0x2,%RAX

0x2303fa JAE	230404

0x2303fc MOV	%RSI,%RCX

0x2303ff JMP	23066c

0x230404 MOV	%R11,-0x50(%RBP)

0x230408 MOV	%R12,-0x38(%RBP)

0x23040c MOV	%R15,-0x58(%RBP)

0x230410 MOV	%R9,-0xa0(%RBP)

0x230417 MOV	%R14D,-0x2c(%RBP)

0x23041b MOV	%RAX,-0x98(%RBP)

0x230422 MOV	%RAX,%R11

0x230425 AND	$-0x2,%R11

0x230429 LEA	(%RSI,%R11,1),%RCX

0x23042d MOV	%R11,-0x90(%RBP)

0x230434 MOV	%R13,-0xb0(%RBP)

0x23043b MOV	%R10,-0xa8(%RBP)

0x230442 JMP	23054b

0x230447 NOPW	(%RAX,%RAX,1)

(146) 0x230450 CQTO

(146) 0x230452 IDIV	%R13

(146) 0x230455 ADD	%R9D,%R8D

(146) 0x230458 ADD	%R9D,%EAX

(146) 0x23045b LEA	(%R15,%RDI,1),%R14D

(146) 0x23045f ADD	%EDX,%R15D

(146) 0x230462 MOVSXD	%R14D,%R14

(146) 0x230465 MOVSXD	%R15D,%R15

(146) 0x230468 MOVSXD	%R8D,%R8

(146) 0x23046b CLTQ

(146) 0x23046d MOV	-0x50(%RBP),%R13

(146) 0x230471 MOV	%R13,%R12

(146) 0x230474 IMUL	%R8,%R12

(146) 0x230478 MOV	-0x58(%RBP),%R9

(146) 0x23047c ADD	%R9D,%EDI

(146) 0x23047f ADD	%R9D,%EDX

(146) 0x230482 MOVSXD	%EDI,%RDI

(146) 0x230485 MOVSXD	%EDX,%RDX

(146) 0x230488 MOV	-0x80(%RBP),%R10

(146) 0x23048c MOV	%R10,%R9

(146) 0x23048f IMUL	%R8,%R9

(146) 0x230493 ADD	%R9,%RDI

(146) 0x230496 MOVSD	(%RBX,%RDI,8),%XMM0

(146) 0x23049b MOV	%R10,%RDI

(146) 0x23049e IMUL	%RAX,%RDI

(146) 0x2304a2 ADD	%RDI,%RDX

(146) 0x2304a5 MOVHPD	(%RBX,%RDX,8),%XMM0

(146) 0x2304aa MOV	%R13,%RDX

(146) 0x2304ad IMUL	%RAX,%RDX

(146) 0x2304b1 ADD	%R14,%R12

(146) 0x2304b4 ADD	%R15,%RDX

(146) 0x2304b7 MOV	-0xa8(%RBP),%R10

(146) 0x2304be MOVSD	(%R10,%R12,8),%XMM1

(146) 0x2304c4 MOVHPD	(%R10,%RDX,8),%XMM1

(146) 0x2304ca ADD	%R14,%R9

(146) 0x2304cd MOVSD	(%RBX,%R9,8),%XMM2

(146) 0x2304d3 ADD	%R15,%RDI

(146) 0x2304d6 MOVHPD	(%RBX,%RDI,8),%XMM2

(146) 0x2304db ADDPD	%XMM1,%XMM0

(146) 0x2304df SUBPD	%XMM2,%XMM0

(146) 0x2304e3 MOV	-0x78(%RBP),%R9

(146) 0x2304e7 MOV	%R9,%RDI

(146) 0x2304ea IMUL	%R8,%RDI

(146) 0x2304ee ADD	%R14,%RDI

(146) 0x2304f1 MOV	-0x70(%RBP),%R13

(146) 0x2304f5 MOVLPD	%XMM0,(%R13,%RDI,8)

(146) 0x2304fc MOV	%R9,%RDI

(146) 0x2304ff IMUL	%RAX,%RDI

(146) 0x230503 ADD	%R15,%RDI

(146) 0x230506 MOVHPD	%XMM0,(%R13,%RDI,8)

(146) 0x23050d MOVSD	(%R10,%R12,8),%XMM0

(146) 0x230513 MOVSD	(%R10,%RDX,8),%XMM1

(146) 0x230519 MOV	-0x68(%RBP),%RDX

(146) 0x23051d IMUL	%RDX,%R8

(146) 0x230521 ADD	%R14,%R8

(146) 0x230524 IMUL	%RDX,%RAX

(146) 0x230528 ADD	%R15,%RAX

(146) 0x23052b MOV	-0x60(%RBP),%RDX

(146) 0x23052f MOVSD	%XMM0,(%RDX,%R8,8)

(146) 0x230535 MOVSD	%XMM1,(%RDX,%RAX,8)

(146) 0x23053a ADD	$0x2,%RSI

(146) 0x23053e ADD	$-0x2,%R11

(146) 0x230542 MOV	-0xb0(%RBP),%R13

(146) 0x230549 JE	23059f

(146) 0x23054b MOV	%RSI,%RAX

(146) 0x23054e SHR	$0x20,%RAX

(146) 0x230552 JE	230570

(146) 0x230554 MOV	%RSI,%RAX

(146) 0x230557 CQTO

(146) 0x230559 IDIV	%R13

(146) 0x23055c MOV	%RDX,%RDI

(146) 0x23055f MOV	%RAX,%R8

(146) 0x230562 JMP	23057c

0x230564 NOPW	%CS:(%RAX,%RAX,1)

(146) 0x230570 MOV	%ESI,%EAX

(146) 0x230572 XOR	%EDX,%EDX

(146) 0x230574 DIV	%R13D

(146) 0x230577 MOV	%EDX,%EDI

(146) 0x230579 MOV	%EAX,%R8D

(146) 0x23057c MOV	-0x2c(%RBP),%R9D

(146) 0x230580 MOV	-0x38(%RBP),%R15

(146) 0x230584 LEA	0x1(%RSI),%RAX

(146) 0x230588 MOV	%RAX,%RDX

(146) 0x23058b SHR	$0x20,%RDX

(146) 0x23058f JNE	230450

(146) 0x230595 XOR	%EDX,%EDX

(146) 0x230597 DIV	%R13D

(146) 0x23059a JMP	230455

0x23059f MOV	-0x90(%RBP),%RAX

0x2305a6 CMP	%RAX,-0x98(%RBP)

0x2305ad MOV	-0x2c(%RBP),%R14D

0x2305b1 MOV	-0xa0(%RBP),%R9

0x2305b8 MOV	-0x58(%RBP),%R15

0x2305bc MOV	-0x38(%RBP),%R12

0x2305c0 MOV	-0x50(%RBP),%R11

0x2305c4 JNE	23066c

0x2305ca LEA	0x2da07(%RIP),%RDI

0x2305d1 MOV	-0x44(%RBP),%ESI

0x2305d4 CALL	25cd00 <@plt_start@+0x540>

0x2305d9 ADD	$0x98,%RSP

0x2305e0 POP	%RBX

0x2305e1 POP	%R12

0x2305e3 POP	%R13

0x2305e5 POP	%R14

0x2305e7 POP	%R15

0x2305e9 POP	%RBP

0x2305ea RET

0x2305eb NOPL	(%RAX,%RAX,1)

(145) 0x2305f0 MOV	%RCX,%RAX

(145) 0x2305f3 CQTO

(145) 0x2305f5 IDIV	%R13

(145) 0x2305f8 ADD	%R14D,%EAX

(145) 0x2305fb LEA	(%R12,%RDX,1),%ESI

(145) 0x2305ff MOVSXD	%ESI,%RSI

(145) 0x230602 CLTQ

(145) 0x230604 MOV	%R11,%RDI

(145) 0x230607 IMUL	%RAX,%RDI

(145) 0x23060b ADD	%RSI,%RDI

(145) 0x23060e MOVSD	(%R10,%RDI,8),%XMM0

(145) 0x230614 ADD	%R15D,%EDX

(145) 0x230617 MOVSXD	%EDX,%RDX

(145) 0x23061a MOV	-0x80(%RBP),%R8

(145) 0x23061e IMUL	%RAX,%R8

(145) 0x230622 ADD	%R8,%RDX

(145) 0x230625 ADDSD	(%RBX,%RDX,8),%XMM0

(145) 0x23062a ADD	%RSI,%R8

(145) 0x23062d SUBSD	(%RBX,%R8,8),%XMM0

(145) 0x230633 MOV	-0x78(%RBP),%RDX

(145) 0x230637 IMUL	%RAX,%RDX

(145) 0x23063b ADD	%RSI,%RDX

(145) 0x23063e MOV	-0x70(%RBP),%R8

(145) 0x230642 MOVSD	%XMM0,(%R8,%RDX,8)

(145) 0x230648 MOVSD	(%R10,%RDI,8),%XMM0

(145) 0x23064e IMUL	-0x68(%RBP),%RAX

(145) 0x230653 ADD	%RSI,%RAX

(145) 0x230656 MOV	-0x60(%RBP),%RDX

(145) 0x23065a MOVSD	%XMM0,(%RDX,%RAX,8)

(145) 0x23065f CMP	%R9,%RCX

(145) 0x230662 LEA	0x1(%RCX),%RCX

(145) 0x230666 JGE	2305ca

(145) 0x23066c MOV	%RCX,%RAX

(145) 0x23066f SHR	$0x20,%RAX

(145) 0x230673 JNE	2305f0

(145) 0x230679 MOV	%ECX,%EAX

(145) 0x23067b XOR	%EDX,%EDX

(145) 0x23067d DIV	%R13D

(145) 0x230680 JMP	2305f8

0x230685 NOPW	%CS:(%RAX,%RAX,1)

Coverage (%)	Name	Source Location	Module

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run orig_0

Source file and lines	advec_cell.cpp:54-58
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_cell.cpp:54-58
/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:69

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is not vectorized. Only 10% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 13.75 to 1.06 cycles (12.94x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

unknown: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_cell.cpp:54
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_cell.cpp:54

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVL: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_cell.cpp:55

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 188 bytes. The binary function is storing 148 bytes.

General properties

nb instructions	111
nb uops	110
loop length	472
used x86 registers	16
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	23

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	13.75 cycles
front end	13.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	6.83	6.83	6.83	6.83	6.83	6.83	12.25	12.25	12.25	12.25	0.00	0.00	0.00	0.00	0.00	0.00
cycles	6.83	6.83	6.83	6.83	6.83	6.83	12.25	12.25	12.25	12.25	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	13.75
Dispatch	12.25
Overall L1	13.75

Vectorization ratios

all	0%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	10%
load	9%
store	10%
mul	12%
add-sub	7%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	10%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 13.75 cycles. At this rate:

5% of peak load performance is reached (13.67 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
8% of peak store performance is reached (10.76 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 13.75 to 12.25 cycles (1.12x speedup).

ASM code

In the binary file, the address of the function is: 2302e0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x98,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV (%RDX),%R14D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
MOV (%RCX),%R10D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
ADD $0x4,%R10D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
CMP %R14D,%R10D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JL 2305d9 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.omp_outlined.2+0x2f9>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R8),%R15D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%R9),%R13D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
ADD $0x4,%R13D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
CMP %R15D,%R13D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JL 2305d9 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.omp_outlined.2+0x2f9>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
DEC %R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
LEA -0x1(%R15),%R12D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
SUB %R12D,%R13D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
SUB %R14D,%R10D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
IMUL %R13,%R10	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	scal (12.5%)
DEC %R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOVQ $0,-0x88(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV %R10,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOVQ $0x1,-0xb8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOVL $0,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA -0xb8(%RBP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA 0x2dc5d(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x48(%RBP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x88(%RBP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x40(%RBP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %ESI,-0x44(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %R10,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CALL 25ccf0 <@plt_start@+0x530>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
MOV %RBX,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV -0x40(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP %RBX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
CMOVL %RAX,%R9	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	1	0.33	N/A
MOV %R9,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV -0x88(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP %R9,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JG 2305ca <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.omp_outlined.2+0x2ea>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV 0x28(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x20(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x18(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x10(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RDX),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x10(%RDX),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV (%RCX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RDX,-0x80(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RCX),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV (%RDI),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0x78(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RDI),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0x70(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%RAX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0x68(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R9,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %RSI,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP $0x2,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JAE 230404 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.omp_outlined.2+0x124>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV %RSI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 23066c <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.omp_outlined.2+0x38c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
MOV %R11,-0x50(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R12,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R15,-0x58(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R9,-0xa0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R14D,-0x2c(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV %RAX,-0x98(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RAX,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x2,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA (%RSI,%R11,1),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %R11,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R13,-0xb0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R10,-0xa8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
JMP 23054b <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.omp_outlined.2+0x26b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV -0x90(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP %RAX,-0x98(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
MOV -0x2c(%RBP),%R14D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
MOV -0xa0(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV -0x58(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV -0x38(%RBP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV -0x50(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
JNE 23066c <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.omp_outlined.2+0x38c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
LEA 0x2da07(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV -0x44(%RBP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CALL 25cd00 <@plt_start@+0x540>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
ADD $0x98,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run orig_0

Source file and lines	advec_cell.cpp:54-58
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_cell.cpp:54-58
/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:69

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

unknown: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_cell.cpp:54
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_cell.cpp:54

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVL: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_cell.cpp:55

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 188 bytes. The binary function is storing 148 bytes.

General properties

nb instructions	111
nb uops	110
loop length	472
used x86 registers	16
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	23

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	13.75 cycles
front end	13.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	6.83	6.83	6.83	6.83	6.83	6.83	12.25	12.25	12.25	12.25	0.00	0.00	0.00	0.00	0.00	0.00
cycles	6.83	6.83	6.83	6.83	6.83	6.83	12.25	12.25	12.25	12.25	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	13.75
Dispatch	12.25
Overall L1	13.75

Vectorization ratios

all	0%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	10%
load	9%
store	10%
mul	12%
add-sub	7%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	10%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 13.75 cycles. At this rate:

5% of peak load performance is reached (13.67 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
8% of peak store performance is reached (10.76 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 2302e0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x98,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV (%RDX),%R14D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
MOV (%RCX),%R10D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
ADD $0x4,%R10D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
CMP %R14D,%R10D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JL 2305d9 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.omp_outlined.2+0x2f9>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R8),%R15D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%R9),%R13D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
ADD $0x4,%R13D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
CMP %R15D,%R13D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JL 2305d9 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.omp_outlined.2+0x2f9>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
DEC %R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
LEA -0x1(%R15),%R12D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
SUB %R12D,%R13D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
SUB %R14D,%R10D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
IMUL %R13,%R10	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	scal (12.5%)
DEC %R10	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOVQ $0,-0x88(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV %R10,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOVQ $0x1,-0xb8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOVL $0,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA -0xb8(%RBP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA 0x2dc5d(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x48(%RBP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x88(%RBP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x40(%RBP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %ESI,-0x44(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %R10,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (12.5%)
CALL 25ccf0 <@plt_start@+0x530>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
MOV %RBX,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV -0x40(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP %RBX,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
CMOVL %RAX,%R9	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	1	0.33	N/A
MOV %R9,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV -0x88(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP %R9,%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JG 2305ca <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.omp_outlined.2+0x2ea>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV 0x28(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x20(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x18(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x10(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RDX),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x10(%RDX),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV (%RCX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RDX,-0x80(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RCX),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV (%RDI),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0x78(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RDI),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0x70(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%RAX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0x68(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R9,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %RSI,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP $0x2,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JAE 230404 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.omp_outlined.2+0x124>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV %RSI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 23066c <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.omp_outlined.2+0x38c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
MOV %R11,-0x50(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R12,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R15,-0x58(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R9,-0xa0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R14D,-0x2c(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV %RAX,-0x98(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RAX,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x2,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA (%RSI,%R11,1),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %R11,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R13,-0xb0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R10,-0xa8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
JMP 23054b <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.omp_outlined.2+0x26b>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV -0x90(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP %RAX,-0x98(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
MOV -0x2c(%RBP),%R14D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
MOV -0xa0(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV -0x58(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV -0x38(%RBP),%R12	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV -0x50(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
JNE 23066c <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.omp_outlined.2+0x38c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
LEA 0x2da07(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV -0x44(%RBP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CALL 25cd00 <@plt_start@+0x540>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
ADD $0x98,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50	N/A
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼advec_cell_kernel(int, int, int, int, int, int, clover::Buffer1D&, clover::Buffer1D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D–	1.25	0.49
○Loop 146 - advec_cell.cpp:55-58 - exec	1.25	0.49
○Loop 145 - advec_cell.cpp:55-58 - exec	0.00	0.00

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Matching between your function (in the source code) and the binary function

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