OV - exec - Function accelerate_kernel(int, int, int, int, double, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&) [clone .omp

	Function: accelerate_kernel(int, int, int, int, double, clover::Buffer2D<double>&, clover::Buffer2D< ...	Module: exec	Source: accelerate.cpp:40-53 [...]	Coverage (incl. loops): 5.04% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/accelerate.cpp: 40 - 53

--------------------------------------------------------------------------------

40: #pragma omp parallel for simd collapse(2)

41:   for (int j = (y_min + 1); j < (y_max + 1 + 2); j++) {

42:     for (int i = (x_min + 1); i < (x_max + 1 + 2); i++) {

43:       double stepbymass_s = halfdt / ((density0(i - 1, j - 1) * volume(i - 1, j - 1) + density0(i - 1, j + 0) * volume(i - 1, j + 0) +

44:                                        density0(i, j) * volume(i, j) + density0(i + 0, j - 1) * volume(i + 0, j - 1)) *

45:                                       0.25);

46:       xvel1(i, j) = xvel0(i, j) - stepbymass_s * (xarea(i, j) * (pressure(i, j) - pressure(i - 1, j + 0)) +

47:                                                   xarea(i + 0, j - 1) * (pressure(i + 0, j - 1) - pressure(i - 1, j - 1)));

48:       yvel1(i, j) = yvel0(i, j) - stepbymass_s * (yarea(i, j) * (pressure(i, j) - pressure(i + 0, j - 1)) +

49:                                                   yarea(i - 1, j + 0) * (pressure(i - 1, j + 0) - pressure(i - 1, j - 1)));

50:       xvel1(i, j) = xvel1(i, j) - stepbymass_s * (xarea(i, j) * (viscosity(i, j) - viscosity(i - 1, j + 0)) +

51:                                                   xarea(i + 0, j - 1) * (viscosity(i + 0, j - 1) - viscosity(i - 1, j - 1)));

52:       yvel1(i, j) = yvel1(i, j) - stepbymass_s * (yarea(i, j) * (viscosity(i, j) - viscosity(i + 0, j - 1)) +

53:                                                   yarea(i - 1, j + 0) * (viscosity(i - 1, j + 0) - viscosity(i - 1, j - 1)));

/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h: 69 - 69

--------------------------------------------------------------------------------

69:   T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; }

0x22ee90 PUSH	%RBP

0x22ee91 MOV	%RSP,%RBP

0x22ee94 PUSH	%R15

0x22ee96 PUSH	%R14

0x22ee98 PUSH	%R13

0x22ee9a PUSH	%R12

0x22ee9c PUSH	%RBX

0x22ee9d SUB	$0x188,%RSP

0x22eea4 MOV	(%RDX),%EAX

0x22eea6 MOV	(%RCX),%R14D

0x22eea9 MOV	%RAX,-0x90(%RBP)

0x22eeb0 INC	%EAX

0x22eeb2 ADD	$0x3,%R14D

0x22eeb6 MOV	%RAX,-0x158(%RBP)

0x22eebd SUB	%EAX,%R14D

0x22eec0 JLE	22f71e

0x22eec6 MOV	(%R8),%EAX

0x22eec9 MOV	(%R9),%EBX

0x22eecc MOV	%RAX,-0x150(%RBP)

0x22eed3 INC	%EAX

0x22eed5 ADD	$0x3,%EBX

0x22eed8 CMP	%EAX,%EBX

0x22eeda JLE	22f71e

0x22eee0 MOV	%RAX,-0x30(%RBP)

0x22eee4 SUB	%EAX,%EBX

0x22eee6 IMUL	%RBX,%R14

0x22eeea DEC	%R14

0x22eeed MOVQ	$0,-0x170(%RBP)

0x22eef8 MOV	%R14,-0xb0(%RBP)

0x22eeff MOVQ	$0x1,-0x1b0(%RBP)

0x22ef0a MOVL	$0,-0xb8(%RBP)

0x22ef14 MOV	(%RDI),%ESI

0x22ef16 SUB	$0x8,%RSP

0x22ef1a LEA	-0x1b0(%RBP),%RAX

0x22ef21 LEA	0x2f008(%RIP),%RDI

0x22ef28 LEA	-0xb8(%RBP),%RCX

0x22ef2f LEA	-0x170(%RBP),%R8

0x22ef36 LEA	-0xb0(%RBP),%R9

0x22ef3d MOV	%ESI,-0xb4(%RBP)

0x22ef43 MOV	$0x22,%EDX

0x22ef48 PUSH	$0x1

0x22ef4a PUSH	$0x1

0x22ef4c PUSH	%RAX

0x22ef4d CALL	25ccf0 <@plt_start@+0x530>

0x22ef52 ADD	$0x20,%RSP

0x22ef56 MOV	-0xb0(%RBP),%RAX

0x22ef5d CMP	%R14,%RAX

0x22ef60 CMOVL	%RAX,%R14

0x22ef64 MOV	%R14,-0xb0(%RBP)

0x22ef6b MOV	-0x170(%RBP),%R11

0x22ef72 CMP	%R14,%R11

0x22ef75 JG	22f70c

0x22ef7b MOV	0x50(%RBP),%RAX

0x22ef7f MOV	0x40(%RBP),%RCX

0x22ef83 MOV	0x38(%RBP),%RDX

0x22ef87 MOV	0x30(%RBP),%RSI

0x22ef8b MOV	0x28(%RBP),%RDI

0x22ef8f MOV	0x20(%RBP),%R8

0x22ef93 MOV	0x18(%RBP),%R9

0x22ef97 MOV	(%R9),%R10

0x22ef9a MOV	%R10,-0x140(%RBP)

0x22efa1 MOV	0x10(%R9),%R9

0x22efa5 MOV	%R9,-0x138(%RBP)

0x22efac MOV	(%R8),%R9

0x22efaf MOV	%R9,-0x130(%RBP)

0x22efb6 MOV	0x10(%R8),%R8

0x22efba MOV	%R8,-0x128(%RBP)

0x22efc1 MOV	(%RSI),%R8

0x22efc4 MOV	%R8,-0x120(%RBP)

0x22efcb MOV	0x10(%RSI),%RSI

0x22efcf MOV	%RSI,-0x118(%RBP)

0x22efd6 MOV	(%RDX),%RSI

0x22efd9 MOV	%RSI,-0x110(%RBP)

0x22efe0 MOV	0x10(%RDX),%RDX

0x22efe4 MOV	%RDX,-0x50(%RBP)

0x22efe8 MOV	(%RCX),%RDX

0x22efeb MOV	%RDX,-0x108(%RBP)

0x22eff2 MOV	0x10(%RCX),%RCX

0x22eff6 MOV	%RCX,-0x100(%RBP)

0x22effd MOV	(%RDI),%RCX

0x22f000 MOV	%RCX,-0xf8(%RBP)

0x22f007 MOV	0x10(%RDI),%RCX

0x22f00b MOV	%RCX,-0x48(%RBP)

0x22f00f MOV	(%RAX),%RCX

0x22f012 MOV	%RCX,-0xf0(%RBP)

0x22f019 MOV	0x10(%RAX),%RAX

0x22f01d MOV	%RAX,-0xe8(%RBP)

0x22f024 MOV	0x58(%RBP),%RAX

0x22f028 MOV	(%RAX),%RCX

0x22f02b MOV	%RCX,-0xe0(%RBP)

0x22f032 MOV	0x10(%RAX),%RAX

0x22f036 MOV	%RAX,-0xd8(%RBP)

0x22f03d MOV	0x48(%RBP),%RAX

0x22f041 MOV	(%RAX),%RCX

0x22f044 MOV	%RCX,-0xd0(%RBP)

0x22f04b MOV	0x10(%RAX),%RAX

0x22f04f MOV	%RAX,-0x98(%RBP)

0x22f056 MOV	0x60(%RBP),%RAX

0x22f05a MOV	(%RAX),%RCX

0x22f05d MOV	%RCX,-0xc8(%RBP)

0x22f064 MOV	0x10(%RAX),%RAX

0x22f068 MOV	%RAX,-0xc0(%RBP)

0x22f06f MOV	%R14,%RAX

0x22f072 SUB	%R11,%RAX

0x22f075 INC	%RAX

0x22f078 CMP	$0x2,%RAX

0x22f07c MOV	%RBX,-0x148(%RBP)

0x22f083 MOV	%R14,-0x188(%RBP)

0x22f08a JAE	22f094

0x22f08c MOV	%R11,%RCX

0x22f08f JMP	22f9de

0x22f094 MOV	%RAX,-0x180(%RBP)

0x22f09b MOV	%RAX,%RCX

0x22f09e AND	$-0x2,%RCX

0x22f0a2 LEA	(%R11,%RCX,1),%RAX

0x22f0a6 MOV	%RAX,-0xa8(%RBP)

0x22f0ad MOVAPD	-0x1dd25(%RIP),%XMM0

0x22f0b5 MOV	%RCX,-0x178(%RBP)

0x22f0bc MOV	%RCX,%RDX

0x22f0bf JMP	22f69c

0x22f0c4 NOPW	%CS:(%RAX,%RAX,1)

(141) 0x22f0d0 CQTO

(141) 0x22f0d2 IDIV	%RBX

(141) 0x22f0d5 MOV	-0x158(%RBP),%RCX

(141) 0x22f0dc LEA	(%RCX,%RDI,1),%R14D

(141) 0x22f0e0 LEA	(%RCX,%RAX,1),%EBX

(141) 0x22f0e3 LEA	(%RSI,%R8,1),%ECX

(141) 0x22f0e7 MOV	%ECX,-0x80(%RBP)

(141) 0x22f0ea LEA	(%RSI,%RDX,1),%ECX

(141) 0x22f0ed MOV	%ECX,-0x88(%RBP)

(141) 0x22f0f3 MOV	-0x150(%RBP),%RCX

(141) 0x22f0fa ADD	%ECX,%R8D

(141) 0x22f0fd ADD	%ECX,%EDX

(141) 0x22f0ff MOVSXD	%R8D,%R10

(141) 0x22f102 MOVSXD	%EDX,%R8

(141) 0x22f105 MOV	%R8,-0xa0(%RBP)

(141) 0x22f10c ADD	%R9D,%EDI

(141) 0x22f10f ADD	%R9D,%EAX

(141) 0x22f112 MOVSXD	%EDI,%RCX

(141) 0x22f115 MOVSXD	%EAX,%R11

(141) 0x22f118 MOV	%R11,-0x168(%RBP)

(141) 0x22f11f MOV	-0x140(%RBP),%R15

(141) 0x22f126 MOV	%R15,%RSI

(141) 0x22f129 IMUL	%RCX,%RSI

(141) 0x22f12d MOV	%RCX,-0x38(%RBP)

(141) 0x22f131 MOV	%R15,%RDI

(141) 0x22f134 IMUL	%R11,%RDI

(141) 0x22f138 MOV	%RDI,-0x78(%RBP)

(141) 0x22f13c LEA	(%RSI,%R10,1),%RDX

(141) 0x22f140 MOV	%R10,%RAX

(141) 0x22f143 ADD	%R8,%RDI

(141) 0x22f146 MOV	-0x138(%RBP),%R13

(141) 0x22f14d MOVSD	(%R13,%RDX,8),%XMM2

(141) 0x22f154 MOVHPD	(%R13,%RDI,8),%XMM2

(141) 0x22f15b MOV	-0x130(%RBP),%R12

(141) 0x22f162 MOV	%R12,%R9

(141) 0x22f165 IMUL	%RCX,%R9

(141) 0x22f169 MOV	%R12,%R10

(141) 0x22f16c IMUL	%R11,%R10

(141) 0x22f170 LEA	(%R9,%RAX,1),%RDX

(141) 0x22f174 MOV	%RAX,%RCX

(141) 0x22f177 MOV	%RAX,-0x160(%RBP)

(141) 0x22f17e MOV	-0x128(%RBP),%RAX

(141) 0x22f185 MOVSD	(%RAX,%RDX,8),%XMM3

(141) 0x22f18a LEA	(%R10,%R8,1),%RDX

(141) 0x22f18e MOVHPD	(%RAX,%RDX,8),%XMM3

(141) 0x22f193 MOVSXD	%R14D,%R11

(141) 0x22f196 MOV	%R15,%R14

(141) 0x22f199 IMUL	%R11,%R14

(141) 0x22f19d LEA	(%R14,%RCX,1),%RDX

(141) 0x22f1a1 MOVSD	(%R13,%RDX,8),%XMM5

(141) 0x22f1a8 MOVSXD	%EBX,%RDI

(141) 0x22f1ab MOV	%R15,%RBX

(141) 0x22f1ae IMUL	%RDI,%RBX

(141) 0x22f1b2 LEA	(%RBX,%R8,1),%RDX

(141) 0x22f1b6 MOVHPD	(%R13,%RDX,8),%XMM5

(141) 0x22f1bd MOV	%R12,%R15

(141) 0x22f1c0 IMUL	%R11,%R15

(141) 0x22f1c4 LEA	(%R15,%RCX,1),%RDX

(141) 0x22f1c8 MOVSD	(%RAX,%RDX,8),%XMM4

(141) 0x22f1cd IMUL	%RDI,%R12

(141) 0x22f1d1 LEA	(%R12,%R8,1),%RDX

(141) 0x22f1d5 MOVHPD	(%RAX,%RDX,8),%XMM4

(141) 0x22f1da MOVSXD	-0x80(%RBP),%R8

(141) 0x22f1de ADD	%R8,%R14

(141) 0x22f1e1 MOVSD	(%R13,%R14,8),%XMM6

(141) 0x22f1e8 MOVSXD	-0x88(%RBP),%R14

(141) 0x22f1ef ADD	%R14,%RBX

(141) 0x22f1f2 MOVHPD	(%R13,%RBX,8),%XMM6

(141) 0x22f1f9 ADD	%R8,%R15

(141) 0x22f1fc MOVSD	(%RAX,%R15,8),%XMM7

(141) 0x22f202 MOV	0x10(%RBP),%RDX

(141) 0x22f206 MOVSD	(%RDX),%XMM1

(141) 0x22f20a UNPCKLPD	%XMM1,%XMM1

(141) 0x22f20e MULPD	%XMM2,%XMM3

(141) 0x22f212 MULPD	%XMM5,%XMM4

(141) 0x22f216 ADD	%R14,%R12

(141) 0x22f219 MOVHPD	(%RAX,%R12,8),%XMM7

(141) 0x22f21f ADDPD	%XMM3,%XMM4

(141) 0x22f223 MULPD	%XMM6,%XMM7

(141) 0x22f227 ADD	%R8,%RSI

(141) 0x22f22a MOV	-0x78(%RBP),%RDX

(141) 0x22f22e ADD	%R14,%RDX

(141) 0x22f231 MOVSD	(%R13,%RSI,8),%XMM2

(141) 0x22f238 MOVHPD	(%R13,%RDX,8),%XMM2

(141) 0x22f23f ADD	%R8,%R9

(141) 0x22f242 ADD	%R14,%R10

(141) 0x22f245 MOVSD	(%RAX,%R9,8),%XMM3

(141) 0x22f24b MOVHPD	(%RAX,%R10,8),%XMM3

(141) 0x22f251 ADDPD	%XMM4,%XMM7

(141) 0x22f255 MULPD	%XMM2,%XMM3

(141) 0x22f259 ADDPD	%XMM7,%XMM3

(141) 0x22f25d MOV	-0x120(%RBP),%RCX

(141) 0x22f264 MOV	%RCX,%RAX

(141) 0x22f267 MOV	%R11,%R15

(141) 0x22f26a IMUL	%R11,%RAX

(141) 0x22f26e IMUL	%RDI,%RCX

(141) 0x22f272 ADD	%R8,%RAX

(141) 0x22f275 ADD	%R14,%RCX

(141) 0x22f278 MOV	-0x118(%RBP),%RSI

(141) 0x22f27f MOVSD	(%RSI,%RAX,8),%XMM2

(141) 0x22f284 MOVHPD	(%RSI,%RCX,8),%XMM2

(141) 0x22f289 MULPD	%XMM0,%XMM3

(141) 0x22f28d MOV	-0x110(%RBP),%R11

(141) 0x22f294 MOV	%R11,%RAX

(141) 0x22f297 IMUL	%R15,%RAX

(141) 0x22f29b MOV	%R11,%RCX

(141) 0x22f29e IMUL	%RDI,%RCX

(141) 0x22f2a2 MOV	%RDI,-0x40(%RBP)

(141) 0x22f2a6 ADD	%R8,%RAX

(141) 0x22f2a9 MOV	%RAX,-0x80(%RBP)

(141) 0x22f2ad ADD	%R14,%RCX

(141) 0x22f2b0 MOV	%RCX,-0x88(%RBP)

(141) 0x22f2b7 MOV	-0x50(%RBP),%RSI

(141) 0x22f2bb MOVSD	(%RSI,%RAX,8),%XMM5

(141) 0x22f2c0 MOVHPD	(%RSI,%RCX,8),%XMM5

(141) 0x22f2c5 MOV	%RSI,%R9

(141) 0x22f2c8 MOV	-0x108(%RBP),%RCX

(141) 0x22f2cf MOV	%RCX,%R12

(141) 0x22f2d2 IMUL	%R15,%R12

(141) 0x22f2d6 MOV	%RCX,%R13

(141) 0x22f2d9 IMUL	%RDI,%R13

(141) 0x22f2dd LEA	(%R12,%R8,1),%RDX

(141) 0x22f2e1 MOV	%RDX,-0x70(%RBP)

(141) 0x22f2e5 MOV	-0x100(%RBP),%RAX

(141) 0x22f2ec MOVSD	(%RAX,%RDX,8),%XMM4

(141) 0x22f2f1 LEA	(%R13,%R14,1),%RDX

(141) 0x22f2f6 MOV	%RDX,-0x68(%RBP)

(141) 0x22f2fa MOVHPD	(%RAX,%RDX,8),%XMM4

(141) 0x22f2ff MOV	-0x160(%RBP),%RBX

(141) 0x22f306 ADD	%RBX,%R12

(141) 0x22f309 MOV	-0xa0(%RBP),%R10

(141) 0x22f310 ADD	%R10,%R13

(141) 0x22f313 MOVSD	(%RAX,%R12,8),%XMM6

(141) 0x22f319 MOVHPD	(%RAX,%R13,8),%XMM6

(141) 0x22f31f DIVPD	%XMM3,%XMM1

(141) 0x22f323 SUBPD	%XMM6,%XMM4

(141) 0x22f327 MOV	%R11,%RDI

(141) 0x22f32a MOV	-0x38(%RBP),%RSI

(141) 0x22f32e IMUL	%RSI,%RDI

(141) 0x22f332 MOV	-0x168(%RBP),%RDX

(141) 0x22f339 IMUL	%RDX,%R11

(141) 0x22f33d ADD	%R8,%RDI

(141) 0x22f340 MOV	%RDI,-0x78(%RBP)

(141) 0x22f344 ADD	%R14,%R11

(141) 0x22f347 MOVSD	(%R9,%RDI,8),%XMM3

(141) 0x22f34d MOVHPD	(%R9,%R11,8),%XMM3

(141) 0x22f353 MOV	%RCX,%RDI

(141) 0x22f356 IMUL	%RSI,%RDI

(141) 0x22f35a MOV	%RCX,%R9

(141) 0x22f35d IMUL	%RDX,%R9

(141) 0x22f361 LEA	(%RDI,%R8,1),%RCX

(141) 0x22f365 MOV	%RCX,-0x60(%RBP)

(141) 0x22f369 MOVSD	(%RAX,%RCX,8),%XMM6

(141) 0x22f36e LEA	(%R9,%R14,1),%RCX

(141) 0x22f372 MOV	%RCX,-0x58(%RBP)

(141) 0x22f376 MOVHPD	(%RAX,%RCX,8),%XMM6

(141) 0x22f37b MULPD	%XMM5,%XMM4

(141) 0x22f37f ADD	%RBX,%RDI

(141) 0x22f382 ADD	%R10,%R9

(141) 0x22f385 MOVSD	(%RAX,%RDI,8),%XMM5

(141) 0x22f38a MOVHPD	(%RAX,%R9,8),%XMM5

(141) 0x22f390 SUBPD	%XMM5,%XMM6

(141) 0x22f394 MULPD	%XMM3,%XMM6

(141) 0x22f398 ADDPD	%XMM4,%XMM6

(141) 0x22f39c MULPD	%XMM1,%XMM6

(141) 0x22f3a0 ADDPD	%XMM2,%XMM6

(141) 0x22f3a4 MOV	-0xf8(%RBP),%RBX

(141) 0x22f3ab MOV	%RBX,%RDX

(141) 0x22f3ae MOV	%R15,%RCX

(141) 0x22f3b1 IMUL	%R15,%RDX

(141) 0x22f3b5 MOV	-0x40(%RBP),%RSI

(141) 0x22f3b9 IMUL	%RSI,%RBX

(141) 0x22f3bd ADD	%R8,%RDX

(141) 0x22f3c0 MOV	%RDX,-0x198(%RBP)

(141) 0x22f3c7 ADD	%R14,%RBX

(141) 0x22f3ca MOV	%RBX,-0x190(%RBP)

(141) 0x22f3d1 MOV	-0x48(%RBP),%R10

(141) 0x22f3d5 MOVLPD	%XMM6,(%R10,%RDX,8)

(141) 0x22f3db MOVHPD	%XMM6,(%R10,%RBX,8)

(141) 0x22f3e1 MOV	-0xf0(%RBP),%RDX

(141) 0x22f3e8 MOV	%RDX,%R15

(141) 0x22f3eb IMUL	%RCX,%R15

(141) 0x22f3ef MOV	%RCX,%RBX

(141) 0x22f3f2 ADD	%R8,%R15

(141) 0x22f3f5 MOV	-0xe8(%RBP),%RCX

(141) 0x22f3fc MOVSD	(%RCX,%R15,8),%XMM2

(141) 0x22f402 MOV	%RDX,%R15

(141) 0x22f405 IMUL	%RSI,%R15

(141) 0x22f409 MOV	%RSI,%RDX

(141) 0x22f40c ADD	%R14,%R15

(141) 0x22f40f MOVHPD	(%RCX,%R15,8),%XMM2

(141) 0x22f415 MOV	-0x70(%RBP),%RCX

(141) 0x22f419 MOVSD	(%RAX,%RCX,8),%XMM3

(141) 0x22f41e MOV	-0x68(%RBP),%RCX

(141) 0x22f422 MOVHPD	(%RAX,%RCX,8),%XMM3

(141) 0x22f427 MOV	-0x60(%RBP),%RCX

(141) 0x22f42b MOVSD	(%RAX,%RCX,8),%XMM4

(141) 0x22f430 MOV	-0x58(%RBP),%RCX

(141) 0x22f434 MOVHPD	(%RAX,%RCX,8),%XMM4

(141) 0x22f439 MOVSD	(%RAX,%R12,8),%XMM5

(141) 0x22f43f MOVHPD	(%RAX,%R13,8),%XMM5

(141) 0x22f445 MOVSD	(%RAX,%RDI,8),%XMM6

(141) 0x22f44a MOVHPD	(%RAX,%R9,8),%XMM6

(141) 0x22f450 MOV	-0xe0(%RBP),%R15

(141) 0x22f457 MOV	%R15,%RSI

(141) 0x22f45a IMUL	%RBX,%RSI

(141) 0x22f45e MOV	%RDX,%RCX

(141) 0x22f461 IMUL	%RDX,%R15

(141) 0x22f465 LEA	(%RSI,%R8,1),%RAX

(141) 0x22f469 MOV	%RAX,-0x68(%RBP)

(141) 0x22f46d MOV	-0xd8(%RBP),%R9

(141) 0x22f474 MOVSD	(%R9,%RAX,8),%XMM7

(141) 0x22f47a LEA	(%R15,%R14,1),%RAX

(141) 0x22f47e MOV	%RAX,-0x70(%RBP)

(141) 0x22f482 MOVHPD	(%R9,%RAX,8),%XMM7

(141) 0x22f488 SUBPD	%XMM4,%XMM3

(141) 0x22f48c MULPD	%XMM7,%XMM3

(141) 0x22f490 MOV	-0x160(%RBP),%RAX

(141) 0x22f497 ADD	%RAX,%RSI

(141) 0x22f49a MOV	%RSI,-0x58(%RBP)

(141) 0x22f49e ADD	-0xa0(%RBP),%R15

(141) 0x22f4a5 MOVSD	(%R9,%RSI,8),%XMM4

(141) 0x22f4ab MOVHPD	(%R9,%R15,8),%XMM4

(141) 0x22f4b1 SUBPD	%XMM6,%XMM5

(141) 0x22f4b5 MULPD	%XMM4,%XMM5

(141) 0x22f4b9 ADDPD	%XMM3,%XMM5

(141) 0x22f4bd MULPD	%XMM1,%XMM5

(141) 0x22f4c1 ADDPD	%XMM2,%XMM5

(141) 0x22f4c5 MOV	-0xd0(%RBP),%R12

(141) 0x22f4cc MOV	%R12,%RSI

(141) 0x22f4cf IMUL	%RBX,%RSI

(141) 0x22f4d3 IMUL	%RDX,%R12

(141) 0x22f4d7 ADD	%R8,%RSI

(141) 0x22f4da MOV	%RSI,-0x60(%RBP)

(141) 0x22f4de ADD	%R14,%R12

(141) 0x22f4e1 MOV	-0x98(%RBP),%RCX

(141) 0x22f4e8 MOVLPD	%XMM5,(%RCX,%RSI,8)

(141) 0x22f4ed MOVHPD	%XMM5,(%RCX,%R12,8)

(141) 0x22f4f3 MOV	-0x80(%RBP),%RCX

(141) 0x22f4f7 MOV	-0x50(%RBP),%RDI

(141) 0x22f4fb MOVSD	(%RDI,%RCX,8),%XMM2

(141) 0x22f500 MOV	-0x88(%RBP),%RCX

(141) 0x22f507 MOVHPD	(%RDI,%RCX,8),%XMM2

(141) 0x22f50c MOV	-0x78(%RBP),%RCX

(141) 0x22f510 MOVSD	(%RDI,%RCX,8),%XMM3

(141) 0x22f515 MOVHPD	(%RDI,%R11,8),%XMM3

(141) 0x22f51b MOV	-0xc8(%RBP),%RDI

(141) 0x22f522 IMUL	%RDI,%RBX

(141) 0x22f526 LEA	(%RBX,%R8,1),%R10

(141) 0x22f52a ADD	%RAX,%RBX

(141) 0x22f52d MOV	-0x38(%RBP),%R11

(141) 0x22f531 IMUL	%RDI,%R11

(141) 0x22f535 ADD	%R11,%R8

(141) 0x22f538 MOV	%R8,-0x38(%RBP)

(141) 0x22f53c ADD	%RAX,%R11

(141) 0x22f53f MOV	-0x40(%RBP),%RCX

(141) 0x22f543 IMUL	%RDI,%RCX

(141) 0x22f547 LEA	(%RCX,%R14,1),%RDX

(141) 0x22f54b MOV	-0xa0(%RBP),%RAX

(141) 0x22f552 ADD	%RAX,%RCX

(141) 0x22f555 MOV	%RCX,-0x40(%RBP)

(141) 0x22f559 MOV	-0x168(%RBP),%R13

(141) 0x22f560 IMUL	%RDI,%R13

(141) 0x22f564 ADD	%R13,%R14

(141) 0x22f567 ADD	%RAX,%R13

(141) 0x22f56a MOV	-0x198(%RBP),%RAX

(141) 0x22f571 MOV	-0x48(%RBP),%RSI

(141) 0x22f575 MOVSD	(%RSI,%RAX,8),%XMM4

(141) 0x22f57a MOV	-0x190(%RBP),%R8

(141) 0x22f581 MOVHPD	(%RSI,%R8,8),%XMM4

(141) 0x22f587 MOV	-0xc0(%RBP),%RDI

(141) 0x22f58e MOVSD	(%RDI,%R10,8),%XMM5

(141) 0x22f594 MOVHPD	(%RDI,%RDX,8),%XMM5

(141) 0x22f599 MOVSD	(%RDI,%RBX,8),%XMM6

(141) 0x22f59e MOVHPD	(%RDI,%RCX,8),%XMM6

(141) 0x22f5a3 SUBPD	%XMM6,%XMM5

(141) 0x22f5a7 MULPD	%XMM2,%XMM5

(141) 0x22f5ab MOV	-0x38(%RBP),%RCX

(141) 0x22f5af MOVSD	(%RDI,%RCX,8),%XMM2

(141) 0x22f5b4 MOVHPD	(%RDI,%R14,8),%XMM2

(141) 0x22f5ba MOVSD	(%RDI,%R11,8),%XMM6

(141) 0x22f5c0 MOVHPD	(%RDI,%R13,8),%XMM6

(141) 0x22f5c6 SUBPD	%XMM6,%XMM2

(141) 0x22f5ca MULPD	%XMM3,%XMM2

(141) 0x22f5ce ADDPD	%XMM5,%XMM2

(141) 0x22f5d2 MULPD	%XMM1,%XMM2

(141) 0x22f5d6 ADDPD	%XMM4,%XMM2

(141) 0x22f5da MOVLPD	%XMM2,(%RSI,%RAX,8)

(141) 0x22f5df MOVHPD	%XMM2,(%RSI,%R8,8)

(141) 0x22f5e5 MOV	-0x68(%RBP),%RAX

(141) 0x22f5e9 MOVSD	(%R9,%RAX,8),%XMM2

(141) 0x22f5ef MOV	-0x70(%RBP),%RAX

(141) 0x22f5f3 MOVHPD	(%R9,%RAX,8),%XMM2

(141) 0x22f5f9 MOVSD	(%RDI,%R10,8),%XMM3

(141) 0x22f5ff MOVHPD	(%RDI,%RDX,8),%XMM3

(141) 0x22f604 MOVSD	(%RDI,%RCX,8),%XMM4

(141) 0x22f609 MOVHPD	(%RDI,%R14,8),%XMM4

(141) 0x22f60f MOV	-0x58(%RBP),%RAX

(141) 0x22f613 MOVSD	(%R9,%RAX,8),%XMM5

(141) 0x22f619 MOVHPD	(%R9,%R15,8),%XMM5

(141) 0x22f61f MOVSD	(%RDI,%RBX,8),%XMM6

(141) 0x22f624 MOV	-0x40(%RBP),%RAX

(141) 0x22f628 MOVHPD	(%RDI,%RAX,8),%XMM6

(141) 0x22f62d MOVSD	(%RDI,%R11,8),%XMM7

(141) 0x22f633 MOVHPD	(%RDI,%R13,8),%XMM7

(141) 0x22f639 SUBPD	%XMM4,%XMM3

(141) 0x22f63d MULPD	%XMM2,%XMM3

(141) 0x22f641 MOV	-0x98(%RBP),%RAX

(141) 0x22f648 MOV	-0x60(%RBP),%RCX

(141) 0x22f64c MOVSD	(%RAX,%RCX,8),%XMM2

(141) 0x22f651 MOVHPD	(%RAX,%R12,8),%XMM2

(141) 0x22f657 SUBPD	%XMM7,%XMM6

(141) 0x22f65b MULPD	%XMM5,%XMM6

(141) 0x22f65f ADDPD	%XMM3,%XMM6

(141) 0x22f663 MULPD	%XMM1,%XMM6

(141) 0x22f667 ADDPD	%XMM2,%XMM6

(141) 0x22f66b MOVLPD	%XMM6,(%RAX,%RCX,8)

(141) 0x22f670 MOVHPD	%XMM6,(%RAX,%R12,8)

(141) 0x22f676 MOV	-0x1a8(%RBP),%R11

(141) 0x22f67d ADD	$0x2,%R11

(141) 0x22f681 MOV	-0x1a0(%RBP),%RDX

(141) 0x22f688 ADD	$-0x2,%RDX

(141) 0x22f68c MOV	-0x148(%RBP),%RBX

(141) 0x22f693 MOV	-0xa8(%RBP),%RCX

(141) 0x22f69a JE	22f6f8

(141) 0x22f69c MOV	%R11,%RAX

(141) 0x22f69f SHR	$0x20,%RAX

(141) 0x22f6a3 MOV	%RDX,-0x1a0(%RBP)

(141) 0x22f6aa JE	22f6c0

(141) 0x22f6ac MOV	%R11,%RAX

(141) 0x22f6af CQTO

(141) 0x22f6b1 IDIV	%RBX

(141) 0x22f6b4 MOV	%RDX,%R8

(141) 0x22f6b7 MOV	%RAX,%RDI

(141) 0x22f6ba JMP	22f6cc

0x22f6bc NOPL	(%RAX)

(141) 0x22f6c0 MOV	%R11D,%EAX

(141) 0x22f6c3 XOR	%EDX,%EDX

(141) 0x22f6c5 DIV	%EBX

(141) 0x22f6c7 MOV	%EDX,%R8D

(141) 0x22f6ca MOV	%EAX,%EDI

(141) 0x22f6cc MOV	-0x90(%RBP),%R9

(141) 0x22f6d3 MOV	-0x30(%RBP),%RSI

(141) 0x22f6d7 LEA	0x1(%R11),%RAX

(141) 0x22f6db MOV	%RAX,%RCX

(141) 0x22f6de SHR	$0x20,%RCX

(141) 0x22f6e2 MOV	%R11,-0x1a8(%RBP)

(141) 0x22f6e9 JNE	22f0d0

(141) 0x22f6ef XOR	%EDX,%EDX

(141) 0x22f6f1 DIV	%EBX

(141) 0x22f6f3 JMP	22f0d5

0x22f6f8 MOV	-0x178(%RBP),%RAX

0x22f6ff CMP	%RAX,-0x180(%RBP)

0x22f706 JNE	22f9de

0x22f70c LEA	0x2e835(%RIP),%RDI

0x22f713 MOV	-0xb4(%RBP),%ESI

0x22f719 CALL	25cd00 <@plt_start@+0x540>

0x22f71e ADD	$0x188,%RSP

0x22f725 POP	%RBX

0x22f726 POP	%R12

0x22f728 POP	%R13

0x22f72a POP	%R14

0x22f72c POP	%R15

0x22f72e POP	%RBP

0x22f72f RET

(140) 0x22f730 MOV	%RCX,%RAX

(140) 0x22f733 CQTO

(140) 0x22f735 IDIV	%RBX

(140) 0x22f738 MOV	-0x30(%RBP),%RSI

(140) 0x22f73c MOV	-0x158(%RBP),%RCX

(140) 0x22f743 ADD	%EAX,%ECX

(140) 0x22f745 ADD	%EDX,%ESI

(140) 0x22f747 MOV	0x10(%RBP),%RDI

(140) 0x22f74b MOVSD	(%RDI),%XMM0

(140) 0x22f74f ADD	-0x150(%RBP),%EDX

(140) 0x22f755 MOVSXD	%EDX,%R12

(140) 0x22f758 ADD	-0x90(%RBP),%EAX

(140) 0x22f75e MOVSXD	%EAX,%RDX

(140) 0x22f761 MOV	-0x140(%RBP),%R9

(140) 0x22f768 MOV	%R9,%RDI

(140) 0x22f76b IMUL	%RDX,%RDI

(140) 0x22f76f LEA	(%RDI,%R12,1),%R8

(140) 0x22f773 MOV	-0x138(%RBP),%RBX

(140) 0x22f77a MOVSD	(%RBX,%R8,8),%XMM1

(140) 0x22f780 MOV	-0x130(%RBP),%R11

(140) 0x22f787 MOV	%R11,%R8

(140) 0x22f78a IMUL	%RDX,%R8

(140) 0x22f78e MOVSXD	%ECX,%RCX

(140) 0x22f791 IMUL	%RCX,%R9

(140) 0x22f795 LEA	(%R9,%R12,1),%R10

(140) 0x22f799 MOVSD	(%RBX,%R10,8),%XMM2

(140) 0x22f79f MOV	%R11,%R10

(140) 0x22f7a2 IMUL	%RCX,%R10

(140) 0x22f7a6 LEA	(%R10,%R12,1),%R11

(140) 0x22f7aa MOV	-0x128(%RBP),%R14

(140) 0x22f7b1 MULSD	(%R14,%R11,8),%XMM2

(140) 0x22f7b7 LEA	(%R8,%R12,1),%R11

(140) 0x22f7bb MULSD	(%R14,%R11,8),%XMM1

(140) 0x22f7c1 ADDSD	%XMM2,%XMM1

(140) 0x22f7c5 MOVSXD	%ESI,%RSI

(140) 0x22f7c8 ADD	%RSI,%R9

(140) 0x22f7cb MOVSD	(%RBX,%R9,8),%XMM2

(140) 0x22f7d1 ADD	%RSI,%R10

(140) 0x22f7d4 MULSD	(%R14,%R10,8),%XMM2

(140) 0x22f7da ADDSD	%XMM1,%XMM2

(140) 0x22f7de ADD	%RSI,%RDI

(140) 0x22f7e1 MOVSD	(%RBX,%RDI,8),%XMM1

(140) 0x22f7e6 ADD	%RSI,%R8

(140) 0x22f7e9 MULSD	(%R14,%R8,8),%XMM1

(140) 0x22f7ef ADDSD	%XMM2,%XMM1

(140) 0x22f7f3 MULSD	-0x1e6ab(%RIP),%XMM1

(140) 0x22f7fb DIVSD	%XMM1,%XMM0

(140) 0x22f7ff MOV	-0x120(%RBP),%R9

(140) 0x22f806 IMUL	%RCX,%R9

(140) 0x22f80a ADD	%RSI,%R9

(140) 0x22f80d MOV	-0x110(%RBP),%R8

(140) 0x22f814 MOV	%R8,%RDI

(140) 0x22f817 IMUL	%RCX,%RDI

(140) 0x22f81b MOV	-0x108(%RBP),%RBX

(140) 0x22f822 MOV	%RBX,%R11

(140) 0x22f825 IMUL	%RCX,%R11

(140) 0x22f829 LEA	(%R11,%RSI,1),%R10

(140) 0x22f82d MOV	-0x100(%RBP),%R13

(140) 0x22f834 MOVSD	(%R13,%R10,8),%XMM1

(140) 0x22f83b ADD	%R12,%R11

(140) 0x22f83e SUBSD	(%R13,%R11,8),%XMM1

(140) 0x22f845 IMUL	%RDX,%R8

(140) 0x22f849 ADD	%RSI,%R8

(140) 0x22f84c IMUL	%RDX,%RBX

(140) 0x22f850 LEA	(%RBX,%RSI,1),%R14

(140) 0x22f854 MOVSD	(%R13,%R14,8),%XMM2

(140) 0x22f85b ADD	%R12,%RBX

(140) 0x22f85e SUBSD	(%R13,%RBX,8),%XMM2

(140) 0x22f865 MOV	-0x50(%RBP),%RAX

(140) 0x22f869 MULSD	(%RAX,%R8,8),%XMM2

(140) 0x22f86f ADD	%RSI,%RDI

(140) 0x22f872 MULSD	(%RAX,%RDI,8),%XMM1

(140) 0x22f877 ADDSD	%XMM2,%XMM1

(140) 0x22f87b MULSD	%XMM0,%XMM1

(140) 0x22f87f MOV	-0x118(%RBP),%R15

(140) 0x22f886 ADDSD	(%R15,%R9,8),%XMM1

(140) 0x22f88c MOV	-0xf8(%RBP),%R9

(140) 0x22f893 IMUL	%RCX,%R9

(140) 0x22f897 ADD	%RSI,%R9

(140) 0x22f89a MOV	-0x48(%RBP),%RAX

(140) 0x22f89e MOVSD	%XMM1,(%RAX,%R9,8)

(140) 0x22f8a4 MOVSD	(%R13,%R10,8),%XMM1

(140) 0x22f8ab MOV	-0xf0(%RBP),%R15

(140) 0x22f8b2 IMUL	%RCX,%R15

(140) 0x22f8b6 SUBSD	(%R13,%R14,8),%XMM1

(140) 0x22f8bd ADD	%RSI,%R15

(140) 0x22f8c0 MOV	-0xe0(%RBP),%R10

(140) 0x22f8c7 IMUL	%RCX,%R10

(140) 0x22f8cb MOVSD	(%R13,%R11,8),%XMM2

(140) 0x22f8d2 LEA	(%R10,%RSI,1),%R11

(140) 0x22f8d6 ADD	%R12,%R10

(140) 0x22f8d9 SUBSD	(%R13,%RBX,8),%XMM2

(140) 0x22f8e0 MOV	-0xd8(%RBP),%R13

(140) 0x22f8e7 MULSD	(%R13,%R10,8),%XMM2

(140) 0x22f8ee MULSD	(%R13,%R11,8),%XMM1

(140) 0x22f8f5 ADDSD	%XMM2,%XMM1

(140) 0x22f8f9 MULSD	%XMM0,%XMM1

(140) 0x22f8fd MOV	-0xe8(%RBP),%RBX

(140) 0x22f904 ADDSD	(%RBX,%R15,8),%XMM1

(140) 0x22f90a MOV	-0xd0(%RBP),%RBX

(140) 0x22f911 IMUL	%RCX,%RBX

(140) 0x22f915 ADD	%RSI,%RBX

(140) 0x22f918 MOV	-0x98(%RBP),%R15

(140) 0x22f91f MOVSD	%XMM1,(%R15,%RBX,8)

(140) 0x22f925 MOV	-0xc8(%RBP),%RAX

(140) 0x22f92c IMUL	%RAX,%RCX

(140) 0x22f930 LEA	(%RCX,%RSI,1),%R14

(140) 0x22f934 IMUL	%RAX,%RDX

(140) 0x22f938 ADD	%RDX,%RSI

(140) 0x22f93b MOV	-0xc0(%RBP),%RAX

(140) 0x22f942 MOVSD	(%RAX,%RSI,8),%XMM1

(140) 0x22f947 ADD	%R12,%RDX

(140) 0x22f94a SUBSD	(%RAX,%RDX,8),%XMM1

(140) 0x22f94f ADD	%R12,%RCX

(140) 0x22f952 MOV	-0x50(%RBP),%R12

(140) 0x22f956 MULSD	(%R12,%R8,8),%XMM1

(140) 0x22f95c MOVSD	(%RAX,%R14,8),%XMM2

(140) 0x22f962 SUBSD	(%RAX,%RCX,8),%XMM2

(140) 0x22f967 MULSD	(%R12,%RDI,8),%XMM2

(140) 0x22f96d ADDSD	%XMM1,%XMM2

(140) 0x22f971 MULSD	%XMM0,%XMM2

(140) 0x22f975 MOV	-0x48(%RBP),%RDI

(140) 0x22f979 ADDSD	(%RDI,%R9,8),%XMM2

(140) 0x22f97f MOVSD	%XMM2,(%RDI,%R9,8)

(140) 0x22f985 MOVSD	(%RAX,%R14,8),%XMM1

(140) 0x22f98b SUBSD	(%RAX,%RSI,8),%XMM1

(140) 0x22f990 MOVSD	(%RAX,%RCX,8),%XMM2

(140) 0x22f995 SUBSD	(%RAX,%RDX,8),%XMM2

(140) 0x22f99a MULSD	(%R13,%R10,8),%XMM2

(140) 0x22f9a1 MULSD	(%R13,%R11,8),%XMM1

(140) 0x22f9a8 ADDSD	%XMM2,%XMM1

(140) 0x22f9ac MULSD	%XMM0,%XMM1

(140) 0x22f9b0 ADDSD	(%R15,%RBX,8),%XMM1

(140) 0x22f9b6 MOVSD	%XMM1,(%R15,%RBX,8)

(140) 0x22f9bc MOV	-0x188(%RBP),%R14

(140) 0x22f9c3 MOV	-0xa8(%RBP),%RAX

(140) 0x22f9ca CMP	%R14,%RAX

(140) 0x22f9cd LEA	0x1(%RAX),%RCX

(140) 0x22f9d1 MOV	-0x148(%RBP),%RBX

(140) 0x22f9d8 JGE	22f70c

(140) 0x22f9de MOV	%RCX,%RAX

(140) 0x22f9e1 SHR	$0x20,%RAX

(140) 0x22f9e5 MOV	%RCX,-0xa8(%RBP)

(140) 0x22f9ec JNE	22f730

(140) 0x22f9f2 MOV	%ECX,%EAX

(140) 0x22f9f4 XOR	%EDX,%EDX

(140) 0x22f9f6 DIV	%EBX

(140) 0x22f9f8 JMP	22f738

0x22f9fd NOPL	(%RAX)

Coverage (%)	Name	Source Location	Module

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run orig_0

Source file and lines	accelerate.cpp:40-53
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/accelerate.cpp:40-53
/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:69

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 19.50 to 1.67 cycles (11.70x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is not vectorized. Only 11% of vector register length is used (average across all SSE/AVX instructions). By fully vectorizing your function, you can lower the cost of an iteration from 19.50 to 1.78 cycles (10.95x speedup).

Details

1% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

20% of SSE/AVX loads are used in vector version.
0% of SSE/AVX stores are used in vector version.
0% of SSE/AVX addition or subtraction instructions are used in vector version.
0% of SSE/AVX multiply instructions are used in vector version.
0% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Performance is limited by:

reading data from caches/RAM (load units are a bottleneck)
writing data to caches/RAM (the store unit is a bottleneck)

By removing all these bottlenecks, you can lower the cost of an iteration from 19.50 to 17.13 cycles (1.14x speedup).

Workaround

Read less array elements
Write less array elements

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

unknown: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/accelerate.cpp:40
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/accelerate.cpp:40

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVL: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/accelerate.cpp:41

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 312 bytes. The binary function is storing 272 bytes.

General properties

nb instructions	137
nb uops	137
loop length	639
used x86 registers	16
used mmx registers	0
used xmm registers	1
used ymm registers	0
used zmm registers	0
nb stack references	44

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	17.13 cycles
front end	17.13 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	6.67	6.67	6.67	6.67	6.67	6.67	19.50	19.50	19.50	19.50	0.00	0.00	0.00	0.00	0.00	0.00
cycles	6.67	6.67	6.67	6.67	6.67	6.67	19.50	19.50	19.50	19.50	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	17.13
Dispatch	19.50
Overall L1	19.50

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	100%
load	100%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	1%
load	20%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

INT

all	11%
load	9%
store	11%
mul	12%
add-sub	7%
fma	NA (no fma vectorizable/vectorized instructions)
other	11%

all	25%
load	25%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	11%
load	12%
store	11%
mul	12%
add-sub	7%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	11%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 19.50 cycles. At this rate:

6% of peak load performance is reached (16.00 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
10% of peak store performance is reached (13.95 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 22ee90

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x188,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV (%RDX),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RCX),%R14D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
MOV %RAX,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
INC %EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
ADD $0x3,%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
MOV %RAX,-0x158(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
SUB %EAX,%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JLE 22f71e <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.omp_outlined+0x88e>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R8),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%R9),%EBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
MOV %RAX,-0x150(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
INC %EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
ADD $0x3,%EBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
CMP %EAX,%EBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JLE 22f71e <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.omp_outlined+0x88e>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV %RAX,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
SUB %EAX,%EBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
IMUL %RBX,%R14	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	scal (12.5%)
DEC %R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOVQ $0,-0x170(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV %R14,-0xb0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOVQ $0x1,-0x1b0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOVL $0,-0xb8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA -0x1b0(%RBP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA 0x2f008(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0xb8(%RBP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x170(%RBP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0xb0(%RBP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %ESI,-0xb4(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 25ccf0 <@plt_start@+0x530>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV -0xb0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP %R14,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
CMOVL %RAX,%R14	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	1	0.33	scal (12.5%)
MOV %R14,-0xb0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV -0x170(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP %R14,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JG 22f70c <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.omp_outlined+0x87c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV 0x50(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x40(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x38(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x30(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x28(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x20(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x18(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%R9),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV %R10,-0x140(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%R9),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %R9,-0x138(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%R8),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %R9,-0x130(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%R8),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %R8,-0x128(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%RSI),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %R8,-0x120(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RSI),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RSI,-0x118(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%RDX),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RSI,-0x110(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RDX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RDX,-0x50(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%RCX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RDX,-0x108(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RCX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0x100(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%RDI),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0xf8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RDI),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%RAX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0xf0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,-0xe8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x58(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RAX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0xe0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,-0xd8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x48(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RAX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0xd0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,-0x98(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x60(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RAX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0xc8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,-0xc0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R14,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %R11,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP $0x2,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV %RBX,-0x148(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R14,-0x188(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
JAE 22f094 <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.omp_outlined+0x204>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV %R11,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 22f9de <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.omp_outlined+0xb4e>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
MOV %RAX,-0x180(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RAX,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x2,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA (%R11,%RCX,1),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %RAX,-0xa8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOVAPD -0x1dd25(%RIP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.50	vect (25.0%)
MOV %RCX,-0x178(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RCX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 22f69c <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.omp_outlined+0x80c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV -0x178(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP %RAX,-0x180(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JNE 22f9de <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.omp_outlined+0xb4e>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
LEA 0x2e835(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV -0xb4(%RBP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CALL 25cd00 <@plt_start@+0x540>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
ADD $0x188,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run orig_0

Source file and lines	accelerate.cpp:40-53
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/accelerate.cpp:40-53
/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:69

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

1% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

20% of SSE/AVX loads are used in vector version.
0% of SSE/AVX stores are used in vector version.
0% of SSE/AVX addition or subtraction instructions are used in vector version.
0% of SSE/AVX multiply instructions are used in vector version.
0% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Performance is limited by:

reading data from caches/RAM (load units are a bottleneck)
writing data to caches/RAM (the store unit is a bottleneck)

By removing all these bottlenecks, you can lower the cost of an iteration from 19.50 to 17.13 cycles (1.14x speedup).

Workaround

Read less array elements
Write less array elements

No data for this section

CALL instructions

Detected function call instructions.

Details

unknown: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/accelerate.cpp:40
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/accelerate.cpp:40

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVL: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/accelerate.cpp:41

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 312 bytes. The binary function is storing 272 bytes.

General properties

nb instructions	137
nb uops	137
loop length	639
used x86 registers	16
used mmx registers	0
used xmm registers	1
used ymm registers	0
used zmm registers	0
nb stack references	44

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	17.13 cycles
front end	17.13 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	6.67	6.67	6.67	6.67	6.67	6.67	19.50	19.50	19.50	19.50	0.00	0.00	0.00	0.00	0.00	0.00
cycles	6.67	6.67	6.67	6.67	6.67	6.67	19.50	19.50	19.50	19.50	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	17.13
Dispatch	19.50
Overall L1	19.50

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	100%
load	100%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	1%
load	20%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

INT

all	11%
load	9%
store	11%
mul	12%
add-sub	7%
fma	NA (no fma vectorizable/vectorized instructions)
other	11%

all	25%
load	25%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	11%
load	12%
store	11%
mul	12%
add-sub	7%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	11%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 19.50 cycles. At this rate:

6% of peak load performance is reached (16.00 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
10% of peak store performance is reached (13.95 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 22ee90

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x188,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV (%RDX),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RCX),%R14D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
MOV %RAX,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
INC %EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
ADD $0x3,%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
MOV %RAX,-0x158(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
SUB %EAX,%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JLE 22f71e <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.omp_outlined+0x88e>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R8),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%R9),%EBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
MOV %RAX,-0x150(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
INC %EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
ADD $0x3,%EBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
CMP %EAX,%EBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JLE 22f71e <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.omp_outlined+0x88e>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV %RAX,-0x30(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
SUB %EAX,%EBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
IMUL %RBX,%R14	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	scal (12.5%)
DEC %R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOVQ $0,-0x170(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV %R14,-0xb0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOVQ $0x1,-0x1b0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOVL $0,-0xb8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA -0x1b0(%RBP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA 0x2f008(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0xb8(%RBP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x170(%RBP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0xb0(%RBP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %ESI,-0xb4(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 25ccf0 <@plt_start@+0x530>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV -0xb0(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP %R14,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
CMOVL %RAX,%R14	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	1	0.33	scal (12.5%)
MOV %R14,-0xb0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV -0x170(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP %R14,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JG 22f70c <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.omp_outlined+0x87c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV 0x50(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x40(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x38(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x30(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x28(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x20(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x18(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%R9),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV %R10,-0x140(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%R9),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %R9,-0x138(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%R8),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %R9,-0x130(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%R8),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %R8,-0x128(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%RSI),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %R8,-0x120(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RSI),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RSI,-0x118(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%RDX),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RSI,-0x110(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RDX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RDX,-0x50(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%RCX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RDX,-0x108(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RCX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0x100(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%RDI),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0xf8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RDI),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0x48(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%RAX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0xf0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,-0xe8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x58(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RAX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0xe0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,-0xd8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x48(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RAX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0xd0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,-0x98(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x60(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RAX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0xc8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,-0xc0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R14,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %R11,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP $0x2,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV %RBX,-0x148(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R14,-0x188(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
JAE 22f094 <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.omp_outlined+0x204>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV %R11,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 22f9de <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.omp_outlined+0xb4e>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
MOV %RAX,-0x180(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RAX,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x2,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA (%R11,%RCX,1),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %RAX,-0xa8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOVAPD -0x1dd25(%RIP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.50	vect (25.0%)
MOV %RCX,-0x178(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RCX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 22f69c <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.omp_outlined+0x80c>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV -0x178(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP %RAX,-0x180(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JNE 22f9de <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.omp_outlined+0xb4e>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
LEA 0x2e835(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV -0xb4(%RBP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CALL 25cd00 <@plt_start@+0x540>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
ADD $0x188,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50	N/A
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼accelerate_kernel(int, int, int, int, double, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D–	5.04	1.97
○Loop 141 - accelerate.cpp:41-53 - exec	5.04	1.96
○Loop 140 - accelerate.cpp:41-53 - exec	0.00	0.00

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