OV - exec - Function PdV_kernel(bool, int, int, int, int, double, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&) [clone .omp

	Function: PdV_kernel(bool, int, int, int, int, double, clover::Buffer2D<double>&, clover::Buffer2D<d ...	Module: exec	Source: PdV.cpp:48-63 [...]	Coverage (incl. loops): 5.27% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/PdV.cpp: 48 - 63

--------------------------------------------------------------------------------

48: #pragma omp parallel for simd collapse(2)

49:     for (int j = (y_min + 1); j < (y_max + 2); j++) {

50:       for (int i = (x_min + 1); i < (x_max + 2); i++) {

51:         double left_flux = (xarea(i, j) * (xvel0(i, j) + xvel0(i + 0, j + 1) + xvel0(i, j) + xvel0(i + 0, j + 1))) * 0.25 * dt * 0.5;

52:         double right_flux =

53:             (xarea(i + 1, j + 0) * (xvel0(i + 1, j + 0) + xvel0(i + 1, j + 1) + xvel0(i + 1, j + 0) + xvel0(i + 1, j + 1))) * 0.25 * dt *

54:             0.5;

55:         double bottom_flux = (yarea(i, j) * (yvel0(i, j) + yvel0(i + 1, j + 0) + yvel0(i, j) + yvel0(i + 1, j + 0))) * 0.25 * dt * 0.5;

56:         double top_flux = (yarea(i + 0, j + 1) * (yvel0(i + 0, j + 1) + yvel0(i + 1, j + 1) + yvel0(i + 0, j + 1) + yvel0(i + 1, j + 1))) *

57:                           0.25 * dt * 0.5;

58:         double total_flux = right_flux - left_flux + top_flux - bottom_flux;

59:         double volume_change_s = volume(i, j) / (volume(i, j) + total_flux);

60:         double recip_volume = 1.0 / volume(i, j);

61:         double energy_change = (pressure(i, j) / density0(i, j) + viscosity(i, j) / density0(i, j)) * total_flux * recip_volume;

62:         energy1(i, j) = energy0(i, j) - energy_change;

63:         density1(i, j) = density0(i, j) * volume_change_s;

/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h: 69 - 69

--------------------------------------------------------------------------------

69:   T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; }

0x245180 PUSH	%RBP

0x245181 MOV	%RSP,%RBP

0x245184 PUSH	%R15

0x245186 PUSH	%R14

0x245188 PUSH	%R13

0x24518a PUSH	%R12

0x24518c PUSH	%RBX

0x24518d SUB	$0x128,%RSP

0x245194 MOV	(%RDX),%EBX

0x245196 MOV	(%RCX),%R14D

0x245199 INC	%EBX

0x24519b ADD	$0x2,%R14D

0x24519f SUB	%EBX,%R14D

0x2451a2 JLE	24584c

0x2451a8 MOV	(%R8),%EAX

0x2451ab MOV	(%R9),%R12D

0x2451ae INC	%EAX

0x2451b0 ADD	$0x2,%R12D

0x2451b4 CMP	%EAX,%R12D

0x2451b7 JLE	24584c

0x2451bd MOV	%EAX,-0x2c(%RBP)

0x2451c0 SUB	%EAX,%R12D

0x2451c3 IMUL	%R12,%R14

0x2451c7 DEC	%R14

0x2451ca MOVQ	$0,-0x108(%RBP)

0x2451d5 MOV	%R14,-0x50(%RBP)

0x2451d9 MOVQ	$0x1,-0x150(%RBP)

0x2451e4 MOVL	$0,-0x58(%RBP)

0x2451eb MOV	(%RDI),%ESI

0x2451ed SUB	$0x8,%RSP

0x2451f1 LEA	-0x150(%RBP),%RAX

0x2451f8 LEA	0x19af1(%RIP),%RDI

0x2451ff LEA	-0x58(%RBP),%RCX

0x245203 LEA	-0x108(%RBP),%R8

0x24520a LEA	-0x50(%RBP),%R9

0x24520e MOV	%ESI,-0x54(%RBP)

0x245211 MOV	$0x22,%EDX

0x245216 PUSH	$0x1

0x245218 PUSH	$0x1

0x24521a PUSH	%RAX

0x24521b CALL	25ccf0 <@plt_start@+0x530>

0x245220 ADD	$0x20,%RSP

0x245224 MOV	-0x50(%RBP),%RAX

0x245228 CMP	%R14,%RAX

0x24522b CMOVL	%RAX,%R14

0x24522f MOV	%R14,-0x50(%RBP)

0x245233 MOV	-0x108(%RBP),%R15

0x24523a CMP	%R14,%R15

0x24523d JG	24583d

0x245243 MOV	0x48(%RBP),%RAX

0x245247 MOV	0x40(%RBP),%RCX

0x24524b MOV	0x38(%RBP),%RDX

0x24524f MOV	0x30(%RBP),%RSI

0x245253 MOV	0x28(%RBP),%RDI

0x245257 MOV	0x18(%RBP),%R8

0x24525b MOV	0x10(%RBP),%R9

0x24525f MOV	(%R9),%R10

0x245262 MOV	0x10(%R9),%R9

0x245266 MOV	(%R8),%R11

0x245269 MOV	0x10(%R8),%R8

0x24526d MOV	%R8,-0x100(%RBP)

0x245274 MOV	(%RDI),%R8

0x245277 MOV	%R8,-0xf8(%RBP)

0x24527e MOV	0x10(%RDI),%RDI

0x245282 MOV	%RDI,-0xf0(%RBP)

0x245289 MOV	(%RSI),%RDI

0x24528c MOV	%RDI,-0xe8(%RBP)

0x245293 MOV	0x10(%RSI),%RSI

0x245297 MOV	%RSI,-0xe0(%RBP)

0x24529e MOV	(%RDX),%RSI

0x2452a1 MOV	%RSI,-0xd8(%RBP)

0x2452a8 MOV	0x10(%RDX),%RDX

0x2452ac MOV	%RDX,-0xd0(%RBP)

0x2452b3 MOV	(%RCX),%RDX

0x2452b6 MOV	%RDX,-0xc8(%RBP)

0x2452bd MOV	0x10(%RCX),%RCX

0x2452c1 MOV	%RCX,-0xc0(%RBP)

0x2452c8 MOV	(%RAX),%RCX

0x2452cb MOV	%RCX,-0xb8(%RBP)

0x2452d2 MOV	0x10(%RAX),%RAX

0x2452d6 MOV	%RAX,-0xb0(%RBP)

0x2452dd MOV	0x50(%RBP),%RAX

0x2452e1 MOV	(%RAX),%RCX

0x2452e4 MOV	%RCX,-0xa8(%RBP)

0x2452eb MOV	0x10(%RAX),%RAX

0x2452ef MOV	%RAX,-0xa0(%RBP)

0x2452f6 MOV	0x60(%RBP),%RAX

0x2452fa MOV	(%RAX),%RCX

0x2452fd MOV	%RCX,-0x98(%RBP)

0x245304 MOV	0x10(%RAX),%RAX

0x245308 MOV	%RAX,-0x90(%RBP)

0x24530f MOV	0x58(%RBP),%RAX

0x245313 MOV	(%RAX),%RCX

0x245316 MOV	%RCX,-0x88(%RBP)

0x24531d MOV	0x10(%RAX),%RAX

0x245321 MOV	%RAX,-0x80(%RBP)

0x245325 MOV	0x68(%RBP),%RAX

0x245329 MOV	(%RAX),%RCX

0x24532c MOV	%RCX,-0x78(%RBP)

0x245330 MOV	0x10(%RAX),%RAX

0x245334 MOV	%RAX,-0x70(%RBP)

0x245338 MOV	%R14,%RAX

0x24533b SUB	%R15,%RAX

0x24533e INC	%RAX

0x245341 CMP	$0x2,%RAX

0x245345 MOV	%R10,-0x38(%RBP)

0x245349 JAE	245353

0x24534b MOV	%R15,%RCX

0x24534e JMP	245aba

0x245353 MOV	%R11,-0x60(%RBP)

0x245357 MOV	%R9,-0x68(%RBP)

0x24535b MOV	%RBX,-0x40(%RBP)

0x24535f MOV	%RAX,-0x118(%RBP)

0x245366 MOV	%RAX,%RCX

0x245369 AND	$-0x2,%RCX

0x24536d LEA	(%R15,%RCX,1),%RAX

0x245371 MOV	%RAX,-0x120(%RBP)

0x245378 MOVAPD	-0x340d0(%RIP),%XMM0

0x245380 MOVAPD	-0x340c8(%RIP),%XMM1

0x245388 MOVAPD	-0x33fa0(%RIP),%XMM2

0x245390 MOV	%RCX,-0x110(%RBP)

0x245397 MOV	%RCX,%RDX

0x24539a MOV	%R14,-0x130(%RBP)

0x2453a1 MOV	%R12,-0x128(%RBP)

0x2453a8 MOV	-0x68(%RBP),%R13

0x2453ac JMP	2457be

0x2453b1 NOPW	%CS:(%RAX,%RAX,1)

(273) 0x2453c0 CQTO

(273) 0x2453c2 IDIV	%R12

(273) 0x2453c5 MOV	%RAX,%RDI

(273) 0x2453c8 LEA	(%RBX,%RSI,1),%ECX

(273) 0x2453cb MOV	%RSI,-0x48(%RBP)

(273) 0x2453cf LEA	(%RBX,%RDI,1),%ESI

(273) 0x2453d2 ADD	%R9D,%R8D

(273) 0x2453d5 ADD	%R9D,%EDX

(273) 0x2453d8 MOVSXD	%R8D,%R14

(273) 0x2453db MOVSXD	%EDX,%R11

(273) 0x2453de MOVSXD	%ECX,%RAX

(273) 0x2453e1 MOVSXD	%ESI,%R8

(273) 0x2453e4 MOV	%R10,%R12

(273) 0x2453e7 IMUL	%RAX,%R12

(273) 0x2453eb MOV	%RAX,-0x138(%RBP)

(273) 0x2453f2 MOV	%R10,%R9

(273) 0x2453f5 IMUL	%R8,%R9

(273) 0x2453f9 LEA	(%R12,%R14,1),%RCX

(273) 0x2453fd LEA	(%R9,%R11,1),%RSI

(273) 0x245401 MOVSD	(%R13,%RCX,8),%XMM3

(273) 0x245408 MOVHPD	(%R13,%RSI,8),%XMM3

(273) 0x24540f MOV	-0x60(%RBP),%R15

(273) 0x245413 MOV	%R15,%RDX

(273) 0x245416 IMUL	%RAX,%RDX

(273) 0x24541a MOV	%R15,%R10

(273) 0x24541d IMUL	%R8,%R10

(273) 0x245421 LEA	(%RDX,%R14,1),%RCX

(273) 0x245425 LEA	(%R10,%R11,1),%RSI

(273) 0x245429 MOV	-0x100(%RBP),%RAX

(273) 0x245430 MOVSD	(%RAX,%RCX,8),%XMM4

(273) 0x245435 MOVHPD	(%RAX,%RSI,8),%XMM4

(273) 0x24543a MOV	-0x48(%RBP),%RCX

(273) 0x24543e LEA	0x1(%RBX,%RCX,1),%ECX

(273) 0x245442 LEA	0x1(%RBX,%RDI,1),%ESI

(273) 0x245446 MOVSXD	%ECX,%RBX

(273) 0x245449 MOV	%RBX,-0x48(%RBP)

(273) 0x24544d MOVSXD	%ESI,%RDI

(273) 0x245450 MOV	%R15,%RCX

(273) 0x245453 IMUL	%RBX,%RCX

(273) 0x245457 IMUL	%RDI,%R15

(273) 0x24545b LEA	(%RCX,%R14,1),%RBX

(273) 0x24545f MOVSD	(%RAX,%RBX,8),%XMM5

(273) 0x245464 LEA	(%R15,%R11,1),%RBX

(273) 0x245468 MOVHPD	(%RAX,%RBX,8),%XMM5

(273) 0x24546d LEA	0x1(%R12,%R14,1),%RBX

(273) 0x245472 MOVSD	(%R13,%RBX,8),%XMM6

(273) 0x245479 LEA	0x1(%R9,%R11,1),%R9

(273) 0x24547e MOVHPD	(%R13,%R9,8),%XMM6

(273) 0x245485 LEA	0x1(%RDX,%R14,1),%R9

(273) 0x24548a MOVSD	(%RAX,%R9,8),%XMM7

(273) 0x245490 LEA	0x1(%R10,%R11,1),%R9

(273) 0x245495 MOVHPD	(%RAX,%R9,8),%XMM7

(273) 0x24549b LEA	0x1(%RCX,%R14,1),%RCX

(273) 0x2454a0 LEA	0x1(%R15,%R11,1),%RSI

(273) 0x2454a5 MOVSD	(%RAX,%RCX,8),%XMM8

(273) 0x2454ab MOVHPD	(%RAX,%RSI,8),%XMM8

(273) 0x2454b1 MOV	-0xf8(%RBP),%RAX

(273) 0x2454b8 MOV	%RAX,%RCX

(273) 0x2454bb MOV	-0x138(%RBP),%R15

(273) 0x2454c2 IMUL	%R15,%RCX

(273) 0x2454c6 MOV	%RAX,%RSI

(273) 0x2454c9 IMUL	%R8,%RSI

(273) 0x2454cd ADD	%R14,%RCX

(273) 0x2454d0 ADD	%R11,%RSI

(273) 0x2454d3 MOV	-0xf0(%RBP),%RDX

(273) 0x2454da MOVSD	(%RDX,%RCX,8),%XMM9

(273) 0x2454e0 MOVHPD	(%RDX,%RSI,8),%XMM9

(273) 0x2454e6 MOV	-0xe8(%RBP),%R10

(273) 0x2454ed MOV	%R10,%RCX

(273) 0x2454f0 IMUL	%R15,%RCX

(273) 0x2454f4 MOV	%R10,%RSI

(273) 0x2454f7 IMUL	%R8,%RSI

(273) 0x2454fb LEA	(%RCX,%R14,1),%R9

(273) 0x2454ff MOV	-0xe0(%RBP),%RBX

(273) 0x245506 MOVSD	(%RBX,%R9,8),%XMM10

(273) 0x24550c LEA	(%RSI,%R11,1),%R9

(273) 0x245510 MOVHPD	(%RBX,%R9,8),%XMM10

(273) 0x245516 LEA	0x1(%RCX,%R14,1),%RCX

(273) 0x24551b MOVSD	(%RBX,%RCX,8),%XMM11

(273) 0x245521 MOVAPD	%XMM4,%XMM12

(273) 0x245526 ADDPD	%XMM5,%XMM12

(273) 0x24552b ADDPD	%XMM4,%XMM12

(273) 0x245530 ADDPD	%XMM5,%XMM12

(273) 0x245535 MULPD	%XMM3,%XMM12

(273) 0x24553a MOVAPD	%XMM7,%XMM4

(273) 0x24553e ADDPD	%XMM8,%XMM4

(273) 0x245543 ADDPD	%XMM7,%XMM4

(273) 0x245547 MULPD	%XMM0,%XMM12

(273) 0x24554c ADDPD	%XMM8,%XMM4

(273) 0x245551 MOV	0x20(%RBP),%RCX

(273) 0x245555 MOVSD	(%RCX),%XMM7

(273) 0x245559 UNPCKLPD	%XMM7,%XMM7

(273) 0x24555d MULPD	%XMM7,%XMM12

(273) 0x245562 MULPD	%XMM1,%XMM12

(273) 0x245567 MULPD	%XMM6,%XMM4

(273) 0x24556b MULPD	%XMM0,%XMM4

(273) 0x24556f MULPD	%XMM7,%XMM4

(273) 0x245573 MULPD	%XMM1,%XMM4

(273) 0x245577 LEA	0x1(%RSI,%R11,1),%RCX

(273) 0x24557c MOVHPD	(%RBX,%RCX,8),%XMM11

(273) 0x245582 SUBPD	%XMM12,%XMM4

(273) 0x245587 MOVAPD	%XMM10,%XMM5

(273) 0x24558c ADDPD	%XMM11,%XMM5

(273) 0x245591 ADDPD	%XMM10,%XMM5

(273) 0x245596 ADDPD	%XMM11,%XMM5

(273) 0x24559b MULPD	%XMM9,%XMM5

(273) 0x2455a0 MULPD	%XMM0,%XMM5

(273) 0x2455a4 MOV	%RAX,%RCX

(273) 0x2455a7 MOV	-0x48(%RBP),%RSI

(273) 0x2455ab IMUL	%RSI,%RCX

(273) 0x2455af ADD	%R14,%RCX

(273) 0x2455b2 MOVSD	(%RDX,%RCX,8),%XMM6

(273) 0x2455b7 MOV	%RAX,%RCX

(273) 0x2455ba IMUL	%RDI,%RCX

(273) 0x2455be ADD	%R11,%RCX

(273) 0x2455c1 MOVHPD	(%RDX,%RCX,8),%XMM6

(273) 0x2455c6 MULPD	%XMM7,%XMM5

(273) 0x2455ca IMUL	%R10,%RSI

(273) 0x2455ce IMUL	%R10,%RDI

(273) 0x2455d2 LEA	(%RSI,%R14,1),%RCX

(273) 0x2455d6 MOVSD	(%RBX,%RCX,8),%XMM8

(273) 0x2455dc LEA	(%RDI,%R11,1),%RCX

(273) 0x2455e0 MOVHPD	(%RBX,%RCX,8),%XMM8

(273) 0x2455e6 MULPD	%XMM1,%XMM5

(273) 0x2455ea LEA	0x1(%RSI,%R14,1),%RAX

(273) 0x2455ef LEA	0x1(%RDI,%R11,1),%RCX

(273) 0x2455f4 MOVSD	(%RBX,%RAX,8),%XMM9

(273) 0x2455fa MOVHPD	(%RBX,%RCX,8),%XMM9

(273) 0x245600 MOVAPD	%XMM8,%XMM3

(273) 0x245605 ADDPD	%XMM9,%XMM3

(273) 0x24560a ADDPD	%XMM8,%XMM3

(273) 0x24560f ADDPD	%XMM9,%XMM3

(273) 0x245614 MULPD	%XMM6,%XMM3

(273) 0x245618 MULPD	%XMM0,%XMM3

(273) 0x24561c MULPD	%XMM7,%XMM3

(273) 0x245620 MULPD	%XMM1,%XMM3

(273) 0x245624 ADDPD	%XMM4,%XMM3

(273) 0x245628 MOV	-0xd8(%RBP),%RCX

(273) 0x24562f MOV	%RCX,%RAX

(273) 0x245632 IMUL	%R15,%RAX

(273) 0x245636 IMUL	%R8,%RCX

(273) 0x24563a ADD	%R14,%RAX

(273) 0x24563d ADD	%R11,%RCX

(273) 0x245640 MOV	-0xd0(%RBP),%RDX

(273) 0x245647 MOVSD	(%RDX,%RAX,8),%XMM4

(273) 0x24564c MOVHPD	(%RDX,%RCX,8),%XMM4

(273) 0x245651 SUBPD	%XMM5,%XMM3

(273) 0x245655 MOVAPD	%XMM2,%XMM5

(273) 0x245659 MOV	-0xc8(%RBP),%RCX

(273) 0x245660 MOV	%RCX,%RAX

(273) 0x245663 IMUL	%R15,%RAX

(273) 0x245667 IMUL	%R8,%RCX

(273) 0x24566b ADD	%R14,%RAX

(273) 0x24566e ADD	%R11,%RCX

(273) 0x245671 MOV	-0xc0(%RBP),%RDX

(273) 0x245678 MOVSD	(%RDX,%RAX,8),%XMM6

(273) 0x24567d MOVHPD	(%RDX,%RCX,8),%XMM6

(273) 0x245682 MOV	-0xb8(%RBP),%RDI

(273) 0x245689 MOV	%RDI,%RAX

(273) 0x24568c IMUL	%R15,%RAX

(273) 0x245690 IMUL	%R8,%RDI

(273) 0x245694 ADD	%R14,%RAX

(273) 0x245697 ADD	%R11,%RDI

(273) 0x24569a MOV	-0xb0(%RBP),%RDX

(273) 0x2456a1 MOVSD	(%RDX,%RAX,8),%XMM7

(273) 0x2456a6 MOVHPD	(%RDX,%RDI,8),%XMM7

(273) 0x2456ab DIVPD	%XMM4,%XMM5

(273) 0x2456af DIVPD	%XMM7,%XMM6

(273) 0x2456b3 MOV	-0xa8(%RBP),%RSI

(273) 0x2456ba MOV	%RSI,%RCX

(273) 0x2456bd IMUL	%R15,%RCX

(273) 0x2456c1 ADD	%R14,%RCX

(273) 0x2456c4 MOV	-0xa0(%RBP),%R9

(273) 0x2456cb MOVSD	(%R9,%RCX,8),%XMM8

(273) 0x2456d1 MOV	%RSI,%RCX

(273) 0x2456d4 IMUL	%R8,%RCX

(273) 0x2456d8 ADD	%R11,%RCX

(273) 0x2456db MOVHPD	(%R9,%RCX,8),%XMM8

(273) 0x2456e1 DIVPD	%XMM7,%XMM8

(273) 0x2456e6 ADDPD	%XMM6,%XMM8

(273) 0x2456eb MULPD	%XMM3,%XMM8

(273) 0x2456f0 MULPD	%XMM5,%XMM8

(273) 0x2456f5 MOV	-0x98(%RBP),%RSI

(273) 0x2456fc MOV	%RSI,%RCX

(273) 0x2456ff IMUL	%R15,%RCX

(273) 0x245703 ADD	%R14,%RCX

(273) 0x245706 MOV	-0x90(%RBP),%R9

(273) 0x24570d MOVSD	(%R9,%RCX,8),%XMM5

(273) 0x245713 MOV	%RSI,%RCX

(273) 0x245716 IMUL	%R8,%RCX

(273) 0x24571a ADD	%R11,%RCX

(273) 0x24571d MOVHPD	(%R9,%RCX,8),%XMM5

(273) 0x245723 ADDPD	%XMM8,%XMM5

(273) 0x245728 MOV	-0x88(%RBP),%RSI

(273) 0x24572f MOV	%RSI,%RCX

(273) 0x245732 IMUL	%R15,%RCX

(273) 0x245736 ADD	%R14,%RCX

(273) 0x245739 MOV	-0x80(%RBP),%R9

(273) 0x24573d MOVLPD	%XMM5,(%R9,%RCX,8)

(273) 0x245743 MOV	%RSI,%RCX

(273) 0x245746 IMUL	%R8,%RCX

(273) 0x24574a ADD	%R11,%RCX

(273) 0x24574d MOVHPD	%XMM5,(%R9,%RCX,8)

(273) 0x245753 MOVSD	(%RDX,%RAX,8),%XMM5

(273) 0x245758 MOVHPD	(%RDX,%RDI,8),%XMM5

(273) 0x24575d MOV	-0x78(%RBP),%RAX

(273) 0x245761 MOV	%R15,%RCX

(273) 0x245764 IMUL	%RAX,%RCX

(273) 0x245768 ADD	%R14,%RCX

(273) 0x24576b IMUL	%RAX,%R8

(273) 0x24576f ADD	%R11,%R8

(273) 0x245772 MOVAPD	%XMM4,%XMM6

(273) 0x245776 ADDPD	%XMM3,%XMM6

(273) 0x24577a DIVPD	%XMM6,%XMM4

(273) 0x24577e MULPD	%XMM4,%XMM5

(273) 0x245782 MOV	-0x70(%RBP),%RAX

(273) 0x245786 MOVLPD	%XMM5,(%RAX,%RCX,8)

(273) 0x24578b MOVHPD	%XMM5,(%RAX,%R8,8)

(273) 0x245791 MOV	-0x148(%RBP),%R15

(273) 0x245798 ADD	$0x2,%R15

(273) 0x24579c MOV	-0x140(%RBP),%RDX

(273) 0x2457a3 ADD	$-0x2,%RDX

(273) 0x2457a7 MOV	-0x130(%RBP),%R14

(273) 0x2457ae MOV	-0x128(%RBP),%R12

(273) 0x2457b5 MOV	-0x120(%RBP),%RCX

(273) 0x2457bc JE	24581d

(273) 0x2457be MOV	%R15,%RAX

(273) 0x2457c1 SHR	$0x20,%RAX

(273) 0x2457c5 MOV	%RDX,-0x140(%RBP)

(273) 0x2457cc JE	2457e0

(273) 0x2457ce MOV	%R15,%RAX

(273) 0x2457d1 CQTO

(273) 0x2457d3 IDIV	%R12

(273) 0x2457d6 MOV	%RDX,%R8

(273) 0x2457d9 MOV	%RAX,%RSI

(273) 0x2457dc JMP	2457ed

0x2457de XCHG	%AX,%AX

(273) 0x2457e0 MOV	%R15D,%EAX

(273) 0x2457e3 XOR	%EDX,%EDX

(273) 0x2457e5 DIV	%R12D

(273) 0x2457e8 MOV	%EDX,%R8D

(273) 0x2457eb MOV	%EAX,%ESI

(273) 0x2457ed MOV	-0x40(%RBP),%RBX

(273) 0x2457f1 MOV	-0x2c(%RBP),%R9D

(273) 0x2457f5 MOV	-0x38(%RBP),%R10

(273) 0x2457f9 LEA	0x1(%R15),%RAX

(273) 0x2457fd MOV	%RAX,%RCX

(273) 0x245800 SHR	$0x20,%RCX

(273) 0x245804 MOV	%R15,-0x148(%RBP)

(273) 0x24580b JNE	2453c0

(273) 0x245811 XOR	%EDX,%EDX

(273) 0x245813 DIV	%R12D

(273) 0x245816 MOV	%EAX,%EDI

(273) 0x245818 JMP	2453c8

0x24581d MOV	-0x110(%RBP),%RAX

0x245824 CMP	%RAX,-0x118(%RBP)

0x24582b MOV	-0x40(%RBP),%RBX

0x24582f MOV	-0x68(%RBP),%R9

0x245833 MOV	-0x60(%RBP),%R11

0x245837 JNE	245aba

0x24583d LEA	0x194c4(%RIP),%RDI

0x245844 MOV	-0x54(%RBP),%ESI

0x245847 CALL	25cd00 <@plt_start@+0x540>

0x24584c ADD	$0x128,%RSP

0x245853 POP	%RBX

0x245854 POP	%R12

0x245856 POP	%R13

0x245858 POP	%R14

0x24585a POP	%R15

0x24585c POP	%RBP

0x24585d RET

0x24585e XCHG	%AX,%AX

(272) 0x245860 MOV	%RCX,%RAX

(272) 0x245863 CQTO

(272) 0x245865 IDIV	%R12

(272) 0x245868 MOV	%RCX,%R15

(272) 0x24586b MOV	-0x2c(%RBP),%ESI

(272) 0x24586e MOV	-0x38(%RBP),%RDI

(272) 0x245872 LEA	(%RBX,%RAX,1),%ECX

(272) 0x245875 ADD	%ESI,%EDX

(272) 0x245877 MOVSXD	%EDX,%RDX

(272) 0x24587a MOVSXD	%ECX,%RSI

(272) 0x24587d MOV	%RDI,%RCX

(272) 0x245880 IMUL	%RSI,%RCX

(272) 0x245884 MOV	%R11,%RDI

(272) 0x245887 IMUL	%RSI,%RDI

(272) 0x24588b ADD	%EBX,%EAX

(272) 0x24588d INC	%EAX

(272) 0x24588f CLTQ

(272) 0x245891 LEA	0x1(%RDI,%RDX,1),%R8

(272) 0x245896 MOV	-0x100(%RBP),%R13

(272) 0x24589d MOVSD	(%R13,%R8,8),%XMM1

(272) 0x2458a4 MOV	%R11,%R8

(272) 0x2458a7 IMUL	%RAX,%R8

(272) 0x2458ab ADD	%RDX,%RDI

(272) 0x2458ae MOVHPD	(%R13,%RDI,8),%XMM1

(272) 0x2458b5 LEA	(%R8,%RDX,1),%RDI

(272) 0x2458b9 INC	%RDI

(272) 0x2458bc MOVSD	(%R13,%RDI,8),%XMM2

(272) 0x2458c3 LEA	(%RCX,%RDX,1),%RDI

(272) 0x2458c7 INC	%RDI

(272) 0x2458ca ADD	%RDX,%R8

(272) 0x2458cd MOVHPD	(%R13,%R8,8),%XMM2

(272) 0x2458d4 ADD	%RDX,%RCX

(272) 0x2458d7 MOVSD	(%R9,%RDI,8),%XMM0

(272) 0x2458dd MOVHPD	(%R9,%RCX,8),%XMM0

(272) 0x2458e3 MOV	-0xe8(%RBP),%R8

(272) 0x2458ea MOV	%R8,%RCX

(272) 0x2458ed IMUL	%RSI,%RCX

(272) 0x2458f1 MOV	-0xf8(%RBP),%R13

(272) 0x2458f8 MOV	%R13,%RDI

(272) 0x2458fb IMUL	%RAX,%RDI

(272) 0x2458ff IMUL	%R8,%RAX

(272) 0x245903 LEA	(%RAX,%RDX,1),%R8

(272) 0x245907 INC	%R8

(272) 0x24590a ADD	%RDX,%RAX

(272) 0x24590d MOV	-0xe0(%RBP),%R10

(272) 0x245914 MOVSD	(%R10,%RAX,8),%XMM3

(272) 0x24591a LEA	(%RCX,%RDX,1),%RAX

(272) 0x24591e INC	%RAX

(272) 0x245921 ADD	%RDX,%RCX

(272) 0x245924 MOVHPD	(%R10,%RCX,8),%XMM3

(272) 0x24592a MOVSD	(%R10,%R8,8),%XMM4

(272) 0x245930 MOVAPD	%XMM1,%XMM5

(272) 0x245934 ADDPD	%XMM2,%XMM5

(272) 0x245938 ADDPD	%XMM1,%XMM5

(272) 0x24593c ADDPD	%XMM2,%XMM5

(272) 0x245940 MULPD	%XMM5,%XMM0

(272) 0x245944 MOVAPD	-0x3469c(%RIP),%XMM1

(272) 0x24594c MULPD	%XMM1,%XMM0

(272) 0x245950 MOV	0x20(%RBP),%RCX

(272) 0x245954 MOVSD	(%RCX),%XMM2

(272) 0x245958 UNPCKLPD	%XMM2,%XMM2

(272) 0x24595c MULPD	%XMM2,%XMM0

(272) 0x245960 MOVAPD	-0x346a8(%RIP),%XMM5

(272) 0x245968 MULPD	%XMM5,%XMM0

(272) 0x24596c MOVHPD	(%R10,%RAX,8),%XMM4

(272) 0x245972 MOV	%R13,%RAX

(272) 0x245975 IMUL	%RSI,%RAX

(272) 0x245979 ADD	%RDX,%RAX

(272) 0x24597c ADD	%RDX,%RDI

(272) 0x24597f MOVAPD	%XMM3,%XMM6

(272) 0x245983 ADDPD	%XMM4,%XMM6

(272) 0x245987 ADDPD	%XMM3,%XMM6

(272) 0x24598b ADDPD	%XMM4,%XMM6

(272) 0x24598f MOV	-0xf0(%RBP),%RCX

(272) 0x245996 MOVSD	(%RCX,%RDI,8),%XMM3

(272) 0x24599b MOVHPD	(%RCX,%RAX,8),%XMM3

(272) 0x2459a0 MULPD	%XMM6,%XMM3

(272) 0x2459a4 MULPD	%XMM1,%XMM3

(272) 0x2459a8 MULPD	%XMM2,%XMM3

(272) 0x2459ac MULPD	%XMM5,%XMM3

(272) 0x2459b0 MOVAPD	%XMM0,%XMM1

(272) 0x2459b4 UNPCKHPD	%XMM0,%XMM1

(272) 0x2459b8 SUBSD	%XMM1,%XMM0

(272) 0x2459bc ADDSD	%XMM3,%XMM0

(272) 0x2459c0 UNPCKHPD	%XMM3,%XMM3

(272) 0x2459c4 SUBSD	%XMM3,%XMM0

(272) 0x2459c8 MOV	-0xd8(%RBP),%RAX

(272) 0x2459cf IMUL	%RSI,%RAX

(272) 0x2459d3 ADD	%RDX,%RAX

(272) 0x2459d6 MOV	-0xd0(%RBP),%RCX

(272) 0x2459dd MOVSD	(%RCX,%RAX,8),%XMM1

(272) 0x2459e2 MOVSD	-0x34922(%RIP),%XMM2

(272) 0x2459ea DIVSD	%XMM1,%XMM2

(272) 0x2459ee MOV	-0xc8(%RBP),%RCX

(272) 0x2459f5 IMUL	%RSI,%RCX

(272) 0x2459f9 ADD	%RDX,%RCX

(272) 0x2459fc MOV	-0xb8(%RBP),%RAX

(272) 0x245a03 IMUL	%RSI,%RAX

(272) 0x245a07 ADD	%RDX,%RAX

(272) 0x245a0a MOV	-0xc0(%RBP),%RDI

(272) 0x245a11 MOVSD	(%RDI,%RCX,8),%XMM3

(272) 0x245a16 MOV	-0xa8(%RBP),%RCX

(272) 0x245a1d IMUL	%RSI,%RCX

(272) 0x245a21 ADD	%RDX,%RCX

(272) 0x245a24 MOV	-0xa0(%RBP),%RDI

(272) 0x245a2b MOVHPD	(%RDI,%RCX,8),%XMM3

(272) 0x245a30 MOV	-0xb0(%RBP),%RDI

(272) 0x245a37 MOVSD	(%RDI,%RAX,8),%XMM4

(272) 0x245a3c UNPCKLPD	%XMM4,%XMM4

(272) 0x245a40 DIVPD	%XMM4,%XMM3

(272) 0x245a44 MOVAPD	%XMM3,%XMM4

(272) 0x245a48 UNPCKHPD	%XMM3,%XMM4

(272) 0x245a4c ADDSD	%XMM3,%XMM4

(272) 0x245a50 MULSD	%XMM0,%XMM4

(272) 0x245a54 MULSD	%XMM2,%XMM4

(272) 0x245a58 MOV	-0x98(%RBP),%RCX

(272) 0x245a5f IMUL	%RSI,%RCX

(272) 0x245a63 ADD	%RDX,%RCX

(272) 0x245a66 MOV	-0x90(%RBP),%R8

(272) 0x245a6d ADDSD	(%R8,%RCX,8),%XMM4

(272) 0x245a73 MOV	-0x88(%RBP),%RCX

(272) 0x245a7a IMUL	%RSI,%RCX

(272) 0x245a7e ADD	%RDX,%RCX

(272) 0x245a81 MOV	-0x80(%RBP),%R8

(272) 0x245a85 MOVSD	%XMM4,(%R8,%RCX,8)

(272) 0x245a8b MOVAPD	%XMM1,%XMM2

(272) 0x245a8f ADDSD	%XMM0,%XMM2

(272) 0x245a93 DIVSD	%XMM2,%XMM1

(272) 0x245a97 MULSD	(%RDI,%RAX,8),%XMM1

(272) 0x245a9c IMUL	-0x78(%RBP),%RSI

(272) 0x245aa1 ADD	%RDX,%RSI

(272) 0x245aa4 MOV	-0x70(%RBP),%RAX

(272) 0x245aa8 MOVSD	%XMM1,(%RAX,%RSI,8)

(272) 0x245aad CMP	%R14,%R15

(272) 0x245ab0 LEA	0x1(%R15),%RCX

(272) 0x245ab4 JGE	24583d

(272) 0x245aba MOV	%RCX,%RAX

(272) 0x245abd SHR	$0x20,%RAX

(272) 0x245ac1 JNE	245860

(272) 0x245ac7 MOV	%ECX,%EAX

(272) 0x245ac9 XOR	%EDX,%EDX

(272) 0x245acb DIV	%R12D

(272) 0x245ace JMP	245868

0x245ad3 NOPW	%CS:(%RAX,%RAX,1)

Coverage (%)	Name	Source Location	Module

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run orig_0

Source file and lines	PdV.cpp:48-63
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/PdV.cpp:48-63
/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:69

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 21.75 to 1.67 cycles (13.05x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is not vectorized. Only 11% of vector register length is used (average across all SSE/AVX instructions). By fully vectorizing your function, you can lower the cost of an iteration from 21.75 to 2.06 cycles (10.55x speedup).

Details

5% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

25% of SSE/AVX loads are used in vector version.
0% of SSE/AVX stores are used in vector version.
0% of SSE/AVX addition or subtraction instructions are used in vector version.
0% of SSE/AVX multiply instructions are used in vector version.
0% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Performance is limited by:

reading data from caches/RAM (load units are a bottleneck)
writing data to caches/RAM (the store unit is a bottleneck)

By removing all these bottlenecks, you can lower the cost of an iteration from 21.75 to 18.25 cycles (1.19x speedup).

Workaround

Read less array elements
Write less array elements

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

unknown: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/PdV.cpp:48
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/PdV.cpp:48

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVL: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/PdV.cpp:49

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 400 bytes. The binary function is storing 268 bytes.

General properties

nb instructions	147
nb uops	146
loop length	658
used x86 registers	16
used mmx registers	0
used xmm registers	3
used ymm registers	0
used zmm registers	0
nb stack references	45

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	18.25 cycles
front end	18.25 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	6.67	6.67	6.67	6.67	6.67	6.67	21.75	21.75	21.75	21.75	0.00	0.00	0.00	0.00	0.00	0.00
cycles	6.67	6.67	6.67	6.67	6.67	6.67	21.75	21.75	21.75	21.75	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	18.25
Dispatch	21.75
Overall L1	21.75

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	100%
load	100%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	5%
load	25%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

INT

all	10%
load	10%
store	11%
mul	12%
add-sub	7%
fma	NA (no fma vectorizable/vectorized instructions)
other	11%

all	25%
load	25%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	11%
load	14%
store	11%
mul	12%
add-sub	7%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	11%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 21.75 cycles. At this rate:

7% of peak load performance is reached (18.39 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
9% of peak store performance is reached (12.32 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 245180

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x128,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV (%RDX),%EBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
MOV (%RCX),%R14D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
INC %EBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
ADD $0x2,%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
SUB %EBX,%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JLE 24584c <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.omp_outlined+0x6cc>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R8),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%R9),%R12D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
INC %EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
ADD $0x2,%R12D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
CMP %EAX,%R12D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JLE 24584c <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.omp_outlined+0x6cc>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV %EAX,-0x2c(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
SUB %EAX,%R12D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
IMUL %R12,%R14	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	scal (12.5%)
DEC %R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOVQ $0,-0x108(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV %R14,-0x50(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOVQ $0x1,-0x150(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOVL $0,-0x58(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA -0x150(%RBP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA 0x19af1(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x58(%RBP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x108(%RBP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x50(%RBP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %ESI,-0x54(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 25ccf0 <@plt_start@+0x530>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV -0x50(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP %R14,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
CMOVL %RAX,%R14	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	1	0.33	scal (12.5%)
MOV %R14,-0x50(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV -0x108(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP %R14,%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JG 24583d <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.omp_outlined+0x6bd>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV 0x48(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x40(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x38(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x30(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x28(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x18(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x10(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%R9),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV 0x10(%R9),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%R8),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV 0x10(%R8),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %R8,-0x100(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%RDI),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %R8,-0xf8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RDI),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RDI,-0xf0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%RSI),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RDI,-0xe8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RSI),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RSI,-0xe0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%RDX),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RSI,-0xd8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RDX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RDX,-0xd0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%RCX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RDX,-0xc8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RCX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0xc0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%RAX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0xb8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,-0xb0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x50(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RAX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0xa8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,-0xa0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x60(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RAX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0x98(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x58(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RAX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0x88(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,-0x80(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x68(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RAX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0x78(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,-0x70(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R14,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %R15,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP $0x2,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV %R10,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
JAE 245353 <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.omp_outlined+0x1d3>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV %R15,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 245aba <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.omp_outlined+0x93a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
MOV %R11,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R9,-0x68(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RBX,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RAX,-0x118(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RAX,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x2,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA (%R15,%RCX,1),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %RAX,-0x120(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOVAPD -0x340d0(%RIP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.50	vect (25.0%)
MOVAPD -0x340c8(%RIP),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.50	vect (25.0%)
MOVAPD -0x33fa0(%RIP),%XMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.50	vect (25.0%)
MOV %RCX,-0x110(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RCX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R14,-0x130(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R12,-0x128(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV -0x68(%RBP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
JMP 2457be <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.omp_outlined+0x63e>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV -0x110(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP %RAX,-0x118(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
MOV -0x40(%RBP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV -0x68(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV -0x60(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
JNE 245aba <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.omp_outlined+0x93a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
LEA 0x194c4(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV -0x54(%RBP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CALL 25cd00 <@plt_start@+0x540>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
ADD $0x128,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run orig_0

Source file and lines	PdV.cpp:48-63
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/PdV.cpp:48-63
/home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:69

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

5% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

25% of SSE/AVX loads are used in vector version.
0% of SSE/AVX stores are used in vector version.
0% of SSE/AVX addition or subtraction instructions are used in vector version.
0% of SSE/AVX multiply instructions are used in vector version.
0% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Performance is limited by:

reading data from caches/RAM (load units are a bottleneck)
writing data to caches/RAM (the store unit is a bottleneck)

By removing all these bottlenecks, you can lower the cost of an iteration from 21.75 to 18.25 cycles (1.19x speedup).

Workaround

Read less array elements
Write less array elements

No data for this section

CALL instructions

Detected function call instructions.

Details

unknown: 2 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/PdV.cpp:48
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/PdV.cpp:48

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

CMOVL: 1 occurrences►
- /home/eoseret/qaas_runs_ZEN5/173-937-4090/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/PdV.cpp:49

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 400 bytes. The binary function is storing 268 bytes.

General properties

nb instructions	147
nb uops	146
loop length	658
used x86 registers	16
used mmx registers	0
used xmm registers	3
used ymm registers	0
used zmm registers	0
nb stack references	45

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	18.25 cycles
front end	18.25 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	6.67	6.67	6.67	6.67	6.67	6.67	21.75	21.75	21.75	21.75	0.00	0.00	0.00	0.00	0.00	0.00
cycles	6.67	6.67	6.67	6.67	6.67	6.67	21.75	21.75	21.75	21.75	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	18.25
Dispatch	21.75
Overall L1	21.75

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	100%
load	100%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	5%
load	25%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

INT

all	10%
load	10%
store	11%
mul	12%
add-sub	7%
fma	NA (no fma vectorizable/vectorized instructions)
other	11%

all	25%
load	25%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	11%
load	14%
store	11%
mul	12%
add-sub	7%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	11%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 21.75 cycles. At this rate:

7% of peak load performance is reached (18.39 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
9% of peak store performance is reached (12.32 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 245180

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB $0x128,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV (%RDX),%EBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
MOV (%RCX),%R14D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
INC %EBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
ADD $0x2,%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
SUB %EBX,%R14D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JLE 24584c <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.omp_outlined+0x6cc>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R8),%EAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%R9),%R12D	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (6.3%)
INC %EAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
ADD $0x2,%R12D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
CMP %EAX,%R12D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
JLE 24584c <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.omp_outlined+0x6cc>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV %EAX,-0x2c(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
SUB %EAX,%R12D	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (6.3%)
IMUL %R12,%R14	1	0.33	0.33	0.33	0	0	0	0	0	0	0	3	0.33	scal (12.5%)
DEC %R14	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOVQ $0,-0x108(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV %R14,-0x50(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOVQ $0x1,-0x150(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOVL $0,-0x58(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV (%RDI),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
SUB $0x8,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA -0x150(%RBP),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA 0x19af1(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x58(%RBP),%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x108(%RBP),%R8	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA -0x50(%RBP),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %ESI,-0x54(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CALL 25ccf0 <@plt_start@+0x530>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
ADD $0x20,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV -0x50(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP %R14,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
CMOVL %RAX,%R14	2	0.33	0.33	0.33	0.33	0.33	0.33	0	0	0	0	1	0.33	scal (12.5%)
MOV %R14,-0x50(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV -0x108(%RBP),%R15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP %R14,%R15	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JG 24583d <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.omp_outlined+0x6bd>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV 0x48(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x40(%RBP),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x38(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x30(%RBP),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x28(%RBP),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x18(%RBP),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV 0x10(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%R9),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV 0x10(%R9),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%R8),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV 0x10(%R8),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %R8,-0x100(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%RDI),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %R8,-0xf8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RDI),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RDI,-0xf0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%RSI),%RDI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RDI,-0xe8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RSI),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RSI,-0xe0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%RDX),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RSI,-0xd8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RDX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RDX,-0xd0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%RCX),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RDX,-0xc8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RCX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0xc0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV (%RAX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0xb8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,-0xb0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x50(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RAX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0xa8(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,-0xa0(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x60(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RAX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0x98(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,-0x90(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x58(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RAX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0x88(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,-0x80(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x68(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RAX),%RCX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RCX,-0x78(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV 0x10(%RAX),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RAX,-0x70(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R14,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %R15,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP $0x2,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
MOV %R10,-0x38(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
JAE 245353 <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.omp_outlined+0x1d3>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV %R15,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
JMP 245aba <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.omp_outlined+0x93a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
MOV %R11,-0x60(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R9,-0x68(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RBX,-0x40(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RAX,-0x118(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RAX,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
AND $-0x2,%RCX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
LEA (%R15,%RCX,1),%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV %RAX,-0x120(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOVAPD -0x340d0(%RIP),%XMM0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.50	vect (25.0%)
MOVAPD -0x340c8(%RIP),%XMM1	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.50	vect (25.0%)
MOVAPD -0x33fa0(%RIP),%XMM2	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.50	vect (25.0%)
MOV %RCX,-0x110(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RCX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R14,-0x130(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %R12,-0x128(%RBP)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV -0x68(%RBP),%R13	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
JMP 2457be <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.omp_outlined+0x63e>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
MOV -0x110(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP %RAX,-0x118(%RBP)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
MOV -0x40(%RBP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
MOV -0x68(%RBP),%R9	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV -0x60(%RBP),%R11	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	scal (12.5%)
JNE 245aba <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.omp_outlined+0x93a>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
LEA 0x194c4(%RIP),%RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV -0x54(%RBP),%ESI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CALL 25cd00 <@plt_start@+0x540>	2	0	0	0	0.33	0.33	0.33	0.25	0.25	0.25	0.25	0	0.50	N/A
ADD $0x128,%RSP	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R12	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R13	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R14	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %R15	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	1	0.33	N/A
RET	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50	N/A
XCHG %AX,%AX	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0.09	N/A

Name	Coverage (%)	Time (s)
▼PdV_kernel(bool, int, int, int, int, double, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D–	5.27	2.05
○Loop 273 - PdV.cpp:49-63 - exec	5.27	2.05
○Loop 272 - PdV.cpp:49-63 - exec	0.00	0.00

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