Function: .omp_outlined..20 | Module: exec | Source: advec_mom.cpp:180-211 [...] | Coverage: 4.23% |
---|
Function: .omp_outlined..20 | Module: exec | Source: advec_mom.cpp:180-211 [...] | Coverage: 4.23% |
---|
/beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/advec_mom.cpp: 180 - 211 |
-------------------------------------------------------------------------------- |
180: #pragma omp parallel for simd collapse(2) |
181: for (int j = (y_min - 1 + 1); j < (y_max + 1 + 2); j++) { |
182: for (int i = (x_min + 1); i < (x_max + 1 + 2); i++) |
183: ({ |
184: int upwind, donor, downwind, dif; |
185: double sigma, width, limiter, vdiffuw, vdiffdw, auw, adw, wind, advec_vel_s; |
186: if (node_flux(i, j) < 0.0) { |
187: upwind = j + 2; |
188: donor = j + 1; |
189: downwind = j; |
190: dif = donor; |
191: } else { |
192: upwind = j - 1; |
193: donor = j; |
194: downwind = j + 1; |
195: dif = upwind; |
196: } |
197: sigma = std::fabs(node_flux(i, j)) / (node_mass_pre(i, donor)); |
198: width = celldy[j]; |
199: vdiffuw = vel1(i, donor) - vel1(i, upwind); |
200: vdiffdw = vel1(i, downwind) - vel1(i, donor); |
201: limiter = 0.0; |
202: if (vdiffuw * vdiffdw > 0.0) { |
203: auw = std::fabs(vdiffuw); |
204: adw = std::fabs(vdiffdw); |
205: wind = 1.0; |
206: if (vdiffdw <= 0.0) wind = -1.0; |
207: limiter = |
208: wind * std::fmin(std::fmin(width * ((2.0 - sigma) * adw / width + (1.0 + sigma) * auw / celldy[dif]) / 6.0, auw), adw); |
209: } |
210: advec_vel_s = vel1(i, donor) + (1.0 - sigma) * limiter; |
211: mom_flux(i, j) = advec_vel_s * node_flux(i, j); |
/beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/update_tile_halo_kernel.cpp: 166 - 168 |
-------------------------------------------------------------------------------- |
166: #pragma omp parallel for simd |
167: for (int k = (y_min - depth + 1); k < (y_max + 1 + depth + 2); k++) { |
168: for (int j = 0; j < depth; ++j) { |
/beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/context.h: 69 - 69 |
-------------------------------------------------------------------------------- |
69: T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; } |
0x23ba00 PUSH %RBP |
0x23ba01 MOV %RSP,%RBP |
0x23ba04 PUSH %R15 |
0x23ba06 PUSH %R14 |
0x23ba08 PUSH %R13 |
0x23ba0a PUSH %R12 |
0x23ba0c PUSH %RBX |
0x23ba0d SUB $0x78,%RSP |
0x23ba11 MOV (%RCX),%R15D |
0x23ba14 MOV (%RDX),%R14D |
0x23ba17 ADD $0x3,%R15D |
0x23ba1b SUB %R14D,%R15D |
0x23ba1e JLE 23c19f |
0x23ba24 MOV (%R9),%EBX |
0x23ba27 MOV (%R8),%R13D |
0x23ba2a INC %R13D |
0x23ba2d ADD $0x3,%EBX |
0x23ba30 CMP %R13D,%EBX |
0x23ba33 JLE 23c19f |
0x23ba39 SUB %R13D,%EBX |
0x23ba3c MOV (%RDI),%ESI |
0x23ba3e MOVQ $0,-0x68(%RBP) |
0x23ba46 MOVQ $0x1,-0xa0(%RBP) |
0x23ba51 MOVL $0,-0x3c(%RBP) |
0x23ba58 IMUL %RBX,%R15 |
0x23ba5c DEC %R15 |
0x23ba5f MOV %R15,-0x30(%RBP) |
0x23ba63 SUB $0x8,%RSP |
0x23ba67 LEA -0x3c(%RBP),%RCX |
0x23ba6b LEA -0xa0(%RBP),%RAX |
0x23ba72 LEA 0x2545f(%RIP),%RDI |
0x23ba79 LEA -0x68(%RBP),%R8 |
0x23ba7d LEA -0x30(%RBP),%R9 |
0x23ba81 MOV %ESI,-0x38(%RBP) |
0x23ba84 MOV $0x22,%EDX |
0x23ba89 PUSH $0x1 |
0x23ba8b PUSH $0x1 |
0x23ba8d PUSH %RAX |
0x23ba8e CALL 25f740 <@plt_start@+0x530> |
0x23ba93 ADD $0x20,%RSP |
0x23ba97 MOV -0x30(%RBP),%RAX |
0x23ba9b MOV -0x68(%RBP),%RCX |
0x23ba9f CMP %R15,%RAX |
0x23baa2 CMOVL %RAX,%R15 |
0x23baa6 MOV %R15,-0x30(%RBP) |
0x23baaa CMP %R15,%RCX |
0x23baad JG 23c18d |
0x23bab3 MOV 0x18(%RBP),%R8 |
0x23bab7 MOV 0x28(%RBP),%RDX |
0x23babb MOV 0x30(%RBP),%RAX |
0x23babf MOV 0x20(%RBP),%RSI |
0x23bac3 MOV 0x10(%RBP),%RDI |
0x23bac7 MOV %RBX,-0x58(%RBP) |
0x23bacb MOV (%R8),%R12 |
0x23bace MOV 0x10(%R8),%R9 |
0x23bad2 MOV (%RDX),%R8 |
0x23bad5 MOV 0x10(%RDX),%R11 |
0x23bad9 MOV (%RAX),%RDX |
0x23badc MOV 0x10(%RAX),%RAX |
0x23bae0 MOV (%RDI),%R10 |
0x23bae3 MOV 0x8(%RSI),%RSI |
0x23bae7 MOV 0x10(%RDI),%RDI |
0x23baeb MOV %RAX,-0x60(%RBP) |
0x23baef MOV %R15,%RAX |
0x23baf2 SUB %RCX,%RAX |
0x23baf5 MOV %RSI,-0x48(%RBP) |
0x23baf9 MOV %R10,-0x50(%RBP) |
0x23bafd MOV %R8,-0x90(%RBP) |
0x23bb04 MOV %R12,-0x98(%RBP) |
0x23bb0b MOV %RDX,-0x88(%RBP) |
0x23bb12 INC %RAX |
0x23bb15 CMP $0x8,%RAX |
0x23bb19 JB 23c1ae |
0x23bb1f VBROADCASTSD -0x2a331(%RIP),%ZMM13 |
0x23bb29 VPBROADCASTQ %RCX,%ZMM0 |
0x23bb2f VPADDQ -0x29d39(%RIP),%ZMM0,%ZMM0 |
0x23bb39 VBROADCASTSD -0x2a35b(%RIP),%ZMM12 |
0x23bb43 VPBROADCASTQ -0x2a345(%RIP),%ZMM14 |
0x23bb4d VPBROADCASTQ %RBX,%ZMM1 |
0x23bb53 MOV %RAX,-0x78(%RBP) |
0x23bb57 AND $-0x8,%RAX |
0x23bb5b VPBROADCASTQ %R8,%ZMM6 |
0x23bb61 VPBROADCASTD %R14D,%YMM2 |
0x23bb67 VPBROADCASTD %R13D,%YMM3 |
0x23bb6d VPBROADCASTQ %R10,%ZMM4 |
0x23bb73 VPBROADCASTQ %R12,%ZMM5 |
0x23bb79 VPBROADCASTQ %RDX,%ZMM7 |
0x23bb7f VXORPD %XMM10,%XMM10,%XMM10 |
0x23bb84 VPCMPEQD %YMM11,%YMM11,%YMM11 |
0x23bb89 MOV %R14,-0x80(%RBP) |
0x23bb8d MOV %R13D,-0x34(%RBP) |
0x23bb91 ADD %RAX,%RCX |
0x23bb94 VEXTRACTI32X4 $0x3,%ZMM1,%XMM8 |
0x23bb9b VEXTRACTI32X4 $0x2,%ZMM1,%XMM9 |
0x23bba2 MOV %RAX,%R8 |
0x23bba5 MOV %RAX,-0x70(%RBP) |
0x23bba9 JMP 23bbf3 |
0x23bbab NOPL (%RAX,%RAX,1) |
(333) 0x23bbb0 VSUBPD %ZMM20,%ZMM13,%ZMM19 |
(333) 0x23bbb6 VMOVAPD %ZMM24,%ZMM18{%K2}{z} |
(333) 0x23bbbc MOV -0x60(%RBP),%RAX |
(333) 0x23bbc0 VPMULLQ %ZMM16,%ZMM7,%ZMM16 |
(333) 0x23bbc6 KXNORW %K0,%K0,%K1 |
(333) 0x23bbca ADD $-0x8,%R8 |
(333) 0x23bbce VPADDQ %ZMM14,%ZMM0,%ZMM0 |
(333) 0x23bbd4 VFMADD213PD %ZMM21,%ZMM18,%ZMM19 |
(333) 0x23bbda VPADDQ %ZMM15,%ZMM16,%ZMM15 |
(333) 0x23bbe0 VMULPD %ZMM19,%ZMM17,%ZMM17 |
(333) 0x23bbe6 VSCATTERQPD %ZMM17,(%RAX,%ZMM15,8){%K1} |
(333) 0x23bbed JE 23c173 |
(333) 0x23bbf3 VEXTRACTI32X4 $0x3,%ZMM0,%XMM15 |
(333) 0x23bbfa VPEXTRQ $0x1,%XMM8,%RSI |
(333) 0x23bc00 VPEXTRQ $0x1,%XMM15,%RAX |
(333) 0x23bc06 CQTO |
(333) 0x23bc08 IDIV %RSI |
(333) 0x23bc0b VMOVQ %XMM8,%RSI |
(333) 0x23bc10 VMOVQ %RAX,%XMM16 |
(333) 0x23bc16 VMOVQ %XMM15,%RAX |
(333) 0x23bc1b CQTO |
(333) 0x23bc1d IDIV %RSI |
(333) 0x23bc20 VPEXTRQ $0x1,%XMM9,%RSI |
(333) 0x23bc26 VMOVQ %RAX,%XMM15 |
(333) 0x23bc2b VPUNPCKLQDQ %XMM16,%XMM15,%XMM15 |
(333) 0x23bc31 VEXTRACTI32X4 $0x2,%ZMM0,%XMM16 |
(333) 0x23bc38 VPEXTRQ $0x1,%XMM16,%RAX |
(333) 0x23bc3f CQTO |
(333) 0x23bc41 IDIV %RSI |
(333) 0x23bc44 VMOVQ %XMM9,%RSI |
(333) 0x23bc49 VMOVQ %RAX,%XMM17 |
(333) 0x23bc4f VMOVQ %XMM16,%RAX |
(333) 0x23bc55 CQTO |
(333) 0x23bc57 IDIV %RSI |
(333) 0x23bc5a VMOVQ %RAX,%XMM16 |
(333) 0x23bc60 VPUNPCKLQDQ %XMM17,%XMM16,%XMM16 |
(333) 0x23bc66 VEXTRACTI32X4 $0x1,%YMM1,%XMM17 |
(333) 0x23bc6d VINSERTI32X4 $0x1,%XMM15,%YMM16,%YMM15 |
(333) 0x23bc74 VEXTRACTI32X4 $0x1,%YMM0,%XMM16 |
(333) 0x23bc7b VPEXTRQ $0x1,%XMM17,%RSI |
(333) 0x23bc82 VPEXTRQ $0x1,%XMM16,%RAX |
(333) 0x23bc89 CQTO |
(333) 0x23bc8b IDIV %RSI |
(333) 0x23bc8e VMOVQ %XMM17,%RSI |
(333) 0x23bc94 VMOVQ %RAX,%XMM18 |
(333) 0x23bc9a VMOVQ %XMM16,%RAX |
(333) 0x23bca0 CQTO |
(333) 0x23bca2 IDIV %RSI |
(333) 0x23bca5 VPEXTRQ $0x1,%XMM1,%RSI |
(333) 0x23bcab VMOVQ %RAX,%XMM16 |
(333) 0x23bcb1 VPEXTRQ $0x1,%XMM0,%RAX |
(333) 0x23bcb7 CQTO |
(333) 0x23bcb9 VPUNPCKLQDQ %XMM18,%XMM16,%XMM16 |
(333) 0x23bcbf IDIV %RSI |
(333) 0x23bcc2 VMOVQ %XMM1,%RSI |
(333) 0x23bcc7 VMOVQ %RAX,%XMM17 |
(333) 0x23bccd VMOVQ %XMM0,%RAX |
(333) 0x23bcd2 CQTO |
(333) 0x23bcd4 IDIV %RSI |
(333) 0x23bcd7 VMOVQ %RAX,%XMM18 |
(333) 0x23bcdd VPUNPCKLQDQ %XMM17,%XMM18,%XMM17 |
(333) 0x23bce3 VINSERTI32X4 $0x1,%XMM16,%YMM17,%YMM16 |
(333) 0x23bcea VINSERTI64X4 $0x1,%YMM15,%ZMM16,%ZMM15 |
(333) 0x23bcf1 VPMOVQD %ZMM15,%YMM16 |
(333) 0x23bcf7 VPMULLQ %ZMM1,%ZMM15,%ZMM15 |
(333) 0x23bcfd VPSUBQ %ZMM15,%ZMM0,%ZMM15 |
(333) 0x23bd03 VPMOVQD %ZMM15,%YMM15 |
(333) 0x23bd09 VPADDD %YMM16,%YMM2,%YMM20 |
(333) 0x23bd0f VPMOVSXDQ %YMM20,%ZMM16 |
(333) 0x23bd15 VPADDD %YMM3,%YMM15,%YMM15 |
(333) 0x23bd19 VPMOVSXDQ %YMM15,%ZMM15 |
(333) 0x23bd1f VPMULLQ %ZMM16,%ZMM4,%ZMM17 |
(333) 0x23bd25 VPADDQ %ZMM15,%ZMM17,%ZMM17 |
(333) 0x23bd2b VEXTRACTI32X4 $0x1,%YMM17,%XMM18 |
(333) 0x23bd32 VMOVQ %XMM17,%RAX |
(333) 0x23bd38 VPEXTRQ $0x1,%XMM17,%RDX |
(333) 0x23bd3f VMOVQ %XMM18,%RSI |
(333) 0x23bd45 VPEXTRQ $0x1,%XMM18,%RBX |
(333) 0x23bd4c VEXTRACTI32X4 $0x2,%ZMM17,%XMM18 |
(333) 0x23bd53 VEXTRACTI32X4 $0x3,%ZMM17,%XMM17 |
(333) 0x23bd5a VMOVSD (%RDI,%RAX,8),%XMM19 |
(333) 0x23bd61 VMOVQ %XMM18,%R14 |
(333) 0x23bd67 VMOVQ %XMM17,%R13 |
(333) 0x23bd6d VPEXTRQ $0x1,%XMM18,%R12 |
(333) 0x23bd74 VPEXTRQ $0x1,%XMM17,%R10 |
(333) 0x23bd7b VMOVHPD (%RDI,%RDX,8),%XMM19,%XMM19 |
(333) 0x23bd82 VMOVSD (%RDI,%R13,8),%XMM17 |
(333) 0x23bd89 VMOVSD (%RDI,%R14,8),%XMM18 |
(333) 0x23bd90 VMOVHPD (%RDI,%R10,8),%XMM17,%XMM17 |
(333) 0x23bd97 VMOVHPD (%RDI,%R12,8),%XMM18,%XMM18 |
(333) 0x23bd9e VINSERTF32X4 $0x1,%XMM17,%YMM18,%YMM17 |
(333) 0x23bda5 VMOVSD (%RDI,%RSI,8),%XMM18 |
(333) 0x23bdac VMOVHPD (%RDI,%RBX,8),%XMM18,%XMM18 |
(333) 0x23bdb3 VINSERTF32X4 $0x1,%XMM18,%YMM19,%YMM18 |
(333) 0x23bdba VPSUBD %YMM11,%YMM20,%YMM19 |
(333) 0x23bdc0 VPMOVSXDQ %YMM19,%ZMM22 |
(333) 0x23bdc6 VINSERTF64X4 $0x1,%YMM17,%ZMM18,%ZMM17 |
(333) 0x23bdcd VPADDD %YMM11,%YMM20,%YMM18 |
(333) 0x23bdd3 VMOVDQA64 %YMM18,%YMM23 |
(333) 0x23bdd9 VCMPPD $0x1,%ZMM10,%ZMM17,%K1 |
(333) 0x23bde0 VPBLENDMQ %ZMM22,%ZMM16,%ZMM21{%K1} |
(333) 0x23bde6 VPADDD -0x391d8(%RIP){1to8},%YMM20,%YMM23{%K1} |
(333) 0x23bdf0 VANDPD %ZMM12,%ZMM17,%ZMM20 |
(333) 0x23bdf6 VMOVDQA64 %ZMM16,%ZMM22{%K1} |
(333) 0x23bdfc VPMULLQ %ZMM22,%ZMM6,%ZMM22 |
(333) 0x23be02 VPMULLQ %ZMM21,%ZMM5,%ZMM24 |
(333) 0x23be08 VPMULLQ %ZMM21,%ZMM6,%ZMM21 |
(333) 0x23be0e VPADDQ %ZMM15,%ZMM22,%ZMM22 |
(333) 0x23be14 VPADDQ %ZMM15,%ZMM24,%ZMM24 |
(333) 0x23be1a VPADDQ %ZMM15,%ZMM21,%ZMM21 |
(333) 0x23be20 VEXTRACTI32X4 $0x1,%YMM24,%XMM25 |
(333) 0x23be27 VMOVQ %XMM24,%RAX |
(333) 0x23be2d VPEXTRQ $0x1,%XMM24,%RDX |
(333) 0x23be34 VMOVQ %XMM25,%RSI |
(333) 0x23be3a VPEXTRQ $0x1,%XMM25,%R10 |
(333) 0x23be41 VEXTRACTI32X4 $0x2,%ZMM24,%XMM25 |
(333) 0x23be48 VEXTRACTI32X4 $0x3,%ZMM24,%XMM24 |
(333) 0x23be4f VMOVSD (%R9,%RAX,8),%XMM26 |
(333) 0x23be56 VMOVQ %XMM21,%RAX |
(333) 0x23be5c VMOVQ %XMM25,%RBX |
(333) 0x23be62 VMOVQ %XMM24,%R12 |
(333) 0x23be68 VPEXTRQ $0x1,%XMM25,%R14 |
(333) 0x23be6f VPEXTRQ $0x1,%XMM24,%R13 |
(333) 0x23be76 VMOVHPD (%R9,%RDX,8),%XMM26,%XMM26 |
(333) 0x23be7d VPEXTRQ $0x1,%XMM21,%RDX |
(333) 0x23be84 VMOVSD (%R9,%R12,8),%XMM24 |
(333) 0x23be8b VMOVSD (%R9,%RBX,8),%XMM25 |
(333) 0x23be92 VPMOVSXDQ %YMM23,%ZMM23 |
(333) 0x23be98 VMOVHPD (%R9,%R13,8),%XMM24,%XMM24 |
(333) 0x23be9f VMOVHPD (%R9,%R14,8),%XMM25,%XMM25 |
(333) 0x23bea6 VPMULLQ %ZMM23,%ZMM6,%ZMM23 |
(333) 0x23beac VPADDQ %ZMM15,%ZMM23,%ZMM23 |
(333) 0x23beb2 VINSERTF32X4 $0x1,%XMM24,%YMM25,%YMM24 |
(333) 0x23beb9 VMOVSD (%R9,%RSI,8),%XMM25 |
(333) 0x23bec0 VMOVHPD (%R9,%R10,8),%XMM25,%XMM25 |
(333) 0x23bec7 VINSERTF32X4 $0x1,%XMM25,%YMM26,%YMM25 |
(333) 0x23bece VINSERTF64X4 $0x1,%YMM24,%ZMM25,%ZMM24 |
(333) 0x23bed5 VMOVSD (%R11,%RAX,8),%XMM25 |
(333) 0x23bedc VMOVQ %XMM23,%RAX |
(333) 0x23bee2 VMOVHPD (%R11,%RDX,8),%XMM25,%XMM25 |
(333) 0x23bee9 VPEXTRQ $0x1,%XMM23,%RDX |
(333) 0x23bef0 VDIVPD %ZMM24,%ZMM20,%ZMM20 |
(333) 0x23bef6 VEXTRACTI32X4 $0x1,%YMM21,%XMM24 |
(333) 0x23befd VMOVQ %XMM24,%RSI |
(333) 0x23bf03 VPEXTRQ $0x1,%XMM24,%R10 |
(333) 0x23bf0a VEXTRACTI32X4 $0x2,%ZMM21,%XMM24 |
(333) 0x23bf11 VEXTRACTI32X4 $0x3,%ZMM21,%XMM21 |
(333) 0x23bf18 VMOVQ %XMM24,%R14 |
(333) 0x23bf1e VMOVQ %XMM21,%R12 |
(333) 0x23bf24 VPEXTRQ $0x1,%XMM24,%RBX |
(333) 0x23bf2b VPEXTRQ $0x1,%XMM21,%R13 |
(333) 0x23bf32 VMOVSD (%R11,%R12,8),%XMM21 |
(333) 0x23bf39 VMOVSD (%R11,%R14,8),%XMM24 |
(333) 0x23bf40 VMOVHPD (%R11,%R13,8),%XMM21,%XMM21 |
(333) 0x23bf47 VMOVHPD (%R11,%RBX,8),%XMM24,%XMM24 |
(333) 0x23bf4e VINSERTF32X4 $0x1,%XMM21,%YMM24,%YMM21 |
(333) 0x23bf55 VMOVSD (%R11,%RSI,8),%XMM24 |
(333) 0x23bf5c VMOVHPD (%R11,%R10,8),%XMM24,%XMM24 |
(333) 0x23bf63 VINSERTF32X4 $0x1,%XMM24,%YMM25,%YMM24 |
(333) 0x23bf6a VMOVSD (%R11,%RAX,8),%XMM25 |
(333) 0x23bf71 VMOVQ %XMM22,%RAX |
(333) 0x23bf77 VMOVHPD (%R11,%RDX,8),%XMM25,%XMM25 |
(333) 0x23bf7e VPEXTRQ $0x1,%XMM22,%RDX |
(333) 0x23bf85 VINSERTF64X4 $0x1,%YMM21,%ZMM24,%ZMM21 |
(333) 0x23bf8c VEXTRACTI32X4 $0x1,%YMM23,%XMM24 |
(333) 0x23bf93 VMOVQ %XMM24,%RSI |
(333) 0x23bf99 VPEXTRQ $0x1,%XMM24,%R10 |
(333) 0x23bfa0 VEXTRACTI32X4 $0x2,%ZMM23,%XMM24 |
(333) 0x23bfa7 VEXTRACTI32X4 $0x3,%ZMM23,%XMM23 |
(333) 0x23bfae VMOVQ %XMM24,%RBX |
(333) 0x23bfb4 VMOVQ %XMM23,%R12 |
(333) 0x23bfba VPEXTRQ $0x1,%XMM24,%R14 |
(333) 0x23bfc1 VPEXTRQ $0x1,%XMM23,%R13 |
(333) 0x23bfc8 VMOVSD (%R11,%R12,8),%XMM23 |
(333) 0x23bfcf VMOVSD (%R11,%RBX,8),%XMM24 |
(333) 0x23bfd6 VMOVHPD (%R11,%R13,8),%XMM23,%XMM23 |
(333) 0x23bfdd VMOVHPD (%R11,%R14,8),%XMM24,%XMM24 |
(333) 0x23bfe4 VINSERTF32X4 $0x1,%XMM23,%YMM24,%YMM23 |
(333) 0x23bfeb VMOVSD (%R11,%RSI,8),%XMM24 |
(333) 0x23bff2 VMOVHPD (%R11,%R10,8),%XMM24,%XMM24 |
(333) 0x23bff9 VINSERTF32X4 $0x1,%XMM24,%YMM25,%YMM24 |
(333) 0x23c000 VMOVSD (%R11,%RAX,8),%XMM25 |
(333) 0x23c007 VMOVHPD (%R11,%RDX,8),%XMM25,%XMM25 |
(333) 0x23c00e VINSERTF64X4 $0x1,%YMM23,%ZMM24,%ZMM23 |
(333) 0x23c015 VEXTRACTI32X4 $0x1,%YMM22,%XMM24 |
(333) 0x23c01c VPEXTRQ $0x1,%XMM24,%RSI |
(333) 0x23c023 VMOVQ %XMM24,%R10 |
(333) 0x23c029 VEXTRACTI32X4 $0x2,%ZMM22,%XMM24 |
(333) 0x23c030 VEXTRACTI32X4 $0x3,%ZMM22,%XMM22 |
(333) 0x23c037 VMOVQ %XMM24,%RBX |
(333) 0x23c03d VMOVQ %XMM22,%R12 |
(333) 0x23c043 VPEXTRQ $0x1,%XMM24,%R14 |
(333) 0x23c04a VPEXTRQ $0x1,%XMM22,%R13 |
(333) 0x23c051 VSUBPD %ZMM23,%ZMM21,%ZMM23 |
(333) 0x23c057 VMOVSD (%R11,%R12,8),%XMM22 |
(333) 0x23c05e VMOVSD (%R11,%RBX,8),%XMM24 |
(333) 0x23c065 VMOVHPD (%R11,%R13,8),%XMM22,%XMM22 |
(333) 0x23c06c VMOVHPD (%R11,%R14,8),%XMM24,%XMM24 |
(333) 0x23c073 VINSERTF32X4 $0x1,%XMM22,%YMM24,%YMM22 |
(333) 0x23c07a VMOVSD (%R11,%R10,8),%XMM24 |
(333) 0x23c081 VMOVHPD (%R11,%RSI,8),%XMM24,%XMM24 |
(333) 0x23c088 VINSERTF32X4 $0x1,%XMM24,%YMM25,%YMM24 |
(333) 0x23c08f VINSERTF64X4 $0x1,%YMM22,%ZMM24,%ZMM22 |
(333) 0x23c096 VSUBPD %ZMM21,%ZMM22,%ZMM22 |
(333) 0x23c09c VMULPD %ZMM22,%ZMM23,%ZMM24 |
(333) 0x23c0a2 VCMPPD $0x1,%ZMM24,%ZMM10,%K2 |
(333) 0x23c0a9 KORTESTB %K2,%K2 |
(333) 0x23c0ad JE 23bbb0 |
(333) 0x23c0b3 VBROADCASTSD -0x2a8dd(%RIP),%ZMM25 |
(333) 0x23c0bd MOV -0x48(%RBP),%RAX |
(333) 0x23c0c1 VMOVDQA32 %YMM19,%YMM18{%K1} |
(333) 0x23c0c7 KMOVQ %K2,%K1 |
(333) 0x23c0cc VPXORD %XMM19,%XMM19,%XMM19 |
(333) 0x23c0d2 VANDPD %ZMM12,%ZMM22,%ZMM24 |
(333) 0x23c0d8 KMOVQ %K2,%K3 |
(333) 0x23c0dd VXORPD %XMM26,%XMM26,%XMM26 |
(333) 0x23c0e3 VANDPD %ZMM12,%ZMM23,%ZMM23 |
(333) 0x23c0e9 VGATHERQPD (%RAX,%ZMM16,8),%ZMM19{%K1} |
(333) 0x23c0f0 VCMPPD $0x6,%ZMM10,%ZMM22,%K1 |
(333) 0x23c0f7 VGATHERDPD (%RAX,%YMM18,8),%ZMM26{%K3} |
(333) 0x23c0fe VSUBPD %ZMM20,%ZMM25,%ZMM22 |
(333) 0x23c104 VADDPD %ZMM13,%ZMM20,%ZMM25 |
(333) 0x23c10a VMULPD %ZMM24,%ZMM22,%ZMM22 |
(333) 0x23c110 VMULPD %ZMM23,%ZMM25,%ZMM25 |
(333) 0x23c116 VDIVPD %ZMM19,%ZMM22,%ZMM22 |
(333) 0x23c11c VDIVPD %ZMM26,%ZMM25,%ZMM18 |
(333) 0x23c122 VADDPD %ZMM18,%ZMM22,%ZMM18 |
(333) 0x23c128 VMULPD %ZMM18,%ZMM19,%ZMM18 |
(333) 0x23c12e VDIVPD -0x2a8e8(%RIP){1to8},%ZMM18,%ZMM18 |
(333) 0x23c138 VMINPD %ZMM18,%ZMM23,%ZMM19 |
(333) 0x23c13e VCMPPD $0x3,%ZMM18,%ZMM18,%K3 |
(333) 0x23c145 VMOVAPD %ZMM23,%ZMM19{%K3} |
(333) 0x23c14b VMINPD %ZMM19,%ZMM24,%ZMM18 |
(333) 0x23c151 VCMPPD $0x3,%ZMM19,%ZMM19,%K3 |
(333) 0x23c158 VMOVAPD %ZMM24,%ZMM18{%K3} |
(333) 0x23c15e VXORPD -0x2a8d0(%RIP){1to8},%ZMM18,%ZMM24 |
(333) 0x23c168 VMOVAPD %ZMM18,%ZMM24{%K1} |
(333) 0x23c16e JMP 23bbb0 |
0x23c173 MOV -0x70(%RBP),%RAX |
0x23c177 MOV -0x80(%RBP),%R14 |
0x23c17b MOV -0x34(%RBP),%R13D |
0x23c17f MOV -0x58(%RBP),%RBX |
0x23c183 MOV -0x50(%RBP),%R10 |
0x23c187 CMP %RAX,-0x78(%RBP) |
0x23c18b JNE 23c1ae |
0x23c18d MOV -0x38(%RBP),%ESI |
0x23c190 LEA 0x24d59(%RIP),%RDI |
0x23c197 VZEROUPPER |
0x23c19a CALL 25f750 <@plt_start@+0x540> |
0x23c19f ADD $0x78,%RSP |
0x23c1a3 POP %RBX |
0x23c1a4 POP %R12 |
0x23c1a6 POP %R13 |
0x23c1a8 POP %R14 |
0x23c1aa POP %R15 |
0x23c1ac POP %RBP |
0x23c1ad RET |
0x23c1ae VMOVDDUP -0x2a9ce(%RIP),%XMM1 |
0x23c1b6 VMOVDDUP -0x2a9d6(%RIP),%XMM2 |
0x23c1be VMOVSD -0x2a9e6(%RIP),%XMM3 |
0x23c1c6 VMOVSD -0x2a9d6(%RIP),%XMM4 |
0x23c1ce VMOVSD -0x2a986(%RIP),%XMM5 |
0x23c1d6 VMOVDDUP -0x2a946(%RIP),%XMM6 |
0x23c1de VPXOR %XMM0,%XMM0,%XMM0 |
0x23c1e2 JMP 23c22b |
0x23c1e4 NOPW %CS:(%RAX,%RAX,1) |
(332) 0x23c1f0 VSUBSD %XMM8,%XMM4,%XMM8 |
(332) 0x23c1f5 IMUL -0x88(%RBP),%R12 |
(332) 0x23c1fd MOV -0x60(%RBP),%RAX |
(332) 0x23c201 MOV -0x58(%RBP),%RBX |
(332) 0x23c205 MOV -0x50(%RBP),%R10 |
(332) 0x23c209 VFMADD213SD %XMM9,%XMM11,%XMM8 |
(332) 0x23c20e VMULSD %XMM7,%XMM8,%XMM7 |
(332) 0x23c212 ADD %RDX,%R12 |
(332) 0x23c215 CMP %R15,%RCX |
(332) 0x23c218 VMOVSD %XMM7,(%RAX,%R12,8) |
(332) 0x23c21e LEA 0x1(%RCX),%RAX |
(332) 0x23c222 MOV %RAX,%RCX |
(332) 0x23c225 JGE 23c18d |
(332) 0x23c22b MOV %RCX,%RAX |
(332) 0x23c22e CQTO |
(332) 0x23c230 MOV %R10,%R8 |
(332) 0x23c233 IDIV %RBX |
(332) 0x23c236 ADD %R13D,%EDX |
(332) 0x23c239 MOVSXD %EDX,%RDX |
(332) 0x23c23c MOV %RAX,%RSI |
(332) 0x23c23f ADD %R14D,%EAX |
(332) 0x23c242 LEA 0x1(%R14,%RSI,1),%ESI |
(332) 0x23c247 MOVSXD %EAX,%R12 |
(332) 0x23c24a IMUL %R12,%R8 |
(332) 0x23c24e MOVSXD %ESI,%RBX |
(332) 0x23c251 ADD %RDX,%R8 |
(332) 0x23c254 VMOVSD (%RDI,%R8,8),%XMM7 |
(332) 0x23c25a VUCOMISD %XMM7,%XMM0 |
(332) 0x23c25e JBE 23c270 |
(332) 0x23c260 ADD $0x2,%EAX |
(332) 0x23c263 MOV %R12,%R8 |
(332) 0x23c266 JMP 23c27a |
0x23c268 NOPL (%RAX,%RAX,1) |
(332) 0x23c270 DEC %EAX |
(332) 0x23c272 MOV %RBX,%R8 |
(332) 0x23c275 MOV %R12,%RBX |
(332) 0x23c278 MOV %EAX,%ESI |
(332) 0x23c27a MOV -0x98(%RBP),%R10 |
(332) 0x23c281 VANDPD %XMM1,%XMM7,%XMM8 |
(332) 0x23c285 CLTQ |
(332) 0x23c287 VPXOR %XMM11,%XMM11,%XMM11 |
(332) 0x23c28c IMUL %RBX,%R10 |
(332) 0x23c290 ADD %RDX,%R10 |
(332) 0x23c293 VDIVSD (%R9,%R10,8),%XMM8,%XMM8 |
(332) 0x23c299 MOV -0x90(%RBP),%R10 |
(332) 0x23c2a0 IMUL %R10,%RBX |
(332) 0x23c2a4 IMUL %R10,%R8 |
(332) 0x23c2a8 IMUL %R10,%RAX |
(332) 0x23c2ac ADD %RDX,%RBX |
(332) 0x23c2af ADD %RDX,%R8 |
(332) 0x23c2b2 ADD %RDX,%RAX |
(332) 0x23c2b5 VMOVSD (%R11,%RBX,8),%XMM9 |
(332) 0x23c2bb VMOVSD (%R11,%R8,8),%XMM10 |
(332) 0x23c2c1 VSUBSD (%R11,%RAX,8),%XMM9,%XMM12 |
(332) 0x23c2c7 VSUBSD %XMM9,%XMM10,%XMM10 |
(332) 0x23c2cc VMULSD %XMM10,%XMM12,%XMM13 |
(332) 0x23c2d1 VUCOMISD %XMM11,%XMM13 |
(332) 0x23c2d6 JBE 23c1f0 |
(332) 0x23c2dc MOV -0x48(%RBP),%R8 |
(332) 0x23c2e0 VADDSD %XMM4,%XMM8,%XMM15 |
(332) 0x23c2e4 VANDPD %XMM2,%XMM12,%XMM12 |
(332) 0x23c2e8 MOVSXD %ESI,%RAX |
(332) 0x23c2eb VSUBSD %XMM8,%XMM3,%XMM14 |
(332) 0x23c2f0 VANDPD %XMM2,%XMM10,%XMM13 |
(332) 0x23c2f4 VMULSD %XMM12,%XMM15,%XMM15 |
(332) 0x23c2f9 VMULSD %XMM13,%XMM14,%XMM14 |
(332) 0x23c2fe VMOVSD (%R8,%R12,8),%XMM11 |
(332) 0x23c304 VDIVSD (%R8,%RAX,8),%XMM15,%XMM15 |
(332) 0x23c30a VDIVSD %XMM11,%XMM14,%XMM14 |
(332) 0x23c30f VADDSD %XMM15,%XMM14,%XMM14 |
(332) 0x23c314 VMULSD %XMM14,%XMM11,%XMM11 |
(332) 0x23c319 VDIVSD %XMM5,%XMM11,%XMM11 |
(332) 0x23c31d VCMPSD $0x3,%XMM11,%XMM11,%K1 |
(332) 0x23c324 VMINSD %XMM11,%XMM12,%XMM11 |
(332) 0x23c329 VMOVSD %XMM12,%XMM11,%XMM11{%K1} |
(332) 0x23c32f VCMPSD $0x3,%XMM11,%XMM11,%K1 |
(332) 0x23c336 VMINSD %XMM11,%XMM13,%XMM12 |
(332) 0x23c33b VMOVSD %XMM13,%XMM12,%XMM12{%K1} |
(332) 0x23c341 VCMPSD $0x6,%XMM0,%XMM10,%K1 |
(332) 0x23c348 VXORPD %XMM6,%XMM12,%XMM11 |
(332) 0x23c34c VMOVSD %XMM12,%XMM11,%XMM11{%K1} |
(332) 0x23c352 JMP 23c1f0 |
0x23c357 NOPW (%RAX,%RAX,1) |
0x253abf NOP |
0x253b4b NOPL (%RAX,%RAX,1) |
0x253b61 NOPW %CS:(%RAX,%RAX,1) |
0x253cd6 NOPW %CS:(%RAX,%RAX,1) |
Path / |
Source file and lines | advec_mom.cpp:180-211 |
Module | exec |
nb instructions | 132 |
nb uops | 134 |
loop length | 605 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 10 |
used ymm registers | 3 |
used zmm registers | 9 |
nb stack references | 21 |
micro-operation queue | 22.33 cycles |
front end | 22.33 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 8.25 | 8.25 | 8.25 | 8.25 | 5.00 | 19.00 | 19.00 | 19.00 | 1.00 | 9.00 | 9.00 | 1.00 | 0.00 | 0.00 |
cycles | 8.25 | 8.25 | 8.25 | 8.25 | 5.00 | 19.33 | 19.33 | 19.33 | 1.00 | 9.00 | 9.00 | 1.00 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | NA |
Front-end | 22.33 |
Dispatch | 19.33 |
Overall L1 | 22.33 |
all | 10% |
load | 7% |
store | 0% |
mul | 0% |
add-sub | 14% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 25% |
all | 11% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 33% |
all | 10% |
load | 4% |
store | 0% |
mul | 0% |
add-sub | 14% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 26% |
all | 13% |
load | 16% |
store | 10% |
mul | 12% |
add-sub | 20% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 15% |
all | 13% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 16% |
all | 13% |
load | 15% |
store | 10% |
mul | 12% |
add-sub | 20% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 16% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SUB $0x78,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV (%RCX),%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RDX),%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
ADD $0x3,%R15D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %R14D,%R15D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JLE 23c19f <.omp_outlined..20+0x79f> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV (%R9),%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%R8),%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
INC %R13D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD $0x3,%EBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %R13D,%EBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JLE 23c19f <.omp_outlined..20+0x79f> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
SUB %R13D,%EBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOVQ $0,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVQ $0x1,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVL $0,-0x3c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
IMUL %RBX,%R15 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
DEC %R15 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R15,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SUB $0x8,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA -0x3c(%RBP),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA -0xa0(%RBP),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA 0x2545f(%RIP),%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA -0x68(%RBP),%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA -0x30(%RBP),%R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %ESI,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV $0x22,%EDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CALL 25f740 <@plt_start@+0x530> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD $0x20,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV -0x30(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x68(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP %R15,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMOVL %RAX,%R15 | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R15,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %R15,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JG 23c18d <.omp_outlined..20+0x78d> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV 0x18(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x28(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x30(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x20(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x10(%RBP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RBX,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%R8),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x10(%R8),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RDX),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x10(%RDX),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RAX),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RDI),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x8(%RSI),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x10(%RDI),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R15,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %RCX,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RSI,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R10,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R8,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R12,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RDX,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP $0x8,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JB 23c1ae <.omp_outlined..20+0x7ae> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
VBROADCASTSD -0x2a331(%RIP),%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 |
VPBROADCASTQ %RCX,%ZMM0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 |
VPADDQ -0x29d39(%RIP),%ZMM0,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 1 |
VBROADCASTSD -0x2a35b(%RIP),%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 |
VPBROADCASTQ -0x2a345(%RIP),%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0.50 |
VPBROADCASTQ %RBX,%ZMM1 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 |
MOV %RAX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
AND $-0x8,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VPBROADCASTQ %R8,%ZMM6 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 |
VPBROADCASTD %R14D,%YMM2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 |
VPBROADCASTD %R13D,%YMM3 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 |
VPBROADCASTQ %R10,%ZMM4 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 |
VPBROADCASTQ %R12,%ZMM5 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 |
VPBROADCASTQ %RDX,%ZMM7 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 |
VXORPD %XMM10,%XMM10,%XMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPCMPEQD %YMM11,%YMM11,%YMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
MOV %R14,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R13D,-0x34(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD %RAX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VEXTRACTI32X4 $0x3,%ZMM1,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 |
VEXTRACTI32X4 $0x2,%ZMM1,%XMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 |
MOV %RAX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
JMP 23bbf3 <.omp_outlined..20+0x1f3> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
MOV -0x70(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x80(%RBP),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x34(%RBP),%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x58(%RBP),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x50(%RBP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP %RAX,-0x78(%RBP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JNE 23c1ae <.omp_outlined..20+0x7ae> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x38(%RBP),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA 0x24d59(%RIP),%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 25f750 <@plt_start@+0x540> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD $0x78,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
POP %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
RET | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVDDUP -0x2a9ce(%RIP),%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVDDUP -0x2a9d6(%RIP),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVSD -0x2a9e6(%RIP),%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVSD -0x2a9d6(%RIP),%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVSD -0x2a986(%RIP),%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVDDUP -0x2a946(%RIP),%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VPXOR %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 23c22b <.omp_outlined..20+0x82b> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
Source file and lines | advec_mom.cpp:180-211 |
Module | exec |
nb instructions | 132 |
nb uops | 134 |
loop length | 605 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 10 |
used ymm registers | 3 |
used zmm registers | 9 |
nb stack references | 21 |
micro-operation queue | 22.33 cycles |
front end | 22.33 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 8.25 | 8.25 | 8.25 | 8.25 | 5.00 | 19.00 | 19.00 | 19.00 | 1.00 | 9.00 | 9.00 | 1.00 | 0.00 | 0.00 |
cycles | 8.25 | 8.25 | 8.25 | 8.25 | 5.00 | 19.33 | 19.33 | 19.33 | 1.00 | 9.00 | 9.00 | 1.00 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | NA |
Front-end | 22.33 |
Dispatch | 19.33 |
Overall L1 | 22.33 |
all | 10% |
load | 7% |
store | 0% |
mul | 0% |
add-sub | 14% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 25% |
all | 11% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 33% |
all | 10% |
load | 4% |
store | 0% |
mul | 0% |
add-sub | 14% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 26% |
all | 13% |
load | 16% |
store | 10% |
mul | 12% |
add-sub | 20% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 15% |
all | 13% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 16% |
all | 13% |
load | 15% |
store | 10% |
mul | 12% |
add-sub | 20% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 16% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SUB $0x78,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV (%RCX),%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RDX),%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
ADD $0x3,%R15D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %R14D,%R15D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JLE 23c19f <.omp_outlined..20+0x79f> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV (%R9),%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%R8),%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
INC %R13D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD $0x3,%EBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %R13D,%EBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JLE 23c19f <.omp_outlined..20+0x79f> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
SUB %R13D,%EBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOVQ $0,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVQ $0x1,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVL $0,-0x3c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
IMUL %RBX,%R15 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
DEC %R15 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R15,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SUB $0x8,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA -0x3c(%RBP),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA -0xa0(%RBP),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA 0x2545f(%RIP),%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA -0x68(%RBP),%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA -0x30(%RBP),%R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %ESI,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV $0x22,%EDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CALL 25f740 <@plt_start@+0x530> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD $0x20,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV -0x30(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x68(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP %R15,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMOVL %RAX,%R15 | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R15,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %R15,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JG 23c18d <.omp_outlined..20+0x78d> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV 0x18(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x28(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x30(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x20(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x10(%RBP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RBX,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV (%R8),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x10(%R8),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RDX),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x10(%RDX),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RAX),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV (%RDI),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x8(%RSI),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x10(%RDI),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R15,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %RCX,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RSI,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R10,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R8,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R12,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RDX,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP $0x8,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JB 23c1ae <.omp_outlined..20+0x7ae> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
VBROADCASTSD -0x2a331(%RIP),%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 |
VPBROADCASTQ %RCX,%ZMM0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 |
VPADDQ -0x29d39(%RIP),%ZMM0,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 1 |
VBROADCASTSD -0x2a35b(%RIP),%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 |
VPBROADCASTQ -0x2a345(%RIP),%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0.50 |
VPBROADCASTQ %RBX,%ZMM1 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 |
MOV %RAX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
AND $-0x8,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VPBROADCASTQ %R8,%ZMM6 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 |
VPBROADCASTD %R14D,%YMM2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 |
VPBROADCASTD %R13D,%YMM3 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 |
VPBROADCASTQ %R10,%ZMM4 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 |
VPBROADCASTQ %R12,%ZMM5 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 |
VPBROADCASTQ %RDX,%ZMM7 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 |
VXORPD %XMM10,%XMM10,%XMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPCMPEQD %YMM11,%YMM11,%YMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
MOV %R14,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R13D,-0x34(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD %RAX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VEXTRACTI32X4 $0x3,%ZMM1,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 |
VEXTRACTI32X4 $0x2,%ZMM1,%XMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 |
MOV %RAX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
JMP 23bbf3 <.omp_outlined..20+0x1f3> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
MOV -0x70(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x80(%RBP),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x34(%RBP),%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x58(%RBP),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0x50(%RBP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP %RAX,-0x78(%RBP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JNE 23c1ae <.omp_outlined..20+0x7ae> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x38(%RBP),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA 0x24d59(%RIP),%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 25f750 <@plt_start@+0x540> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD $0x78,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
POP %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
RET | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVDDUP -0x2a9ce(%RIP),%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVDDUP -0x2a9d6(%RIP),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVSD -0x2a9e6(%RIP),%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVSD -0x2a9d6(%RIP),%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVSD -0x2a986(%RIP),%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVDDUP -0x2a946(%RIP),%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VPXOR %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 23c22b <.omp_outlined..20+0x82b> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼.omp_outlined..20– | 4.23 | 2.16 |
○Loop 333 - advec_mom.cpp:181-211 - exec | 4.22 | 2.15 |
○Loop 332 - advec_mom.cpp:181-211 - exec | 0 | 0 |