Loop Id: 241 | Module: exec | Source: advec_mom.cpp:72-75 [...] | Coverage: 2.53% |
---|
Loop Id: 241 | Module: exec | Source: advec_mom.cpp:72-75 [...] | Coverage: 2.53% |
---|
0x238c10 VEXTRACTI32X4 $0x3,%ZMM0,%XMM12 |
0x238c17 VPEXTRQ $0x1,%XMM9,%RSI |
0x238c1d VMOVQ %XMM9,%RBX |
0x238c22 VEXTRACTI32X4 $0x2,%ZMM0,%XMM14 |
0x238c29 VEXTRACTI128 $0x1,%YMM1,%XMM15 |
0x238c2f KXNORW %K0,%K0,%K1 |
0x238c33 VPEXTRQ $0x1,%XMM12,%RAX |
0x238c39 CQTO |
0x238c3b IDIV %RSI |
0x238c3e MOV %RAX,%RSI |
0x238c41 VMOVQ %XMM12,%RAX |
0x238c46 VMOVQ %RSI,%XMM12 |
0x238c4b VPEXTRQ $0x1,%XMM10,%RSI |
0x238c51 CQTO |
0x238c53 IDIV %RBX |
0x238c56 VMOVQ %XMM15,%RBX |
0x238c5b VMOVQ %RAX,%XMM13 |
0x238c60 VPEXTRQ $0x1,%XMM14,%RAX |
0x238c66 CQTO |
0x238c68 VPUNPCKLQDQ %XMM12,%XMM13,%XMM12 |
0x238c6d IDIV %RSI |
0x238c70 VMOVQ %XMM10,%RSI |
0x238c75 VMOVQ %RAX,%XMM13 |
0x238c7a VMOVQ %XMM14,%RAX |
0x238c7f CQTO |
0x238c81 IDIV %RSI |
0x238c84 VPEXTRQ $0x1,%XMM15,%RSI |
0x238c8a VMOVQ %RAX,%XMM14 |
0x238c8f VPUNPCKLQDQ %XMM13,%XMM14,%XMM13 |
0x238c94 VEXTRACTI128 $0x1,%YMM0,%XMM14 |
0x238c9a VPEXTRQ $0x1,%XMM14,%RAX |
0x238ca0 VINSERTI128 $0x1,%XMM12,%YMM13,%YMM12 |
0x238ca6 CQTO |
0x238ca8 IDIV %RSI |
0x238cab MOV %RAX,%RSI |
0x238cae VMOVQ %XMM14,%RAX |
0x238cb3 VMOVQ %RSI,%XMM13 |
0x238cb8 VPEXTRQ $0x1,%XMM1,%RSI |
0x238cbe CQTO |
0x238cc0 IDIV %RBX |
0x238cc3 VMOVQ %RAX,%XMM14 |
0x238cc8 VPEXTRQ $0x1,%XMM0,%RAX |
0x238cce CQTO |
0x238cd0 VPUNPCKLQDQ %XMM13,%XMM14,%XMM13 |
0x238cd5 IDIV %RSI |
0x238cd8 VMOVQ %XMM1,%RSI |
0x238cdd VMOVQ %RAX,%XMM14 |
0x238ce2 VMOVQ %XMM0,%RAX |
0x238ce7 CQTO |
0x238ce9 IDIV %RSI |
0x238cec ADD $-0x8,%R11 |
0x238cf0 VMOVQ %RAX,%XMM15 |
0x238cf5 VPUNPCKLQDQ %XMM14,%XMM15,%XMM14 |
0x238cfa VINSERTI128 $0x1,%XMM13,%YMM14,%YMM13 |
0x238d00 VINSERTI64X4 $0x1,%YMM12,%ZMM13,%ZMM12 |
0x238d07 VPMOVQD %ZMM12,%YMM13 |
0x238d0d VPMULLQ %ZMM1,%ZMM12,%ZMM12 |
0x238d13 VPSUBQ %ZMM12,%ZMM0,%ZMM12 |
0x238d19 VPADDQ %ZMM11,%ZMM0,%ZMM0 |
0x238d1f VPMOVQD %ZMM12,%YMM14 |
0x238d25 VPADDD %YMM2,%YMM13,%YMM13 |
0x238d29 VPMOVSXDQ %YMM13,%ZMM13 |
0x238d2f VPADDD %YMM3,%YMM14,%YMM12 |
0x238d33 VPADDD %YMM6,%YMM14,%YMM14 |
0x238d37 VPMOVSXDQ %YMM12,%ZMM12 |
0x238d3d VPMULLQ %ZMM13,%ZMM4,%ZMM15 |
0x238d43 VPMULLQ %ZMM13,%ZMM5,%ZMM19 |
0x238d49 VPMOVSXDQ %YMM14,%ZMM14 |
0x238d4f VPADDQ %ZMM12,%ZMM15,%ZMM15 |
0x238d55 VEXTRACTI32X4 $0x1,%YMM15,%XMM16 |
0x238d5c VMOVQ %XMM15,%RAX |
0x238d61 VPEXTRQ $0x1,%XMM15,%RDX |
0x238d67 VMOVQ %XMM16,%RSI |
0x238d6d VPEXTRQ $0x1,%XMM16,%RBX |
0x238d74 VEXTRACTI32X4 $0x2,%ZMM15,%XMM16 |
0x238d7b VEXTRACTI32X4 $0x3,%ZMM15,%XMM15 |
0x238d82 VMOVSD (%R8,%RAX,8),%XMM17 [25] |
0x238d89 MOV -0x48(%RBP),%RAX [21] |
0x238d8d VMOVQ %XMM16,%R10 |
0x238d93 VMOVQ %XMM15,%R12 |
0x238d98 VPEXTRQ $0x1,%XMM16,%R9 |
0x238d9f VPEXTRQ $0x1,%XMM15,%R14 |
0x238da5 VMOVHPD (%R8,%RDX,8),%XMM17,%XMM17 [3] |
0x238dac VMOVSD (%R8,%R12,8),%XMM15 [24] |
0x238db2 VMOVSD (%R8,%R10,8),%XMM16 [26] |
0x238db9 VMOVHPD (%R8,%R14,8),%XMM15,%XMM15 [7] |
0x238dbf VMOVHPD (%R8,%R9,8),%XMM16,%XMM16 [11] |
0x238dc6 VINSERTF32X4 $0x1,%XMM15,%YMM16,%YMM15 |
0x238dcd VMOVSD (%R8,%RSI,8),%XMM16 [27] |
0x238dd4 VMOVHPD (%R8,%RBX,8),%XMM16,%XMM16 [10] |
0x238ddb VINSERTF32X4 $0x1,%XMM16,%YMM17,%YMM16 |
0x238de2 VINSERTF64X4 $0x1,%YMM15,%ZMM16,%ZMM15 |
0x238de9 VPADDQ %ZMM12,%ZMM19,%ZMM16 |
0x238def VSCATTERQPD %ZMM15,(%RAX,%ZMM16,8){%K1} [14] |
0x238df6 VPMULLQ %ZMM13,%ZMM7,%ZMM16 |
0x238dfc VPMULLQ %ZMM13,%ZMM8,%ZMM13 |
0x238e02 KXNORW %K0,%K0,%K1 |
0x238e06 VPADDQ %ZMM14,%ZMM16,%ZMM14 |
0x238e0c VEXTRACTI32X4 $0x1,%YMM14,%XMM17 |
0x238e13 VMOVQ %XMM14,%RAX |
0x238e18 VPEXTRQ $0x1,%XMM14,%RDX |
0x238e1e VMOVQ %XMM17,%RSI |
0x238e24 VPEXTRQ $0x1,%XMM17,%R9 |
0x238e2b VEXTRACTI32X4 $0x2,%ZMM14,%XMM17 |
0x238e32 VEXTRACTI32X4 $0x3,%ZMM14,%XMM14 |
0x238e39 VMOVSD (%RDI,%RAX,8),%XMM18 [16] |
0x238e40 VMOVQ %XMM17,%R10 |
0x238e46 VMOVQ %XMM14,%R14 |
0x238e4b VPEXTRQ $0x1,%XMM17,%RBX |
0x238e52 VPEXTRQ $0x1,%XMM14,%R12 |
0x238e58 VMOVHPD (%RDI,%RDX,8),%XMM18,%XMM18 [13] |
0x238e5f VMOVSD (%RDI,%R14,8),%XMM14 [15] |
0x238e65 VMOVSD (%RDI,%R10,8),%XMM17 [4] |
0x238e6c VMOVHPD (%RDI,%R12,8),%XMM14,%XMM14 [2] |
0x238e72 VMOVHPD (%RDI,%RBX,8),%XMM17,%XMM17 [23] |
0x238e79 VINSERTF32X4 $0x1,%XMM14,%YMM17,%YMM14 |
0x238e80 VMOVSD (%RDI,%RSI,8),%XMM17 [5] |
0x238e87 VMOVHPD (%RDI,%R9,8),%XMM17,%XMM17 [9] |
0x238e8e VINSERTF32X4 $0x1,%XMM17,%YMM18,%YMM17 |
0x238e95 VINSERTF64X4 $0x1,%YMM14,%ZMM17,%ZMM14 |
0x238e9c VADDPD %ZMM14,%ZMM15,%ZMM14 |
0x238ea2 VPADDQ %ZMM12,%ZMM16,%ZMM15 |
0x238ea8 VPADDQ %ZMM12,%ZMM13,%ZMM12 |
0x238eae VEXTRACTI32X4 $0x1,%YMM15,%XMM16 |
0x238eb5 VMOVQ %XMM15,%RAX |
0x238eba VPEXTRQ $0x1,%XMM15,%RDX |
0x238ec0 VMOVQ %XMM16,%RSI |
0x238ec6 VPEXTRQ $0x1,%XMM16,%R9 |
0x238ecd VEXTRACTI32X4 $0x2,%ZMM15,%XMM16 |
0x238ed4 VEXTRACTI32X4 $0x3,%ZMM15,%XMM15 |
0x238edb VMOVSD (%RDI,%RAX,8),%XMM17 [18] |
0x238ee2 MOV -0x50(%RBP),%RAX [21] |
0x238ee6 VMOVQ %XMM16,%R10 |
0x238eec VMOVQ %XMM15,%R14 |
0x238ef1 VPEXTRQ $0x1,%XMM16,%RBX |
0x238ef8 VPEXTRQ $0x1,%XMM15,%R12 |
0x238efe VMOVHPD (%RDI,%RDX,8),%XMM17,%XMM17 [12] |
0x238f05 VMOVSD (%RDI,%R14,8),%XMM15 [17] |
0x238f0b VMOVSD (%RDI,%R10,8),%XMM16 [19] |
0x238f12 VMOVHPD (%RDI,%R12,8),%XMM15,%XMM15 [1] |
0x238f18 VMOVHPD (%RDI,%RBX,8),%XMM16,%XMM16 [22] |
0x238f1f VINSERTF32X4 $0x1,%XMM15,%YMM16,%YMM15 |
0x238f26 VMOVSD (%RDI,%RSI,8),%XMM16 [20] |
0x238f2d VMOVHPD (%RDI,%R9,8),%XMM16,%XMM16 [8] |
0x238f34 VINSERTF32X4 $0x1,%XMM16,%YMM17,%YMM16 |
0x238f3b VINSERTF64X4 $0x1,%YMM15,%ZMM16,%ZMM15 |
0x238f42 VSUBPD %ZMM15,%ZMM14,%ZMM14 |
0x238f48 VSCATTERQPD %ZMM14,(%RAX,%ZMM12,8){%K1} [6] |
0x238f4f JNE 238c10 |
/beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/advec_mom.cpp: 72 - 75 |
-------------------------------------------------------------------------------- |
72: for (int j = (y_min - 2 + 1); j < (y_max + 2 + 2); j++) { |
73: for (int i = (x_min - 2 + 1); i < (x_max + 2 + 2); i++) { |
74: post_vol(i, j) = volume(i, j); |
75: pre_vol(i, j) = post_vol(i, j) + vol_flux_x(i + 1, j + 0) - vol_flux_x(i, j); |
/beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/context.h: 69 - 69 |
-------------------------------------------------------------------------------- |
69: T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; } |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.39 - 2.39 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.91 - 3.28 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.28 - 2.19 |
Bottlenecks | P8, P9, |
Function | .omp_outlined..6#0x238a70 |
Source | advec_mom.cpp:72-75,context.h:69-69 |
Source loop unroll info | unrolled by 8 |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | main |
Unroll factor | 8 |
CQA cycles | 56.00 - 96.00 |
CQA cycles if no scalar integer | 40.17 |
CQA cycles if FP arith vectorized | 56.00 - 96.00 |
CQA cycles if fully vectorized | 29.25 |
Front-end cycles | 43.83 |
DIV/SQRT cycles | 16.00 |
P0 cycles | 0.50 |
P1 cycles | 8.00 |
P2 cycles | 0.50 |
P3 cycles | 1.00 |
P4 cycles | 8.67 |
P5 cycles | 8.67 |
P6 cycles | 8.67 |
P7 cycles | 20.00 |
P8 cycles | 27.17 |
P9 cycles | 26.83 |
P10 cycles | 29.00 |
P11 cycles | 38.00 |
P12 cycles | 38.00 |
P13 cycles | 56.00 - 96.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 149.00 |
Nb uops | 263.00 |
Nb loads | 34.00 |
Nb stores | 2.00 |
Nb stack references | 2.00 |
FLOP/cycle | 0.29 - 0.17 |
Nb FLOP add-sub | 16.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 3.50 - 6.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 208.00 |
Bytes stored | 128.00 |
Stride 0 | 1.00 |
Stride 1 | 0.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 18.00 |
Vectorization ratio all | 34.75 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 33.33 |
Vector-efficiency ratio all | 28.19 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 100.00 |
Vector-efficiency ratio mul | 100.00 |
Vector-efficiency ratio add_sub | 87.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 20.28 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.39 - 2.39 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.91 - 3.28 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.28 - 2.19 |
Bottlenecks | P8, P9, |
Function | .omp_outlined..6#0x238a70 |
Source | advec_mom.cpp:72-75,context.h:69-69 |
Source loop unroll info | unrolled by 8 |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | main |
Unroll factor | 8 |
CQA cycles | 56.00 - 96.00 |
CQA cycles if no scalar integer | 40.17 |
CQA cycles if FP arith vectorized | 56.00 - 96.00 |
CQA cycles if fully vectorized | 29.25 |
Front-end cycles | 43.83 |
DIV/SQRT cycles | 16.00 |
P0 cycles | 0.50 |
P1 cycles | 8.00 |
P2 cycles | 0.50 |
P3 cycles | 1.00 |
P4 cycles | 8.67 |
P5 cycles | 8.67 |
P6 cycles | 8.67 |
P7 cycles | 20.00 |
P8 cycles | 27.17 |
P9 cycles | 26.83 |
P10 cycles | 29.00 |
P11 cycles | 38.00 |
P12 cycles | 38.00 |
P13 cycles | 56.00 - 96.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 149.00 |
Nb uops | 263.00 |
Nb loads | 34.00 |
Nb stores | 2.00 |
Nb stack references | 2.00 |
FLOP/cycle | 0.29 - 0.17 |
Nb FLOP add-sub | 16.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 3.50 - 6.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 208.00 |
Bytes stored | 128.00 |
Stride 0 | 1.00 |
Stride 1 | 0.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 18.00 |
Vectorization ratio all | 34.75 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 33.33 |
Vector-efficiency ratio all | 28.19 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 100.00 |
Vector-efficiency ratio mul | 100.00 |
Vector-efficiency ratio add_sub | 87.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 20.28 |
Path / |
Function | .omp_outlined..6#0x238a70 |
Source file and lines | advec_mom.cpp:72-75 |
Module | exec |
nb instructions | 149 |
nb uops | 263 |
loop length | 837 |
used x86 registers | 12 |
used mmx registers | 0 |
used xmm registers | 11 |
used ymm registers | 12 |
used zmm registers | 14 |
nb stack references | 2 |
micro-operation queue | 43.83 cycles |
front end | 43.83 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 16.00 | 0.50 | 8.00 | 0.50 | 1.00 | 8.67 | 8.67 | 8.67 | 20.00 | 27.17 | 26.83 | 27.00 | 38.00 | 38.00 |
cycles | 16.00 | 0.50 | 8.00 | 0.50 | 1.00 | 8.67 | 8.67 | 8.67 | 20.00 | 27.17 | 26.83 | 29.00 | 38.00 | 38.00 |
Cycles executing div or sqrt instructions | 56.00-96.00 |
Longest recurrence chain latency (RecMII) | 1.00 |
Front-end | 43.83 |
Dispatch | 38.00 |
DIV/SQRT | 56.00-96.00 |
Data deps. | 1.00 |
Overall L1 | 56.00-96.00 |
all | 34% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 23% |
all | 35% |
load | 0% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 34% |
load | 0% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 33% |
all | 28% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 85% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 18% |
all | 27% |
load | 12% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 33% |
all | 28% |
load | 12% |
store | 100% |
mul | 100% |
add-sub | 87% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 20% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VEXTRACTI32X4 $0x3,%ZMM0,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 |
VPEXTRQ $0x1,%XMM9,%RSI | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VMOVQ %XMM9,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VEXTRACTI32X4 $0x2,%ZMM0,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 |
VEXTRACTI128 $0x1,%YMM1,%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
KXNORW %K0,%K0,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPEXTRQ $0x1,%XMM12,%RAX | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
CQTO | |||||||||||||||||
IDIV %RSI | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVQ %XMM12,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMOVQ %RSI,%XMM12 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
VPEXTRQ $0x1,%XMM10,%RSI | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
CQTO | |||||||||||||||||
IDIV %RBX | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 |
VMOVQ %XMM15,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMOVQ %RAX,%XMM13 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
VPEXTRQ $0x1,%XMM14,%RAX | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
CQTO | |||||||||||||||||
VPUNPCKLQDQ %XMM12,%XMM13,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 |
IDIV %RSI | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 |
VMOVQ %XMM10,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMOVQ %RAX,%XMM13 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
VMOVQ %XMM14,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
CQTO | |||||||||||||||||
IDIV %RSI | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 |
VPEXTRQ $0x1,%XMM15,%RSI | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VMOVQ %RAX,%XMM14 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
VPUNPCKLQDQ %XMM13,%XMM14,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 |
VEXTRACTI128 $0x1,%YMM0,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VPEXTRQ $0x1,%XMM14,%RAX | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VINSERTI128 $0x1,%XMM12,%YMM13,%YMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0.50 |
CQTO | |||||||||||||||||
IDIV %RSI | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVQ %XMM14,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMOVQ %RSI,%XMM13 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
VPEXTRQ $0x1,%XMM1,%RSI | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
CQTO | |||||||||||||||||
IDIV %RBX | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 |
VMOVQ %RAX,%XMM14 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
VPEXTRQ $0x1,%XMM0,%RAX | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
CQTO | |||||||||||||||||
VPUNPCKLQDQ %XMM13,%XMM14,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 |
IDIV %RSI | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 |
VMOVQ %XMM1,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMOVQ %RAX,%XMM14 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
VMOVQ %XMM0,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
CQTO | |||||||||||||||||
IDIV %RSI | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 |
ADD $-0x8,%R11 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVQ %RAX,%XMM15 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
VPUNPCKLQDQ %XMM14,%XMM15,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 |
VINSERTI128 $0x1,%XMM13,%YMM14,%YMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0.50 |
VINSERTI64X4 $0x1,%YMM12,%ZMM13,%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 |
VPMOVQD %ZMM12,%YMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 |
VPMULLQ %ZMM1,%ZMM12,%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %ZMM12,%ZMM0,%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 |
VPADDQ %ZMM11,%ZMM0,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 |
VPMOVQD %ZMM12,%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 |
VPADDD %YMM2,%YMM13,%YMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VPMOVSXDQ %YMM13,%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 |
VPADDD %YMM3,%YMM14,%YMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VPADDD %YMM6,%YMM14,%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VPMOVSXDQ %YMM12,%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 |
VPMULLQ %ZMM13,%ZMM4,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VPMULLQ %ZMM13,%ZMM5,%ZMM19 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VPMOVSXDQ %YMM14,%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 |
VPADDQ %ZMM12,%ZMM15,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 |
VEXTRACTI32X4 $0x1,%YMM15,%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 4 | 0.25 |
VMOVQ %XMM15,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VPEXTRQ $0x1,%XMM15,%RDX | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VMOVQ %XMM16,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VPEXTRQ $0x1,%XMM16,%RBX | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VEXTRACTI32X4 $0x2,%ZMM15,%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 |
VEXTRACTI32X4 $0x3,%ZMM15,%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 |
VMOVSD (%R8,%RAX,8),%XMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
VMOVQ %XMM16,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMOVQ %XMM15,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VPEXTRQ $0x1,%XMM16,%R9 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VPEXTRQ $0x1,%XMM15,%R14 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VMOVHPD (%R8,%RDX,8),%XMM17,%XMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 9 | 0.50 |
VMOVSD (%R8,%R12,8),%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVSD (%R8,%R10,8),%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVHPD (%R8,%R14,8),%XMM15,%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 9 | 0.50 |
VMOVHPD (%R8,%R9,8),%XMM16,%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 9 | 0.50 |
VINSERTF32X4 $0x1,%XMM15,%YMM16,%YMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0.50 |
VMOVSD (%R8,%RSI,8),%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVHPD (%R8,%RBX,8),%XMM16,%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 9 | 0.50 |
VINSERTF32X4 $0x1,%XMM16,%YMM17,%YMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0.50 |
VINSERTF64X4 $0x1,%YMM15,%ZMM16,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 |
VPADDQ %ZMM12,%ZMM19,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 |
VSCATTERQPD %ZMM15,(%RAX,%ZMM16,8){%K1} | 48 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 3.50 | 1.50 | 9 | 9 | 1-40 | 12.14 |
VPMULLQ %ZMM13,%ZMM7,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VPMULLQ %ZMM13,%ZMM8,%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
KXNORW %K0,%K0,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPADDQ %ZMM14,%ZMM16,%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 |
VEXTRACTI32X4 $0x1,%YMM14,%XMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 4 | 0.25 |
VMOVQ %XMM14,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VPEXTRQ $0x1,%XMM14,%RDX | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VMOVQ %XMM17,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VPEXTRQ $0x1,%XMM17,%R9 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VEXTRACTI32X4 $0x2,%ZMM14,%XMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 |
VEXTRACTI32X4 $0x3,%ZMM14,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 |
VMOVSD (%RDI,%RAX,8),%XMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVQ %XMM17,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMOVQ %XMM14,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VPEXTRQ $0x1,%XMM17,%RBX | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VPEXTRQ $0x1,%XMM14,%R12 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VMOVHPD (%RDI,%RDX,8),%XMM18,%XMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 9 | 0.50 |
VMOVSD (%RDI,%R14,8),%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVSD (%RDI,%R10,8),%XMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVHPD (%RDI,%R12,8),%XMM14,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 9 | 0.50 |
VMOVHPD (%RDI,%RBX,8),%XMM17,%XMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 9 | 0.50 |
VINSERTF32X4 $0x1,%XMM14,%YMM17,%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0.50 |
VMOVSD (%RDI,%RSI,8),%XMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVHPD (%RDI,%R9,8),%XMM17,%XMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 9 | 0.50 |
VINSERTF32X4 $0x1,%XMM17,%YMM18,%YMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0.50 |
VINSERTF64X4 $0x1,%YMM14,%ZMM17,%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 |
VADDPD %ZMM14,%ZMM15,%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 |
VPADDQ %ZMM12,%ZMM16,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 |
VPADDQ %ZMM12,%ZMM13,%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 |
VEXTRACTI32X4 $0x1,%YMM15,%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 4 | 0.25 |
VMOVQ %XMM15,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VPEXTRQ $0x1,%XMM15,%RDX | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VMOVQ %XMM16,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VPEXTRQ $0x1,%XMM16,%R9 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VEXTRACTI32X4 $0x2,%ZMM15,%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 |
VEXTRACTI32X4 $0x3,%ZMM15,%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 |
VMOVSD (%RDI,%RAX,8),%XMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV -0x50(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
VMOVQ %XMM16,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMOVQ %XMM15,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VPEXTRQ $0x1,%XMM16,%RBX | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VPEXTRQ $0x1,%XMM15,%R12 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VMOVHPD (%RDI,%RDX,8),%XMM17,%XMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 9 | 0.50 |
VMOVSD (%RDI,%R14,8),%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVSD (%RDI,%R10,8),%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVHPD (%RDI,%R12,8),%XMM15,%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 9 | 0.50 |
VMOVHPD (%RDI,%RBX,8),%XMM16,%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 9 | 0.50 |
VINSERTF32X4 $0x1,%XMM15,%YMM16,%YMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0.50 |
VMOVSD (%RDI,%RSI,8),%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVHPD (%RDI,%R9,8),%XMM16,%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 9 | 0.50 |
VINSERTF32X4 $0x1,%XMM16,%YMM17,%YMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0.50 |
VINSERTF64X4 $0x1,%YMM15,%ZMM16,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 |
VSUBPD %ZMM15,%ZMM14,%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 |
VSCATTERQPD %ZMM14,(%RAX,%ZMM12,8){%K1} | 48 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 3.50 | 1.50 | 9 | 9 | 1-40 | 12.14 |
JNE 238c10 <.omp_outlined..6+0x1a0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
Function | .omp_outlined..6#0x238a70 |
Source file and lines | advec_mom.cpp:72-75 |
Module | exec |
nb instructions | 149 |
nb uops | 263 |
loop length | 837 |
used x86 registers | 12 |
used mmx registers | 0 |
used xmm registers | 11 |
used ymm registers | 12 |
used zmm registers | 14 |
nb stack references | 2 |
micro-operation queue | 43.83 cycles |
front end | 43.83 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 16.00 | 0.50 | 8.00 | 0.50 | 1.00 | 8.67 | 8.67 | 8.67 | 20.00 | 27.17 | 26.83 | 27.00 | 38.00 | 38.00 |
cycles | 16.00 | 0.50 | 8.00 | 0.50 | 1.00 | 8.67 | 8.67 | 8.67 | 20.00 | 27.17 | 26.83 | 29.00 | 38.00 | 38.00 |
Cycles executing div or sqrt instructions | 56.00-96.00 |
Longest recurrence chain latency (RecMII) | 1.00 |
Front-end | 43.83 |
Dispatch | 38.00 |
DIV/SQRT | 56.00-96.00 |
Data deps. | 1.00 |
Overall L1 | 56.00-96.00 |
all | 34% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 23% |
all | 35% |
load | 0% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 34% |
load | 0% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 33% |
all | 28% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 85% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 18% |
all | 27% |
load | 12% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 33% |
all | 28% |
load | 12% |
store | 100% |
mul | 100% |
add-sub | 87% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 20% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VEXTRACTI32X4 $0x3,%ZMM0,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 |
VPEXTRQ $0x1,%XMM9,%RSI | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VMOVQ %XMM9,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VEXTRACTI32X4 $0x2,%ZMM0,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 |
VEXTRACTI128 $0x1,%YMM1,%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
KXNORW %K0,%K0,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPEXTRQ $0x1,%XMM12,%RAX | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
CQTO | |||||||||||||||||
IDIV %RSI | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVQ %XMM12,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMOVQ %RSI,%XMM12 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
VPEXTRQ $0x1,%XMM10,%RSI | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
CQTO | |||||||||||||||||
IDIV %RBX | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 |
VMOVQ %XMM15,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMOVQ %RAX,%XMM13 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
VPEXTRQ $0x1,%XMM14,%RAX | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
CQTO | |||||||||||||||||
VPUNPCKLQDQ %XMM12,%XMM13,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 |
IDIV %RSI | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 |
VMOVQ %XMM10,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMOVQ %RAX,%XMM13 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
VMOVQ %XMM14,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
CQTO | |||||||||||||||||
IDIV %RSI | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 |
VPEXTRQ $0x1,%XMM15,%RSI | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VMOVQ %RAX,%XMM14 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
VPUNPCKLQDQ %XMM13,%XMM14,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 |
VEXTRACTI128 $0x1,%YMM0,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VPEXTRQ $0x1,%XMM14,%RAX | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VINSERTI128 $0x1,%XMM12,%YMM13,%YMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0.50 |
CQTO | |||||||||||||||||
IDIV %RSI | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVQ %XMM14,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMOVQ %RSI,%XMM13 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
VPEXTRQ $0x1,%XMM1,%RSI | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
CQTO | |||||||||||||||||
IDIV %RBX | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 |
VMOVQ %RAX,%XMM14 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
VPEXTRQ $0x1,%XMM0,%RAX | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
CQTO | |||||||||||||||||
VPUNPCKLQDQ %XMM13,%XMM14,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 |
IDIV %RSI | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 |
VMOVQ %XMM1,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMOVQ %RAX,%XMM14 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
VMOVQ %XMM0,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
CQTO | |||||||||||||||||
IDIV %RSI | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 |
ADD $-0x8,%R11 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVQ %RAX,%XMM15 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
VPUNPCKLQDQ %XMM14,%XMM15,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 |
VINSERTI128 $0x1,%XMM13,%YMM14,%YMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0.50 |
VINSERTI64X4 $0x1,%YMM12,%ZMM13,%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 |
VPMOVQD %ZMM12,%YMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 |
VPMULLQ %ZMM1,%ZMM12,%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %ZMM12,%ZMM0,%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 |
VPADDQ %ZMM11,%ZMM0,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 |
VPMOVQD %ZMM12,%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 |
VPADDD %YMM2,%YMM13,%YMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VPMOVSXDQ %YMM13,%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 |
VPADDD %YMM3,%YMM14,%YMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VPADDD %YMM6,%YMM14,%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VPMOVSXDQ %YMM12,%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 |
VPMULLQ %ZMM13,%ZMM4,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VPMULLQ %ZMM13,%ZMM5,%ZMM19 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VPMOVSXDQ %YMM14,%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 |
VPADDQ %ZMM12,%ZMM15,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 |
VEXTRACTI32X4 $0x1,%YMM15,%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 4 | 0.25 |
VMOVQ %XMM15,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VPEXTRQ $0x1,%XMM15,%RDX | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VMOVQ %XMM16,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VPEXTRQ $0x1,%XMM16,%RBX | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VEXTRACTI32X4 $0x2,%ZMM15,%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 |
VEXTRACTI32X4 $0x3,%ZMM15,%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 |
VMOVSD (%R8,%RAX,8),%XMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
VMOVQ %XMM16,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMOVQ %XMM15,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VPEXTRQ $0x1,%XMM16,%R9 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VPEXTRQ $0x1,%XMM15,%R14 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VMOVHPD (%R8,%RDX,8),%XMM17,%XMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 9 | 0.50 |
VMOVSD (%R8,%R12,8),%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVSD (%R8,%R10,8),%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVHPD (%R8,%R14,8),%XMM15,%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 9 | 0.50 |
VMOVHPD (%R8,%R9,8),%XMM16,%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 9 | 0.50 |
VINSERTF32X4 $0x1,%XMM15,%YMM16,%YMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0.50 |
VMOVSD (%R8,%RSI,8),%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVHPD (%R8,%RBX,8),%XMM16,%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 9 | 0.50 |
VINSERTF32X4 $0x1,%XMM16,%YMM17,%YMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0.50 |
VINSERTF64X4 $0x1,%YMM15,%ZMM16,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 |
VPADDQ %ZMM12,%ZMM19,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 |
VSCATTERQPD %ZMM15,(%RAX,%ZMM16,8){%K1} | 48 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 3.50 | 1.50 | 9 | 9 | 1-40 | 12.14 |
VPMULLQ %ZMM13,%ZMM7,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VPMULLQ %ZMM13,%ZMM8,%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
KXNORW %K0,%K0,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPADDQ %ZMM14,%ZMM16,%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 |
VEXTRACTI32X4 $0x1,%YMM14,%XMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 4 | 0.25 |
VMOVQ %XMM14,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VPEXTRQ $0x1,%XMM14,%RDX | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VMOVQ %XMM17,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VPEXTRQ $0x1,%XMM17,%R9 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VEXTRACTI32X4 $0x2,%ZMM14,%XMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 |
VEXTRACTI32X4 $0x3,%ZMM14,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 |
VMOVSD (%RDI,%RAX,8),%XMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVQ %XMM17,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMOVQ %XMM14,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VPEXTRQ $0x1,%XMM17,%RBX | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VPEXTRQ $0x1,%XMM14,%R12 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VMOVHPD (%RDI,%RDX,8),%XMM18,%XMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 9 | 0.50 |
VMOVSD (%RDI,%R14,8),%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVSD (%RDI,%R10,8),%XMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVHPD (%RDI,%R12,8),%XMM14,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 9 | 0.50 |
VMOVHPD (%RDI,%RBX,8),%XMM17,%XMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 9 | 0.50 |
VINSERTF32X4 $0x1,%XMM14,%YMM17,%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0.50 |
VMOVSD (%RDI,%RSI,8),%XMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVHPD (%RDI,%R9,8),%XMM17,%XMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 9 | 0.50 |
VINSERTF32X4 $0x1,%XMM17,%YMM18,%YMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0.50 |
VINSERTF64X4 $0x1,%YMM14,%ZMM17,%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 |
VADDPD %ZMM14,%ZMM15,%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 |
VPADDQ %ZMM12,%ZMM16,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 |
VPADDQ %ZMM12,%ZMM13,%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 |
VEXTRACTI32X4 $0x1,%YMM15,%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 4 | 0.25 |
VMOVQ %XMM15,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VPEXTRQ $0x1,%XMM15,%RDX | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VMOVQ %XMM16,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VPEXTRQ $0x1,%XMM16,%R9 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VEXTRACTI32X4 $0x2,%ZMM15,%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 |
VEXTRACTI32X4 $0x3,%ZMM15,%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 |
VMOVSD (%RDI,%RAX,8),%XMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV -0x50(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
VMOVQ %XMM16,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMOVQ %XMM15,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VPEXTRQ $0x1,%XMM16,%RBX | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VPEXTRQ $0x1,%XMM15,%R12 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VMOVHPD (%RDI,%RDX,8),%XMM17,%XMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 9 | 0.50 |
VMOVSD (%RDI,%R14,8),%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVSD (%RDI,%R10,8),%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVHPD (%RDI,%R12,8),%XMM15,%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 9 | 0.50 |
VMOVHPD (%RDI,%RBX,8),%XMM16,%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 9 | 0.50 |
VINSERTF32X4 $0x1,%XMM15,%YMM16,%YMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0.50 |
VMOVSD (%RDI,%RSI,8),%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVHPD (%RDI,%R9,8),%XMM16,%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 9 | 0.50 |
VINSERTF32X4 $0x1,%XMM16,%YMM17,%YMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0.50 |
VINSERTF64X4 $0x1,%YMM15,%ZMM16,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 |
VSUBPD %ZMM15,%ZMM14,%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 |
VSCATTERQPD %ZMM14,(%RAX,%ZMM12,8){%K1} | 48 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 3.50 | 1.50 | 9 | 9 | 1-40 | 12.14 |
JNE 238c10 <.omp_outlined..6+0x1a0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |