Loop Id: 200 | Module: exec | Source: build_field.cpp:119-128 [...] | Coverage: 0.08% |
---|
Loop Id: 200 | Module: exec | Source: build_field.cpp:119-128 [...] | Coverage: 0.08% |
---|
0x23d400 VEXTRACTI32X4 $0x3,%ZMM0,%XMM14 |
0x23d407 VPEXTRQ $0x1,%XMM10,%R12 |
0x23d40d KXNORW %K0,%K0,%K1 |
0x23d411 VPEXTRQ $0x1,%XMM14,%RAX |
0x23d417 CQTO |
0x23d419 IDIV %R12 |
0x23d41c VMOVQ %XMM10,%R12 |
0x23d421 VMOVQ %RAX,%XMM15 |
0x23d426 VMOVQ %XMM14,%RAX |
0x23d42b CQTO |
0x23d42d IDIV %R12 |
0x23d430 VPEXTRQ $0x1,%XMM11,%R12 |
0x23d436 VMOVQ %RAX,%XMM14 |
0x23d43b VPUNPCKLQDQ %XMM15,%XMM14,%XMM14 |
0x23d440 VEXTRACTI32X4 $0x2,%ZMM0,%XMM15 |
0x23d447 VPEXTRQ $0x1,%XMM15,%RAX |
0x23d44d CQTO |
0x23d44f IDIV %R12 |
0x23d452 VMOVQ %XMM11,%R12 |
0x23d457 VMOVQ %RAX,%XMM16 |
0x23d45d VMOVQ %XMM15,%RAX |
0x23d462 CQTO |
0x23d464 IDIV %R12 |
0x23d467 VMOVQ %RAX,%XMM15 |
0x23d46c VPUNPCKLQDQ %XMM16,%XMM15,%XMM15 |
0x23d472 VEXTRACTI32X4 $0x1,%YMM1,%XMM16 |
0x23d479 VINSERTI128 $0x1,%XMM14,%YMM15,%YMM14 |
0x23d47f VEXTRACTI128 $0x1,%YMM0,%XMM15 |
0x23d485 VPEXTRQ $0x1,%XMM16,%R12 |
0x23d48c VPEXTRQ $0x1,%XMM15,%RAX |
0x23d492 CQTO |
0x23d494 IDIV %R12 |
0x23d497 VMOVQ %XMM16,%R12 |
0x23d49d VMOVQ %RAX,%XMM17 |
0x23d4a3 VMOVQ %XMM15,%RAX |
0x23d4a8 CQTO |
0x23d4aa IDIV %R12 |
0x23d4ad VPEXTRQ $0x1,%XMM1,%R12 |
0x23d4b3 VMOVQ %RAX,%XMM15 |
0x23d4b8 VPEXTRQ $0x1,%XMM0,%RAX |
0x23d4be CQTO |
0x23d4c0 VPUNPCKLQDQ %XMM17,%XMM15,%XMM15 |
0x23d4c6 IDIV %R12 |
0x23d4c9 VMOVQ %XMM1,%R12 |
0x23d4ce VMOVQ %RAX,%XMM16 |
0x23d4d4 VMOVQ %XMM0,%RAX |
0x23d4d9 CQTO |
0x23d4db IDIV %R12 |
0x23d4de ADD $-0x8,%R14 |
0x23d4e2 VMOVQ %RAX,%XMM17 |
0x23d4e8 VPUNPCKLQDQ %XMM16,%XMM17,%XMM16 |
0x23d4ee VINSERTI32X4 $0x1,%XMM15,%YMM16,%YMM15 |
0x23d4f5 VINSERTI64X4 $0x1,%YMM14,%ZMM15,%ZMM14 |
0x23d4fc VPMULLQ %ZMM1,%ZMM14,%ZMM15 |
0x23d502 VPSLLQ $0x20,%ZMM14,%ZMM14 |
0x23d509 VPSRAQ $0x20,%ZMM14,%ZMM14 |
0x23d510 VPMULLQ %ZMM2,%ZMM14,%ZMM16 |
0x23d516 VPMULLQ %ZMM3,%ZMM14,%ZMM18 |
0x23d51c VPMULLQ %ZMM4,%ZMM14,%ZMM17 |
0x23d522 VPSUBQ %ZMM15,%ZMM0,%ZMM15 |
0x23d528 VPADDQ %ZMM13,%ZMM0,%ZMM0 |
0x23d52e VPSLLQ $0x20,%ZMM15,%ZMM15 |
0x23d535 VPSRAQ $0x20,%ZMM15,%ZMM15 |
0x23d53c VPADDQ %ZMM16,%ZMM15,%ZMM16 |
0x23d542 VSCATTERQPD %ZMM12,(%RDI,%ZMM16,8){%K1} [1] |
0x23d549 VPADDQ %ZMM18,%ZMM15,%ZMM16 |
0x23d54f KXNORW %K0,%K0,%K1 |
0x23d553 VPMULLQ %ZMM5,%ZMM14,%ZMM18 |
0x23d559 VSCATTERQPD %ZMM12,(%RBX,%ZMM16,8){%K1} [5] |
0x23d560 VPADDQ %ZMM17,%ZMM15,%ZMM16 |
0x23d566 VPMULLQ %ZMM6,%ZMM14,%ZMM17 |
0x23d56c KXNORW %K0,%K0,%K1 |
0x23d570 VSCATTERQPD %ZMM12,(%R13,%ZMM16,8){%K1} [4] |
0x23d578 KXNORW %K0,%K0,%K1 |
0x23d57c VPADDQ %ZMM18,%ZMM15,%ZMM16 |
0x23d582 VPMULLQ %ZMM7,%ZMM14,%ZMM18 |
0x23d588 VSCATTERQPD %ZMM12,(%RSI,%ZMM16,8){%K1} [7] |
0x23d58f VPADDQ %ZMM17,%ZMM15,%ZMM16 |
0x23d595 VPMULLQ %ZMM8,%ZMM14,%ZMM17 |
0x23d59b KXNORW %K0,%K0,%K1 |
0x23d59f VPMULLQ %ZMM9,%ZMM14,%ZMM14 |
0x23d5a5 VSCATTERQPD %ZMM12,(%R9,%ZMM16,8){%K1} [6] |
0x23d5ac KXNORW %K0,%K0,%K1 |
0x23d5b0 VPADDQ %ZMM18,%ZMM15,%ZMM16 |
0x23d5b6 VSCATTERQPD %ZMM12,(%R11,%ZMM16,8){%K1} [8] |
0x23d5bd VPADDQ %ZMM17,%ZMM15,%ZMM16 |
0x23d5c3 KXNORW %K0,%K0,%K1 |
0x23d5c7 VPADDQ %ZMM14,%ZMM15,%ZMM14 |
0x23d5cd VSCATTERQPD %ZMM12,(%R10,%ZMM16,8){%K1} [2] |
0x23d5d4 KXNORW %K0,%K0,%K1 |
0x23d5d8 VSCATTERQPD %ZMM12,(%R8,%ZMM14,8){%K1} [3] |
0x23d5df JNE 23d400 |
/beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/build_field.cpp: 119 - 128 |
-------------------------------------------------------------------------------- |
119: for (int j = (0); j < (yrange); j++) { |
120: for (int i = (0); i < (xrange); i++) { |
121: field.density0(i, j) = 0.0; |
122: field.density1(i, j) = 0.0; |
123: field.energy0(i, j) = 0.0; |
124: field.energy1(i, j) = 0.0; |
125: field.pressure(i, j) = 0.0; |
126: field.viscosity(i, j) = 0.0; |
127: field.soundspeed(i, j) = 0.0; |
128: field.volume(i, j) = 0.0; |
/beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/context.h: 69 - 69 |
-------------------------------------------------------------------------------- |
69: T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; } |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 - 1.20 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.05 - 1.25 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.01 - 1.20 |
Bottlenecks | P8, P9, |
Function | .omp_outlined..2#0x23d1f0 |
Source | build_field.cpp:119-128,context.h:69-69 |
Source loop unroll info | unrolled by 8 |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | main |
Unroll factor | 8 |
CQA cycles | 80.00 - 96.00 |
CQA cycles if no scalar integer | 80.00 |
CQA cycles if FP arith vectorized | 80.00 - 96.00 |
CQA cycles if fully vectorized | 76.50 |
Front-end cycles | 79.33 |
DIV/SQRT cycles | 16.00 |
P0 cycles | 0.50 |
P1 cycles | 8.00 |
P2 cycles | 0.50 |
P3 cycles | 1.00 |
P4 cycles | 0.00 |
P5 cycles | 0.00 |
P6 cycles | 0.00 |
P7 cycles | 20.50 |
P8 cycles | 31.17 |
P9 cycles | 31.17 |
P10 cycles | 31.17 |
P11 cycles | 80.00 |
P12 cycles | 80.00 |
P13 cycles | 56.00 - 96.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 92.00 |
Nb uops | 476.00 |
Nb loads | 8.00 |
Nb stores | 8.00 |
Nb stack references | 0.00 |
FLOP/cycle | 0.00 - 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 5.33 - 6.40 |
Bytes prefetched | 0.00 |
Bytes loaded | 0.00 |
Bytes stored | 512.00 |
Stride 0 | 0.00 |
Stride 1 | 0.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 8.00 |
Vectorization ratio all | 46.34 |
Vectorization ratio load | NA |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 23.40 |
Vector-efficiency ratio all | 46.95 |
Vector-efficiency ratio load | NA |
Vector-efficiency ratio store | 100.00 |
Vector-efficiency ratio mul | 100.00 |
Vector-efficiency ratio add_sub | 100.00 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 22.34 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 - 1.20 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.05 - 1.25 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.01 - 1.20 |
Bottlenecks | P8, P9, |
Function | .omp_outlined..2#0x23d1f0 |
Source | build_field.cpp:119-128,context.h:69-69 |
Source loop unroll info | unrolled by 8 |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | main |
Unroll factor | 8 |
CQA cycles | 80.00 - 96.00 |
CQA cycles if no scalar integer | 80.00 |
CQA cycles if FP arith vectorized | 80.00 - 96.00 |
CQA cycles if fully vectorized | 76.50 |
Front-end cycles | 79.33 |
DIV/SQRT cycles | 16.00 |
P0 cycles | 0.50 |
P1 cycles | 8.00 |
P2 cycles | 0.50 |
P3 cycles | 1.00 |
P4 cycles | 0.00 |
P5 cycles | 0.00 |
P6 cycles | 0.00 |
P7 cycles | 20.50 |
P8 cycles | 31.17 |
P9 cycles | 31.17 |
P10 cycles | 31.17 |
P11 cycles | 80.00 |
P12 cycles | 80.00 |
P13 cycles | 56.00 - 96.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 92.00 |
Nb uops | 476.00 |
Nb loads | 8.00 |
Nb stores | 8.00 |
Nb stack references | 0.00 |
FLOP/cycle | 0.00 - 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 5.33 - 6.40 |
Bytes prefetched | 0.00 |
Bytes loaded | 0.00 |
Bytes stored | 512.00 |
Stride 0 | 0.00 |
Stride 1 | 0.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 8.00 |
Vectorization ratio all | 46.34 |
Vectorization ratio load | NA |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 23.40 |
Vector-efficiency ratio all | 46.95 |
Vector-efficiency ratio load | NA |
Vector-efficiency ratio store | 100.00 |
Vector-efficiency ratio mul | 100.00 |
Vector-efficiency ratio add_sub | 100.00 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 22.34 |
Path / |
Function | .omp_outlined..2#0x23d1f0 |
Source file and lines | build_field.cpp:119-128 |
Module | exec |
nb instructions | 92 |
nb uops | 476 |
loop length | 485 |
used x86 registers | 11 |
used mmx registers | 0 |
used xmm registers | 8 |
used ymm registers | 5 |
used zmm registers | 17 |
nb stack references | 0 |
micro-operation queue | 79.33 cycles |
front end | 79.33 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 16.00 | 0.50 | 8.00 | 0.50 | 1.00 | 0.00 | 0.00 | 0.00 | 20.50 | 31.17 | 31.17 | 31.17 | 80.00 | 80.00 |
cycles | 16.00 | 0.50 | 8.00 | 0.50 | 1.00 | 0.00 | 0.00 | 0.00 | 20.50 | 31.17 | 31.17 | 31.17 | 80.00 | 80.00 |
Cycles executing div or sqrt instructions | 56.00-96.00 |
Longest recurrence chain latency (RecMII) | 1.00 |
Front-end | 79.33 |
Dispatch | 80.00 |
DIV/SQRT | 56.00-96.00 |
Data deps. | 1.00 |
Overall L1 | 80.00-96.00 |
all | 40% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 20% |
all | 100% |
load | NA (no load vectorizable/vectorized instructions) |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 46% |
load | NA (no load vectorizable/vectorized instructions) |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 23% |
all | 41% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 20% |
all | 100% |
load | NA (no load vectorizable/vectorized instructions) |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 46% |
load | NA (no load vectorizable/vectorized instructions) |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 22% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VEXTRACTI32X4 $0x3,%ZMM0,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 |
VPEXTRQ $0x1,%XMM10,%R12 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
KXNORW %K0,%K0,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPEXTRQ $0x1,%XMM14,%RAX | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
CQTO | |||||||||||||||||
IDIV %R12 | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 |
VMOVQ %XMM10,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMOVQ %RAX,%XMM15 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
VMOVQ %XMM14,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
CQTO | |||||||||||||||||
IDIV %R12 | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 |
VPEXTRQ $0x1,%XMM11,%R12 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VMOVQ %RAX,%XMM14 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
VPUNPCKLQDQ %XMM15,%XMM14,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 |
VEXTRACTI32X4 $0x2,%ZMM0,%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 |
VPEXTRQ $0x1,%XMM15,%RAX | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
CQTO | |||||||||||||||||
IDIV %R12 | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 |
VMOVQ %XMM11,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMOVQ %RAX,%XMM16 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
VMOVQ %XMM15,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
CQTO | |||||||||||||||||
IDIV %R12 | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 |
VMOVQ %RAX,%XMM15 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
VPUNPCKLQDQ %XMM16,%XMM15,%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 |
VEXTRACTI32X4 $0x1,%YMM1,%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 4 | 0.25 |
VINSERTI128 $0x1,%XMM14,%YMM15,%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0.50 |
VEXTRACTI128 $0x1,%YMM0,%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VPEXTRQ $0x1,%XMM16,%R12 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VPEXTRQ $0x1,%XMM15,%RAX | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
CQTO | |||||||||||||||||
IDIV %R12 | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 |
VMOVQ %XMM16,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMOVQ %RAX,%XMM17 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
VMOVQ %XMM15,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
CQTO | |||||||||||||||||
IDIV %R12 | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 |
VPEXTRQ $0x1,%XMM1,%R12 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VMOVQ %RAX,%XMM15 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
VPEXTRQ $0x1,%XMM0,%RAX | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
CQTO | |||||||||||||||||
VPUNPCKLQDQ %XMM17,%XMM15,%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 |
IDIV %R12 | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 |
VMOVQ %XMM1,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMOVQ %RAX,%XMM16 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
VMOVQ %XMM0,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
CQTO | |||||||||||||||||
IDIV %R12 | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 |
ADD $-0x8,%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVQ %RAX,%XMM17 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
VPUNPCKLQDQ %XMM16,%XMM17,%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 |
VINSERTI32X4 $0x1,%XMM15,%YMM16,%YMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0.50 |
VINSERTI64X4 $0x1,%YMM14,%ZMM15,%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 |
VPMULLQ %ZMM1,%ZMM14,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSLLQ $0x20,%ZMM14,%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 1 |
VPSRAQ $0x20,%ZMM14,%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 1 |
VPMULLQ %ZMM2,%ZMM14,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VPMULLQ %ZMM3,%ZMM14,%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VPMULLQ %ZMM4,%ZMM14,%ZMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %ZMM15,%ZMM0,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 |
VPADDQ %ZMM13,%ZMM0,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 |
VPSLLQ $0x20,%ZMM15,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 1 |
VPSRAQ $0x20,%ZMM15,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 1 |
VPADDQ %ZMM16,%ZMM15,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 |
VSCATTERQPD %ZMM12,(%RDI,%ZMM16,8){%K1} | 48 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 3.50 | 1.50 | 9 | 9 | 1-40 | 12.14 |
VPADDQ %ZMM18,%ZMM15,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 |
KXNORW %K0,%K0,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPMULLQ %ZMM5,%ZMM14,%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VSCATTERQPD %ZMM12,(%RBX,%ZMM16,8){%K1} | 48 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 3.50 | 1.50 | 9 | 9 | 1-40 | 12.14 |
VPADDQ %ZMM17,%ZMM15,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 |
VPMULLQ %ZMM6,%ZMM14,%ZMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
KXNORW %K0,%K0,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VSCATTERQPD %ZMM12,(%R13,%ZMM16,8){%K1} | 48 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 3.50 | 1.50 | 9 | 9 | 1-40 | 12.14 |
KXNORW %K0,%K0,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPADDQ %ZMM18,%ZMM15,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 |
VPMULLQ %ZMM7,%ZMM14,%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VSCATTERQPD %ZMM12,(%RSI,%ZMM16,8){%K1} | 48 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 3.50 | 1.50 | 9 | 9 | 1-40 | 12.14 |
VPADDQ %ZMM17,%ZMM15,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 |
VPMULLQ %ZMM8,%ZMM14,%ZMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
KXNORW %K0,%K0,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPMULLQ %ZMM9,%ZMM14,%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VSCATTERQPD %ZMM12,(%R9,%ZMM16,8){%K1} | 48 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 3.50 | 1.50 | 9 | 9 | 1-40 | 12.14 |
KXNORW %K0,%K0,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPADDQ %ZMM18,%ZMM15,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 |
VSCATTERQPD %ZMM12,(%R11,%ZMM16,8){%K1} | 48 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 3.50 | 1.50 | 9 | 9 | 1-40 | 12.14 |
VPADDQ %ZMM17,%ZMM15,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 |
KXNORW %K0,%K0,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPADDQ %ZMM14,%ZMM15,%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 |
VSCATTERQPD %ZMM12,(%R10,%ZMM16,8){%K1} | 48 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 3.50 | 1.50 | 9 | 9 | 1-40 | 12.14 |
KXNORW %K0,%K0,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VSCATTERQPD %ZMM12,(%R8,%ZMM14,8){%K1} | 48 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 3.50 | 1.50 | 9 | 9 | 1-40 | 12.14 |
JNE 23d400 <.omp_outlined..2+0x210> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
Function | .omp_outlined..2#0x23d1f0 |
Source file and lines | build_field.cpp:119-128 |
Module | exec |
nb instructions | 92 |
nb uops | 476 |
loop length | 485 |
used x86 registers | 11 |
used mmx registers | 0 |
used xmm registers | 8 |
used ymm registers | 5 |
used zmm registers | 17 |
nb stack references | 0 |
micro-operation queue | 79.33 cycles |
front end | 79.33 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 16.00 | 0.50 | 8.00 | 0.50 | 1.00 | 0.00 | 0.00 | 0.00 | 20.50 | 31.17 | 31.17 | 31.17 | 80.00 | 80.00 |
cycles | 16.00 | 0.50 | 8.00 | 0.50 | 1.00 | 0.00 | 0.00 | 0.00 | 20.50 | 31.17 | 31.17 | 31.17 | 80.00 | 80.00 |
Cycles executing div or sqrt instructions | 56.00-96.00 |
Longest recurrence chain latency (RecMII) | 1.00 |
Front-end | 79.33 |
Dispatch | 80.00 |
DIV/SQRT | 56.00-96.00 |
Data deps. | 1.00 |
Overall L1 | 80.00-96.00 |
all | 40% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 20% |
all | 100% |
load | NA (no load vectorizable/vectorized instructions) |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 46% |
load | NA (no load vectorizable/vectorized instructions) |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 23% |
all | 41% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 20% |
all | 100% |
load | NA (no load vectorizable/vectorized instructions) |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 46% |
load | NA (no load vectorizable/vectorized instructions) |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 22% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VEXTRACTI32X4 $0x3,%ZMM0,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 |
VPEXTRQ $0x1,%XMM10,%R12 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
KXNORW %K0,%K0,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPEXTRQ $0x1,%XMM14,%RAX | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
CQTO | |||||||||||||||||
IDIV %R12 | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 |
VMOVQ %XMM10,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMOVQ %RAX,%XMM15 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
VMOVQ %XMM14,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
CQTO | |||||||||||||||||
IDIV %R12 | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 |
VPEXTRQ $0x1,%XMM11,%R12 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VMOVQ %RAX,%XMM14 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
VPUNPCKLQDQ %XMM15,%XMM14,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 |
VEXTRACTI32X4 $0x2,%ZMM0,%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 |
VPEXTRQ $0x1,%XMM15,%RAX | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
CQTO | |||||||||||||||||
IDIV %R12 | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 |
VMOVQ %XMM11,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMOVQ %RAX,%XMM16 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
VMOVQ %XMM15,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
CQTO | |||||||||||||||||
IDIV %R12 | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 |
VMOVQ %RAX,%XMM15 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
VPUNPCKLQDQ %XMM16,%XMM15,%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 |
VEXTRACTI32X4 $0x1,%YMM1,%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 4 | 0.25 |
VINSERTI128 $0x1,%XMM14,%YMM15,%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0.50 |
VEXTRACTI128 $0x1,%YMM0,%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 |
VPEXTRQ $0x1,%XMM16,%R12 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VPEXTRQ $0x1,%XMM15,%RAX | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
CQTO | |||||||||||||||||
IDIV %R12 | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 |
VMOVQ %XMM16,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMOVQ %RAX,%XMM17 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
VMOVQ %XMM15,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
CQTO | |||||||||||||||||
IDIV %R12 | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 |
VPEXTRQ $0x1,%XMM1,%R12 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
VMOVQ %RAX,%XMM15 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
VPEXTRQ $0x1,%XMM0,%RAX | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 6 | 1 |
CQTO | |||||||||||||||||
VPUNPCKLQDQ %XMM17,%XMM15,%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 |
IDIV %R12 | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 |
VMOVQ %XMM1,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMOVQ %RAX,%XMM16 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
VMOVQ %XMM0,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
CQTO | |||||||||||||||||
IDIV %R12 | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 |
ADD $-0x8,%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVQ %RAX,%XMM17 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
VPUNPCKLQDQ %XMM16,%XMM17,%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 |
VINSERTI32X4 $0x1,%XMM15,%YMM16,%YMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0.50 |
VINSERTI64X4 $0x1,%YMM14,%ZMM15,%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 |
VPMULLQ %ZMM1,%ZMM14,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSLLQ $0x20,%ZMM14,%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 1 |
VPSRAQ $0x20,%ZMM14,%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 1 |
VPMULLQ %ZMM2,%ZMM14,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VPMULLQ %ZMM3,%ZMM14,%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VPMULLQ %ZMM4,%ZMM14,%ZMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %ZMM15,%ZMM0,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 |
VPADDQ %ZMM13,%ZMM0,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 |
VPSLLQ $0x20,%ZMM15,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 1 |
VPSRAQ $0x20,%ZMM15,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 1 |
VPADDQ %ZMM16,%ZMM15,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 |
VSCATTERQPD %ZMM12,(%RDI,%ZMM16,8){%K1} | 48 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 3.50 | 1.50 | 9 | 9 | 1-40 | 12.14 |
VPADDQ %ZMM18,%ZMM15,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 |
KXNORW %K0,%K0,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPMULLQ %ZMM5,%ZMM14,%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VSCATTERQPD %ZMM12,(%RBX,%ZMM16,8){%K1} | 48 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 3.50 | 1.50 | 9 | 9 | 1-40 | 12.14 |
VPADDQ %ZMM17,%ZMM15,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 |
VPMULLQ %ZMM6,%ZMM14,%ZMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
KXNORW %K0,%K0,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VSCATTERQPD %ZMM12,(%R13,%ZMM16,8){%K1} | 48 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 3.50 | 1.50 | 9 | 9 | 1-40 | 12.14 |
KXNORW %K0,%K0,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPADDQ %ZMM18,%ZMM15,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 |
VPMULLQ %ZMM7,%ZMM14,%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VSCATTERQPD %ZMM12,(%RSI,%ZMM16,8){%K1} | 48 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 3.50 | 1.50 | 9 | 9 | 1-40 | 12.14 |
VPADDQ %ZMM17,%ZMM15,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 |
VPMULLQ %ZMM8,%ZMM14,%ZMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
KXNORW %K0,%K0,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPMULLQ %ZMM9,%ZMM14,%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 |
VSCATTERQPD %ZMM12,(%R9,%ZMM16,8){%K1} | 48 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 3.50 | 1.50 | 9 | 9 | 1-40 | 12.14 |
KXNORW %K0,%K0,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPADDQ %ZMM18,%ZMM15,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 |
VSCATTERQPD %ZMM12,(%R11,%ZMM16,8){%K1} | 48 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 3.50 | 1.50 | 9 | 9 | 1-40 | 12.14 |
VPADDQ %ZMM17,%ZMM15,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 |
KXNORW %K0,%K0,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPADDQ %ZMM14,%ZMM15,%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 |
VSCATTERQPD %ZMM12,(%R10,%ZMM16,8){%K1} | 48 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 3.50 | 1.50 | 9 | 9 | 1-40 | 12.14 |
KXNORW %K0,%K0,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VSCATTERQPD %ZMM12,(%R8,%ZMM14,8){%K1} | 48 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 3.50 | 1.50 | 9 | 9 | 1-40 | 12.14 |
JNE 23d400 <.omp_outlined..2+0x210> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |