Function: _Z14generate_chunkiR16global_variables._omp_fn.0 | Module: exec | Source: generate_chunk.cpp:74-80 [...] | Coverage: 0.04% |
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Function: _Z14generate_chunkiR16global_variables._omp_fn.0 | Module: exec | Source: generate_chunk.cpp:74-80 [...] | Coverage: 0.04% |
---|
/beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/generate_chunk.cpp: 74 - 80 |
-------------------------------------------------------------------------------- |
74: #pragma omp parallel for simd collapse(2) |
75: for (int j = (0); j < (yrange); j++) { |
76: for (int i = (0); i < (xrange); i++) { |
77: field.energy0(i, j) = state_energy[0]; |
78: field.density0(i, j) = state_density[0]; |
79: field.xvel0(i, j) = state_xvel[0]; |
80: field.yvel0(i, j) = state_yvel[0]; |
/beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/context.h: 46 - 69 |
-------------------------------------------------------------------------------- |
46: T &operator[](size_t i) const { return data[i]; } |
[...] |
69: T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; } |
0x4389a0 PUSH %RBP |
0x4389a1 MOV %RSP,%RBP |
0x4389a4 PUSH %R15 |
0x4389a6 PUSH %R14 |
0x4389a8 PUSH %R13 |
0x4389aa PUSH %R12 |
0x4389ac PUSH %RBX |
0x4389ad AND $-0x40,%RSP |
0x4389b1 SUB $0x40,%RSP |
0x4389b5 MOV 0x2c(%RDI),%EBX |
0x4389b8 MOV 0x28(%RDI),%R15D |
0x4389bc MOV %EBX,0xc(%RSP) |
0x4389c0 MOV %R15D,0x8(%RSP) |
0x4389c5 TEST %EBX,%EBX |
0x4389c7 JLE 438f23 |
0x4389cd TEST %R15D,%R15D |
0x4389d0 JLE 438f23 |
0x4389d6 MOV %RDI,%R13 |
0x4389d9 CALL 404650 <omp_get_num_threads@plt> |
0x4389de MOV %EAX,%R14D |
0x4389e1 CALL 404540 <omp_get_thread_num@plt> |
0x4389e6 XOR %EDX,%EDX |
0x4389e8 MOV %EAX,%ESI |
0x4389ea MOV %EBX,%EAX |
0x4389ec IMUL %R15D,%EAX |
0x4389f0 DIV %R14D |
0x4389f3 MOV %EAX,%ECX |
0x4389f5 CMP %EDX,%ESI |
0x4389f7 JB 438f4d |
0x4389fd IMUL %ECX,%ESI |
0x438a00 ADD %EDX,%ESI |
0x438a02 LEA (%RCX,%RSI,1),%EDI |
0x438a05 MOV %EDI,0x4(%RSP) |
0x438a09 CMP %EDI,%ESI |
0x438a0b JAE 438f23 |
0x438a11 MOV 0x8(%RSP),%R8D |
0x438a16 MOV %ESI,%EAX |
0x438a18 XOR %EDX,%EDX |
0x438a1a VMOVQ 0x8(%R13),%XMM17 |
0x438a21 VMOVQ (%R13),%XMM16 |
0x438a28 VMOVQ 0x10(%R13),%XMM15 |
0x438a2e MOV 0x20(%R13),%R14 |
0x438a32 VMOVQ 0x18(%R13),%XMM14 |
0x438a38 DIV %R8D |
0x438a3b VMOVDQA64 %XMM17,%XMM4 |
0x438a41 SUB %EDX,%R8D |
0x438a44 MOVSXD %EAX,%RDI |
0x438a47 MOV %EDX,0x34(%RSP) |
0x438a4b MOV %R8D,%R12D |
0x438a4e XCHG %AX,%AX |
(232) 0x438a50 CMP %R12D,%ECX |
(232) 0x438a53 CMOVA %R12D,%ECX |
(232) 0x438a57 LEA (%RSI,%RCX,1),%R9D |
(232) 0x438a5b MOV %R9D,0x30(%RSP) |
(232) 0x438a60 CMP %R9D,%ESI |
(232) 0x438a63 JAE 438efa |
(232) 0x438a69 VMOVQ %XMM4,%R10 |
(232) 0x438a6e VMOVQ %XMM16,%R12 |
(232) 0x438a74 MOV 0x30(%R14),%RBX |
(232) 0x438a78 MOV (%R14),%RDX |
(232) 0x438a7b MOV 0x8(%R10),%R11 |
(232) 0x438a7f MOV 0xd8(%R14),%RAX |
(232) 0x438a86 MOV 0x8(%R12),%R10 |
(232) 0x438a8b VMOVQ %XMM15,%R15 |
(232) 0x438a90 MOV 0xa8(%R14),%R12 |
(232) 0x438a97 VMOVQ %XMM14,%R13 |
(232) 0x438a9c LEA -0x1(%RCX),%R8D |
(232) 0x438aa0 MOV 0x8(%R15),%R9 |
(232) 0x438aa4 VMOVQ 0x40(%R14),%XMM12 |
(232) 0x438aaa VMOVQ 0x10(%R14),%XMM11 |
(232) 0x438ab0 MOV 0x8(%R13),%R15 |
(232) 0x438ab4 VMOVQ 0xb8(%R14),%XMM0 |
(232) 0x438abd VMOVQ 0xe8(%R14),%XMM9 |
(232) 0x438ac6 IMUL %RDI,%RBX |
(232) 0x438aca IMUL %RDI,%RDX |
(232) 0x438ace IMUL %RDI,%R12 |
(232) 0x438ad2 IMUL %RDI,%RAX |
(232) 0x438ad6 MOV %RBX,0x18(%RSP) |
(232) 0x438adb MOV %RDX,0x20(%RSP) |
(232) 0x438ae0 MOV %R12,0x28(%RSP) |
(232) 0x438ae5 MOV %RAX,0x38(%RSP) |
(232) 0x438aea CMP $0x6,%R8D |
(232) 0x438aee JBE 438f40 |
(232) 0x438af4 MOVSXD 0x34(%RSP),%RAX |
(232) 0x438af9 LEA (%RBX,%RAX,1),%R8 |
(232) 0x438afd VMOVQ %XMM12,%RBX |
(232) 0x438b02 LEA (%R12,%RAX,1),%R12 |
(232) 0x438b06 LEA (%RBX,%R8,8),%R13 |
(232) 0x438b0a LEA (%RDX,%RAX,1),%R8 |
(232) 0x438b0e VMOVQ %XMM11,%RDX |
(232) 0x438b13 LEA (%RDX,%R8,8),%RBX |
(232) 0x438b17 VMOVQ %XMM0,%R8 |
(232) 0x438b1c LEA (%R8,%R12,8),%RDX |
(232) 0x438b20 MOV 0x38(%RSP),%R12 |
(232) 0x438b25 VMOVQ %XMM9,%R8 |
(232) 0x438b2a ADD %R12,%RAX |
(232) 0x438b2d LEA (%R8,%RAX,8),%R12 |
(232) 0x438b31 MOV %ECX,%R8D |
(232) 0x438b34 XOR %EAX,%EAX |
(232) 0x438b36 SHR $0x3,%R8D |
(232) 0x438b3a SAL $0x6,%R8 |
(232) 0x438b3e MOV %R8,0x10(%RSP) |
(232) 0x438b43 SUB $0x40,%R8 |
(232) 0x438b47 SHR $0x6,%R8 |
(232) 0x438b4b INC %R8 |
(232) 0x438b4e AND $0x3,%R8D |
(232) 0x438b52 JE 438c18 |
(232) 0x438b58 CMP $0x1,%R8 |
(232) 0x438b5c JE 438bd4 |
(232) 0x438b5e CMP $0x2,%R8 |
(232) 0x438b62 JE 438b9b |
(232) 0x438b64 VBROADCASTSD (%R11),%ZMM13 |
(232) 0x438b6a MOV $0x40,%EAX |
(232) 0x438b6f VMOVUPD %ZMM13,(%R13) |
(232) 0x438b76 VBROADCASTSD (%R10),%ZMM1 |
(232) 0x438b7c VMOVUPD %ZMM1,(%RBX) |
(232) 0x438b82 VBROADCASTSD (%R9),%ZMM2 |
(232) 0x438b88 VMOVUPD %ZMM2,(%RDX) |
(232) 0x438b8e VBROADCASTSD (%R15),%ZMM3 |
(232) 0x438b94 VMOVUPD %ZMM3,(%R12) |
(232) 0x438b9b VBROADCASTSD (%R11),%ZMM5 |
(232) 0x438ba1 VMOVUPD %ZMM5,(%R13,%RAX,1) |
(232) 0x438ba9 VBROADCASTSD (%R10),%ZMM6 |
(232) 0x438baf VMOVUPD %ZMM6,(%RBX,%RAX,1) |
(232) 0x438bb6 VBROADCASTSD (%R9),%ZMM7 |
(232) 0x438bbc VMOVUPD %ZMM7,(%RDX,%RAX,1) |
(232) 0x438bc3 VBROADCASTSD (%R15),%ZMM8 |
(232) 0x438bc9 VMOVUPD %ZMM8,(%R12,%RAX,1) |
(232) 0x438bd0 ADD $0x40,%RAX |
(232) 0x438bd4 VBROADCASTSD (%R11),%ZMM10 |
(232) 0x438bda VMOVUPD %ZMM10,(%R13,%RAX,1) |
(232) 0x438be2 VBROADCASTSD (%R10),%ZMM13 |
(232) 0x438be8 VMOVUPD %ZMM13,(%RBX,%RAX,1) |
(232) 0x438bef VBROADCASTSD (%R9),%ZMM1 |
(232) 0x438bf5 VMOVUPD %ZMM1,(%RDX,%RAX,1) |
(232) 0x438bfc VBROADCASTSD (%R15),%ZMM2 |
(232) 0x438c02 VMOVUPD %ZMM2,(%R12,%RAX,1) |
(232) 0x438c09 ADD $0x40,%RAX |
(232) 0x438c0d CMP %RAX,0x10(%RSP) |
(232) 0x438c12 JE 438d06 |
(233) 0x438c18 VBROADCASTSD (%R11),%ZMM3 |
(233) 0x438c1e VMOVUPD %ZMM3,(%R13,%RAX,1) |
(233) 0x438c26 VBROADCASTSD (%R10),%ZMM5 |
(233) 0x438c2c VMOVUPD %ZMM5,(%RBX,%RAX,1) |
(233) 0x438c33 VBROADCASTSD (%R9),%ZMM6 |
(233) 0x438c39 VMOVUPD %ZMM6,(%RDX,%RAX,1) |
(233) 0x438c40 VBROADCASTSD (%R15),%ZMM7 |
(233) 0x438c46 VMOVUPD %ZMM7,(%R12,%RAX,1) |
(233) 0x438c4d VBROADCASTSD (%R11),%ZMM8 |
(233) 0x438c53 VMOVUPD %ZMM8,0x40(%R13,%RAX,1) |
(233) 0x438c5b VBROADCASTSD (%R10),%ZMM10 |
(233) 0x438c61 VMOVUPD %ZMM10,0x40(%RBX,%RAX,1) |
(233) 0x438c69 VBROADCASTSD (%R9),%ZMM13 |
(233) 0x438c6f VMOVUPD %ZMM13,0x40(%RDX,%RAX,1) |
(233) 0x438c77 VBROADCASTSD (%R15),%ZMM1 |
(233) 0x438c7d VMOVUPD %ZMM1,0x40(%R12,%RAX,1) |
(233) 0x438c85 VBROADCASTSD (%R11),%ZMM2 |
(233) 0x438c8b VMOVUPD %ZMM2,0x80(%R13,%RAX,1) |
(233) 0x438c93 VBROADCASTSD (%R10),%ZMM3 |
(233) 0x438c99 VMOVUPD %ZMM3,0x80(%RBX,%RAX,1) |
(233) 0x438ca1 VBROADCASTSD (%R9),%ZMM5 |
(233) 0x438ca7 VMOVUPD %ZMM5,0x80(%RDX,%RAX,1) |
(233) 0x438caf VBROADCASTSD (%R15),%ZMM6 |
(233) 0x438cb5 VMOVUPD %ZMM6,0x80(%R12,%RAX,1) |
(233) 0x438cbd VBROADCASTSD (%R11),%ZMM7 |
(233) 0x438cc3 VMOVUPD %ZMM7,0xc0(%R13,%RAX,1) |
(233) 0x438ccb VBROADCASTSD (%R10),%ZMM8 |
(233) 0x438cd1 VMOVUPD %ZMM8,0xc0(%RBX,%RAX,1) |
(233) 0x438cd9 VBROADCASTSD (%R9),%ZMM10 |
(233) 0x438cdf VMOVUPD %ZMM10,0xc0(%RDX,%RAX,1) |
(233) 0x438ce7 VBROADCASTSD (%R15),%ZMM13 |
(233) 0x438ced VMOVUPD %ZMM13,0xc0(%R12,%RAX,1) |
(233) 0x438cf5 ADD $0x100,%RAX |
(233) 0x438cfb CMP %RAX,0x10(%RSP) |
(233) 0x438d00 JNE 438c18 |
(232) 0x438d06 MOV 0x34(%RSP),%EBX |
(232) 0x438d0a MOV %ECX,%R13D |
(232) 0x438d0d AND $-0x8,%R13D |
(232) 0x438d11 ADD %R13D,%ESI |
(232) 0x438d14 LEA (%R13,%RBX,1),%R12D |
(232) 0x438d19 TEST $0x7,%CL |
(232) 0x438d1c JE 438ef6 |
(232) 0x438d22 SUB %R13D,%ECX |
(232) 0x438d25 LEA -0x1(%RCX),%EDX |
(232) 0x438d28 CMP $0x2,%EDX |
(232) 0x438d2b JBE 438dc3 |
(232) 0x438d31 MOVSXD 0x34(%RSP),%R8 |
(232) 0x438d36 MOV 0x18(%RSP),%RAX |
(232) 0x438d3b VBROADCASTSD (%R11),%YMM5 |
(232) 0x438d40 VMOVQ %XMM12,%RBX |
(232) 0x438d45 VMOVSD (%R10),%XMM1 |
(232) 0x438d4a VMOVSD (%R9),%XMM2 |
(232) 0x438d4f VMOVSD (%R15),%XMM3 |
(232) 0x438d54 VBROADCASTSD %XMM1,%YMM6 |
(232) 0x438d59 VBROADCASTSD %XMM2,%YMM7 |
(232) 0x438d5e VBROADCASTSD %XMM3,%YMM8 |
(232) 0x438d63 LEA (%RAX,%R8,1),%RDX |
(232) 0x438d67 MOV 0x20(%RSP),%RAX |
(232) 0x438d6c ADD %R13,%RDX |
(232) 0x438d6f VMOVUPD %YMM5,(%RBX,%RDX,8) |
(232) 0x438d74 VMOVQ %XMM11,%RBX |
(232) 0x438d79 LEA (%RAX,%R8,1),%RDX |
(232) 0x438d7d MOV 0x28(%RSP),%RAX |
(232) 0x438d82 ADD %R13,%RDX |
(232) 0x438d85 VMOVUPD %YMM6,(%RBX,%RDX,8) |
(232) 0x438d8a VMOVQ %XMM0,%RBX |
(232) 0x438d8f LEA (%RAX,%R8,1),%RDX |
(232) 0x438d93 MOV 0x38(%RSP),%RAX |
(232) 0x438d98 ADD %R13,%RDX |
(232) 0x438d9b VMOVUPD %YMM7,(%RBX,%RDX,8) |
(232) 0x438da0 ADD %RAX,%R8 |
(232) 0x438da3 ADD %R13,%R8 |
(232) 0x438da6 VMOVQ %XMM9,%R13 |
(232) 0x438dab VMOVUPD %YMM8,(%R13,%R8,8) |
(232) 0x438db2 TEST $0x3,%CL |
(232) 0x438db5 JE 438ef6 |
(232) 0x438dbb AND $-0x4,%ECX |
(232) 0x438dbe ADD %ECX,%ESI |
(232) 0x438dc0 ADD %ECX,%R12D |
(232) 0x438dc3 MOV 0x18(%RSP),%RCX |
(232) 0x438dc8 MOV 0x20(%RSP),%RBX |
(232) 0x438dcd MOVSXD %R12D,%RAX |
(232) 0x438dd0 VMOVQ %XMM12,%RDX |
(232) 0x438dd5 VMOVSD (%R11),%XMM10 |
(232) 0x438dda LEA (%RCX,%RAX,1),%R8 |
(232) 0x438dde LEA (%RBX,%RAX,1),%R13 |
(232) 0x438de2 VMOVSD %XMM10,(%RDX,%R8,8) |
(232) 0x438de8 VMOVQ %XMM11,%R8 |
(232) 0x438ded VMOVSD (%R10),%XMM13 |
(232) 0x438df2 VMOVSD %XMM13,(%R8,%R13,8) |
(232) 0x438df8 MOV 0x28(%RSP),%R8 |
(232) 0x438dfd VMOVQ %XMM0,%R13 |
(232) 0x438e02 VMOVSD (%R9),%XMM1 |
(232) 0x438e07 LEA (%R8,%RAX,1),%RDX |
(232) 0x438e0b VMOVSD %XMM1,(%R13,%RDX,8) |
(232) 0x438e12 MOV 0x38(%RSP),%RDX |
(232) 0x438e17 VMOVQ %XMM9,%R13 |
(232) 0x438e1c VMOVSD (%R15),%XMM2 |
(232) 0x438e21 ADD %RDX,%RAX |
(232) 0x438e24 LEA 0x1(%RSI),%EDX |
(232) 0x438e27 VMOVSD %XMM2,(%R13,%RAX,8) |
(232) 0x438e2e MOV 0x30(%RSP),%R13D |
(232) 0x438e33 LEA 0x1(%R12),%EAX |
(232) 0x438e38 CMP %R13D,%EDX |
(232) 0x438e3b JAE 438ef6 |
(232) 0x438e41 CLTQ |
(232) 0x438e43 VMOVQ %XMM12,%R13 |
(232) 0x438e48 VMOVSD (%R11),%XMM3 |
(232) 0x438e4d ADD $0x2,%ESI |
(232) 0x438e50 LEA (%RAX,%RCX,1),%RDX |
(232) 0x438e54 LEA 0x2(%R12),%R12D |
(232) 0x438e59 VMOVSD %XMM3,(%R13,%RDX,8) |
(232) 0x438e60 LEA (%RAX,%RBX,1),%RDX |
(232) 0x438e64 VMOVQ %XMM11,%R13 |
(232) 0x438e69 VMOVSD (%R10),%XMM5 |
(232) 0x438e6e VMOVSD %XMM5,(%R13,%RDX,8) |
(232) 0x438e75 LEA (%RAX,%R8,1),%RDX |
(232) 0x438e79 VMOVQ %XMM0,%R13 |
(232) 0x438e7e VMOVSD (%R9),%XMM6 |
(232) 0x438e83 VMOVSD %XMM6,(%R13,%RDX,8) |
(232) 0x438e8a MOV 0x38(%RSP),%RDX |
(232) 0x438e8f VMOVQ %XMM9,%R13 |
(232) 0x438e94 VMOVSD (%R15),%XMM7 |
(232) 0x438e99 ADD %RDX,%RAX |
(232) 0x438e9c VMOVSD %XMM7,(%R13,%RAX,8) |
(232) 0x438ea3 MOV 0x30(%RSP),%EAX |
(232) 0x438ea7 CMP %EAX,%ESI |
(232) 0x438ea9 JAE 438ef6 |
(232) 0x438eab MOVSXD %R12D,%RSI |
(232) 0x438eae VMOVSD (%R11),%XMM8 |
(232) 0x438eb3 VMOVQ %XMM12,%R11 |
(232) 0x438eb8 ADD %RSI,%RCX |
(232) 0x438ebb ADD %RSI,%RBX |
(232) 0x438ebe ADD %RSI,%R8 |
(232) 0x438ec1 ADD %RSI,%RDX |
(232) 0x438ec4 VMOVSD %XMM8,(%R11,%RCX,8) |
(232) 0x438eca VMOVSD (%R10),%XMM12 |
(232) 0x438ecf VMOVQ %XMM11,%R10 |
(232) 0x438ed4 VMOVSD %XMM12,(%R10,%RBX,8) |
(232) 0x438eda VMOVSD (%R9),%XMM11 |
(232) 0x438edf VMOVQ %XMM0,%R9 |
(232) 0x438ee4 VMOVSD %XMM11,(%R9,%R8,8) |
(232) 0x438eea VMOVSD (%R15),%XMM0 |
(232) 0x438eef VMOVSD %XMM0,(%R13,%RDX,8) |
(232) 0x438ef6 MOV 0x30(%RSP),%ESI |
(232) 0x438efa INC %RDI |
(232) 0x438efd CMP %EDI,0xc(%RSP) |
(232) 0x438f01 JLE 438f20 |
(232) 0x438f03 MOV 0x4(%RSP),%ECX |
(232) 0x438f07 MOV 0x8(%RSP),%R12D |
(232) 0x438f0c MOVL $0,0x34(%RSP) |
(232) 0x438f14 SUB %ESI,%ECX |
(232) 0x438f16 JMP 438a50 |
0x438f1b NOPL (%RAX,%RAX,1) |
0x438f20 VZEROUPPER |
0x438f23 LEA -0x28(%RBP),%RSP |
0x438f27 POP %RBX |
0x438f28 POP %R12 |
0x438f2a POP %R13 |
0x438f2c POP %R14 |
0x438f2e POP %R15 |
0x438f30 POP %RBP |
0x438f31 RET |
0x438f32 NOPW %CS:(%RAX,%RAX,1) |
0x438f3d NOPL (%RAX) |
(232) 0x438f40 MOV 0x34(%RSP),%R12D |
(232) 0x438f45 XOR %R13D,%R13D |
(232) 0x438f48 JMP 438d22 |
0x438f4d INC %ECX |
0x438f4f XOR %EDX,%EDX |
0x438f51 JMP 4389fd |
0x438f56 NOPW %CS:(%RAX,%RAX,1) |
Path / |
Source file and lines | generate_chunk.cpp:74-80 |
Module | exec |
nb instructions | 66 |
nb uops | 65 |
loop length | 232 |
used x86 registers | 13 |
used mmx registers | 0 |
used xmm registers | 5 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 5 |
micro-operation queue | 10.83 cycles |
front end | 10.83 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 6.00 | 4.75 | 4.75 | 4.50 | 6.00 | 4.67 | 4.67 | 4.67 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
cycles | 6.00 | 4.75 | 4.75 | 4.50 | 6.00 | 4.67 | 4.67 | 4.67 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | 12.00 |
Front-end | 10.83 |
Dispatch | 6.00 |
DIV/SQRT | 12.00 |
Overall L1 | 12.00 |
all | 7% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 18% |
all | 8% |
load | 10% |
store | 6% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 9% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
AND $-0x40,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB $0x40,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV 0x2c(%RDI),%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x28(%RDI),%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %EBX,0xc(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R15D,0x8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
TEST %EBX,%EBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JLE 438f23 <_Z14generate_chunkiR16global_variables._omp_fn.0+0x583> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
TEST %R15D,%R15D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JLE 438f23 <_Z14generate_chunkiR16global_variables._omp_fn.0+0x583> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %RDI,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 404650 <omp_get_num_threads@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %EAX,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 404540 <omp_get_thread_num@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EBX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
IMUL %R15D,%EAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
DIV %R14D | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 10-17 | 6 |
MOV %EAX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %EDX,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JB 438f4d <_Z14generate_chunkiR16global_variables._omp_fn.0+0x5ad> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
IMUL %ECX,%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (%RCX,%RSI,1),%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %EDI,0x4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %EDI,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JAE 438f23 <_Z14generate_chunkiR16global_variables._omp_fn.0+0x583> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV 0x8(%RSP),%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %ESI,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VMOVQ 0x8(%R13),%XMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVQ (%R13),%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVQ 0x10(%R13),%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%R13),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
VMOVQ 0x18(%R13),%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
DIV %R8D | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 10-17 | 6 |
VMOVDQA64 %XMM17,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %EDX,%R8D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVSXD %EAX,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %EDX,0x34(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R8D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
POP %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
RET | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
INC %ECX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 4389fd <_Z14generate_chunkiR16global_variables._omp_fn.0+0x5d> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
Source file and lines | generate_chunk.cpp:74-80 |
Module | exec |
nb instructions | 66 |
nb uops | 65 |
loop length | 232 |
used x86 registers | 13 |
used mmx registers | 0 |
used xmm registers | 5 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 5 |
micro-operation queue | 10.83 cycles |
front end | 10.83 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 6.00 | 4.75 | 4.75 | 4.50 | 6.00 | 4.67 | 4.67 | 4.67 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
cycles | 6.00 | 4.75 | 4.75 | 4.50 | 6.00 | 4.67 | 4.67 | 4.67 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | 12.00 |
Front-end | 10.83 |
Dispatch | 6.00 |
DIV/SQRT | 12.00 |
Overall L1 | 12.00 |
all | 7% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 18% |
all | 8% |
load | 10% |
store | 6% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 9% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
AND $-0x40,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB $0x40,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV 0x2c(%RDI),%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x28(%RDI),%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %EBX,0xc(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R15D,0x8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
TEST %EBX,%EBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JLE 438f23 <_Z14generate_chunkiR16global_variables._omp_fn.0+0x583> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
TEST %R15D,%R15D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JLE 438f23 <_Z14generate_chunkiR16global_variables._omp_fn.0+0x583> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %RDI,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 404650 <omp_get_num_threads@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %EAX,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 404540 <omp_get_thread_num@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EBX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
IMUL %R15D,%EAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
DIV %R14D | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 10-17 | 6 |
MOV %EAX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %EDX,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JB 438f4d <_Z14generate_chunkiR16global_variables._omp_fn.0+0x5ad> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
IMUL %ECX,%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (%RCX,%RSI,1),%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %EDI,0x4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %EDI,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JAE 438f23 <_Z14generate_chunkiR16global_variables._omp_fn.0+0x583> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV 0x8(%RSP),%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %ESI,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VMOVQ 0x8(%R13),%XMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVQ (%R13),%XMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVQ 0x10(%R13),%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%R13),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
VMOVQ 0x18(%R13),%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
DIV %R8D | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 10-17 | 6 |
VMOVDQA64 %XMM17,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %EDX,%R8D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVSXD %EAX,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %EDX,0x34(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R8D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
POP %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
RET | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
INC %ECX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 4389fd <_Z14generate_chunkiR16global_variables._omp_fn.0+0x5d> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼_Z14generate_chunkiR16global_variables._omp_fn.0– | 0.04 | 0.02 |
▼Loop 232 - generate_chunk.cpp:74-80 - exec– | 0 | 0 |
○Loop 233 - generate_chunk.cpp:77-80 - exec | 0.04 | 0.02 |