Function: _Z16viscosity_kerneliiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_._omp_fn.0 | Module: exec | Source: viscosity.cpp:36-64 [...] | Coverage: 2.23% |
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Function: _Z16viscosity_kerneliiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_._omp_fn.0 | Module: exec | Source: viscosity.cpp:36-64 [...] | Coverage: 2.23% |
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/beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/viscosity.cpp: 36 - 64 |
-------------------------------------------------------------------------------- |
36: #pragma omp parallel for simd collapse(2) |
37: for (int j = (y_min + 1); j < (y_max + 2); j++) { |
38: for (int i = (x_min + 1); i < (x_max + 2); i++) { |
39: double ugrad = (xvel0(i + 1, j + 0) + xvel0(i + 1, j + 1)) - (xvel0(i, j) + xvel0(i + 0, j + 1)); |
40: double vgrad = (yvel0(i + 0, j + 1) + yvel0(i + 1, j + 1)) - (yvel0(i, j) + yvel0(i + 1, j + 0)); |
41: double div = (celldx[i] * (ugrad) + celldy[j] * (vgrad)); |
42: double strain2 = 0.5 * (xvel0(i + 0, j + 1) + xvel0(i + 1, j + 1) - xvel0(i, j) - xvel0(i + 1, j + 0)) / celldy[j] + |
43: 0.5 * (yvel0(i + 1, j + 0) + yvel0(i + 1, j + 1) - yvel0(i, j) - yvel0(i + 0, j + 1)) / celldx[i]; |
44: double pgradx = (pressure(i + 1, j + 0) - pressure(i - 1, j + 0)) / (celldx[i] + celldx[i + 1]); |
45: double pgrady = (pressure(i + 0, j + 1) - pressure(i + 0, j - 1)) / (celldy[j] + celldy[j + 2]); |
46: double pgradx2 = pgradx * pgradx; |
47: double pgrady2 = pgrady * pgrady; |
48: double limiter = ((0.5 * (ugrad) / celldx[i]) * pgradx2 + (0.5 * (vgrad) / celldy[j]) * pgrady2 + strain2 * pgradx * pgrady) / |
49: std::fmax(pgradx2 + pgrady2, g_small); |
50: if ((limiter > 0.0) || (div >= 0.0)) { |
51: viscosity(i, j) = 0.0; |
52: } else { |
53: double dirx = 1.0; |
54: if (pgradx < 0.0) dirx = -1.0; |
55: pgradx = dirx * std::fmax(g_small, std::fabs(pgradx)); |
56: double diry = 1.0; |
57: if (pgradx < 0.0) diry = -1.0; |
58: pgrady = diry * std::fmax(g_small, std::fabs(pgrady)); |
59: double pgrad = std::sqrt(pgradx * pgradx + pgrady * pgrady); |
60: double xgrad = std::fabs(celldx[i] * pgrad / pgradx); |
61: double ygrad = std::fabs(celldy[j] * pgrad / pgrady); |
62: double grad = std::fmin(xgrad, ygrad); |
63: double grad2 = grad * grad; |
64: viscosity(i, j) = 2.0 * density0(i, j) * grad2 * limiter * limiter; |
/beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/context.h: 46 - 69 |
-------------------------------------------------------------------------------- |
46: T &operator[](size_t i) const { return data[i]; } |
[...] |
69: T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; } |
0x45e8c0 PUSH %RBP |
0x45e8c1 MOV %RSP,%RBP |
0x45e8c4 PUSH %R15 |
0x45e8c6 PUSH %R14 |
0x45e8c8 PUSH %R13 |
0x45e8ca PUSH %R12 |
0x45e8cc PUSH %RBX |
0x45e8cd SUB $0x48,%RSP |
0x45e8d1 MOV 0x40(%RDI),%EAX |
0x45e8d4 MOV 0x44(%RDI),%EBX |
0x45e8d7 MOV 0x38(%RDI),%ECX |
0x45e8da MOV 0x3c(%RDI),%EDX |
0x45e8dd ADD $0x2,%EBX |
0x45e8e0 INC %ECX |
0x45e8e2 LEA 0x1(%RAX),%R15D |
0x45e8e6 MOV %EBX,-0x60(%RBP) |
0x45e8e9 MOV %ECX,-0x64(%RBP) |
0x45e8ec CMP %EBX,%R15D |
0x45e8ef JGE 45ed20 |
0x45e8f5 MOV %EBX,%R13D |
0x45e8f8 LEA 0x2(%RDX),%R14D |
0x45e8fc SUB %R15D,%R13D |
0x45e8ff CMP %R14D,%ECX |
0x45e902 JGE 45ed20 |
0x45e908 MOV %R14D,%ESI |
0x45e90b MOV %RDI,%RBX |
0x45e90e SUB %ECX,%ESI |
0x45e910 MOV %ESI,-0x5c(%RBP) |
0x45e913 CALL 404650 <omp_get_num_threads@plt> |
0x45e918 MOV %EAX,%R12D |
0x45e91b CALL 404540 <omp_get_thread_num@plt> |
0x45e920 XOR %EDX,%EDX |
0x45e922 MOV %EAX,%EDI |
0x45e924 MOV -0x5c(%RBP),%EAX |
0x45e927 IMUL %R13D,%EAX |
0x45e92b DIV %R12D |
0x45e92e MOV %EAX,%ESI |
0x45e930 CMP %EDX,%EDI |
0x45e932 JB 45ed60 |
0x45e938 IMUL %ESI,%EDI |
0x45e93b LEA (%RDI,%RDX,1),%EDI |
0x45e93e LEA (%RSI,%RDI,1),%R8D |
0x45e942 MOV %R8D,-0x68(%RBP) |
0x45e946 CMP %R8D,%EDI |
0x45e949 JAE 45ed20 |
0x45e94f MOV %EDI,%EAX |
0x45e951 XOR %EDX,%EDX |
0x45e953 VMOVQ (%RBX),%XMM2 |
0x45e957 VMOVQ 0x8(%RBX),%XMM7 |
0x45e95c DIVL -0x5c(%RBP) |
0x45e95f VMOVQ 0x18(%RBX),%XMM8 |
0x45e964 MOV -0x64(%RBP),%ECX |
0x45e967 MOV 0x10(%RBX),%R10 |
0x45e96b VMOVQ 0x28(%RBX),%XMM21 |
0x45e972 VMOVQ 0x30(%RBX),%XMM20 |
0x45e979 VXORPD %XMM9,%XMM9,%XMM9 |
0x45e97e VMOVQ 0x142a(%RIP),%XMM14 |
0x45e986 VMOVQ 0x20(%RBX),%XMM26 |
0x45e98d VMOVSD 0x1c01(%RIP),%XMM19 |
0x45e997 VMOVQ 0x298f(%RIP),%XMM23 |
0x45e9a1 VMOVSD 0xd35(%RIP),%XMM22 |
0x45e9ab VMOVDQA64 %XMM2,%XMM29 |
0x45e9b1 VMOVDQA64 %XMM7,%XMM28 |
0x45e9b7 VMOVDQA64 %XMM8,%XMM24 |
0x45e9bd VMOVQ %R10,%XMM30 |
0x45e9c3 ADD %EDX,%ECX |
0x45e9c5 LEA (%RAX,%R15,1),%R13D |
0x45e9c9 MOV %R14D,%EDX |
0x45e9cc MOVSXD %R13D,%R9 |
0x45e9cf SUB %ECX,%EDX |
0x45e9d1 MOV %R9,-0x48(%RBP) |
0x45e9d5 NOPW %CS:(%RAX,%RAX,1) |
(585) 0x45e9e0 CMP %EDX,%ESI |
(585) 0x45e9e2 LEA 0x1(%R13),%R15D |
(585) 0x45e9e6 CMOVBE %ESI,%EDX |
(585) 0x45e9e9 MOV %R15D,-0x54(%RBP) |
(585) 0x45e9ed LEA (%RDI,%RDX,1),%R11D |
(585) 0x45e9f1 MOV %EDX,%R9D |
(585) 0x45e9f4 MOV %R11D,-0x58(%RBP) |
(585) 0x45e9f8 CMP %R11D,%EDI |
(585) 0x45e9fb JAE 45ed50 |
(585) 0x45ea01 MOV -0x48(%RBP),%R8 |
(585) 0x45ea05 VMOVQ %XMM21,%R14 |
(585) 0x45ea0b VMOVQ %XMM20,%RBX |
(585) 0x45ea11 LEA -0x1(%R9),%R9D |
(585) 0x45ea15 MOV (%R14),%R11 |
(585) 0x45ea18 VMOVQ %XMM28,%RDX |
(585) 0x45ea1e MOV (%RBX),%RDI |
(585) 0x45ea21 MOV 0x10(%R14),%R15 |
(585) 0x45ea25 MOV 0x8(%RDX),%RDX |
(585) 0x45ea29 VMOVQ %XMM29,%RAX |
(585) 0x45ea2f MOV 0x10(%RBX),%R12 |
(585) 0x45ea33 VMOVDDUP 0x1c95(%RIP),%XMM15 |
(585) 0x45ea3b MOV 0x8(%RAX),%RBX |
(585) 0x45ea3f LEA 0x2(%R13),%EAX |
(585) 0x45ea43 DEC %R13D |
(585) 0x45ea46 VMOVSD 0x1c82(%RIP),%XMM10 |
(585) 0x45ea4e CLTQ |
(585) 0x45ea50 MOVSXD %R13D,%R13 |
(585) 0x45ea53 VMOVSD 0xc8d(%RIP),%XMM13 |
(585) 0x45ea5b MOV %R8,%R10 |
(585) 0x45ea5e LEA 0x1(%R8),%RSI |
(585) 0x45ea62 IMUL %R11,%R10 |
(585) 0x45ea66 MOV %RSI,-0x50(%RBP) |
(585) 0x45ea6a LEA (%RDX,%R8,8),%R14 |
(585) 0x45ea6e IMUL %RSI,%RDI |
(585) 0x45ea72 LEA (%RDX,%RAX,8),%RDX |
(585) 0x45ea76 MOVSXD %ECX,%RAX |
(585) 0x45ea79 LEA 0x1(%RAX,%R9,1),%RCX |
(585) 0x45ea7e VMOVQ %XMM24,%RSI |
(585) 0x45ea84 VMOVQ %R14,%XMM17 |
(585) 0x45ea8a LEA (%R11,%R10,1),%R11 |
(585) 0x45ea8e MOV %RCX,-0x38(%RBP) |
(585) 0x45ea92 LEA (%R15,%R10,8),%RCX |
(585) 0x45ea96 VMOVQ %XMM20,%R10 |
(585) 0x45ea9c LEA (%R12,%RDI,8),%R9 |
(585) 0x45eaa0 SUB (%R10),%RDI |
(585) 0x45eaa3 MOV (%RSI),%RSI |
(585) 0x45eaa6 LEA (%R15,%R11,8),%R15 |
(585) 0x45eaaa VMOVQ %XMM24,%R10 |
(585) 0x45eab0 VMOVQ %RDX,%XMM16 |
(585) 0x45eab6 LEA 0x1(%RAX),%RDX |
(585) 0x45eaba LEA (%R12,%RDI,8),%RDI |
(585) 0x45eabe VMOVQ %XMM24,%R12 |
(585) 0x45eac4 LEA (,%RSI,8),%R14 |
(585) 0x45eacc MOV 0x10(%R12),%R11 |
(585) 0x45ead1 IMUL %R8,%RSI |
(585) 0x45ead5 MOV -0x50(%RBP),%R12 |
(585) 0x45ead9 IMUL %R14,%R13 |
(585) 0x45eadd ADD 0x10(%R10),%R13 |
(585) 0x45eae1 LEA (%R11,%RSI,8),%RSI |
(585) 0x45eae5 VMOVQ %XMM26,%R11 |
(585) 0x45eaeb IMUL %R14,%R12 |
(585) 0x45eaef ADD 0x10(%R10),%R12 |
(585) 0x45eaf3 IMUL (%R11),%R8 |
(585) 0x45eaf7 MOV 0x10(%R11),%R14 |
(585) 0x45eafb VMOVQ %XMM16,%R11 |
(585) 0x45eb01 MOV %R13,-0x40(%RBP) |
(585) 0x45eb05 VMOVQ %XMM17,%R13 |
(585) 0x45eb0b VMOVQ %R14,%XMM12 |
(585) 0x45eb10 VMOVQ %XMM30,%R14 |
(585) 0x45eb16 VMOVQ %R8,%XMM11 |
(585) 0x45eb1b JMP 45ebaf |
(586) 0x45eb20 VANDPD %XMM14,%XMM4,%XMM5 |
(586) 0x45eb25 VCOMISD %XMM4,%XMM9 |
(586) 0x45eb29 VMAXSD %XMM13,%XMM5,%XMM0 |
(586) 0x45eb2e JA 45ed30 |
(586) 0x45eb34 VMOVSD %XMM19,%XMM19,%XMM4 |
(586) 0x45eb3a MOV -0x48(%RBP),%R8 |
(586) 0x45eb3e VANDPD %XMM14,%XMM1,%XMM1 |
(586) 0x45eb43 IMUL (%R14),%R8 |
(586) 0x45eb47 VMAXSD %XMM13,%XMM1,%XMM6 |
(586) 0x45eb4c VMULSD %XMM4,%XMM6,%XMM8 |
(586) 0x45eb50 VMULSD %XMM8,%XMM8,%XMM5 |
(586) 0x45eb55 VFMADD231SD %XMM0,%XMM0,%XMM5 |
(586) 0x45eb5a VSQRTSD %XMM5,%XMM5,%XMM5 |
(586) 0x45eb5e VMULSD %XMM3,%XMM5,%XMM3 |
(586) 0x45eb62 VMULSD %XMM7,%XMM5,%XMM7 |
(586) 0x45eb66 VDIVSD %XMM8,%XMM3,%XMM4 |
(586) 0x45eb6b VDIVSD %XMM0,%XMM7,%XMM0 |
(586) 0x45eb6f VANDPD %XMM14,%XMM4,%XMM1 |
(586) 0x45eb74 VANDPD %XMM14,%XMM0,%XMM6 |
(586) 0x45eb79 ADD %RAX,%R8 |
(586) 0x45eb7c MOV 0x10(%R14),%RAX |
(586) 0x45eb80 VMINSD %XMM6,%XMM1,%XMM8 |
(586) 0x45eb84 VMULSD %XMM2,%XMM8,%XMM2 |
(586) 0x45eb88 VMULSD %XMM2,%XMM2,%XMM3 |
(586) 0x45eb8c VMOVSD (%RAX,%R8,8),%XMM5 |
(586) 0x45eb92 MOV %RDX,%RAX |
(586) 0x45eb95 VADDSD %XMM5,%XMM5,%XMM4 |
(586) 0x45eb99 VMULSD %XMM3,%XMM4,%XMM1 |
(586) 0x45eb9d VMOVSD %XMM1,(%R10) |
(586) 0x45eba2 CMP %RDX,-0x38(%RBP) |
(586) 0x45eba6 JE 45ecf7 |
(586) 0x45ebac INC %RDX |
(586) 0x45ebaf VMOVSD 0x8(%R15,%RAX,8),%XMM0 |
(586) 0x45ebb6 VMOVSD (%RCX,%RAX,8),%XMM6 |
(586) 0x45ebbb VMOVSD (%R15,%RAX,8),%XMM1 |
(586) 0x45ebc1 VMOVSD 0x8(%RDI,%RAX,8),%XMM7 |
(586) 0x45ebc7 VADDSD %XMM0,%XMM1,%XMM27 |
(586) 0x45ebcd VADDSD %XMM6,%XMM1,%XMM5 |
(586) 0x45ebd1 VMOVSD 0x8(%RCX,%RAX,8),%XMM4 |
(586) 0x45ebd7 VMOVSD (%R9,%RAX,8),%XMM1 |
(586) 0x45ebdd VADDSD %XMM4,%XMM0,%XMM3 |
(586) 0x45ebe1 VMOVSD 0x8(%R9,%RAX,8),%XMM2 |
(586) 0x45ebe8 VSUBSD %XMM5,%XMM3,%XMM0 |
(586) 0x45ebec VADDSD %XMM2,%XMM7,%XMM8 |
(586) 0x45ebf0 VMOVSD (%RDI,%RAX,8),%XMM5 |
(586) 0x45ebf5 VADDSD %XMM4,%XMM6,%XMM4 |
(586) 0x45ebf9 VADDSD %XMM1,%XMM2,%XMM2 |
(586) 0x45ebfd VSUBSD %XMM4,%XMM27,%XMM31 |
(586) 0x45ec03 VADDSD %XMM1,%XMM5,%XMM6 |
(586) 0x45ec07 VSUBSD %XMM6,%XMM8,%XMM1 |
(586) 0x45ec0b VUNPCKLPD %XMM1,%XMM31,%XMM17 |
(586) 0x45ec11 VADDSD %XMM5,%XMM7,%XMM3 |
(586) 0x45ec15 VMULPD %XMM15,%XMM17,%XMM16 |
(586) 0x45ec1b VMOVSD (%RBX,%RAX,8),%XMM7 |
(586) 0x45ec20 VSUBSD %XMM3,%XMM2,%XMM2 |
(586) 0x45ec24 VMOVSD (%R13),%XMM3 |
(586) 0x45ec2a VUNPCKLPD %XMM7,%XMM3,%XMM25 |
(586) 0x45ec30 MOV -0x40(%RBP),%R10 |
(586) 0x45ec34 VMULSD %XMM2,%XMM3,%XMM18 |
(586) 0x45ec3a VMOVSD 0x8(%RSI,%RAX,8),%XMM8 |
(586) 0x45ec40 VFMADD231SD %XMM0,%XMM7,%XMM18 |
(586) 0x45ec46 VSUBSD -0x8(%RSI,%RAX,8),%XMM8,%XMM4 |
(586) 0x45ec4c VADDSD 0x8(%RBX,%RAX,8),%XMM7,%XMM1 |
(586) 0x45ec52 VMULSD %XMM10,%XMM0,%XMM0 |
(586) 0x45ec57 VDIVPD %XMM25,%XMM16,%XMM27 |
(586) 0x45ec5d VDIVSD %XMM1,%XMM4,%XMM4 |
(586) 0x45ec61 VDIVSD %XMM7,%XMM0,%XMM0 |
(586) 0x45ec65 VADDSD (%R11),%XMM3,%XMM1 |
(586) 0x45ec6a VMULSD %XMM10,%XMM2,%XMM2 |
(586) 0x45ec6f VDIVSD %XMM3,%XMM2,%XMM2 |
(586) 0x45ec73 VMOVQ %XMM11,%R8 |
(586) 0x45ec78 ADD %RAX,%R8 |
(586) 0x45ec7b VCOMISD %XMM9,%XMM18 |
(586) 0x45ec81 VUNPCKHPD %XMM27,%XMM27,%XMM5 |
(586) 0x45ec87 VADDPD %XMM27,%XMM5,%XMM6 |
(586) 0x45ec8d VMOVSD (%R12,%RAX,8),%XMM5 |
(586) 0x45ec93 VSUBSD (%R10,%RAX,8),%XMM5,%XMM8 |
(586) 0x45ec99 VDIVSD %XMM1,%XMM8,%XMM1 |
(586) 0x45ec9d VMULSD %XMM4,%XMM4,%XMM8 |
(586) 0x45eca1 VMULSD %XMM4,%XMM1,%XMM25 |
(586) 0x45eca7 VMULSD %XMM1,%XMM1,%XMM5 |
(586) 0x45ecab VMOVQ %XMM12,%R10 |
(586) 0x45ecb0 LEA (%R10,%R8,8),%R10 |
(586) 0x45ecb4 VMULSD %XMM6,%XMM25,%XMM31 |
(586) 0x45ecba VFMADD132SD %XMM8,%XMM31,%XMM0 |
(586) 0x45ecc0 VADDSD %XMM8,%XMM5,%XMM6 |
(586) 0x45ecc5 VMAXSD %XMM13,%XMM6,%XMM8 |
(586) 0x45ecca VFMADD231SD %XMM5,%XMM2,%XMM0 |
(586) 0x45eccf VDIVSD %XMM8,%XMM0,%XMM2 |
(586) 0x45ecd4 JAE 45ece1 |
(586) 0x45ecd6 VCOMISD %XMM9,%XMM2 |
(586) 0x45ecdb JBE 45eb20 |
(586) 0x45ece1 VXORPD %XMM1,%XMM1,%XMM1 |
(586) 0x45ece5 MOV %RDX,%RAX |
(586) 0x45ece8 VMOVSD %XMM1,(%R10) |
(586) 0x45eced CMP %RDX,-0x38(%RBP) |
(586) 0x45ecf1 JNE 45ebac |
(585) 0x45ecf7 MOV -0x50(%RBP),%RBX |
(585) 0x45ecfb MOV -0x54(%RBP),%R13D |
(585) 0x45ecff MOV %RBX,-0x48(%RBP) |
(585) 0x45ed03 CMP %R13D,-0x60(%RBP) |
(585) 0x45ed07 JLE 45ed20 |
(585) 0x45ed09 MOV -0x68(%RBP),%ESI |
(585) 0x45ed0c MOV -0x58(%RBP),%EDI |
(585) 0x45ed0f MOV -0x5c(%RBP),%EDX |
(585) 0x45ed12 MOV -0x64(%RBP),%ECX |
(585) 0x45ed15 SUB %EDI,%ESI |
(585) 0x45ed17 JMP 45e9e0 |
0x45ed1c NOPL (%RAX) |
0x45ed20 ADD $0x48,%RSP |
0x45ed24 POP %RBX |
0x45ed25 POP %R12 |
0x45ed27 POP %R13 |
0x45ed29 POP %R14 |
0x45ed2b POP %R15 |
0x45ed2d POP %RBP |
0x45ed2e RET |
0x45ed2f NOP |
(586) 0x45ed30 VXORPD %XMM23,%XMM0,%XMM5 |
(586) 0x45ed36 VCOMISD %XMM9,%XMM0 |
(586) 0x45ed3b VMOVSD %XMM5,%XMM5,%XMM0 |
(586) 0x45ed3f JBE 45ed69 |
(586) 0x45ed41 VMOVSD %XMM22,%XMM22,%XMM4 |
(586) 0x45ed47 JMP 45eb3a |
0x45ed4c NOPL (%RAX) |
(585) 0x45ed50 MOV -0x48(%RBP),%RCX |
(585) 0x45ed54 MOV %EDI,-0x58(%RBP) |
(585) 0x45ed57 INC %RCX |
(585) 0x45ed5a MOV %RCX,-0x50(%RBP) |
(585) 0x45ed5e JMP 45ecf7 |
0x45ed60 INC %ESI |
0x45ed62 XOR %EDX,%EDX |
0x45ed64 JMP 45e938 |
(586) 0x45ed69 VMOVSD 0x1827(%RIP),%XMM4 |
(586) 0x45ed71 JMP 45eb3a |
0x45ed76 NOPW %CS:(%RAX,%RAX,1) |
Path / |
Source file and lines | viscosity.cpp:36-64 |
Module | exec |
nb instructions | 87 |
nb uops | 87 |
loop length | 331 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 15 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 5 |
micro-operation queue | 14.50 cycles |
front end | 14.50 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 7.00 | 7.00 | 7.00 | 7.00 | 6.00 | 8.33 | 8.33 | 8.33 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
cycles | 7.00 | 7.00 | 7.00 | 7.00 | 6.00 | 8.33 | 8.33 | 8.33 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | 12.00 |
Front-end | 14.50 |
Dispatch | 8.33 |
DIV/SQRT | 12.00 |
Overall L1 | 14.50 |
all | 8% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 23% |
all | 33% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 10% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 33% |
all | 10% |
load | 10% |
store | 7% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 8% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 16% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 10% |
load | 11% |
store | 7% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 8% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 13% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SUB $0x48,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV 0x40(%RDI),%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x44(%RDI),%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x38(%RDI),%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x3c(%RDI),%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
ADD $0x2,%EBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
INC %ECX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA 0x1(%RAX),%R15D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %EBX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %ECX,-0x64(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %EBX,%R15D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JGE 45ed20 <_Z16viscosity_kerneliiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_._omp_fn.0+0x460> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %EBX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x2(%RDX),%R14D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %R15D,%R13D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %R14D,%ECX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JGE 45ed20 <_Z16viscosity_kerneliiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_._omp_fn.0+0x460> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %R14D,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDI,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %ECX,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %ESI,-0x5c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CALL 404650 <omp_get_num_threads@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %EAX,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 404540 <omp_get_thread_num@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x5c(%RBP),%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
IMUL %R13D,%EAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
DIV %R12D | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 10-17 | 6 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %EDX,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JB 45ed60 <_Z16viscosity_kerneliiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_._omp_fn.0+0x4a0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
IMUL %ESI,%EDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%RDI,%RDX,1),%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (%RSI,%RDI,1),%R8D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8D,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %R8D,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JAE 45ed20 <_Z16viscosity_kerneliiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_._omp_fn.0+0x460> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %EDI,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VMOVQ (%RBX),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVQ 0x8(%RBX),%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
DIVL -0x5c(%RBP) | 3 | 2 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 10-17 | 6 |
VMOVQ 0x18(%RBX),%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV -0x64(%RBP),%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x10(%RBX),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
VMOVQ 0x28(%RBX),%XMM21 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVQ 0x30(%RBX),%XMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VXORPD %XMM9,%XMM9,%XMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVQ 0x142a(%RIP),%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVQ 0x20(%RBX),%XMM26 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVSD 0x1c01(%RIP),%XMM19 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVQ 0x298f(%RIP),%XMM23 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVSD 0xd35(%RIP),%XMM22 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVDQA64 %XMM2,%XMM29 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVDQA64 %XMM7,%XMM28 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVDQA64 %XMM8,%XMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVQ %R10,%XMM30 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
ADD %EDX,%ECX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (%RAX,%R15,1),%R13D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R14D,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOVSXD %R13D,%R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %ECX,%EDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R9,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
ADD $0x48,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
POP %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
RET | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
NOP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
INC %ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 45e938 <_Z16viscosity_kerneliiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_._omp_fn.0+0x78> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
Source file and lines | viscosity.cpp:36-64 |
Module | exec |
nb instructions | 87 |
nb uops | 87 |
loop length | 331 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 15 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 5 |
micro-operation queue | 14.50 cycles |
front end | 14.50 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 7.00 | 7.00 | 7.00 | 7.00 | 6.00 | 8.33 | 8.33 | 8.33 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
cycles | 7.00 | 7.00 | 7.00 | 7.00 | 6.00 | 8.33 | 8.33 | 8.33 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | 12.00 |
Front-end | 14.50 |
Dispatch | 8.33 |
DIV/SQRT | 12.00 |
Overall L1 | 14.50 |
all | 8% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 23% |
all | 33% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 10% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 33% |
all | 10% |
load | 10% |
store | 7% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 8% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 16% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 10% |
load | 11% |
store | 7% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 8% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 13% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SUB $0x48,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV 0x40(%RDI),%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x44(%RDI),%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x38(%RDI),%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x3c(%RDI),%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
ADD $0x2,%EBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
INC %ECX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA 0x1(%RAX),%R15D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %EBX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %ECX,-0x64(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %EBX,%R15D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JGE 45ed20 <_Z16viscosity_kerneliiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_._omp_fn.0+0x460> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %EBX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x2(%RDX),%R14D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %R15D,%R13D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %R14D,%ECX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JGE 45ed20 <_Z16viscosity_kerneliiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_._omp_fn.0+0x460> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %R14D,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDI,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %ECX,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %ESI,-0x5c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CALL 404650 <omp_get_num_threads@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %EAX,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 404540 <omp_get_thread_num@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x5c(%RBP),%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
IMUL %R13D,%EAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
DIV %R12D | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 10-17 | 6 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %EDX,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JB 45ed60 <_Z16viscosity_kerneliiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_._omp_fn.0+0x4a0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
IMUL %ESI,%EDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%RDI,%RDX,1),%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (%RSI,%RDI,1),%R8D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8D,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %R8D,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JAE 45ed20 <_Z16viscosity_kerneliiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_._omp_fn.0+0x460> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %EDI,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VMOVQ (%RBX),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVQ 0x8(%RBX),%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
DIVL -0x5c(%RBP) | 3 | 2 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 10-17 | 6 |
VMOVQ 0x18(%RBX),%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV -0x64(%RBP),%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV 0x10(%RBX),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
VMOVQ 0x28(%RBX),%XMM21 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVQ 0x30(%RBX),%XMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VXORPD %XMM9,%XMM9,%XMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVQ 0x142a(%RIP),%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVQ 0x20(%RBX),%XMM26 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVSD 0x1c01(%RIP),%XMM19 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVQ 0x298f(%RIP),%XMM23 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVSD 0xd35(%RIP),%XMM22 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVDQA64 %XMM2,%XMM29 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVDQA64 %XMM7,%XMM28 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVDQA64 %XMM8,%XMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVQ %R10,%XMM30 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
ADD %EDX,%ECX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (%RAX,%R15,1),%R13D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R14D,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOVSXD %R13D,%R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB %ECX,%EDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R9,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
ADD $0x48,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
POP %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
RET | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
NOP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
INC %ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 45e938 <_Z16viscosity_kerneliiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_._omp_fn.0+0x78> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼_Z16viscosity_kerneliiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_._omp_fn.0– | 2.23 | 1.12 |
▼Loop 585 - viscosity.cpp:38-64 - exec– | 0.01 | 0.01 |
○Loop 586 - viscosity.cpp:39-64 - exec | 2.22 | 1.11 |