Function: __svml_i64div4_l9 | Module: exec | Source: :0-0 | Coverage: 0.08% |
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Function: __svml_i64div4_l9 | Module: exec | Source: :0-0 | Coverage: 0.08% |
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*** This Panel is Intentionally Left Blank. *** It is due to a lack of debug symbols in the given object |
0x452610 ENDBR64 |
0x452614 VPXOR %XMM2,%XMM2,%XMM2 |
0x452618 VPCMPEQQ %YMM2,%YMM1,%YMM3 |
0x45261d VTESTPD %YMM3,%YMM3 |
0x452622 JE 45262b |
0x452624 MOV $0,%EAX |
0x452629 DIV %AL |
0x45262b SUB $0x78,%RSP |
0x45262f VMOVUPS %YMM14,0x40(%RSP) |
0x452635 VMOVUPS %YMM13,0x20(%RSP) |
0x45263b VMOVUPS %YMM12,(%RSP) |
0x452640 VMOVUPS %YMM11,-0x20(%RSP) |
0x452646 VMOVUPS %YMM10,-0x40(%RSP) |
0x45264c VMOVUPS %YMM9,-0x60(%RSP) |
0x452652 VMOVUPS %YMM8,-0x80(%RSP) |
0x452658 VPSUBQ %YMM1,%YMM2,%YMM3 |
0x45265c VBLENDVPD %YMM1,%YMM3,%YMM1,%YMM3 |
0x452662 VPBLENDD $-0x56,%YMM2,%YMM3,%YMM4 |
0x452668 VPBROADCASTQ 0x23917(%RIP),%YMM9 |
0x452671 VPOR %YMM4,%YMM9,%YMM4 |
0x452675 VBROADCASTSD 0x23912(%RIP),%YMM10 |
0x45267e VADDPD %YMM4,%YMM10,%YMM5 |
0x452682 VPSRLQ $0x20,%YMM3,%YMM4 |
0x452687 VPBROADCASTQ 0x23908(%RIP),%YMM11 |
0x452690 VPOR %YMM4,%YMM11,%YMM7 |
0x452694 VBROADCASTSD 0x23903(%RIP),%YMM6 |
0x45269d VADDPD %YMM6,%YMM7,%YMM8 |
0x4526a1 VADDPD %YMM5,%YMM8,%YMM12 |
0x4526a5 VBROADCASTSD 0x238fa(%RIP),%YMM7 |
0x4526ae VANDPD %YMM7,%YMM12,%YMM7 |
0x4526b2 VSUBPD %YMM7,%YMM8,%YMM8 |
0x4526b6 VADDPD %YMM5,%YMM8,%YMM8 |
0x4526ba VPSUBQ %YMM0,%YMM2,%YMM5 |
0x4526be VBLENDVPD %YMM0,%YMM5,%YMM0,%YMM5 |
0x4526c4 VPSRLQ $0x20,%YMM5,%YMM13 |
0x4526c9 VPOR %YMM11,%YMM13,%YMM11 |
0x4526ce VADDPD %YMM6,%YMM11,%YMM11 |
0x4526d2 VPBLENDD $-0x56,%YMM2,%YMM5,%YMM13 |
0x4526d8 VPOR %YMM9,%YMM13,%YMM9 |
0x4526dd VADDPD %YMM10,%YMM9,%YMM9 |
0x4526e2 VADDPD %YMM9,%YMM11,%YMM10 |
0x4526e7 VCVTPD2PS %YMM12,%XMM13 |
0x4526ec VRCPPS %XMM13,%XMM13 |
0x4526f1 VCVTPS2PD %XMM13,%YMM13 |
0x4526f6 VBROADCASTSD 0x238b1(%RIP),%YMM14 |
0x4526ff VFNMADD231PD %YMM12,%YMM13,%YMM14 |
0x452704 VFMADD132PD %YMM13,%YMM13,%YMM14 |
0x452709 VMULPD %YMM14,%YMM10,%YMM10 |
0x45270e VROUNDPD $0x3,%YMM10,%YMM10 |
0x452714 VBROADCASTSD 0x2389b(%RIP),%YMM12 |
0x45271d VANDPD %YMM12,%YMM10,%YMM10 |
0x452722 VFNMADD231PD %YMM10,%YMM7,%YMM11 |
0x452727 VFNMADD231PD %YMM10,%YMM8,%YMM9 |
0x45272c VADDPD %YMM9,%YMM11,%YMM9 |
0x452731 VMULPD %YMM9,%YMM14,%YMM11 |
0x452736 VROUNDPD $0x3,%YMM11,%YMM11 |
0x45273c VANDPD %YMM12,%YMM11,%YMM11 |
0x452741 VFNMADD231PD %YMM11,%YMM7,%YMM9 |
0x452746 VFNMADD231PD %YMM11,%YMM8,%YMM9 |
0x45274b VMULPD %YMM9,%YMM14,%YMM13 |
0x452750 VROUNDPD $0x3,%YMM13,%YMM13 |
0x452756 VANDPD %YMM12,%YMM13,%YMM12 |
0x45275b VFNMADD231PD %YMM7,%YMM12,%YMM9 |
0x452760 VFNMADD231PD %YMM8,%YMM12,%YMM9 |
0x452765 VMULPD %YMM9,%YMM14,%YMM7 |
0x45276a VBROADCASTSD 0x23815(%RIP),%YMM8 |
0x452773 VADDPD %YMM8,%YMM12,%YMM9 |
0x452778 VADDPD %YMM8,%YMM11,%YMM11 |
0x45277d VBROADCASTSD 0x2383a(%RIP),%YMM12 |
0x452786 VANDPD %YMM12,%YMM11,%YMM11 |
0x45278b VBROADCASTSD 0x23804(%RIP),%YMM12 |
0x452794 VADDPD %YMM12,%YMM10,%YMM12 |
0x452799 VADDPD %YMM6,%YMM12,%YMM6 |
0x45279d VSUBPD %YMM6,%YMM10,%YMM6 |
0x4527a1 VADDPD %YMM6,%YMM8,%YMM6 |
0x4527a5 VPSHUFB 0x23832(%RIP),%YMM6,%YMM6 |
0x4527ae VPSLLQ $0x20,%YMM12,%YMM8 |
0x4527b4 VPADDD %YMM6,%YMM8,%YMM6 |
0x4527b8 VCVTTPD2DQ %YMM7,%XMM7 |
0x4527bc VPADDQ %YMM6,%YMM11,%YMM6 |
0x4527c0 VPMOVZXDQ %XMM7,%YMM7 |
0x4527c5 VANDPD 0x23833(%RIP),%YMM9,%YMM8 |
0x4527cd VPADDD %YMM7,%YMM8,%YMM7 |
0x4527d1 VPADDQ %YMM7,%YMM6,%YMM6 |
0x4527d5 VPMULUDQ %YMM4,%YMM6,%YMM4 |
0x4527d9 VPSRLQ $0x20,%YMM6,%YMM7 |
0x4527de VPMULUDQ %YMM3,%YMM7,%YMM7 |
0x4527e2 VPADDQ %YMM7,%YMM4,%YMM4 |
0x4527e6 VPSLLQ $0x20,%YMM4,%YMM4 |
0x4527eb VPMULUDQ %YMM3,%YMM6,%YMM7 |
0x4527ef VPADDQ %YMM4,%YMM7,%YMM4 |
0x4527f3 VPSUBQ %YMM4,%YMM5,%YMM4 |
0x4527f7 VPSRLQ $0x3f,%YMM3,%YMM5 |
0x4527fc VPSRLQ $0x3f,%YMM4,%YMM7 |
0x452801 VPCMPEQQ %YMM7,%YMM5,%YMM8 |
0x452806 VPCMPGTQ %YMM4,%YMM3,%YMM3 |
0x45280b VPAND %YMM3,%YMM8,%YMM3 |
0x45280f VPCMPGTQ %YMM7,%YMM5,%YMM4 |
0x452814 VPOR %YMM4,%YMM3,%YMM3 |
0x452818 VPADDQ %YMM3,%YMM6,%YMM3 |
0x45281c VPCMPEQD %YMM4,%YMM4,%YMM4 |
0x452820 VPSUBQ %YMM4,%YMM3,%YMM3 |
0x452824 VPXOR %YMM0,%YMM1,%YMM0 |
0x452828 VPCMPGTQ %YMM0,%YMM2,%YMM0 |
0x45282d VPXOR %YMM0,%YMM3,%YMM1 |
0x452831 VPSUBQ %YMM0,%YMM1,%YMM0 |
0x452835 VMOVUPS -0x80(%RSP),%YMM8 |
0x45283b VMOVUPS -0x60(%RSP),%YMM9 |
0x452841 VMOVUPS -0x40(%RSP),%YMM10 |
0x452847 VMOVUPS -0x20(%RSP),%YMM11 |
0x45284d VMOVUPS (%RSP),%YMM12 |
0x452852 VMOVUPS 0x20(%RSP),%YMM13 |
0x452858 VMOVUPS 0x40(%RSP),%YMM14 |
0x45285e ADD $0x78,%RSP |
0x452862 RET |
0x452863 NOPW %CS:(%RAX,%RAX,1) |
0x45286d NOPL (%RAX) |
Path / |
Source file and lines | |
Module | exec |
nb instructions | 114 |
nb uops | 125.50 |
loop length | 591.50 |
used x86 registers | 1.50 |
used mmx registers | 0 |
used xmm registers | 3 |
used ymm registers | 15 |
used zmm registers | 0 |
nb stack references | 7 |
ADD-SUB / MUL ratio | 3.75 |
micro-operation queue | 20.92 cycles |
front end | 20.92 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 31.67 | 31.33 | 6.67 | 6.67 | 3.50 | 31.50 | 2.00 | 3.50 | 3.50 | 3.50 | 0.50 | 6.67 |
cycles | 31.67 | 31.33 | 6.67 | 6.67 | 3.50 | 31.50 | 2.00 | 3.50 | 3.50 | 3.50 | 0.50 | 6.67 |
Cycles executing div or sqrt instructions | 3.00 |
FE+BE cycles | 189.09-200.07 |
Stall cycles | 167.77-178.75 |
RS full (events) | 188.55-199.53 |
Front-end | 20.92 |
Dispatch | 31.67 |
DIV/SQRT | 3.00 |
Overall L1 | 31.67 |
all | 94% |
load | 33% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 91% |
all | 87% |
load | 50% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 65% |
all | 90% |
load | 47% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 79% |
all | 46% |
load | 25% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 50% |
add-sub | 50% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 44% |
all | 44% |
load | 31% |
store | 50% |
mul | 50% |
add-sub | 50% |
fma | 50% |
div/sqrt | 25% |
other | 35% |
all | 45% |
load | 30% |
store | 50% |
mul | 50% |
add-sub | 50% |
fma | 50% |
div/sqrt | 25% |
other | 40% |
Source file and lines | |
Module | exec |
nb instructions | 115 |
nb uops | 128 |
loop length | 595 |
used x86 registers | 2 |
used mmx registers | 0 |
used xmm registers | 3 |
used ymm registers | 15 |
used zmm registers | 0 |
nb stack references | 7 |
ADD-SUB / MUL ratio | 3.75 |
micro-operation queue | 21.33 cycles |
front end | 21.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 32.17 | 31.83 | 6.67 | 6.67 | 3.50 | 32.00 | 2.00 | 3.50 | 3.50 | 3.50 | 1.00 | 6.67 |
cycles | 32.17 | 31.83 | 6.67 | 6.67 | 3.50 | 32.00 | 2.00 | 3.50 | 3.50 | 3.50 | 1.00 | 6.67 |
Cycles executing div or sqrt instructions | 6.00 |
FE+BE cycles | 188.58-199.54 |
Stall cycles | 166.92-177.88 |
RS full (events) | 188.03-198.99 |
Front-end | 21.33 |
Dispatch | 32.17 |
DIV/SQRT | 6.00 |
Overall L1 | 32.17 |
all | 93% |
load | 33% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 89% |
all | 87% |
load | 50% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 65% |
all | 89% |
load | 47% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 78% |
all | 46% |
load | 25% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 50% |
add-sub | 50% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 44% |
all | 44% |
load | 31% |
store | 50% |
mul | 50% |
add-sub | 50% |
fma | 50% |
div/sqrt | 25% |
other | 35% |
all | 45% |
load | 30% |
store | 50% |
mul | 50% |
add-sub | 50% |
fma | 50% |
div/sqrt | 25% |
other | 40% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
ENDBR64 | |||||||||||||||
VPXOR %XMM2,%XMM2,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPCMPEQQ %YMM2,%YMM1,%YMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VTESTPD %YMM3,%YMM3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 |
JE 45262b <__svml_i64div4_l9+0x1b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
DIV %AL | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
SUB $0x78,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVUPS %YMM14,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVUPS %YMM13,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVUPS %YMM12,(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVUPS %YMM11,-0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVUPS %YMM10,-0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVUPS %YMM9,-0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVUPS %YMM8,-0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPSUBQ %YMM1,%YMM2,%YMM3 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VBLENDVPD %YMM1,%YMM3,%YMM1,%YMM3 | 3 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 2-3 | 1 |
VPBLENDD $-0x56,%YMM2,%YMM3,%YMM4 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPBROADCASTQ 0x23917(%RIP),%YMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VPOR %YMM4,%YMM9,%YMM4 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VBROADCASTSD 0x23912(%RIP),%YMM10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VADDPD %YMM4,%YMM10,%YMM5 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPSRLQ $0x20,%YMM3,%YMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2-4 | 0.50 |
VPBROADCASTQ 0x23908(%RIP),%YMM11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VPOR %YMM4,%YMM11,%YMM7 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VBROADCASTSD 0x23903(%RIP),%YMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VADDPD %YMM6,%YMM7,%YMM8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VADDPD %YMM5,%YMM8,%YMM12 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VBROADCASTSD 0x238fa(%RIP),%YMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VANDPD %YMM7,%YMM12,%YMM7 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VSUBPD %YMM7,%YMM8,%YMM8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VADDPD %YMM5,%YMM8,%YMM8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPSUBQ %YMM0,%YMM2,%YMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VBLENDVPD %YMM0,%YMM5,%YMM0,%YMM5 | 3 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 2-3 | 1 |
VPSRLQ $0x20,%YMM5,%YMM13 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2-4 | 0.50 |
VPOR %YMM11,%YMM13,%YMM11 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDPD %YMM6,%YMM11,%YMM11 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPBLENDD $-0x56,%YMM2,%YMM5,%YMM13 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPOR %YMM9,%YMM13,%YMM9 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDPD %YMM10,%YMM9,%YMM9 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VADDPD %YMM9,%YMM11,%YMM10 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VCVTPD2PS %YMM12,%XMM13 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 7 | 1 |
VRCPPS %XMM13,%XMM13 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 1 |
VCVTPS2PD %XMM13,%YMM13 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 7 | 1 |
VBROADCASTSD 0x238b1(%RIP),%YMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VFNMADD231PD %YMM12,%YMM13,%YMM14 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD132PD %YMM13,%YMM13,%YMM14 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %YMM14,%YMM10,%YMM10 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VROUNDPD $0x3,%YMM10,%YMM10 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VBROADCASTSD 0x2389b(%RIP),%YMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VANDPD %YMM12,%YMM10,%YMM10 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VFNMADD231PD %YMM10,%YMM7,%YMM11 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFNMADD231PD %YMM10,%YMM8,%YMM9 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDPD %YMM9,%YMM11,%YMM9 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %YMM9,%YMM14,%YMM11 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VROUNDPD $0x3,%YMM11,%YMM11 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VANDPD %YMM12,%YMM11,%YMM11 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VFNMADD231PD %YMM11,%YMM7,%YMM9 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFNMADD231PD %YMM11,%YMM8,%YMM9 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %YMM9,%YMM14,%YMM13 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VROUNDPD $0x3,%YMM13,%YMM13 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VANDPD %YMM12,%YMM13,%YMM12 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VFNMADD231PD %YMM7,%YMM12,%YMM9 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFNMADD231PD %YMM8,%YMM12,%YMM9 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %YMM9,%YMM14,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VBROADCASTSD 0x23815(%RIP),%YMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VADDPD %YMM8,%YMM12,%YMM9 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VADDPD %YMM8,%YMM11,%YMM11 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VBROADCASTSD 0x2383a(%RIP),%YMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VANDPD %YMM12,%YMM11,%YMM11 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VBROADCASTSD 0x23804(%RIP),%YMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VADDPD %YMM12,%YMM10,%YMM12 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VADDPD %YMM6,%YMM12,%YMM6 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VSUBPD %YMM6,%YMM10,%YMM6 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VADDPD %YMM6,%YMM8,%YMM6 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPSHUFB 0x23832(%RIP),%YMM6,%YMM6 | 2 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.50 |
VPSLLQ $0x20,%YMM12,%YMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2-4 | 0.50 |
VPADDD %YMM6,%YMM8,%YMM6 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VCVTTPD2DQ %YMM7,%XMM7 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 7 | 1 |
VPADDQ %YMM6,%YMM11,%YMM6 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPMOVZXDQ %XMM7,%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VANDPD 0x23833(%RIP),%YMM9,%YMM8 | 1 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
VPADDD %YMM7,%YMM8,%YMM7 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPADDQ %YMM7,%YMM6,%YMM6 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPMULUDQ %YMM4,%YMM6,%YMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0.50 |
VPSRLQ $0x20,%YMM6,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2-4 | 0.50 |
VPMULUDQ %YMM3,%YMM7,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0.50 |
VPADDQ %YMM7,%YMM4,%YMM4 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPSLLQ $0x20,%YMM4,%YMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2-4 | 0.50 |
VPMULUDQ %YMM3,%YMM6,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0.50 |
VPADDQ %YMM4,%YMM7,%YMM4 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPSUBQ %YMM4,%YMM5,%YMM4 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VPSRLQ $0x3f,%YMM3,%YMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2-4 | 0.50 |
VPSRLQ $0x3f,%YMM4,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2-4 | 0.50 |
VPCMPEQQ %YMM7,%YMM5,%YMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPCMPGTQ %YMM4,%YMM3,%YMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0-3 | 1 |
VPAND %YMM3,%YMM8,%YMM3 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPCMPGTQ %YMM7,%YMM5,%YMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0-3 | 1 |
VPOR %YMM4,%YMM3,%YMM3 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPADDQ %YMM3,%YMM6,%YMM3 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPCMPEQD %YMM4,%YMM4,%YMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPSUBQ %YMM4,%YMM3,%YMM3 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VPXOR %YMM0,%YMM1,%YMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VPCMPGTQ %YMM0,%YMM2,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0-3 | 1 |
VPXOR %YMM0,%YMM3,%YMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VPSUBQ %YMM0,%YMM1,%YMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VMOVUPS -0x80(%RSP),%YMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPS -0x60(%RSP),%YMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPS -0x40(%RSP),%YMM10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPS -0x20(%RSP),%YMM11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPS (%RSP),%YMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPS 0x20(%RSP),%YMM13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPS 0x40(%RSP),%YMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
ADD $0x78,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
Source file and lines | |
Module | exec |
nb instructions | 113 |
nb uops | 123 |
loop length | 588 |
used x86 registers | 1 |
used mmx registers | 0 |
used xmm registers | 3 |
used ymm registers | 15 |
used zmm registers | 0 |
nb stack references | 7 |
ADD-SUB / MUL ratio | 3.75 |
micro-operation queue | 20.50 cycles |
front end | 20.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 31.17 | 30.83 | 6.67 | 6.67 | 3.50 | 31.00 | 2.00 | 3.50 | 3.50 | 3.50 | 0.00 | 6.67 |
cycles | 31.17 | 30.83 | 6.67 | 6.67 | 3.50 | 31.00 | 2.00 | 3.50 | 3.50 | 3.50 | 0.00 | 6.67 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 189.60-200.60 |
Stall cycles | 168.62-179.62 |
RS full (events) | 189.07-200.07 |
Front-end | 20.50 |
Dispatch | 31.17 |
Overall L1 | 31.17 |
all | 95% |
load | 33% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 92% |
all | 87% |
load | 50% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 65% |
all | 90% |
load | 47% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 80% |
all | 47% |
load | 25% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 50% |
add-sub | 50% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 45% |
all | 44% |
load | 31% |
store | 50% |
mul | 50% |
add-sub | 50% |
fma | 50% |
div/sqrt | 25% |
other | 35% |
all | 45% |
load | 30% |
store | 50% |
mul | 50% |
add-sub | 50% |
fma | 50% |
div/sqrt | 25% |
other | 41% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
ENDBR64 | |||||||||||||||
VPXOR %XMM2,%XMM2,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPCMPEQQ %YMM2,%YMM1,%YMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VTESTPD %YMM3,%YMM3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 1 |
JE 45262b <__svml_i64div4_l9+0x1b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SUB $0x78,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVUPS %YMM14,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVUPS %YMM13,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVUPS %YMM12,(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVUPS %YMM11,-0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVUPS %YMM10,-0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVUPS %YMM9,-0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVUPS %YMM8,-0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPSUBQ %YMM1,%YMM2,%YMM3 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VBLENDVPD %YMM1,%YMM3,%YMM1,%YMM3 | 3 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 2-3 | 1 |
VPBLENDD $-0x56,%YMM2,%YMM3,%YMM4 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPBROADCASTQ 0x23917(%RIP),%YMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VPOR %YMM4,%YMM9,%YMM4 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VBROADCASTSD 0x23912(%RIP),%YMM10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VADDPD %YMM4,%YMM10,%YMM5 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPSRLQ $0x20,%YMM3,%YMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2-4 | 0.50 |
VPBROADCASTQ 0x23908(%RIP),%YMM11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VPOR %YMM4,%YMM11,%YMM7 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VBROADCASTSD 0x23903(%RIP),%YMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VADDPD %YMM6,%YMM7,%YMM8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VADDPD %YMM5,%YMM8,%YMM12 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VBROADCASTSD 0x238fa(%RIP),%YMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VANDPD %YMM7,%YMM12,%YMM7 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VSUBPD %YMM7,%YMM8,%YMM8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VADDPD %YMM5,%YMM8,%YMM8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPSUBQ %YMM0,%YMM2,%YMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VBLENDVPD %YMM0,%YMM5,%YMM0,%YMM5 | 3 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 2-3 | 1 |
VPSRLQ $0x20,%YMM5,%YMM13 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2-4 | 0.50 |
VPOR %YMM11,%YMM13,%YMM11 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDPD %YMM6,%YMM11,%YMM11 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPBLENDD $-0x56,%YMM2,%YMM5,%YMM13 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPOR %YMM9,%YMM13,%YMM9 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDPD %YMM10,%YMM9,%YMM9 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VADDPD %YMM9,%YMM11,%YMM10 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VCVTPD2PS %YMM12,%XMM13 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 7 | 1 |
VRCPPS %XMM13,%XMM13 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 1 |
VCVTPS2PD %XMM13,%YMM13 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 7 | 1 |
VBROADCASTSD 0x238b1(%RIP),%YMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VFNMADD231PD %YMM12,%YMM13,%YMM14 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD132PD %YMM13,%YMM13,%YMM14 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %YMM14,%YMM10,%YMM10 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VROUNDPD $0x3,%YMM10,%YMM10 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VBROADCASTSD 0x2389b(%RIP),%YMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VANDPD %YMM12,%YMM10,%YMM10 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VFNMADD231PD %YMM10,%YMM7,%YMM11 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFNMADD231PD %YMM10,%YMM8,%YMM9 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDPD %YMM9,%YMM11,%YMM9 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %YMM9,%YMM14,%YMM11 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VROUNDPD $0x3,%YMM11,%YMM11 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VANDPD %YMM12,%YMM11,%YMM11 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VFNMADD231PD %YMM11,%YMM7,%YMM9 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFNMADD231PD %YMM11,%YMM8,%YMM9 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %YMM9,%YMM14,%YMM13 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VROUNDPD $0x3,%YMM13,%YMM13 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VANDPD %YMM12,%YMM13,%YMM12 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VFNMADD231PD %YMM7,%YMM12,%YMM9 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFNMADD231PD %YMM8,%YMM12,%YMM9 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %YMM9,%YMM14,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VBROADCASTSD 0x23815(%RIP),%YMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VADDPD %YMM8,%YMM12,%YMM9 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VADDPD %YMM8,%YMM11,%YMM11 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VBROADCASTSD 0x2383a(%RIP),%YMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VANDPD %YMM12,%YMM11,%YMM11 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VBROADCASTSD 0x23804(%RIP),%YMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VADDPD %YMM12,%YMM10,%YMM12 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VADDPD %YMM6,%YMM12,%YMM6 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VSUBPD %YMM6,%YMM10,%YMM6 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VADDPD %YMM6,%YMM8,%YMM6 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPSHUFB 0x23832(%RIP),%YMM6,%YMM6 | 2 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.50 |
VPSLLQ $0x20,%YMM12,%YMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2-4 | 0.50 |
VPADDD %YMM6,%YMM8,%YMM6 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VCVTTPD2DQ %YMM7,%XMM7 | 2 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 7 | 1 |
VPADDQ %YMM6,%YMM11,%YMM6 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPMOVZXDQ %XMM7,%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VANDPD 0x23833(%RIP),%YMM9,%YMM8 | 1 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
VPADDD %YMM7,%YMM8,%YMM7 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPADDQ %YMM7,%YMM6,%YMM6 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPMULUDQ %YMM4,%YMM6,%YMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0.50 |
VPSRLQ $0x20,%YMM6,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2-4 | 0.50 |
VPMULUDQ %YMM3,%YMM7,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0.50 |
VPADDQ %YMM7,%YMM4,%YMM4 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPSLLQ $0x20,%YMM4,%YMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2-4 | 0.50 |
VPMULUDQ %YMM3,%YMM6,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0.50 |
VPADDQ %YMM4,%YMM7,%YMM4 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPSUBQ %YMM4,%YMM5,%YMM4 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VPSRLQ $0x3f,%YMM3,%YMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2-4 | 0.50 |
VPSRLQ $0x3f,%YMM4,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2-4 | 0.50 |
VPCMPEQQ %YMM7,%YMM5,%YMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPCMPGTQ %YMM4,%YMM3,%YMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0-3 | 1 |
VPAND %YMM3,%YMM8,%YMM3 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPCMPGTQ %YMM7,%YMM5,%YMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0-3 | 1 |
VPOR %YMM4,%YMM3,%YMM3 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPADDQ %YMM3,%YMM6,%YMM3 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPCMPEQD %YMM4,%YMM4,%YMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPSUBQ %YMM4,%YMM3,%YMM3 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VPXOR %YMM0,%YMM1,%YMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VPCMPGTQ %YMM0,%YMM2,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0-3 | 1 |
VPXOR %YMM0,%YMM3,%YMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VPSUBQ %YMM0,%YMM1,%YMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VMOVUPS -0x80(%RSP),%YMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPS -0x60(%RSP),%YMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPS -0x40(%RSP),%YMM10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPS -0x20(%RSP),%YMM11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPS (%RSP),%YMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPS 0x20(%RSP),%YMM13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPS 0x40(%RSP),%YMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
ADD $0x78,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
Name | Coverage (%) | Time (s) |
---|---|---|
○__svml_i64div4_l9 | 0.08 | 0.11 |