Function: _Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracte ... | Module: exec | Source: PdV.cpp:48-63 [...] | Coverage: 1.56% |
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Function: _Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracte ... | Module: exec | Source: PdV.cpp:48-63 [...] | Coverage: 1.56% |
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/home/eoseret/qaas_runs_CPU_9468/171-112-9712/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/context.h: 69 - 69 |
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69: T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; } |
/home/eoseret/qaas_runs_CPU_9468/171-112-9712/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/PdV.cpp: 48 - 63 |
-------------------------------------------------------------------------------- |
48: #pragma omp parallel for simd collapse(2) |
49: for (int j = (y_min + 1); j < (y_max + 2); j++) { |
50: for (int i = (x_min + 1); i < (x_max + 2); i++) { |
51: double left_flux = (xarea(i, j) * (xvel0(i, j) + xvel0(i + 0, j + 1) + xvel0(i, j) + xvel0(i + 0, j + 1))) * 0.25 * dt * 0.5; |
52: double right_flux = |
53: (xarea(i + 1, j + 0) * (xvel0(i + 1, j + 0) + xvel0(i + 1, j + 1) + xvel0(i + 1, j + 0) + xvel0(i + 1, j + 1))) * 0.25 * dt * |
54: 0.5; |
55: double bottom_flux = (yarea(i, j) * (yvel0(i, j) + yvel0(i + 1, j + 0) + yvel0(i, j) + yvel0(i + 1, j + 0))) * 0.25 * dt * 0.5; |
56: double top_flux = (yarea(i + 0, j + 1) * (yvel0(i + 0, j + 1) + yvel0(i + 1, j + 1) + yvel0(i + 0, j + 1) + yvel0(i + 1, j + 1))) * |
57: 0.25 * dt * 0.5; |
58: double total_flux = right_flux - left_flux + top_flux - bottom_flux; |
59: double volume_change_s = volume(i, j) / (volume(i, j) + total_flux); |
60: double recip_volume = 1.0 / volume(i, j); |
61: double energy_change = (pressure(i, j) / density0(i, j) + viscosity(i, j) / density0(i, j)) * total_flux * recip_volume; |
62: energy1(i, j) = energy0(i, j) - energy_change; |
63: density1(i, j) = density0(i, j) * volume_change_s; |
0x432ae0 PUSH %RBP |
0x432ae1 MOV %RSP,%RBP |
0x432ae4 PUSH %R15 |
0x432ae6 PUSH %R14 |
0x432ae8 PUSH %R13 |
0x432aea PUSH %R12 |
0x432aec PUSH %RBX |
0x432aed AND $-0x20,%RSP |
0x432af1 SUB $0x440,%RSP |
0x432af8 MOV %RDX,%R13 |
0x432afb MOV 0x70(%RBP),%RAX |
0x432aff MOV 0x60(%RBP),%R10 |
0x432b03 MOV 0x58(%RBP),%RSI |
0x432b07 MOV 0x48(%RBP),%R14 |
0x432b0b MOV 0x40(%RBP),%RBX |
0x432b0f MOV 0x38(%RBP),%R12 |
0x432b13 MOV 0x30(%RBP),%RDX |
0x432b17 MOV %RDX,0x30(%RSP) |
0x432b1c MOV 0x28(%RBP),%R11 |
0x432b20 MOV 0x20(%RBP),%RDX |
0x432b24 MOV %RDX,0x20(%RSP) |
0x432b29 MOV 0x18(%RBP),%RDX |
0x432b2d MOV %RDX,0xe0(%RSP) |
0x432b35 MOV 0x10(%RBP),%R15 |
0x432b39 MOV 0x50(%RBP),%EDX |
0x432b3c MOV %EDX,0x4(%RSP) |
0x432b40 MOVL $0,0x4c(%RSP) |
0x432b48 TEST %RAX,%RAX |
0x432b4b JS 4335ba |
0x432b51 MOV %R12,0x100(%RSP) |
0x432b59 MOV %R11,0x10(%RSP) |
0x432b5e MOV %RCX,0x18(%RSP) |
0x432b63 MOV %R8,0x28(%RSP) |
0x432b68 MOV %R9,0x38(%RSP) |
0x432b6d MOV %RSI,0x8(%RSP) |
0x432b72 MOV (%RDI),%ESI |
0x432b74 MOVQ $0,0x98(%RSP) |
0x432b80 MOV %RAX,0x90(%RSP) |
0x432b88 MOVQ $0x1,0xd8(%RSP) |
0x432b94 SUB $0x8,%RSP |
0x432b98 LEA 0xe0(%RSP),%RAX |
0x432ba0 LEA 0x54(%RSP),%RCX |
0x432ba5 LEA 0xa0(%RSP),%R8 |
0x432bad LEA 0x98(%RSP),%R9 |
0x432bb5 MOV $0x481740,%EDI |
0x432bba MOV %ESI,0x50(%RSP) |
0x432bbe MOV $0x22,%EDX |
0x432bc3 PUSH $0x1 |
0x432bc5 PUSH $0x1 |
0x432bc7 PUSH %RAX |
0x432bc8 MOV %R10,%R12 |
0x432bcb CALL 4031e0 <__kmpc_for_static_init_8@plt> |
0x432bd0 ADD $0x20,%RSP |
0x432bd4 MOV 0x98(%RSP),%RSI |
0x432bdc MOV 0x90(%RSP),%RAX |
0x432be4 MOV %RAX,0x88(%RSP) |
0x432bec CMP %RAX,%RSI |
0x432bef JA 43359b |
0x432bf5 MOV %R12,%R11 |
0x432bf8 VMOVQ %R13,%XMM0 |
0x432bfd SUB 0x8(%RSP),%R11D |
0x432c02 LEA 0x1(%RSI),%RAX |
0x432c06 MOV 0x88(%RSP),%RDX |
0x432c0e LEA 0x1(%RDX),%RCX |
0x432c12 CMP %RCX,%RAX |
0x432c15 CMOVG %RAX,%RCX |
0x432c19 MOV 0x18(%RSP),%RAX |
0x432c1e MOV (%RAX),%RDX |
0x432c21 MOV 0x10(%RAX),%RAX |
0x432c25 MOV %RAX,0x40(%RSP) |
0x432c2a MOV (%RBX),%R8 |
0x432c2d MOV 0x10(%RBX),%R13 |
0x432c31 MOV 0x28(%RSP),%RAX |
0x432c36 MOV (%RAX),%R9 |
0x432c39 MOV 0x10(%RAX),%RDI |
0x432c3d VMULSD 0x318ab(%RIP),%XMM0,%XMM4 |
0x432c45 MOV (%R14),%R10 |
0x432c48 MOV 0x10(%R14),%R14 |
0x432c4c MOV 0x38(%RSP),%RAX |
0x432c51 MOV (%RAX),%RBX |
0x432c54 MOV %RBX,0x80(%RSP) |
0x432c5c MOV 0x10(%RAX),%RAX |
0x432c60 MOV %RAX,0x38(%RSP) |
0x432c65 MOV 0x30(%RSP),%RAX |
0x432c6a MOV (%RAX),%RBX |
0x432c6d MOV %RBX,0x78(%RSP) |
0x432c72 MOV 0x10(%RAX),%RAX |
0x432c76 MOV %RAX,0x30(%RSP) |
0x432c7b MOV (%R15),%RAX |
0x432c7e MOV %RAX,0x70(%RSP) |
0x432c83 MOV 0x10(%R15),%R15 |
0x432c87 MOV 0x100(%RSP),%RAX |
0x432c8f MOV (%RAX),%RBX |
0x432c92 MOV %RBX,0x68(%RSP) |
0x432c97 MOV 0x10(%RAX),%RAX |
0x432c9b MOV %RAX,0x28(%RSP) |
0x432ca0 MOV 0x20(%RSP),%RAX |
0x432ca5 MOV (%RAX),%RBX |
0x432ca8 MOV %RBX,0x60(%RSP) |
0x432cad MOV 0x10(%RAX),%RAX |
0x432cb1 MOV %RAX,0x20(%RSP) |
0x432cb6 MOV 0x10(%RSP),%RAX |
0x432cbb MOV (%RAX),%RBX |
0x432cbe MOV %RBX,0x58(%RSP) |
0x432cc3 MOV 0x10(%RAX),%RAX |
0x432cc7 MOV %RAX,0x18(%RSP) |
0x432ccc MOV 0xe0(%RSP),%RAX |
0x432cd4 MOV (%RAX),%RBX |
0x432cd7 MOV 0x10(%RAX),%RAX |
0x432cdb SUB %RSI,%RCX |
0x432cde MOV $-0x8,%R12D |
0x432ce4 MOV %RCX,0xa8(%RSP) |
0x432cec AND %RCX,%R12 |
0x432cef MOV %R12,%RCX |
0x432cf2 MOV %RBX,%R12 |
0x432cf5 MOV 0x80(%RSP),%RBX |
0x432cfd MOV %R8,0x50(%RSP) |
0x432d02 MOV %R9,0xc0(%RSP) |
0x432d0a MOV %R10,0xb8(%RSP) |
0x432d12 MOV %R12,0xb0(%RSP) |
0x432d1a MOV %RAX,0x10(%RSP) |
0x432d1f MOV %RDX,0xc8(%RSP) |
0x432d27 JE 4335c9 |
0x432d2d MOV %R11,0xa0(%RSP) |
0x432d35 VPBROADCASTQ %R11,%YMM0 |
0x432d3b VMOVDQU %YMM0,0x300(%RSP) |
0x432d44 MOV 0x4(%RSP),%EAX |
0x432d48 VPBROADCASTD %EAX,%YMM0 |
0x432d4e VMOVDQU %YMM0,0x2e0(%RSP) |
0x432d57 MOV 0x8(%RSP),%RAX |
0x432d5c VPBROADCASTD %EAX,%YMM0 |
0x432d62 VMOVDQU %YMM0,0x2c0(%RSP) |
0x432d6b VPBROADCASTQ %RDX,%YMM0 |
0x432d71 VMOVDQU %YMM0,0x2a0(%RSP) |
0x432d7a VPBROADCASTQ %R8,%YMM0 |
0x432d80 VMOVDQU %YMM0,0x280(%RSP) |
0x432d89 VPBROADCASTQ %R9,%YMM0 |
0x432d8f VMOVDQU %YMM0,0x260(%RSP) |
0x432d98 VPBROADCASTQ %R10,%YMM0 |
0x432d9e VMOVDQU %YMM0,0x240(%RSP) |
0x432da7 VMOVUPD %XMM4,0x130(%RSP) |
0x432db0 VBROADCASTSD %XMM4,%YMM0 |
0x432db5 VMOVUPD %YMM0,0x220(%RSP) |
0x432dbe VPBROADCASTQ %RBX,%YMM0 |
0x432dc4 VMOVDQU %YMM0,0x200(%RSP) |
0x432dcd MOV 0x78(%RSP),%RAX |
0x432dd2 VPBROADCASTQ %RAX,%YMM0 |
0x432dd8 VMOVDQU %YMM0,0x1e0(%RSP) |
0x432de1 MOV 0x70(%RSP),%RAX |
0x432de6 VPBROADCASTQ %RAX,%YMM0 |
0x432dec VMOVDQU %YMM0,0x1c0(%RSP) |
0x432df5 MOV 0x68(%RSP),%RAX |
0x432dfa VPBROADCASTQ %RAX,%YMM0 |
0x432e00 VMOVDQU %YMM0,0x1a0(%RSP) |
0x432e09 MOV 0x60(%RSP),%RAX |
0x432e0e VPBROADCASTQ %RAX,%YMM0 |
0x432e14 VMOVDQU %YMM0,0x180(%RSP) |
0x432e1d MOV 0x58(%RSP),%RAX |
0x432e22 VPBROADCASTQ %RAX,%YMM0 |
0x432e28 VMOVDQU %YMM0,0x160(%RSP) |
0x432e31 VPBROADCASTQ %RSI,%YMM0 |
0x432e37 VPADDQ 0x31841(%RIP),%YMM0,%YMM9 |
0x432e3f VPADDQ 0x316b9(%RIP),%YMM0,%YMM0 |
0x432e47 VPBROADCASTQ %R12,%YMM1 |
0x432e4d VMOVDQU %YMM1,0x140(%RSP) |
0x432e56 XOR %EAX,%EAX |
0x432e58 NOPL (%RAX,%RAX,1) |
(295) 0x432e60 MOV %RAX,0xd0(%RSP) |
(295) 0x432e68 VMOVDQU %YMM0,0xe0(%RSP) |
(295) 0x432e71 VMOVDQU %YMM9,0x100(%RSP) |
(295) 0x432e7a VMOVDQU 0xe0(%RSP),%YMM0 |
(295) 0x432e83 VMOVUPS 0x300(%RSP),%YMM8 |
(295) 0x432e8c VMOVAPS %YMM8,%YMM1 |
(295) 0x432e90 MOV %RCX,%R12 |
(295) 0x432e93 MOV $0x452aa0,%RBX |
(295) 0x432e9a CALL %RBX |
(295) 0x432e9c VMOVDQA %YMM0,%YMM11 |
(295) 0x432ea0 VMOVDQA %YMM9,%YMM0 |
(295) 0x432ea4 VMOVAPS %YMM8,%YMM1 |
(295) 0x432ea8 CALL %RBX |
(295) 0x432eaa VPMOVQD %YMM11,%XMM1 |
(295) 0x432eb0 VPMOVQD %YMM0,%XMM0 |
(295) 0x432eb6 VINSERTI128 $0x1,%XMM0,%YMM1,%YMM0 |
(295) 0x432ebc VPADDD 0x2e0(%RSP),%YMM0,%YMM29 |
(295) 0x432ec4 VMOVDQU 0xe0(%RSP),%YMM0 |
(295) 0x432ecd VMOVAPS %YMM8,%YMM1 |
(295) 0x432ed1 MOV $0x452870,%RBX |
(295) 0x432ed8 CALL %RBX |
(295) 0x432eda VMOVDQA %YMM0,%YMM11 |
(295) 0x432ede VMOVDQA %YMM9,%YMM0 |
(295) 0x432ee2 VMOVAPS %YMM8,%YMM1 |
(295) 0x432ee6 CALL %RBX |
(295) 0x432ee8 MOV %R12,%RCX |
(295) 0x432eeb VPMOVQD %YMM11,%XMM1 |
(295) 0x432ef1 VPMOVQD %YMM0,%XMM0 |
(295) 0x432ef7 VINSERTI128 $0x1,%XMM0,%YMM1,%YMM0 |
(295) 0x432efd VPADDD 0x2c0(%RSP),%YMM0,%YMM5 |
(295) 0x432f06 VPMOVSXDQ %XMM5,%YMM7 |
(295) 0x432f0b VPMOVSXDQ %XMM29,%YMM28 |
(295) 0x432f11 VMOVDQU 0x2a0(%RSP),%YMM8 |
(295) 0x432f1a VXORPS %XMM0,%XMM0,%XMM0 |
(295) 0x432f1e VPMULLQ %YMM28,%YMM8,%YMM0 |
(295) 0x432f24 VXORPD %XMM4,%XMM4,%XMM4 |
(295) 0x432f28 VPADDQ %YMM7,%YMM0,%YMM1 |
(295) 0x432f2c KXNORW %K0,%K0,%K1 |
(295) 0x432f30 VMOVDQU 0x280(%RSP),%YMM3 |
(295) 0x432f39 VXORPS %XMM11,%XMM11,%XMM11 |
(295) 0x432f3e VPMULLQ %YMM28,%YMM3,%YMM11 |
(295) 0x432f44 VXORPD %XMM6,%XMM6,%XMM6 |
(295) 0x432f48 VPADDQ %YMM7,%YMM11,%YMM12 |
(295) 0x432f4c VPCMPEQD %YMM2,%YMM2,%YMM2 |
(295) 0x432f50 VPSUBD %YMM2,%YMM29,%YMM9 |
(295) 0x432f56 VMOVDQU %YMM9,0x3e0(%RSP) |
(295) 0x432f5f VPMOVSXDQ %XMM9,%YMM30 |
(295) 0x432f65 VPMULLQ %YMM30,%YMM3,%YMM27 |
(295) 0x432f6b MOV 0x40(%RSP),%R10 |
(295) 0x432f70 VGATHERQPD (%R10,%YMM1,8),%YMM4{%K1} |
(295) 0x432f77 VMOVUPD %YMM4,0x400(%RSP) |
(295) 0x432f80 KXNORW %K0,%K0,%K1 |
(295) 0x432f84 VPSUBD %YMM2,%YMM5,%YMM31 |
(295) 0x432f8a VPMOVSXDQ %XMM31,%YMM14 |
(295) 0x432f90 VPADDQ %YMM0,%YMM14,%YMM0 |
(295) 0x432f94 VXORPD %XMM1,%XMM1,%XMM1 |
(295) 0x432f98 VGATHERQPD (%R13,%YMM12,8),%YMM6{%K1} |
(295) 0x432fa0 VMOVUPD %YMM6,0x3c0(%RSP) |
(295) 0x432fa9 KXNORW %K0,%K0,%K1 |
(295) 0x432fad VPADDQ %YMM14,%YMM11,%YMM12 |
(295) 0x432fb2 VMOVDQU 0x260(%RSP),%YMM4 |
(295) 0x432fbb VXORPS %XMM11,%XMM11,%XMM11 |
(295) 0x432fc0 VPMULLQ %YMM28,%YMM4,%YMM11 |
(295) 0x432fc6 VGATHERQPD (%R10,%YMM0,8),%YMM1{%K1} |
(295) 0x432fcd VMOVUPD %YMM1,0x3a0(%RSP) |
(295) 0x432fd6 VXORPD %XMM0,%XMM0,%XMM0 |
(295) 0x432fda KXNORW %K0,%K0,%K1 |
(295) 0x432fde VPADDQ %YMM7,%YMM11,%YMM15 |
(295) 0x432fe2 VXORPD %XMM1,%XMM1,%XMM1 |
(295) 0x432fe6 KXNORW %K0,%K0,%K2 |
(295) 0x432fea VGATHERQPD (%R13,%YMM12,8),%YMM0{%K1} |
(295) 0x432ff2 VMOVUPD %YMM0,0x380(%RSP) |
(295) 0x432ffb VMOVDQU 0x240(%RSP),%YMM11 |
(295) 0x433004 VPMULLQ %YMM28,%YMM11,%YMM19 |
(295) 0x43300a VPADDQ %YMM7,%YMM19,%YMM12 |
(295) 0x433010 VPXOR %XMM2,%XMM2,%XMM2 |
(295) 0x433014 VGATHERQPD (%RDI,%YMM15,8),%YMM1{%K2} |
(295) 0x43301b VMOVUPD %YMM1,0x360(%RSP) |
(295) 0x433024 KXNORW %K0,%K0,%K1 |
(295) 0x433028 VPADDQ %YMM14,%YMM19,%YMM15 |
(295) 0x43302e VMOVDQU 0x200(%RSP),%YMM0 |
(295) 0x433037 VPXORD %XMM19,%XMM19,%XMM19 |
(295) 0x43303d VPMULLQ %YMM28,%YMM0,%YMM19 |
(295) 0x433043 VGATHERQPD (%R14,%YMM12,8),%YMM2{%K1} |
(295) 0x43304a VMOVUPD %YMM2,0x340(%RSP) |
(295) 0x433053 VXORPD %XMM1,%XMM1,%XMM1 |
(295) 0x433057 KXNORW %K0,%K0,%K1 |
(295) 0x43305b VPADDQ %YMM7,%YMM19,%YMM19 |
(295) 0x433061 VXORPD %XMM12,%XMM12,%XMM12 |
(295) 0x433066 KXNORW %K0,%K0,%K2 |
(295) 0x43306a VGATHERQPD (%R14,%YMM15,8),%YMM1{%K1} |
(295) 0x433071 VMOVUPD %YMM1,0x320(%RSP) |
(295) 0x43307a VMOVDQU 0x1e0(%RSP),%YMM1 |
(295) 0x433083 VXORPS %XMM15,%XMM15,%XMM15 |
(295) 0x433088 VPMULLQ %YMM28,%YMM1,%YMM15 |
(295) 0x43308e VPADDQ %YMM7,%YMM15,%YMM20 |
(295) 0x433094 VPXOR %XMM15,%XMM15,%XMM15 |
(295) 0x433099 MOV 0x38(%RSP),%RAX |
(295) 0x43309e VGATHERQPD (%RAX,%YMM19,8),%YMM12{%K2} |
(295) 0x4330a5 KXNORW %K0,%K0,%K1 |
(295) 0x4330a9 VMOVDQU 0x1a0(%RSP),%YMM6 |
(295) 0x4330b2 VPXORD %XMM19,%XMM19,%XMM19 |
(295) 0x4330b8 VPMULLQ %YMM28,%YMM6,%YMM19 |
(295) 0x4330be VPADDQ %YMM7,%YMM19,%YMM21 |
(295) 0x4330c4 MOV 0x30(%RSP),%RDX |
(295) 0x4330c9 VGATHERQPD (%RDX,%YMM20,8),%YMM15{%K1} |
(295) 0x4330d0 VPXORD %XMM19,%XMM19,%XMM19 |
(295) 0x4330d6 KXNORW %K0,%K0,%K1 |
(295) 0x4330da VMOVDQU 0x180(%RSP),%YMM2 |
(295) 0x4330e3 VPXORD %XMM20,%XMM20,%XMM20 |
(295) 0x4330e9 VPMULLQ %YMM28,%YMM2,%YMM20 |
(295) 0x4330ef MOV 0x28(%RSP),%R8 |
(295) 0x4330f4 VGATHERQPD (%R8,%YMM21,8),%YMM19{%K1} |
(295) 0x4330fb VPADDQ %YMM7,%YMM20,%YMM21 |
(295) 0x433101 VPXORD %XMM20,%XMM20,%XMM20 |
(295) 0x433107 KXNORW %K0,%K0,%K1 |
(295) 0x43310b MOV 0x20(%RSP),%R9 |
(295) 0x433110 VGATHERQPD (%R9,%YMM21,8),%YMM20{%K1} |
(295) 0x433117 VPADDQ %YMM7,%YMM27,%YMM21 |
(295) 0x43311d VXORPD %XMM22,%XMM22,%XMM22 |
(295) 0x433123 KXNORW %K0,%K0,%K1 |
(295) 0x433127 VPADDQ %YMM14,%YMM27,%YMM27 |
(295) 0x43312d VXORPD %XMM23,%XMM23,%XMM23 |
(295) 0x433133 VGATHERQPD (%R13,%YMM21,8),%YMM22{%K1} |
(295) 0x43313b KXNORW %K0,%K0,%K1 |
(295) 0x43313f VPXORD %XMM21,%XMM21,%XMM21 |
(295) 0x433145 VPMULLQ %YMM30,%YMM4,%YMM21 |
(295) 0x43314b VPADDQ %YMM7,%YMM21,%YMM21 |
(295) 0x433151 VGATHERQPD (%R13,%YMM27,8),%YMM23{%K1} |
(295) 0x433159 VXORPD %XMM27,%XMM27,%XMM27 |
(295) 0x43315f KXNORW %K0,%K0,%K1 |
(295) 0x433163 VPMULLQ %YMM30,%YMM11,%YMM30 |
(295) 0x433169 VGATHERQPD (%RDI,%YMM21,8),%YMM27{%K1} |
(295) 0x433170 VPADDQ %YMM7,%YMM30,%YMM21 |
(295) 0x433176 VXORPD %XMM24,%XMM24,%XMM24 |
(295) 0x43317c KXNORW %K0,%K0,%K1 |
(295) 0x433180 VGATHERQPD (%R14,%YMM21,8),%YMM24{%K1} |
(295) 0x433187 VEXTRACTI128 $0x1,%YMM5,%XMM5 |
(295) 0x43318d VPMOVSXDQ %XMM5,%YMM5 |
(295) 0x433192 VPADDQ %YMM14,%YMM30,%YMM14 |
(295) 0x433198 VXORPD %XMM21,%XMM21,%XMM21 |
(295) 0x43319e KXNORW %K0,%K0,%K1 |
(295) 0x4331a2 VGATHERQPD (%R14,%YMM14,8),%YMM21{%K1} |
(295) 0x4331a9 VEXTRACTI32X4 $0x1,%YMM29,%XMM14 |
(295) 0x4331b0 VPMOVSXDQ %XMM14,%YMM14 |
(295) 0x4331b5 VPMULLQ %YMM14,%YMM8,%YMM29 |
(295) 0x4331bb VPADDQ %YMM5,%YMM29,%YMM30 |
(295) 0x4331c1 VXORPD %XMM25,%XMM25,%XMM25 |
(295) 0x4331c7 KXNORW %K0,%K0,%K1 |
(295) 0x4331cb VPMULLQ %YMM14,%YMM3,%YMM26 |
(295) 0x4331d1 VGATHERQPD (%R10,%YMM30,8),%YMM25{%K1} |
(295) 0x4331d8 VPADDQ %YMM5,%YMM26,%YMM30 |
(295) 0x4331de VXORPD %XMM16,%XMM16,%XMM16 |
(295) 0x4331e4 KXNORW %K0,%K0,%K1 |
(295) 0x4331e8 VEXTRACTI32X4 $0x1,%YMM31,%XMM31 |
(295) 0x4331ef VPMOVSXDQ %XMM31,%YMM31 |
(295) 0x4331f5 VGATHERQPD (%R13,%YMM30,8),%YMM16{%K1} |
(295) 0x4331fd VPADDQ %YMM31,%YMM29,%YMM29 |
(295) 0x433203 VXORPD %XMM30,%XMM30,%XMM30 |
(295) 0x433209 KXNORW %K0,%K0,%K1 |
(295) 0x43320d VPADDQ %YMM31,%YMM26,%YMM26 |
(295) 0x433213 VXORPD %XMM17,%XMM17,%XMM17 |
(295) 0x433219 VGATHERQPD (%R10,%YMM29,8),%YMM30{%K1} |
(295) 0x433220 KXNORW %K0,%K0,%K1 |
(295) 0x433224 VPXORD %XMM29,%XMM29,%XMM29 |
(295) 0x43322a VPMULLQ %YMM14,%YMM4,%YMM29 |
(295) 0x433230 VPADDQ %YMM5,%YMM29,%YMM29 |
(295) 0x433236 VGATHERQPD (%R13,%YMM26,8),%YMM17{%K1} |
(295) 0x43323e VXORPD %XMM26,%XMM26,%XMM26 |
(295) 0x433244 KXNORW %K0,%K0,%K1 |
(295) 0x433248 VPMULLQ %YMM14,%YMM11,%YMM18 |
(295) 0x43324e VGATHERQPD (%RDI,%YMM29,8),%YMM26{%K1} |
(295) 0x433255 VPADDQ %YMM5,%YMM18,%YMM29 |
(295) 0x43325b VPXOR %XMM8,%XMM8,%XMM8 |
(295) 0x433260 KXNORW %K0,%K0,%K1 |
(295) 0x433264 VPADDQ %YMM31,%YMM18,%YMM18 |
(295) 0x43326a VPXOR %XMM9,%XMM9,%XMM9 |
(295) 0x43326f VGATHERQPD (%R14,%YMM29,8),%YMM8{%K1} |
(295) 0x433276 KXNORW %K0,%K0,%K1 |
(295) 0x43327a VPXORD %XMM29,%XMM29,%XMM29 |
(295) 0x433280 VPMULLQ %YMM14,%YMM0,%YMM29 |
(295) 0x433286 VPADDQ %YMM5,%YMM29,%YMM29 |
(295) 0x43328c VGATHERQPD (%R14,%YMM18,8),%YMM9{%K1} |
(295) 0x433293 VXORPD %XMM18,%XMM18,%XMM18 |
(295) 0x433299 KXNORW %K0,%K0,%K1 |
(295) 0x43329d VPMULLQ %YMM14,%YMM1,%YMM13 |
(295) 0x4332a3 VGATHERQPD (%RAX,%YMM29,8),%YMM18{%K1} |
(295) 0x4332aa VPADDQ %YMM5,%YMM13,%YMM13 |
(295) 0x4332ae VXORPD %XMM29,%XMM29,%XMM29 |
(295) 0x4332b4 KXNORW %K0,%K0,%K1 |
(295) 0x4332b8 VGATHERQPD (%RDX,%YMM13,8),%YMM29{%K1} |
(295) 0x4332bf VXORPS %XMM13,%XMM13,%XMM13 |
(295) 0x4332c4 VPMULLQ %YMM14,%YMM6,%YMM13 |
(295) 0x4332ca VPADDQ %YMM5,%YMM13,%YMM13 |
(295) 0x4332ce KXNORW %K0,%K0,%K1 |
(295) 0x4332d2 VXORPD %XMM10,%XMM10,%XMM10 |
(295) 0x4332d7 VGATHERQPD (%R8,%YMM13,8),%YMM10{%K1} |
(295) 0x4332de VXORPS %XMM13,%XMM13,%XMM13 |
(295) 0x4332e3 VPMULLQ %YMM14,%YMM2,%YMM13 |
(295) 0x4332e9 VPADDQ %YMM5,%YMM13,%YMM13 |
(295) 0x4332ed KXNORW %K0,%K0,%K1 |
(295) 0x4332f1 VPXOR %XMM6,%XMM6,%XMM6 |
(295) 0x4332f5 VGATHERQPD (%R9,%YMM13,8),%YMM6{%K1} |
(295) 0x4332fc VMOVDQU 0x3e0(%RSP),%YMM0 |
(295) 0x433305 VEXTRACTI128 $0x1,%YMM0,%XMM13 |
(295) 0x43330b VPMOVSXDQ %XMM13,%YMM13 |
(295) 0x433310 KXNORW %K0,%K0,%K1 |
(295) 0x433314 VPMULLQ %YMM13,%YMM3,%YMM1 |
(295) 0x43331a VPADDQ %YMM5,%YMM1,%YMM2 |
(295) 0x43331e VPXOR %XMM0,%XMM0,%XMM0 |
(295) 0x433322 VGATHERQPD (%R13,%YMM2,8),%YMM0{%K1} |
(295) 0x43332a VPADDQ %YMM31,%YMM1,%YMM1 |
(295) 0x433330 KXNORW %K0,%K0,%K1 |
(295) 0x433334 VXORPD %XMM2,%XMM2,%XMM2 |
(295) 0x433338 VGATHERQPD (%R13,%YMM1,8),%YMM2{%K1} |
(295) 0x433340 VXORPS %XMM1,%XMM1,%XMM1 |
(295) 0x433344 VPMULLQ %YMM13,%YMM4,%YMM1 |
(295) 0x43334a VPADDQ %YMM5,%YMM1,%YMM3 |
(295) 0x43334e KXNORW %K0,%K0,%K1 |
(295) 0x433352 VPXOR %XMM4,%XMM4,%XMM4 |
(295) 0x433356 VGATHERQPD (%RDI,%YMM3,8),%YMM4{%K1} |
(295) 0x43335d VXORPS %XMM3,%XMM3,%XMM3 |
(295) 0x433361 VPMULLQ %YMM13,%YMM11,%YMM3 |
(295) 0x433367 KXNORW %K0,%K0,%K1 |
(295) 0x43336b VPADDQ %YMM5,%YMM3,%YMM13 |
(295) 0x43336f VPXOR %XMM1,%XMM1,%XMM1 |
(295) 0x433373 VGATHERQPD (%R14,%YMM13,8),%YMM1{%K1} |
(295) 0x43337a VPADDQ %YMM31,%YMM3,%YMM3 |
(295) 0x433380 KXNORW %K0,%K0,%K1 |
(295) 0x433384 VXORPD %XMM13,%XMM13,%XMM13 |
(295) 0x433389 VGATHERQPD (%R14,%YMM3,8),%YMM13{%K1} |
(295) 0x433390 VADDPD %YMM8,%YMM9,%YMM3 |
(295) 0x433395 VADDPD %YMM16,%YMM0,%YMM0 |
(295) 0x43339b VMULPD %YMM26,%YMM3,%YMM3 |
(295) 0x4333a1 VFMADD231PD %YMM0,%YMM25,%YMM3 |
(295) 0x4333a7 VADDPD 0x3c0(%RSP),%YMM22,%YMM0 |
(295) 0x4333af VADDPD %YMM17,%YMM2,%YMM2 |
(295) 0x4333b5 VMOVUPD 0x320(%RSP),%YMM8 |
(295) 0x4333be VADDPD 0x340(%RSP),%YMM8,%YMM8 |
(295) 0x4333c7 VFNMADD231PD %YMM2,%YMM30,%YMM3 |
(295) 0x4333cd VMOVDQU 0x1c0(%RSP),%YMM9 |
(295) 0x4333d6 VXORPS %XMM2,%XMM2,%XMM2 |
(295) 0x4333da VPMULLQ %YMM28,%YMM9,%YMM2 |
(295) 0x4333e0 VPMULLQ %YMM14,%YMM9,%YMM9 |
(295) 0x4333e6 VMULPD 0x360(%RSP),%YMM8,%YMM8 |
(295) 0x4333ef VFMADD231PD 0x400(%RSP),%YMM0,%YMM8 |
(295) 0x4333f9 VPADDQ %YMM7,%YMM2,%YMM0 |
(295) 0x4333fd VPXOR %XMM2,%XMM2,%XMM2 |
(295) 0x433401 KXNORW %K0,%K0,%K1 |
(295) 0x433405 VGATHERQPD (%R15,%YMM0,8),%YMM2{%K1} |
(295) 0x43340c VADDPD 0x380(%RSP),%YMM23,%YMM11 |
(295) 0x433414 VFNMADD231PD 0x3a0(%RSP),%YMM11,%YMM8 |
(295) 0x43341e VPADDQ %YMM5,%YMM9,%YMM9 |
(295) 0x433422 VXORPD %XMM11,%XMM11,%XMM11 |
(295) 0x433427 KXNORW %K0,%K0,%K1 |
(295) 0x43342b VGATHERQPD (%R15,%YMM9,8),%YMM11{%K1} |
(295) 0x433432 VADDPD %YMM24,%YMM21,%YMM16 |
(295) 0x433438 VFMSUB213PD %YMM8,%YMM27,%YMM16 |
(295) 0x43343e VADDPD %YMM15,%YMM19,%YMM8 |
(295) 0x433444 VMOVUPD 0x220(%RSP),%YMM17 |
(295) 0x43344c VMULPD %YMM16,%YMM17,%YMM15 |
(295) 0x433452 VMULPD %YMM2,%YMM12,%YMM2 |
(295) 0x433456 VMULPD %YMM15,%YMM8,%YMM8 |
(295) 0x43345b VDIVPD %YMM2,%YMM8,%YMM2 |
(295) 0x43345f VSUBPD %YMM2,%YMM20,%YMM2 |
(295) 0x433465 VMOVDQU64 0x160(%RSP),%YMM16 |
(295) 0x43346d VXORPS %XMM8,%XMM8,%XMM8 |
(295) 0x433472 VPMULLQ %YMM28,%YMM16,%YMM8 |
(295) 0x433478 VPADDQ %YMM7,%YMM8,%YMM8 |
(295) 0x43347c KXNORW %K0,%K0,%K1 |
(295) 0x433480 MOV 0x18(%RSP),%RAX |
(295) 0x433485 VSCATTERQPD %YMM2,(%RAX,%YMM8,8){%K1} |
(295) 0x43348c VADDPD %YMM1,%YMM13,%YMM1 |
(295) 0x433490 VFMSUB213PD %YMM3,%YMM4,%YMM1 |
(295) 0x433495 VADDPD %YMM29,%YMM10,%YMM2 |
(295) 0x43349b VMULPD %YMM1,%YMM17,%YMM1 |
(295) 0x4334a1 VMULPD %YMM18,%YMM11,%YMM3 |
(295) 0x4334a7 VMULPD %YMM1,%YMM2,%YMM2 |
(295) 0x4334ab VDIVPD %YMM3,%YMM2,%YMM2 |
(295) 0x4334af VSUBPD %YMM2,%YMM6,%YMM2 |
(295) 0x4334b3 VXORPS %XMM3,%XMM3,%XMM3 |
(295) 0x4334b7 VPMULLQ %YMM14,%YMM16,%YMM3 |
(295) 0x4334bd VPADDQ %YMM5,%YMM3,%YMM3 |
(295) 0x4334c1 KXNORW %K0,%K0,%K1 |
(295) 0x4334c5 VSCATTERQPD %YMM2,(%RAX,%YMM3,8){%K1} |
(295) 0x4334cc VXORPD %XMM2,%XMM2,%XMM2 |
(295) 0x4334d0 KXNORW %K0,%K0,%K1 |
(295) 0x4334d4 VGATHERQPD (%R15,%YMM9,8),%YMM2{%K1} |
(295) 0x4334db VMOVDQU 0x100(%RSP),%YMM9 |
(295) 0x4334e4 VXORPD %XMM3,%XMM3,%XMM3 |
(295) 0x4334e8 KXNORW %K0,%K0,%K1 |
(295) 0x4334ec VGATHERQPD (%R15,%YMM0,8),%YMM3{%K1} |
(295) 0x4334f3 VADDPD %YMM12,%YMM15,%YMM0 |
(295) 0x4334f8 VMULPD %YMM3,%YMM12,%YMM3 |
(295) 0x4334fc VMOVDQU 0x140(%RSP),%YMM6 |
(295) 0x433505 VPMULLQ %YMM28,%YMM6,%YMM4 |
(295) 0x43350b VPADDQ %YMM7,%YMM4,%YMM4 |
(295) 0x43350f VDIVPD %YMM0,%YMM3,%YMM0 |
(295) 0x433513 KXNORW %K0,%K0,%K1 |
(295) 0x433517 MOV 0x10(%RSP),%RAX |
(295) 0x43351c VSCATTERQPD %YMM0,(%RAX,%YMM4,8){%K1} |
(295) 0x433523 VADDPD %YMM18,%YMM1,%YMM0 |
(295) 0x433529 VMULPD %YMM18,%YMM2,%YMM1 |
(295) 0x43352f VDIVPD %YMM0,%YMM1,%YMM0 |
(295) 0x433533 VXORPS %XMM1,%XMM1,%XMM1 |
(295) 0x433537 VPMULLQ %YMM14,%YMM6,%YMM1 |
(295) 0x43353d VPADDQ %YMM5,%YMM1,%YMM1 |
(295) 0x433541 KXNORW %K0,%K0,%K1 |
(295) 0x433545 VSCATTERQPD %YMM0,(%RAX,%YMM1,8){%K1} |
(295) 0x43354c MOV 0xd0(%RSP),%RAX |
(295) 0x433554 VMOVDQU 0xe0(%RSP),%YMM0 |
(295) 0x43355d VPBROADCASTQ 0x3113a(%RIP),%YMM1 |
(295) 0x433566 VPADDQ %YMM1,%YMM0,%YMM0 |
(295) 0x43356a VPADDQ %YMM1,%YMM9,%YMM9 |
(295) 0x43356e ADD $0x8,%RAX |
(295) 0x433572 CMP %R12,%RAX |
(295) 0x433575 JB 432e60 |
0x43357b CMP %RCX,0xa8(%RSP) |
0x433583 MOV 0xa0(%RSP),%R11 |
0x43358b VMOVUPD 0x130(%RSP),%XMM4 |
0x433594 MOV 0x40(%RSP),%R12 |
0x433599 JNE 4335d3 |
0x43359b MOV $0x481760,%EDI |
0x4335a0 MOV 0x48(%RSP),%ESI |
0x4335a4 LEA -0x28(%RBP),%RSP |
0x4335a8 POP %RBX |
0x4335a9 POP %R12 |
0x4335ab POP %R13 |
0x4335ad POP %R14 |
0x4335af POP %R15 |
0x4335b1 POP %RBP |
0x4335b2 VZEROUPPER |
0x4335b5 JMP 403050 |
0x4335ba LEA -0x28(%RBP),%RSP |
0x4335be POP %RBX |
0x4335bf POP %R12 |
0x4335c1 POP %R13 |
0x4335c3 POP %R14 |
0x4335c5 POP %R15 |
0x4335c7 POP %RBP |
0x4335c8 RET |
0x4335c9 MOV 0x40(%RSP),%R12 |
0x4335ce JMP 433785 |
0x4335d3 ADD %RCX,%RSI |
0x4335d6 JMP 433785 |
0x4335db NOPL (%RAX,%RAX,1) |
(294) 0x4335e0 MOV %RSI,%RAX |
(294) 0x4335e3 CQTO |
(294) 0x4335e5 IDIV %R11 |
(294) 0x4335e8 MOV 0x8(%RSP),%RAX |
(294) 0x4335ed ADD %EAX,%EDX |
(294) 0x4335ef MOVSXD %EDX,%RDX |
(294) 0x4335f2 MOVSXD %ECX,%RAX |
(294) 0x4335f5 MOV %R9,%RCX |
(294) 0x4335f8 IMUL %RAX,%RCX |
(294) 0x4335fc LEA 0x1(%RAX),%R8D |
(294) 0x433600 MOVSXD %R8D,%R8 |
(294) 0x433603 IMUL %R8,%R9 |
(294) 0x433607 LEA (%R9,%RDX,1),%R10 |
(294) 0x43360b VMOVSD (%R13,%R10,8),%XMM0 |
(294) 0x433612 LEA (%RCX,%RDX,1),%R10 |
(294) 0x433616 VADDSD (%R13,%R10,8),%XMM0,%XMM0 |
(294) 0x43361d LEA 0x1(%RCX,%RDX,1),%RCX |
(294) 0x433622 LEA 0x1(%R9,%RDX,1),%R9 |
(294) 0x433627 VMOVSD (%R13,%R9,8),%XMM1 |
(294) 0x43362e VADDSD (%R13,%RCX,8),%XMM1,%XMM1 |
(294) 0x433635 MOV 0xb8(%RSP),%RBX |
(294) 0x43363d MOV %RBX,%RCX |
(294) 0x433640 IMUL %RAX,%RCX |
(294) 0x433644 LEA 0x1(%RCX,%RDX,1),%R9 |
(294) 0x433649 ADD %RDX,%RCX |
(294) 0x43364c VMOVSD (%R14,%R9,8),%XMM2 |
(294) 0x433652 VADDSD (%R14,%RCX,8),%XMM2,%XMM2 |
(294) 0x433658 MOV 0xc0(%RSP),%R10 |
(294) 0x433660 MOV %R10,%RCX |
(294) 0x433663 IMUL %R8,%RCX |
(294) 0x433667 IMUL %RBX,%R8 |
(294) 0x43366b LEA 0x1(%R8,%RDX,1),%R9 |
(294) 0x433670 VMOVSD (%R14,%R9,8),%XMM3 |
(294) 0x433676 MOV 0xc8(%RSP),%R9 |
(294) 0x43367e ADD %RDX,%R8 |
(294) 0x433681 VADDSD (%R14,%R8,8),%XMM3,%XMM3 |
(294) 0x433687 IMUL %RAX,%R9 |
(294) 0x43368b MOV %R10,%R8 |
(294) 0x43368e IMUL %RAX,%R8 |
(294) 0x433692 ADD %RDX,%R8 |
(294) 0x433695 VMULSD (%RDI,%R8,8),%XMM2,%XMM2 |
(294) 0x43369b LEA 0x1(%R9,%RDX,1),%R8 |
(294) 0x4336a0 ADD %RDX,%R9 |
(294) 0x4336a3 VFMADD231SD (%R12,%R9,8),%XMM0,%XMM2 |
(294) 0x4336a9 ADD %RDX,%RCX |
(294) 0x4336ac VFNMADD231SD (%R12,%R8,8),%XMM1,%XMM2 |
(294) 0x4336b2 VFMSUB231SD (%RDI,%RCX,8),%XMM3,%XMM2 |
(294) 0x4336b8 VMULSD %XMM2,%XMM4,%XMM0 |
(294) 0x4336bc MOV 0x80(%RSP),%RCX |
(294) 0x4336c4 IMUL %RAX,%RCX |
(294) 0x4336c8 ADD %RDX,%RCX |
(294) 0x4336cb MOV 0x38(%RSP),%R8 |
(294) 0x4336d0 VMOVSD (%R8,%RCX,8),%XMM1 |
(294) 0x4336d6 MOV 0x78(%RSP),%RCX |
(294) 0x4336db IMUL %RAX,%RCX |
(294) 0x4336df ADD %RDX,%RCX |
(294) 0x4336e2 MOV 0x68(%RSP),%R8 |
(294) 0x4336e7 IMUL %RAX,%R8 |
(294) 0x4336eb ADD %RDX,%R8 |
(294) 0x4336ee MOV 0x28(%RSP),%R9 |
(294) 0x4336f3 VMOVSD (%R9,%R8,8),%XMM2 |
(294) 0x4336f9 MOV 0x70(%RSP),%R8 |
(294) 0x4336fe IMUL %RAX,%R8 |
(294) 0x433702 ADD %RDX,%R8 |
(294) 0x433705 MOV 0x30(%RSP),%R9 |
(294) 0x43370a VADDSD (%R9,%RCX,8),%XMM2,%XMM2 |
(294) 0x433710 VMULSD %XMM0,%XMM2,%XMM2 |
(294) 0x433714 VMULSD (%R15,%R8,8),%XMM1,%XMM3 |
(294) 0x43371a VDIVSD %XMM3,%XMM2,%XMM2 |
(294) 0x43371e MOV 0x60(%RSP),%RCX |
(294) 0x433723 IMUL %RAX,%RCX |
(294) 0x433727 ADD %RDX,%RCX |
(294) 0x43372a MOV 0x20(%RSP),%R9 |
(294) 0x43372f VMOVSD (%R9,%RCX,8),%XMM3 |
(294) 0x433735 VSUBSD %XMM2,%XMM3,%XMM2 |
(294) 0x433739 MOV 0x58(%RSP),%RCX |
(294) 0x43373e IMUL %RAX,%RCX |
(294) 0x433742 ADD %RDX,%RCX |
(294) 0x433745 MOV 0x18(%RSP),%R9 |
(294) 0x43374a VMOVSD %XMM2,(%R9,%RCX,8) |
(294) 0x433750 VMULSD (%R15,%R8,8),%XMM1,%XMM2 |
(294) 0x433756 IMUL 0xb0(%RSP),%RAX |
(294) 0x43375f ADD %RDX,%RAX |
(294) 0x433762 VADDSD %XMM1,%XMM0,%XMM0 |
(294) 0x433766 VDIVSD %XMM0,%XMM2,%XMM0 |
(294) 0x43376a MOV 0x10(%RSP),%RCX |
(294) 0x43376f VMOVSD %XMM0,(%RCX,%RAX,8) |
(294) 0x433774 INC %RSI |
(294) 0x433777 CMP 0x88(%RSP),%RSI |
(294) 0x43377f JG 43359b |
(294) 0x433785 MOV %RSI,%R8 |
(294) 0x433788 SHR $0x20,%R8 |
(294) 0x43378c JE 4337b0 |
(294) 0x43378e MOV %RSI,%RAX |
(294) 0x433791 XOR %EDX,%EDX |
(294) 0x433793 DIV %R11 |
(294) 0x433796 MOV %RAX,%RCX |
(294) 0x433799 MOV 0x50(%RSP),%R9 |
(294) 0x43379e ADD 0x4(%RSP),%ECX |
(294) 0x4337a2 TEST %R8,%R8 |
(294) 0x4337a5 JNE 4335e0 |
(294) 0x4337ab JMP 4337cb |
0x4337ad NOPL (%RAX) |
(294) 0x4337b0 MOV %ESI,%EAX |
(294) 0x4337b2 XOR %EDX,%EDX |
(294) 0x4337b4 DIV %R11D |
(294) 0x4337b7 MOV %EAX,%ECX |
(294) 0x4337b9 MOV 0x50(%RSP),%R9 |
(294) 0x4337be ADD 0x4(%RSP),%ECX |
(294) 0x4337c2 TEST %R8,%R8 |
(294) 0x4337c5 JNE 4335e0 |
(294) 0x4337cb MOV %ESI,%EAX |
(294) 0x4337cd XOR %EDX,%EDX |
(294) 0x4337cf DIV %R11D |
(294) 0x4337d2 JMP 4335e8 |
0x4337d7 NOPW (%RAX,%RAX,1) |
Path / |
Source file and lines | PdV.cpp:48-63 |
Module | exec |
nb instructions | 198 |
nb uops | 200 |
loop length | 1009 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 3 |
used zmm registers | 0 |
nb stack references | 60 |
micro-operation queue | 33.33 cycles |
front end | 33.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 5.80 | 5.80 | 25.67 | 25.67 | 31.00 | 17.00 | 5.80 | 31.00 | 31.00 | 31.00 | 5.60 | 25.67 |
cycles | 5.80 | 5.80 | 25.67 | 25.67 | 31.00 | 17.00 | 5.80 | 31.00 | 31.00 | 31.00 | 5.60 | 25.67 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 33.17 |
Stall cycles | 0.00 |
Front-end | 33.33 |
Dispatch | 31.00 |
Overall L1 | 33.33 |
all | 18% |
load | 14% |
store | 28% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 66% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 3% |
all | 60% |
load | 50% |
store | 100% |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 21% |
load | 18% |
store | 30% |
mul | 0% |
add-sub | 66% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 3% |
all | 18% |
load | 17% |
store | 22% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 35% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 25% |
load | 18% |
store | 37% |
mul | 12% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
all | 19% |
load | 17% |
store | 22% |
mul | 12% |
add-sub | 35% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x20,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x440,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x60(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%RBP),%EDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EDX,0x4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0,0x4c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 4335ba <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted.8+0xada> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R12,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,0x8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVQ $0,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0x1,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0xe0(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x54(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0xa0(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x98(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x481740,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %R10,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4031e0 <__kmpc_for_static_init_8@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x98(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x90(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RAX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JA 43359b <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted.8+0xabb> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R12,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVQ %R13,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
SUB 0x8(%RSP),%R11D | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
LEA 0x1(%RSI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x88(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDX),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVG %RAX,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RBX),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RBX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMULSD 0x318ab(%RIP),%XMM0,%XMM4 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
MOV (%R14),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R14),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RBX,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RBX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R15),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%R15),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x100(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RBX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RBX,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RBX,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe0(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %RSI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $-0x8,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
AND %RCX,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R12,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RBX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x80(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 4335c9 <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted.8+0xae9> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R11,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPBROADCASTQ %R11,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x300(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x4(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %EAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x2e0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x8(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %EAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x2c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %RDX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x2a0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %R8,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x280(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %R9,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x260(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %R10,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x240(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVUPD %XMM4,0x130(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VBROADCASTSD %XMM4,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %YMM0,0x220(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %RBX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x200(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x78(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x1e0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x70(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x1c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x68(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x1a0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x60(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x180(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x58(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %RSI,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPADDQ 0x31841(%RIP),%YMM0,%YMM9 | 1 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
VPADDQ 0x316b9(%RIP),%YMM0,%YMM0 | 1 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
VPBROADCASTQ %R12,%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM1,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RCX,0xa8(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV 0xa0(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVUPD 0x130(%RSP),%XMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
MOV 0x40(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 4335d3 <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted.8+0xaf3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x481760,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x48(%RSP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 403050 <__kmpc_for_static_fini@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
MOV 0x40(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 433785 <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted.8+0xca5> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RCX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 433785 <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted.8+0xca5> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | PdV.cpp:48-63 |
Module | exec |
nb instructions | 198 |
nb uops | 200 |
loop length | 1009 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 3 |
used zmm registers | 0 |
nb stack references | 60 |
micro-operation queue | 33.33 cycles |
front end | 33.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 5.80 | 5.80 | 25.67 | 25.67 | 31.00 | 17.00 | 5.80 | 31.00 | 31.00 | 31.00 | 5.60 | 25.67 |
cycles | 5.80 | 5.80 | 25.67 | 25.67 | 31.00 | 17.00 | 5.80 | 31.00 | 31.00 | 31.00 | 5.60 | 25.67 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 33.17 |
Stall cycles | 0.00 |
Front-end | 33.33 |
Dispatch | 31.00 |
Overall L1 | 33.33 |
all | 18% |
load | 14% |
store | 28% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 66% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 3% |
all | 60% |
load | 50% |
store | 100% |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 21% |
load | 18% |
store | 30% |
mul | 0% |
add-sub | 66% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 3% |
all | 18% |
load | 17% |
store | 22% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 35% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 25% |
load | 18% |
store | 37% |
mul | 12% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
all | 19% |
load | 17% |
store | 22% |
mul | 12% |
add-sub | 35% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x20,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x440,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x60(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%RBP),%EDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EDX,0x4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0,0x4c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 4335ba <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted.8+0xada> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R12,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,0x8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVQ $0,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0x1,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0xe0(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x54(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0xa0(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x98(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x481740,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %R10,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4031e0 <__kmpc_for_static_init_8@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x98(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x90(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RAX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JA 43359b <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted.8+0xabb> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R12,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVQ %R13,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
SUB 0x8(%RSP),%R11D | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
LEA 0x1(%RSI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x88(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDX),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVG %RAX,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RBX),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RBX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMULSD 0x318ab(%RIP),%XMM0,%XMM4 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
MOV (%R14),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R14),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RBX,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RBX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R15),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%R15),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x100(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RBX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RBX,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RBX,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe0(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %RSI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $-0x8,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
AND %RCX,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R12,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RBX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x80(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 4335c9 <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted.8+0xae9> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R11,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPBROADCASTQ %R11,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x300(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x4(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %EAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x2e0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x8(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %EAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x2c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %RDX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x2a0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %R8,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x280(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %R9,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x260(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %R10,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x240(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVUPD %XMM4,0x130(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VBROADCASTSD %XMM4,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %YMM0,0x220(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %RBX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x200(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x78(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x1e0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x70(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x1c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x68(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x1a0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x60(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x180(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x58(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %RSI,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPADDQ 0x31841(%RIP),%YMM0,%YMM9 | 1 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
VPADDQ 0x316b9(%RIP),%YMM0,%YMM0 | 1 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
VPBROADCASTQ %R12,%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM1,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RCX,0xa8(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV 0xa0(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVUPD 0x130(%RSP),%XMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
MOV 0x40(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 4335d3 <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted.8+0xaf3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x481760,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x48(%RSP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 403050 <__kmpc_for_static_fini@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
MOV 0x40(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 433785 <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted.8+0xca5> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RCX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 433785 <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted.8+0xca5> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted.8– | 1.56 | 2.2 |
○Loop 295 - PdV.cpp:48-63 - exec | 1.56 | 2.19 |
○Loop 294 - PdV.cpp:48-63 - exec | 0 | 0 |