Function: _Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted | Module: exec | Source: accelerate.cpp:40-53 [...] | Coverage: 2.23% |
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Function: _Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted | Module: exec | Source: accelerate.cpp:40-53 [...] | Coverage: 2.23% |
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/home/eoseret/qaas_runs_CPU_9468/171-112-9712/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/context.h: 69 - 69 |
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69: T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; } |
/home/eoseret/qaas_runs_CPU_9468/171-112-9712/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/accelerate.cpp: 40 - 53 |
-------------------------------------------------------------------------------- |
40: #pragma omp parallel for simd collapse(2) |
41: for (int j = (y_min + 1); j < (y_max + 1 + 2); j++) { |
42: for (int i = (x_min + 1); i < (x_max + 1 + 2); i++) { |
43: double stepbymass_s = halfdt / ((density0(i - 1, j - 1) * volume(i - 1, j - 1) + density0(i - 1, j + 0) * volume(i - 1, j + 0) + |
44: density0(i, j) * volume(i, j) + density0(i + 0, j - 1) * volume(i + 0, j - 1)) * |
45: 0.25); |
46: xvel1(i, j) = xvel0(i, j) - stepbymass_s * (xarea(i, j) * (pressure(i, j) - pressure(i - 1, j + 0)) + |
47: xarea(i + 0, j - 1) * (pressure(i + 0, j - 1) - pressure(i - 1, j - 1))); |
48: yvel1(i, j) = yvel0(i, j) - stepbymass_s * (yarea(i, j) * (pressure(i, j) - pressure(i + 0, j - 1)) + |
49: yarea(i - 1, j + 0) * (pressure(i - 1, j + 0) - pressure(i - 1, j - 1))); |
50: xvel1(i, j) = xvel1(i, j) - stepbymass_s * (xarea(i, j) * (viscosity(i, j) - viscosity(i - 1, j + 0)) + |
51: xarea(i + 0, j - 1) * (viscosity(i + 0, j - 1) - viscosity(i - 1, j - 1))); |
52: yvel1(i, j) = yvel1(i, j) - stepbymass_s * (yarea(i, j) * (viscosity(i, j) - viscosity(i + 0, j - 1)) + |
53: yarea(i - 1, j + 0) * (viscosity(i - 1, j + 0) - viscosity(i - 1, j - 1))); |
0x41b7b0 PUSH %RBP |
0x41b7b1 MOV %RSP,%RBP |
0x41b7b4 PUSH %R15 |
0x41b7b6 PUSH %R14 |
0x41b7b8 PUSH %R13 |
0x41b7ba PUSH %R12 |
0x41b7bc PUSH %RBX |
0x41b7bd AND $-0x20,%RSP |
0x41b7c1 SUB $0x200,%RSP |
0x41b7c8 MOV %R9,%R13 |
0x41b7cb MOV %RCX,%R14 |
0x41b7ce MOV %RDX,%RSI |
0x41b7d1 MOV 0x68(%RBP),%RAX |
0x41b7d5 MOV 0x58(%RBP),%R12 |
0x41b7d9 MOV 0x50(%RBP),%RCX |
0x41b7dd MOV 0x38(%RBP),%R9 |
0x41b7e1 MOV 0x30(%RBP),%RDX |
0x41b7e5 MOV %RDX,0x10(%RSP) |
0x41b7ea MOV 0x28(%RBP),%R11 |
0x41b7ee MOV 0x20(%RBP),%RBX |
0x41b7f2 MOV 0x18(%RBP),%R10 |
0x41b7f6 VMOVQ 0x40(%RBP),%XMM0 |
0x41b7fb MOV 0x10(%RBP),%R15 |
0x41b7ff MOV 0x48(%RBP),%EDX |
0x41b802 MOV %EDX,0x1c(%RSP) |
0x41b806 MOVL $0,0x4c(%RSP) |
0x41b80e TEST %RAX,%RAX |
0x41b811 JS 41bfc3 |
0x41b817 MOV %R11,0x30(%RSP) |
0x41b81c MOV %R10,0x20(%RSP) |
0x41b821 MOV %R9,0x50(%RSP) |
0x41b826 MOV %R8,(%RSP) |
0x41b82a MOV %RSI,0x8(%RSP) |
0x41b82f MOV %RCX,0x28(%RSP) |
0x41b834 MOV (%RDI),%ESI |
0x41b836 MOVQ $0,0xc0(%RSP) |
0x41b842 MOV %RAX,0xb8(%RSP) |
0x41b84a MOVQ $0x1,0xf8(%RSP) |
0x41b856 SUB $0x8,%RSP |
0x41b85a LEA 0x100(%RSP),%RAX |
0x41b862 LEA 0x54(%RSP),%RCX |
0x41b867 LEA 0xc8(%RSP),%R8 |
0x41b86f LEA 0xc0(%RSP),%R9 |
0x41b877 MOV $0x4803a0,%EDI |
0x41b87c MOV %ESI,0x50(%RSP) |
0x41b880 MOV $0x22,%EDX |
0x41b885 PUSH $0x1 |
0x41b887 PUSH $0x1 |
0x41b889 PUSH %RAX |
0x41b88a VMOVDQU %XMM0,0x120(%RSP) |
0x41b893 CALL 4031e0 <__kmpc_for_static_init_8@plt> |
0x41b898 VMOVDQU 0x120(%RSP),%XMM3 |
0x41b8a1 ADD $0x20,%RSP |
0x41b8a5 MOV 0xc0(%RSP),%RSI |
0x41b8ad MOV 0xb8(%RSP),%RAX |
0x41b8b5 MOV %RAX,0x98(%RSP) |
0x41b8bd CMP %RAX,%RSI |
0x41b8c0 JA 41bfa4 |
0x41b8c6 MOV %R12,%RCX |
0x41b8c9 SUB 0x28(%RSP),%ECX |
0x41b8cd MOV (%R13),%RAX |
0x41b8d1 MOV %RAX,0x40(%RSP) |
0x41b8d6 MOV 0x10(%R13),%RAX |
0x41b8da MOV %RAX,0x38(%RSP) |
0x41b8df LEA 0x1(%RSI),%RAX |
0x41b8e3 MOV 0x98(%RSP),%RDI |
0x41b8eb MOV %R14,%R12 |
0x41b8ee LEA 0x1(%RDI),%R14 |
0x41b8f2 CMP %R14,%RAX |
0x41b8f5 CMOVG %RAX,%R14 |
0x41b8f9 MOV (%RSP),%RAX |
0x41b8fd MOV (%RAX),%R9 |
0x41b900 MOV 0x10(%RAX),%RAX |
0x41b904 MOV %RAX,0x90(%RSP) |
0x41b90c MOV (%RBX),%R10 |
0x41b90f MOV 0x10(%RBX),%RAX |
0x41b913 MOV %RAX,0xb0(%RSP) |
0x41b91b MOV 0x8(%RSP),%RAX |
0x41b920 MOV (%RAX),%R11 |
0x41b923 MOV 0x10(%RAX),%RAX |
0x41b927 MOV %RAX,0x8(%RSP) |
0x41b92c MOV (%R15),%RBX |
0x41b92f MOV 0x10(%R15),%R15 |
0x41b933 MOV 0x10(%RSP),%RAX |
0x41b938 MOV (%RAX),%R8 |
0x41b93b MOV 0x10(%RAX),%RAX |
0x41b93f MOV %RAX,0x10(%RSP) |
0x41b944 MOV 0x30(%RSP),%RAX |
0x41b949 MOV (%RAX),%R13 |
0x41b94c MOV 0x10(%RAX),%RAX |
0x41b950 MOV %RAX,0x30(%RSP) |
0x41b955 MOV (%R12),%RAX |
0x41b959 MOV %RAX,0x88(%RSP) |
0x41b961 MOV 0x10(%R12),%RDI |
0x41b966 MOV 0x50(%RSP),%RAX |
0x41b96b MOV (%RAX),%R12 |
0x41b96e MOV %R12,0x80(%RSP) |
0x41b976 MOV 0x10(%RAX),%RAX |
0x41b97a MOV 0x20(%RSP),%R12 |
0x41b97f MOV (%R12),%RDX |
0x41b983 MOV %RDX,0x78(%RSP) |
0x41b988 MOV 0x10(%R12),%R12 |
0x41b98d MOV %R12,0x20(%RSP) |
0x41b992 SUB %RSI,%R14 |
0x41b995 MOV $-0x4,%R12D |
0x41b99b MOV %R14,0xc8(%RSP) |
0x41b9a3 AND %R14,%R12 |
0x41b9a6 MOV 0x90(%RSP),%R14 |
0x41b9ae MOV %RCX,0x70(%RSP) |
0x41b9b3 MOV %R9,0x68(%RSP) |
0x41b9b8 MOV %R11,0xe8(%RSP) |
0x41b9c0 MOV %RBX,0xe0(%RSP) |
0x41b9c8 MOV %R15,0x60(%RSP) |
0x41b9cd MOV %RDI,0xa8(%RSP) |
0x41b9d5 MOV %RAX,0xa0(%RSP) |
0x41b9dd MOV %R10,0xf0(%RSP) |
0x41b9e5 MOV %R8,0xd8(%RSP) |
0x41b9ed MOV %R13,0xd0(%RSP) |
0x41b9f5 JE 41c233 |
0x41b9fb VPBROADCASTQ %RCX,%YMM8 |
0x41ba01 MOV 0x1c(%RSP),%EAX |
0x41ba05 VPBROADCASTD %EAX,%XMM0 |
0x41ba0b VMOVDQU %XMM0,0x50(%RSP) |
0x41ba11 MOV 0x28(%RSP),%RAX |
0x41ba16 VPBROADCASTD %EAX,%XMM0 |
0x41ba1c VMOVDQU %XMM0,0x110(%RSP) |
0x41ba25 MOV 0x40(%RSP),%RAX |
0x41ba2a VPBROADCASTQ %RAX,%YMM12 |
0x41ba30 VPBROADCASTQ %R9,%YMM13 |
0x41ba36 VPBROADCASTQ %XMM3,%YMM0 |
0x41ba3b VMOVDQU %YMM0,0x1c0(%RSP) |
0x41ba44 VPBROADCASTQ %R10,%YMM0 |
0x41ba4a VMOVDQU %YMM0,0x1a0(%RSP) |
0x41ba53 VPBROADCASTQ %R11,%YMM16 |
0x41ba59 VPBROADCASTQ %RBX,%YMM17 |
0x41ba5f VPBROADCASTQ %R8,%YMM0 |
0x41ba65 VMOVDQU %YMM0,0x180(%RSP) |
0x41ba6e VPBROADCASTQ %R13,%YMM0 |
0x41ba74 VMOVDQU %YMM0,0x160(%RSP) |
0x41ba7d MOV 0x88(%RSP),%RAX |
0x41ba85 VPBROADCASTQ %RAX,%YMM0 |
0x41ba8b VMOVDQU %YMM0,0x140(%RSP) |
0x41ba94 MOV 0x80(%RSP),%RAX |
0x41ba9c VPBROADCASTQ %RAX,%YMM0 |
0x41baa2 VMOVDQU %YMM0,0x120(%RSP) |
0x41baab MOV 0x78(%RSP),%RAX |
0x41bab0 VPBROADCASTQ %RAX,%YMM22 |
0x41bab6 VPBROADCASTQ %RSI,%YMM0 |
0x41babc VPADDQ 0x48a3c(%RIP),%YMM0,%YMM9 |
0x41bac4 XOR %R13D,%R13D |
0x41bac7 MOV 0x38(%RSP),%RDI |
0x41bacc MOV %R14,%RBX |
0x41bacf MOV 0x8(%RSP),%R14 |
0x41bad4 MOV %R12,(%RSP) |
0x41bad8 MOV 0x20(%RSP),%R12 |
0x41badd NOPL (%RAX) |
(150) 0x41bae0 VMOVDQA %YMM9,%YMM0 |
(150) 0x41bae4 VMOVDQA %YMM8,%YMM1 |
(150) 0x41bae8 MOV $0x452aa0,%RAX |
(150) 0x41baef CALL %RAX |
(150) 0x41baf1 VPMOVQD %YMM0,%XMM0 |
(150) 0x41baf7 VPADDD 0x50(%RSP),%XMM0,%XMM26 |
(150) 0x41baff VMOVDQA %YMM9,%YMM0 |
(150) 0x41bb03 VMOVDQA %YMM8,%YMM1 |
(150) 0x41bb07 CALL 452870 <__svml_i64rem4_l9> |
(150) 0x41bb0d VPMOVQD %YMM0,%XMM0 |
(150) 0x41bb13 VPCMPEQD %XMM3,%XMM3,%XMM3 |
(150) 0x41bb17 VPADDD %XMM3,%XMM26,%XMM1 |
(150) 0x41bb1d VPMOVSXDQ %XMM1,%YMM1 |
(150) 0x41bb22 VXORPS %XMM7,%XMM7,%XMM7 |
(150) 0x41bb26 VPMULLQ %YMM1,%YMM12,%YMM7 |
(150) 0x41bb2c VPADDD 0x110(%RSP),%XMM0,%XMM2 |
(150) 0x41bb35 VPADDD %XMM3,%XMM2,%XMM0 |
(150) 0x41bb39 VPMOVSXDQ %XMM0,%YMM0 |
(150) 0x41bb3e VPMULLQ %YMM1,%YMM13,%YMM28 |
(150) 0x41bb44 VPADDQ %YMM0,%YMM7,%YMM3 |
(150) 0x41bb48 KXNORW %K0,%K0,%K1 |
(150) 0x41bb4c VXORPD %XMM4,%XMM4,%XMM4 |
(150) 0x41bb50 VPADDQ %YMM0,%YMM28,%YMM5 |
(150) 0x41bb56 KXNORW %K0,%K0,%K2 |
(150) 0x41bb5a VXORPD %XMM6,%XMM6,%XMM6 |
(150) 0x41bb5e VGATHERQPD (%RDI,%YMM3,8),%YMM4{%K1} |
(150) 0x41bb65 VPMOVSXDQ %XMM26,%YMM3 |
(150) 0x41bb6b VPMULLQ %YMM3,%YMM12,%YMM29 |
(150) 0x41bb71 VPADDQ %YMM0,%YMM29,%YMM27 |
(150) 0x41bb77 VGATHERQPD (%RBX,%YMM5,8),%YMM6{%K2} |
(150) 0x41bb7e KXNORW %K0,%K0,%K1 |
(150) 0x41bb82 VPXORD %XMM26,%XMM26,%XMM26 |
(150) 0x41bb88 VXORPS %XMM5,%XMM5,%XMM5 |
(150) 0x41bb8c VPMULLQ %YMM3,%YMM13,%YMM5 |
(150) 0x41bb92 VGATHERQPD (%RDI,%YMM27,8),%YMM26{%K1} |
(150) 0x41bb99 VPADDQ %YMM0,%YMM5,%YMM30 |
(150) 0x41bb9f KXNORW %K0,%K0,%K1 |
(150) 0x41bba3 VXORPD %XMM27,%XMM27,%XMM27 |
(150) 0x41bba9 VPMOVSXDQ %XMM2,%YMM2 |
(150) 0x41bbae VGATHERQPD (%RBX,%YMM30,8),%YMM27{%K1} |
(150) 0x41bbb5 VPADDQ %YMM2,%YMM29,%YMM29 |
(150) 0x41bbbb KXNORW %K0,%K0,%K2 |
(150) 0x41bbbf VXORPD %XMM30,%XMM30,%XMM30 |
(150) 0x41bbc5 VPADDQ %YMM2,%YMM5,%YMM31 |
(150) 0x41bbcb KXNORW %K0,%K0,%K1 |
(150) 0x41bbcf VGATHERQPD (%RDI,%YMM29,8),%YMM30{%K2} |
(150) 0x41bbd6 VXORPD %XMM29,%XMM29,%XMM29 |
(150) 0x41bbdc VXORPS %XMM5,%XMM5,%XMM5 |
(150) 0x41bbe0 VPMULLQ %YMM3,%YMM16,%YMM5 |
(150) 0x41bbe6 VPADDQ %YMM2,%YMM5,%YMM5 |
(150) 0x41bbea VGATHERQPD (%RBX,%YMM31,8),%YMM29{%K1} |
(150) 0x41bbf1 KXNORW %K0,%K0,%K1 |
(150) 0x41bbf5 VXORPD %XMM31,%XMM31,%XMM31 |
(150) 0x41bbfb VPMULLQ %YMM3,%YMM17,%YMM24 |
(150) 0x41bc01 VGATHERQPD (%R14,%YMM5,8),%YMM31{%K1} |
(150) 0x41bc08 VPADDQ %YMM2,%YMM24,%YMM25 |
(150) 0x41bc0e KXNORW %K0,%K0,%K1 |
(150) 0x41bc12 VXORPD %XMM23,%XMM23,%XMM23 |
(150) 0x41bc18 VGATHERQPD (%R15,%YMM25,8),%YMM23{%K1} |
(150) 0x41bc1f VPADDQ %YMM2,%YMM7,%YMM7 |
(150) 0x41bc23 KXNORW %K0,%K0,%K1 |
(150) 0x41bc27 VXORPD %XMM11,%XMM11,%XMM11 |
(150) 0x41bc2c VPADDQ %YMM2,%YMM28,%YMM28 |
(150) 0x41bc32 KXNORW %K0,%K0,%K2 |
(150) 0x41bc36 VGATHERQPD (%RDI,%YMM7,8),%YMM11{%K1} |
(150) 0x41bc3d VXORPD %XMM14,%XMM14,%XMM14 |
(150) 0x41bc42 VMOVDQU 0x1a0(%RSP),%YMM7 |
(150) 0x41bc4b VPMULLQ %YMM3,%YMM7,%YMM7 |
(150) 0x41bc51 VPADDQ %YMM0,%YMM24,%YMM24 |
(150) 0x41bc57 VGATHERQPD (%RBX,%YMM28,8),%YMM14{%K2} |
(150) 0x41bc5e KXNORW %K0,%K0,%K1 |
(150) 0x41bc62 VXORPD %XMM28,%XMM28,%XMM28 |
(150) 0x41bc68 VPMULLQ %YMM1,%YMM17,%YMM15 |
(150) 0x41bc6e VGATHERQPD (%R15,%YMM24,8),%YMM28{%K1} |
(150) 0x41bc75 VPADDQ %YMM2,%YMM15,%YMM18 |
(150) 0x41bc7b KXNORW %K0,%K0,%K1 |
(150) 0x41bc7f VXORPD %XMM19,%XMM19,%XMM19 |
(150) 0x41bc85 VGATHERQPD (%R15,%YMM18,8),%YMM19{%K1} |
(150) 0x41bc8c VPADDQ %YMM2,%YMM7,%YMM7 |
(150) 0x41bc90 VPADDQ %YMM0,%YMM15,%YMM15 |
(150) 0x41bc94 KXNORW %K0,%K0,%K1 |
(150) 0x41bc98 VXORPD %XMM20,%XMM20,%XMM20 |
(150) 0x41bc9e VGATHERQPD (%R15,%YMM15,8),%YMM20{%K1} |
(150) 0x41bca5 KXNORW %K0,%K0,%K1 |
(150) 0x41bca9 VXORPD %XMM21,%XMM21,%XMM21 |
(150) 0x41bcaf VPMULLQ %YMM1,%YMM16,%YMM10 |
(150) 0x41bcb5 MOV 0xb0(%RSP),%RAX |
(150) 0x41bcbd VGATHERQPD (%RAX,%YMM7,8),%YMM21{%K1} |
(150) 0x41bcc4 VPADDQ %YMM2,%YMM10,%YMM7 |
(150) 0x41bcc8 KXNORW %K0,%K0,%K1 |
(150) 0x41bccc VPXOR %XMM10,%XMM10,%XMM10 |
(150) 0x41bcd1 VGATHERQPD (%R14,%YMM7,8),%YMM10{%K1} |
(150) 0x41bcd8 VMULPD %YMM4,%YMM6,%YMM4 |
(150) 0x41bcdc VFMADD213PD %YMM4,%YMM26,%YMM27 |
(150) 0x41bce2 VFMADD213PD %YMM27,%YMM30,%YMM29 |
(150) 0x41bce8 VFMADD213PD %YMM29,%YMM11,%YMM14 |
(150) 0x41bcee VSUBPD %YMM23,%YMM28,%YMM6 |
(150) 0x41bcf4 VMULPD 0x487f2(%RIP){1to4},%YMM14,%YMM4 |
(150) 0x41bcfe VMOVUPD 0x1c0(%RSP),%YMM11 |
(150) 0x41bd07 VDIVPD %YMM4,%YMM11,%YMM4 |
(150) 0x41bd0b VMULPD %YMM31,%YMM6,%YMM6 |
(150) 0x41bd11 VMOVDQU 0x180(%RSP),%YMM11 |
(150) 0x41bd1a VPMULLQ %YMM3,%YMM11,%YMM11 |
(150) 0x41bd20 VSUBPD %YMM19,%YMM20,%YMM14 |
(150) 0x41bd26 VFMADD213PD %YMM6,%YMM10,%YMM14 |
(150) 0x41bd2b VFMADD213PD %YMM21,%YMM4,%YMM14 |
(150) 0x41bd31 VMOVDQU 0x140(%RSP),%YMM6 |
(150) 0x41bd3a VXORPS %XMM10,%XMM10,%XMM10 |
(150) 0x41bd3f VPMULLQ %YMM3,%YMM6,%YMM10 |
(150) 0x41bd45 VPADDQ %YMM2,%YMM11,%YMM28 |
(150) 0x41bd4b KXNORW %K0,%K0,%K1 |
(150) 0x41bd4f MOV 0x10(%RSP),%RDX |
(150) 0x41bd54 VSCATTERQPD %YMM14,(%RDX,%YMM28,8){%K1} |
(150) 0x41bd5b VPADDQ %YMM2,%YMM10,%YMM6 |
(150) 0x41bd5f KXNORW %K0,%K0,%K1 |
(150) 0x41bd63 VPXOR %XMM11,%XMM11,%XMM11 |
(150) 0x41bd68 MOV 0xa8(%RSP),%RCX |
(150) 0x41bd70 VGATHERQPD (%RCX,%YMM6,8),%YMM11{%K1} |
(150) 0x41bd77 KXNORW %K0,%K0,%K1 |
(150) 0x41bd7b VXORPD %XMM14,%XMM14,%XMM14 |
(150) 0x41bd80 VGATHERQPD (%R15,%YMM25,8),%YMM14{%K1} |
(150) 0x41bd87 KXNORW %K0,%K0,%K1 |
(150) 0x41bd8b VXORPD %XMM19,%XMM19,%XMM19 |
(150) 0x41bd91 VGATHERQPD (%R15,%YMM18,8),%YMM19{%K1} |
(150) 0x41bd98 KXNORW %K0,%K0,%K1 |
(150) 0x41bd9c VXORPD %XMM18,%XMM18,%XMM18 |
(150) 0x41bda2 VGATHERQPD (%R15,%YMM24,8),%YMM18{%K1} |
(150) 0x41bda9 VMOVDQU64 0x160(%RSP),%YMM20 |
(150) 0x41bdb1 VPMULLQ %YMM3,%YMM20,%YMM20 |
(150) 0x41bdb7 KXNORW %K0,%K0,%K1 |
(150) 0x41bdbb VXORPD %XMM21,%XMM21,%XMM21 |
(150) 0x41bdc1 VGATHERQPD (%R15,%YMM15,8),%YMM21{%K1} |
(150) 0x41bdc8 VPADDQ %YMM2,%YMM20,%YMM15 |
(150) 0x41bdce KXNORW %K0,%K0,%K1 |
(150) 0x41bdd2 VPXORD %XMM20,%XMM20,%XMM20 |
(150) 0x41bdd8 MOV 0x30(%RSP),%RAX |
(150) 0x41bddd VGATHERQPD (%RAX,%YMM15,8),%YMM20{%K1} |
(150) 0x41bde4 VPADDQ %YMM0,%YMM10,%YMM26 |
(150) 0x41bdea KXNORW %K0,%K0,%K1 |
(150) 0x41bdee VPXOR %XMM10,%XMM10,%XMM10 |
(150) 0x41bdf3 VGATHERQPD (%RCX,%YMM26,8),%YMM10{%K1} |
(150) 0x41bdfa VSUBPD %YMM14,%YMM19,%YMM14 |
(150) 0x41be00 VSUBPD %YMM18,%YMM21,%YMM15 |
(150) 0x41be06 VMOVDQU64 0x120(%RSP),%YMM18 |
(150) 0x41be0e VPMULLQ %YMM3,%YMM18,%YMM18 |
(150) 0x41be14 VMULPD %YMM11,%YMM14,%YMM11 |
(150) 0x41be19 VFMADD213PD %YMM11,%YMM10,%YMM15 |
(150) 0x41be1e VPADDQ %YMM2,%YMM18,%YMM27 |
(150) 0x41be24 VPMULLQ %YMM3,%YMM22,%YMM3 |
(150) 0x41be2a VFMADD213PD %YMM20,%YMM4,%YMM15 |
(150) 0x41be30 KXNORW %K0,%K0,%K1 |
(150) 0x41be34 MOV 0xa0(%RSP),%RAX |
(150) 0x41be3c VSCATTERQPD %YMM15,(%RAX,%YMM27,8){%K1} |
(150) 0x41be43 VPADDQ %YMM2,%YMM3,%YMM10 |
(150) 0x41be47 KXNORW %K0,%K0,%K1 |
(150) 0x41be4b VXORPD %XMM11,%XMM11,%XMM11 |
(150) 0x41be50 VGATHERQPD (%R12,%YMM10,8),%YMM11{%K1} |
(150) 0x41be57 VPADDQ %YMM0,%YMM3,%YMM3 |
(150) 0x41be5b KXNORW %K0,%K0,%K1 |
(150) 0x41be5f VXORPD %XMM14,%XMM14,%XMM14 |
(150) 0x41be64 VGATHERQPD (%R12,%YMM3,8),%YMM14{%K1} |
(150) 0x41be6b KXNORW %K0,%K0,%K1 |
(150) 0x41be6f VXORPD %XMM15,%XMM15,%XMM15 |
(150) 0x41be74 VPMULLQ %YMM1,%YMM22,%YMM1 |
(150) 0x41be7a VGATHERQPD (%R14,%YMM5,8),%YMM15{%K1} |
(150) 0x41be81 VPADDQ %YMM2,%YMM1,%YMM2 |
(150) 0x41be85 KXNORW %K0,%K0,%K1 |
(150) 0x41be89 VXORPD %XMM5,%XMM5,%XMM5 |
(150) 0x41be8d VGATHERQPD (%R12,%YMM2,8),%YMM5{%K1} |
(150) 0x41be94 VPADDQ %YMM0,%YMM1,%YMM0 |
(150) 0x41be98 KXNORW %K0,%K0,%K1 |
(150) 0x41be9c VPXOR %XMM1,%XMM1,%XMM1 |
(150) 0x41bea0 VGATHERQPD (%R12,%YMM0,8),%YMM1{%K1} |
(150) 0x41bea7 KXNORW %K0,%K0,%K1 |
(150) 0x41beab VPXORD %XMM18,%XMM18,%XMM18 |
(150) 0x41beb1 VGATHERQPD (%R14,%YMM7,8),%YMM18{%K1} |
(150) 0x41beb8 KXNORW %K0,%K0,%K1 |
(150) 0x41bebc VXORPD %XMM7,%XMM7,%XMM7 |
(150) 0x41bec0 VGATHERQPD (%RDX,%YMM28,8),%YMM7{%K1} |
(150) 0x41bec7 VSUBPD %YMM11,%YMM14,%YMM11 |
(150) 0x41becc VMULPD %YMM15,%YMM11,%YMM11 |
(150) 0x41bed1 VSUBPD %YMM5,%YMM1,%YMM1 |
(150) 0x41bed5 VFMADD213PD %YMM11,%YMM18,%YMM1 |
(150) 0x41bedb VFMADD213PD %YMM7,%YMM4,%YMM1 |
(150) 0x41bee0 KXNORW %K0,%K0,%K1 |
(150) 0x41bee4 VSCATTERQPD %YMM1,(%RDX,%YMM28,8){%K1} |
(150) 0x41beeb KXNORW %K0,%K0,%K1 |
(150) 0x41beef VXORPD %XMM1,%XMM1,%XMM1 |
(150) 0x41bef3 VGATHERQPD (%R12,%YMM10,8),%YMM1{%K1} |
(150) 0x41befa KXNORW %K0,%K0,%K1 |
(150) 0x41befe VXORPD %XMM5,%XMM5,%XMM5 |
(150) 0x41bf02 VGATHERQPD (%R12,%YMM2,8),%YMM5{%K1} |
(150) 0x41bf09 KXNORW %K0,%K0,%K1 |
(150) 0x41bf0d VXORPD %XMM2,%XMM2,%XMM2 |
(150) 0x41bf11 VGATHERQPD (%RCX,%YMM6,8),%YMM2{%K1} |
(150) 0x41bf18 KXNORW %K0,%K0,%K1 |
(150) 0x41bf1c VXORPD %XMM6,%XMM6,%XMM6 |
(150) 0x41bf20 VGATHERQPD (%R12,%YMM3,8),%YMM6{%K1} |
(150) 0x41bf27 KXNORW %K0,%K0,%K1 |
(150) 0x41bf2b VXORPD %XMM3,%XMM3,%XMM3 |
(150) 0x41bf2f VGATHERQPD (%R12,%YMM0,8),%YMM3{%K1} |
(150) 0x41bf36 KXNORW %K0,%K0,%K1 |
(150) 0x41bf3a VXORPD %XMM0,%XMM0,%XMM0 |
(150) 0x41bf3e VGATHERQPD (%RCX,%YMM26,8),%YMM0{%K1} |
(150) 0x41bf45 KXNORW %K0,%K0,%K1 |
(150) 0x41bf49 VXORPD %XMM7,%XMM7,%XMM7 |
(150) 0x41bf4d VGATHERQPD (%RAX,%YMM27,8),%YMM7{%K1} |
(150) 0x41bf54 VSUBPD %YMM1,%YMM5,%YMM1 |
(150) 0x41bf58 VMULPD %YMM2,%YMM1,%YMM1 |
(150) 0x41bf5c VSUBPD %YMM6,%YMM3,%YMM2 |
(150) 0x41bf60 VFMADD213PD %YMM1,%YMM0,%YMM2 |
(150) 0x41bf65 VFMADD213PD %YMM7,%YMM4,%YMM2 |
(150) 0x41bf6a KXNORW %K0,%K0,%K1 |
(150) 0x41bf6e VSCATTERQPD %YMM2,(%RAX,%YMM27,8){%K1} |
(150) 0x41bf75 VPADDQ 0x48579(%RIP){1to4},%YMM9,%YMM9 |
(150) 0x41bf7f ADD $0x4,%R13 |
(150) 0x41bf83 CMP (%RSP),%R13 |
(150) 0x41bf87 JB 41bae0 |
0x41bf8d MOV (%RSP),%RAX |
0x41bf91 CMP %RAX,0xc8(%RSP) |
0x41bf99 VMOVDQU 0x100(%RSP),%XMM3 |
0x41bfa2 JNE 41bfd2 |
0x41bfa4 MOV $0x4803c0,%EDI |
0x41bfa9 MOV 0x48(%RSP),%ESI |
0x41bfad LEA -0x28(%RBP),%RSP |
0x41bfb1 POP %RBX |
0x41bfb2 POP %R12 |
0x41bfb4 POP %R13 |
0x41bfb6 POP %R14 |
0x41bfb8 POP %R15 |
0x41bfba POP %RBP |
0x41bfbb VZEROUPPER |
0x41bfbe JMP 403050 |
0x41bfc3 LEA -0x28(%RBP),%RSP |
0x41bfc7 POP %RBX |
0x41bfc8 POP %R12 |
0x41bfca POP %R13 |
0x41bfcc POP %R14 |
0x41bfce POP %R15 |
0x41bfd0 POP %RBP |
0x41bfd1 RET |
0x41bfd2 ADD %RAX,%RSI |
0x41bfd5 JMP 41c233 |
0x41bfda NOPW (%RAX,%RAX,1) |
(149) 0x41bfe0 MOV %RSI,%RAX |
(149) 0x41bfe3 CQTO |
(149) 0x41bfe5 IDIV %R9 |
(149) 0x41bfe8 MOV 0x28(%RSP),%RAX |
(149) 0x41bfed ADD %EAX,%EDX |
(149) 0x41bfef LEA -0x1(%RCX),%EAX |
(149) 0x41bff2 MOVSXD %EAX,%RDI |
(149) 0x41bff5 MOV %RBX,%R8 |
(149) 0x41bff8 IMUL %RDI,%R8 |
(149) 0x41bffc MOVSXD %EDX,%RDX |
(149) 0x41bfff LEA -0x1(%R8,%RDX,1),%R9 |
(149) 0x41c004 MOV %R12,%R10 |
(149) 0x41c007 IMUL %RDI,%R10 |
(149) 0x41c00b LEA -0x1(%R10,%RDX,1),%R11 |
(149) 0x41c010 MOV 0x90(%RSP),%RSI |
(149) 0x41c018 VMOVSD (%RSI,%R11,8),%XMM0 |
(149) 0x41c01e VMULSD (%R14,%R9,8),%XMM0,%XMM0 |
(149) 0x41c024 MOVSXD %ECX,%RCX |
(149) 0x41c027 MOV %RBX,%R9 |
(149) 0x41c02a IMUL %RCX,%R9 |
(149) 0x41c02e LEA -0x1(%R9,%RDX,1),%R11 |
(149) 0x41c033 IMUL %RCX,%R12 |
(149) 0x41c037 LEA -0x1(%R12,%RDX,1),%R13 |
(149) 0x41c03c VMOVSD (%RSI,%R13,8),%XMM1 |
(149) 0x41c042 VFMADD132SD (%R14,%R11,8),%XMM0,%XMM1 |
(149) 0x41c048 ADD %RDX,%R9 |
(149) 0x41c04b ADD %RDX,%R12 |
(149) 0x41c04e VMOVSD (%RSI,%R12,8),%XMM0 |
(149) 0x41c054 VFMADD132SD (%R14,%R9,8),%XMM1,%XMM0 |
(149) 0x41c05a ADD %RDX,%R8 |
(149) 0x41c05d ADD %RDX,%R10 |
(149) 0x41c060 VMOVSD (%RSI,%R10,8),%XMM1 |
(149) 0x41c066 VFMADD132SD (%R14,%R8,8),%XMM0,%XMM1 |
(149) 0x41c06c VMULSD 0x4847c(%RIP),%XMM1,%XMM0 |
(149) 0x41c074 VDIVSD %XMM0,%XMM3,%XMM0 |
(149) 0x41c078 MOV 0xf0(%RSP),%R10 |
(149) 0x41c080 IMUL %RCX,%R10 |
(149) 0x41c084 ADD %RDX,%R10 |
(149) 0x41c087 MOV 0xe8(%RSP),%R9 |
(149) 0x41c08f MOV %R9,%R8 |
(149) 0x41c092 IMUL %RCX,%R8 |
(149) 0x41c096 ADD %RDX,%R8 |
(149) 0x41c099 MOV 0xe0(%RSP),%R12 |
(149) 0x41c0a1 MOV %R12,%R13 |
(149) 0x41c0a4 IMUL %RCX,%R13 |
(149) 0x41c0a8 LEA -0x1(%R13,%RDX,1),%R11 |
(149) 0x41c0ad ADD %RDX,%R13 |
(149) 0x41c0b0 VMOVSD (%R15,%R11,8),%XMM1 |
(149) 0x41c0b6 VSUBSD (%R15,%R13,8),%XMM1,%XMM1 |
(149) 0x41c0bc MOV 0x8(%RSP),%RAX |
(149) 0x41c0c1 VMULSD (%RAX,%R8,8),%XMM1,%XMM1 |
(149) 0x41c0c7 IMUL %RDI,%R9 |
(149) 0x41c0cb ADD %RDX,%R9 |
(149) 0x41c0ce IMUL %RDI,%R12 |
(149) 0x41c0d2 LEA -0x1(%R12,%RDX,1),%RBX |
(149) 0x41c0d7 ADD %RDX,%R12 |
(149) 0x41c0da VMOVSD (%R15,%RBX,8),%XMM2 |
(149) 0x41c0e0 VSUBSD (%R15,%R12,8),%XMM2,%XMM2 |
(149) 0x41c0e6 VFMADD132SD (%RAX,%R9,8),%XMM1,%XMM2 |
(149) 0x41c0ec MOV 0xb0(%RSP),%RSI |
(149) 0x41c0f4 VFMADD213SD (%RSI,%R10,8),%XMM0,%XMM2 |
(149) 0x41c0fa MOV 0xd8(%RSP),%R10 |
(149) 0x41c102 IMUL %RCX,%R10 |
(149) 0x41c106 ADD %RDX,%R10 |
(149) 0x41c109 MOV 0x10(%RSP),%RAX |
(149) 0x41c10e VMOVSD %XMM2,(%RAX,%R10,8) |
(149) 0x41c114 VMOVSD (%R15,%R12,8),%XMM1 |
(149) 0x41c11a MOV 0xd0(%RSP),%R14 |
(149) 0x41c122 IMUL %RCX,%R14 |
(149) 0x41c126 ADD %RDX,%R14 |
(149) 0x41c129 VSUBSD (%R15,%R13,8),%XMM1,%XMM1 |
(149) 0x41c12f MOV 0x88(%RSP),%R13 |
(149) 0x41c137 IMUL %RCX,%R13 |
(149) 0x41c13b VMOVSD (%R15,%RBX,8),%XMM2 |
(149) 0x41c141 LEA (%R13,%RDX,1),%RAX |
(149) 0x41c146 MOV %RAX,0x50(%RSP) |
(149) 0x41c14b MOV 0xa8(%RSP),%RBX |
(149) 0x41c153 VMULSD (%RBX,%RAX,8),%XMM1,%XMM1 |
(149) 0x41c158 LEA -0x1(%R13,%RDX,1),%R13 |
(149) 0x41c15d VSUBSD (%R15,%R11,8),%XMM2,%XMM2 |
(149) 0x41c163 VFMADD132SD (%RBX,%R13,8),%XMM1,%XMM2 |
(149) 0x41c169 MOV 0x30(%RSP),%R11 |
(149) 0x41c16e VFMADD213SD (%R11,%R14,8),%XMM0,%XMM2 |
(149) 0x41c174 MOV 0x80(%RSP),%R11 |
(149) 0x41c17c IMUL %RCX,%R11 |
(149) 0x41c180 ADD %RDX,%R11 |
(149) 0x41c183 MOV 0xa0(%RSP),%R12 |
(149) 0x41c18b VMOVSD %XMM2,(%R12,%R11,8) |
(149) 0x41c191 MOV 0x78(%RSP),%RSI |
(149) 0x41c196 IMUL %RSI,%RCX |
(149) 0x41c19a LEA -0x1(%RCX,%RDX,1),%R14 |
(149) 0x41c19f ADD %RDX,%RCX |
(149) 0x41c1a2 MOV 0x20(%RSP),%RAX |
(149) 0x41c1a7 VMOVSD (%RAX,%R14,8),%XMM1 |
(149) 0x41c1ad VSUBSD (%RAX,%RCX,8),%XMM1,%XMM1 |
(149) 0x41c1b2 MOV 0x8(%RSP),%R15 |
(149) 0x41c1b7 VMULSD (%R15,%R8,8),%XMM1,%XMM1 |
(149) 0x41c1bd IMUL %RSI,%RDI |
(149) 0x41c1c1 LEA (%RDI,%RDX,1),%R8 |
(149) 0x41c1c5 LEA -0x1(%RDI,%RDX,1),%RDX |
(149) 0x41c1ca MOV 0x10(%RSP),%RSI |
(149) 0x41c1cf VMOVSD (%RAX,%RDX,8),%XMM2 |
(149) 0x41c1d4 VSUBSD (%RAX,%R8,8),%XMM2,%XMM2 |
(149) 0x41c1da VFMADD132SD (%R15,%R9,8),%XMM1,%XMM2 |
(149) 0x41c1e0 VFMADD213SD (%RSI,%R10,8),%XMM0,%XMM2 |
(149) 0x41c1e6 VMOVSD %XMM2,(%RSI,%R10,8) |
(149) 0x41c1ec VMOVSD (%RAX,%R8,8),%XMM1 |
(149) 0x41c1f2 VSUBSD (%RAX,%RCX,8),%XMM1,%XMM1 |
(149) 0x41c1f7 MOV 0x50(%RSP),%RCX |
(149) 0x41c1fc VMULSD (%RBX,%RCX,8),%XMM1,%XMM1 |
(149) 0x41c201 VMOVSD (%RAX,%RDX,8),%XMM2 |
(149) 0x41c206 VSUBSD (%RAX,%R14,8),%XMM2,%XMM2 |
(149) 0x41c20c VFMADD132SD (%RBX,%R13,8),%XMM1,%XMM2 |
(149) 0x41c212 VFMADD213SD (%R12,%R11,8),%XMM0,%XMM2 |
(149) 0x41c218 VMOVSD %XMM2,(%R12,%R11,8) |
(149) 0x41c21e MOV (%RSP),%RSI |
(149) 0x41c222 INC %RSI |
(149) 0x41c225 CMP 0x98(%RSP),%RSI |
(149) 0x41c22d JG 41bfa4 |
(149) 0x41c233 MOV %RSI,%R8 |
(149) 0x41c236 SHR $0x20,%R8 |
(149) 0x41c23a JE 41c250 |
(149) 0x41c23c MOV %RSI,%RAX |
(149) 0x41c23f XOR %EDX,%EDX |
(149) 0x41c241 MOV 0x70(%RSP),%R9 |
(149) 0x41c246 DIV %R9 |
(149) 0x41c249 MOV %RAX,%RCX |
(149) 0x41c24c JMP 41c25e |
0x41c24e XCHG %AX,%AX |
(149) 0x41c250 MOV %ESI,%EAX |
(149) 0x41c252 XOR %EDX,%EDX |
(149) 0x41c254 MOV 0x70(%RSP),%R9 |
(149) 0x41c259 DIV %R9D |
(149) 0x41c25c MOV %EAX,%ECX |
(149) 0x41c25e MOV 0x40(%RSP),%RBX |
(149) 0x41c263 MOV 0x38(%RSP),%R14 |
(149) 0x41c268 MOV 0x68(%RSP),%R12 |
(149) 0x41c26d MOV 0x60(%RSP),%R15 |
(149) 0x41c272 ADD 0x1c(%RSP),%ECX |
(149) 0x41c276 TEST %R8,%R8 |
(149) 0x41c279 MOV %RSI,(%RSP) |
(149) 0x41c27d JNE 41bfe0 |
(149) 0x41c283 MOV %ESI,%EAX |
(149) 0x41c285 XOR %EDX,%EDX |
(149) 0x41c287 DIV %R9D |
(149) 0x41c28a JMP 41bfe8 |
0x41c28f NOP |
Path / |
Source file and lines | accelerate.cpp:40-53 |
Module | exec |
nb instructions | 184 |
nb uops | 186 |
loop length | 902 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 8 |
used zmm registers | 0 |
nb stack references | 53 |
micro-operation queue | 31.00 cycles |
front end | 31.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 5.40 | 5.20 | 23.67 | 23.67 | 28.00 | 15.00 | 5.20 | 28.00 | 28.00 | 28.00 | 5.20 | 23.67 |
cycles | 5.40 | 5.20 | 23.67 | 23.67 | 28.00 | 15.00 | 5.20 | 28.00 | 28.00 | 28.00 | 5.20 | 23.67 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 30.82 |
Stall cycles | 0.00 |
Front-end | 31.00 |
Dispatch | 28.00 |
Overall L1 | 31.00 |
all | 14% |
load | 15% |
store | 19% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 33% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 4% |
all | 15% |
load | 15% |
store | 17% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 22% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x20,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x200,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R9,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x68(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVQ 0x40(%RBP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%RBP),%EDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EDX,0x1c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0,0x4c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 41bfc3 <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0x813> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R11,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,0x8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVQ $0,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0x1,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x100(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x54(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0xc8(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0xc0(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x4803a0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
VMOVDQU %XMM0,0x120(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
CALL 4031e0 <__kmpc_for_static_init_8@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
VMOVDQU 0x120(%RSP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xc0(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb8(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RAX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JA 41bfa4 <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0x7f4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R12,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB 0x28(%RSP),%ECX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV (%R13),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%R13),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x1(%RSI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x98(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x1(%RDI),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R14,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVG %RAX,%R14 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV (%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RBX),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RBX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x8(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R15),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R15),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R12),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%R12),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R12),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%R12),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %RSI,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $-0x4,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R14,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
AND %R14,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV 0x90(%RSP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 41c233 <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0xa83> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VPBROADCASTQ %RCX,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x1c(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %EAX,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %XMM0,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x28(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %EAX,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %XMM0,0x110(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x40(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%YMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %R9,%YMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %XMM3,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x1c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %R10,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x1a0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %R11,%YMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %RBX,%YMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %R8,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x180(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %R13,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x88(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x80(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x120(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x78(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%YMM22 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %RSI,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPADDQ 0x48a3c(%RIP),%YMM0,%YMM9 | 1 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
XOR %R13D,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x38(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x8(%RSP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV (%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RAX,0xc8(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
VMOVDQU 0x100(%RSP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
JNE 41bfd2 <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0x822> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x4803c0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x48(%RSP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 403050 <__kmpc_for_static_fini@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
ADD %RAX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 41c233 <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0xa83> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | accelerate.cpp:40-53 |
Module | exec |
nb instructions | 184 |
nb uops | 186 |
loop length | 902 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 8 |
used zmm registers | 0 |
nb stack references | 53 |
micro-operation queue | 31.00 cycles |
front end | 31.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 5.40 | 5.20 | 23.67 | 23.67 | 28.00 | 15.00 | 5.20 | 28.00 | 28.00 | 28.00 | 5.20 | 23.67 |
cycles | 5.40 | 5.20 | 23.67 | 23.67 | 28.00 | 15.00 | 5.20 | 28.00 | 28.00 | 28.00 | 5.20 | 23.67 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 30.82 |
Stall cycles | 0.00 |
Front-end | 31.00 |
Dispatch | 28.00 |
Overall L1 | 31.00 |
all | 14% |
load | 15% |
store | 19% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 33% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 4% |
all | 15% |
load | 15% |
store | 17% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 22% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x20,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x200,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R9,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x68(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVQ 0x40(%RBP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%RBP),%EDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EDX,0x1c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0,0x4c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 41bfc3 <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0x813> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R11,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,0x8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVQ $0,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0x1,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x100(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x54(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0xc8(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0xc0(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x4803a0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
VMOVDQU %XMM0,0x120(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
CALL 4031e0 <__kmpc_for_static_init_8@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
VMOVDQU 0x120(%RSP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xc0(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb8(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RAX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JA 41bfa4 <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0x7f4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R12,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB 0x28(%RSP),%ECX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV (%R13),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%R13),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x1(%RSI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x98(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x1(%RDI),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R14,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVG %RAX,%R14 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV (%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RBX),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RBX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x8(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R15),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R15),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R12),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%R12),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R12),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%R12),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %RSI,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $-0x4,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R14,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
AND %R14,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV 0x90(%RSP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 41c233 <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0xa83> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VPBROADCASTQ %RCX,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x1c(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %EAX,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %XMM0,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x28(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %EAX,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %XMM0,0x110(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x40(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%YMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %R9,%YMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %XMM3,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x1c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %R10,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x1a0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %R11,%YMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %RBX,%YMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %R8,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x180(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %R13,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x88(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x80(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x120(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x78(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%YMM22 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %RSI,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPADDQ 0x48a3c(%RIP),%YMM0,%YMM9 | 1 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
XOR %R13D,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x38(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x8(%RSP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV (%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RAX,0xc8(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
VMOVDQU 0x100(%RSP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
JNE 41bfd2 <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0x822> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x4803c0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x48(%RSP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 403050 <__kmpc_for_static_fini@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
ADD %RAX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 41c233 <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0xa83> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted– | 2.23 | 3.14 |
○Loop 150 - accelerate.cpp:40-53 - exec | 2.23 | 3.13 |
○Loop 149 - accelerate.cpp:40-53 - exec | 0 | 0 |