Function: _Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_ ... | Module: exec | Source: advec_cell.cpp:157-202 [...] | Coverage: 1.44% |
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Function: _Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_ ... | Module: exec | Source: advec_cell.cpp:157-202 [...] | Coverage: 1.44% |
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/home/eoseret/qaas_runs_CPU_9468/171-112-9712/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/context.h: 46 - 69 |
-------------------------------------------------------------------------------- |
46: T &operator[](size_t i) const { return data[i]; } |
[...] |
69: T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; } |
/home/eoseret/qaas_runs_CPU_9468/171-112-9712/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/advec_cell.cpp: 157 - 202 |
-------------------------------------------------------------------------------- |
157: #pragma omp parallel for simd collapse(2) |
158: for (int j = (y_min + 1); j < (y_max + 2 + 2); j++) { |
159: for (int i = (x_min + 1); i < (x_max + 2); i++) |
160: ({ |
161: int upwind, donor, downwind, dif; |
162: double sigmat, sigma3, sigma4, sigmav, sigmam, diffuw, diffdw, limiter, wind; |
163: if (vol_flux_y(i, j) > 0.0) { |
164: upwind = j - 2; |
165: donor = j - 1; |
166: downwind = j; |
167: dif = donor; |
168: } else { |
169: upwind = std::min(j + 1, y_max + 2); |
170: donor = j; |
171: downwind = j - 1; |
172: dif = upwind; |
173: } |
174: sigmat = std::fabs(vol_flux_y(i, j)) / pre_vol(i, donor); |
175: sigma3 = (1.0 + sigmat) * (vertexdy[j] / vertexdy[dif]); |
176: sigma4 = 2.0 - sigmat; |
177: sigmav = sigmat; |
178: diffuw = density1(i, donor) - density1(i, upwind); |
179: diffdw = density1(i, downwind) - density1(i, donor); |
180: wind = 1.0; |
181: if (diffdw <= 0.0) wind = -1.0; |
182: if (diffuw * diffdw > 0.0) { |
183: limiter = (1.0 - sigmav) * wind * |
184: std::fmin(std::fmin(std::fabs(diffuw), std::fabs(diffdw)), |
185: one_by_six * (sigma3 * std::fabs(diffuw) + sigma4 * std::fabs(diffdw))); |
186: } else { |
187: limiter = 0.0; |
188: } |
189: mass_flux_y(i, j) = vol_flux_y(i, j) * (density1(i, donor) + limiter); |
190: sigmam = std::fabs(mass_flux_y(i, j)) / (density1(i, donor) * pre_vol(i, donor)); |
191: diffuw = energy1(i, donor) - energy1(i, upwind); |
192: diffdw = energy1(i, downwind) - energy1(i, donor); |
193: wind = 1.0; |
194: if (diffdw <= 0.0) wind = -1.0; |
195: if (diffuw * diffdw > 0.0) { |
196: limiter = (1.0 - sigmam) * wind * |
197: std::fmin(std::fmin(std::fabs(diffuw), std::fabs(diffdw)), |
198: one_by_six * (sigma3 * std::fabs(diffuw) + sigma4 * std::fabs(diffdw))); |
199: } else { |
200: limiter = 0.0; |
201: } |
202: ener_flux(i, j) = mass_flux_y(i, j) * (energy1(i, donor) + limiter); |
0x41ce60 PUSH %RBP |
0x41ce61 MOV %RSP,%RBP |
0x41ce64 PUSH %R15 |
0x41ce66 PUSH %R14 |
0x41ce68 PUSH %R13 |
0x41ce6a PUSH %R12 |
0x41ce6c PUSH %RBX |
0x41ce6d AND $-0x20,%RSP |
0x41ce71 SUB $0x240,%RSP |
0x41ce78 MOV %R8,%R12 |
0x41ce7b MOV 0x50(%RBP),%RAX |
0x41ce7f MOV 0x40(%RBP),%R10 |
0x41ce83 MOV 0x38(%RBP),%RSI |
0x41ce87 MOV 0x28(%RBP),%R15 |
0x41ce8b MOV 0x20(%RBP),%R14 |
0x41ce8f MOV 0x18(%RBP),%R13 |
0x41ce93 MOV 0x10(%RBP),%RBX |
0x41ce97 MOV 0x30(%RBP),%R8D |
0x41ce9b MOV %R8D,0x4(%RSP) |
0x41cea0 MOVL $0,0x44(%RSP) |
0x41cea8 TEST %RAX,%RAX |
0x41ceab JS 41d7cc |
0x41ceb1 MOV %RCX,0x18(%RSP) |
0x41ceb6 MOV %R9,0xa0(%RSP) |
0x41cebe MOV %RSI,0x8(%RSP) |
0x41cec3 MOV %R10,0x10(%RSP) |
0x41cec8 MOV %RDX,0x20(%RSP) |
0x41cecd MOV (%RDI),%ESI |
0x41cecf MOVQ $0,0x70(%RSP) |
0x41ced8 MOV %RAX,0x68(%RSP) |
0x41cedd MOVQ $0x1,0x98(%RSP) |
0x41cee9 SUB $0x8,%RSP |
0x41ceed LEA 0xa0(%RSP),%RAX |
0x41cef5 LEA 0x4c(%RSP),%RCX |
0x41cefa LEA 0x78(%RSP),%R8 |
0x41ceff LEA 0x70(%RSP),%R9 |
0x41cf04 MOV $0x480460,%EDI |
0x41cf09 MOV %ESI,0x48(%RSP) |
0x41cf0d MOV $0x22,%EDX |
0x41cf12 PUSH $0x1 |
0x41cf14 PUSH $0x1 |
0x41cf16 PUSH %RAX |
0x41cf17 CALL 4031e0 <__kmpc_for_static_init_8@plt> |
0x41cf1c ADD $0x20,%RSP |
0x41cf20 MOV 0x70(%RSP),%RSI |
0x41cf25 MOV 0x68(%RSP),%RAX |
0x41cf2a MOV %RAX,0x50(%RSP) |
0x41cf2f CMP %RAX,%RSI |
0x41cf32 JA 41d7ad |
0x41cf38 MOV 0x10(%RSP),%RDX |
0x41cf3d SUB 0x8(%RSP),%EDX |
0x41cf41 MOV (%R13),%RAX |
0x41cf45 MOV %RAX,0x30(%RSP) |
0x41cf4a MOV 0x10(%R13),%R11 |
0x41cf4e MOV (%R14),%RAX |
0x41cf51 MOV %RAX,0x28(%RSP) |
0x41cf56 MOV 0x10(%R14),%RDI |
0x41cf5a MOV 0x18(%RSP),%RAX |
0x41cf5f MOV 0x8(%RAX),%R13 |
0x41cf63 MOV (%R12),%RAX |
0x41cf67 MOV %RAX,0x38(%RSP) |
0x41cf6c MOV 0x10(%R12),%R12 |
0x41cf71 MOV (%RBX),%RAX |
0x41cf74 MOV %RAX,0x48(%RSP) |
0x41cf79 MOV 0x10(%RBX),%RAX |
0x41cf7d MOV %RAX,0x60(%RSP) |
0x41cf82 MOV 0x20(%RSP),%RCX |
0x41cf87 ADD $0x2,%ECX |
0x41cf8a LEA 0x1(%RSI),%RAX |
0x41cf8e MOV 0x50(%RSP),%R9 |
0x41cf93 LEA 0x1(%R9),%R8 |
0x41cf97 CMP %R8,%RAX |
0x41cf9a CMOVG %RAX,%R8 |
0x41cf9e MOV 0xa0(%RSP),%RAX |
0x41cfa6 MOV (%RAX),%R9 |
0x41cfa9 MOV 0x10(%RAX),%R14 |
0x41cfad MOV (%R15),%R10 |
0x41cfb0 MOV 0x10(%R15),%RAX |
0x41cfb4 MOV 0x30(%RSP),%R15 |
0x41cfb9 SUB %RSI,%R8 |
0x41cfbc MOV $-0x8,%EBX |
0x41cfc1 MOV %R8,0x80(%RSP) |
0x41cfc9 AND %R8,%RBX |
0x41cfcc MOV %RBX,%R8 |
0x41cfcf MOV 0x38(%RSP),%RBX |
0x41cfd4 MOV %RCX,0x20(%RSP) |
0x41cfd9 MOV %RDX,0x10(%RSP) |
0x41cfde MOV %R11,0x18(%RSP) |
0x41cfe3 MOV %R9,0x90(%RSP) |
0x41cfeb MOV %R10,0x88(%RSP) |
0x41cff3 MOV %RAX,0x58(%RSP) |
0x41cff8 JE 41d7de |
0x41cffe VPBROADCASTQ %RDX,%YMM0 |
0x41d004 VMOVDQU %YMM0,0x1e0(%RSP) |
0x41d00d MOV 0x4(%RSP),%EAX |
0x41d011 VPBROADCASTD %EAX,%YMM0 |
0x41d017 VMOVDQU %YMM0,0x1c0(%RSP) |
0x41d020 MOV 0x8(%RSP),%RAX |
0x41d025 VPBROADCASTQ %RAX,%YMM0 |
0x41d02b VMOVDQU %YMM0,0x1a0(%RSP) |
0x41d034 VPBROADCASTQ %R15,%YMM0 |
0x41d03a VMOVDQU %YMM0,0x180(%RSP) |
0x41d043 VPBROADCASTD %ECX,%YMM0 |
0x41d049 VMOVDQU %YMM0,0x160(%RSP) |
0x41d052 MOV 0x28(%RSP),%RAX |
0x41d057 VPBROADCASTQ %RAX,%YMM0 |
0x41d05d VMOVDQU %YMM0,0x140(%RSP) |
0x41d066 VPBROADCASTQ %RBX,%YMM0 |
0x41d06c VMOVDQU %YMM0,0x120(%RSP) |
0x41d075 MOV 0x48(%RSP),%RAX |
0x41d07a VPBROADCASTQ %RAX,%YMM0 |
0x41d080 VMOVDQU %YMM0,0x100(%RSP) |
0x41d089 VPBROADCASTQ %R9,%YMM0 |
0x41d08f VMOVDQU %YMM0,0xe0(%RSP) |
0x41d098 VPBROADCASTQ %R10,%YMM0 |
0x41d09e VMOVDQU %YMM0,0xc0(%RSP) |
0x41d0a7 MOV %RSI,0x78(%RSP) |
0x41d0ac VPBROADCASTQ %RSI,%YMM0 |
0x41d0b2 VPADDQ 0x475c6(%RIP),%YMM0,%YMM9 |
0x41d0ba VPADDQ 0x4743e(%RIP),%YMM0,%YMM1 |
0x41d0c2 XOR %R15D,%R15D |
0x41d0c5 NOPW %CS:(%RAX,%RAX,1) |
(154) 0x41d0d0 VMOVDQU %YMM1,0xa0(%RSP) |
(154) 0x41d0d9 VMOVDQA %YMM1,%YMM0 |
(154) 0x41d0dd VMOVDQU 0x1e0(%RSP),%YMM8 |
(154) 0x41d0e6 VMOVDQA %YMM8,%YMM1 |
(154) 0x41d0ea MOV %R8,%RBX |
(154) 0x41d0ed MOV $0x452aa0,%RSI |
(154) 0x41d0f4 CALL %RSI |
(154) 0x41d0f6 VMOVDQA %YMM0,%YMM11 |
(154) 0x41d0fa VMOVDQA %YMM9,%YMM0 |
(154) 0x41d0fe VMOVDQA %YMM8,%YMM1 |
(154) 0x41d102 CALL %RSI |
(154) 0x41d104 VPMOVQD %YMM11,%XMM1 |
(154) 0x41d10a VPMOVQD %YMM0,%XMM0 |
(154) 0x41d110 VINSERTI128 $0x1,%XMM0,%YMM1,%YMM0 |
(154) 0x41d116 VPADDD 0x1c0(%RSP),%YMM0,%YMM12 |
(154) 0x41d11f VMOVDQU 0xa0(%RSP),%YMM0 |
(154) 0x41d128 VMOVDQA %YMM8,%YMM1 |
(154) 0x41d12c MOV $0x452870,%RSI |
(154) 0x41d133 CALL %RSI |
(154) 0x41d135 VMOVDQA %YMM0,%YMM11 |
(154) 0x41d139 VMOVDQA %YMM9,%YMM0 |
(154) 0x41d13d VMOVDQA %YMM8,%YMM1 |
(154) 0x41d141 CALL %RSI |
(154) 0x41d143 MOV %RBX,%R8 |
(154) 0x41d146 MOV 0x18(%RSP),%R11 |
(154) 0x41d14b VEXTRACTI128 $0x1,%YMM12,%XMM13 |
(154) 0x41d151 VPMOVSXDQ %XMM13,%YMM1 |
(154) 0x41d156 VMOVDQU 0x180(%RSP),%YMM5 |
(154) 0x41d15f VXORPS %XMM4,%XMM4,%XMM4 |
(154) 0x41d163 VPMULLQ %YMM1,%YMM5,%YMM4 |
(154) 0x41d169 VMOVDQU 0x1a0(%RSP),%YMM6 |
(154) 0x41d172 VPADDQ %YMM6,%YMM11,%YMM2 |
(154) 0x41d176 VPMOVSXDQ %XMM12,%YMM3 |
(154) 0x41d17b VPMULLQ %YMM3,%YMM5,%YMM5 |
(154) 0x41d181 VPADDQ %YMM6,%YMM0,%YMM0 |
(154) 0x41d185 VPSLLQ $0x20,%YMM2,%YMM2 |
(154) 0x41d18a VPSRAQ $0x20,%YMM2,%YMM2 |
(154) 0x41d191 VPADDQ %YMM2,%YMM5,%YMM5 |
(154) 0x41d195 VXORPD %XMM7,%XMM7,%XMM7 |
(154) 0x41d199 KXNORW %K0,%K0,%K1 |
(154) 0x41d19d VGATHERQPD (%R11,%YMM5,8),%YMM7{%K1} |
(154) 0x41d1a4 VPSLLQ $0x20,%YMM0,%YMM0 |
(154) 0x41d1a9 VPSRAQ $0x20,%YMM0,%YMM0 |
(154) 0x41d1b0 VPADDQ %YMM0,%YMM4,%YMM4 |
(154) 0x41d1b4 VPXOR %XMM6,%XMM6,%XMM6 |
(154) 0x41d1b8 KXNORW %K0,%K0,%K1 |
(154) 0x41d1bc VGATHERQPD (%R11,%YMM4,8),%YMM6{%K1} |
(154) 0x41d1c3 VXORPD %XMM4,%XMM4,%XMM4 |
(154) 0x41d1c7 VCMPPD $0x1,%YMM7,%YMM4,%K2 |
(154) 0x41d1ce VCMPPD $0x1,%YMM6,%YMM4,%K1 |
(154) 0x41d1d5 VXORPD %XMM10,%XMM10,%XMM10 |
(154) 0x41d1da VPCMPEQD %YMM8,%YMM8,%YMM8 |
(154) 0x41d1df VPADDD %YMM8,%YMM12,%YMM4 |
(154) 0x41d1e4 VPMOVSXDQ %XMM4,%YMM15 |
(154) 0x41d1e9 VEXTRACTI128 $0x1,%YMM4,%XMM4 |
(154) 0x41d1ef VPMOVSXDQ %XMM4,%YMM11 |
(154) 0x41d1f4 VPBLENDMQ %YMM15,%YMM3,%YMM30{%K2} |
(154) 0x41d1fa VPBLENDMQ %YMM11,%YMM1,%YMM31{%K1} |
(154) 0x41d200 VMOVDQU 0x140(%RSP),%YMM5 |
(154) 0x41d209 VXORPS %XMM4,%XMM4,%XMM4 |
(154) 0x41d20d VPMULLQ %YMM30,%YMM5,%YMM4 |
(154) 0x41d213 VPMULLQ %YMM31,%YMM5,%YMM16 |
(154) 0x41d219 VPADDQ %YMM2,%YMM4,%YMM5 |
(154) 0x41d21d VXORPD %XMM14,%XMM14,%XMM14 |
(154) 0x41d222 KXNORW %K0,%K0,%K3 |
(154) 0x41d226 VGATHERQPD (%RDI,%YMM5,8),%YMM14{%K3} |
(154) 0x41d22d VPADDQ %YMM0,%YMM16,%YMM4 |
(154) 0x41d233 VMOVDQU %YMM4,0x200(%RSP) |
(154) 0x41d23c VXORPD %XMM18,%XMM18,%XMM18 |
(154) 0x41d242 KXNORW %K0,%K0,%K3 |
(154) 0x41d246 VGATHERQPD (%RDI,%YMM4,8),%YMM18{%K3} |
(154) 0x41d24d VXORPD %XMM20,%XMM20,%XMM20 |
(154) 0x41d253 KXNORW %K0,%K0,%K3 |
(154) 0x41d257 VGATHERDPD (%R13,%XMM12,8),%YMM20{%K3} |
(154) 0x41d25f VPSUBD %YMM8,%YMM12,%YMM16 |
(154) 0x41d265 VXORPD %XMM22,%XMM22,%XMM22 |
(154) 0x41d26b KXNORW %K0,%K0,%K3 |
(154) 0x41d26f VGATHERDPD (%R13,%XMM13,8),%YMM22{%K3} |
(154) 0x41d277 VPMINSD 0x160(%RSP),%YMM16,%YMM13 |
(154) 0x41d27f VPMOVSXDQ %XMM13,%YMM16 |
(154) 0x41d285 VMOVDQA64 %YMM16,%YMM26 |
(154) 0x41d28b VMOVDQA64 %YMM15,%YMM16{%K2} |
(154) 0x41d291 VXORPD %XMM25,%XMM25,%XMM25 |
(154) 0x41d297 KXNORW %K0,%K0,%K3 |
(154) 0x41d29b VGATHERQPD (%R13,%YMM16,8),%YMM25{%K3} |
(154) 0x41d2a3 VEXTRACTI128 $0x1,%YMM13,%XMM13 |
(154) 0x41d2a9 VPMOVSXDQ %XMM13,%YMM16 |
(154) 0x41d2af VPADDD 0x47407(%RIP){1to8},%YMM12,%YMM12 |
(154) 0x41d2b9 VMOVDQA64 %YMM16,%YMM13 |
(154) 0x41d2bf VMOVDQA64 %YMM11,%YMM16{%K1} |
(154) 0x41d2c5 VXORPD %XMM27,%XMM27,%XMM27 |
(154) 0x41d2cb KXNORW %K0,%K0,%K3 |
(154) 0x41d2cf VMOVDQU64 0x120(%RSP),%YMM24 |
(154) 0x41d2d7 VPMULLQ %YMM30,%YMM24,%YMM23 |
(154) 0x41d2dd VGATHERQPD (%R13,%YMM16,8),%YMM27{%K3} |
(154) 0x41d2e5 VPMOVSXDQ %XMM12,%YMM26{%K2} |
(154) 0x41d2eb VPBLENDMQ %YMM3,%YMM15,%YMM29{%K2} |
(154) 0x41d2f1 VXORPS %XMM15,%XMM15,%XMM15 |
(154) 0x41d2f6 VPMULLQ %YMM26,%YMM24,%YMM15 |
(154) 0x41d2fc VPADDQ %YMM2,%YMM23,%YMM23 |
(154) 0x41d302 VXORPD %XMM28,%XMM28,%XMM28 |
(154) 0x41d308 KXNORW %K0,%K0,%K2 |
(154) 0x41d30c VPXORD %XMM16,%XMM16,%XMM16 |
(154) 0x41d312 VPMULLQ %YMM29,%YMM24,%YMM16 |
(154) 0x41d318 VGATHERQPD (%R12,%YMM23,8),%YMM28{%K2} |
(154) 0x41d31f VEXTRACTI128 $0x1,%YMM12,%XMM12 |
(154) 0x41d325 VPADDQ %YMM2,%YMM16,%YMM16 |
(154) 0x41d32b VPXOR %XMM8,%XMM8,%XMM8 |
(154) 0x41d330 KXNORW %K0,%K0,%K2 |
(154) 0x41d334 VGATHERQPD (%R12,%YMM16,8),%YMM8{%K2} |
(154) 0x41d33b VPMOVSXDQ %XMM12,%YMM13{%K1} |
(154) 0x41d341 VMOVDQA %YMM9,%YMM4 |
(154) 0x41d345 VMOVDQA %YMM1,%YMM9 |
(154) 0x41d349 VPBLENDMQ %YMM1,%YMM11,%YMM16{%K1} |
(154) 0x41d34f VXORPS %XMM11,%XMM11,%XMM11 |
(154) 0x41d354 VPMULLQ %YMM13,%YMM24,%YMM11 |
(154) 0x41d35a VPADDQ %YMM2,%YMM15,%YMM12 |
(154) 0x41d35e VPXOR %XMM15,%XMM15,%XMM15 |
(154) 0x41d363 KXNORW %K0,%K0,%K1 |
(154) 0x41d367 VPMULLQ %YMM16,%YMM24,%YMM21 |
(154) 0x41d36d VGATHERQPD (%R12,%YMM12,8),%YMM15{%K1} |
(154) 0x41d374 VPADDQ %YMM0,%YMM21,%YMM12 |
(154) 0x41d37a VPXORD %XMM21,%XMM21,%XMM21 |
(154) 0x41d380 KXNORW %K0,%K0,%K1 |
(154) 0x41d384 VGATHERQPD (%R12,%YMM12,8),%YMM21{%K1} |
(154) 0x41d38b VPADDQ %YMM0,%YMM11,%YMM11 |
(154) 0x41d38f VXORPD %XMM17,%XMM17,%XMM17 |
(154) 0x41d395 KXNORW %K0,%K0,%K1 |
(154) 0x41d399 VGATHERQPD (%R12,%YMM11,8),%YMM17{%K1} |
(154) 0x41d3a0 VBROADCASTSD 0x46737(%RIP),%YMM1 |
(154) 0x41d3a9 VANDPD %YMM1,%YMM7,%YMM11 |
(154) 0x41d3ad VDIVPD %YMM14,%YMM11,%YMM11 |
(154) 0x41d3b2 VANDPD %YMM1,%YMM6,%YMM12 |
(154) 0x41d3b6 VDIVPD %YMM18,%YMM12,%YMM18 |
(154) 0x41d3bc VFMADD213PD %YMM20,%YMM11,%YMM20 |
(154) 0x41d3c2 VSUBPD %YMM15,%YMM28,%YMM19 |
(154) 0x41d3c8 VSUBPD %YMM28,%YMM8,%YMM8 |
(154) 0x41d3ce VMULPD %YMM19,%YMM8,%YMM12 |
(154) 0x41d3d4 VCMPPD $0x1,%YMM12,%YMM10,%K1 |
(154) 0x41d3db VCMPPD $0x1,%YMM8,%YMM10,%K2 |
(154) 0x41d3e2 VDIVPD %YMM25,%YMM20,%YMM15 |
(154) 0x41d3e8 VBROADCASTSD 0x466d6(%RIP),%YMM25 |
(154) 0x41d3f2 VSUBPD %YMM11,%YMM25,%YMM12 |
(154) 0x41d3f8 VBROADCASTSD 0x472af(%RIP),%YMM10 |
(154) 0x41d401 VXORPD %YMM10,%YMM12,%YMM20 |
(154) 0x41d407 VMOVAPD %YMM12,%YMM20{%K2} |
(154) 0x41d40d VPMULLQ %YMM31,%YMM24,%YMM14 |
(154) 0x41d413 VFMADD213PD %YMM22,%YMM18,%YMM22 |
(154) 0x41d419 VBROADCASTSD 0x47285(%RIP),%YMM24 |
(154) 0x41d423 VSUBPD %YMM11,%YMM24,%YMM12 |
(154) 0x41d429 VPADDQ %YMM0,%YMM14,%YMM14 |
(154) 0x41d42d VANDPD %YMM1,%YMM19,%YMM19 |
(154) 0x41d433 VANDPD %YMM1,%YMM8,%YMM8 |
(154) 0x41d437 VDIVPD %YMM27,%YMM22,%YMM11 |
(154) 0x41d43d VMINPD %YMM8,%YMM19,%YMM22 |
(154) 0x41d443 VMULPD %YMM15,%YMM19,%YMM19 |
(154) 0x41d449 VFMADD231PD %YMM8,%YMM12,%YMM19 |
(154) 0x41d44f VXORPD %XMM8,%XMM8,%XMM8 |
(154) 0x41d454 KXNORW %K0,%K0,%K2 |
(154) 0x41d458 VGATHERQPD (%R12,%YMM14,8),%YMM8{%K2} |
(154) 0x41d45f VBROADCASTSD 0x4724f(%RIP),%YMM27 |
(154) 0x41d469 VMULPD %YMM27,%YMM19,%YMM19 |
(154) 0x41d46f VMINPD %YMM19,%YMM22,%YMM19 |
(154) 0x41d475 VSUBPD %YMM17,%YMM8,%YMM17 |
(154) 0x41d47b VSUBPD %YMM8,%YMM21,%YMM21 |
(154) 0x41d481 VFMADD231PD %YMM20,%YMM19,%YMM28{%K1} |
(154) 0x41d487 VSUBPD %YMM18,%YMM24,%YMM22 |
(154) 0x41d48d VMULPD %YMM17,%YMM21,%YMM19 |
(154) 0x41d493 VXORPD %XMM20,%XMM20,%XMM20 |
(154) 0x41d499 VCMPPD $0x1,%YMM19,%YMM20,%K1 |
(154) 0x41d4a0 VCMPPD $0x1,%YMM21,%YMM20,%K2 |
(154) 0x41d4a7 VXORPD %XMM24,%XMM24,%XMM24 |
(154) 0x41d4ad VSUBPD %YMM18,%YMM25,%YMM18 |
(154) 0x41d4b3 VXORPD %YMM10,%YMM18,%YMM19 |
(154) 0x41d4b9 VMOVAPD %YMM18,%YMM19{%K2} |
(154) 0x41d4bf VANDPD %YMM1,%YMM17,%YMM17 |
(154) 0x41d4c5 VANDPD %YMM1,%YMM21,%YMM18 |
(154) 0x41d4cb VMINPD %YMM18,%YMM17,%YMM20 |
(154) 0x41d4d1 VMULPD %YMM11,%YMM17,%YMM17 |
(154) 0x41d4d7 VFMADD231PD %YMM18,%YMM22,%YMM17 |
(154) 0x41d4dd VMULPD %YMM27,%YMM17,%YMM17 |
(154) 0x41d4e3 VMINPD %YMM17,%YMM20,%YMM17 |
(154) 0x41d4e9 VMULPD %YMM7,%YMM28,%YMM7 |
(154) 0x41d4ef VMOVDQU64 0x100(%RSP),%YMM20 |
(154) 0x41d4f7 VPXORD %XMM18,%XMM18,%XMM18 |
(154) 0x41d4fd VPMULLQ %YMM3,%YMM20,%YMM18 |
(154) 0x41d503 VPADDQ %YMM2,%YMM18,%YMM18 |
(154) 0x41d509 KXNORW %K0,%K0,%K2 |
(154) 0x41d50d MOV 0x60(%RSP),%RAX |
(154) 0x41d512 VSCATTERQPD %YMM7,(%RAX,%YMM18,8){%K2} |
(154) 0x41d519 VPXORD %XMM18,%XMM18,%XMM18 |
(154) 0x41d51f VPMULLQ %YMM9,%YMM20,%YMM18 |
(154) 0x41d525 VMOVDQA64 %YMM9,%YMM28 |
(154) 0x41d52b VMOVDQA %YMM4,%YMM9 |
(154) 0x41d52f VMOVDQU64 0xe0(%RSP),%YMM21 |
(154) 0x41d537 VPXORD %XMM20,%XMM20,%XMM20 |
(154) 0x41d53d VPMULLQ %YMM31,%YMM21,%YMM20 |
(154) 0x41d543 VFMADD231PD %YMM19,%YMM17,%YMM8{%K1} |
(154) 0x41d549 VMULPD %YMM6,%YMM8,%YMM6 |
(154) 0x41d54d VXORPS %XMM8,%XMM8,%XMM8 |
(154) 0x41d552 VPMULLQ %YMM30,%YMM21,%YMM8 |
(154) 0x41d558 VPADDQ %YMM0,%YMM18,%YMM17 |
(154) 0x41d55e KXNORW %K0,%K0,%K1 |
(154) 0x41d562 VSCATTERQPD %YMM6,(%RAX,%YMM17,8){%K1} |
(154) 0x41d569 VPADDQ %YMM0,%YMM20,%YMM17 |
(154) 0x41d56f VPXORD %XMM30,%XMM30,%XMM30 |
(154) 0x41d575 KXNORW %K0,%K0,%K1 |
(154) 0x41d579 VGATHERQPD (%R14,%YMM17,8),%YMM30{%K1} |
(154) 0x41d580 VPXORD %XMM31,%XMM31,%XMM31 |
(154) 0x41d586 KXNORW %K0,%K0,%K1 |
(154) 0x41d58a VPXORD %XMM17,%XMM17,%XMM17 |
(154) 0x41d590 VPMULLQ %YMM26,%YMM21,%YMM17 |
(154) 0x41d596 VPADDQ %YMM2,%YMM8,%YMM8 |
(154) 0x41d59a VPMULLQ %YMM13,%YMM21,%YMM13 |
(154) 0x41d5a0 VPADDQ %YMM0,%YMM13,%YMM13 |
(154) 0x41d5a4 VPADDQ %YMM2,%YMM17,%YMM17 |
(154) 0x41d5aa VGATHERQPD (%R14,%YMM8,8),%YMM31{%K1} |
(154) 0x41d5b1 VXORPD %XMM8,%XMM8,%XMM8 |
(154) 0x41d5b6 KXNORW %K0,%K0,%K1 |
(154) 0x41d5ba VPXORD %XMM18,%XMM18,%XMM18 |
(154) 0x41d5c0 VPMULLQ %YMM29,%YMM21,%YMM18 |
(154) 0x41d5c6 VGATHERQPD (%R14,%YMM17,8),%YMM8{%K1} |
(154) 0x41d5cd VXORPD %XMM17,%XMM17,%XMM17 |
(154) 0x41d5d3 KXNORW %K0,%K0,%K1 |
(154) 0x41d5d7 VPMULLQ %YMM16,%YMM21,%YMM16 |
(154) 0x41d5dd VGATHERQPD (%R14,%YMM13,8),%YMM17{%K1} |
(154) 0x41d5e4 VPADDQ %YMM2,%YMM18,%YMM13 |
(154) 0x41d5ea VPXORD %XMM18,%XMM18,%XMM18 |
(154) 0x41d5f0 KXNORW %K0,%K0,%K1 |
(154) 0x41d5f4 VGATHERQPD (%R14,%YMM13,8),%YMM18{%K1} |
(154) 0x41d5fb VPADDQ %YMM0,%YMM16,%YMM13 |
(154) 0x41d601 VPXORD %XMM16,%XMM16,%XMM16 |
(154) 0x41d607 KXNORW %K0,%K0,%K1 |
(154) 0x41d60b VGATHERQPD (%R14,%YMM13,8),%YMM16{%K1} |
(154) 0x41d612 VSUBPD %YMM8,%YMM31,%YMM8 |
(154) 0x41d618 VSUBPD %YMM31,%YMM18,%YMM13 |
(154) 0x41d61e VMULPD %YMM8,%YMM13,%YMM18 |
(154) 0x41d624 VCMPPD $0x1,%YMM18,%YMM24,%K2 |
(154) 0x41d62b VXORPD %XMM18,%XMM18,%XMM18 |
(154) 0x41d631 KMOVQ %K2,%K1 |
(154) 0x41d636 VGATHERQPD (%R12,%YMM23,8),%YMM18{%K1} |
(154) 0x41d63d VSUBPD %YMM17,%YMM30,%YMM17 |
(154) 0x41d643 VSUBPD %YMM30,%YMM16,%YMM16 |
(154) 0x41d649 VMULPD %YMM17,%YMM16,%YMM19 |
(154) 0x41d64f VCMPPD $0x1,%YMM19,%YMM24,%K1 |
(154) 0x41d656 VXORPD %XMM19,%XMM19,%XMM19 |
(154) 0x41d65c KMOVQ %K1,%K3 |
(154) 0x41d661 VGATHERQPD (%R12,%YMM14,8),%YMM19{%K3} |
(154) 0x41d668 VXORPD %XMM14,%XMM14,%XMM14 |
(154) 0x41d66d KMOVQ %K2,%K3 |
(154) 0x41d672 VGATHERQPD (%RDI,%YMM5,8),%YMM14{%K3} |
(154) 0x41d679 VXORPD %XMM5,%XMM5,%XMM5 |
(154) 0x41d67d KMOVQ %K1,%K3 |
(154) 0x41d682 VMOVUPD 0x200(%RSP),%YMM4 |
(154) 0x41d68b VGATHERQPD (%RDI,%YMM4,8),%YMM5{%K3} |
(154) 0x41d692 VMULPD %YMM18,%YMM14,%YMM4 |
(154) 0x41d698 VCMPPD $0x1,%YMM13,%YMM24,%K3 |
(154) 0x41d69f VANDPD %YMM1,%YMM8,%YMM8 |
(154) 0x41d6a3 VANDPD %YMM1,%YMM13,%YMM13 |
(154) 0x41d6a7 VMULPD %YMM15,%YMM8,%YMM14 |
(154) 0x41d6ac VFMADD231PD %YMM12,%YMM13,%YMM14 |
(154) 0x41d6b1 VANDPD %YMM1,%YMM7,%YMM12 |
(154) 0x41d6b5 VDIVPD %YMM4,%YMM12,%YMM4 |
(154) 0x41d6b9 VMINPD %YMM13,%YMM8,%YMM8 |
(154) 0x41d6be VSUBPD %YMM4,%YMM25,%YMM4 |
(154) 0x41d6c4 VMULPD %YMM27,%YMM14,%YMM12 |
(154) 0x41d6ca VMINPD %YMM12,%YMM8,%YMM8 |
(154) 0x41d6cf VXORPD %YMM4,%YMM10,%YMM12 |
(154) 0x41d6d3 VMOVAPD %YMM4,%YMM12{%K3} |
(154) 0x41d6d9 VFMADD231PD %YMM8,%YMM12,%YMM31{%K2} |
(154) 0x41d6df VMOVDQU 0xc0(%RSP),%YMM8 |
(154) 0x41d6e8 VPMULLQ %YMM3,%YMM8,%YMM3 |
(154) 0x41d6ee VPADDQ %YMM2,%YMM3,%YMM2 |
(154) 0x41d6f2 VMULPD %YMM7,%YMM31,%YMM3 |
(154) 0x41d6f8 KXNORW %K0,%K0,%K2 |
(154) 0x41d6fc MOV 0x58(%RSP),%RAX |
(154) 0x41d701 VSCATTERQPD %YMM3,(%RAX,%YMM2,8){%K2} |
(154) 0x41d708 VMULPD %YMM19,%YMM5,%YMM2 |
(154) 0x41d70e VANDPD %YMM1,%YMM6,%YMM3 |
(154) 0x41d712 VDIVPD %YMM2,%YMM3,%YMM2 |
(154) 0x41d716 VANDPD %YMM1,%YMM17,%YMM3 |
(154) 0x41d71c VANDPD %YMM1,%YMM16,%YMM4 |
(154) 0x41d722 VMULPD %YMM3,%YMM11,%YMM5 |
(154) 0x41d726 VFMADD231PD %YMM22,%YMM4,%YMM5 |
(154) 0x41d72c VCMPPD $0x1,%YMM16,%YMM24,%K2 |
(154) 0x41d733 VMINPD %YMM4,%YMM3,%YMM3 |
(154) 0x41d737 VSUBPD %YMM2,%YMM25,%YMM2 |
(154) 0x41d73d VMULPD %YMM27,%YMM5,%YMM4 |
(154) 0x41d743 VMINPD %YMM4,%YMM3,%YMM3 |
(154) 0x41d747 VXORPD %YMM2,%YMM10,%YMM4 |
(154) 0x41d74b VMOVAPD %YMM2,%YMM4{%K2} |
(154) 0x41d751 VFMADD231PD %YMM3,%YMM4,%YMM30{%K1} |
(154) 0x41d757 VMULPD %YMM6,%YMM30,%YMM2 |
(154) 0x41d75d VPMULLQ %YMM28,%YMM8,%YMM1 |
(154) 0x41d763 VPADDQ %YMM0,%YMM1,%YMM0 |
(154) 0x41d767 VMOVDQU 0xa0(%RSP),%YMM1 |
(154) 0x41d770 KXNORW %K0,%K0,%K1 |
(154) 0x41d774 VSCATTERQPD %YMM2,(%RAX,%YMM0,8){%K1} |
(154) 0x41d77b VPBROADCASTQ 0x46f1c(%RIP),%YMM0 |
(154) 0x41d784 VPADDQ %YMM0,%YMM1,%YMM1 |
(154) 0x41d788 VPADDQ %YMM0,%YMM9,%YMM9 |
(154) 0x41d78c ADD $0x8,%R15 |
(154) 0x41d790 CMP %RBX,%R15 |
(154) 0x41d793 JB 41d0d0 |
0x41d799 CMP %R8,0x80(%RSP) |
0x41d7a1 MOV 0x38(%RSP),%RBX |
0x41d7a6 MOV 0x78(%RSP),%RSI |
0x41d7ab JNE 41d7db |
0x41d7ad MOV $0x480480,%EDI |
0x41d7b2 MOV 0x40(%RSP),%ESI |
0x41d7b6 LEA -0x28(%RBP),%RSP |
0x41d7ba POP %RBX |
0x41d7bb POP %R12 |
0x41d7bd POP %R13 |
0x41d7bf POP %R14 |
0x41d7c1 POP %R15 |
0x41d7c3 POP %RBP |
0x41d7c4 VZEROUPPER |
0x41d7c7 JMP 403050 |
0x41d7cc LEA -0x28(%RBP),%RSP |
0x41d7d0 POP %RBX |
0x41d7d1 POP %R12 |
0x41d7d3 POP %R13 |
0x41d7d5 POP %R14 |
0x41d7d7 POP %R15 |
0x41d7d9 POP %RBP |
0x41d7da RET |
0x41d7db ADD %R8,%RSI |
0x41d7de VPXOR %XMM0,%XMM0,%XMM0 |
0x41d7e2 VMOVDDUP 0x462f6(%RIP),%XMM1 |
0x41d7ea VMOVSD 0x46eb6(%RIP),%XMM2 |
0x41d7f2 VMOVSD 0x462ce(%RIP),%XMM3 |
0x41d7fa VMOVDDUP 0x46eae(%RIP),%XMM4 |
0x41d802 VMOVDDUP 0x462d6(%RIP),%XMM5 |
0x41d80a VMOVSD 0x46ea6(%RIP),%XMM6 |
0x41d812 JMP 41d857 |
0x41d814 NOPW %CS:(%RAX,%RAX,1) |
(153) 0x41d820 VADDSD %XMM11,%XMM10,%XMM8 |
(153) 0x41d825 VMULSD %XMM7,%XMM8,%XMM7 |
(153) 0x41d829 IMUL 0x88(%RSP),%RDX |
(153) 0x41d832 ADD %RAX,%RDX |
(153) 0x41d835 MOV 0x58(%RSP),%RAX |
(153) 0x41d83a VMOVSD %XMM7,(%RAX,%RDX,8) |
(153) 0x41d83f INC %RSI |
(153) 0x41d842 CMP 0x50(%RSP),%RSI |
(153) 0x41d847 MOV 0x18(%RSP),%R11 |
(153) 0x41d84c MOV 0x38(%RSP),%RBX |
(153) 0x41d851 JG 41d7ad |
(153) 0x41d857 MOV %RSI,%R8 |
(153) 0x41d85a SHR $0x20,%R8 |
(153) 0x41d85e JE 41d890 |
(153) 0x41d860 MOV %RSI,%RAX |
(153) 0x41d863 XOR %EDX,%EDX |
(153) 0x41d865 MOV 0x10(%RSP),%R9 |
(153) 0x41d86a DIV %R9 |
(153) 0x41d86d MOV %RAX,%RCX |
(153) 0x41d870 MOV 0x30(%RSP),%R10 |
(153) 0x41d875 TEST %R8,%R8 |
(153) 0x41d878 JE 41d8a8 |
(153) 0x41d87a MOV %RSI,%RAX |
(153) 0x41d87d CQTO |
(153) 0x41d87f IDIV %R9 |
(153) 0x41d882 JMP 41d8af |
0x41d884 NOPW %CS:(%RAX,%RAX,1) |
(153) 0x41d890 MOV %ESI,%EAX |
(153) 0x41d892 XOR %EDX,%EDX |
(153) 0x41d894 MOV 0x10(%RSP),%R9 |
(153) 0x41d899 DIV %R9D |
(153) 0x41d89c MOV %EAX,%ECX |
(153) 0x41d89e MOV 0x30(%RSP),%R10 |
(153) 0x41d8a3 TEST %R8,%R8 |
(153) 0x41d8a6 JNE 41d87a |
(153) 0x41d8a8 MOV %ESI,%EAX |
(153) 0x41d8aa XOR %EDX,%EDX |
(153) 0x41d8ac DIV %R9D |
(153) 0x41d8af MOV 0x8(%RSP),%RAX |
(153) 0x41d8b4 ADD 0x4(%RSP),%ECX |
(153) 0x41d8b8 ADD %EAX,%EDX |
(153) 0x41d8ba MOVSXD %EDX,%RAX |
(153) 0x41d8bd MOVSXD %ECX,%RDX |
(153) 0x41d8c0 MOV %R10,%R8 |
(153) 0x41d8c3 IMUL %RDX,%R8 |
(153) 0x41d8c7 ADD %RAX,%R8 |
(153) 0x41d8ca VMOVSD (%R11,%R8,8),%XMM7 |
(153) 0x41d8d0 LEA -0x1(%RDX),%R8D |
(153) 0x41d8d4 VUCOMISD %XMM7,%XMM0 |
(153) 0x41d8d8 JAE 41d8f0 |
(153) 0x41d8da ADD $-0x2,%ECX |
(153) 0x41d8dd MOVSXD %R8D,%R10 |
(153) 0x41d8e0 MOVSXD %ECX,%RCX |
(153) 0x41d8e3 MOV %RDX,%R8 |
(153) 0x41d8e6 MOV %R10,%R11 |
(153) 0x41d8e9 JMP 41d90a |
0x41d8eb NOPL (%RAX,%RAX,1) |
(153) 0x41d8f0 INC %ECX |
(153) 0x41d8f2 MOV 0x20(%RSP),%R9 |
(153) 0x41d8f7 CMP %ECX,%R9D |
(153) 0x41d8fa CMOVL %R9D,%ECX |
(153) 0x41d8fe MOVSXD %R8D,%R8 |
(153) 0x41d901 MOVSXD %ECX,%RCX |
(153) 0x41d904 MOV %RCX,%R10 |
(153) 0x41d907 MOV %RDX,%R11 |
(153) 0x41d90a MOV 0x28(%RSP),%R9 |
(153) 0x41d90f VANDPD %XMM1,%XMM7,%XMM8 |
(153) 0x41d913 IMUL %R11,%R9 |
(153) 0x41d917 ADD %RAX,%R9 |
(153) 0x41d91a VDIVSD (%RDI,%R9,8),%XMM8,%XMM12 |
(153) 0x41d920 VMOVSD (%R13,%RDX,8),%XMM8 |
(153) 0x41d927 VFMADD213SD %XMM8,%XMM12,%XMM8 |
(153) 0x41d92c VDIVSD (%R13,%R10,8),%XMM8,%XMM9 |
(153) 0x41d933 VSUBSD %XMM12,%XMM2,%XMM8 |
(153) 0x41d938 MOV %RBX,%R10 |
(153) 0x41d93b IMUL %R11,%R10 |
(153) 0x41d93f ADD %RAX,%R10 |
(153) 0x41d942 VMOVSD (%R12,%R10,8),%XMM11 |
(153) 0x41d948 MOV %RBX,%R15 |
(153) 0x41d94b IMUL %RCX,%R15 |
(153) 0x41d94f ADD %RAX,%R15 |
(153) 0x41d952 VSUBSD (%R12,%R15,8),%XMM11,%XMM13 |
(153) 0x41d958 IMUL %R8,%RBX |
(153) 0x41d95c ADD %RAX,%RBX |
(153) 0x41d95f VMOVSD (%R12,%RBX,8),%XMM10 |
(153) 0x41d965 VSUBSD %XMM11,%XMM10,%XMM14 |
(153) 0x41d96a VMULSD %XMM13,%XMM14,%XMM15 |
(153) 0x41d96f VXORPD %XMM10,%XMM10,%XMM10 |
(153) 0x41d974 VUCOMISD %XMM10,%XMM15 |
(153) 0x41d979 VXORPD %XMM15,%XMM15,%XMM15 |
(153) 0x41d97e JBE 41d9bb |
(153) 0x41d980 VSUBSD %XMM12,%XMM3,%XMM12 |
(153) 0x41d985 VXORPD %XMM4,%XMM12,%XMM15 |
(153) 0x41d989 VCMPSD $0x1,%XMM14,%XMM0,%K1 |
(153) 0x41d990 VMOVSD %XMM12,%XMM15,%XMM15{%K1} |
(153) 0x41d996 VANDPD %XMM5,%XMM13,%XMM12 |
(153) 0x41d99a VANDPD %XMM5,%XMM14,%XMM13 |
(153) 0x41d99e VMINSD %XMM13,%XMM12,%XMM14 |
(153) 0x41d9a3 VMULSD %XMM9,%XMM12,%XMM12 |
(153) 0x41d9a8 VFMADD231SD %XMM13,%XMM8,%XMM12 |
(153) 0x41d9ad VMULSD %XMM6,%XMM12,%XMM12 |
(153) 0x41d9b1 VMINSD %XMM12,%XMM14,%XMM12 |
(153) 0x41d9b6 VMULSD %XMM15,%XMM12,%XMM15 |
(153) 0x41d9bb VADDSD %XMM11,%XMM15,%XMM11 |
(153) 0x41d9c0 VMULSD %XMM7,%XMM11,%XMM7 |
(153) 0x41d9c4 MOV 0x48(%RSP),%R15 |
(153) 0x41d9c9 IMUL %RDX,%R15 |
(153) 0x41d9cd ADD %RAX,%R15 |
(153) 0x41d9d0 MOV 0x60(%RSP),%RBX |
(153) 0x41d9d5 VMOVSD %XMM7,(%RBX,%R15,8) |
(153) 0x41d9db MOV 0x90(%RSP),%RBX |
(153) 0x41d9e3 IMUL %RBX,%R11 |
(153) 0x41d9e7 ADD %RAX,%R11 |
(153) 0x41d9ea VMOVSD (%R14,%R11,8),%XMM11 |
(153) 0x41d9f0 IMUL %RBX,%RCX |
(153) 0x41d9f4 ADD %RAX,%RCX |
(153) 0x41d9f7 VSUBSD (%R14,%RCX,8),%XMM11,%XMM12 |
(153) 0x41d9fd IMUL %RBX,%R8 |
(153) 0x41da01 ADD %RAX,%R8 |
(153) 0x41da04 VMOVSD (%R14,%R8,8),%XMM13 |
(153) 0x41da0a VSUBSD %XMM11,%XMM13,%XMM13 |
(153) 0x41da0f VMULSD %XMM12,%XMM13,%XMM14 |
(153) 0x41da14 VUCOMISD %XMM10,%XMM14 |
(153) 0x41da19 JBE 41d820 |
(153) 0x41da1f VANDPD %XMM5,%XMM7,%XMM10 |
(153) 0x41da23 VMOVSD (%RDI,%R9,8),%XMM14 |
(153) 0x41da29 VMULSD (%R12,%R10,8),%XMM14,%XMM14 |
(153) 0x41da2f VDIVSD %XMM14,%XMM10,%XMM10 |
(153) 0x41da34 VSUBSD %XMM10,%XMM3,%XMM10 |
(153) 0x41da39 VXORPD %XMM4,%XMM10,%XMM14 |
(153) 0x41da3d VCMPSD $0x1,%XMM13,%XMM0,%K1 |
(153) 0x41da44 VMOVSD %XMM10,%XMM14,%XMM14{%K1} |
(153) 0x41da4a VANDPD %XMM5,%XMM12,%XMM10 |
(153) 0x41da4e VANDPD %XMM5,%XMM13,%XMM12 |
(153) 0x41da52 VMINSD %XMM12,%XMM10,%XMM13 |
(153) 0x41da57 VMULSD %XMM9,%XMM10,%XMM9 |
(153) 0x41da5c VFMADD213SD %XMM9,%XMM12,%XMM8 |
(153) 0x41da61 VMULSD %XMM6,%XMM8,%XMM8 |
(153) 0x41da65 VMINSD %XMM8,%XMM13,%XMM8 |
(153) 0x41da6a VMULSD %XMM8,%XMM14,%XMM10 |
(153) 0x41da6f JMP 41d820 |
0x41da74 NOPW %CS:(%RAX,%RAX,1) |
Path / |
Source file and lines | advec_cell.cpp:157-202 |
Module | exec |
nb instructions | 158 |
nb uops | 160 |
loop length | 788 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 7 |
used ymm registers | 3 |
used zmm registers | 0 |
nb stack references | 42 |
micro-operation queue | 26.67 cycles |
front end | 26.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 5.80 | 5.80 | 20.33 | 20.33 | 22.50 | 11.00 | 5.80 | 22.50 | 22.50 | 22.50 | 5.60 | 20.33 |
cycles | 5.80 | 5.80 | 20.33 | 20.33 | 22.50 | 11.00 | 5.80 | 22.50 | 22.50 | 22.50 | 5.60 | 20.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 26.48 |
Stall cycles | 0.00 |
Front-end | 26.67 |
Dispatch | 22.50 |
Overall L1 | 26.67 |
all | 22% |
load | 22% |
store | 28% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 50% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 20% |
load | 13% |
store | 28% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 50% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 11% |
all | 19% |
load | 20% |
store | 22% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 28% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 18% |
load | 17% |
store | 22% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 28% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x20,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x240,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RBP),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8D,0x4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0,0x44(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 41d7cc <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.7+0x96c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RCX,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,0x8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVQ $0,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0x1,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0xa0(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x4c(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x78(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x70(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x480460,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 4031e0 <__kmpc_for_static_init_8@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x70(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x68(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RAX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JA 41d7ad <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.7+0x94d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x10(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB 0x8(%RSP),%EDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV (%R13),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%R13),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R14),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%R14),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RAX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R12),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%R12),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RBX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x2,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x1(%RSI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x50(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%R9),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVG %RAX,%R8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV 0xa0(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R15),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R15),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %RSI,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $-0x8,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
AND %R8,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RBX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x38(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 41d7de <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.7+0x97e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VPBROADCASTQ %RDX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x1e0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x4(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %EAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x1c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x8(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x1a0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %R15,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x180(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTD %ECX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x28(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %RBX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x120(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x48(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %R9,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %R10,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV %RSI,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPBROADCASTQ %RSI,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPADDQ 0x475c6(%RIP),%YMM0,%YMM9 | 1 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
VPADDQ 0x4743e(%RIP),%YMM0,%YMM1 | 1 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
XOR %R15D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R8,0x80(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV 0x38(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x78(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 41d7db <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.7+0x97b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x480480,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x40(%RSP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 403050 <__kmpc_for_static_fini@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
ADD %R8,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VPXOR %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVDDUP 0x462f6(%RIP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x46eb6(%RIP),%XMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x462ce(%RIP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDDUP 0x46eae(%RIP),%XMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDDUP 0x462d6(%RIP),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x46ea6(%RIP),%XMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 41d857 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.7+0x9f7> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | advec_cell.cpp:157-202 |
Module | exec |
nb instructions | 158 |
nb uops | 160 |
loop length | 788 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 7 |
used ymm registers | 3 |
used zmm registers | 0 |
nb stack references | 42 |
micro-operation queue | 26.67 cycles |
front end | 26.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 5.80 | 5.80 | 20.33 | 20.33 | 22.50 | 11.00 | 5.80 | 22.50 | 22.50 | 22.50 | 5.60 | 20.33 |
cycles | 5.80 | 5.80 | 20.33 | 20.33 | 22.50 | 11.00 | 5.80 | 22.50 | 22.50 | 22.50 | 5.60 | 20.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 26.48 |
Stall cycles | 0.00 |
Front-end | 26.67 |
Dispatch | 22.50 |
Overall L1 | 26.67 |
all | 22% |
load | 22% |
store | 28% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 50% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 20% |
load | 13% |
store | 28% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 50% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 11% |
all | 19% |
load | 20% |
store | 22% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 28% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 18% |
load | 17% |
store | 22% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 28% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x20,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x240,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RBP),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8D,0x4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0,0x44(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 41d7cc <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.7+0x96c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RCX,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,0x8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVQ $0,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0x1,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0xa0(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x4c(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x78(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x70(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x480460,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 4031e0 <__kmpc_for_static_init_8@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x70(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x68(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RAX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JA 41d7ad <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.7+0x94d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x10(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB 0x8(%RSP),%EDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV (%R13),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%R13),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R14),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%R14),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RAX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R12),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%R12),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RBX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x2,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x1(%RSI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x50(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%R9),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVG %RAX,%R8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV 0xa0(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R15),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R15),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %RSI,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $-0x8,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
AND %R8,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RBX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x38(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 41d7de <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.7+0x97e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VPBROADCASTQ %RDX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x1e0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x4(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %EAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x1c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x8(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x1a0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %R15,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x180(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTD %ECX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x28(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %RBX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x120(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x48(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %R9,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %R10,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV %RSI,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPBROADCASTQ %RSI,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPADDQ 0x475c6(%RIP),%YMM0,%YMM9 | 1 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
VPADDQ 0x4743e(%RIP),%YMM0,%YMM1 | 1 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
XOR %R15D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R8,0x80(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV 0x38(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x78(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 41d7db <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.7+0x97b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x480480,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x40(%RSP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 403050 <__kmpc_for_static_fini@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
ADD %R8,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VPXOR %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVDDUP 0x462f6(%RIP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x46eb6(%RIP),%XMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x462ce(%RIP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDDUP 0x46eae(%RIP),%XMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDDUP 0x462d6(%RIP),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x46ea6(%RIP),%XMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 41d857 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.7+0x9f7> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.7– | 1.44 | 2.02 |
○Loop 154 - advec_cell.cpp:157-202 - exec | 1.44 | 2.02 |
○Loop 153 - advec_cell.cpp:157-202 - exec | 0 | 0 |