Function: _Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_ ... | Module: exec | Source: advec_cell.cpp:208-216 [...] | Coverage: 2.8% |
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Function: _Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_ ... | Module: exec | Source: advec_cell.cpp:208-216 [...] | Coverage: 2.8% |
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/home/eoseret/qaas_runs_CPU_9468/171-112-9712/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/context.h: 69 - 69 |
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69: T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; } |
/home/eoseret/qaas_runs_CPU_9468/171-112-9712/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/advec_cell.cpp: 208 - 216 |
-------------------------------------------------------------------------------- |
208: #pragma omp parallel for simd collapse(2) |
209: for (int j = (y_min + 1); j < (y_max + 2); j++) { |
210: for (int i = (x_min + 1); i < (x_max + 2); i++) { |
211: double pre_mass_s = density1(i, j) * pre_vol(i, j); |
212: double post_mass_s = pre_mass_s + mass_flux_y(i, j) - mass_flux_y(i + 0, j + 1); |
213: double post_ener_s = (energy1(i, j) * pre_mass_s + ener_flux(i, j) - ener_flux(i + 0, j + 1)) / post_mass_s; |
214: double advec_vol_s = pre_vol(i, j) + vol_flux_y(i, j) - vol_flux_y(i + 0, j + 1); |
215: density1(i, j) = post_mass_s / advec_vol_s; |
216: energy1(i, j) = post_ener_s; |
0x428aa0 PUSH %RBP |
0x428aa1 MOV %RSP,%RBP |
0x428aa4 PUSH %R15 |
0x428aa6 PUSH %R14 |
0x428aa8 PUSH %R13 |
0x428aaa PUSH %R12 |
0x428aac PUSH %RBX |
0x428aad MOV %RDI,%RBX |
0x428ab0 AND $-0x40,%RSP |
0x428ab4 SUB $0x100,%RSP |
0x428abb MOV 0x38(%RDI),%EAX |
0x428abe MOV 0x3c(%RDI),%EDX |
0x428ac1 MOV 0x30(%RDI),%EDI |
0x428ac4 MOV 0x34(%RBX),%ESI |
0x428ac7 ADD $0x2,%EDX |
0x428aca LEA 0x1(%RAX),%R15D |
0x428ace INC %EDI |
0x428ad0 MOV %EDX,0x70(%RSP) |
0x428ad4 MOV %EDI,0x6c(%RSP) |
0x428ad8 CMP %EDX,%R15D |
0x428adb JGE 429253 |
0x428ae1 MOV %EDX,%R13D |
0x428ae4 LEA 0x2(%RSI),%R14D |
0x428ae8 SUB %R15D,%R13D |
0x428aeb CMP %R14D,%EDI |
0x428aee JGE 429253 |
0x428af4 MOV %R14D,%ECX |
0x428af7 SUB %EDI,%ECX |
0x428af9 MOV %ECX,0x74(%RSP) |
0x428afd CALL 404650 <omp_get_num_threads@plt> |
0x428b02 MOV %EAX,%R12D |
0x428b05 CALL 404540 <omp_get_thread_num@plt> |
0x428b0a XOR %EDX,%EDX |
0x428b0c MOV %EAX,%R8D |
0x428b0f MOV 0x74(%RSP),%EAX |
0x428b13 IMUL %R13D,%EAX |
0x428b17 DIV %R12D |
0x428b1a MOV %EAX,%ECX |
0x428b1c CMP %EDX,%R8D |
0x428b1f JB 429276 |
0x428b25 IMUL %ECX,%R8D |
0x428b29 LEA (%R8,%RDX,1),%R11D |
0x428b2d LEA (%RCX,%R11,1),%R9D |
0x428b31 MOV %R9D,0x68(%RSP) |
0x428b36 CMP %R9D,%R11D |
0x428b39 JAE 429253 |
0x428b3f MOV %R11D,%EAX |
0x428b42 XOR %EDX,%EDX |
0x428b44 MOV 0x6c(%RSP),%R10D |
0x428b49 MOV (%RBX),%RDI |
0x428b4c DIVL 0x74(%RSP) |
0x428b50 MOV 0x20(%RBX),%RSI |
0x428b54 MOV 0x8(%RBX),%R13 |
0x428b58 MOV 0x28(%RBX),%R12 |
0x428b5c MOV %RDI,0x60(%RSP) |
0x428b61 MOV %RSI,0x58(%RSP) |
0x428b66 MOV %R13,0x48(%RSP) |
0x428b6b MOV %R12,0x40(%RSP) |
0x428b70 LEA (%RAX,%R15,1),%R15D |
0x428b74 MOV %R14D,%EAX |
0x428b77 MOV 0x10(%RBX),%R14 |
0x428b7b MOV 0x18(%RBX),%RBX |
0x428b7f ADD %EDX,%R10D |
0x428b82 MOVSXD %R15D,%R8 |
0x428b85 MOV %R11D,%R15D |
0x428b88 MOV %R10D,0xd4(%RSP) |
0x428b90 SUB %R10D,%EAX |
0x428b93 MOV %R14,0x50(%RSP) |
0x428b98 MOV %RBX,0x38(%RSP) |
0x428b9d MOV %R8,0xc8(%RSP) |
0x428ba5 NOPL (%RAX) |
(170) 0x428ba8 CMP %EAX,%ECX |
(170) 0x428baa CMOVBE %ECX,%EAX |
(170) 0x428bad LEA (%R15,%RAX,1),%ECX |
(170) 0x428bb1 MOV %EAX,%EDX |
(170) 0x428bb3 MOV %ECX,0xd0(%RSP) |
(170) 0x428bba CMP %ECX,%R15D |
(170) 0x428bbd JAE 429217 |
(170) 0x428bc3 MOV 0x50(%RSP),%R10 |
(170) 0x428bc8 MOV 0xc8(%RSP),%RSI |
(170) 0x428bd0 MOV 0x58(%RSP),%R9 |
(170) 0x428bd5 MOV 0x48(%RSP),%R12 |
(170) 0x428bda MOV (%R10),%R14 |
(170) 0x428bdd MOV 0x40(%RSP),%RCX |
(170) 0x428be2 MOV 0x10(%R9),%RAX |
(170) 0x428be6 MOV 0x10(%R10),%RDI |
(170) 0x428bea MOV %RSI,%R10 |
(170) 0x428bed MOV 0x10(%R12),%R8 |
(170) 0x428bf2 IMUL %R14,%R10 |
(170) 0x428bf6 MOV 0x60(%RSP),%R11 |
(170) 0x428bfb MOV %RAX,0xe8(%RSP) |
(170) 0x428c03 MOV (%RCX),%RAX |
(170) 0x428c06 MOV 0x10(%R11),%R13 |
(170) 0x428c0a MOV (%R11),%RBX |
(170) 0x428c0d MOV %R8,0xf0(%RSP) |
(170) 0x428c15 MOV %RSI,%R8 |
(170) 0x428c18 IMUL %RAX,%R8 |
(170) 0x428c1c ADD %R10,%R14 |
(170) 0x428c1f MOV (%R9),%R11 |
(170) 0x428c22 MOV (%R12),%R9 |
(170) 0x428c26 MOV %R14,0xa8(%RSP) |
(170) 0x428c2e MOV 0x10(%RCX),%R14 |
(170) 0x428c32 IMUL %RSI,%RBX |
(170) 0x428c36 MOV 0x38(%RSP),%RCX |
(170) 0x428c3b IMUL %RSI,%R11 |
(170) 0x428c3f MOV %R13,0xb0(%RSP) |
(170) 0x428c47 IMUL %RSI,%R9 |
(170) 0x428c4b LEA (%RAX,%R8,1),%R12 |
(170) 0x428c4f MOV %R10,0x98(%RSP) |
(170) 0x428c57 MOV (%RCX),%RAX |
(170) 0x428c5a MOV %R12,0xf8(%RSP) |
(170) 0x428c62 MOV 0x10(%RCX),%R12 |
(170) 0x428c66 LEA -0x1(%RDX),%ECX |
(170) 0x428c69 MOV %RBX,0x88(%RSP) |
(170) 0x428c71 IMUL %RAX,%RSI |
(170) 0x428c75 MOV %R11,0x90(%RSP) |
(170) 0x428c7d MOV %R9,0xb8(%RSP) |
(170) 0x428c85 MOV %R8,0xc0(%RSP) |
(170) 0x428c8d MOV %RSI,0xd8(%RSP) |
(170) 0x428c95 LEA (%RAX,%RSI,1),%RSI |
(170) 0x428c99 MOV %RSI,0xe0(%RSP) |
(170) 0x428ca1 CMP $0x6,%ECX |
(170) 0x428ca4 JBE 429268 |
(170) 0x428caa MOVSXD 0xd4(%RSP),%RAX |
(170) 0x428cb2 MOV 0xa8(%RSP),%RCX |
(170) 0x428cba LEA (%RBX,%RAX,1),%RBX |
(170) 0x428cbe LEA (%R10,%RAX,1),%R10 |
(170) 0x428cc2 ADD %RAX,%RCX |
(170) 0x428cc5 ADD %RAX,%R8 |
(170) 0x428cc8 LEA (%R13,%RBX,8),%RSI |
(170) 0x428ccd LEA (%R11,%RAX,1),%R13 |
(170) 0x428cd1 MOV 0xe8(%RSP),%R11 |
(170) 0x428cd9 LEA (%RDI,%R10,8),%RBX |
(170) 0x428cdd MOV 0xf0(%RSP),%R10 |
(170) 0x428ce5 LEA (%R9,%RAX,1),%R9 |
(170) 0x428ce9 LEA (%R11,%R13,8),%R13 |
(170) 0x428ced LEA (%RDI,%RCX,8),%R11 |
(170) 0x428cf1 MOV %R11,0x80(%RSP) |
(170) 0x428cf9 LEA (%R14,%R8,8),%R11 |
(170) 0x428cfd MOV 0xf8(%RSP),%R8 |
(170) 0x428d05 LEA (%R10,%R9,8),%RCX |
(170) 0x428d09 MOV 0xd8(%RSP),%R9 |
(170) 0x428d11 ADD %RAX,%R8 |
(170) 0x428d14 LEA (%R14,%R8,8),%R10 |
(170) 0x428d18 LEA (%R9,%RAX,1),%R8 |
(170) 0x428d1c LEA (%R12,%R8,8),%R9 |
(170) 0x428d20 MOV 0xe0(%RSP),%R8 |
(170) 0x428d28 ADD %R8,%RAX |
(170) 0x428d2b LEA (%R12,%RAX,8),%R8 |
(170) 0x428d2f MOV %EDX,%EAX |
(170) 0x428d31 SHR $0x3,%EAX |
(170) 0x428d34 MOV %RAX,0x78(%RSP) |
(170) 0x428d39 SAL $0x6,%RAX |
(170) 0x428d3d MOV %RAX,0xa0(%RSP) |
(170) 0x428d45 XOR %EAX,%EAX |
(170) 0x428d47 TESTB $0x1,0x78(%RSP) |
(170) 0x428d4c JE 428db9 |
(170) 0x428d4e VMOVUPD (%R13),%ZMM0 |
(170) 0x428d55 VMOVUPD (%R11),%ZMM6 |
(170) 0x428d5b MOV 0x80(%RSP),%RAX |
(170) 0x428d63 CMPQ $0x40,0xa0(%RSP) |
(170) 0x428d6c VMULPD (%RSI),%ZMM0,%ZMM1 |
(170) 0x428d72 VSUBPD (%R10),%ZMM6,%ZMM3 |
(170) 0x428d78 VADDPD (%R9),%ZMM0,%ZMM5 |
(170) 0x428d7e VSUBPD (%R8),%ZMM5,%ZMM7 |
(170) 0x428d84 VSUBPD (%RAX),%ZMM1,%ZMM2 |
(170) 0x428d8a VFMADD132PD (%RCX),%ZMM3,%ZMM1 |
(170) 0x428d90 MOV $0x40,%EAX |
(170) 0x428d95 VADDPD (%RBX),%ZMM2,%ZMM4 |
(170) 0x428d9b VDIVPD %ZMM7,%ZMM4,%ZMM8 |
(170) 0x428da1 VDIVPD %ZMM4,%ZMM1,%ZMM9 |
(170) 0x428da7 VMOVUPD %ZMM8,(%RSI) |
(170) 0x428dad VMOVUPD %ZMM9,(%RCX) |
(170) 0x428db3 JE 428e9b |
(170) 0x428db9 MOV %R15D,0x78(%RSP) |
(170) 0x428dbe MOV 0x80(%RSP),%R15 |
(171) 0x428dc6 VMOVUPD (%R13,%RAX,1),%ZMM10 |
(171) 0x428dce VMOVUPD (%R11,%RAX,1),%ZMM14 |
(171) 0x428dd5 VMULPD (%RSI,%RAX,1),%ZMM10,%ZMM11 |
(171) 0x428ddc VSUBPD (%R10,%RAX,1),%ZMM14,%ZMM15 |
(171) 0x428de3 VADDPD (%R9,%RAX,1),%ZMM10,%ZMM0 |
(171) 0x428dea VSUBPD (%R8,%RAX,1),%ZMM0,%ZMM1 |
(171) 0x428df1 VSUBPD (%R15,%RAX,1),%ZMM11,%ZMM12 |
(171) 0x428df8 VFMADD132PD (%RCX,%RAX,1),%ZMM15,%ZMM11 |
(171) 0x428dff VADDPD (%RBX,%RAX,1),%ZMM12,%ZMM13 |
(171) 0x428e06 VDIVPD %ZMM13,%ZMM11,%ZMM4 |
(171) 0x428e0c VDIVPD %ZMM1,%ZMM13,%ZMM2 |
(171) 0x428e12 VMOVUPD %ZMM2,(%RSI,%RAX,1) |
(171) 0x428e19 VMOVUPD %ZMM4,(%RCX,%RAX,1) |
(171) 0x428e20 VMOVUPD 0x40(%R13,%RAX,1),%ZMM6 |
(171) 0x428e28 VMOVUPD 0x40(%R11,%RAX,1),%ZMM5 |
(171) 0x428e30 VMULPD 0x40(%RSI,%RAX,1),%ZMM6,%ZMM7 |
(171) 0x428e38 VSUBPD 0x40(%R10,%RAX,1),%ZMM5,%ZMM9 |
(171) 0x428e40 VADDPD 0x40(%R9,%RAX,1),%ZMM6,%ZMM10 |
(171) 0x428e48 VSUBPD 0x40(%R8,%RAX,1),%ZMM10,%ZMM11 |
(171) 0x428e50 VSUBPD 0x40(%R15,%RAX,1),%ZMM7,%ZMM3 |
(171) 0x428e58 VFMADD132PD 0x40(%RCX,%RAX,1),%ZMM9,%ZMM7 |
(171) 0x428e60 VADDPD 0x40(%RBX,%RAX,1),%ZMM3,%ZMM8 |
(171) 0x428e68 VDIVPD %ZMM11,%ZMM8,%ZMM12 |
(171) 0x428e6e VDIVPD %ZMM8,%ZMM7,%ZMM13 |
(171) 0x428e74 VMOVUPD %ZMM12,0x40(%RSI,%RAX,1) |
(171) 0x428e7c VMOVUPD %ZMM13,0x40(%RCX,%RAX,1) |
(171) 0x428e84 SUB $-0x80,%RAX |
(171) 0x428e88 CMP %RAX,0xa0(%RSP) |
(171) 0x428e90 JNE 428dc6 |
(170) 0x428e96 MOV 0x78(%RSP),%R15D |
(170) 0x428e9b MOV 0xd4(%RSP),%ESI |
(170) 0x428ea2 MOV %EDX,%ECX |
(170) 0x428ea4 AND $-0x8,%ECX |
(170) 0x428ea7 ADD %ECX,%R15D |
(170) 0x428eaa LEA (%RCX,%RSI,1),%ESI |
(170) 0x428ead TEST $0x7,%DL |
(170) 0x428eb0 JE 42920f |
(170) 0x428eb6 SUB %ECX,%EDX |
(170) 0x428eb8 LEA -0x1(%RDX),%R13D |
(170) 0x428ebc CMP $0x2,%R13D |
(170) 0x428ec0 JBE 428fc6 |
(170) 0x428ec6 MOVSXD 0xd4(%RSP),%RAX |
(170) 0x428ece MOV 0x88(%RSP),%RBX |
(170) 0x428ed6 MOV 0xb0(%RSP),%R10 |
(170) 0x428ede MOV 0xb8(%RSP),%R9 |
(170) 0x428ee6 LEA (%RBX,%RAX,1),%R11 |
(170) 0x428eea MOV 0xf0(%RSP),%R13 |
(170) 0x428ef2 ADD %RCX,%R11 |
(170) 0x428ef5 LEA (%R9,%RAX,1),%R8 |
(170) 0x428ef9 MOV 0xd8(%RSP),%R9 |
(170) 0x428f01 LEA (%R10,%R11,8),%RBX |
(170) 0x428f05 MOV 0xe0(%RSP),%R10 |
(170) 0x428f0d ADD %RCX,%R8 |
(170) 0x428f10 LEA (%R13,%R8,8),%R11 |
(170) 0x428f15 MOV 0xe8(%RSP),%R13 |
(170) 0x428f1d ADD %RAX,%R9 |
(170) 0x428f20 LEA (%R10,%RAX,1),%R8 |
(170) 0x428f24 MOV 0x90(%RSP),%R10 |
(170) 0x428f2c ADD %RCX,%R9 |
(170) 0x428f2f ADD %RCX,%R8 |
(170) 0x428f32 ADD %RAX,%R10 |
(170) 0x428f35 ADD %RCX,%R10 |
(170) 0x428f38 VMOVUPD (%R13,%R10,8),%YMM14 |
(170) 0x428f3f MOV 0xa8(%RSP),%R10 |
(170) 0x428f47 MOV 0x98(%RSP),%R13 |
(170) 0x428f4f VMULPD (%RBX),%YMM14,%YMM15 |
(170) 0x428f53 ADD %RAX,%R10 |
(170) 0x428f56 VADDPD (%R12,%R9,8),%YMM14,%YMM6 |
(170) 0x428f5c ADD %RCX,%R10 |
(170) 0x428f5f ADD %RAX,%R13 |
(170) 0x428f62 ADD %RCX,%R13 |
(170) 0x428f65 VSUBPD (%R12,%R8,8),%YMM6,%YMM7 |
(170) 0x428f6b VSUBPD (%RDI,%R10,8),%YMM15,%YMM0 |
(170) 0x428f71 MOV 0xc0(%RSP),%R10 |
(170) 0x428f79 ADD %RAX,%R10 |
(170) 0x428f7c VADDPD (%RDI,%R13,8),%YMM0,%YMM1 |
(170) 0x428f82 MOV 0xf8(%RSP),%R13 |
(170) 0x428f8a ADD %RCX,%R10 |
(170) 0x428f8d VMOVUPD (%R14,%R10,8),%YMM2 |
(170) 0x428f93 ADD %R13,%RAX |
(170) 0x428f96 VDIVPD %YMM7,%YMM1,%YMM3 |
(170) 0x428f9a ADD %RCX,%RAX |
(170) 0x428f9d VSUBPD (%R14,%RAX,8),%YMM2,%YMM4 |
(170) 0x428fa3 VFMADD132PD (%R11),%YMM4,%YMM15 |
(170) 0x428fa8 VDIVPD %YMM1,%YMM15,%YMM8 |
(170) 0x428fac VMOVUPD %YMM3,(%RBX) |
(170) 0x428fb0 VMOVUPD %YMM8,(%R11) |
(170) 0x428fb5 TEST $0x3,%DL |
(170) 0x428fb8 JE 42920f |
(170) 0x428fbe AND $-0x4,%EDX |
(170) 0x428fc1 ADD %EDX,%R15D |
(170) 0x428fc4 ADD %EDX,%ESI |
(170) 0x428fc6 MOV 0x90(%RSP),%R11 |
(170) 0x428fce MOVSXD %ESI,%RAX |
(170) 0x428fd1 MOV 0xe8(%RSP),%R9 |
(170) 0x428fd9 MOV 0x88(%RSP),%RBX |
(170) 0x428fe1 MOV 0xb0(%RSP),%RCX |
(170) 0x428fe9 LEA (%R11,%RAX,1),%R8 |
(170) 0x428fed MOV 0xa8(%RSP),%R10 |
(170) 0x428ff5 VMOVSD (%R9,%R8,8),%XMM5 |
(170) 0x428ffb LEA (%RBX,%RAX,1),%RDX |
(170) 0x428fff MOV 0xb8(%RSP),%R9 |
(170) 0x429007 LEA (%RCX,%RDX,8),%RCX |
(170) 0x42900b LEA (%R10,%RAX,1),%R13 |
(170) 0x42900f MOV 0xf0(%RSP),%R8 |
(170) 0x429017 VMULSD (%RCX),%XMM5,%XMM9 |
(170) 0x42901b ADD %RAX,%R9 |
(170) 0x42901e VSUBSD (%RDI,%R13,8),%XMM9,%XMM10 |
(170) 0x429024 MOV 0x98(%RSP),%R13 |
(170) 0x42902c LEA (%R13,%RAX,1),%RDX |
(170) 0x429031 VADDSD (%RDI,%RDX,8),%XMM10,%XMM11 |
(170) 0x429036 LEA (%R8,%R9,8),%RDX |
(170) 0x42903a MOV 0xc0(%RSP),%R9 |
(170) 0x429042 MOV 0xf8(%RSP),%R8 |
(170) 0x42904a ADD %RAX,%R9 |
(170) 0x42904d VMOVSD (%R14,%R9,8),%XMM12 |
(170) 0x429053 MOV 0xd8(%RSP),%R9 |
(170) 0x42905b ADD %RAX,%R8 |
(170) 0x42905e VSUBSD (%R14,%R8,8),%XMM12,%XMM13 |
(170) 0x429064 LEA (%R9,%RAX,1),%R8 |
(170) 0x429068 MOV 0xe0(%RSP),%R9 |
(170) 0x429070 VADDSD (%R12,%R8,8),%XMM5,%XMM14 |
(170) 0x429076 ADD %R9,%RAX |
(170) 0x429079 VFMADD132SD (%RDX),%XMM13,%XMM9 |
(170) 0x42907e VSUBSD (%R12,%RAX,8),%XMM14,%XMM15 |
(170) 0x429084 LEA 0x1(%RSI),%EAX |
(170) 0x429087 VDIVSD %XMM15,%XMM11,%XMM0 |
(170) 0x42908c VDIVSD %XMM11,%XMM9,%XMM1 |
(170) 0x429091 VMOVSD %XMM0,(%RCX) |
(170) 0x429095 MOV 0xd0(%RSP),%ECX |
(170) 0x42909c VMOVSD %XMM1,(%RDX) |
(170) 0x4290a0 LEA 0x1(%R15),%EDX |
(170) 0x4290a4 CMP %ECX,%EDX |
(170) 0x4290a6 JAE 42920f |
(170) 0x4290ac CLTQ |
(170) 0x4290ae MOV 0xb0(%RSP),%R9 |
(170) 0x4290b6 ADD $0x2,%ESI |
(170) 0x4290b9 LEA (%RBX,%RAX,1),%R8 |
(170) 0x4290bd LEA (%R11,%RAX,1),%RDX |
(170) 0x4290c1 LEA (%R9,%R8,8),%RCX |
(170) 0x4290c5 MOV 0xe8(%RSP),%R8 |
(170) 0x4290cd LEA (%R10,%RAX,1),%R9 |
(170) 0x4290d1 VMOVSD (%R8,%RDX,8),%XMM4 |
(170) 0x4290d7 MOV 0xf0(%RSP),%R8 |
(170) 0x4290df LEA (%R13,%RAX,1),%RDX |
(170) 0x4290e4 VMULSD (%RCX),%XMM4,%XMM6 |
(170) 0x4290e8 VSUBSD (%RDI,%R9,8),%XMM6,%XMM2 |
(170) 0x4290ee MOV 0xb8(%RSP),%R9 |
(170) 0x4290f6 ADD %RAX,%R9 |
(170) 0x4290f9 VADDSD (%RDI,%RDX,8),%XMM2,%XMM7 |
(170) 0x4290fe LEA (%R8,%R9,8),%RDX |
(170) 0x429102 MOV 0xc0(%RSP),%R9 |
(170) 0x42910a MOV 0xf8(%RSP),%R8 |
(170) 0x429112 ADD %RAX,%R9 |
(170) 0x429115 VMOVSD (%R14,%R9,8),%XMM3 |
(170) 0x42911b ADD %RAX,%R8 |
(170) 0x42911e MOV 0xd8(%RSP),%R9 |
(170) 0x429126 VSUBSD (%R14,%R8,8),%XMM3,%XMM8 |
(170) 0x42912c LEA (%R9,%RAX,1),%R8 |
(170) 0x429130 VADDSD (%R12,%R8,8),%XMM4,%XMM5 |
(170) 0x429136 MOV 0xe0(%RSP),%R8 |
(170) 0x42913e VFMADD132SD (%RDX),%XMM8,%XMM6 |
(170) 0x429143 ADD %R8,%RAX |
(170) 0x429146 VSUBSD (%R12,%RAX,8),%XMM5,%XMM9 |
(170) 0x42914c LEA 0x2(%R15),%EAX |
(170) 0x429150 MOV 0xd0(%RSP),%R15D |
(170) 0x429158 VDIVSD %XMM9,%XMM7,%XMM10 |
(170) 0x42915d VDIVSD %XMM7,%XMM6,%XMM11 |
(170) 0x429161 VMOVSD %XMM10,(%RCX) |
(170) 0x429165 VMOVSD %XMM11,(%RDX) |
(170) 0x429169 CMP %R15D,%EAX |
(170) 0x42916c JAE 42920f |
(170) 0x429172 MOVSXD %ESI,%RSI |
(170) 0x429175 MOV 0xe8(%RSP),%RDX |
(170) 0x42917d MOV %RBX,%RCX |
(170) 0x429180 MOV 0xb0(%RSP),%RBX |
(170) 0x429188 ADD %RSI,%R11 |
(170) 0x42918b ADD %RSI,%RCX |
(170) 0x42918e ADD %RSI,%R10 |
(170) 0x429191 ADD %RSI,%R13 |
(170) 0x429194 VMOVSD (%RDX,%R11,8),%XMM12 |
(170) 0x42919a LEA (%RBX,%RCX,8),%RAX |
(170) 0x42919e MOV 0xc0(%RSP),%RCX |
(170) 0x4291a6 ADD %RSI,%R9 |
(170) 0x4291a9 MOV 0xf8(%RSP),%R11 |
(170) 0x4291b1 MOV 0xf0(%RSP),%R15 |
(170) 0x4291b9 ADD %RSI,%R8 |
(170) 0x4291bc VMULSD (%RAX),%XMM12,%XMM13 |
(170) 0x4291c0 ADD %RSI,%RCX |
(170) 0x4291c3 VADDSD (%R12,%R9,8),%XMM12,%XMM4 |
(170) 0x4291c9 VMOVSD (%R14,%RCX,8),%XMM0 |
(170) 0x4291cf ADD %RSI,%R11 |
(170) 0x4291d2 VSUBSD (%R14,%R11,8),%XMM0,%XMM1 |
(170) 0x4291d8 VSUBSD (%R12,%R8,8),%XMM4,%XMM6 |
(170) 0x4291de VSUBSD (%RDI,%R10,8),%XMM13,%XMM14 |
(170) 0x4291e4 VADDSD (%RDI,%R13,8),%XMM14,%XMM15 |
(170) 0x4291ea MOV 0xb8(%RSP),%RDI |
(170) 0x4291f2 ADD %RSI,%RDI |
(170) 0x4291f5 LEA (%R15,%RDI,8),%RBX |
(170) 0x4291f9 VDIVSD %XMM6,%XMM15,%XMM2 |
(170) 0x4291fd VFMADD132SD (%RBX),%XMM1,%XMM13 |
(170) 0x429202 VDIVSD %XMM15,%XMM13,%XMM7 |
(170) 0x429207 VMOVSD %XMM2,(%RAX) |
(170) 0x42920b VMOVSD %XMM7,(%RBX) |
(170) 0x42920f MOV 0xd0(%RSP),%R15D |
(170) 0x429217 INCQ 0xc8(%RSP) |
(170) 0x42921f MOV 0xc8(%RSP),%R14 |
(170) 0x429227 ADD $0,%R14D |
(170) 0x42922b CMP %R14D,0x70(%RSP) |
(170) 0x429230 JLE 429250 |
(170) 0x429232 MOV 0x68(%RSP),%ECX |
(170) 0x429236 MOV 0x6c(%RSP),%R12D |
(170) 0x42923b MOV 0x74(%RSP),%EAX |
(170) 0x42923f MOV %R12D,0xd4(%RSP) |
(170) 0x429247 SUB %R15D,%ECX |
(170) 0x42924a JMP 428ba8 |
0x42924f NOP |
0x429250 VZEROUPPER |
0x429253 LEA -0x28(%RBP),%RSP |
0x429257 POP %RBX |
0x429258 POP %R12 |
0x42925a POP %R13 |
0x42925c POP %R14 |
0x42925e POP %R15 |
0x429260 POP %RBP |
0x429261 RET |
0x429262 NOPW (%RAX,%RAX,1) |
(170) 0x429268 MOV 0xd4(%RSP),%ESI |
(170) 0x42926f XOR %ECX,%ECX |
(170) 0x429271 JMP 428eb6 |
0x429276 INC %ECX |
0x429278 XOR %EDX,%EDX |
0x42927a JMP 428b25 |
0x42927f NOP |
Path / |
Source file and lines | advec_cell.cpp:208-216 |
Module | exec |
nb instructions | 86 |
nb uops | 96 |
loop length | 299 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 13 |
micro-operation queue | 16.00 cycles |
front end | 16.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 6.10 | 8.00 | 6.67 | 6.67 | 10.00 | 6.07 | 5.90 | 10.00 | 10.00 | 10.00 | 5.93 | 6.67 |
cycles | 6.10 | 11.93 | 6.67 | 6.67 | 10.00 | 6.07 | 5.90 | 10.00 | 10.00 | 10.00 | 5.93 | 6.67 |
Cycles executing div or sqrt instructions | 12.00 |
FE+BE cycles | 15.23-15.34 |
Stall cycles | 0.00 |
Front-end | 16.00 |
Dispatch | 11.93 |
DIV/SQRT | 12.00 |
Overall L1 | 16.00 |
all | 3% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 14% |
all | 9% |
load | 10% |
store | 9% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 8% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RDI,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x100,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x38(%RDI),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x3c(%RDI),%EDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RDI),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x34(%RBX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x2,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x1(%RAX),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
INC %EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,0x6c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %EDX,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 429253 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.7+0x7b3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %EDX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x2(%RSI),%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB %R15D,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R14D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 429253 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.7+0x7b3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R14D,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %EDI,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ECX,0x74(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 404650 <omp_get_num_threads@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 404540 <omp_get_thread_num@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EAX,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x74(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %R13D,%EAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
DIV %R12D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
MOV %EAX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 429276 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.7+0x7d6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %ECX,%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%R8,%RDX,1),%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (%RCX,%R11,1),%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R9D,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %R9D,%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 429253 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.7+0x7b3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R11D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x6c(%RSP),%R10D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
DIVL 0x74(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 6 |
MOV 0x20(%RBX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RBX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RAX,%R15,1),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R14D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x10(%RBX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RBX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %EDX,%R10D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOVSXD %R15D,%R8 | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV %R11D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R10D,0xd4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %R10D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R14,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 428b25 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.7+0x85> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | advec_cell.cpp:208-216 |
Module | exec |
nb instructions | 86 |
nb uops | 96 |
loop length | 299 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 13 |
micro-operation queue | 16.00 cycles |
front end | 16.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 6.10 | 8.00 | 6.67 | 6.67 | 10.00 | 6.07 | 5.90 | 10.00 | 10.00 | 10.00 | 5.93 | 6.67 |
cycles | 6.10 | 11.93 | 6.67 | 6.67 | 10.00 | 6.07 | 5.90 | 10.00 | 10.00 | 10.00 | 5.93 | 6.67 |
Cycles executing div or sqrt instructions | 12.00 |
FE+BE cycles | 15.23-15.34 |
Stall cycles | 0.00 |
Front-end | 16.00 |
Dispatch | 11.93 |
DIV/SQRT | 12.00 |
Overall L1 | 16.00 |
all | 3% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 14% |
all | 9% |
load | 10% |
store | 9% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 8% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RDI,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x100,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x38(%RDI),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x3c(%RDI),%EDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RDI),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x34(%RBX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x2,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x1(%RAX),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
INC %EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,0x6c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %EDX,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 429253 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.7+0x7b3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %EDX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x2(%RSI),%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB %R15D,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R14D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 429253 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.7+0x7b3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R14D,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %EDI,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ECX,0x74(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 404650 <omp_get_num_threads@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 404540 <omp_get_thread_num@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EAX,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x74(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %R13D,%EAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
DIV %R12D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
MOV %EAX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 429276 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.7+0x7d6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %ECX,%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%R8,%RDX,1),%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (%RCX,%R11,1),%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R9D,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %R9D,%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 429253 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.7+0x7b3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R11D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x6c(%RSP),%R10D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
DIVL 0x74(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 6 |
MOV 0x20(%RBX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RBX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RAX,%R15,1),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R14D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x10(%RBX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RBX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %EDX,%R10D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOVSXD %R15D,%R8 | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV %R11D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R10D,0xd4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %R10D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R14,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 428b25 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.7+0x85> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.7– | 2.8 | 0.94 |
▼Loop 170 - advec_cell.cpp:210-216 - exec– | 0.01 | 0.01 |
○Loop 171 - advec_cell.cpp:211-216 - exec | 2.8 | 0.93 |