Function: _Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_ ... | Module: exec | Source: calc_dt.cpp:49-75 [...] | Coverage: 3.44% |
---|
Function: _Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_ ... | Module: exec | Source: calc_dt.cpp:49-75 [...] | Coverage: 3.44% |
---|
/home/eoseret/qaas_runs_CPU_9468/171-112-9712/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/context.h: 46 - 69 |
-------------------------------------------------------------------------------- |
46: T &operator[](size_t i) const { return data[i]; } |
[...] |
69: T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; } |
/home/eoseret/qaas_runs_CPU_9468/171-112-9712/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/calc_dt.cpp: 49 - 75 |
-------------------------------------------------------------------------------- |
49: #pragma omp parallel for simd collapse(2) reduction(min : dt_min_val0) |
50: for (int j = (y_min + 1); j < (y_max + 2); j++) { |
51: for (int i = (x_min + 1); i < (x_max + 2); i++) { |
52: double dsx = celldx[i]; |
53: double dsy = celldy[j]; |
54: double cc = soundspeed(i, j) * soundspeed(i, j); |
55: cc = cc + 2.0 * viscosity_a(i, j) / density0(i, j); |
56: cc = std::fmax(std::sqrt(cc), g_small); |
57: double dtct = dtc_safe * std::fmin(dsx, dsy) / cc; |
58: double div = 0.0; |
59: double dv1 = (xvel0(i, j) + xvel0(i + 0, j + 1)) * xarea(i, j); |
60: double dv2 = (xvel0(i + 1, j + 0) + xvel0(i + 1, j + 1)) * xarea(i + 1, j + 0); |
61: div = div + dv2 - dv1; |
62: double dtut = dtu_safe * 2.0 * volume(i, j) / std::fmax(std::fmax(std::fabs(dv1), std::fabs(dv2)), g_small * volume(i, j)); |
63: dv1 = (yvel0(i, j) + yvel0(i + 1, j + 0)) * yarea(i, j); |
64: dv2 = (yvel0(i + 0, j + 1) + yvel0(i + 1, j + 1)) * yarea(i + 0, j + 1); |
65: div = div + dv2 - dv1; |
66: double dtvt = dtv_safe * 2.0 * volume(i, j) / std::fmax(std::fmax(std::fabs(dv1), std::fabs(dv2)), g_small * volume(i, j)); |
67: div = div / (2.0 * volume(i, j)); |
68: double dtdivt; |
69: if (div < -g_small) { |
70: dtdivt = dtdiv_safe * (-1.0 / div); |
71: } else { |
72: dtdivt = g_big; |
73: } |
74: double mins = std::fmin(dtct, std::fmin(dtut, std::fmin(dtvt, std::fmin(dtdivt, g_big)))); |
75: dt_min_val0 = std::fmin(mins, dt_min_val0); |
0x4303c0 PUSH %RBP |
0x4303c1 MOV %RSP,%RBP |
0x4303c4 PUSH %R15 |
0x4303c6 PUSH %R14 |
0x4303c8 PUSH %R13 |
0x4303ca PUSH %R12 |
0x4303cc PUSH %RBX |
0x4303cd AND $-0x40,%RSP |
0x4303d1 SUB $0x340,%RSP |
0x4303d8 MOV 0x80(%RBP),%RAX |
0x4303df MOVL $0,0x64(%RSP) |
0x4303e7 TEST %RAX,%RAX |
0x4303ea JS 430b84 |
0x4303f0 MOV %R9,%R13 |
0x4303f3 MOV %R8,%R15 |
0x4303f6 MOV %RCX,%R14 |
0x4303f9 MOV %RDX,%RBX |
0x4303fc MOV %RDI,0xc8(%RSP) |
0x430404 MOV (%RDI),%ESI |
0x430406 MOVQ $0,0xb8(%RSP) |
0x430412 MOV %RAX,0xb0(%RSP) |
0x43041a MOVQ $0x1,0xf8(%RSP) |
0x430426 SUB $0x8,%RSP |
0x43042a LEA 0x100(%RSP),%RAX |
0x430432 LEA 0x6c(%RSP),%RCX |
0x430437 LEA 0xc0(%RSP),%R8 |
0x43043f LEA 0xb8(%RSP),%R9 |
0x430447 MOV $0x48fe90,%EDI |
0x43044c MOV %ESI,0x68(%RSP) |
0x430450 MOV $0x22,%EDX |
0x430455 PUSH $0x1 |
0x430457 PUSH $0x1 |
0x430459 PUSH %RAX |
0x43045a CALL 4031f0 <__kmpc_for_static_init_8@plt> |
0x43045f ADD $0x20,%RSP |
0x430463 MOV 0xb8(%RSP),%RSI |
0x43046b MOV 0xb0(%RSP),%R9 |
0x430473 CMP %R9,%RSI |
0x430476 JBE 4304c0 |
0x430478 VMOVSD 0x45240(%RIP),%XMM0 |
0x430480 JMP 430afe |
0x430485 NOPW %CS:(%RAX,%RAX,1) |
0x430494 NOPW %CS:(%RAX,%RAX,1) |
0x4304a3 NOPW %CS:(%RAX,%RAX,1) |
0x4304b2 NOPW %CS:(%RAX,%RAX,1) |
0x4304c0 MOV 0x70(%RBP),%R12 |
0x4304c4 MOV 0x68(%RBP),%RDX |
0x4304c8 MOV 0x50(%RBP),%RAX |
0x4304cc MOV 0x48(%RBP),%RCX |
0x4304d0 MOV 0x40(%RBP),%R8 |
0x4304d4 MOV 0x38(%RBP),%RDI |
0x4304d8 MOV 0x28(%RBP),%R10 |
0x4304dc MOV 0x20(%RBP),%R11 |
0x4304e0 VMOVQ %R13,%XMM0 |
0x4304e5 VMOVQ %R15,%XMM1 |
0x4304ea VMOVQ %R14,%XMM2 |
0x4304ef VMOVQ %RBX,%XMM11 |
0x4304f4 SUB %EDX,%R12D |
0x4304f7 MOV 0x8(%R11),%RDX |
0x4304fb MOV %RDX,0xa0(%RSP) |
0x430503 MOV 0x8(%R10),%RDX |
0x430507 MOV %RDX,0x98(%RSP) |
0x43050f MOV (%RCX),%RDX |
0x430512 MOV %RDX,0x38(%RSP) |
0x430517 MOV 0x10(%RCX),%RCX |
0x43051b MOV %RCX,0x90(%RSP) |
0x430523 MOV (%R8),%RCX |
0x430526 MOV %RCX,0x78(%RSP) |
0x43052b MOV 0x10(%R8),%RCX |
0x43052f MOV %RCX,0x58(%RSP) |
0x430534 MOV (%RDI),%RCX |
0x430537 MOV %RCX,0x48(%RSP) |
0x43053c MOV 0x10(%RDI),%RCX |
0x430540 MOV %RCX,0x50(%RSP) |
0x430545 LEA 0x1(%RSI),%RCX |
0x430549 LEA 0x1(%R9),%RDX |
0x43054d CMP %RDX,%RCX |
0x430550 CMOVG %RCX,%RDX |
0x430554 MOV (%RAX),%RCX |
0x430557 MOV 0x10(%RAX),%R15 |
0x43055b MOV 0x10(%RBP),%RAX |
0x43055f MOV (%RAX),%R8 |
0x430562 MOV 0x10(%RAX),%RAX |
0x430566 MOV %RAX,0x80(%RSP) |
0x43056e VADDSD %XMM2,%XMM2,%XMM12 |
0x430572 MOV 0x30(%RBP),%RAX |
0x430576 MOV (%RAX),%R11 |
0x430579 MOV 0x10(%RAX),%RAX |
0x43057d MOV %RAX,0x88(%RSP) |
0x430585 MOV 0x58(%RBP),%RAX |
0x430589 MOV (%RAX),%R10 |
0x43058c MOV 0x10(%RAX),%R14 |
0x430590 MOV 0x18(%RBP),%RAX |
0x430594 MOV (%RAX),%R13 |
0x430597 MOV 0x10(%RAX),%RDI |
0x43059b VADDSD %XMM1,%XMM1,%XMM13 |
0x43059f VPXORQ 0x42f8f(%RIP){1to2},%XMM0,%XMM14 |
0x4305a9 SUB %RSI,%RDX |
0x4305ac MOV 0x60(%RBP),%EAX |
0x4305af MOV $-0x8,%EBX |
0x4305b4 MOV %RDX,0xc0(%RSP) |
0x4305bc AND %RDX,%RBX |
0x4305bf MOV %R9,0x68(%RSP) |
0x4305c4 MOV %RCX,0x40(%RSP) |
0x4305c9 MOV %R8,0xf0(%RSP) |
0x4305d1 MOV %R11,0xe8(%RSP) |
0x4305d9 MOV %R10,0xe0(%RSP) |
0x4305e1 MOV %R13,0xd8(%RSP) |
0x4305e9 MOV %RDI,0xd0(%RSP) |
0x4305f1 MOV %R12,0x70(%RSP) |
0x4305f6 JE 430bc0 |
0x4305fc VPBROADCASTQ %R12,%ZMM16 |
0x430602 VPBROADCASTD %EAX,%YMM0 |
0x430608 VMOVDQU %YMM0,0x160(%RSP) |
0x430611 MOV 0x68(%RBP),%RAX |
0x430615 VPBROADCASTD %EAX,%YMM0 |
0x43061b VMOVDQU %YMM0,0x140(%RSP) |
0x430624 MOV 0x38(%RSP),%RAX |
0x430629 VPBROADCASTQ %RAX,%ZMM0 |
0x43062f VMOVDQU64 %ZMM0,0x2c0(%RSP) |
0x430637 MOV 0x78(%RSP),%RAX |
0x43063c VPBROADCASTQ %RAX,%ZMM0 |
0x430642 VMOVDQU64 %ZMM0,0x280(%RSP) |
0x43064a MOV 0x48(%RSP),%RAX |
0x43064f VPBROADCASTQ %RAX,%ZMM0 |
0x430655 VMOVDQU64 %ZMM0,0x240(%RSP) |
0x43065d VMOVDQU %XMM11,0x130(%RSP) |
0x430666 VPBROADCASTQ %XMM11,%ZMM0 |
0x43066c VMOVDQU64 %ZMM0,0x200(%RSP) |
0x430674 VPBROADCASTQ %RCX,%ZMM28 |
0x43067a VPBROADCASTQ %R8,%ZMM0 |
0x430680 VMOVDQU64 %ZMM0,0x1c0(%RSP) |
0x430688 VPBROADCASTQ %R11,%ZMM0 |
0x43068e VMOVDQU64 %ZMM0,0x180(%RSP) |
0x430696 VMOVUPD %XMM12,0x120(%RSP) |
0x43069f VBROADCASTSD %XMM12,%ZMM31 |
0x4306a5 VPBROADCASTQ %R10,%ZMM21 |
0x4306ab VPBROADCASTQ %R13,%ZMM18 |
0x4306b1 VMOVUPD %XMM13,0x110(%RSP) |
0x4306ba VBROADCASTSD %XMM13,%ZMM19 |
0x4306c0 VMOVDQU %XMM14,0x100(%RSP) |
0x4306c9 VPBROADCASTQ %XMM14,%ZMM20 |
0x4306cf VPBROADCASTQ %RSI,%ZMM0 |
0x4306d5 VPADDQ 0x45061(%RIP),%ZMM0,%ZMM17 |
0x4306df VBROADCASTSD 0x44fd7(%RIP),%ZMM22 |
0x4306e9 XOR %R13D,%R13D |
0x4306ec VBROADCASTSD 0x40caa(%RIP),%ZMM23 |
0x4306f6 VBROADCASTSD 0x41400(%RIP),%ZMM24 |
0x430700 VBROADCASTSD 0x44fae(%RIP),%ZMM25 |
0x43070a MOV 0x80(%RSP),%R12 |
0x430712 NOPW %CS:(%RAX,%RAX,1) |
(204) 0x430720 VMOVDQA64 %ZMM17,%ZMM0 |
(204) 0x430726 VMOVDQA64 %ZMM16,%ZMM1 |
(204) 0x43072c MOV $0x4603a0,%RAX |
(204) 0x430733 CALL %RAX |
(204) 0x430735 VPMOVQD %ZMM0,%YMM0 |
(204) 0x43073b VPADDD 0x160(%RSP),%YMM0,%YMM26 |
(204) 0x430743 VMOVDQA64 %ZMM17,%ZMM0 |
(204) 0x430749 VMOVDQA64 %ZMM16,%ZMM1 |
(204) 0x43074f CALL 460220 <__svml_i64rem8_z0> |
(204) 0x430755 VPMOVQD %ZMM0,%YMM0 |
(204) 0x43075b VPMOVSXDQ %YMM26,%ZMM2 |
(204) 0x430761 VPADDD 0x140(%RSP),%YMM0,%YMM0 |
(204) 0x43076a KXNORW %K0,%K0,%K1 |
(204) 0x43076e VPXOR %XMM1,%XMM1,%XMM1 |
(204) 0x430772 VMOVDQU64 0x280(%RSP),%ZMM3 |
(204) 0x43077a VPXOR %XMM5,%XMM5,%XMM5 |
(204) 0x43077e VPMULLQ %ZMM2,%ZMM3,%ZMM5 |
(204) 0x430784 VPMOVSXDQ %YMM0,%ZMM3 |
(204) 0x43078a VMOVDQU64 0x240(%RSP),%ZMM4 |
(204) 0x430792 VPXOR %XMM6,%XMM6,%XMM6 |
(204) 0x430796 VPMULLQ %ZMM2,%ZMM4,%ZMM6 |
(204) 0x43079c VMOVDQU64 0x2c0(%RSP),%ZMM4 |
(204) 0x4307a4 VPMULLQ %ZMM2,%ZMM4,%ZMM7 |
(204) 0x4307aa KXNORW %K0,%K0,%K2 |
(204) 0x4307ae VPXOR %XMM4,%XMM4,%XMM4 |
(204) 0x4307b2 VPXOR %XMM9,%XMM9,%XMM9 |
(204) 0x4307b7 VPMULLQ %ZMM2,%ZMM28,%ZMM9 |
(204) 0x4307bd VPADDQ %ZMM3,%ZMM5,%ZMM5 |
(204) 0x4307c3 VPADDQ %ZMM3,%ZMM6,%ZMM10 |
(204) 0x4307c9 MOV 0x58(%RSP),%RAX |
(204) 0x4307ce VGATHERQPD (%RAX,%ZMM5,8),%ZMM4{%K2} |
(204) 0x4307d5 VPCMPEQD %YMM15,%YMM15,%YMM15 |
(204) 0x4307da VPSUBD %YMM15,%YMM26,%YMM5 |
(204) 0x4307e0 VPMOVSXDQ %YMM5,%ZMM8 |
(204) 0x4307e6 VPMULLQ %ZMM8,%ZMM28,%ZMM11 |
(204) 0x4307ec VPADDQ %ZMM3,%ZMM7,%ZMM12 |
(204) 0x4307f2 KXNORW %K0,%K0,%K2 |
(204) 0x4307f6 VPXOR %XMM5,%XMM5,%XMM5 |
(204) 0x4307fa VMOVDQU64 0x1c0(%RSP),%ZMM6 |
(204) 0x430802 VPMULLQ %ZMM2,%ZMM6,%ZMM13 |
(204) 0x430808 VPADDQ %ZMM3,%ZMM9,%ZMM14 |
(204) 0x43080e KXNORW %K0,%K0,%K3 |
(204) 0x430812 VPXOR %XMM7,%XMM7,%XMM7 |
(204) 0x430816 KXNORW %K0,%K0,%K4 |
(204) 0x43081a VPXOR %XMM6,%XMM6,%XMM6 |
(204) 0x43081e VPSUBD %YMM15,%YMM0,%YMM15 |
(204) 0x430823 VPADDQ %ZMM3,%ZMM13,%ZMM27 |
(204) 0x430829 VPMOVSXDQ %YMM15,%ZMM15 |
(204) 0x43082f KXNORW %K0,%K0,%K5 |
(204) 0x430833 VPMULLQ %ZMM2,%ZMM21,%ZMM29 |
(204) 0x430839 VPADDQ %ZMM15,%ZMM9,%ZMM9 |
(204) 0x43083f VXORPD %XMM30,%XMM30,%XMM30 |
(204) 0x430845 MOV 0x90(%RSP),%RAX |
(204) 0x43084d VGATHERQPD (%RAX,%ZMM12,8),%ZMM1{%K1} |
(204) 0x430854 VPADDQ %ZMM15,%ZMM13,%ZMM12 |
(204) 0x43085a MOV 0x50(%RSP),%RAX |
(204) 0x43085f VGATHERQPD (%RAX,%ZMM10,8),%ZMM5{%K2} |
(204) 0x430866 KXNORW %K0,%K0,%K1 |
(204) 0x43086a VGATHERQPD (%R15,%ZMM14,8),%ZMM7{%K3} |
(204) 0x430871 VXORPD %XMM10,%XMM10,%XMM10 |
(204) 0x430876 VGATHERQPD (%R12,%ZMM27,8),%ZMM6{%K4} |
(204) 0x43087d VPADDQ %ZMM3,%ZMM29,%ZMM13 |
(204) 0x430883 VGATHERQPD (%R15,%ZMM9,8),%ZMM30{%K5} |
(204) 0x43088a KXNORW %K0,%K0,%K2 |
(204) 0x43088e VGATHERQPD (%R12,%ZMM12,8),%ZMM10{%K1} |
(204) 0x430895 VXORPD %XMM9,%XMM9,%XMM9 |
(204) 0x43089a VGATHERQPD (%R14,%ZMM13,8),%ZMM9{%K2} |
(204) 0x4308a1 KXNORW %K0,%K0,%K1 |
(204) 0x4308a5 VXORPD %XMM12,%XMM12,%XMM12 |
(204) 0x4308aa VPADDQ %ZMM15,%ZMM29,%ZMM13 |
(204) 0x4308b0 KXNORW %K0,%K0,%K2 |
(204) 0x4308b4 VPADDQ %ZMM3,%ZMM11,%ZMM14 |
(204) 0x4308ba VXORPD %XMM27,%XMM27,%XMM27 |
(204) 0x4308c0 VGATHERQPD (%R14,%ZMM13,8),%ZMM27{%K2} |
(204) 0x4308c7 VPXOR %XMM13,%XMM13,%XMM13 |
(204) 0x4308cc VPMULLQ %ZMM2,%ZMM18,%ZMM13 |
(204) 0x4308d2 VPADDQ %ZMM3,%ZMM13,%ZMM13 |
(204) 0x4308d8 KXNORW %K0,%K0,%K2 |
(204) 0x4308dc VPADDQ %ZMM15,%ZMM11,%ZMM11 |
(204) 0x4308e2 VPXORD %XMM29,%XMM29,%XMM29 |
(204) 0x4308e8 VGATHERQPD (%RDI,%ZMM13,8),%ZMM29{%K2} |
(204) 0x4308ef KXNORW %K0,%K0,%K2 |
(204) 0x4308f3 VGATHERQPD (%R15,%ZMM14,8),%ZMM12{%K1} |
(204) 0x4308fa VXORPD %XMM13,%XMM13,%XMM13 |
(204) 0x4308ff VPXOR %XMM14,%XMM14,%XMM14 |
(204) 0x430904 VPMULLQ %ZMM8,%ZMM21,%ZMM14 |
(204) 0x43090a VPADDQ %ZMM15,%ZMM14,%ZMM15 |
(204) 0x430910 VPADDQ %ZMM3,%ZMM14,%ZMM14 |
(204) 0x430916 KXNORW %K0,%K0,%K1 |
(204) 0x43091a VGATHERQPD (%R15,%ZMM11,8),%ZMM13{%K2} |
(204) 0x430921 VXORPD %XMM11,%XMM11,%XMM11 |
(204) 0x430926 VGATHERQPD (%R14,%ZMM14,8),%ZMM11{%K1} |
(204) 0x43092d KXNORW %K0,%K0,%K1 |
(204) 0x430931 VXORPD %XMM14,%XMM14,%XMM14 |
(204) 0x430936 VPMULLQ %ZMM8,%ZMM18,%ZMM8 |
(204) 0x43093c VPADDQ %ZMM3,%ZMM8,%ZMM8 |
(204) 0x430942 KXNORW %K0,%K0,%K2 |
(204) 0x430946 VGATHERQPD (%R14,%ZMM15,8),%ZMM14{%K1} |
(204) 0x43094d VXORPD %XMM15,%XMM15,%XMM15 |
(204) 0x430952 VGATHERQPD (%RDI,%ZMM8,8),%ZMM15{%K2} |
(204) 0x430959 VMOVDQU64 0x180(%RSP),%ZMM8 |
(204) 0x430961 VPMULLQ %ZMM2,%ZMM8,%ZMM2 |
(204) 0x430967 KXNORW %K0,%K0,%K1 |
(204) 0x43096b VPADDQ %ZMM3,%ZMM2,%ZMM2 |
(204) 0x430971 VPXOR %XMM3,%XMM3,%XMM3 |
(204) 0x430975 MOV 0x88(%RSP),%RAX |
(204) 0x43097d VGATHERQPD (%RAX,%ZMM2,8),%ZMM3{%K1} |
(204) 0x430984 VADDPD %ZMM4,%ZMM4,%ZMM2 |
(204) 0x43098a VDIVPD %ZMM5,%ZMM2,%ZMM2 |
(204) 0x430990 KXNORW %K0,%K0,%K1 |
(204) 0x430994 VADDPD %ZMM7,%ZMM12,%ZMM4 |
(204) 0x43099a KXNORW %K0,%K0,%K2 |
(204) 0x43099e VXORPD %XMM5,%XMM5,%XMM5 |
(204) 0x4309a2 MOV 0x98(%RSP),%RAX |
(204) 0x4309aa VGATHERDPD (%RAX,%YMM26,8),%ZMM5{%K2} |
(204) 0x4309b1 VXORPD %XMM7,%XMM7,%XMM7 |
(204) 0x4309b5 MOV 0xa0(%RSP),%RAX |
(204) 0x4309bd VGATHERDPD (%RAX,%YMM0,8),%ZMM7{%K1} |
(204) 0x4309c4 VMULPD %ZMM4,%ZMM6,%ZMM0 |
(204) 0x4309ca VADDPD %ZMM30,%ZMM13,%ZMM4 |
(204) 0x4309d0 VMULPD %ZMM10,%ZMM4,%ZMM4 |
(204) 0x4309d6 VMULPD %ZMM3,%ZMM31,%ZMM6 |
(204) 0x4309dc VANDPD %ZMM24,%ZMM0,%ZMM8 |
(204) 0x4309e2 VANDPD %ZMM24,%ZMM4,%ZMM10 |
(204) 0x4309e8 VMAXPD %ZMM10,%ZMM8,%ZMM8 |
(204) 0x4309ee VMULPD %ZMM23,%ZMM3,%ZMM10 |
(204) 0x4309f4 VMAXPD %ZMM10,%ZMM8,%ZMM8 |
(204) 0x4309fa VDIVPD %ZMM8,%ZMM6,%ZMM6 |
(204) 0x430a00 VADDPD %ZMM9,%ZMM27,%ZMM8 |
(204) 0x430a06 VMULPD %ZMM8,%ZMM29,%ZMM8 |
(204) 0x430a0c VADDPD %ZMM11,%ZMM14,%ZMM9 |
(204) 0x430a12 VMULPD %ZMM15,%ZMM9,%ZMM9 |
(204) 0x430a18 VFMADD231PD %ZMM1,%ZMM1,%ZMM2 |
(204) 0x430a1e VADDPD %ZMM8,%ZMM0,%ZMM0 |
(204) 0x430a24 VADDPD %ZMM4,%ZMM9,%ZMM1 |
(204) 0x430a2a VSUBPD %ZMM0,%ZMM1,%ZMM0 |
(204) 0x430a30 VANDPD %ZMM24,%ZMM8,%ZMM1 |
(204) 0x430a36 VMAXPD %ZMM10,%ZMM1,%ZMM1 |
(204) 0x430a3c VANDPD %ZMM24,%ZMM9,%ZMM4 |
(204) 0x430a42 VMAXPD %ZMM4,%ZMM1,%ZMM1 |
(204) 0x430a48 VMULPD %ZMM3,%ZMM19,%ZMM4 |
(204) 0x430a4e VDIVPD %ZMM1,%ZMM4,%ZMM1 |
(204) 0x430a54 VADDPD %ZMM3,%ZMM3,%ZMM3 |
(204) 0x430a5a VDIVPD %ZMM3,%ZMM0,%ZMM0 |
(204) 0x430a60 VSQRTPD %ZMM2,%ZMM2 |
(204) 0x430a66 VMINPD %ZMM5,%ZMM7,%ZMM3 |
(204) 0x430a6c VMULPD 0x200(%RSP),%ZMM3,%ZMM3 |
(204) 0x430a74 VMAXPD %ZMM23,%ZMM2,%ZMM2 |
(204) 0x430a7a VDIVPD %ZMM2,%ZMM3,%ZMM2 |
(204) 0x430a80 VCMPPD $0x1,0x44c3d(%RIP){1to0},%ZMM0,%K1 |
(204) 0x430a8b VMOVAPD %ZMM25,%ZMM3 |
(204) 0x430a91 VDIVPD %ZMM0,%ZMM20,%ZMM3{%K1} |
(204) 0x430a97 VMINPD %ZMM25,%ZMM1,%ZMM0 |
(204) 0x430a9d VMINPD %ZMM0,%ZMM6,%ZMM0 |
(204) 0x430aa3 VMINPD %ZMM3,%ZMM0,%ZMM0 |
(204) 0x430aa9 VMINPD %ZMM22,%ZMM0,%ZMM0 |
(204) 0x430aaf VMINPD %ZMM0,%ZMM2,%ZMM22 |
(204) 0x430ab5 VPADDQ 0x41a59(%RIP){1to8},%ZMM17,%ZMM17 |
(204) 0x430abf ADD $0x8,%R13 |
(204) 0x430ac3 CMP %RBX,%R13 |
(204) 0x430ac6 JB 430720 |
0x430acc VEXTRACTF64X4 $0x1,%ZMM22,%YMM0 |
0x430ad3 VMINPD %ZMM0,%ZMM22,%ZMM0 |
0x430ad9 VMOVAPD %XMM0,%XMM1 |
0x430add VEXTRACTF128 $0x1,%YMM0,%XMM0 |
0x430ae3 VMINPD %XMM0,%XMM1,%XMM0 |
0x430ae7 VSHUFPD $0x1,%XMM0,%XMM0,%XMM1 |
0x430aec VMINSD %XMM1,%XMM0,%XMM0 |
0x430af0 CMP %RBX,0xc0(%RSP) |
0x430af8 JNE 430c00 |
0x430afe VMOVSD %XMM0,0xa8(%RSP) |
0x430b07 MOV $0x48feb0,%EDI |
0x430b0c MOV 0x60(%RSP),%ESI |
0x430b10 VZEROUPPER |
0x430b13 CALL 403050 <__kmpc_for_static_fini@plt> |
0x430b18 MOV 0xc8(%RSP),%RBX |
0x430b20 MOV (%RBX),%ESI |
0x430b22 SUB $0x8,%RSP |
0x430b26 MOV $0x494820,%RAX |
0x430b2d LEA 0xb0(%RSP),%R8 |
0x430b35 MOV $0x48fed0,%EDI |
0x430b3a MOV $0x4303b0,%R9D |
0x430b40 MOV $0x1,%EDX |
0x430b45 MOV $0x8,%ECX |
0x430b4a PUSH %RAX |
0x430b4b CALL 403400 <__kmpc_reduce@plt> |
0x430b50 ADD $0x10,%RSP |
0x430b54 CMP $0x1,%EAX |
0x430b57 JNE 430b84 |
0x430b59 MOV 0x88(%RBP),%RAX |
0x430b60 VMOVSD 0xa8(%RSP),%XMM0 |
0x430b69 VMINSD (%RAX),%XMM0,%XMM0 |
0x430b6d VMOVSD %XMM0,(%RAX) |
0x430b71 MOV (%RBX),%ESI |
0x430b73 MOV $0x494820,%RDX |
0x430b7a MOV $0x48fef0,%EDI |
0x430b7f CALL 403130 <__kmpc_end_reduce@plt> |
0x430b84 LEA -0x28(%RBP),%RSP |
0x430b88 POP %RBX |
0x430b89 POP %R12 |
0x430b8b POP %R13 |
0x430b8d POP %R14 |
0x430b8f POP %R15 |
0x430b91 POP %RBP |
0x430b92 RET |
0x430b93 NOPW %CS:(%RAX,%RAX,1) |
0x430ba2 NOPW %CS:(%RAX,%RAX,1) |
0x430bb1 NOPW %CS:(%RAX,%RAX,1) |
0x430bc0 VMOVSD 0x44af8(%RIP),%XMM0 |
0x430bc8 MOV %RCX,%R13 |
0x430bcb MOV 0x38(%RSP),%R12 |
0x430bd0 JMP 430ccd |
0x430bd5 NOPW %CS:(%RAX,%RAX,1) |
0x430be4 NOPW %CS:(%RAX,%RAX,1) |
0x430bf3 NOPW %CS:(%RAX,%RAX,1) |
0x430c00 ADD %RBX,%RSI |
0x430c03 MOV 0x38(%RSP),%R12 |
0x430c08 VMOVDQU 0x130(%RSP),%XMM11 |
0x430c11 MOV 0x40(%RSP),%R13 |
0x430c16 VMOVUPD 0x120(%RSP),%XMM12 |
0x430c1f VMOVUPD 0x110(%RSP),%XMM13 |
0x430c28 VMOVDQU 0x100(%RSP),%XMM14 |
0x430c31 JMP 430ccd |
0x430c36 NOPW %CS:(%RAX,%RAX,1) |
(203) 0x430c40 VDIVSD %XMM9,%XMM14,%XMM9 |
(203) 0x430c45 MOV 0x68(%RSP),%RAX |
(203) 0x430c4a MOV 0x40(%RSP),%R13 |
(203) 0x430c4f VFMADD213SD %XMM1,%XMM5,%XMM5 |
(203) 0x430c54 VSQRTSD %XMM5,%XMM5,%XMM1 |
(203) 0x430c58 VMOVSD 0x40740(%RIP),%XMM5 |
(203) 0x430c60 VMAXSD %XMM5,%XMM1,%XMM1 |
(203) 0x430c64 VMULSD %XMM4,%XMM11,%XMM4 |
(203) 0x430c68 VDIVSD %XMM1,%XMM4,%XMM1 |
(203) 0x430c6c VMULSD %XMM7,%XMM12,%XMM4 |
(203) 0x430c70 VMOVDDUP 0x40e88(%RIP),%XMM10 |
(203) 0x430c78 VANDPD %XMM2,%XMM10,%XMM2 |
(203) 0x430c7c VANDPD %XMM3,%XMM10,%XMM3 |
(203) 0x430c80 VMAXSD %XMM3,%XMM2,%XMM2 |
(203) 0x430c84 VMULSD %XMM5,%XMM7,%XMM3 |
(203) 0x430c88 VMAXSD %XMM3,%XMM2,%XMM2 |
(203) 0x430c8c VDIVSD %XMM2,%XMM4,%XMM2 |
(203) 0x430c90 VMULSD %XMM7,%XMM13,%XMM4 |
(203) 0x430c94 VANDPD %XMM6,%XMM10,%XMM5 |
(203) 0x430c98 VANDPD %XMM10,%XMM8,%XMM6 |
(203) 0x430c9d VMAXSD %XMM3,%XMM5,%XMM3 |
(203) 0x430ca1 VMAXSD %XMM6,%XMM3,%XMM3 |
(203) 0x430ca5 VMINSD 0x44a0b(%RIP),%XMM9,%XMM5 |
(203) 0x430cad VDIVSD %XMM3,%XMM4,%XMM3 |
(203) 0x430cb1 VMINSD %XMM5,%XMM3,%XMM3 |
(203) 0x430cb5 VMINSD %XMM3,%XMM2,%XMM2 |
(203) 0x430cb9 VMINSD %XMM0,%XMM2,%XMM0 |
(203) 0x430cbd VMINSD %XMM0,%XMM1,%XMM0 |
(203) 0x430cc1 INC %RSI |
(203) 0x430cc4 CMP %RAX,%RSI |
(203) 0x430cc7 JG 430afe |
(203) 0x430ccd MOV %RSI,%R11 |
(203) 0x430cd0 SHR $0x20,%R11 |
(203) 0x430cd4 JE 430d00 |
(203) 0x430cd6 MOV %RSI,%RAX |
(203) 0x430cd9 XOR %EDX,%EDX |
(203) 0x430cdb MOV 0x70(%RSP),%R8 |
(203) 0x430ce0 DIV %R8 |
(203) 0x430ce3 MOV %RAX,%RCX |
(203) 0x430ce6 MOV 0x60(%RBP),%EAX |
(203) 0x430ce9 ADD %EAX,%ECX |
(203) 0x430ceb TEST %R11,%R11 |
(203) 0x430cee JE 430d18 |
(203) 0x430cf0 MOV %RSI,%RAX |
(203) 0x430cf3 CQTO |
(203) 0x430cf5 IDIV %R8 |
(203) 0x430cf8 JMP 430d1f |
0x430cfa NOPW (%RAX,%RAX,1) |
(203) 0x430d00 MOV %ESI,%EAX |
(203) 0x430d02 XOR %EDX,%EDX |
(203) 0x430d04 MOV 0x70(%RSP),%R8 |
(203) 0x430d09 DIV %R8D |
(203) 0x430d0c MOV %EAX,%ECX |
(203) 0x430d0e MOV 0x60(%RBP),%EAX |
(203) 0x430d11 ADD %EAX,%ECX |
(203) 0x430d13 TEST %R11,%R11 |
(203) 0x430d16 JNE 430cf0 |
(203) 0x430d18 MOV %ESI,%EAX |
(203) 0x430d1a XOR %EDX,%EDX |
(203) 0x430d1c DIV %R8D |
(203) 0x430d1f MOV 0x58(%RSP),%R9 |
(203) 0x430d24 MOV 0x48(%RSP),%R10 |
(203) 0x430d29 MOV 0x50(%RSP),%R11 |
(203) 0x430d2e MOV 0x68(%RBP),%RAX |
(203) 0x430d32 ADD %EAX,%EDX |
(203) 0x430d34 MOVSXD %EDX,%RAX |
(203) 0x430d37 MOVSXD %ECX,%RCX |
(203) 0x430d3a MOV 0x78(%RSP),%RDX |
(203) 0x430d3f IMUL %RCX,%RDX |
(203) 0x430d43 ADD %RAX,%RDX |
(203) 0x430d46 VMOVSD (%R9,%RDX,8),%XMM1 |
(203) 0x430d4c VADDSD %XMM1,%XMM1,%XMM1 |
(203) 0x430d50 MOV %R10,%RDX |
(203) 0x430d53 IMUL %RCX,%RDX |
(203) 0x430d57 ADD %RAX,%RDX |
(203) 0x430d5a VDIVSD (%R11,%RDX,8),%XMM1,%XMM1 |
(203) 0x430d60 MOV %R13,%R11 |
(203) 0x430d63 IMUL %RCX,%R11 |
(203) 0x430d67 MOV %R13,%R9 |
(203) 0x430d6a LEA (%R11,%RAX,1),%R13 |
(203) 0x430d6e LEA 0x1(%RCX),%EDX |
(203) 0x430d71 MOVSXD %EDX,%RDX |
(203) 0x430d74 IMUL %RDX,%R9 |
(203) 0x430d78 LEA (%R9,%RAX,1),%R10 |
(203) 0x430d7c VMOVSD (%R15,%R10,8),%XMM2 |
(203) 0x430d82 VADDSD (%R15,%R13,8),%XMM2,%XMM2 |
(203) 0x430d88 MOV 0xf0(%RSP),%R10 |
(203) 0x430d90 IMUL %RCX,%R10 |
(203) 0x430d94 LEA (%R10,%RAX,1),%R13 |
(203) 0x430d98 MOV 0x80(%RSP),%RDI |
(203) 0x430da0 VMULSD (%RDI,%R13,8),%XMM2,%XMM2 |
(203) 0x430da6 MOV %R12,%R13 |
(203) 0x430da9 IMUL %RCX,%R13 |
(203) 0x430dad ADD %RAX,%R13 |
(203) 0x430db0 MOV 0x90(%RSP),%RBX |
(203) 0x430db8 VMOVSD (%RBX,%R13,8),%XMM5 |
(203) 0x430dbe LEA 0x1(%R9,%RAX,1),%R9 |
(203) 0x430dc3 VMOVSD (%R15,%R9,8),%XMM3 |
(203) 0x430dc9 MOV 0xa0(%RSP),%R9 |
(203) 0x430dd1 VMOVSD (%R9,%RAX,8),%XMM4 |
(203) 0x430dd7 MOV 0x98(%RSP),%R9 |
(203) 0x430ddf VMINSD (%R9,%RCX,8),%XMM4,%XMM4 |
(203) 0x430de5 LEA 0x1(%R11,%RAX,1),%R9 |
(203) 0x430dea VADDSD (%R15,%R9,8),%XMM3,%XMM3 |
(203) 0x430df0 LEA 0x1(%R10,%RAX,1),%R9 |
(203) 0x430df5 VMULSD (%RDI,%R9,8),%XMM3,%XMM3 |
(203) 0x430dfb MOV 0xe0(%RSP),%R11 |
(203) 0x430e03 MOV %R11,%R9 |
(203) 0x430e06 IMUL %RCX,%R9 |
(203) 0x430e0a LEA 0x1(%R9,%RAX,1),%R10 |
(203) 0x430e0f VMOVSD (%R14,%R10,8),%XMM6 |
(203) 0x430e15 MOV 0xe8(%RSP),%R10 |
(203) 0x430e1d ADD %RAX,%R9 |
(203) 0x430e20 VADDSD (%R14,%R9,8),%XMM6,%XMM6 |
(203) 0x430e26 IMUL %RCX,%R10 |
(203) 0x430e2a MOV 0xd8(%RSP),%RBX |
(203) 0x430e32 IMUL %RBX,%RCX |
(203) 0x430e36 ADD %RAX,%RCX |
(203) 0x430e39 MOV 0xd0(%RSP),%RDI |
(203) 0x430e41 VMULSD (%RDI,%RCX,8),%XMM6,%XMM6 |
(203) 0x430e46 MOV %R11,%RCX |
(203) 0x430e49 IMUL %RDX,%RCX |
(203) 0x430e4d LEA 0x1(%RCX,%RAX,1),%R9 |
(203) 0x430e52 VMOVSD (%R14,%R9,8),%XMM7 |
(203) 0x430e58 ADD %RAX,%RCX |
(203) 0x430e5b VADDSD (%R14,%RCX,8),%XMM7,%XMM8 |
(203) 0x430e61 ADD %RAX,%R10 |
(203) 0x430e64 MOV 0x88(%RSP),%RCX |
(203) 0x430e6c VMOVSD (%RCX,%R10,8),%XMM7 |
(203) 0x430e72 IMUL %RBX,%RDX |
(203) 0x430e76 ADD %RAX,%RDX |
(203) 0x430e79 VMULSD (%RDI,%RDX,8),%XMM8,%XMM8 |
(203) 0x430e7e VADDSD %XMM6,%XMM2,%XMM9 |
(203) 0x430e82 VADDSD %XMM3,%XMM8,%XMM10 |
(203) 0x430e86 VSUBSD %XMM9,%XMM10,%XMM9 |
(203) 0x430e8b VADDSD %XMM7,%XMM7,%XMM10 |
(203) 0x430e8f VDIVSD %XMM10,%XMM9,%XMM9 |
(203) 0x430e94 VUCOMISD 0x4482c(%RIP),%XMM9 |
(203) 0x430e9c JB 430c40 |
(203) 0x430ea2 VMOVSD 0x4480e(%RIP),%XMM9 |
(203) 0x430eaa JMP 430c45 |
0x430eaf NOPW %CS:(%RAX,%RAX,1) |
0x430eb9 NOPL (%RAX) |
Path / |
Source file and lines | calc_dt.cpp:49-75 |
Module | exec |
nb instructions | 217 |
nb uops | 222 |
loop length | 1259 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 7 |
used ymm registers | 1 |
used zmm registers | 13 |
nb stack references | 55 |
micro-operation queue | 37.00 cycles |
front end | 37.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 9.47 | 9.53 | 23.33 | 23.33 | 26.50 | 22.00 | 9.60 | 26.50 | 26.50 | 26.50 | 9.40 | 23.33 |
cycles | 9.47 | 9.53 | 23.33 | 23.33 | 26.50 | 22.00 | 9.60 | 26.50 | 26.50 | 26.50 | 9.40 | 23.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 36.50-36.49 |
Stall cycles | 0.00 |
Front-end | 37.00 |
Dispatch | 26.50 |
Overall L1 | 37.00 |
all | 17% |
load | 23% |
store | 28% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 33% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 5% |
all | 40% |
load | 20% |
store | 50% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 42% |
all | 22% |
load | 22% |
store | 30% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 20% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 16% |
all | 20% |
load | 19% |
store | 29% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 39% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 21% |
load | 15% |
store | 18% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 20% |
load | 18% |
store | 28% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 28% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 15% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x340,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x80(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,0x64(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 430b84 <_Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_S2_S2_S2_S2_RdRiS6_S6_S7_S7_S7_.extracted+0x7c4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R9,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDI,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVQ $0,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0x1,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x100(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x6c(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0xc0(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0xb8(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x48fe90,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 4031f0 <__kmpc_for_static_init_8@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xb8(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb0(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %R9,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 4304c0 <_Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_S2_S2_S2_S2_RdRiS6_S6_S7_S7_S7_.extracted+0x100> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVSD 0x45240(%RIP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 430afe <_Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_S2_S2_S2_S2_RdRiS6_S6_S7_S7_S7_.extracted+0x73e> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x70(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x68(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVQ %R13,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VMOVQ %R15,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VMOVQ %R14,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VMOVQ %RBX,%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
SUB %EDX,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x8(%R11),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x8(%R10),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RCX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RCX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%R8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x1(%RSI),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x1(%R9),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVG %RCX,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV (%RAX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VADDSD %XMM2,%XMM2,%XMM12 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOV 0x30(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VADDSD %XMM1,%XMM1,%XMM13 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPXORQ 0x42f8f(%RIP){1to2},%XMM0,%XMM14 | 1 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
SUB %RSI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x60(%RBP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $-0x8,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
AND %RDX,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R9,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 430bc0 <_Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_S2_S2_S2_S2_RdRiS6_S6_S7_S7_S7_.extracted+0x800> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VPBROADCASTQ %R12,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTD %EAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x68(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %EAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x38(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x2c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0x78(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x280(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0x48(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x240(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVDQU %XMM11,0x130(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %XMM11,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x200(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPBROADCASTQ %RCX,%ZMM28 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %R8,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x1c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPBROADCASTQ %R11,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x180(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVUPD %XMM12,0x120(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VBROADCASTSD %XMM12,%ZMM31 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %R10,%ZMM21 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %R13,%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %XMM13,0x110(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VBROADCASTSD %XMM13,%ZMM19 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %XMM14,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %XMM14,%ZMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %RSI,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPADDQ 0x45061(%RIP),%ZMM0,%ZMM17 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
VBROADCASTSD 0x44fd7(%RIP),%ZMM22 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
XOR %R13D,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VBROADCASTSD 0x40caa(%RIP),%ZMM23 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VBROADCASTSD 0x41400(%RIP),%ZMM24 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VBROADCASTSD 0x44fae(%RIP),%ZMM25 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
MOV 0x80(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VEXTRACTF64X4 $0x1,%ZMM22,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMINPD %ZMM0,%ZMM22,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVAPD %XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VEXTRACTF128 $0x1,%YMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMINPD %XMM0,%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VSHUFPD $0x1,%XMM0,%XMM0,%XMM1 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMINSD %XMM1,%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %RBX,0xc0(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 430c00 <_Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_S2_S2_S2_S2_RdRiS6_S6_S7_S7_S7_.extracted+0x840> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVSD %XMM0,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x48feb0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x60(%RSP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 403050 <__kmpc_for_static_fini@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0xc8(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x494820,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0xb0(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x48fed0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x4303b0,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x1,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x8,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 403400 <__kmpc_reduce@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x10,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 430b84 <_Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_S2_S2_S2_S2_RdRiS6_S6_S7_S7_S7_.extracted+0x7c4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x88(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0xa8(%RSP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMINSD (%RAX),%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVSD %XMM0,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RBX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x494820,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x48fef0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 403130 <__kmpc_end_reduce@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVSD 0x44af8(%RIP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x38(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 430ccd <_Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_S2_S2_S2_S2_RdRiS6_S6_S7_S7_S7_.extracted+0x90d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RBX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x38(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDQU 0x130(%RSP),%XMM11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
MOV 0x40(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVUPD 0x120(%RSP),%XMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x110(%RSP),%XMM13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVDQU 0x100(%RSP),%XMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
JMP 430ccd <_Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_S2_S2_S2_S2_RdRiS6_S6_S7_S7_S7_.extracted+0x90d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | calc_dt.cpp:49-75 |
Module | exec |
nb instructions | 217 |
nb uops | 222 |
loop length | 1259 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 7 |
used ymm registers | 1 |
used zmm registers | 13 |
nb stack references | 55 |
micro-operation queue | 37.00 cycles |
front end | 37.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 9.47 | 9.53 | 23.33 | 23.33 | 26.50 | 22.00 | 9.60 | 26.50 | 26.50 | 26.50 | 9.40 | 23.33 |
cycles | 9.47 | 9.53 | 23.33 | 23.33 | 26.50 | 22.00 | 9.60 | 26.50 | 26.50 | 26.50 | 9.40 | 23.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 36.50-36.49 |
Stall cycles | 0.00 |
Front-end | 37.00 |
Dispatch | 26.50 |
Overall L1 | 37.00 |
all | 17% |
load | 23% |
store | 28% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 33% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 5% |
all | 40% |
load | 20% |
store | 50% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 42% |
all | 22% |
load | 22% |
store | 30% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 20% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 16% |
all | 20% |
load | 19% |
store | 29% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 39% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 21% |
load | 15% |
store | 18% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 20% |
load | 18% |
store | 28% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 28% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 15% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x340,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x80(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,0x64(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 430b84 <_Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_S2_S2_S2_S2_RdRiS6_S6_S7_S7_S7_.extracted+0x7c4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R9,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDI,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVQ $0,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0x1,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x100(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x6c(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0xc0(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0xb8(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x48fe90,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 4031f0 <__kmpc_for_static_init_8@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xb8(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb0(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %R9,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 4304c0 <_Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_S2_S2_S2_S2_RdRiS6_S6_S7_S7_S7_.extracted+0x100> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVSD 0x45240(%RIP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 430afe <_Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_S2_S2_S2_S2_RdRiS6_S6_S7_S7_S7_.extracted+0x73e> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x70(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x68(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVQ %R13,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VMOVQ %R15,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VMOVQ %R14,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VMOVQ %RBX,%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
SUB %EDX,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x8(%R11),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x8(%R10),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RCX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RCX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%R8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x1(%RSI),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x1(%R9),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVG %RCX,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV (%RAX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VADDSD %XMM2,%XMM2,%XMM12 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOV 0x30(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VADDSD %XMM1,%XMM1,%XMM13 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPXORQ 0x42f8f(%RIP){1to2},%XMM0,%XMM14 | 1 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
SUB %RSI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x60(%RBP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $-0x8,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
AND %RDX,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R9,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 430bc0 <_Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_S2_S2_S2_S2_RdRiS6_S6_S7_S7_S7_.extracted+0x800> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VPBROADCASTQ %R12,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTD %EAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x68(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %EAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x38(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x2c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0x78(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x280(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0x48(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x240(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVDQU %XMM11,0x130(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %XMM11,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x200(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPBROADCASTQ %RCX,%ZMM28 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %R8,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x1c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPBROADCASTQ %R11,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x180(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVUPD %XMM12,0x120(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VBROADCASTSD %XMM12,%ZMM31 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %R10,%ZMM21 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %R13,%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %XMM13,0x110(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VBROADCASTSD %XMM13,%ZMM19 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %XMM14,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %XMM14,%ZMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %RSI,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPADDQ 0x45061(%RIP),%ZMM0,%ZMM17 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
VBROADCASTSD 0x44fd7(%RIP),%ZMM22 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
XOR %R13D,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VBROADCASTSD 0x40caa(%RIP),%ZMM23 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VBROADCASTSD 0x41400(%RIP),%ZMM24 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VBROADCASTSD 0x44fae(%RIP),%ZMM25 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
MOV 0x80(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VEXTRACTF64X4 $0x1,%ZMM22,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMINPD %ZMM0,%ZMM22,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVAPD %XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VEXTRACTF128 $0x1,%YMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMINPD %XMM0,%XMM1,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VSHUFPD $0x1,%XMM0,%XMM0,%XMM1 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMINSD %XMM1,%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %RBX,0xc0(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 430c00 <_Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_S2_S2_S2_S2_RdRiS6_S6_S7_S7_S7_.extracted+0x840> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVSD %XMM0,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x48feb0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x60(%RSP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 403050 <__kmpc_for_static_fini@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0xc8(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x494820,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0xb0(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x48fed0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x4303b0,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x1,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x8,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 403400 <__kmpc_reduce@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x10,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 430b84 <_Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_S2_S2_S2_S2_RdRiS6_S6_S7_S7_S7_.extracted+0x7c4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x88(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0xa8(%RSP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMINSD (%RAX),%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVSD %XMM0,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RBX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x494820,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x48fef0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 403130 <__kmpc_end_reduce@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVSD 0x44af8(%RIP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x38(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 430ccd <_Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_S2_S2_S2_S2_RdRiS6_S6_S7_S7_S7_.extracted+0x90d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RBX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x38(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDQU 0x130(%RSP),%XMM11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
MOV 0x40(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVUPD 0x120(%RSP),%XMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x110(%RSP),%XMM13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVDQU 0x100(%RSP),%XMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
JMP 430ccd <_Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_S2_S2_S2_S2_RdRiS6_S6_S7_S7_S7_.extracted+0x90d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼_Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_S2_S2_S2_S2_RdRiS6_S6_S7_S7_S7_.extracted– | 3.44 | 2.36 |
○Loop 204 - calc_dt.cpp:49-75 - exec | 3.44 | 2.35 |
○Loop 203 - calc_dt.cpp:49-75 - exec | 0 | 0 |