Loop Id: 109 | Module: exec | Source: advec_cell.cpp:71-110 [...] | Coverage: 0.01% |
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Loop Id: 109 | Module: exec | Source: advec_cell.cpp:71-110 [...] | Coverage: 0.01% |
---|
0x425d58 CMP %EDX,%ECX |
0x425d5a CMOVBE %ECX,%EDX |
0x425d5d MOV 0x1a4(%RSP),%ECX |
0x425d64 MOV %EDX,0x190(%RSP) |
0x425d6b ADD %ECX,%EDX |
0x425d6d MOV %EDX,0x1bc(%RSP) |
0x425d74 CMP %EDX,%ECX |
0x425d76 JAE 42656f |
0x425d7c MOV 0x38(%RSP),%RAX |
0x425d81 MOV 0x30(%RSP),%RDX |
0x425d86 MOV 0x18(%RSP),%R12 |
0x425d8b MOV 0x28(%RSP),%R13 |
0x425d90 MOV 0x10(%RDX),%R9 |
0x425d94 MOV 0x10(%RAX),%R11 |
0x425d98 MOV (%RAX),%RSI |
0x425d9b MOV 0x20(%RSP),%R14 |
0x425da0 MOV 0x10(%RSP),%RAX |
0x425da5 MOV 0x198(%RSP),%R10 |
0x425dad MOV %R9,0x1b0(%RSP) |
0x425db5 MOV (%RDX),%RBX |
0x425db8 MOV (%R12),%RCX |
0x425dbc MOV %R11,0x78(%RSP) |
0x425dc1 MOV 0x8(%R13),%RDI |
0x425dc5 MOV 0x10(%R14),%R15 |
0x425dc9 IMUL %R10,%RSI |
0x425dcd MOV 0x8(%RSP),%R13 |
0x425dd2 MOV (%R14),%R14 |
0x425dd5 IMUL %R10,%RBX |
0x425dd9 MOV (%RAX),%R9 |
0x425ddc IMUL %R10,%RCX |
0x425de0 MOV 0x10(%R12),%R8 |
0x425de5 MOV 0x10(%R13),%RDX |
0x425de9 IMUL %R10,%R14 |
0x425ded MOV %RSI,0x70(%RSP) |
0x425df2 IMUL %R10,%R9 |
0x425df6 MOV %R8,0x188(%RSP) |
0x425dfe MOV 0x10(%RAX),%R8 |
0x425e02 IMUL (%R13),%R10 |
0x425e07 MOV 0x190(%RSP),%R13D |
0x425e0f MOV %RBX,0x1a8(%RSP) |
0x425e17 MOV %RCX,0x68(%RSP) |
0x425e1c LEA -0x1(%R13),%R12D |
0x425e20 MOV %RDX,0x180(%RSP) |
0x425e28 MOV %R10,0x60(%RSP) |
0x425e2d CMP $0xe,%R12D |
0x425e31 JBE 426341 |
0x425e37 MOVSXD 0x1a0(%RSP),%RAX |
0x425e3f SHR $0x4,%R13D |
0x425e43 VPBROADCASTD 0x1a0(%RSP),%ZMM1 |
0x425e4b LEA (%R15,%R14,8),%RDX |
0x425e4f KXNORB %K1,%K1,%K1 |
0x425e53 SAL $0x7,%R13 |
0x425e57 VBROADCASTSD 0x3cc1f(%RIP),%ZMM3 |
0x425e61 VBROADCASTSD 0x3cc2d(%RIP),%ZMM9 |
0x425e6b VXORPD %XMM8,%XMM8,%XMM8 |
0x425e70 LEA (%RSI,%RAX,1),%RSI |
0x425e74 MOV %R13,0x58(%RSP) |
0x425e79 MOV $0x10,%R13D |
0x425e7f ADD %RAX,%RCX |
0x425e82 LEA (%R11,%RSI,8),%R12 |
0x425e86 MOV 0x1b0(%RSP),%R11 |
0x425e8e VPBROADCASTD %R13D,%ZMM5 |
0x425e94 MOV $-0x2,%R13D |
0x425e9a VPBROADCASTD %R13D,%ZMM2 |
0x425ea0 MOV $0x1,%R13D |
0x425ea6 VPADDD 0x3ca50(%RIP),%ZMM1,%ZMM27 |
0x425eb0 VBROADCASTSD 0x3cbd6(%RIP),%ZMM26 |
0x425eba LEA (%R11,%RBX,8),%RSI |
0x425ebe MOV 0x188(%RSP),%R11 |
0x425ec6 LEA (%RDI,%RAX,8),%RBX |
0x425eca ADD %R10,%RAX |
0x425ecd MOV 0x180(%RSP),%R10 |
0x425ed5 VPBROADCASTD %R13D,%ZMM4 |
0x425edb VBROADCASTSD 0x3ca5b(%RIP),%ZMM24 |
0x425ee5 VMOVDQA32 %ZMM5,0x140(%RSP) |
0x425eed VBROADCASTSD 0x3ca89(%RIP),%ZMM23 |
0x425ef7 MOV 0x58(%RSP),%R13 |
0x425efc LEA (%R11,%RCX,8),%R11 |
0x425f00 VMOVDQA32 %ZMM2,0x100(%RSP) |
0x425f08 LEA (%R10,%RAX,8),%R10 |
0x425f0c LEA (%R8,%R9,8),%RCX |
0x425f10 XOR %EAX,%EAX |
0x425f12 VMOVDQA32 %ZMM4,0xc0(%RSP) |
0x425f1a NOPW (%RAX,%RAX,1) |
(111) 0x425f20 VMOVDQA32 %ZMM27,%ZMM10 |
(111) 0x425f26 VMOVUPD 0x40(%R12,%RAX,1),%ZMM4 |
(111) 0x425f2e VMOVUPD (%R12,%RAX,1),%ZMM11 |
(111) 0x425f35 KMOVB %K1,%K4 |
(111) 0x425f39 KMOVB %K1,%K5 |
(111) 0x425f3d KMOVB %K1,%K6 |
(111) 0x425f41 VPADDD 0xc0(%RSP),%ZMM10,%ZMM14 |
(111) 0x425f49 VPADDD 0x3ca6d(%RIP),%ZMM10,%ZMM7 |
(111) 0x425f53 VEXTRACTI32X8 $0x1,%ZMM10,%YMM6 |
(111) 0x425f5a KMOVB %K1,%K7 |
(111) 0x425f5e VCMPPD $0xe,%ZMM8,%ZMM11,%K3 |
(111) 0x425f65 VCMPPD $0xe,%ZMM8,%ZMM4,%K2 |
(111) 0x425f6c VPMOVSXDQ %YMM10,%ZMM12 |
(111) 0x425f72 VPMINSD 0x80(%RSP),%ZMM14,%ZMM0 |
(111) 0x425f7a VPMOVSXDQ %YMM6,%ZMM13 |
(111) 0x425f80 VPADDD 0x100(%RSP),%ZMM10,%ZMM15 |
(111) 0x425f88 VEXTRACTI32X8 $0x1,%ZMM7,%YMM1 |
(111) 0x425f8f VMOVDQA64 %ZMM12,%ZMM18 |
(111) 0x425f95 VMOVDQA64 %ZMM13,%ZMM17 |
(111) 0x425f9b VPMOVSXDQ %YMM0,%ZMM14 |
(111) 0x425fa1 VEXTRACTI32X8 $0x1,%ZMM0,%YMM2 |
(111) 0x425fa8 VPMOVSXDQ %YMM7,%ZMM18{%K3} |
(111) 0x425fae VMOVDQA64 %ZMM14,%ZMM11 |
(111) 0x425fb4 VPMOVSXDQ %YMM1,%ZMM17{%K2} |
(111) 0x425fba VPMOVSXDQ %YMM2,%ZMM0 |
(111) 0x425fc0 VMOVUPD (%RBX,%RAX,1),%ZMM2 |
(111) 0x425fc7 VPMOVSXDQ %YMM7,%ZMM11{%K3} |
(111) 0x425fcd VPMOVSXDQ %YMM7,%ZMM22 |
(111) 0x425fd3 VPMOVSXDQ %YMM1,%ZMM21 |
(111) 0x425fd9 VANDPD (%R12,%RAX,1),%ZMM3,%ZMM7 |
(111) 0x425fe0 VMOVDQA64 %ZMM12,%ZMM22{%K3} |
(111) 0x425fe6 VMOVDQA64 %ZMM13,%ZMM21{%K2} |
(111) 0x425fec VPMOVSXDQ %YMM15,%ZMM14{%K3} |
(111) 0x425ff2 VGATHERQPD (%RSI,%ZMM18,8),%ZMM13{%K4} |
(111) 0x425ff9 VEXTRACTI32X8 $0x1,%ZMM15,%YMM12 |
(111) 0x426000 KMOVB %K1,%K3 |
(111) 0x426004 KMOVB %K1,%K4 |
(111) 0x426008 VGATHERQPD (%RSI,%ZMM17,8),%ZMM15{%K5} |
(111) 0x42600f VANDPD %ZMM3,%ZMM4,%ZMM5 |
(111) 0x426015 VMOVDQA64 %ZMM0,%ZMM6 |
(111) 0x42601b VDIVPD %ZMM13,%ZMM7,%ZMM10 |
(111) 0x426021 KMOVB %K1,%K5 |
(111) 0x426025 VDIVPD %ZMM15,%ZMM5,%ZMM7 |
(111) 0x42602b VPMOVSXDQ %YMM1,%ZMM6{%K2} |
(111) 0x426031 VADDPD %ZMM9,%ZMM7,%ZMM13 |
(111) 0x426037 VGATHERQPD (%RDI,%ZMM11,8),%ZMM4{%K6} |
(111) 0x42603e KMOVB %K1,%K6 |
(111) 0x426042 VGATHERQPD (%RDI,%ZMM6,8),%ZMM1{%K7} |
(111) 0x426049 VADDPD %ZMM9,%ZMM10,%ZMM11 |
(111) 0x42604f VMOVUPD 0x40(%RBX,%RAX,1),%ZMM6 |
(111) 0x426057 VPMOVSXDQ %YMM12,%ZMM0{%K2} |
(111) 0x42605d VDIVPD %ZMM4,%ZMM2,%ZMM16 |
(111) 0x426063 KMOVB %K1,%K2 |
(111) 0x426067 VGATHERQPD (%RDX,%ZMM14,8),%ZMM15{%K4} |
(111) 0x42606e VGATHERQPD (%RDX,%ZMM17,8),%ZMM5{%K2} |
(111) 0x426075 VGATHERQPD (%RDX,%ZMM0,8),%ZMM4{%K5} |
(111) 0x42607c KMOVB %K1,%K7 |
(111) 0x426080 VDIVPD %ZMM1,%ZMM6,%ZMM12 |
(111) 0x426086 VGATHERQPD (%RDX,%ZMM18,8),%ZMM6{%K3} |
(111) 0x42608d VSUBPD %ZMM7,%ZMM26,%ZMM20 |
(111) 0x426093 VSUBPD %ZMM10,%ZMM26,%ZMM2 |
(111) 0x426099 VMULPD %ZMM13,%ZMM12,%ZMM1 |
(111) 0x42609f VGATHERQPD (%RDX,%ZMM21,8),%ZMM13{%K7} |
(111) 0x4260a6 VGATHERQPD (%RDX,%ZMM22,8),%ZMM12{%K6} |
(111) 0x4260ad KMOVB %K1,%K7 |
(111) 0x4260b1 KMOVB %K1,%K6 |
(111) 0x4260b5 VMULPD %ZMM11,%ZMM16,%ZMM16 |
(111) 0x4260bb VSUBPD %ZMM5,%ZMM13,%ZMM13 |
(111) 0x4260c1 VSUBPD %ZMM15,%ZMM6,%ZMM11 |
(111) 0x4260c7 VSUBPD %ZMM4,%ZMM5,%ZMM15 |
(111) 0x4260cd VSUBPD %ZMM6,%ZMM12,%ZMM12 |
(111) 0x4260d3 VSUBPD %ZMM7,%ZMM9,%ZMM7 |
(111) 0x4260d9 VSUBPD %ZMM10,%ZMM9,%ZMM10 |
(111) 0x4260df VCMPPD $0x2,%ZMM8,%ZMM13,%K2 |
(111) 0x4260e6 VPADDD 0x140(%RSP),%ZMM27,%ZMM27 |
(111) 0x4260ee VMULPD %ZMM13,%ZMM15,%ZMM28 |
(111) 0x4260f4 VANDPD %ZMM3,%ZMM13,%ZMM13 |
(111) 0x4260fa VANDPD %ZMM3,%ZMM15,%ZMM4 |
(111) 0x426100 VMULPD %ZMM13,%ZMM20,%ZMM19 |
(111) 0x426106 VCMPPD $0x2,%ZMM8,%ZMM12,%K3 |
(111) 0x42610d VMULPD %ZMM12,%ZMM11,%ZMM30 |
(111) 0x426113 VANDPD %ZMM3,%ZMM12,%ZMM12 |
(111) 0x426119 VANDPD %ZMM3,%ZMM11,%ZMM11 |
(111) 0x42611f VMULPD %ZMM12,%ZMM2,%ZMM15 |
(111) 0x426125 VBLENDMPD %ZMM24,%ZMM9,%ZMM31{%K2} |
(111) 0x42612b KMOVB %K1,%K2 |
(111) 0x42612f VBLENDMPD %ZMM24,%ZMM9,%ZMM29{%K3} |
(111) 0x426135 KMOVB %K1,%K3 |
(111) 0x426139 VCMPPD $0xe,%ZMM8,%ZMM28,%K5 |
(111) 0x426140 VFMADD231PD %ZMM4,%ZMM1,%ZMM19 |
(111) 0x426146 VMINPD %ZMM13,%ZMM4,%ZMM4 |
(111) 0x42614c VCMPPD $0xe,%ZMM8,%ZMM30,%K4 |
(111) 0x426153 VFMADD231PD %ZMM11,%ZMM16,%ZMM15 |
(111) 0x426159 VMINPD %ZMM12,%ZMM11,%ZMM11 |
(111) 0x42615f VMULPD %ZMM23,%ZMM19,%ZMM19 |
(111) 0x426165 VMULPD %ZMM23,%ZMM15,%ZMM15 |
(111) 0x42616b VMINPD %ZMM4,%ZMM19,%ZMM13 |
(111) 0x426171 VMULPD %ZMM31,%ZMM7,%ZMM4 |
(111) 0x426177 VMULPD %ZMM29,%ZMM10,%ZMM7 |
(111) 0x42617d VMINPD %ZMM11,%ZMM15,%ZMM12 |
(111) 0x426183 VFMADD231PD %ZMM13,%ZMM4,%ZMM5{%K5} |
(111) 0x426189 KMOVB %K1,%K5 |
(111) 0x42618d VFMADD231PD %ZMM12,%ZMM7,%ZMM6{%K4} |
(111) 0x426193 KMOVB %K1,%K4 |
(111) 0x426197 VMULPD 0x40(%R12,%RAX,1),%ZMM5,%ZMM5 |
(111) 0x42619f VMULPD (%R12,%RAX,1),%ZMM6,%ZMM6 |
(111) 0x4261a6 VMOVUPD %ZMM5,0x40(%R11,%RAX,1) |
(111) 0x4261ae VMOVUPD %ZMM6,(%R11,%RAX,1) |
(111) 0x4261b5 VGATHERQPD (%RCX,%ZMM18,8),%ZMM10{%K4} |
(111) 0x4261bc VGATHERQPD (%RSI,%ZMM18,8),%ZMM15{%K3} |
(111) 0x4261c3 VGATHERQPD (%RSI,%ZMM17,8),%ZMM13{%K2} |
(111) 0x4261ca KMOVB %K1,%K3 |
(111) 0x4261ce KMOVB %K1,%K2 |
(111) 0x4261d2 VGATHERQPD (%RCX,%ZMM17,8),%ZMM7{%K5} |
(111) 0x4261d9 VGATHERQPD (%RDX,%ZMM18,8),%ZMM12{%K6} |
(111) 0x4261e0 VGATHERQPD (%RDX,%ZMM17,8),%ZMM11{%K7} |
(111) 0x4261e7 KMOVB %K1,%K6 |
(111) 0x4261eb KMOVB %K1,%K7 |
(111) 0x4261ef VMULPD %ZMM15,%ZMM12,%ZMM12 |
(111) 0x4261f5 VGATHERQPD (%RCX,%ZMM14,8),%ZMM4{%K6} |
(111) 0x4261fc VGATHERQPD (%RCX,%ZMM0,8),%ZMM18{%K7} |
(111) 0x426203 VGATHERQPD (%RCX,%ZMM22,8),%ZMM29{%K3} |
(111) 0x42620a VGATHERQPD (%RCX,%ZMM21,8),%ZMM14{%K2} |
(111) 0x426211 VSUBPD %ZMM4,%ZMM10,%ZMM0 |
(111) 0x426217 VSUBPD %ZMM7,%ZMM14,%ZMM4 |
(111) 0x42621d VSUBPD %ZMM10,%ZMM29,%ZMM31 |
(111) 0x426223 VMULPD %ZMM13,%ZMM11,%ZMM11 |
(111) 0x426229 VSUBPD %ZMM18,%ZMM7,%ZMM17 |
(111) 0x42622f VANDPD %ZMM3,%ZMM4,%ZMM28 |
(111) 0x426235 VCMPPD $0x2,%ZMM8,%ZMM4,%K5 |
(111) 0x42623c VANDPD %ZMM3,%ZMM31,%ZMM19 |
(111) 0x426242 VMULPD %ZMM28,%ZMM20,%ZMM20 |
(111) 0x426248 VCMPPD $0x2,%ZMM8,%ZMM31,%K4 |
(111) 0x42624f VANDPD %ZMM3,%ZMM17,%ZMM18 |
(111) 0x426255 VMULPD %ZMM19,%ZMM2,%ZMM2 |
(111) 0x42625b VMULPD %ZMM31,%ZMM0,%ZMM21 |
(111) 0x426261 VANDPD %ZMM3,%ZMM0,%ZMM0 |
(111) 0x426267 VBLENDMPD %ZMM24,%ZMM9,%ZMM22{%K5} |
(111) 0x42626d VMULPD %ZMM4,%ZMM17,%ZMM14 |
(111) 0x426273 VBLENDMPD %ZMM24,%ZMM9,%ZMM30{%K4} |
(111) 0x426279 VFMADD132PD %ZMM18,%ZMM20,%ZMM1 |
(111) 0x42627f VFMADD231PD %ZMM0,%ZMM16,%ZMM2 |
(111) 0x426285 VMINPD %ZMM28,%ZMM18,%ZMM16 |
(111) 0x42628b VMINPD %ZMM19,%ZMM0,%ZMM0 |
(111) 0x426291 VCMPPD $0xe,%ZMM8,%ZMM21,%K6 |
(111) 0x426298 VCMPPD $0xe,%ZMM8,%ZMM14,%K7 |
(111) 0x42629f VANDPD %ZMM3,%ZMM5,%ZMM14 |
(111) 0x4262a5 VDIVPD %ZMM11,%ZMM14,%ZMM13 |
(111) 0x4262ab VMULPD %ZMM23,%ZMM1,%ZMM4 |
(111) 0x4262b1 VMULPD %ZMM23,%ZMM2,%ZMM2 |
(111) 0x4262b7 VMINPD %ZMM16,%ZMM4,%ZMM1 |
(111) 0x4262bd VMULPD %ZMM22,%ZMM1,%ZMM4 |
(111) 0x4262c3 VMINPD %ZMM0,%ZMM2,%ZMM1 |
(111) 0x4262c9 VANDPD %ZMM3,%ZMM6,%ZMM0 |
(111) 0x4262cf VDIVPD %ZMM12,%ZMM0,%ZMM15 |
(111) 0x4262d5 VSUBPD %ZMM15,%ZMM9,%ZMM0 |
(111) 0x4262db VMULPD %ZMM30,%ZMM1,%ZMM2 |
(111) 0x4262e1 VSUBPD %ZMM13,%ZMM9,%ZMM1 |
(111) 0x4262e7 VFMADD231PD %ZMM1,%ZMM4,%ZMM7{%K7} |
(111) 0x4262ed VFMADD231PD %ZMM0,%ZMM2,%ZMM10{%K6} |
(111) 0x4262f3 VMULPD %ZMM5,%ZMM7,%ZMM5 |
(111) 0x4262f9 VMULPD %ZMM6,%ZMM10,%ZMM6 |
(111) 0x4262ff VMOVUPD %ZMM5,0x40(%R10,%RAX,1) |
(111) 0x426307 VMOVUPD %ZMM6,(%R10,%RAX,1) |
(111) 0x42630e SUB $-0x80,%RAX |
(111) 0x426312 CMP %RAX,%R13 |
(111) 0x426315 JNE 425f20 |
0x42631b MOV 0x190(%RSP),%R12D |
0x426323 MOV %R12D,%ESI |
0x426326 AND $-0x10,%ESI |
0x426329 ADD %ESI,0x1a4(%RSP) |
0x426330 ADD %ESI,0x1a0(%RSP) |
0x426337 AND $0xf,%R12D |
0x42633b JE 426561 |
0x426341 MOV 0x78(%RSP),%RDX |
0x426346 MOV 0x68(%RSP),%R13 |
0x42634b VXORPD %XMM12,%XMM12,%XMM12 |
0x426350 MOV 0x70(%RSP),%RBX |
0x426355 MOV 0x188(%RSP),%R10 |
0x42635d MOVSXD 0x1a0(%RSP),%RAX |
0x426365 MOV 0x180(%RSP),%RSI |
0x42636d LEA (%R10,%R13,8),%R12 |
0x426371 LEA (%RDX,%RBX,8),%RCX |
0x426375 MOV 0x60(%RSP),%RDX |
0x42637a VMOVSD 0x3c5be(%RIP),%XMM13 |
0x426382 MOV %R12,0x100(%RSP) |
0x42638a MOV 0x1a4(%RSP),%R12D |
0x426392 MOV %RCX,0x140(%RSP) |
0x42639a LEA (%RSI,%RDX,8),%R13 |
0x42639e SUB %EAX,%R12D |
0x4263a1 NOPL (%RAX) |
(110) 0x4263a8 MOV 0x140(%RSP),%R11 |
(110) 0x4263b0 VMOVSD (%R11,%RAX,8),%XMM8 |
(110) 0x4263b6 VCOMISD %XMM12,%XMM8 |
(110) 0x4263bb JBE 4265d8 |
(110) 0x4263c1 LEA -0x1(%RAX),%RDX |
(110) 0x4263c5 LEA -0x2(%RAX),%R11D |
(110) 0x4263c9 MOV %RAX,%RSI |
(110) 0x4263cc MOVSXD %R11D,%RCX |
(110) 0x4263cf MOV %RDX,%R10 |
(110) 0x4263d2 VMOVSD (%RDI,%RAX,8),%XMM9 |
(110) 0x4263d7 MOV 0x1a8(%RSP),%RBX |
(110) 0x4263df VANDPD 0x3c699(%RIP),%XMM8,%XMM3 |
(110) 0x4263e7 VMOVSD 0x3c6a1(%RIP),%XMM0 |
(110) 0x4263ef VDIVSD (%RDI,%R10,8),%XMM9,%XMM4 |
(110) 0x4263f5 LEA (%R14,%RDX,1),%R10 |
(110) 0x4263f9 LEA (%RBX,%RDX,1),%R11 |
(110) 0x4263fd MOV 0x1b0(%RSP),%RBX |
(110) 0x426405 LEA (%R15,%R10,8),%R10 |
(110) 0x426409 VMOVSD (%R10),%XMM14 |
(110) 0x42640e LEA (%RBX,%R11,8),%R11 |
(110) 0x426412 LEA (%R14,%RCX,1),%RBX |
(110) 0x426416 VDIVSD (%R11),%XMM3,%XMM2 |
(110) 0x42641b VADDSD %XMM25,%XMM2,%XMM15 |
(110) 0x426421 VMOVSD %XMM25,%XMM25,%XMM3 |
(110) 0x426427 VSUBSD %XMM2,%XMM0,%XMM5 |
(110) 0x42642b VSUBSD (%R15,%RBX,8),%XMM14,%XMM11 |
(110) 0x426431 LEA (%R14,%RSI,1),%RBX |
(110) 0x426435 VMOVSD (%R15,%RBX,8),%XMM10 |
(110) 0x42643b VMULSD %XMM15,%XMM4,%XMM7 |
(110) 0x426440 VSUBSD %XMM14,%XMM10,%XMM1 |
(110) 0x426445 VMULSD %XMM1,%XMM11,%XMM4 |
(110) 0x426449 VCMPSD $0x6,%XMM12,%XMM1,%XMM6 |
(110) 0x42644f VBLENDVPD %XMM6,%XMM3,%XMM13,%XMM9 |
(110) 0x426455 VCOMISD %XMM12,%XMM4 |
(110) 0x42645a JBE 426496 |
(110) 0x42645c VANDPD 0x3c61c(%RIP),%XMM1,%XMM0 |
(110) 0x426464 VANDPD 0x3c614(%RIP),%XMM11,%XMM15 |
(110) 0x42646c VSUBSD %XMM2,%XMM25,%XMM2 |
(110) 0x426472 VMULSD %XMM0,%XMM5,%XMM11 |
(110) 0x426476 VMINSD %XMM15,%XMM0,%XMM1 |
(110) 0x42647b VFMADD231SD %XMM15,%XMM7,%XMM11 |
(110) 0x426480 VMULSD 0x3c4f8(%RIP),%XMM11,%XMM10 |
(110) 0x426488 VMINSD %XMM10,%XMM1,%XMM6 |
(110) 0x42648d VMULSD %XMM2,%XMM6,%XMM3 |
(110) 0x426491 VFMADD231SD %XMM9,%XMM3,%XMM14 |
(110) 0x426496 VMULSD %XMM8,%XMM14,%XMM15 |
(110) 0x42649b MOV 0x100(%RSP),%RBX |
(110) 0x4264a3 ADD %R9,%RDX |
(110) 0x4264a6 ADD %R9,%RSI |
(110) 0x4264a9 ADD %R9,%RCX |
(110) 0x4264ac VMOVSD %XMM25,%XMM25,%XMM14 |
(110) 0x4264b2 VMOVSD %XMM15,(%RBX,%RAX,8) |
(110) 0x4264b7 VMOVSD (%R8,%RDX,8),%XMM6 |
(110) 0x4264bd VMOVSD (%R8,%RSI,8),%XMM8 |
(110) 0x4264c3 VMOVSD (%R10),%XMM11 |
(110) 0x4264c8 VMOVSD (%R11),%XMM1 |
(110) 0x4264cd VSUBSD %XMM6,%XMM8,%XMM0 |
(110) 0x4264d1 VSUBSD (%R8,%RCX,8),%XMM6,%XMM4 |
(110) 0x4264d7 VMULSD %XMM4,%XMM0,%XMM10 |
(110) 0x4264db VCMPSD $0x6,%XMM12,%XMM0,%XMM9 |
(110) 0x4264e1 VBLENDVPD %XMM9,%XMM14,%XMM13,%XMM3 |
(110) 0x4264e7 VCOMISD %XMM12,%XMM10 |
(110) 0x4264ec JBE 426600 |
(110) 0x4264f2 VMULSD %XMM11,%XMM1,%XMM11 |
(110) 0x4264f7 VANDPD 0x3c581(%RIP),%XMM15,%XMM2 |
(110) 0x4264ff VANDPD 0x3c579(%RIP),%XMM0,%XMM0 |
(110) 0x426507 VANDPD 0x3c571(%RIP),%XMM4,%XMM8 |
(110) 0x42650f MOV 0x1bc(%RSP),%R11D |
(110) 0x426517 VMULSD %XMM0,%XMM5,%XMM5 |
(110) 0x42651b VMINSD %XMM8,%XMM0,%XMM14 |
(110) 0x426520 VDIVSD %XMM11,%XMM2,%XMM1 |
(110) 0x426525 VFMADD231SD %XMM8,%XMM7,%XMM5 |
(110) 0x42652a VMULSD 0x3c44e(%RIP),%XMM5,%XMM4 |
(110) 0x426532 VMINSD %XMM4,%XMM14,%XMM10 |
(110) 0x426536 VSUBSD %XMM1,%XMM25,%XMM9 |
(110) 0x42653c VMULSD %XMM10,%XMM9,%XMM7 |
(110) 0x426541 VFMADD132SD %XMM3,%XMM6,%XMM7 |
(110) 0x426546 VMULSD %XMM7,%XMM15,%XMM15 |
(110) 0x42654a VMOVSD %XMM15,(%R13,%RAX,8) |
(110) 0x426551 INC %RAX |
(110) 0x426554 LEA (%R12,%RAX,1),%EDX |
(110) 0x426558 CMP %R11D,%EDX |
(110) 0x42655b JB 4263a8 |
0x426561 MOV 0x1bc(%RSP),%EAX |
0x426568 MOV %EAX,0x1a4(%RSP) |
0x42656f INCQ 0x198(%RSP) |
0x426577 MOV 0x48(%RSP),%R8D |
0x42657c MOV 0x40(%RSP),%R9D |
0x426581 SUB %R9D,%R8D |
0x426584 MOV 0x198(%RSP),%RDI |
0x42658c ADD %EDI,%R8D |
0x42658f CMP %R8D,0x54(%RSP) |
0x426594 JLE 4265c0 |
0x426596 MOV 0x4c(%RSP),%ECX |
0x42659a MOV 0x1a4(%RSP),%R12D |
0x4265a2 MOV 0x50(%RSP),%R13D |
0x4265a7 MOV 0x1b8(%RSP),%EDX |
0x4265ae SUB %R12D,%ECX |
0x4265b1 MOV %R13D,0x1a0(%RSP) |
0x4265b9 JMP 425d58 |
(110) 0x4265d8 MOV 0x194(%RSP),%ECX |
(110) 0x4265df LEA 0x1(%RAX),%EBX |
(110) 0x4265e2 LEA -0x1(%RAX),%RSI |
(110) 0x4265e6 MOV %RAX,%RDX |
(110) 0x4265e9 CMP %ECX,%EBX |
(110) 0x4265eb CMOVG %ECX,%EBX |
(110) 0x4265ee MOVSXD %EBX,%R10 |
(110) 0x4265f1 MOV %R10,%RCX |
(110) 0x4265f4 JMP 4263d2 |
(110) 0x426600 VMULSD %XMM15,%XMM6,%XMM7 |
(110) 0x426605 MOV 0x1bc(%RSP),%ECX |
(110) 0x42660c VMOVSD %XMM7,(%R13,%RAX,8) |
(110) 0x426613 INC %RAX |
(110) 0x426616 LEA (%R12,%RAX,1),%ESI |
(110) 0x42661a CMP %ECX,%ESI |
(110) 0x42661c JB 4263a8 |
0x426622 JMP 426561 |
/software/compilers/gcc/gcc-13.1.0-full+isl+binutils/include/c++/13.1.0/bits/stl_algobase.h: 238 - 238 |
-------------------------------------------------------------------------------- |
238: if (__b < __a) |
/scratch_na/users/xoserete/qaas_runs/171-415-4969/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/advec_cell.cpp: 71 - 110 |
-------------------------------------------------------------------------------- |
71: if (vol_flux_x(i, j) > 0.0) { |
72: upwind = i - 2; |
73: donor = i - 1; |
74: downwind = i; |
75: dif = donor; |
76: } else { |
77: upwind = std::min(i + 1, x_max + 2); |
78: donor = i; |
79: downwind = i - 1; |
80: dif = upwind; |
81: } |
82: sigmat = std::fabs(vol_flux_x(i, j)) / pre_vol(donor, j); |
83: sigma3 = (1.0 + sigmat) * (vertexdx[i] / vertexdx[dif]); |
84: sigma4 = 2.0 - sigmat; |
85: sigmav = sigmat; |
86: diffuw = density1(donor, j) - density1(upwind, j); |
87: diffdw = density1(downwind, j) - density1(donor, j); |
88: wind = 1.0; |
89: if (diffdw <= 0.0) wind = -1.0; |
90: if (diffuw * diffdw > 0.0) { |
91: limiter = (1.0 - sigmav) * wind * |
92: std::fmin(std::fmin(std::fabs(diffuw), std::fabs(diffdw)), |
93: one_by_six * (sigma3 * std::fabs(diffuw) + sigma4 * std::fabs(diffdw))); |
94: } else { |
95: limiter = 0.0; |
96: } |
97: mass_flux_x(i, j) = vol_flux_x(i, j) * (density1(donor, j) + limiter); |
98: sigmam = std::fabs(mass_flux_x(i, j)) / (density1(donor, j) * pre_vol(donor, j)); |
99: diffuw = energy1(donor, j) - energy1(upwind, j); |
100: diffdw = energy1(downwind, j) - energy1(donor, j); |
101: wind = 1.0; |
102: if (diffdw <= 0.0) wind = -1.0; |
103: if (diffuw * diffdw > 0.0) { |
104: limiter = (1.0 - sigmam) * wind * |
105: std::fmin(std::fmin(std::fabs(diffuw), std::fabs(diffdw)), |
106: one_by_six * (sigma3 * std::fabs(diffuw) + sigma4 * std::fabs(diffdw))); |
107: } else { |
108: limiter = 0.0; |
109: } |
110: ener_flux(i, j) = mass_flux_x(i, j) * (energy1(donor, j) + limiter); |
/scratch_na/users/xoserete/qaas_runs/171-415-4969/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/context.h: 46 - 69 |
-------------------------------------------------------------------------------- |
46: T &operator[](size_t i) const { return data[i]; } |
[...] |
69: T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; } |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
○97.10 | gomp_thread_start | team.c:130 | libgomp.so.1.0.0 |
○2.90 | GOMP_parallel | libgomp.h:985 | libgomp.so.1.0.0 |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 4.23 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.30 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.15 |
Bottlenecks | micro-operation queue, |
Function | advec_cell_kernel(int, int, int, int, int, int, clover::Buffer1D |
Source | stl_algobase.h:238-238,advec_cell.cpp:71-72,advec_cell.cpp:77-77,advec_cell.cpp:82-82,advec_cell.cpp:88-88,advec_cell.cpp:110-110,context.h:46-46,context.h:69-69 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 21.83 |
CQA cycles if no scalar integer | 5.17 |
CQA cycles if FP arith vectorized | 21.83 |
CQA cycles if fully vectorized | 16.83 |
Front-end cycles | 21.83 |
DIV/SQRT cycles | 7.80 |
P0 cycles | 10.00 |
P1 cycles | 19.00 |
P2 cycles | 19.00 |
P3 cycles | 10.50 |
P4 cycles | 7.70 |
P5 cycles | 7.90 |
P6 cycles | 10.50 |
P7 cycles | 10.50 |
P8 cycles | 10.50 |
P9 cycles | 7.80 |
P10 cycles | 19.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 22.32 |
Stall cycles (UFS) | 0.00 |
Nb insns | 126.00 |
Nb uops | 131.00 |
Nb loads | 57.00 |
Nb stores | 21.00 |
Nb stack references | 30.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 34.63 |
Bytes prefetched | 0.00 |
Bytes loaded | 444.00 |
Bytes stored | 312.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 15.79 |
Vectorization ratio load | 8.33 |
Vectorization ratio store | 14.29 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 13.33 |
Vector-efficiency ratio all | 20.07 |
Vector-efficiency ratio load | 17.71 |
Vector-efficiency ratio store | 23.21 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 100.00 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 10.83 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 4.23 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.30 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.15 |
Bottlenecks | micro-operation queue, |
Function | advec_cell_kernel(int, int, int, int, int, int, clover::Buffer1D |
Source | stl_algobase.h:238-238,advec_cell.cpp:71-72,advec_cell.cpp:77-77,advec_cell.cpp:82-82,advec_cell.cpp:88-88,advec_cell.cpp:110-110,context.h:46-46,context.h:69-69 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 21.83 |
CQA cycles if no scalar integer | 5.17 |
CQA cycles if FP arith vectorized | 21.83 |
CQA cycles if fully vectorized | 16.83 |
Front-end cycles | 21.83 |
DIV/SQRT cycles | 7.80 |
P0 cycles | 10.00 |
P1 cycles | 19.00 |
P2 cycles | 19.00 |
P3 cycles | 10.50 |
P4 cycles | 7.70 |
P5 cycles | 7.90 |
P6 cycles | 10.50 |
P7 cycles | 10.50 |
P8 cycles | 10.50 |
P9 cycles | 7.80 |
P10 cycles | 19.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 22.32 |
Stall cycles (UFS) | 0.00 |
Nb insns | 126.00 |
Nb uops | 131.00 |
Nb loads | 57.00 |
Nb stores | 21.00 |
Nb stack references | 30.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 34.63 |
Bytes prefetched | 0.00 |
Bytes loaded | 444.00 |
Bytes stored | 312.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 15.79 |
Vectorization ratio load | 8.33 |
Vectorization ratio store | 14.29 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 13.33 |
Vector-efficiency ratio all | 20.07 |
Vector-efficiency ratio load | 17.71 |
Vector-efficiency ratio store | 23.21 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 100.00 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 10.83 |
Path / |
nb instructions | 126 |
nb uops | 131 |
loop length | 695 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 3 |
used ymm registers | 0 |
used zmm registers | 10 |
nb stack references | 30 |
micro-operation queue | 21.83 cycles |
front end | 21.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 7.80 | 7.80 | 19.00 | 19.00 | 10.50 | 7.70 | 7.90 | 10.50 | 10.50 | 10.50 | 7.80 | 19.00 |
cycles | 7.80 | 10.00 | 19.00 | 19.00 | 10.50 | 7.70 | 7.90 | 10.50 | 10.50 | 10.50 | 7.80 | 19.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 22.32 |
Stall cycles | 0.00 |
Front-end | 21.83 |
Dispatch | 19.00 |
Overall L1 | 21.83 |
all | 13% |
load | 16% |
store | 14% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 25% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 28% |
all | 15% |
load | 8% |
store | 14% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 13% |
all | 21% |
load | 22% |
store | 23% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 6% |
all | 15% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 16% |
all | 20% |
load | 17% |
store | 23% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 10% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
CMP %EDX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVBE %ECX,%EDX | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
MOV 0x1a4(%RSP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EDX,0x190(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %ECX,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDX,0x1bc(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %EDX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 42656f <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.2.lto_priv.0+0x96f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x38(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RDX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RSP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x198(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,0x1b0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R12),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x8(%R13),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R14),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %R10,%RSI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x8(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R14),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %R10,%RBX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV (%RAX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %R10,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x10(%R12),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R13),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %R10,%R14 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RSI,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R10,%R9 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R8,0x188(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL (%R13),%R10 | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x190(%RSP),%R13D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RBX,0x1a8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA -0x1(%R13),%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RDX,0x180(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0xe,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 426341 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.2.lto_priv.0+0x741> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOVSXD 0x1a0(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SHR $0x4,%R13D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
VPBROADCASTD 0x1a0(%RSP),%ZMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
LEA (%R15,%R14,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KXNORB %K1,%K1,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
SAL $0x7,%R13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
VBROADCASTSD 0x3cc1f(%RIP),%ZMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VBROADCASTSD 0x3cc2d(%RIP),%ZMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VXORPD %XMM8,%XMM8,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%RSI,%RAX,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R13,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x10,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%R11,%RSI,8),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x1b0(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %R13D,%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV $-0x2,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VPBROADCASTD %R13D,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV $0x1,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VPADDD 0x3ca50(%RIP),%ZMM1,%ZMM27 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
VBROADCASTSD 0x3cbd6(%RIP),%ZMM26 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
LEA (%R11,%RBX,8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x188(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RDI,%RAX,8),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %R10,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x180(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %R13D,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBROADCASTSD 0x3ca5b(%RIP),%ZMM24 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VMOVDQA32 %ZMM5,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VBROADCASTSD 0x3ca89(%RIP),%ZMM23 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
MOV 0x58(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R11,%RCX,8),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVDQA32 %ZMM2,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
LEA (%R10,%RAX,8),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R8,%R9,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVDQA32 %ZMM4,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x190(%RSP),%R12D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12D,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x10,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %ESI,0x1a4(%RSP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
ADD %ESI,0x1a0(%RSP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
AND $0xf,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 426561 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.2.lto_priv.0+0x961> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x78(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x68(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM12,%XMM12,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x70(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x188(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD 0x1a0(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x180(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R10,%R13,8),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%RDX,%RBX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x60(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x3c5be(%RIP),%XMM13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x1a4(%RSP),%R12D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RSI,%RDX,8),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %EAX,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x1bc(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x1a4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INCQ 0x198(%RSP) | 3 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV 0x48(%RSP),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RSP),%R9D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %R9D,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x198(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %EDI,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R8D,0x54(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 4265c0 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.2.lto_priv.0+0x9c0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x4c(%RSP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x1a4(%RSP),%R12D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%RSP),%R13D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x1b8(%RSP),%EDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %R12D,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R13D,0x1a0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 425d58 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.2.lto_priv.0+0x158> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
JMP 426561 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.2.lto_priv.0+0x961> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
nb instructions | 126 |
nb uops | 131 |
loop length | 695 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 3 |
used ymm registers | 0 |
used zmm registers | 10 |
nb stack references | 30 |
micro-operation queue | 21.83 cycles |
front end | 21.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 7.80 | 7.80 | 19.00 | 19.00 | 10.50 | 7.70 | 7.90 | 10.50 | 10.50 | 10.50 | 7.80 | 19.00 |
cycles | 7.80 | 10.00 | 19.00 | 19.00 | 10.50 | 7.70 | 7.90 | 10.50 | 10.50 | 10.50 | 7.80 | 19.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 22.32 |
Stall cycles | 0.00 |
Front-end | 21.83 |
Dispatch | 19.00 |
Overall L1 | 21.83 |
all | 13% |
load | 16% |
store | 14% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 25% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 28% |
all | 15% |
load | 8% |
store | 14% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 13% |
all | 21% |
load | 22% |
store | 23% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 6% |
all | 15% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 16% |
all | 20% |
load | 17% |
store | 23% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 10% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
CMP %EDX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVBE %ECX,%EDX | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
MOV 0x1a4(%RSP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EDX,0x190(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %ECX,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDX,0x1bc(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %EDX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 42656f <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.2.lto_priv.0+0x96f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x38(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RDX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RSP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x198(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,0x1b0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R12),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x8(%R13),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R14),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %R10,%RSI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x8(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R14),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %R10,%RBX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV (%RAX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %R10,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x10(%R12),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R13),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %R10,%R14 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RSI,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R10,%R9 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R8,0x188(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL (%R13),%R10 | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x190(%RSP),%R13D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RBX,0x1a8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA -0x1(%R13),%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RDX,0x180(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0xe,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 426341 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.2.lto_priv.0+0x741> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOVSXD 0x1a0(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SHR $0x4,%R13D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
VPBROADCASTD 0x1a0(%RSP),%ZMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
LEA (%R15,%R14,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KXNORB %K1,%K1,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
SAL $0x7,%R13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
VBROADCASTSD 0x3cc1f(%RIP),%ZMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VBROADCASTSD 0x3cc2d(%RIP),%ZMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VXORPD %XMM8,%XMM8,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%RSI,%RAX,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R13,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x10,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%R11,%RSI,8),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x1b0(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %R13D,%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV $-0x2,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VPBROADCASTD %R13D,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV $0x1,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VPADDD 0x3ca50(%RIP),%ZMM1,%ZMM27 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
VBROADCASTSD 0x3cbd6(%RIP),%ZMM26 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
LEA (%R11,%RBX,8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x188(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RDI,%RAX,8),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %R10,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x180(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %R13D,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBROADCASTSD 0x3ca5b(%RIP),%ZMM24 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VMOVDQA32 %ZMM5,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VBROADCASTSD 0x3ca89(%RIP),%ZMM23 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
MOV 0x58(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R11,%RCX,8),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVDQA32 %ZMM2,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
LEA (%R10,%RAX,8),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R8,%R9,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVDQA32 %ZMM4,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x190(%RSP),%R12D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12D,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x10,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %ESI,0x1a4(%RSP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
ADD %ESI,0x1a0(%RSP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
AND $0xf,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 426561 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.2.lto_priv.0+0x961> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x78(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x68(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM12,%XMM12,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x70(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x188(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD 0x1a0(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x180(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R10,%R13,8),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%RDX,%RBX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x60(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x3c5be(%RIP),%XMM13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x1a4(%RSP),%R12D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RSI,%RDX,8),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %EAX,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x1bc(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x1a4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INCQ 0x198(%RSP) | 3 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV 0x48(%RSP),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RSP),%R9D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %R9D,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x198(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %EDI,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R8D,0x54(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 4265c0 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.2.lto_priv.0+0x9c0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x4c(%RSP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x1a4(%RSP),%R12D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%RSP),%R13D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x1b8(%RSP),%EDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %R12D,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R13D,0x1a0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 425d58 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.2.lto_priv.0+0x158> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
JMP 426561 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.2.lto_priv.0+0x961> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |