Function: PdV_kernel(bool, int, int, int, int, double, clover::Buffer2D<double>&, clover::Buffer2D<d ... | Module: exec | Source: PdV.cpp:69-84 [...] | Coverage: 4.95% |
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Function: PdV_kernel(bool, int, int, int, int, double, clover::Buffer2D<double>&, clover::Buffer2D<d ... | Module: exec | Source: PdV.cpp:69-84 [...] | Coverage: 4.95% |
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/scratch_na/users/xoserete/qaas_runs/171-415-4687/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/context.h: 69 - 69 |
-------------------------------------------------------------------------------- |
69: T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; } |
/scratch_na/users/xoserete/qaas_runs/171-415-4687/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/PdV.cpp: 69 - 84 |
-------------------------------------------------------------------------------- |
69: #pragma omp parallel for simd collapse(2) |
70: for (int j = (y_min + 1); j < (y_max + 2); j++) { |
71: for (int i = (x_min + 1); i < (x_max + 2); i++) { |
72: double left_flux = (xarea(i, j) * (xvel0(i, j) + xvel0(i + 0, j + 1) + xvel1(i, j) + xvel1(i + 0, j + 1))) * 0.25 * dt; |
73: double right_flux = |
74: (xarea(i + 1, j + 0) * (xvel0(i + 1, j + 0) + xvel0(i + 1, j + 1) + xvel1(i + 1, j + 0) + xvel1(i + 1, j + 1))) * 0.25 * dt; |
75: double bottom_flux = (yarea(i, j) * (yvel0(i, j) + yvel0(i + 1, j + 0) + yvel1(i, j) + yvel1(i + 1, j + 0))) * 0.25 * dt; |
76: double top_flux = |
77: (yarea(i + 0, j + 1) * (yvel0(i + 0, j + 1) + yvel0(i + 1, j + 1) + yvel1(i + 0, j + 1) + yvel1(i + 1, j + 1))) * 0.25 * dt; |
78: double total_flux = right_flux - left_flux + top_flux - bottom_flux; |
79: double volume_change_s = volume(i, j) / (volume(i, j) + total_flux); |
80: double recip_volume = 1.0 / volume(i, j); |
81: double energy_change = (pressure(i, j) / density0(i, j) + viscosity(i, j) / density0(i, j)) * total_flux * recip_volume; |
82: energy1(i, j) = energy0(i, j) - energy_change; |
83: density1(i, j) = density0(i, j) * volume_change_s; |
84: } |
0x4313c0 PUSH %RBP |
0x4313c1 MOV %RSP,%RBP |
0x4313c4 PUSH %R15 |
0x4313c6 PUSH %R14 |
0x4313c8 PUSH %R13 |
0x4313ca PUSH %R12 |
0x4313cc PUSH %RBX |
0x4313cd AND $-0x40,%RSP |
0x4313d1 SUB $0x540,%RSP |
0x4313d8 MOV 0x80(%RBP),%RAX |
0x4313df MOV 0x70(%RBP),%RBX |
0x4313e3 MOV 0x68(%RBP),%RSI |
0x4313e7 MOV 0x58(%RBP),%R10 |
0x4313eb MOV %R10,0x180(%RSP) |
0x4313f3 MOV 0x50(%RBP),%R14 |
0x4313f7 MOV 0x48(%RBP),%R15 |
0x4313fb MOV 0x40(%RBP),%R12 |
0x4313ff MOV 0x38(%RBP),%R10 |
0x431403 MOV %R10,0x28(%RSP) |
0x431408 MOV 0x30(%RBP),%R10 |
0x43140c MOV %R10,0x140(%RSP) |
0x431414 MOV 0x28(%RBP),%R13 |
0x431418 MOV 0x20(%RBP),%R10 |
0x43141c MOV %R10,0x18(%RSP) |
0x431421 MOV 0x18(%RBP),%R11 |
0x431425 MOV 0x10(%RBP),%R10 |
0x431429 MOV %R10,0x50(%RSP) |
0x43142e MOV 0x60(%RBP),%R10D |
0x431432 MOV %R10D,0x34(%RSP) |
0x431437 MOVL $0,0x84(%RSP) |
0x431442 TEST %RAX,%RAX |
0x431445 JS 431cb3 |
0x43144b MOV %R13,0x48(%RSP) |
0x431450 MOV %R11,0x40(%RSP) |
0x431455 MOV %RSI,0x38(%RSP) |
0x43145a MOV %RDX,%R13 |
0x43145d MOV %RCX,0x20(%RSP) |
0x431462 MOV %R8,0x58(%RSP) |
0x431467 MOV %R9,0x60(%RSP) |
0x43146c MOV (%RDI),%ESI |
0x43146e MOVQ $0,0xe8(%RSP) |
0x43147a MOV %RAX,0xe0(%RSP) |
0x431482 MOVQ $0x1,0x138(%RSP) |
0x43148e SUB $0x8,%RSP |
0x431492 LEA 0x140(%RSP),%RAX |
0x43149a LEA 0x8c(%RSP),%RCX |
0x4314a2 LEA 0xf0(%RSP),%R8 |
0x4314aa LEA 0xe8(%RSP),%R9 |
0x4314b2 MOV $0x6816f0,%EDI |
0x4314b7 MOV %ESI,0x88(%RSP) |
0x4314be MOV $0x22,%EDX |
0x4314c3 PUSH $0x1 |
0x4314c5 PUSH $0x1 |
0x4314c7 PUSH %RAX |
0x4314c8 CALL 403180 <__kmpc_for_static_init_8@plt> |
0x4314cd ADD $0x20,%RSP |
0x4314d1 MOV 0xe8(%RSP),%R11 |
0x4314d9 MOV 0xe0(%RSP),%RAX |
0x4314e1 MOV %RAX,0xc8(%RSP) |
0x4314e9 CMP %RAX,%R11 |
0x4314ec JA 431c91 |
0x4314f2 VMOVQ %R13,%XMM0 |
0x4314f7 MOV %RBX,%RCX |
0x4314fa SUB 0x38(%RSP),%ECX |
0x4314fe LEA 0x1(%R11),%RAX |
0x431502 MOV 0xc8(%RSP),%RDI |
0x43150a LEA 0x1(%RDI),%RSI |
0x43150e CMP %RSI,%RAX |
0x431511 CMOVG %RAX,%RSI |
0x431515 MOV 0x20(%RSP),%RAX |
0x43151a MOV (%RAX),%RDX |
0x43151d MOV %RDX,0x70(%RSP) |
0x431522 MOV 0x10(%RAX),%R13 |
0x431526 MOV (%R12),%RAX |
0x43152a MOV %RAX,0x78(%RSP) |
0x43152f MOV 0x10(%R12),%RAX |
0x431534 MOV %RAX,0xd8(%RSP) |
0x43153c MOV (%R15),%RAX |
0x43153f MOV %RAX,0xb8(%RSP) |
0x431547 MOV 0x10(%R15),%RAX |
0x43154b MOV %RAX,0x20(%RSP) |
0x431550 MOV 0x58(%RSP),%RAX |
0x431555 MOV (%RAX),%RDX |
0x431558 MOV %RDX,0xb0(%RSP) |
0x431560 MOV 0x10(%RAX),%RAX |
0x431564 MOV %RAX,0xa8(%RSP) |
0x43156c MOV (%R14),%RAX |
0x43156f MOV %RAX,0x68(%RSP) |
0x431574 MOV 0x10(%R14),%R15 |
0x431578 VMULSD 0x320d0(%RIP),%XMM0,%XMM4 |
0x431580 MOV 0x180(%RSP),%RAX |
0x431588 MOV (%RAX),%R10 |
0x43158b MOV 0x10(%RAX),%RAX |
0x43158f MOV %RAX,0xc0(%RSP) |
0x431597 MOV 0x60(%RSP),%RAX |
0x43159c MOV (%RAX),%RDX |
0x43159f MOV %RDX,0xa0(%RSP) |
0x4315a7 MOV 0x10(%RAX),%R14 |
0x4315ab MOV 0x140(%RSP),%RAX |
0x4315b3 MOV (%RAX),%RDX |
0x4315b6 MOV %RDX,0x98(%RSP) |
0x4315be MOV 0x10(%RAX),%RAX |
0x4315c2 MOV %RAX,0x58(%RSP) |
0x4315c7 MOV 0x50(%RSP),%RAX |
0x4315cc MOV (%RAX),%RBX |
0x4315cf MOV 0x10(%RAX),%RAX |
0x4315d3 MOV %RAX,0x90(%RSP) |
0x4315db MOV 0x28(%RSP),%RAX |
0x4315e0 MOV (%RAX),%R12 |
0x4315e3 MOV 0x10(%RAX),%RAX |
0x4315e7 MOV %RAX,0x50(%RSP) |
0x4315ec MOV 0x18(%RSP),%RAX |
0x4315f1 MOV (%RAX),%RDI |
0x4315f4 MOV 0x10(%RAX),%RAX |
0x4315f8 MOV %RAX,0xd0(%RSP) |
0x431600 MOV 0x48(%RSP),%RAX |
0x431605 MOV (%RAX),%R8 |
0x431608 MOV 0x10(%RAX),%RAX |
0x43160c MOV %RAX,0x48(%RSP) |
0x431611 MOV 0x40(%RSP),%RAX |
0x431616 MOV (%RAX),%R9 |
0x431619 MOV 0x10(%RAX),%RAX |
0x43161d SUB %R11,%RSI |
0x431620 MOV $-0x8,%EDX |
0x431625 MOV %RSI,0xf0(%RSP) |
0x43162d AND %RSI,%RDX |
0x431630 MOV %RDX,0x18(%RSP) |
0x431635 MOV 0xc0(%RSP),%RDX |
0x43163d MOV %R14,%RSI |
0x431640 MOV 0x78(%RSP),%R14 |
0x431645 MOV %RCX,0x88(%RSP) |
0x43164d MOV %R13,0x130(%RSP) |
0x431655 MOV %R15,0x128(%RSP) |
0x43165d MOV %R10,0x120(%RSP) |
0x431665 MOV %RSI,0x60(%RSP) |
0x43166a MOV %RBX,0x118(%RSP) |
0x431672 MOV %R12,0x110(%RSP) |
0x43167a MOV %RDI,0x108(%RSP) |
0x431682 MOV %R8,0x100(%RSP) |
0x43168a MOV %R9,0xf8(%RSP) |
0x431692 MOV %RAX,0x40(%RSP) |
0x431697 JE 431cc2 |
0x43169d VPBROADCASTQ %RCX,%ZMM0 |
0x4316a3 VMOVDQU64 %ZMM0,0x180(%RSP) |
0x4316ab MOV 0x34(%RSP),%EAX |
0x4316af VPBROADCASTD %EAX,%YMM0 |
0x4316b5 VMOVDQU %YMM0,0x140(%RSP) |
0x4316be MOV 0x38(%RSP),%RAX |
0x4316c3 VPBROADCASTD %EAX,%YMM0 |
0x4316c9 VMOVDQU %YMM0,0x1e0(%RSP) |
0x4316d2 MOV 0x70(%RSP),%RAX |
0x4316d7 VPBROADCASTQ %RAX,%ZMM0 |
0x4316dd VMOVDQU64 %ZMM0,0x4c0(%RSP) |
0x4316e5 VPBROADCASTQ %R14,%ZMM0 |
0x4316eb VMOVDQU64 %ZMM0,0x480(%RSP) |
0x4316f3 MOV 0xb8(%RSP),%RAX |
0x4316fb VPBROADCASTQ %RAX,%ZMM0 |
0x431701 VMOVDQU64 %ZMM0,0x440(%RSP) |
0x431709 MOV 0xb0(%RSP),%RAX |
0x431711 VPBROADCASTQ %RAX,%ZMM0 |
0x431717 VMOVDQU64 %ZMM0,0x400(%RSP) |
0x43171f MOV 0x68(%RSP),%RAX |
0x431724 VPBROADCASTQ %RAX,%ZMM25 |
0x43172a VPBROADCASTQ %R10,%ZMM26 |
0x431730 VMOVUPD %XMM4,0x170(%RSP) |
0x431739 VBROADCASTSD %XMM4,%ZMM0 |
0x43173f VMOVUPD %ZMM0,0x3c0(%RSP) |
0x431747 MOV 0xa0(%RSP),%RAX |
0x43174f VPBROADCASTQ %RAX,%ZMM0 |
0x431755 VMOVDQU64 %ZMM0,0x380(%RSP) |
0x43175d MOV 0x98(%RSP),%RAX |
0x431765 VPBROADCASTQ %RAX,%ZMM0 |
0x43176b VMOVDQU64 %ZMM0,0x340(%RSP) |
0x431773 VPBROADCASTQ %RBX,%ZMM0 |
0x431779 VMOVDQU64 %ZMM0,0x300(%RSP) |
0x431781 VPBROADCASTQ %R12,%ZMM0 |
0x431787 VMOVDQU64 %ZMM0,0x2c0(%RSP) |
0x43178f VPBROADCASTQ %RDI,%ZMM0 |
0x431795 VMOVDQU64 %ZMM0,0x280(%RSP) |
0x43179d VPBROADCASTQ %R8,%ZMM0 |
0x4317a3 VMOVDQU64 %ZMM0,0x240(%RSP) |
0x4317ab MOV %R11,0x28(%RSP) |
0x4317b0 VPBROADCASTQ %R11,%ZMM0 |
0x4317b6 VPADDQ 0x37b40(%RIP),%ZMM0,%ZMM17 |
0x4317c0 VPBROADCASTQ %R9,%ZMM0 |
0x4317c6 VMOVDQU64 %ZMM0,0x200(%RSP) |
0x4317ce MOV %RDX,%RSI |
0x4317d1 XOR %EBX,%EBX |
0x4317d3 MOV 0x20(%RSP),%R14 |
0x4317d8 MOV 0xa8(%RSP),%RDI |
0x4317e0 MOV 0x90(%RSP),%R12 |
0x4317e8 NOPL (%RAX,%RAX,1) |
(246) 0x4317f0 VMOVDQA64 %ZMM17,%ZMM0 |
(246) 0x4317f6 VMOVUPS 0x180(%RSP),%ZMM16 |
(246) 0x4317fe VMOVAPS %ZMM16,%ZMM1 |
(246) 0x431804 MOV $0x451520,%RAX |
(246) 0x43180b CALL %RAX |
(246) 0x43180d VPMOVQD %ZMM0,%YMM0 |
(246) 0x431813 VPADDD 0x140(%RSP),%YMM0,%YMM21 |
(246) 0x43181b VMOVDQA64 %ZMM17,%ZMM0 |
(246) 0x431821 VMOVAPS %ZMM16,%ZMM1 |
(246) 0x431827 CALL 4513a0 <__svml_i64rem8_z0> |
(246) 0x43182d VPMOVQD %ZMM0,%YMM1 |
(246) 0x431833 VPMOVSXDQ %YMM21,%ZMM0 |
(246) 0x431839 VMOVDQU64 0x4c0(%RSP),%ZMM2 |
(246) 0x431841 VPXOR %XMM6,%XMM6,%XMM6 |
(246) 0x431845 VPMULLQ %ZMM0,%ZMM2,%ZMM6 |
(246) 0x43184b VPADDD 0x1e0(%RSP),%YMM1,%YMM8 |
(246) 0x431854 VPXOR %XMM2,%XMM2,%XMM2 |
(246) 0x431858 KXNORW %K0,%K0,%K1 |
(246) 0x43185c VMOVDQU64 0x480(%RSP),%ZMM3 |
(246) 0x431864 VPMULLQ %ZMM0,%ZMM3,%ZMM9 |
(246) 0x43186a VPCMPEQD %YMM10,%YMM10,%YMM10 |
(246) 0x43186f VPSUBD %YMM10,%YMM21,%YMM1 |
(246) 0x431875 VPMOVSXDQ %YMM1,%ZMM14 |
(246) 0x43187b VPMULLQ %ZMM14,%ZMM3,%ZMM27 |
(246) 0x431881 VPMOVSXDQ %YMM8,%ZMM1 |
(246) 0x431887 VPXOR %XMM3,%XMM3,%XMM3 |
(246) 0x43188b KXNORW %K0,%K0,%K4 |
(246) 0x43188f VMOVDQU64 0x440(%RSP),%ZMM5 |
(246) 0x431897 VPMULLQ %ZMM0,%ZMM5,%ZMM11 |
(246) 0x43189d VPADDQ %ZMM1,%ZMM6,%ZMM12 |
(246) 0x4318a3 VXORPD %XMM4,%XMM4,%XMM4 |
(246) 0x4318a7 KXNORW %K0,%K0,%K2 |
(246) 0x4318ab VPMULLQ %ZMM14,%ZMM5,%ZMM29 |
(246) 0x4318b1 VPADDQ %ZMM1,%ZMM9,%ZMM13 |
(246) 0x4318b7 VPXOR %XMM5,%XMM5,%XMM5 |
(246) 0x4318bb KXNORW %K0,%K0,%K5 |
(246) 0x4318bf VXORPD %XMM7,%XMM7,%XMM7 |
(246) 0x4318c3 KXNORW %K0,%K0,%K3 |
(246) 0x4318c7 VPSUBD %YMM10,%YMM8,%YMM8 |
(246) 0x4318cc VPADDQ %ZMM1,%ZMM11,%ZMM15 |
(246) 0x4318d2 VPMOVSXDQ %YMM8,%ZMM10 |
(246) 0x4318d8 VPADDQ %ZMM10,%ZMM6,%ZMM21 |
(246) 0x4318de VPXOR %XMM6,%XMM6,%XMM6 |
(246) 0x4318e2 KXNORW %K0,%K0,%K6 |
(246) 0x4318e6 VPXOR %XMM8,%XMM8,%XMM8 |
(246) 0x4318eb VPADDQ %ZMM10,%ZMM9,%ZMM28 |
(246) 0x4318f1 KXNORW %K0,%K0,%K7 |
(246) 0x4318f5 VGATHERQPD (%R13,%ZMM12,8),%ZMM2{%K1} |
(246) 0x4318fd VPXOR %XMM9,%XMM9,%XMM9 |
(246) 0x431902 KXNORW %K0,%K0,%K1 |
(246) 0x431906 VMOVDQU64 0x400(%RSP),%ZMM16 |
(246) 0x43190e VPMULLQ %ZMM0,%ZMM16,%ZMM30 |
(246) 0x431914 VPADDQ %ZMM10,%ZMM11,%ZMM31 |
(246) 0x43191a VPXOR %XMM11,%XMM11,%XMM11 |
(246) 0x43191f MOV 0xd8(%RSP),%RAX |
(246) 0x431927 VGATHERQPD (%RAX,%ZMM13,8),%ZMM3{%K4} |
(246) 0x43192e KXNORW %K0,%K0,%K4 |
(246) 0x431932 VGATHERQPD (%R14,%ZMM15,8),%ZMM5{%K5} |
(246) 0x431939 VXORPD %XMM12,%XMM12,%XMM12 |
(246) 0x43193e VGATHERQPD (%R13,%ZMM21,8),%ZMM6{%K6} |
(246) 0x431946 VPADDQ %ZMM1,%ZMM30,%ZMM21 |
(246) 0x43194c VGATHERQPD (%RAX,%ZMM28,8),%ZMM8{%K7} |
(246) 0x431953 VXORPD %XMM13,%XMM13,%XMM13 |
(246) 0x431958 VGATHERQPD (%R14,%ZMM31,8),%ZMM11{%K4} |
(246) 0x43195f KXNORW %K0,%K0,%K4 |
(246) 0x431963 VPXORD %XMM28,%XMM28,%XMM28 |
(246) 0x431969 VPMULLQ %ZMM0,%ZMM25,%ZMM28 |
(246) 0x43196f VPADDQ %ZMM1,%ZMM28,%ZMM30 |
(246) 0x431975 VPADDQ %ZMM1,%ZMM27,%ZMM31 |
(246) 0x43197b VXORPD %XMM15,%XMM15,%XMM15 |
(246) 0x431980 VGATHERQPD (%RDI,%ZMM21,8),%ZMM13{%K4} |
(246) 0x431987 KXNORW %K0,%K0,%K4 |
(246) 0x43198b VPADDQ %ZMM10,%ZMM28,%ZMM18 |
(246) 0x431991 VPMULLQ %ZMM0,%ZMM26,%ZMM19 |
(246) 0x431997 VPADDQ %ZMM1,%ZMM29,%ZMM20 |
(246) 0x43199d VXORPD %XMM21,%XMM21,%XMM21 |
(246) 0x4319a3 VGATHERQPD (%R15,%ZMM30,8),%ZMM15{%K4} |
(246) 0x4319aa KXNORW %K0,%K0,%K4 |
(246) 0x4319ae VPADDQ %ZMM1,%ZMM19,%ZMM30 |
(246) 0x4319b4 VPMULLQ %ZMM14,%ZMM16,%ZMM16 |
(246) 0x4319ba VPADDQ %ZMM10,%ZMM27,%ZMM22 |
(246) 0x4319c0 VPXORD %XMM28,%XMM28,%XMM28 |
(246) 0x4319c6 VGATHERQPD (%R15,%ZMM18,8),%ZMM21{%K4} |
(246) 0x4319cd KXNORW %K0,%K0,%K4 |
(246) 0x4319d1 VPADDQ %ZMM10,%ZMM19,%ZMM18 |
(246) 0x4319d7 VPXORD %XMM19,%XMM19,%XMM19 |
(246) 0x4319dd VPMULLQ %ZMM14,%ZMM25,%ZMM19 |
(246) 0x4319e3 VPADDQ %ZMM10,%ZMM29,%ZMM23 |
(246) 0x4319e9 VPXORD %XMM29,%XMM29,%XMM29 |
(246) 0x4319ef VGATHERQPD (%RSI,%ZMM30,8),%ZMM28{%K4} |
(246) 0x4319f6 KXNORW %K0,%K0,%K4 |
(246) 0x4319fa VGATHERQPD (%RSI,%ZMM18,8),%ZMM29{%K4} |
(246) 0x431a01 KXNORW %K0,%K0,%K4 |
(246) 0x431a05 VGATHERQPD (%RAX,%ZMM31,8),%ZMM4{%K2} |
(246) 0x431a0c VPXORD %XMM27,%XMM27,%XMM27 |
(246) 0x431a12 VGATHERQPD (%R14,%ZMM20,8),%ZMM7{%K3} |
(246) 0x431a19 KXNORW %K0,%K0,%K2 |
(246) 0x431a1d VXORPD %XMM30,%XMM30,%XMM30 |
(246) 0x431a23 VPXORD %XMM18,%XMM18,%XMM18 |
(246) 0x431a29 VPMULLQ %ZMM14,%ZMM26,%ZMM18 |
(246) 0x431a2f VPADDQ %ZMM1,%ZMM16,%ZMM16 |
(246) 0x431a35 KXNORW %K0,%K0,%K3 |
(246) 0x431a39 VPXOR %XMM14,%XMM14,%XMM14 |
(246) 0x431a3e VMOVDQU64 0x340(%RSP),%ZMM20 |
(246) 0x431a46 VPMULLQ %ZMM0,%ZMM20,%ZMM20 |
(246) 0x431a4c VPADDQ %ZMM1,%ZMM19,%ZMM24 |
(246) 0x431a52 VPADDQ %ZMM1,%ZMM20,%ZMM20 |
(246) 0x431a58 VGATHERQPD (%RAX,%ZMM22,8),%ZMM9{%K1} |
(246) 0x431a5f VXORPD %XMM31,%XMM31,%XMM31 |
(246) 0x431a65 VGATHERQPD (%R14,%ZMM23,8),%ZMM12{%K4} |
(246) 0x431a6c KXNORW %K0,%K0,%K1 |
(246) 0x431a70 VMOVDQU64 0x2c0(%RSP),%ZMM22 |
(246) 0x431a78 VPMULLQ %ZMM0,%ZMM22,%ZMM22 |
(246) 0x431a7e VPADDQ %ZMM1,%ZMM22,%ZMM22 |
(246) 0x431a84 VPADDQ %ZMM10,%ZMM19,%ZMM19 |
(246) 0x431a8a VXORPD %XMM23,%XMM23,%XMM23 |
(246) 0x431a90 MOV 0x58(%RSP),%RAX |
(246) 0x431a95 VGATHERQPD (%RAX,%ZMM20,8),%ZMM31{%K1} |
(246) 0x431a9c KXNORW %K0,%K0,%K1 |
(246) 0x431aa0 MOV 0x50(%RSP),%RAX |
(246) 0x431aa5 VGATHERQPD (%RAX,%ZMM22,8),%ZMM23{%K1} |
(246) 0x431aac KXNORW %K0,%K0,%K1 |
(246) 0x431ab0 VPADDQ %ZMM1,%ZMM18,%ZMM20 |
(246) 0x431ab6 VMOVDQU64 0x380(%RSP),%ZMM22 |
(246) 0x431abe VPMULLQ %ZMM0,%ZMM22,%ZMM22 |
(246) 0x431ac4 VPADDQ %ZMM10,%ZMM18,%ZMM10 |
(246) 0x431aca VPXORD %XMM18,%XMM18,%XMM18 |
(246) 0x431ad0 VGATHERQPD (%RDI,%ZMM16,8),%ZMM27{%K2} |
(246) 0x431ad7 KXNORW %K0,%K0,%K2 |
(246) 0x431adb VGATHERQPD (%R15,%ZMM24,8),%ZMM30{%K3} |
(246) 0x431ae2 VXORPD %XMM16,%XMM16,%XMM16 |
(246) 0x431ae8 VGATHERQPD (%R15,%ZMM19,8),%ZMM14{%K1} |
(246) 0x431aef KXNORW %K0,%K0,%K1 |
(246) 0x431af3 VGATHERQPD (%RSI,%ZMM20,8),%ZMM18{%K2} |
(246) 0x431afa VPADDQ %ZMM1,%ZMM22,%ZMM19 |
(246) 0x431b00 VGATHERQPD (%RSI,%ZMM10,8),%ZMM16{%K1} |
(246) 0x431b07 VXORPD %XMM10,%XMM10,%XMM10 |
(246) 0x431b0c KXNORW %K0,%K0,%K1 |
(246) 0x431b10 VMOVDQU64 0x300(%RSP),%ZMM20 |
(246) 0x431b18 VPMULLQ %ZMM0,%ZMM20,%ZMM20 |
(246) 0x431b1e VPADDQ %ZMM1,%ZMM20,%ZMM20 |
(246) 0x431b24 VPXORD %XMM22,%XMM22,%XMM22 |
(246) 0x431b2a MOV 0x60(%RSP),%RAX |
(246) 0x431b2f VGATHERQPD (%RAX,%ZMM19,8),%ZMM10{%K1} |
(246) 0x431b36 KXNORW %K0,%K0,%K1 |
(246) 0x431b3a VGATHERQPD (%R12,%ZMM20,8),%ZMM22{%K1} |
(246) 0x431b41 VADDPD %ZMM5,%ZMM3,%ZMM3 |
(246) 0x431b47 VADDPD %ZMM7,%ZMM4,%ZMM4 |
(246) 0x431b4d VADDPD %ZMM3,%ZMM4,%ZMM3 |
(246) 0x431b53 VMULPD %ZMM2,%ZMM3,%ZMM2 |
(246) 0x431b59 VADDPD %ZMM15,%ZMM21,%ZMM3 |
(246) 0x431b5f VADDPD %ZMM29,%ZMM28,%ZMM4 |
(246) 0x431b65 VADDPD %ZMM4,%ZMM3,%ZMM3 |
(246) 0x431b6b VFNMSUB213PD %ZMM2,%ZMM13,%ZMM3 |
(246) 0x431b71 VADDPD %ZMM11,%ZMM8,%ZMM2 |
(246) 0x431b77 VADDPD %ZMM12,%ZMM9,%ZMM4 |
(246) 0x431b7d VADDPD %ZMM2,%ZMM4,%ZMM2 |
(246) 0x431b83 VADDPD %ZMM30,%ZMM14,%ZMM4 |
(246) 0x431b89 VFMADD231PD %ZMM2,%ZMM6,%ZMM3 |
(246) 0x431b8f VADDPD %ZMM16,%ZMM18,%ZMM2 |
(246) 0x431b95 VMOVDQU64 0x280(%RSP),%ZMM5 |
(246) 0x431b9d VPMULLQ %ZMM0,%ZMM5,%ZMM5 |
(246) 0x431ba3 VXORPD %XMM6,%XMM6,%XMM6 |
(246) 0x431ba7 VPADDQ %ZMM1,%ZMM5,%ZMM5 |
(246) 0x431bad KXNORW %K0,%K0,%K1 |
(246) 0x431bb1 MOV 0xd0(%RSP),%RAX |
(246) 0x431bb9 VGATHERQPD (%RAX,%ZMM5,8),%ZMM6{%K1} |
(246) 0x431bc0 VADDPD %ZMM2,%ZMM4,%ZMM2 |
(246) 0x431bc6 VFMADD213PD %ZMM3,%ZMM27,%ZMM2 |
(246) 0x431bcc VMULPD 0x3c0(%RSP),%ZMM2,%ZMM2 |
(246) 0x431bd4 VADDPD %ZMM31,%ZMM23,%ZMM3 |
(246) 0x431bda VMULPD %ZMM10,%ZMM22,%ZMM4 |
(246) 0x431be0 VMULPD %ZMM2,%ZMM3,%ZMM3 |
(246) 0x431be6 VDIVPD %ZMM4,%ZMM3,%ZMM3 |
(246) 0x431bec VMOVDQU64 0x240(%RSP),%ZMM4 |
(246) 0x431bf4 VPMULLQ %ZMM0,%ZMM4,%ZMM4 |
(246) 0x431bfa VSUBPD %ZMM3,%ZMM6,%ZMM3 |
(246) 0x431c00 VPADDQ %ZMM1,%ZMM4,%ZMM4 |
(246) 0x431c06 KXNORW %K0,%K0,%K1 |
(246) 0x431c0a VXORPD %XMM5,%XMM5,%XMM5 |
(246) 0x431c0e MOV 0x48(%RSP),%RAX |
(246) 0x431c13 VSCATTERQPD %ZMM3,(%RAX,%ZMM4,8){%K1} |
(246) 0x431c1a KXNORW %K0,%K0,%K1 |
(246) 0x431c1e VGATHERQPD (%R12,%ZMM20,8),%ZMM5{%K1} |
(246) 0x431c25 VADDPD %ZMM10,%ZMM2,%ZMM2 |
(246) 0x431c2b VMULPD %ZMM10,%ZMM5,%ZMM3 |
(246) 0x431c31 VDIVPD %ZMM2,%ZMM3,%ZMM2 |
(246) 0x431c37 VMOVDQU64 0x200(%RSP),%ZMM3 |
(246) 0x431c3f VPMULLQ %ZMM0,%ZMM3,%ZMM0 |
(246) 0x431c45 VPADDQ %ZMM1,%ZMM0,%ZMM0 |
(246) 0x431c4b KXNORW %K0,%K0,%K1 |
(246) 0x431c4f MOV 0x40(%RSP),%RAX |
(246) 0x431c54 VSCATTERQPD %ZMM2,(%RAX,%ZMM0,8){%K1} |
(246) 0x431c5b VPADDQ 0x319f3(%RIP){1to8},%ZMM17,%ZMM17 |
(246) 0x431c65 ADD $0x8,%RBX |
(246) 0x431c69 CMP 0x18(%RSP),%RBX |
(246) 0x431c6e JB 4317f0 |
0x431c74 MOV 0x18(%RSP),%RCX |
0x431c79 CMP %RCX,0xf0(%RSP) |
0x431c81 MOV 0x28(%RSP),%R11 |
0x431c86 VMOVUPD 0x170(%RSP),%XMM4 |
0x431c8f JNE 431ccc |
0x431c91 MOV $0x681710,%EDI |
0x431c96 MOV 0x80(%RSP),%ESI |
0x431c9d LEA -0x28(%RBP),%RSP |
0x431ca1 POP %RBX |
0x431ca2 POP %R12 |
0x431ca4 POP %R13 |
0x431ca6 POP %R14 |
0x431ca8 POP %R15 |
0x431caa POP %RBP |
0x431cab VZEROUPPER |
0x431cae JMP 402fe0 |
0x431cb3 LEA -0x28(%RBP),%RSP |
0x431cb7 POP %RBX |
0x431cb8 POP %R12 |
0x431cba POP %R13 |
0x431cbc POP %R14 |
0x431cbe POP %R15 |
0x431cc0 POP %RBP |
0x431cc1 RET |
0x431cc2 MOV 0x20(%RSP),%R14 |
0x431cc7 JMP 431f79 |
0x431ccc ADD %RCX,%R11 |
0x431ccf JMP 431f79 |
0x431cd4 NOPW %CS:(%RAX,%RAX,1) |
(245) 0x431ce0 MOV %R11,%RAX |
(245) 0x431ce3 CQTO |
(245) 0x431ce5 IDIV %R9 |
(245) 0x431ce8 ADD %R10D,%EDX |
(245) 0x431ceb MOVSXD %EDX,%RDX |
(245) 0x431cee MOVSXD %ECX,%RAX |
(245) 0x431cf1 MOV %RSI,%R9 |
(245) 0x431cf4 IMUL %RAX,%R9 |
(245) 0x431cf8 LEA (%R9,%RDX,1),%R11 |
(245) 0x431cfc MOV %R13,%R8 |
(245) 0x431cff IMUL %RAX,%R8 |
(245) 0x431d03 LEA (%R8,%RDX,1),%R10 |
(245) 0x431d07 LEA 0x1(%RAX),%ECX |
(245) 0x431d0a MOVSXD %ECX,%RCX |
(245) 0x431d0d MOV %RCX,0x18(%RSP) |
(245) 0x431d12 IMUL %RCX,%R13 |
(245) 0x431d16 MOV 0xd8(%RSP),%RSI |
(245) 0x431d1e VMOVSD (%RSI,%R10,8),%XMM0 |
(245) 0x431d24 MOV 0xb8(%RSP),%R12 |
(245) 0x431d2c MOV %R12,%R10 |
(245) 0x431d2f IMUL %RAX,%R10 |
(245) 0x431d33 LEA (%R10,%RDX,1),%RBX |
(245) 0x431d37 VMOVSD (%R14,%RBX,8),%XMM1 |
(245) 0x431d3d MOV %RSI,%R14 |
(245) 0x431d40 IMUL %RCX,%R12 |
(245) 0x431d44 LEA 0x1(%R8,%RDX,1),%R8 |
(245) 0x431d49 LEA 0x1(%R13,%RDX,1),%RCX |
(245) 0x431d4e MOV %RCX,0x180(%RSP) |
(245) 0x431d56 ADD %RDX,%R13 |
(245) 0x431d59 VMOVSD (%RSI,%R8,8),%XMM2 |
(245) 0x431d5f LEA 0x1(%R12,%RDX,1),%RCX |
(245) 0x431d64 MOV %RCX,0x140(%RSP) |
(245) 0x431d6c VADDSD (%RSI,%R13,8),%XMM0,%XMM0 |
(245) 0x431d72 ADD %RDX,%R12 |
(245) 0x431d75 MOV %R15,%R13 |
(245) 0x431d78 IMUL %RAX,%R13 |
(245) 0x431d7c MOV 0x20(%RSP),%RDI |
(245) 0x431d81 VADDSD (%RDI,%R12,8),%XMM1,%XMM1 |
(245) 0x431d87 LEA 0x1(%R13,%RDX,1),%R8 |
(245) 0x431d8c ADD %RDX,%R13 |
(245) 0x431d8f MOV 0x128(%RSP),%RSI |
(245) 0x431d97 VMOVSD (%RSI,%R13,8),%XMM3 |
(245) 0x431d9d MOV 0x120(%RSP),%RBX |
(245) 0x431da5 MOV %RBX,%R13 |
(245) 0x431da8 IMUL %RAX,%R13 |
(245) 0x431dac VADDSD %XMM0,%XMM1,%XMM0 |
(245) 0x431db0 MOV 0x130(%RSP),%RDI |
(245) 0x431db8 VMULSD (%RDI,%R11,8),%XMM0,%XMM0 |
(245) 0x431dbe LEA (%R13,%RDX,1),%R11 |
(245) 0x431dc3 MOV 0xc0(%RSP),%R12 |
(245) 0x431dcb VMOVSD (%R12,%R11,8),%XMM1 |
(245) 0x431dd1 VADDSD (%RSI,%R8,8),%XMM3,%XMM3 |
(245) 0x431dd7 MOV 0x20(%RSP),%RCX |
(245) 0x431ddc LEA 0x1(%R13,%RDX,1),%R11 |
(245) 0x431de1 VADDSD (%R12,%R11,8),%XMM1,%XMM1 |
(245) 0x431de7 MOV 0xb0(%RSP),%R13 |
(245) 0x431def MOV %R13,%R11 |
(245) 0x431df2 IMUL %RAX,%R11 |
(245) 0x431df6 ADD %RDX,%R11 |
(245) 0x431df9 VADDSD %XMM3,%XMM1,%XMM1 |
(245) 0x431dfd MOV %R15,%R8 |
(245) 0x431e00 MOV 0xa8(%RSP),%R15 |
(245) 0x431e08 VFNMSUB132SD (%R15,%R11,8),%XMM0,%XMM1 |
(245) 0x431e0e LEA 0x1(%R10,%RDX,1),%R10 |
(245) 0x431e13 VMOVSD (%RCX,%R10,8),%XMM0 |
(245) 0x431e19 MOV 0x180(%RSP),%R10 |
(245) 0x431e21 VADDSD (%R14,%R10,8),%XMM2,%XMM2 |
(245) 0x431e27 MOV %RCX,%R14 |
(245) 0x431e2a LEA 0x1(%R9,%RDX,1),%R9 |
(245) 0x431e2f MOV 0x140(%RSP),%RCX |
(245) 0x431e37 VADDSD (%R14,%RCX,8),%XMM0,%XMM0 |
(245) 0x431e3d MOV 0x18(%RSP),%RCX |
(245) 0x431e42 IMUL %RCX,%R8 |
(245) 0x431e46 VADDSD %XMM2,%XMM0,%XMM0 |
(245) 0x431e4a VFMADD132SD (%RDI,%R9,8),%XMM1,%XMM0 |
(245) 0x431e50 LEA 0x1(%R8,%RDX,1),%R9 |
(245) 0x431e55 ADD %RDX,%R8 |
(245) 0x431e58 VMOVSD (%RSI,%R8,8),%XMM1 |
(245) 0x431e5e MOV %R13,%R8 |
(245) 0x431e61 IMUL %RCX,%R8 |
(245) 0x431e65 IMUL %RBX,%RCX |
(245) 0x431e69 VADDSD (%RSI,%R9,8),%XMM1,%XMM1 |
(245) 0x431e6f LEA (%RCX,%RDX,1),%R9 |
(245) 0x431e73 VMOVSD (%R12,%R9,8),%XMM2 |
(245) 0x431e79 ADD %RDX,%R8 |
(245) 0x431e7c LEA 0x1(%RCX,%RDX,1),%RCX |
(245) 0x431e81 VADDSD (%R12,%RCX,8),%XMM2,%XMM2 |
(245) 0x431e87 VADDSD %XMM1,%XMM2,%XMM1 |
(245) 0x431e8b VFMADD132SD (%R15,%R8,8),%XMM0,%XMM1 |
(245) 0x431e91 VMULSD %XMM4,%XMM1,%XMM0 |
(245) 0x431e95 MOV 0xa0(%RSP),%RCX |
(245) 0x431e9d IMUL %RAX,%RCX |
(245) 0x431ea1 ADD %RDX,%RCX |
(245) 0x431ea4 MOV 0x60(%RSP),%RSI |
(245) 0x431ea9 VMOVSD (%RSI,%RCX,8),%XMM1 |
(245) 0x431eae MOV 0x98(%RSP),%RCX |
(245) 0x431eb6 IMUL %RAX,%RCX |
(245) 0x431eba ADD %RDX,%RCX |
(245) 0x431ebd MOV 0x110(%RSP),%R8 |
(245) 0x431ec5 IMUL %RAX,%R8 |
(245) 0x431ec9 ADD %RDX,%R8 |
(245) 0x431ecc MOV 0x50(%RSP),%RSI |
(245) 0x431ed1 VMOVSD (%RSI,%R8,8),%XMM2 |
(245) 0x431ed7 MOV 0x118(%RSP),%R8 |
(245) 0x431edf IMUL %RAX,%R8 |
(245) 0x431ee3 ADD %RDX,%R8 |
(245) 0x431ee6 MOV 0x58(%RSP),%RSI |
(245) 0x431eeb VADDSD (%RSI,%RCX,8),%XMM2,%XMM2 |
(245) 0x431ef0 VMULSD %XMM0,%XMM2,%XMM2 |
(245) 0x431ef4 MOV 0x90(%RSP),%RSI |
(245) 0x431efc VMULSD (%RSI,%R8,8),%XMM1,%XMM3 |
(245) 0x431f02 VDIVSD %XMM3,%XMM2,%XMM2 |
(245) 0x431f06 MOV 0x108(%RSP),%RCX |
(245) 0x431f0e IMUL %RAX,%RCX |
(245) 0x431f12 ADD %RDX,%RCX |
(245) 0x431f15 MOV 0xd0(%RSP),%RDI |
(245) 0x431f1d VMOVSD (%RDI,%RCX,8),%XMM3 |
(245) 0x431f22 VSUBSD %XMM2,%XMM3,%XMM2 |
(245) 0x431f26 MOV 0x100(%RSP),%RCX |
(245) 0x431f2e IMUL %RAX,%RCX |
(245) 0x431f32 ADD %RDX,%RCX |
(245) 0x431f35 MOV 0x48(%RSP),%RDI |
(245) 0x431f3a VMOVSD %XMM2,(%RDI,%RCX,8) |
(245) 0x431f3f VMULSD (%RSI,%R8,8),%XMM1,%XMM2 |
(245) 0x431f45 IMUL 0xf8(%RSP),%RAX |
(245) 0x431f4e ADD %RDX,%RAX |
(245) 0x431f51 VADDSD %XMM1,%XMM0,%XMM0 |
(245) 0x431f55 VDIVSD %XMM0,%XMM2,%XMM0 |
(245) 0x431f59 MOV 0x40(%RSP),%RCX |
(245) 0x431f5e VMOVSD %XMM0,(%RCX,%RAX,8) |
(245) 0x431f63 MOV 0x28(%RSP),%R11 |
(245) 0x431f68 INC %R11 |
(245) 0x431f6b CMP 0xc8(%RSP),%R11 |
(245) 0x431f73 JG 431c91 |
(245) 0x431f79 MOV %R11,%R8 |
(245) 0x431f7c SHR $0x20,%R8 |
(245) 0x431f80 JE 431fa0 |
(245) 0x431f82 MOV %R11,%RAX |
(245) 0x431f85 XOR %EDX,%EDX |
(245) 0x431f87 MOV 0x88(%RSP),%R9 |
(245) 0x431f8f DIV %R9 |
(245) 0x431f92 MOV %RAX,%RCX |
(245) 0x431f95 JMP 431fb2 |
0x431f97 NOPW (%RAX,%RAX,1) |
(245) 0x431fa0 MOV %R11D,%EAX |
(245) 0x431fa3 XOR %EDX,%EDX |
(245) 0x431fa5 MOV 0x88(%RSP),%R9 |
(245) 0x431fad DIV %R9D |
(245) 0x431fb0 MOV %EAX,%ECX |
(245) 0x431fb2 MOV 0x38(%RSP),%R10 |
(245) 0x431fb7 MOV 0x78(%RSP),%R13 |
(245) 0x431fbc MOV 0x68(%RSP),%R15 |
(245) 0x431fc1 MOV 0x70(%RSP),%RSI |
(245) 0x431fc6 ADD 0x34(%RSP),%ECX |
(245) 0x431fca TEST %R8,%R8 |
(245) 0x431fcd MOV %R11,0x28(%RSP) |
(245) 0x431fd2 JNE 431ce0 |
(245) 0x431fd8 MOV %R11D,%EAX |
(245) 0x431fdb XOR %EDX,%EDX |
(245) 0x431fdd DIV %R9D |
(245) 0x431fe0 JMP 431ce8 |
0x431fe5 NOPW %CS:(%RAX,%RAX,1) |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_invoke_task_func | libiomp5.so |
Path / |
Source file and lines | PdV.cpp:69-84 |
Module | exec |
nb instructions | 223 |
nb uops | 225 |
loop length | 1200 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 1 |
used zmm registers | 4 |
nb stack references | 70 |
micro-operation queue | 37.50 cycles |
front end | 37.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 5.50 | 5.60 | 29.67 | 29.67 | 37.00 | 19.00 | 5.50 | 37.00 | 37.00 | 37.00 | 5.40 | 29.67 |
cycles | 5.50 | 5.60 | 29.67 | 29.67 | 37.00 | 19.00 | 5.50 | 37.00 | 37.00 | 37.00 | 5.40 | 29.67 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 38.20 |
Stall cycles | 0.84 |
LM full (events) | 2.01 |
Front-end | 37.50 |
Dispatch | 37.00 |
Overall L1 | 37.50 |
all | 13% |
load | 4% |
store | 22% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 50% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 3% |
all | 60% |
load | 50% |
store | 100% |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 15% |
load | 8% |
store | 25% |
mul | 0% |
add-sub | 50% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 3% |
all | 22% |
load | 15% |
store | 30% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 56% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 35% |
load | 18% |
store | 62% |
mul | 12% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
all | 22% |
load | 15% |
store | 31% |
mul | 12% |
add-sub | 56% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x540,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x80(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x70(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x68(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,0x180(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RBP),%R10D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10D,0x34(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0,0x84(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 431cb3 <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0x8f3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R13,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVQ $0,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0x1,0x138(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x140(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x8c(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0xf0(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0xe8(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x6816f0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 403180 <__kmpc_for_static_init_8@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xe8(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe0(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RAX,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JA 431c91 <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0x8d1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVQ %R13,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV %RBX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB 0x38(%RSP),%ECX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
LEA 0x1(%R11),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xc8(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDI),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RSI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVG %RAX,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R12),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%R12),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R15),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%R15),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R14),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%R14),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMULSD 0x320d0(%RIP),%XMM0,%XMM4 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
MOV 0x180(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x140(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %R11,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $-0x8,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RSI,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
AND %RSI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RDX,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc0(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x78(%RSP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,0x130(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0x120(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0x118(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,0x110(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,0x108(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 431cc2 <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0x902> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VPBROADCASTQ %RCX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x180(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0x34(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %EAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x38(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %EAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x1e0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x70(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x4c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPBROADCASTQ %R14,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x480(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0xb8(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x440(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0xb0(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x400(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0x68(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %R10,%ZMM26 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %XMM4,0x170(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VBROADCASTSD %XMM4,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %ZMM0,0x3c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0xa0(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x380(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0x98(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x340(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPBROADCASTQ %RBX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x300(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPBROADCASTQ %R12,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x2c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPBROADCASTQ %RDI,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x280(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPBROADCASTQ %R8,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x240(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV %R11,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPBROADCASTQ %R11,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPADDQ 0x37b40(%RIP),%ZMM0,%ZMM17 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
VPBROADCASTQ %R9,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x200(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV %RDX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EBX,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x20(%RSP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xa8(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x90(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x18(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RCX,0xf0(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV 0x28(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVUPD 0x170(%RSP),%XMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
JNE 431ccc <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0x90c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x681710,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x80(%RSP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 402fe0 <__kmpc_for_static_fini@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
MOV 0x20(%RSP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 431f79 <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0xbb9> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RCX,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 431f79 <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0xbb9> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | PdV.cpp:69-84 |
Module | exec |
nb instructions | 223 |
nb uops | 225 |
loop length | 1200 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 1 |
used zmm registers | 4 |
nb stack references | 70 |
micro-operation queue | 37.50 cycles |
front end | 37.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 5.50 | 5.60 | 29.67 | 29.67 | 37.00 | 19.00 | 5.50 | 37.00 | 37.00 | 37.00 | 5.40 | 29.67 |
cycles | 5.50 | 5.60 | 29.67 | 29.67 | 37.00 | 19.00 | 5.50 | 37.00 | 37.00 | 37.00 | 5.40 | 29.67 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 38.20 |
Stall cycles | 0.84 |
LM full (events) | 2.01 |
Front-end | 37.50 |
Dispatch | 37.00 |
Overall L1 | 37.50 |
all | 13% |
load | 4% |
store | 22% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 50% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 3% |
all | 60% |
load | 50% |
store | 100% |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 15% |
load | 8% |
store | 25% |
mul | 0% |
add-sub | 50% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 3% |
all | 22% |
load | 15% |
store | 30% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 56% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 35% |
load | 18% |
store | 62% |
mul | 12% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
all | 22% |
load | 15% |
store | 31% |
mul | 12% |
add-sub | 56% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x540,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x80(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x70(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x68(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,0x180(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RBP),%R10D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10D,0x34(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0,0x84(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 431cb3 <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0x8f3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R13,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVQ $0,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0x1,0x138(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x140(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x8c(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0xf0(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0xe8(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x6816f0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 403180 <__kmpc_for_static_init_8@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xe8(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe0(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RAX,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JA 431c91 <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0x8d1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVQ %R13,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV %RBX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB 0x38(%RSP),%ECX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
LEA 0x1(%R11),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xc8(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDI),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RSI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVG %RAX,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R12),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%R12),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R15),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%R15),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R14),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%R14),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMULSD 0x320d0(%RIP),%XMM0,%XMM4 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
MOV 0x180(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x140(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %R11,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $-0x8,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RSI,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
AND %RSI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RDX,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc0(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x78(%RSP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,0x130(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0x120(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0x118(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,0x110(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,0x108(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 431cc2 <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0x902> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VPBROADCASTQ %RCX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x180(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0x34(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %EAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x38(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %EAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x1e0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x70(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x4c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPBROADCASTQ %R14,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x480(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0xb8(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x440(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0xb0(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x400(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0x68(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %R10,%ZMM26 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %XMM4,0x170(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VBROADCASTSD %XMM4,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %ZMM0,0x3c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0xa0(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x380(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0x98(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x340(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPBROADCASTQ %RBX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x300(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPBROADCASTQ %R12,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x2c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPBROADCASTQ %RDI,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x280(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPBROADCASTQ %R8,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x240(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV %R11,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPBROADCASTQ %R11,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPADDQ 0x37b40(%RIP),%ZMM0,%ZMM17 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
VPBROADCASTQ %R9,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x200(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV %RDX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EBX,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x20(%RSP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xa8(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x90(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x18(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RCX,0xf0(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV 0x28(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVUPD 0x170(%RSP),%XMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
JNE 431ccc <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0x90c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x681710,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x80(%RSP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 402fe0 <__kmpc_for_static_fini@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
MOV 0x20(%RSP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 431f79 <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0xbb9> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RCX,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 431f79 <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0xbb9> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼PdV_kernel(bool, int, int, int, int, double, clover::Buffer2D | 4.95 | 4.23 |
○Loop 246 - PdV.cpp:70-84 - exec | 4.95 | 4.22 |
○Loop 245 - PdV.cpp:70-84 - exec | 0 | 0 |