Loop Id: 147 | Module: exec | Source: advec_mom.cpp:186-211 [...] | Coverage: 4.35% |
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Loop Id: 147 | Module: exec | Source: advec_mom.cpp:186-211 [...] | Coverage: 4.35% |
---|
0x42d4c8 VMOVUPD (%RSI,%RDX,1),%ZMM7 [2] |
0x42d4cf VMOVUPD 0x40(%RSI,%RDX,1),%ZMM8 [2] |
0x42d4d7 VMOVDQA32 %ZMM17,%ZMM1 |
0x42d4dd KMOVB %K1,%K6 |
0x42d4e1 KMOVB %K1,%K5 |
0x42d4e5 KMOVB %K1,%K7 |
0x42d4e9 VEXTRACTI32X8 $0x1,%ZMM1,%YMM0 |
0x42d4f0 VPMOVSXDQ %YMM1,%ZMM2 |
0x42d4f6 VPADDD %ZMM29,%ZMM17,%ZMM17 |
0x42d4fc VCMPPD $0x1,%ZMM6,%ZMM7,%K3 |
0x42d503 VCMPPD $0x1,%ZMM6,%ZMM8,%K2 |
0x42d50a VPMOVSXDQ %YMM0,%ZMM1 |
0x42d510 VPBLENDMQ %ZMM15,%ZMM14,%ZMM4{%K3} |
0x42d516 KUNPCKBW %K3,%K2,%K4 |
0x42d51a VPBLENDMD %ZMM31,%ZMM24,%ZMM0{%K4} |
0x42d520 VPBLENDMQ %ZMM15,%ZMM14,%ZMM3{%K2} |
0x42d526 VXORPS %XMM5,%XMM5,%XMM5 |
0x42d52a VPMULLQ %ZMM23,%ZMM4,%ZMM5 |
0x42d530 VPMOVSXDQ %YMM0,%ZMM26 |
0x42d536 VEXTRACTI32X8 $0x1,%ZMM0,%YMM0 |
0x42d53d VXORPS %XMM27,%XMM27,%XMM27 |
0x42d543 VPMULLQ %ZMM11,%ZMM26,%ZMM27 |
0x42d549 VPBLENDMQ %ZMM14,%ZMM15,%ZMM19{%K3} |
0x42d54f VPMOVSXDQ %YMM0,%ZMM0 |
0x42d555 KMOVB %K1,%K3 |
0x42d559 VPMULLQ %ZMM11,%ZMM4,%ZMM4 |
0x42d55f VPMULLQ %ZMM11,%ZMM19,%ZMM19 |
0x42d565 VPBLENDMQ %ZMM14,%ZMM15,%ZMM18{%K2} |
0x42d56b KMOVB %K1,%K2 |
0x42d56f VPMULLQ %ZMM11,%ZMM0,%ZMM0 |
0x42d575 VPMULLQ %ZMM11,%ZMM18,%ZMM18 |
0x42d57b VPBLENDMD %ZMM30,%ZMM24,%ZMM13{%K4} |
0x42d581 KMOVB %K1,%K4 |
0x42d585 VPADDQ %ZMM2,%ZMM5,%ZMM12 |
0x42d58b VXORPS %XMM5,%XMM5,%XMM5 |
0x42d58f VPMULLQ %ZMM23,%ZMM3,%ZMM5 |
0x42d595 VPMULLQ %ZMM11,%ZMM3,%ZMM3 |
0x42d59b VPADDQ %ZMM2,%ZMM27,%ZMM28 |
0x42d5a1 VGATHERQPD (%R10,%ZMM12,8),%ZMM25{%K6} [8] |
0x42d5a8 KMOVB %K1,%K6 |
0x42d5ac VPADDQ %ZMM2,%ZMM4,%ZMM4 |
0x42d5b2 VPADDQ %ZMM1,%ZMM0,%ZMM0 |
0x42d5b8 VGATHERQPD (%RAX,%ZMM0,8),%ZMM26{%K4} [12] |
0x42d5bf VPADDQ %ZMM1,%ZMM5,%ZMM12 |
0x42d5c5 VGATHERQPD (%RAX,%ZMM4,8),%ZMM5{%K5} [3] |
0x42d5cc VPADDQ %ZMM1,%ZMM3,%ZMM3 |
0x42d5d2 VGATHERQPD (%R10,%ZMM12,8),%ZMM20{%K7} [7] |
0x42d5d9 KMOVB %K1,%K7 |
0x42d5dd VMOVSD (%R12),%XMM12 [1] |
0x42d5e3 VGATHERQPD (%RAX,%ZMM3,8),%ZMM4{%K3} [4] |
0x42d5ea VGATHERQPD (%RAX,%ZMM28,8),%ZMM3{%K2} [11] |
0x42d5f1 VPADDQ %ZMM2,%ZMM19,%ZMM28 |
0x42d5f7 VGATHERQPD (%RAX,%ZMM28,8),%ZMM0{%K6} [13] |
0x42d5fe VSUBPD %ZMM3,%ZMM5,%ZMM3 |
0x42d604 VSUBPD %ZMM26,%ZMM4,%ZMM27 |
0x42d60a VSUBPD %ZMM5,%ZMM0,%ZMM0 |
0x42d610 VPADDQ %ZMM1,%ZMM18,%ZMM26 |
0x42d616 VMOVAPD %ZMM6,%ZMM28 |
0x42d61c VGATHERQPD (%RAX,%ZMM26,8),%ZMM2{%K7} [14] |
0x42d623 VBROADCASTSD %XMM12,%ZMM16 |
0x42d629 VSUBPD %ZMM4,%ZMM2,%ZMM2 |
0x42d62f VMULSD 0x35349(%RIP),%XMM12,%XMM12 [9] |
0x42d637 VMULPD %ZMM0,%ZMM3,%ZMM1 |
0x42d63d VANDPD %ZMM10,%ZMM0,%ZMM18 |
0x42d643 VANDPD %ZMM10,%ZMM3,%ZMM3 |
0x42d649 VBROADCASTSD %XMM12,%ZMM12 |
0x42d64f VCMPPD $0xe,%ZMM6,%ZMM1,%K3 |
0x42d656 VMULPD %ZMM2,%ZMM27,%ZMM1 |
0x42d65c VCMPPD $0xe,%ZMM6,%ZMM0,%K5{%K3} |
0x42d663 VANDPD %ZMM10,%ZMM7,%ZMM0 |
0x42d669 KMOVB %K3,%K6 |
0x42d66d VCMPPD $0xe,%ZMM6,%ZMM1,%K2 |
0x42d674 VANDPD %ZMM10,%ZMM27,%ZMM1 |
0x42d67a VANDPD %ZMM10,%ZMM2,%ZMM27 |
0x42d680 VBLENDMPD %ZMM9,%ZMM22,%ZMM19{%K5} |
0x42d686 VCMPPD $0xe,%ZMM6,%ZMM2,%K4{%K2} |
0x42d68d VDIVPD %ZMM25,%ZMM0,%ZMM2 |
0x42d693 VANDPD %ZMM10,%ZMM8,%ZMM25 |
0x42d699 KMOVB %K2,%K7 |
0x42d69d VDIVPD %ZMM20,%ZMM25,%ZMM25 |
0x42d6a3 VSUBPD %ZMM25,%ZMM21,%ZMM0 |
0x42d6a9 VMOVAPD %ZMM6,%ZMM20 |
0x42d6af VGATHERDPD (%R11,%YMM13,8),%ZMM20{%K6} [6] |
0x42d6b6 VSHUFI32X4 $-0x12,%ZMM13,%ZMM13,%ZMM13 |
0x42d6bd VGATHERDPD (%R11,%YMM13,8),%ZMM28{%K7} [5] |
0x42d6c4 VBLENDMPD %ZMM9,%ZMM22,%ZMM26{%K4} |
0x42d6ca VMULPD %ZMM27,%ZMM0,%ZMM13 |
0x42d6d0 VDIVPD %ZMM16,%ZMM13,%ZMM0 |
0x42d6d6 VADDPD %ZMM9,%ZMM25,%ZMM13 |
0x42d6dc VMULPD %ZMM1,%ZMM13,%ZMM13 |
0x42d6e2 VMINPD %ZMM27,%ZMM1,%ZMM1 |
0x42d6e8 VDIVPD %ZMM28,%ZMM13,%ZMM13 |
0x42d6ee VADDPD %ZMM13,%ZMM0,%ZMM0 |
0x42d6f4 VMULPD %ZMM12,%ZMM0,%ZMM13 |
0x42d6fa VMINPD %ZMM1,%ZMM13,%ZMM0 |
0x42d700 VSUBPD %ZMM2,%ZMM21,%ZMM1 |
0x42d706 VSUBPD %ZMM25,%ZMM9,%ZMM13 |
0x42d70c VMULPD %ZMM18,%ZMM1,%ZMM1 |
0x42d712 VMULPD %ZMM26,%ZMM13,%ZMM13 |
0x42d718 VDIVPD %ZMM16,%ZMM1,%ZMM1 |
0x42d71e VADDPD %ZMM9,%ZMM2,%ZMM16 |
0x42d724 VSUBPD %ZMM2,%ZMM9,%ZMM2 |
0x42d72a VFMADD231PD %ZMM13,%ZMM0,%ZMM4{%K2} |
0x42d730 VMULPD %ZMM3,%ZMM16,%ZMM27 |
0x42d736 VMINPD %ZMM18,%ZMM3,%ZMM3 |
0x42d73c VMULPD %ZMM8,%ZMM4,%ZMM8 |
0x42d742 VDIVPD %ZMM20,%ZMM27,%ZMM26 |
0x42d748 VADDPD %ZMM26,%ZMM1,%ZMM1 |
0x42d74e VMULPD %ZMM12,%ZMM1,%ZMM12 |
0x42d754 VMOVUPD %ZMM8,0x40(%RCX,%RDX,1) [10] |
0x42d75c VMINPD %ZMM3,%ZMM12,%ZMM1 |
0x42d762 VMULPD %ZMM19,%ZMM2,%ZMM12 |
0x42d768 VFMADD231PD %ZMM12,%ZMM1,%ZMM5{%K3} |
0x42d76e VMULPD %ZMM5,%ZMM7,%ZMM7 |
0x42d774 VMOVUPD %ZMM7,(%RCX,%RDX,1) [10] |
0x42d77b SUB $-0x80,%RDX |
0x42d77f CMP %RDX,%R13 |
0x42d782 JNE 42d4c8 |
/scratch_na/users/xoserete/qaas_runs/171-415-4687/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/context.h: 69 - 69 |
-------------------------------------------------------------------------------- |
69: T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; } |
/scratch_na/users/xoserete/qaas_runs/171-415-4687/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/advec_mom.cpp: 186 - 211 |
-------------------------------------------------------------------------------- |
186: if (node_flux(i, j) < 0.0) { |
[...] |
195: dif = upwind; |
196: } |
197: sigma = std::fabs(node_flux(i, j)) / (node_mass_pre(i, donor)); |
198: width = celldy[j]; |
199: vdiffuw = vel1(i, donor) - vel1(i, upwind); |
200: vdiffdw = vel1(i, downwind) - vel1(i, donor); |
201: limiter = 0.0; |
202: if (vdiffuw * vdiffdw > 0.0) { |
203: auw = std::fabs(vdiffuw); |
204: adw = std::fabs(vdiffdw); |
205: wind = 1.0; |
206: if (vdiffdw <= 0.0) wind = -1.0; |
207: limiter = |
208: wind * std::fmin(std::fmin(width * ((2.0 - sigma) * adw / width + (1.0 + sigma) * auw / celldy[dif]) / 6.0, auw), adw); |
209: } |
210: advec_vel_s = vel1(i, donor) + (1.0 - sigma) * limiter; |
211: mom_flux(i, j) = advec_vel_s * node_flux(i, j); |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
○98.10 | gomp_thread_start | team.c:130 | libgomp.so.1.0.0 |
○1.90 | GOMP_parallel | libgomp.h:985 | libgomp.so.1.0.0 |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.27 |
Bottlenecks | P0, |
Function | advec_mom_kernel(int, int, int, int, clover::Buffer2D |
Source | context.h:69-69,advec_mom.cpp:186-186,advec_mom.cpp:195-211 |
Source loop unroll info | unrolled by 16 |
Source loop unroll confidence level | high |
Unroll/vectorization loop type | main |
Unroll factor | 16 |
CQA cycles | 96.00 |
CQA cycles if no scalar integer | 96.00 |
CQA cycles if FP arith vectorized | 96.00 |
CQA cycles if fully vectorized | 96.00 |
Front-end cycles | 33.50 |
DIV/SQRT cycles | 75.50 |
P0 cycles | 13.50 |
P1 cycles | 28.00 |
P2 cycles | 28.00 |
P3 cycles | 1.00 |
P4 cycles | 75.50 |
P5 cycles | 1.00 |
P6 cycles | 1.00 |
P7 cycles | 1.00 |
P8 cycles | 1.00 |
P9 cycles | 0.00 |
P10 cycles | 28.00 |
P11 cycles | 96.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 98.02 - 107.18 |
Stall cycles (UFS) | 69.85 - 79.01 |
Nb insns | 118.00 |
Nb uops | 201.00 |
Nb loads | 14.00 |
Nb stores | 2.00 |
Nb stack references | 0.00 |
FLOP/cycle | 2.84 |
Nb FLOP add-sub | 96.00 |
Nb FLOP mul | 97.00 |
Nb FLOP fma | 16.00 |
Nb FLOP div | 48.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 9.50 |
Bytes prefetched | 0.00 |
Bytes loaded | 784.00 |
Bytes stored | 128.00 |
Stride 0 | 3.00 |
Stride 1 | 2.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 6.00 |
Vectorization ratio all | 96.15 |
Vectorization ratio load | 85.71 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 95.24 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | 100.00 |
Vectorization ratio other | 95.92 |
Vector-efficiency ratio all | 91.11 |
Vector-efficiency ratio load | 87.50 |
Vector-efficiency ratio store | 100.00 |
Vector-efficiency ratio mul | 95.83 |
Vector-efficiency ratio add_sub | 100.00 |
Vector-efficiency ratio fma | 100.00 |
Vector-efficiency ratio div_sqrt | 100.00 |
Vector-efficiency ratio other | 84.69 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.27 |
Bottlenecks | P0, |
Function | advec_mom_kernel(int, int, int, int, clover::Buffer2D |
Source | context.h:69-69,advec_mom.cpp:186-186,advec_mom.cpp:195-211 |
Source loop unroll info | unrolled by 16 |
Source loop unroll confidence level | high |
Unroll/vectorization loop type | main |
Unroll factor | 16 |
CQA cycles | 96.00 |
CQA cycles if no scalar integer | 96.00 |
CQA cycles if FP arith vectorized | 96.00 |
CQA cycles if fully vectorized | 96.00 |
Front-end cycles | 33.50 |
DIV/SQRT cycles | 75.50 |
P0 cycles | 13.50 |
P1 cycles | 28.00 |
P2 cycles | 28.00 |
P3 cycles | 1.00 |
P4 cycles | 75.50 |
P5 cycles | 1.00 |
P6 cycles | 1.00 |
P7 cycles | 1.00 |
P8 cycles | 1.00 |
P9 cycles | 0.00 |
P10 cycles | 28.00 |
P11 cycles | 96.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 98.02 - 107.18 |
Stall cycles (UFS) | 69.85 - 79.01 |
Nb insns | 118.00 |
Nb uops | 201.00 |
Nb loads | 14.00 |
Nb stores | 2.00 |
Nb stack references | 0.00 |
FLOP/cycle | 2.84 |
Nb FLOP add-sub | 96.00 |
Nb FLOP mul | 97.00 |
Nb FLOP fma | 16.00 |
Nb FLOP div | 48.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 9.50 |
Bytes prefetched | 0.00 |
Bytes loaded | 784.00 |
Bytes stored | 128.00 |
Stride 0 | 3.00 |
Stride 1 | 2.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 6.00 |
Vectorization ratio all | 96.15 |
Vectorization ratio load | 85.71 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 95.24 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | 100.00 |
Vectorization ratio other | 95.92 |
Vector-efficiency ratio all | 91.11 |
Vector-efficiency ratio load | 87.50 |
Vector-efficiency ratio store | 100.00 |
Vector-efficiency ratio mul | 95.83 |
Vector-efficiency ratio add_sub | 100.00 |
Vector-efficiency ratio fma | 100.00 |
Vector-efficiency ratio div_sqrt | 100.00 |
Vector-efficiency ratio other | 84.69 |
Path / |
nb instructions | 118 |
nb uops | 201 |
loop length | 704 |
used x86 registers | 8 |
used mmx registers | 0 |
used xmm registers | 3 |
used ymm registers | 3 |
used zmm registers | 32 |
nb stack references | 0 |
ADD-SUB / MUL ratio | 0.92 |
micro-operation queue | 33.50 cycles |
front end | 33.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 75.50 | 1.00 | 28.00 | 28.00 | 1.00 | 75.50 | 1.00 | 1.00 | 1.00 | 1.00 | 0.00 | 28.00 |
cycles | 75.50 | 13.50 | 28.00 | 28.00 | 1.00 | 75.50 | 1.00 | 1.00 | 1.00 | 1.00 | 0.00 | 28.00 |
Cycles executing div or sqrt instructions | 96.00 |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 98.02-107.18 |
Stall cycles | 69.85-79.01 |
RS full (events) | 1.33-0.89 |
PRF_FLOAT full (events) | 76.47-85.84 |
Front-end | 33.50 |
Dispatch | 75.50 |
DIV/SQRT | 96.00 |
Data deps. | 1.00 |
Overall L1 | 96.00 |
all | 100% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 100% |
all | 94% |
load | 85% |
store | 100% |
mul | 92% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 94% |
all | 96% |
load | 85% |
store | 100% |
mul | 95% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 95% |
all | 88% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 75% |
all | 92% |
load | 87% |
store | 100% |
mul | 93% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 88% |
all | 91% |
load | 87% |
store | 100% |
mul | 95% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 84% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VMOVUPD (%RSI,%RDX,1),%ZMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVUPD 0x40(%RSI,%RDX,1),%ZMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVDQA32 %ZMM17,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
KMOVB %K1,%K6 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
KMOVB %K1,%K5 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
KMOVB %K1,%K7 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VEXTRACTI32X8 $0x1,%ZMM1,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPMOVSXDQ %YMM1,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPADDD %ZMM29,%ZMM17,%ZMM17 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VCMPPD $0x1,%ZMM6,%ZMM7,%K3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VCMPPD $0x1,%ZMM6,%ZMM8,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPMOVSXDQ %YMM0,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBLENDMQ %ZMM15,%ZMM14,%ZMM4{%K3} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
KUNPCKBW %K3,%K2,%K4 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 1 |
VPBLENDMD %ZMM31,%ZMM24,%ZMM0{%K4} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VPBLENDMQ %ZMM15,%ZMM14,%ZMM3{%K2} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VXORPS %XMM5,%XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPMULLQ %ZMM23,%ZMM4,%ZMM5 | 5 | 1.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPMOVSXDQ %YMM0,%ZMM26 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VEXTRACTI32X8 $0x1,%ZMM0,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VXORPS %XMM27,%XMM27,%XMM27 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPMULLQ %ZMM11,%ZMM26,%ZMM27 | 5 | 1.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPBLENDMQ %ZMM14,%ZMM15,%ZMM19{%K3} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VPMOVSXDQ %YMM0,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
KMOVB %K1,%K3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPMULLQ %ZMM11,%ZMM4,%ZMM4 | 5 | 1.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPMULLQ %ZMM11,%ZMM19,%ZMM19 | 5 | 1.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPBLENDMQ %ZMM14,%ZMM15,%ZMM18{%K2} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
KMOVB %K1,%K2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPMULLQ %ZMM11,%ZMM0,%ZMM0 | 5 | 1.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPMULLQ %ZMM11,%ZMM18,%ZMM18 | 5 | 1.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPBLENDMD %ZMM30,%ZMM24,%ZMM13{%K4} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
KMOVB %K1,%K4 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPADDQ %ZMM2,%ZMM5,%ZMM12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VXORPS %XMM5,%XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPMULLQ %ZMM23,%ZMM3,%ZMM5 | 5 | 1.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPMULLQ %ZMM11,%ZMM3,%ZMM3 | 5 | 1.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPADDQ %ZMM2,%ZMM27,%ZMM28 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VGATHERQPD (%R10,%ZMM12,8),%ZMM25{%K6} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
KMOVB %K1,%K6 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPADDQ %ZMM2,%ZMM4,%ZMM4 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VPADDQ %ZMM1,%ZMM0,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VGATHERQPD (%RAX,%ZMM0,8),%ZMM26{%K4} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VPADDQ %ZMM1,%ZMM5,%ZMM12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VGATHERQPD (%RAX,%ZMM4,8),%ZMM5{%K5} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VPADDQ %ZMM1,%ZMM3,%ZMM3 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VGATHERQPD (%R10,%ZMM12,8),%ZMM20{%K7} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
KMOVB %K1,%K7 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVSD (%R12),%XMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VGATHERQPD (%RAX,%ZMM3,8),%ZMM4{%K3} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VGATHERQPD (%RAX,%ZMM28,8),%ZMM3{%K2} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VPADDQ %ZMM2,%ZMM19,%ZMM28 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VGATHERQPD (%RAX,%ZMM28,8),%ZMM0{%K6} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VSUBPD %ZMM3,%ZMM5,%ZMM3 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VSUBPD %ZMM26,%ZMM4,%ZMM27 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VSUBPD %ZMM5,%ZMM0,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPADDQ %ZMM1,%ZMM18,%ZMM26 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVAPD %ZMM6,%ZMM28 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VGATHERQPD (%RAX,%ZMM26,8),%ZMM2{%K7} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VBROADCASTSD %XMM12,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VSUBPD %ZMM4,%ZMM2,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULSD 0x35349(%RIP),%XMM12,%XMM12 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMULPD %ZMM0,%ZMM3,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VANDPD %ZMM10,%ZMM0,%ZMM18 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VANDPD %ZMM10,%ZMM3,%ZMM3 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VBROADCASTSD %XMM12,%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VCMPPD $0xe,%ZMM6,%ZMM1,%K3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMULPD %ZMM2,%ZMM27,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPPD $0xe,%ZMM6,%ZMM0,%K5{%K3} | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VANDPD %ZMM10,%ZMM7,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
KMOVB %K3,%K6 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VCMPPD $0xe,%ZMM6,%ZMM1,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VANDPD %ZMM10,%ZMM27,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VANDPD %ZMM10,%ZMM2,%ZMM27 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VBLENDMPD %ZMM9,%ZMM22,%ZMM19{%K5} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VCMPPD $0xe,%ZMM6,%ZMM2,%K4{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VDIVPD %ZMM25,%ZMM0,%ZMM2 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VANDPD %ZMM10,%ZMM8,%ZMM25 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
KMOVB %K2,%K7 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VDIVPD %ZMM20,%ZMM25,%ZMM25 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VSUBPD %ZMM25,%ZMM21,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVAPD %ZMM6,%ZMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VGATHERDPD (%R11,%YMM13,8),%ZMM20{%K6} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VSHUFI32X4 $-0x12,%ZMM13,%ZMM13,%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VGATHERDPD (%R11,%YMM13,8),%ZMM28{%K7} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VBLENDMPD %ZMM9,%ZMM22,%ZMM26{%K4} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMULPD %ZMM27,%ZMM0,%ZMM13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VDIVPD %ZMM16,%ZMM13,%ZMM0 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VADDPD %ZMM9,%ZMM25,%ZMM13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %ZMM1,%ZMM13,%ZMM13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMINPD %ZMM27,%ZMM1,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VDIVPD %ZMM28,%ZMM13,%ZMM13 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VADDPD %ZMM13,%ZMM0,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %ZMM12,%ZMM0,%ZMM13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMINPD %ZMM1,%ZMM13,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VSUBPD %ZMM2,%ZMM21,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VSUBPD %ZMM25,%ZMM9,%ZMM13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %ZMM18,%ZMM1,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %ZMM26,%ZMM13,%ZMM13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VDIVPD %ZMM16,%ZMM1,%ZMM1 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VADDPD %ZMM9,%ZMM2,%ZMM16 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VSUBPD %ZMM2,%ZMM9,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VFMADD231PD %ZMM13,%ZMM0,%ZMM4{%K2} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %ZMM3,%ZMM16,%ZMM27 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMINPD %ZMM18,%ZMM3,%ZMM3 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %ZMM8,%ZMM4,%ZMM8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VDIVPD %ZMM20,%ZMM27,%ZMM26 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VADDPD %ZMM26,%ZMM1,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %ZMM12,%ZMM1,%ZMM12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD %ZMM8,0x40(%RCX,%RDX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMINPD %ZMM3,%ZMM12,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %ZMM19,%ZMM2,%ZMM12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231PD %ZMM12,%ZMM1,%ZMM5{%K3} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %ZMM5,%ZMM7,%ZMM7 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD %ZMM7,(%RCX,%RDX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
SUB $-0x80,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %RDX,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 42d4c8 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii._omp_fn.10+0x248> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
nb instructions | 118 |
nb uops | 201 |
loop length | 704 |
used x86 registers | 8 |
used mmx registers | 0 |
used xmm registers | 3 |
used ymm registers | 3 |
used zmm registers | 32 |
nb stack references | 0 |
ADD-SUB / MUL ratio | 0.92 |
micro-operation queue | 33.50 cycles |
front end | 33.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 75.50 | 1.00 | 28.00 | 28.00 | 1.00 | 75.50 | 1.00 | 1.00 | 1.00 | 1.00 | 0.00 | 28.00 |
cycles | 75.50 | 13.50 | 28.00 | 28.00 | 1.00 | 75.50 | 1.00 | 1.00 | 1.00 | 1.00 | 0.00 | 28.00 |
Cycles executing div or sqrt instructions | 96.00 |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 98.02-107.18 |
Stall cycles | 69.85-79.01 |
RS full (events) | 1.33-0.89 |
PRF_FLOAT full (events) | 76.47-85.84 |
Front-end | 33.50 |
Dispatch | 75.50 |
DIV/SQRT | 96.00 |
Data deps. | 1.00 |
Overall L1 | 96.00 |
all | 100% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 100% |
all | 94% |
load | 85% |
store | 100% |
mul | 92% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 94% |
all | 96% |
load | 85% |
store | 100% |
mul | 95% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 95% |
all | 88% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 75% |
all | 92% |
load | 87% |
store | 100% |
mul | 93% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 88% |
all | 91% |
load | 87% |
store | 100% |
mul | 95% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 84% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VMOVUPD (%RSI,%RDX,1),%ZMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVUPD 0x40(%RSI,%RDX,1),%ZMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVDQA32 %ZMM17,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
KMOVB %K1,%K6 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
KMOVB %K1,%K5 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
KMOVB %K1,%K7 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VEXTRACTI32X8 $0x1,%ZMM1,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPMOVSXDQ %YMM1,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPADDD %ZMM29,%ZMM17,%ZMM17 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VCMPPD $0x1,%ZMM6,%ZMM7,%K3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VCMPPD $0x1,%ZMM6,%ZMM8,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPMOVSXDQ %YMM0,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBLENDMQ %ZMM15,%ZMM14,%ZMM4{%K3} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
KUNPCKBW %K3,%K2,%K4 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 1 |
VPBLENDMD %ZMM31,%ZMM24,%ZMM0{%K4} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VPBLENDMQ %ZMM15,%ZMM14,%ZMM3{%K2} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VXORPS %XMM5,%XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPMULLQ %ZMM23,%ZMM4,%ZMM5 | 5 | 1.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPMOVSXDQ %YMM0,%ZMM26 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VEXTRACTI32X8 $0x1,%ZMM0,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VXORPS %XMM27,%XMM27,%XMM27 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPMULLQ %ZMM11,%ZMM26,%ZMM27 | 5 | 1.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPBLENDMQ %ZMM14,%ZMM15,%ZMM19{%K3} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VPMOVSXDQ %YMM0,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
KMOVB %K1,%K3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPMULLQ %ZMM11,%ZMM4,%ZMM4 | 5 | 1.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPMULLQ %ZMM11,%ZMM19,%ZMM19 | 5 | 1.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPBLENDMQ %ZMM14,%ZMM15,%ZMM18{%K2} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
KMOVB %K1,%K2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPMULLQ %ZMM11,%ZMM0,%ZMM0 | 5 | 1.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPMULLQ %ZMM11,%ZMM18,%ZMM18 | 5 | 1.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPBLENDMD %ZMM30,%ZMM24,%ZMM13{%K4} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
KMOVB %K1,%K4 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPADDQ %ZMM2,%ZMM5,%ZMM12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VXORPS %XMM5,%XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPMULLQ %ZMM23,%ZMM3,%ZMM5 | 5 | 1.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPMULLQ %ZMM11,%ZMM3,%ZMM3 | 5 | 1.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPADDQ %ZMM2,%ZMM27,%ZMM28 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VGATHERQPD (%R10,%ZMM12,8),%ZMM25{%K6} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
KMOVB %K1,%K6 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPADDQ %ZMM2,%ZMM4,%ZMM4 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VPADDQ %ZMM1,%ZMM0,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VGATHERQPD (%RAX,%ZMM0,8),%ZMM26{%K4} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VPADDQ %ZMM1,%ZMM5,%ZMM12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VGATHERQPD (%RAX,%ZMM4,8),%ZMM5{%K5} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VPADDQ %ZMM1,%ZMM3,%ZMM3 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VGATHERQPD (%R10,%ZMM12,8),%ZMM20{%K7} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
KMOVB %K1,%K7 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVSD (%R12),%XMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VGATHERQPD (%RAX,%ZMM3,8),%ZMM4{%K3} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VGATHERQPD (%RAX,%ZMM28,8),%ZMM3{%K2} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VPADDQ %ZMM2,%ZMM19,%ZMM28 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VGATHERQPD (%RAX,%ZMM28,8),%ZMM0{%K6} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VSUBPD %ZMM3,%ZMM5,%ZMM3 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VSUBPD %ZMM26,%ZMM4,%ZMM27 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VSUBPD %ZMM5,%ZMM0,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPADDQ %ZMM1,%ZMM18,%ZMM26 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMOVAPD %ZMM6,%ZMM28 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VGATHERQPD (%RAX,%ZMM26,8),%ZMM2{%K7} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VBROADCASTSD %XMM12,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VSUBPD %ZMM4,%ZMM2,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULSD 0x35349(%RIP),%XMM12,%XMM12 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMULPD %ZMM0,%ZMM3,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VANDPD %ZMM10,%ZMM0,%ZMM18 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VANDPD %ZMM10,%ZMM3,%ZMM3 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VBROADCASTSD %XMM12,%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VCMPPD $0xe,%ZMM6,%ZMM1,%K3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMULPD %ZMM2,%ZMM27,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPPD $0xe,%ZMM6,%ZMM0,%K5{%K3} | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VANDPD %ZMM10,%ZMM7,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
KMOVB %K3,%K6 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VCMPPD $0xe,%ZMM6,%ZMM1,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VANDPD %ZMM10,%ZMM27,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VANDPD %ZMM10,%ZMM2,%ZMM27 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VBLENDMPD %ZMM9,%ZMM22,%ZMM19{%K5} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VCMPPD $0xe,%ZMM6,%ZMM2,%K4{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VDIVPD %ZMM25,%ZMM0,%ZMM2 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VANDPD %ZMM10,%ZMM8,%ZMM25 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
KMOVB %K2,%K7 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VDIVPD %ZMM20,%ZMM25,%ZMM25 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VSUBPD %ZMM25,%ZMM21,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVAPD %ZMM6,%ZMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VGATHERDPD (%R11,%YMM13,8),%ZMM20{%K6} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VSHUFI32X4 $-0x12,%ZMM13,%ZMM13,%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VGATHERDPD (%R11,%YMM13,8),%ZMM28{%K7} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VBLENDMPD %ZMM9,%ZMM22,%ZMM26{%K4} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMULPD %ZMM27,%ZMM0,%ZMM13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VDIVPD %ZMM16,%ZMM13,%ZMM0 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VADDPD %ZMM9,%ZMM25,%ZMM13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %ZMM1,%ZMM13,%ZMM13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMINPD %ZMM27,%ZMM1,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VDIVPD %ZMM28,%ZMM13,%ZMM13 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VADDPD %ZMM13,%ZMM0,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %ZMM12,%ZMM0,%ZMM13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMINPD %ZMM1,%ZMM13,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VSUBPD %ZMM2,%ZMM21,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VSUBPD %ZMM25,%ZMM9,%ZMM13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %ZMM18,%ZMM1,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %ZMM26,%ZMM13,%ZMM13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VDIVPD %ZMM16,%ZMM1,%ZMM1 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VADDPD %ZMM9,%ZMM2,%ZMM16 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VSUBPD %ZMM2,%ZMM9,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VFMADD231PD %ZMM13,%ZMM0,%ZMM4{%K2} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %ZMM3,%ZMM16,%ZMM27 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMINPD %ZMM18,%ZMM3,%ZMM3 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %ZMM8,%ZMM4,%ZMM8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VDIVPD %ZMM20,%ZMM27,%ZMM26 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VADDPD %ZMM26,%ZMM1,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %ZMM12,%ZMM1,%ZMM12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD %ZMM8,0x40(%RCX,%RDX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMINPD %ZMM3,%ZMM12,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %ZMM19,%ZMM2,%ZMM12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231PD %ZMM12,%ZMM1,%ZMM5{%K3} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %ZMM5,%ZMM7,%ZMM7 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD %ZMM7,(%RCX,%RDX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
SUB $-0x80,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %RDX,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 42d4c8 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii._omp_fn.10+0x248> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |