Loop Id: 113 | Module: exec | Source: advec_cell.cpp:120-125 | Coverage: 3.59% |
---|
Loop Id: 113 | Module: exec | Source: advec_cell.cpp:120-125 | Coverage: 3.59% |
---|
0x426911 VMOVUPD (%R13,%RAX,1),%ZMM10 [4] |
0x426919 VMOVUPD (%R11,%RAX,1),%ZMM14 [8] |
0x426920 VMULPD (%RSI,%RAX,1),%ZMM10,%ZMM11 [1] |
0x426927 VSUBPD (%R9,%RAX,1),%ZMM14,%ZMM15 [5] |
0x42692e VADDPD (%R8,%RAX,1),%ZMM10,%ZMM0 [6] |
0x426935 VSUBPD (%RDI,%RAX,1),%ZMM0,%ZMM1 [3] |
0x42693c VSUBPD (%R10,%RAX,1),%ZMM11,%ZMM12 [7] |
0x426943 VFMADD132PD (%RCX,%RAX,1),%ZMM15,%ZMM11 [2] |
0x42694a VADDPD (%RBX,%RAX,1),%ZMM12,%ZMM13 [10] |
0x426951 VDIVPD %ZMM13,%ZMM11,%ZMM4 |
0x426957 VDIVPD %ZMM1,%ZMM13,%ZMM2 |
0x42695d VMOVUPD %ZMM2,(%RSI,%RAX,1) [1] |
0x426964 VMOVUPD %ZMM4,(%RCX,%RAX,1) [2] |
0x42696b VMOVUPD 0x40(%R13,%RAX,1),%ZMM7 [4] |
0x426973 VMOVUPD 0x40(%R11,%RAX,1),%ZMM5 [8] |
0x42697b VMULPD 0x40(%RSI,%RAX,1),%ZMM7,%ZMM6 [1] |
0x426983 VSUBPD 0x40(%R9,%RAX,1),%ZMM5,%ZMM9 [5] |
0x42698b VADDPD 0x40(%R8,%RAX,1),%ZMM7,%ZMM10 [6] |
0x426993 VSUBPD 0x40(%RDI,%RAX,1),%ZMM10,%ZMM11 [3] |
0x42699b VSUBPD 0x40(%R10,%RAX,1),%ZMM6,%ZMM3 [7] |
0x4269a3 VFMADD132PD 0x40(%RCX,%RAX,1),%ZMM9,%ZMM6 [2] |
0x4269ab VADDPD 0x40(%RBX,%RAX,1),%ZMM3,%ZMM8 [10] |
0x4269b3 VDIVPD %ZMM11,%ZMM8,%ZMM12 |
0x4269b9 VDIVPD %ZMM8,%ZMM6,%ZMM13 |
0x4269bf VMOVUPD %ZMM12,0x40(%RSI,%RAX,1) [1] |
0x4269c7 VMOVUPD %ZMM13,0x40(%RCX,%RAX,1) [2] |
0x4269cf SUB $-0x80,%RAX |
0x4269d3 CMP %RAX,0x68(%RSP) [9] |
0x4269d8 JNE 426911 |
/scratch_na/users/xoserete/qaas_runs/171-415-4687/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/advec_cell.cpp: 120 - 125 |
-------------------------------------------------------------------------------- |
120: double pre_mass_s = density1(i, j) * pre_vol(i, j); |
121: double post_mass_s = pre_mass_s + mass_flux_x(i, j) - mass_flux_x(i + 1, j + 0); |
122: double post_ener_s = (energy1(i, j) * pre_mass_s + ener_flux(i, j) - ener_flux(i + 1, j + 0)) / post_mass_s; |
123: double advec_vol_s = pre_vol(i, j) + vol_flux_x(i, j) - vol_flux_x(i + 1, j + 0); |
124: density1(i, j) = post_mass_s / advec_vol_s; |
125: energy1(i, j) = post_ener_s; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
○98.20 | gomp_thread_start | team.c:130 | libgomp.so.1.0.0 |
○1.80 | GOMP_parallel | libgomp.h:985 | libgomp.so.1.0.0 |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 4.92 |
Bottlenecks | P0, |
Function | advec_cell_kernel(int, int, int, int, int, int, clover::Buffer1D |
Source | advec_cell.cpp:120-125 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 64.00 |
CQA cycles if no scalar integer | 64.00 |
CQA cycles if FP arith vectorized | 64.00 |
CQA cycles if fully vectorized | 64.00 |
Front-end cycles | 8.33 |
DIV/SQRT cycles | 13.00 |
P0 cycles | 7.00 |
P1 cycles | 6.33 |
P2 cycles | 6.33 |
P3 cycles | 2.00 |
P4 cycles | 13.00 |
P5 cycles | 1.00 |
P6 cycles | 2.00 |
P7 cycles | 2.00 |
P8 cycles | 2.00 |
P9 cycles | 0.00 |
P10 cycles | 6.33 |
P11 cycles | 64.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 64.29 - 64.31 |
Stall cycles (UFS) | 55.12 - 55.14 |
Nb insns | 29.00 |
Nb uops | 36.00 |
Nb loads | 19.00 |
Nb stores | 4.00 |
Nb stack references | 1.00 |
FLOP/cycle | 2.50 |
Nb FLOP add-sub | 80.00 |
Nb FLOP mul | 16.00 |
Nb FLOP fma | 16.00 |
Nb FLOP div | 32.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 22.13 |
Bytes prefetched | 0.00 |
Bytes loaded | 1160.00 |
Bytes stored | 256.00 |
Stride 0 | 1.00 |
Stride 1 | 9.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 100.00 |
Vectorization ratio load | 100.00 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | 100.00 |
Vectorization ratio other | NA |
Vector-efficiency ratio all | 100.00 |
Vector-efficiency ratio load | 100.00 |
Vector-efficiency ratio store | 100.00 |
Vector-efficiency ratio mul | 100.00 |
Vector-efficiency ratio add_sub | 100.00 |
Vector-efficiency ratio fma | 100.00 |
Vector-efficiency ratio div_sqrt | 100.00 |
Vector-efficiency ratio other | NA |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 4.92 |
Bottlenecks | P0, |
Function | advec_cell_kernel(int, int, int, int, int, int, clover::Buffer1D |
Source | advec_cell.cpp:120-125 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 64.00 |
CQA cycles if no scalar integer | 64.00 |
CQA cycles if FP arith vectorized | 64.00 |
CQA cycles if fully vectorized | 64.00 |
Front-end cycles | 8.33 |
DIV/SQRT cycles | 13.00 |
P0 cycles | 7.00 |
P1 cycles | 6.33 |
P2 cycles | 6.33 |
P3 cycles | 2.00 |
P4 cycles | 13.00 |
P5 cycles | 1.00 |
P6 cycles | 2.00 |
P7 cycles | 2.00 |
P8 cycles | 2.00 |
P9 cycles | 0.00 |
P10 cycles | 6.33 |
P11 cycles | 64.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 64.29 - 64.31 |
Stall cycles (UFS) | 55.12 - 55.14 |
Nb insns | 29.00 |
Nb uops | 36.00 |
Nb loads | 19.00 |
Nb stores | 4.00 |
Nb stack references | 1.00 |
FLOP/cycle | 2.50 |
Nb FLOP add-sub | 80.00 |
Nb FLOP mul | 16.00 |
Nb FLOP fma | 16.00 |
Nb FLOP div | 32.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 22.13 |
Bytes prefetched | 0.00 |
Bytes loaded | 1160.00 |
Bytes stored | 256.00 |
Stride 0 | 1.00 |
Stride 1 | 9.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 100.00 |
Vectorization ratio load | 100.00 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | 100.00 |
Vectorization ratio other | NA |
Vector-efficiency ratio all | 100.00 |
Vector-efficiency ratio load | 100.00 |
Vector-efficiency ratio store | 100.00 |
Vector-efficiency ratio mul | 100.00 |
Vector-efficiency ratio add_sub | 100.00 |
Vector-efficiency ratio fma | 100.00 |
Vector-efficiency ratio div_sqrt | 100.00 |
Vector-efficiency ratio other | NA |
Path / |
nb instructions | 29 |
nb uops | 36 |
loop length | 205 |
used x86 registers | 11 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 16 |
nb stack references | 1 |
ADD-SUB / MUL ratio | 5.00 |
micro-operation queue | 8.33 cycles |
front end | 8.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 13.00 | 0.00 | 6.33 | 6.33 | 2.00 | 13.00 | 1.00 | 2.00 | 2.00 | 2.00 | 0.00 | 6.33 |
cycles | 13.00 | 7.00 | 6.33 | 6.33 | 2.00 | 13.00 | 1.00 | 2.00 | 2.00 | 2.00 | 0.00 | 6.33 |
Cycles executing div or sqrt instructions | 64.00 |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 64.29-64.31 |
Stall cycles | 55.12-55.14 |
RS full (events) | 0.25-0.24 |
LB full (events) | 55.32-55.34 |
Front-end | 8.33 |
Dispatch | 13.00 |
DIV/SQRT | 64.00 |
Data deps. | 1.00 |
Overall L1 | 64.00 |
all | 100% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | NA (no other vectorizable/vectorized instructions) |
all | 100% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | NA (no other vectorizable/vectorized instructions) |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VMOVUPD (%R13,%RAX,1),%ZMM10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVUPD (%R11,%RAX,1),%ZMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMULPD (%RSI,%RAX,1),%ZMM10,%ZMM11 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VSUBPD (%R9,%RAX,1),%ZMM14,%ZMM15 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VADDPD (%R8,%RAX,1),%ZMM10,%ZMM0 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VSUBPD (%RDI,%RAX,1),%ZMM0,%ZMM1 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VSUBPD (%R10,%RAX,1),%ZMM11,%ZMM12 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VFMADD132PD (%RCX,%RAX,1),%ZMM15,%ZMM11 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VADDPD (%RBX,%RAX,1),%ZMM12,%ZMM13 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VDIVPD %ZMM13,%ZMM11,%ZMM4 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VDIVPD %ZMM1,%ZMM13,%ZMM2 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VMOVUPD %ZMM2,(%RSI,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVUPD %ZMM4,(%RCX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVUPD 0x40(%R13,%RAX,1),%ZMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVUPD 0x40(%R11,%RAX,1),%ZMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMULPD 0x40(%RSI,%RAX,1),%ZMM7,%ZMM6 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VSUBPD 0x40(%R9,%RAX,1),%ZMM5,%ZMM9 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VADDPD 0x40(%R8,%RAX,1),%ZMM7,%ZMM10 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VSUBPD 0x40(%RDI,%RAX,1),%ZMM10,%ZMM11 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VSUBPD 0x40(%R10,%RAX,1),%ZMM6,%ZMM3 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VFMADD132PD 0x40(%RCX,%RAX,1),%ZMM9,%ZMM6 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VADDPD 0x40(%RBX,%RAX,1),%ZMM3,%ZMM8 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VDIVPD %ZMM11,%ZMM8,%ZMM12 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VDIVPD %ZMM8,%ZMM6,%ZMM13 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VMOVUPD %ZMM12,0x40(%RSI,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVUPD %ZMM13,0x40(%RCX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
SUB $-0x80,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %RAX,0x68(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 426911 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.3.lto_priv.0+0x2e1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
nb instructions | 29 |
nb uops | 36 |
loop length | 205 |
used x86 registers | 11 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 16 |
nb stack references | 1 |
ADD-SUB / MUL ratio | 5.00 |
micro-operation queue | 8.33 cycles |
front end | 8.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 13.00 | 0.00 | 6.33 | 6.33 | 2.00 | 13.00 | 1.00 | 2.00 | 2.00 | 2.00 | 0.00 | 6.33 |
cycles | 13.00 | 7.00 | 6.33 | 6.33 | 2.00 | 13.00 | 1.00 | 2.00 | 2.00 | 2.00 | 0.00 | 6.33 |
Cycles executing div or sqrt instructions | 64.00 |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 64.29-64.31 |
Stall cycles | 55.12-55.14 |
RS full (events) | 0.25-0.24 |
LB full (events) | 55.32-55.34 |
Front-end | 8.33 |
Dispatch | 13.00 |
DIV/SQRT | 64.00 |
Data deps. | 1.00 |
Overall L1 | 64.00 |
all | 100% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | NA (no other vectorizable/vectorized instructions) |
all | 100% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | NA (no other vectorizable/vectorized instructions) |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VMOVUPD (%R13,%RAX,1),%ZMM10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVUPD (%R11,%RAX,1),%ZMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMULPD (%RSI,%RAX,1),%ZMM10,%ZMM11 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VSUBPD (%R9,%RAX,1),%ZMM14,%ZMM15 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VADDPD (%R8,%RAX,1),%ZMM10,%ZMM0 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VSUBPD (%RDI,%RAX,1),%ZMM0,%ZMM1 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VSUBPD (%R10,%RAX,1),%ZMM11,%ZMM12 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VFMADD132PD (%RCX,%RAX,1),%ZMM15,%ZMM11 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VADDPD (%RBX,%RAX,1),%ZMM12,%ZMM13 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VDIVPD %ZMM13,%ZMM11,%ZMM4 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VDIVPD %ZMM1,%ZMM13,%ZMM2 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VMOVUPD %ZMM2,(%RSI,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVUPD %ZMM4,(%RCX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVUPD 0x40(%R13,%RAX,1),%ZMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVUPD 0x40(%R11,%RAX,1),%ZMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMULPD 0x40(%RSI,%RAX,1),%ZMM7,%ZMM6 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VSUBPD 0x40(%R9,%RAX,1),%ZMM5,%ZMM9 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VADDPD 0x40(%R8,%RAX,1),%ZMM7,%ZMM10 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VSUBPD 0x40(%RDI,%RAX,1),%ZMM10,%ZMM11 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VSUBPD 0x40(%R10,%RAX,1),%ZMM6,%ZMM3 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VFMADD132PD 0x40(%RCX,%RAX,1),%ZMM9,%ZMM6 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VADDPD 0x40(%RBX,%RAX,1),%ZMM3,%ZMM8 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VDIVPD %ZMM11,%ZMM8,%ZMM12 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VDIVPD %ZMM8,%ZMM6,%ZMM13 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VMOVUPD %ZMM12,0x40(%RSI,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVUPD %ZMM13,0x40(%RCX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
SUB $-0x80,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %RAX,0x68(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 426911 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.3.lto_priv.0+0x2e1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |