Function: advec_cell_kernel(int, int, int, int, int, int, clover::Buffer1D<double>&, clover::Buffer1 ... | Module: exec | Source: advec_cell.cpp:146-150 [...] | Coverage: 1.28% |
---|
Function: advec_cell_kernel(int, int, int, int, int, int, clover::Buffer1D<double>&, clover::Buffer1 ... | Module: exec | Source: advec_cell.cpp:146-150 [...] | Coverage: 1.28% |
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/scratch_na/users/xoserete/qaas_runs/171-291-1828/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/context.h: 69 - 69 |
-------------------------------------------------------------------------------- |
69: T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; } |
/scratch_na/users/xoserete/qaas_runs/171-291-1828/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/advec_cell.cpp: 146 - 150 |
-------------------------------------------------------------------------------- |
146: #pragma omp parallel for simd collapse(2) |
147: for (int j = (y_min - 2 + 1); j < (y_max + 2 + 2); j++) { |
148: for (int i = (x_min - 2 + 1); i < (x_max + 2 + 2); i++) { |
149: pre_vol(i, j) = volume(i, j) + vol_flux_y(i + 0, j + 1) - vol_flux_y(i, j); |
150: post_vol(i, j) = volume(i, j); |
0x428560 PUSH %RBP |
0x428561 MOV %RSP,%RBP |
0x428564 PUSH %R15 |
0x428566 PUSH %R14 |
0x428568 PUSH %R13 |
0x42856a PUSH %R12 |
0x42856c PUSH %RBX |
0x42856d AND $-0x40,%RSP |
0x428571 ADD $-0x80,%RSP |
0x428575 MOV 0x28(%RDI),%EAX |
0x428578 MOV 0x2c(%RDI),%EDX |
0x42857b MOV 0x20(%RDI),%EBX |
0x42857e MOV 0x24(%RDI),%ECX |
0x428581 ADD $0x4,%EDX |
0x428584 LEA -0x1(%RAX),%R15D |
0x428588 LEA -0x1(%RBX),%ESI |
0x42858b MOV %EDX,0x40(%RSP) |
0x42858f MOV %ESI,0x3c(%RSP) |
0x428593 CMP %EDX,%R15D |
0x428596 JGE 428a73 |
0x42859c MOV %EDX,%EBX |
0x42859e LEA 0x4(%RCX),%R14D |
0x4285a2 SUB %R15D,%EBX |
0x4285a5 CMP %R14D,%ESI |
0x4285a8 JGE 428a73 |
0x4285ae MOV %RDI,%R13 |
0x4285b1 MOV %R14D,%EDI |
0x4285b4 SUB %ESI,%EDI |
0x4285b6 MOV %EDI,0x44(%RSP) |
0x4285ba CALL 404650 <omp_get_num_threads@plt> |
0x4285bf MOV %EAX,%R12D |
0x4285c2 CALL 404540 <omp_get_thread_num@plt> |
0x4285c7 XOR %EDX,%EDX |
0x4285c9 MOV %EAX,%R8D |
0x4285cc MOV 0x44(%RSP),%EAX |
0x4285d0 IMUL %EBX,%EAX |
0x4285d3 DIV %R12D |
0x4285d6 MOV %EAX,%EDI |
0x4285d8 CMP %EDX,%R8D |
0x4285db JB 428a94 |
0x4285e1 IMUL %EDI,%R8D |
0x4285e5 LEA (%R8,%RDX,1),%EBX |
0x4285e9 LEA (%RDI,%RBX,1),%R9D |
0x4285ed MOV %R9D,0x38(%RSP) |
0x4285f2 CMP %R9D,%EBX |
0x4285f5 JAE 428a73 |
0x4285fb XOR %EDX,%EDX |
0x4285fd MOV %EBX,%EAX |
0x4285ff MOV 0x3c(%RSP),%R10D |
0x428604 MOV 0x8(%R13),%RCX |
0x428608 DIVL 0x44(%RSP) |
0x42860c MOV %RCX,0x28(%RSP) |
0x428611 ADD %EDX,%R10D |
0x428614 MOV %R14D,%EDX |
0x428617 LEA (%RAX,%R15,1),%R11D |
0x42861b MOV 0x10(%R13),%R14 |
0x42861f SUB %R10D,%EDX |
0x428622 MOV (%R13),%R15 |
0x428626 MOV 0x18(%R13),%R13 |
0x42862a MOV %R10D,0x74(%RSP) |
0x42862f CMP %EDX,%EDI |
0x428631 MOV %R14,0x20(%RSP) |
0x428636 MOVSXD %R11D,%RCX |
0x428639 CMOVBE %EDI,%EDX |
0x42863c MOV %R15,0x30(%RSP) |
0x428641 MOV %R13,0x18(%RSP) |
0x428646 LEA (%RBX,%RDX,1),%ESI |
0x428649 MOV %ESI,0x70(%RSP) |
0x42864d CMP %ESI,%EBX |
0x42864f JAE 428a53 |
0x428655 NOPL (%RAX) |
(167) 0x428658 MOV 0x28(%RSP),%R8 |
(167) 0x42865d MOV 0x30(%RSP),%R12 |
(167) 0x428662 MOV 0x20(%RSP),%RAX |
(167) 0x428667 MOV 0x18(%RSP),%R13 |
(167) 0x42866c MOV (%R8),%R9 |
(167) 0x42866f MOV 0x10(%R8),%RSI |
(167) 0x428673 LEA 0x1(%RCX),%R8 |
(167) 0x428677 MOV (%R12),%R11 |
(167) 0x42867b MOV 0x10(%R13),%RDI |
(167) 0x42867f MOV %R8,0x48(%RSP) |
(167) 0x428684 IMUL %R9,%R8 |
(167) 0x428688 MOV 0x10(%R12),%R15 |
(167) 0x42868d MOV 0x10(%RAX),%R14 |
(167) 0x428691 IMUL %RCX,%R11 |
(167) 0x428695 MOV %RDI,0x78(%RSP) |
(167) 0x42869a MOV %R8,%R10 |
(167) 0x42869d SUB %R9,%R10 |
(167) 0x4286a0 MOV (%RAX),%R9 |
(167) 0x4286a3 MOV %R11,0x50(%RSP) |
(167) 0x4286a8 MOV %R10,0x58(%RSP) |
(167) 0x4286ad IMUL %RCX,%R9 |
(167) 0x4286b1 IMUL (%R13),%RCX |
(167) 0x4286b6 MOV %R9,0x60(%RSP) |
(167) 0x4286bb MOV %RCX,0x68(%RSP) |
(167) 0x4286c0 LEA -0x1(%RDX),%ECX |
(167) 0x4286c3 CMP $0x6,%ECX |
(167) 0x4286c6 JBE 428a88 |
(167) 0x4286cc MOVSXD 0x74(%RSP),%RAX |
(167) 0x4286d1 MOV 0x68(%RSP),%RDI |
(167) 0x4286d6 LEA (%R11,%RAX,1),%R11 |
(167) 0x4286da LEA (%R9,%RAX,1),%R9 |
(167) 0x4286de LEA (%R15,%R11,8),%RCX |
(167) 0x4286e2 LEA (%R14,%R9,8),%R11 |
(167) 0x4286e6 MOV %EDX,%R9D |
(167) 0x4286e9 SHR $0x3,%R9D |
(167) 0x4286ed LEA (%R10,%RAX,1),%R10 |
(167) 0x4286f1 LEA (%R8,%RAX,1),%R13 |
(167) 0x4286f5 ADD %RDI,%RAX |
(167) 0x4286f8 SAL $0x6,%R9 |
(167) 0x4286fc LEA (%RSI,%R10,8),%R12 |
(167) 0x428700 MOV 0x78(%RSP),%R10 |
(167) 0x428705 LEA (%RSI,%R13,8),%R13 |
(167) 0x428709 LEA -0x40(%R9),%RDI |
(167) 0x42870d SHR $0x6,%RDI |
(167) 0x428711 LEA (%R10,%RAX,8),%R10 |
(167) 0x428715 XOR %EAX,%EAX |
(167) 0x428717 INC %RDI |
(167) 0x42871a AND $0x3,%EDI |
(167) 0x42871d JE 4287c1 |
(167) 0x428723 CMP $0x1,%RDI |
(167) 0x428727 JE 428789 |
(167) 0x428729 CMP $0x2,%RDI |
(167) 0x42872d JE 42875a |
(167) 0x42872f VMOVUPD (%RCX),%ZMM6 |
(167) 0x428735 MOV $0x40,%EAX |
(167) 0x42873a VADDPD (%R13),%ZMM6,%ZMM0 |
(167) 0x428741 VSUBPD (%R12),%ZMM0,%ZMM1 |
(167) 0x428748 VMOVUPD %ZMM1,(%R11) |
(167) 0x42874e VMOVUPD (%RCX),%ZMM7 |
(167) 0x428754 VMOVUPD %ZMM7,(%R10) |
(167) 0x42875a VMOVUPD (%RCX,%RAX,1),%ZMM2 |
(167) 0x428761 VADDPD (%R13,%RAX,1),%ZMM2,%ZMM3 |
(167) 0x428769 VSUBPD (%R12,%RAX,1),%ZMM3,%ZMM4 |
(167) 0x428770 VMOVUPD %ZMM4,(%R11,%RAX,1) |
(167) 0x428777 VMOVUPD (%RCX,%RAX,1),%ZMM5 |
(167) 0x42877e VMOVUPD %ZMM5,(%R10,%RAX,1) |
(167) 0x428785 ADD $0x40,%RAX |
(167) 0x428789 VMOVUPD (%RCX,%RAX,1),%ZMM8 |
(167) 0x428790 VADDPD (%R13,%RAX,1),%ZMM8,%ZMM9 |
(167) 0x428798 VSUBPD (%R12,%RAX,1),%ZMM9,%ZMM10 |
(167) 0x42879f VMOVUPD %ZMM10,(%R11,%RAX,1) |
(167) 0x4287a6 VMOVUPD (%RCX,%RAX,1),%ZMM11 |
(167) 0x4287ad VMOVUPD %ZMM11,(%R10,%RAX,1) |
(167) 0x4287b4 ADD $0x40,%RAX |
(167) 0x4287b8 CMP %RAX,%R9 |
(167) 0x4287bb JE 42888b |
(168) 0x4287c1 VMOVUPD (%RCX,%RAX,1),%ZMM12 |
(168) 0x4287c8 VADDPD (%R13,%RAX,1),%ZMM12,%ZMM13 |
(168) 0x4287d0 VSUBPD (%R12,%RAX,1),%ZMM13,%ZMM14 |
(168) 0x4287d7 VMOVUPD %ZMM14,(%R11,%RAX,1) |
(168) 0x4287de VMOVUPD (%RCX,%RAX,1),%ZMM15 |
(168) 0x4287e5 VMOVUPD %ZMM15,(%R10,%RAX,1) |
(168) 0x4287ec VMOVUPD 0x40(%RCX,%RAX,1),%ZMM6 |
(168) 0x4287f4 VADDPD 0x40(%R13,%RAX,1),%ZMM6,%ZMM0 |
(168) 0x4287fc VSUBPD 0x40(%R12,%RAX,1),%ZMM0,%ZMM1 |
(168) 0x428804 VMOVUPD %ZMM1,0x40(%R11,%RAX,1) |
(168) 0x42880c VMOVUPD 0x40(%RCX,%RAX,1),%ZMM7 |
(168) 0x428814 VMOVUPD %ZMM7,0x40(%R10,%RAX,1) |
(168) 0x42881c VMOVUPD 0x80(%RCX,%RAX,1),%ZMM2 |
(168) 0x428824 VADDPD 0x80(%R13,%RAX,1),%ZMM2,%ZMM3 |
(168) 0x42882c VSUBPD 0x80(%R12,%RAX,1),%ZMM3,%ZMM4 |
(168) 0x428834 VMOVUPD %ZMM4,0x80(%R11,%RAX,1) |
(168) 0x42883c VMOVUPD 0x80(%RCX,%RAX,1),%ZMM5 |
(168) 0x428844 VMOVUPD %ZMM5,0x80(%R10,%RAX,1) |
(168) 0x42884c VMOVUPD 0xc0(%RCX,%RAX,1),%ZMM8 |
(168) 0x428854 VADDPD 0xc0(%R13,%RAX,1),%ZMM8,%ZMM9 |
(168) 0x42885c VSUBPD 0xc0(%R12,%RAX,1),%ZMM9,%ZMM10 |
(168) 0x428864 VMOVUPD %ZMM10,0xc0(%R11,%RAX,1) |
(168) 0x42886c VMOVUPD 0xc0(%RCX,%RAX,1),%ZMM11 |
(168) 0x428874 VMOVUPD %ZMM11,0xc0(%R10,%RAX,1) |
(168) 0x42887c ADD $0x100,%RAX |
(168) 0x428882 CMP %RAX,%R9 |
(168) 0x428885 JNE 4287c1 |
(167) 0x42888b MOV 0x74(%RSP),%ECX |
(167) 0x42888f MOV %EDX,%R12D |
(167) 0x428892 AND $-0x8,%R12D |
(167) 0x428896 ADD %R12D,%EBX |
(167) 0x428899 LEA (%R12,%RCX,1),%EDI |
(167) 0x42889d TEST $0x7,%DL |
(167) 0x4288a0 JE 428a1a |
(167) 0x4288a6 SUB %R12D,%EDX |
(167) 0x4288a9 LEA -0x1(%RDX),%R13D |
(167) 0x4288ad CMP $0x2,%R13D |
(167) 0x4288b1 JBE 428928 |
(167) 0x4288b3 MOVSXD 0x74(%RSP),%RAX |
(167) 0x4288b8 MOV 0x50(%RSP),%R11 |
(167) 0x4288bd MOV 0x58(%RSP),%R13 |
(167) 0x4288c2 LEA (%R8,%RAX,1),%R9 |
(167) 0x4288c6 LEA (%R11,%RAX,1),%R10 |
(167) 0x4288ca ADD %R12,%R9 |
(167) 0x4288cd ADD %R12,%R10 |
(167) 0x4288d0 LEA (%R13,%RAX,1),%R11 |
(167) 0x4288d5 VMOVUPD (%RSI,%R9,8),%YMM12 |
(167) 0x4288db LEA (%R15,%R10,8),%RCX |
(167) 0x4288df ADD %R12,%R11 |
(167) 0x4288e2 MOV 0x60(%RSP),%R10 |
(167) 0x4288e7 VADDPD (%RCX),%YMM12,%YMM13 |
(167) 0x4288eb LEA (%R10,%RAX,1),%R9 |
(167) 0x4288ef ADD %R12,%R9 |
(167) 0x4288f2 VSUBPD (%RSI,%R11,8),%YMM13,%YMM14 |
(167) 0x4288f8 VMOVUPD %YMM14,(%R14,%R9,8) |
(167) 0x4288fe VMOVUPD (%RCX),%YMM15 |
(167) 0x428902 MOV 0x68(%RSP),%RCX |
(167) 0x428907 ADD %RCX,%RAX |
(167) 0x42890a ADD %R12,%RAX |
(167) 0x42890d MOV 0x78(%RSP),%R12 |
(167) 0x428912 VMOVUPD %YMM15,(%R12,%RAX,8) |
(167) 0x428918 TEST $0x3,%DL |
(167) 0x42891b JE 428a1a |
(167) 0x428921 AND $-0x4,%EDX |
(167) 0x428924 ADD %EDX,%EBX |
(167) 0x428926 ADD %EDX,%EDI |
(167) 0x428928 MOVSXD %EDI,%RAX |
(167) 0x42892b MOV 0x50(%RSP),%R10 |
(167) 0x428930 MOV 0x58(%RSP),%R12 |
(167) 0x428935 LEA (%R8,%RAX,1),%R9 |
(167) 0x428939 MOV 0x60(%RSP),%R11 |
(167) 0x42893e VMOVSD (%RSI,%R9,8),%XMM6 |
(167) 0x428944 LEA (%R10,%RAX,1),%RDX |
(167) 0x428948 LEA 0x1(%RBX),%R9D |
(167) 0x42894c LEA (%R15,%RDX,8),%R13 |
(167) 0x428950 LEA (%R12,%RAX,1),%RDX |
(167) 0x428954 VADDSD (%R13),%XMM6,%XMM0 |
(167) 0x42895a LEA (%R11,%RAX,1),%RCX |
(167) 0x42895e VSUBSD (%RSI,%RDX,8),%XMM0,%XMM1 |
(167) 0x428963 MOV 0x70(%RSP),%EDX |
(167) 0x428967 VMOVSD %XMM1,(%R14,%RCX,8) |
(167) 0x42896d MOV 0x78(%RSP),%RCX |
(167) 0x428972 VMOVSD (%R13),%XMM7 |
(167) 0x428978 MOV 0x68(%RSP),%R13 |
(167) 0x42897d ADD %R13,%RAX |
(167) 0x428980 VMOVSD %XMM7,(%RCX,%RAX,8) |
(167) 0x428985 LEA 0x1(%RDI),%EAX |
(167) 0x428988 CMP %EDX,%R9D |
(167) 0x42898b JAE 428a1a |
(167) 0x428991 CLTQ |
(167) 0x428993 ADD $0x2,%EBX |
(167) 0x428996 ADD $0x2,%EDI |
(167) 0x428999 LEA (%R8,%RAX,1),%R9 |
(167) 0x42899d LEA (%R10,%RAX,1),%RCX |
(167) 0x4289a1 VMOVSD (%RSI,%R9,8),%XMM2 |
(167) 0x4289a7 LEA (%R15,%RCX,8),%RDX |
(167) 0x4289ab LEA (%R12,%RAX,1),%R9 |
(167) 0x4289af LEA (%R11,%RAX,1),%RCX |
(167) 0x4289b3 ADD %R13,%RAX |
(167) 0x4289b6 VADDSD (%RDX),%XMM2,%XMM3 |
(167) 0x4289ba VSUBSD (%RSI,%R9,8),%XMM3,%XMM4 |
(167) 0x4289c0 MOV %R13,%R9 |
(167) 0x4289c3 MOV 0x78(%RSP),%R13 |
(167) 0x4289c8 VMOVSD %XMM4,(%R14,%RCX,8) |
(167) 0x4289ce VMOVSD (%RDX),%XMM5 |
(167) 0x4289d2 VMOVSD %XMM5,(%R13,%RAX,8) |
(167) 0x4289d9 MOV 0x70(%RSP),%EAX |
(167) 0x4289dd CMP %EAX,%EBX |
(167) 0x4289df JAE 428a1a |
(167) 0x4289e1 MOVSXD %EDI,%RBX |
(167) 0x4289e4 ADD %RBX,%R8 |
(167) 0x4289e7 ADD %RBX,%R10 |
(167) 0x4289ea ADD %RBX,%R12 |
(167) 0x4289ed ADD %RBX,%R11 |
(167) 0x4289f0 VMOVSD (%RSI,%R8,8),%XMM8 |
(167) 0x4289f6 LEA (%R15,%R10,8),%R15 |
(167) 0x4289fa ADD %RBX,%R9 |
(167) 0x4289fd VADDSD (%R15),%XMM8,%XMM9 |
(167) 0x428a02 VSUBSD (%RSI,%R12,8),%XMM9,%XMM10 |
(167) 0x428a08 VMOVSD %XMM10,(%R14,%R11,8) |
(167) 0x428a0e VMOVSD (%R15),%XMM11 |
(167) 0x428a13 VMOVSD %XMM11,(%R13,%R9,8) |
(167) 0x428a1a MOV 0x48(%RSP),%RCX |
(167) 0x428a1f MOV 0x70(%RSP),%EBX |
(167) 0x428a23 LEA (%RCX),%ESI |
(167) 0x428a25 CMP %ESI,0x40(%RSP) |
(167) 0x428a29 JLE 428a70 |
(167) 0x428a2b MOV 0x38(%RSP),%EDI |
(167) 0x428a2f MOV 0x44(%RSP),%EDX |
(167) 0x428a33 MOV 0x3c(%RSP),%R8D |
(167) 0x428a38 SUB %EBX,%EDI |
(167) 0x428a3a CMP %EDX,%EDI |
(167) 0x428a3c MOV %R8D,0x74(%RSP) |
(167) 0x428a41 CMOVBE %EDI,%EDX |
(167) 0x428a44 LEA (%RBX,%RDX,1),%ESI |
(167) 0x428a47 MOV %ESI,0x70(%RSP) |
(167) 0x428a4b CMP %ESI,%EBX |
(167) 0x428a4d JB 428658 |
(169) 0x428a53 LEA 0x1(%RCX),%RDI |
(169) 0x428a57 MOV %RDI,0x48(%RSP) |
(169) 0x428a5c MOV 0x48(%RSP),%RCX |
(169) 0x428a61 LEA (%RCX),%ESI |
(169) 0x428a63 CMP %ESI,0x40(%RSP) |
(169) 0x428a67 JG 428a2b |
0x428a69 NOPL (%RAX) |
0x428a70 VZEROUPPER |
0x428a73 LEA -0x28(%RBP),%RSP |
0x428a77 POP %RBX |
0x428a78 POP %R12 |
0x428a7a POP %R13 |
0x428a7c POP %R14 |
0x428a7e POP %R15 |
0x428a80 POP %RBP |
0x428a81 RET |
0x428a82 NOPW (%RAX,%RAX,1) |
(167) 0x428a88 MOV 0x74(%RSP),%EDI |
(167) 0x428a8c XOR %R12D,%R12D |
(167) 0x428a8f JMP 4288a6 |
0x428a94 INC %EDI |
0x428a96 XOR %EDX,%EDX |
0x428a98 JMP 4285e1 |
0x428a9d NOPL (%RAX) |
Path / |
Source file and lines | advec_cell.cpp:146-150 |
Module | exec |
nb instructions | 86 |
nb uops | 97 |
loop length | 291 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 11 |
micro-operation queue | 16.17 cycles |
front end | 16.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 7.20 | 8.00 | 6.00 | 6.00 | 9.00 | 7.27 | 7.20 | 9.00 | 9.00 | 9.00 | 7.33 | 6.00 |
cycles | 7.20 | 12.33 | 6.00 | 6.00 | 9.00 | 7.27 | 7.20 | 9.00 | 9.00 | 9.00 | 7.33 | 6.00 |
Cycles executing div or sqrt instructions | 12.00 |
FE+BE cycles | 15.42-15.54 |
Stall cycles | 0.00 |
Front-end | 16.17 |
Dispatch | 12.33 |
DIV/SQRT | 12.00 |
Overall L1 | 16.17 |
all | 4% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 12% |
all | 8% |
load | 8% |
store | 8% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 8% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD $-0x80,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x28(%RDI),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x2c(%RDI),%EDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RDI),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x24(%RDI),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x4,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x1(%RAX),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA -0x1(%RBX),%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDX,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %ESI,0x3c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %EDX,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 428a73 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.5+0x513> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %EDX,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x4(%RCX),%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB %R15D,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R14D,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 428a73 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.5+0x513> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDI,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R14D,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %ESI,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDI,0x44(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 404650 <omp_get_num_threads@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 404540 <omp_get_thread_num@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EAX,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x44(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %EBX,%EAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
DIV %R12D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 428a94 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.5+0x534> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %EDI,%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%R8,%RDX,1),%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (%RDI,%RBX,1),%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R9D,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %R9D,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 428a73 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.5+0x513> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EBX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x3c(%RSP),%R10D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%R13),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
DIVL 0x44(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 6 |
MOV %RCX,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %EDX,%R10D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R14D,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (%RAX,%R15,1),%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV 0x10(%R13),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %R10D,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV (%R13),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%R13),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10D,0x74(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %EDX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R14,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD %R11D,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
CMOVBE %EDI,%EDX | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
MOV %R15,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RBX,%RDX,1),%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %ESI,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %ESI,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 428a53 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.5+0x4f3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4285e1 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.5+0x81> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | advec_cell.cpp:146-150 |
Module | exec |
nb instructions | 86 |
nb uops | 97 |
loop length | 291 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 11 |
micro-operation queue | 16.17 cycles |
front end | 16.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 7.20 | 8.00 | 6.00 | 6.00 | 9.00 | 7.27 | 7.20 | 9.00 | 9.00 | 9.00 | 7.33 | 6.00 |
cycles | 7.20 | 12.33 | 6.00 | 6.00 | 9.00 | 7.27 | 7.20 | 9.00 | 9.00 | 9.00 | 7.33 | 6.00 |
Cycles executing div or sqrt instructions | 12.00 |
FE+BE cycles | 15.42-15.54 |
Stall cycles | 0.00 |
Front-end | 16.17 |
Dispatch | 12.33 |
DIV/SQRT | 12.00 |
Overall L1 | 16.17 |
all | 4% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 12% |
all | 8% |
load | 8% |
store | 8% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 8% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD $-0x80,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x28(%RDI),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x2c(%RDI),%EDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RDI),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x24(%RDI),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x4,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x1(%RAX),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA -0x1(%RBX),%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDX,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %ESI,0x3c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %EDX,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 428a73 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.5+0x513> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %EDX,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x4(%RCX),%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB %R15D,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R14D,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 428a73 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.5+0x513> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDI,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R14D,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %ESI,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDI,0x44(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 404650 <omp_get_num_threads@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 404540 <omp_get_thread_num@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EAX,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x44(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %EBX,%EAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
DIV %R12D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 428a94 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.5+0x534> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %EDI,%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%R8,%RDX,1),%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (%RDI,%RBX,1),%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R9D,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %R9D,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 428a73 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.5+0x513> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EBX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x3c(%RSP),%R10D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%R13),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
DIVL 0x44(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 6 |
MOV %RCX,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %EDX,%R10D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R14D,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (%RAX,%R15,1),%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV 0x10(%R13),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %R10D,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV (%R13),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%R13),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10D,0x74(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %EDX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R14,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD %R11D,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
CMOVBE %EDI,%EDX | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
MOV %R15,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RBX,%RDX,1),%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %ESI,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %ESI,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 428a53 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.5+0x4f3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4285e1 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.5+0x81> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼advec_cell_kernel(int, int, int, int, int, int, clover::Buffer1D | 1.28 | 0.97 |
▼Loop 169 - advec_cell.cpp:148-150 - exec– | 0 | 0.01 |
▼Loop 167 - advec_cell.cpp:148-150 - exec– | 0 | 0 |
○Loop 168 - advec_cell.cpp:149-150 - exec | 1.28 | 0.97 |