Function: calc_dt_kernel(int, int, int, int, double, double, double, double, double, clover::Buffer2 ... | Module: exec | Source: calc_dt.cpp:49-76 [...] | Coverage: 2.21% |
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Function: calc_dt_kernel(int, int, int, int, double, double, double, double, double, clover::Buffer2 ... | Module: exec | Source: calc_dt.cpp:49-76 [...] | Coverage: 2.21% |
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/scratch_na/users/xoserete/qaas_runs/171-291-1828/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/context.h: 46 - 69 |
-------------------------------------------------------------------------------- |
46: T &operator[](size_t i) const { return data[i]; } |
[...] |
69: T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; } |
/scratch_na/users/xoserete/qaas_runs/171-291-1828/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/calc_dt.cpp: 49 - 76 |
-------------------------------------------------------------------------------- |
49: #pragma omp parallel for simd collapse(2) reduction(min : dt_min_val0) |
50: for (int j = (y_min + 1); j < (y_max + 2); j++) { |
51: for (int i = (x_min + 1); i < (x_max + 2); i++) { |
52: double dsx = celldx[i]; |
53: double dsy = celldy[j]; |
54: double cc = soundspeed(i, j) * soundspeed(i, j); |
55: cc = cc + 2.0 * viscosity_a(i, j) / density0(i, j); |
56: cc = std::fmax(std::sqrt(cc), g_small); |
57: double dtct = dtc_safe * std::fmin(dsx, dsy) / cc; |
58: double div = 0.0; |
59: double dv1 = (xvel0(i, j) + xvel0(i + 0, j + 1)) * xarea(i, j); |
60: double dv2 = (xvel0(i + 1, j + 0) + xvel0(i + 1, j + 1)) * xarea(i + 1, j + 0); |
61: div = div + dv2 - dv1; |
62: double dtut = dtu_safe * 2.0 * volume(i, j) / std::fmax(std::fmax(std::fabs(dv1), std::fabs(dv2)), g_small * volume(i, j)); |
63: dv1 = (yvel0(i, j) + yvel0(i + 1, j + 0)) * yarea(i, j); |
64: dv2 = (yvel0(i + 0, j + 1) + yvel0(i + 1, j + 1)) * yarea(i + 0, j + 1); |
65: div = div + dv2 - dv1; |
66: double dtvt = dtv_safe * 2.0 * volume(i, j) / std::fmax(std::fmax(std::fabs(dv1), std::fabs(dv2)), g_small * volume(i, j)); |
67: div = div / (2.0 * volume(i, j)); |
68: double dtdivt; |
69: if (div < -g_small) { |
70: dtdivt = dtdiv_safe * (-1.0 / div); |
71: } else { |
72: dtdivt = g_big; |
73: } |
74: double mins = std::fmin(dtct, std::fmin(dtut, std::fmin(dtvt, std::fmin(dtdivt, g_big)))); |
75: dt_min_val0 = std::fmin(mins, dt_min_val0); |
76: } |
0x429130 PUSH %RBP |
0x429131 MOV %RSP,%RBP |
0x429134 PUSH %R15 |
0x429136 PUSH %R14 |
0x429138 PUSH %R13 |
0x42913a PUSH %R12 |
0x42913c PUSH %RBX |
0x42913d AND $-0x20,%RSP |
0x429141 SUB $0x220,%RSP |
0x429148 MOV 0x80(%RBP),%RAX |
0x42914f MOVL $0,0x1c(%RSP) |
0x429157 TEST %RAX,%RAX |
0x42915a JS 429843 |
0x429160 MOV %R9,%R14 |
0x429163 MOV %R8,%R13 |
0x429166 MOV %RCX,%R12 |
0x429169 MOV %RDX,%R15 |
0x42916c MOV %RDI,0x90(%RSP) |
0x429174 MOV (%RDI),%ESI |
0x429176 MOVQ $0,0x78(%RSP) |
0x42917f MOV %RAX,0x70(%RSP) |
0x429184 MOVQ $0x1,0xb8(%RSP) |
0x429190 SUB $0x8,%RSP |
0x429194 LEA 0xc0(%RSP),%RAX |
0x42919c LEA 0x24(%RSP),%RCX |
0x4291a1 LEA 0x80(%RSP),%R8 |
0x4291a9 LEA 0x78(%RSP),%R9 |
0x4291ae MOV $0x682e70,%EDI |
0x4291b3 MOV %ESI,0x20(%RSP) |
0x4291b7 MOV $0x22,%EDX |
0x4291bc PUSH $0x1 |
0x4291be PUSH $0x1 |
0x4291c0 PUSH %RAX |
0x4291c1 CALL 403020 <__kmpc_for_static_init_8@plt> |
0x4291c6 ADD $0x20,%RSP |
0x4291ca MOV 0x78(%RSP),%RDI |
0x4291cf MOV 0x70(%RSP),%R10 |
0x4291d4 CMP %R10,%RDI |
0x4291d7 JBE 4291e6 |
0x4291d9 VMOVSD 0x3fa27(%RIP),%XMM0 |
0x4291e1 JMP 4297c6 |
0x4291e6 MOV 0x70(%RBP),%R11 |
0x4291ea MOV 0x68(%RBP),%RBX |
0x4291ee MOV 0x50(%RBP),%RAX |
0x4291f2 MOV 0x48(%RBP),%RCX |
0x4291f6 MOV 0x40(%RBP),%RDX |
0x4291fa MOV 0x38(%RBP),%RSI |
0x4291fe MOV 0x28(%RBP),%R8 |
0x429202 MOV 0x20(%RBP),%R9 |
0x429206 VMOVQ %R14,%XMM0 |
0x42920b VMOVQ %R13,%XMM1 |
0x429210 VMOVQ %R12,%XMM2 |
0x429215 VMOVQ %R15,%XMM11 |
0x42921a SUB %EBX,%R11D |
0x42921d MOV 0x8(%R9),%R9 |
0x429221 MOV %R9,0x60(%RSP) |
0x429226 MOV 0x8(%R8),%R8 |
0x42922a MOV (%RCX),%R9 |
0x42922d MOV %R9,0x40(%RSP) |
0x429232 MOV 0x10(%RCX),%RCX |
0x429236 MOV %RCX,0x58(%RSP) |
0x42923b MOV (%RDX),%RCX |
0x42923e MOV %RCX,0x38(%RSP) |
0x429243 MOV 0x10(%RDX),%RCX |
0x429247 MOV %RCX,0x10(%RSP) |
0x42924c MOV (%RSI),%RCX |
0x42924f MOV %RCX,0x8(%RSP) |
0x429254 MOV 0x10(%RSI),%RCX |
0x429258 MOV %RCX,(%RSP) |
0x42925c LEA 0x1(%RDI),%RCX |
0x429260 LEA 0x1(%R10),%RDX |
0x429264 CMP %RDX,%RCX |
0x429267 CMOVG %RCX,%RDX |
0x42926b MOV (%RAX),%RCX |
0x42926e MOV 0x10(%RAX),%R15 |
0x429272 MOV 0x10(%RBP),%RAX |
0x429276 MOV (%RAX),%RSI |
0x429279 MOV 0x10(%RAX),%RAX |
0x42927d MOV %RAX,0x50(%RSP) |
0x429282 VADDSD %XMM2,%XMM2,%XMM12 |
0x429286 MOV 0x30(%RBP),%RAX |
0x42928a MOV (%RAX),%R12 |
0x42928d MOV 0x10(%RAX),%RAX |
0x429291 MOV %RAX,0x48(%RSP) |
0x429296 MOV 0x58(%RBP),%RAX |
0x42929a MOV (%RAX),%R9 |
0x42929d MOV 0x10(%RAX),%RBX |
0x4292a1 MOV 0x18(%RBP),%RAX |
0x4292a5 MOV (%RAX),%R13 |
0x4292a8 MOV 0x10(%RAX),%RAX |
0x4292ac MOV %RAX,0x30(%RSP) |
0x4292b1 VADDSD %XMM1,%XMM1,%XMM13 |
0x4292b5 VPXORQ 0x3cff1(%RIP){1to2},%XMM0,%XMM14 |
0x4292bf SUB %RDI,%RDX |
0x4292c2 MOV $-0x4,%EAX |
0x4292c7 MOV %RDX,0x88(%RSP) |
0x4292cf AND %RDX,%RAX |
0x4292d2 MOV %R10,%R14 |
0x4292d5 MOV 0x8(%RSP),%R10 |
0x4292da MOV %R11,0x28(%RSP) |
0x4292df MOV %RCX,0x20(%RSP) |
0x4292e4 MOV %RSI,0xb0(%RSP) |
0x4292ec MOV %R12,0xa8(%RSP) |
0x4292f4 MOV %R9,0xa0(%RSP) |
0x4292fc MOV %R13,0x98(%RSP) |
0x429304 JE 429852 |
0x42930a MOV %RAX,%RDX |
0x42930d MOV %R14,0x80(%RSP) |
0x429315 VPBROADCASTQ %R11,%YMM8 |
0x42931b MOV 0x60(%RBP),%EAX |
0x42931e VPBROADCASTD %EAX,%XMM0 |
0x429324 VMOVDQU %XMM0,0x110(%RSP) |
0x42932d MOV 0x68(%RBP),%RAX |
0x429331 VPBROADCASTD %EAX,%XMM0 |
0x429337 VMOVDQU %XMM0,0x100(%RSP) |
0x429340 MOV 0x40(%RSP),%RAX |
0x429345 VPBROADCASTQ %RAX,%YMM0 |
0x42934b VMOVDQU %YMM0,0x1e0(%RSP) |
0x429354 MOV 0x38(%RSP),%RAX |
0x429359 VPBROADCASTQ %RAX,%YMM0 |
0x42935f VMOVDQU %YMM0,0x1c0(%RSP) |
0x429368 VPBROADCASTQ %R10,%YMM0 |
0x42936e VMOVDQU %YMM0,0x1a0(%RSP) |
0x429377 VMOVDQU %XMM11,0xf0(%RSP) |
0x429380 VPBROADCASTQ %XMM11,%YMM0 |
0x429385 VMOVDQU %YMM0,0x180(%RSP) |
0x42938e VPBROADCASTQ %RCX,%YMM20 |
0x429394 VPBROADCASTQ %RSI,%YMM0 |
0x42939a VMOVDQU %YMM0,0x160(%RSP) |
0x4293a3 VPBROADCASTQ %R12,%YMM0 |
0x4293a9 VMOVDQU %YMM0,0x140(%RSP) |
0x4293b2 VMOVUPD %XMM12,0xe0(%RSP) |
0x4293bb VBROADCASTSD %XMM12,%YMM0 |
0x4293c0 VMOVUPD %YMM0,0x120(%RSP) |
0x4293c9 VPBROADCASTQ %R9,%YMM24 |
0x4293cf VPBROADCASTQ %R13,%YMM25 |
0x4293d5 VMOVUPD %XMM13,0xd0(%RSP) |
0x4293de VBROADCASTSD %XMM13,%YMM26 |
0x4293e4 VMOVDQU %XMM14,0xc0(%RSP) |
0x4293ed VPBROADCASTQ %XMM14,%YMM27 |
0x4293f3 VPBROADCASTQ %RDI,%YMM0 |
0x4293f9 VPADDQ 0x3ccff(%RIP),%YMM0,%YMM9 |
0x429401 VBROADCASTSD 0x3f7fd(%RIP),%YMM28 |
0x42940b XOR %R12D,%R12D |
0x42940e VBROADCASTSD 0x3bc50(%RIP),%YMM29 |
0x429418 VPCMPEQD %XMM13,%XMM13,%XMM13 |
0x42941d VBROADCASTSD 0x3c2c1(%RIP),%YMM31 |
0x429427 VBROADCASTSD 0x3f7cf(%RIP),%YMM30 |
0x429431 MOV 0x30(%RSP),%R14 |
0x429436 NOPW %CS:(%RAX,%RAX,1) |
(160) 0x429440 VMOVDQA %YMM9,%YMM0 |
(160) 0x429444 VMOVDQA %YMM8,%YMM1 |
(160) 0x429448 MOV %R8,%R13 |
(160) 0x42944b MOV %RDX,%RSI |
(160) 0x42944e MOV $0x454690,%RAX |
(160) 0x429455 CALL %RAX |
(160) 0x429457 VPMOVQD %YMM0,%XMM0 |
(160) 0x42945d VPADDD 0x110(%RSP),%XMM0,%XMM10 |
(160) 0x429466 VMOVDQA %YMM9,%YMM0 |
(160) 0x42946a VMOVDQA %YMM8,%YMM1 |
(160) 0x42946e CALL 454460 <__svml_i64rem4_l9> |
(160) 0x429474 MOV %RSI,%RDX |
(160) 0x429477 MOV %R13,%R8 |
(160) 0x42947a VPMOVQD %YMM0,%XMM0 |
(160) 0x429480 VPADDD 0x100(%RSP),%XMM0,%XMM0 |
(160) 0x429489 VPMOVSXDQ %XMM0,%YMM1 |
(160) 0x42948e VPMOVSXDQ %XMM10,%YMM2 |
(160) 0x429493 VMOVDQU 0x1c0(%RSP),%YMM3 |
(160) 0x42949c VPMULLQ %YMM2,%YMM3,%YMM3 |
(160) 0x4294a2 KXNORW %K0,%K0,%K1 |
(160) 0x4294a6 VPADDQ %YMM1,%YMM3,%YMM5 |
(160) 0x4294aa VPXOR %XMM3,%XMM3,%XMM3 |
(160) 0x4294ae VMOVDQU 0x1a0(%RSP),%YMM4 |
(160) 0x4294b7 VPMULLQ %YMM2,%YMM4,%YMM4 |
(160) 0x4294bd KXNORW %K0,%K0,%K2 |
(160) 0x4294c1 VPADDQ %YMM1,%YMM4,%YMM6 |
(160) 0x4294c5 VPXOR %XMM4,%XMM4,%XMM4 |
(160) 0x4294c9 VPMULLQ %YMM2,%YMM20,%YMM12 |
(160) 0x4294cf VPADDQ %YMM1,%YMM12,%YMM7 |
(160) 0x4294d3 MOV 0x10(%RSP),%RAX |
(160) 0x4294d8 VGATHERQPD (%RAX,%YMM5,8),%YMM3{%K1} |
(160) 0x4294df VPSUBD %XMM13,%XMM10,%XMM5 |
(160) 0x4294e4 VPMOVSXDQ %XMM5,%YMM11 |
(160) 0x4294e9 VPMULLQ %YMM11,%YMM20,%YMM15 |
(160) 0x4294ef MOV (%RSP),%RAX |
(160) 0x4294f3 VGATHERQPD (%RAX,%YMM6,8),%YMM4{%K2} |
(160) 0x4294fa KXNORW %K0,%K0,%K1 |
(160) 0x4294fe VPXOR %XMM5,%XMM5,%XMM5 |
(160) 0x429502 VMOVDQU 0x160(%RSP),%YMM6 |
(160) 0x42950b VPMULLQ %YMM2,%YMM6,%YMM6 |
(160) 0x429511 VGATHERQPD (%R15,%YMM7,8),%YMM5{%K1} |
(160) 0x429518 VPADDQ %YMM1,%YMM6,%YMM14 |
(160) 0x42951c KXNORW %K0,%K0,%K1 |
(160) 0x429520 VXORPD %XMM7,%XMM7,%XMM7 |
(160) 0x429524 VPSUBD %XMM13,%XMM0,%XMM16 |
(160) 0x42952a VPMOVSXDQ %XMM16,%YMM16 |
(160) 0x429530 MOV 0x50(%RSP),%RAX |
(160) 0x429535 VGATHERQPD (%RAX,%YMM14,8),%YMM7{%K1} |
(160) 0x42953c VPADDQ %YMM16,%YMM12,%YMM14 |
(160) 0x429542 KXNORW %K0,%K0,%K1 |
(160) 0x429546 VPXOR %XMM12,%XMM12,%XMM12 |
(160) 0x42954b VPADDQ %YMM16,%YMM6,%YMM6 |
(160) 0x429551 KXNORW %K0,%K0,%K2 |
(160) 0x429555 VGATHERQPD (%R15,%YMM14,8),%YMM12{%K1} |
(160) 0x42955c VXORPD %XMM14,%XMM14,%XMM14 |
(160) 0x429561 VMOVDQU64 0x140(%RSP),%YMM17 |
(160) 0x429569 VPMULLQ %YMM2,%YMM17,%YMM17 |
(160) 0x42956f VPADDQ %YMM1,%YMM17,%YMM17 |
(160) 0x429575 VGATHERQPD (%RAX,%YMM6,8),%YMM14{%K2} |
(160) 0x42957c KXNORW %K0,%K0,%K1 |
(160) 0x429580 VXORPD %XMM6,%XMM6,%XMM6 |
(160) 0x429584 VPMULLQ %YMM2,%YMM24,%YMM18 |
(160) 0x42958a MOV 0x48(%RSP),%RAX |
(160) 0x42958f VGATHERQPD (%RAX,%YMM17,8),%YMM6{%K1} |
(160) 0x429596 VPADDQ %YMM1,%YMM18,%YMM17 |
(160) 0x42959c KXNORW %K0,%K0,%K1 |
(160) 0x4295a0 VXORPD %XMM19,%XMM19,%XMM19 |
(160) 0x4295a6 VPADDQ %YMM16,%YMM18,%YMM18 |
(160) 0x4295ac VGATHERQPD (%RBX,%YMM17,8),%YMM19{%K1} |
(160) 0x4295b3 KXNORW %K0,%K0,%K1 |
(160) 0x4295b7 VXORPD %XMM17,%XMM17,%XMM17 |
(160) 0x4295bd VPMULLQ %YMM2,%YMM25,%YMM21 |
(160) 0x4295c3 VGATHERQPD (%RBX,%YMM18,8),%YMM17{%K1} |
(160) 0x4295ca VPADDQ %YMM1,%YMM21,%YMM18 |
(160) 0x4295d0 KXNORW %K0,%K0,%K1 |
(160) 0x4295d4 VPXORD %XMM21,%XMM21,%XMM21 |
(160) 0x4295da VGATHERQPD (%R14,%YMM18,8),%YMM21{%K1} |
(160) 0x4295e1 VPADDQ %YMM1,%YMM15,%YMM18 |
(160) 0x4295e7 KXNORW %K0,%K0,%K1 |
(160) 0x4295eb VXORPD %XMM22,%XMM22,%XMM22 |
(160) 0x4295f1 VPADDQ %YMM16,%YMM15,%YMM15 |
(160) 0x4295f7 VGATHERQPD (%R15,%YMM18,8),%YMM22{%K1} |
(160) 0x4295fe KXNORW %K0,%K0,%K1 |
(160) 0x429602 VXORPD %XMM18,%XMM18,%XMM18 |
(160) 0x429608 VPMULLQ %YMM11,%YMM24,%YMM23 |
(160) 0x42960e VGATHERQPD (%R15,%YMM15,8),%YMM18{%K1} |
(160) 0x429615 VPADDQ %YMM1,%YMM23,%YMM15 |
(160) 0x42961b KXNORW %K0,%K0,%K1 |
(160) 0x42961f VPADDQ %YMM16,%YMM23,%YMM16 |
(160) 0x429625 VPXORD %XMM23,%XMM23,%XMM23 |
(160) 0x42962b VGATHERQPD (%RBX,%YMM15,8),%YMM23{%K1} |
(160) 0x429632 KXNORW %K0,%K0,%K1 |
(160) 0x429636 VXORPD %XMM15,%XMM15,%XMM15 |
(160) 0x42963b VPMULLQ %YMM11,%YMM25,%YMM11 |
(160) 0x429641 VGATHERQPD (%RBX,%YMM16,8),%YMM15{%K1} |
(160) 0x429648 VPADDQ %YMM1,%YMM11,%YMM11 |
(160) 0x42964c KXNORW %K0,%K0,%K1 |
(160) 0x429650 VXORPD %XMM16,%XMM16,%XMM16 |
(160) 0x429656 VGATHERQPD (%R14,%YMM11,8),%YMM16{%K1} |
(160) 0x42965d VMOVDQU 0x1e0(%RSP),%YMM11 |
(160) 0x429666 VPMULLQ %YMM2,%YMM11,%YMM2 |
(160) 0x42966c VPADDQ %YMM1,%YMM2,%YMM1 |
(160) 0x429670 KXNORW %K0,%K0,%K1 |
(160) 0x429674 VPXOR %XMM2,%XMM2,%XMM2 |
(160) 0x429678 MOV 0x58(%RSP),%RAX |
(160) 0x42967d VGATHERQPD (%RAX,%YMM1,8),%YMM2{%K1} |
(160) 0x429684 KXNORW %K0,%K0,%K1 |
(160) 0x429688 VXORPD %XMM1,%XMM1,%XMM1 |
(160) 0x42968c VGATHERDPD (%R13,%XMM10,8),%YMM1{%K1} |
(160) 0x429694 KXNORW %K0,%K0,%K1 |
(160) 0x429698 VXORPD %XMM10,%XMM10,%XMM10 |
(160) 0x42969d MOV 0x60(%RSP),%RAX |
(160) 0x4296a2 VGATHERDPD (%RAX,%XMM0,8),%YMM10{%K1} |
(160) 0x4296a9 VMINPD %YMM1,%YMM10,%YMM0 |
(160) 0x4296ad VADDPD %YMM3,%YMM3,%YMM1 |
(160) 0x4296b1 VDIVPD %YMM4,%YMM1,%YMM1 |
(160) 0x4296b5 VADDPD %YMM5,%YMM22,%YMM3 |
(160) 0x4296bb VMULPD %YMM3,%YMM7,%YMM3 |
(160) 0x4296bf VADDPD %YMM12,%YMM18,%YMM4 |
(160) 0x4296c5 VMULPD %YMM4,%YMM14,%YMM4 |
(160) 0x4296c9 VANDPD %YMM31,%YMM3,%YMM5 |
(160) 0x4296cf VANDPD %YMM31,%YMM4,%YMM7 |
(160) 0x4296d5 VMAXPD %YMM7,%YMM5,%YMM5 |
(160) 0x4296d9 VADDPD %YMM19,%YMM17,%YMM7 |
(160) 0x4296df VMULPD %YMM7,%YMM21,%YMM7 |
(160) 0x4296e5 VADDPD %YMM23,%YMM15,%YMM10 |
(160) 0x4296eb VFMADD231PD %YMM2,%YMM2,%YMM1 |
(160) 0x4296f0 VMULPD %YMM16,%YMM10,%YMM2 |
(160) 0x4296f6 VADDPD %YMM7,%YMM3,%YMM3 |
(160) 0x4296fa VADDPD %YMM4,%YMM2,%YMM4 |
(160) 0x4296fe VSUBPD %YMM3,%YMM4,%YMM3 |
(160) 0x429702 VMULPD %YMM29,%YMM6,%YMM4 |
(160) 0x429708 VMAXPD %YMM4,%YMM5,%YMM5 |
(160) 0x42970c VANDPD %YMM31,%YMM7,%YMM7 |
(160) 0x429712 VMAXPD %YMM4,%YMM7,%YMM4 |
(160) 0x429716 VANDPD %YMM31,%YMM2,%YMM2 |
(160) 0x42971c VMAXPD %YMM2,%YMM4,%YMM2 |
(160) 0x429720 VMULPD 0x120(%RSP),%YMM6,%YMM4 |
(160) 0x429729 VDIVPD %YMM5,%YMM4,%YMM4 |
(160) 0x42972d VMULPD %YMM6,%YMM26,%YMM5 |
(160) 0x429733 VDIVPD %YMM2,%YMM5,%YMM2 |
(160) 0x429737 VMULPD 0x180(%RSP),%YMM0,%YMM0 |
(160) 0x429740 VSQRTPD %YMM1,%YMM1 |
(160) 0x429744 VMAXPD %YMM29,%YMM1,%YMM1 |
(160) 0x42974a VDIVPD %YMM1,%YMM0,%YMM0 |
(160) 0x42974e VADDPD %YMM6,%YMM6,%YMM1 |
(160) 0x429752 VDIVPD %YMM1,%YMM3,%YMM1 |
(160) 0x429756 VCMPPD $0x1,0x3f4af(%RIP){1to0},%YMM1,%K1 |
(160) 0x429761 VMOVAPD %YMM30,%YMM3 |
(160) 0x429767 VDIVPD %YMM1,%YMM27,%YMM3{%K1} |
(160) 0x42976d VMINPD %YMM30,%YMM2,%YMM1 |
(160) 0x429773 VMINPD %YMM1,%YMM4,%YMM1 |
(160) 0x429777 VMINPD %YMM3,%YMM1,%YMM1 |
(160) 0x42977b VMINPD %YMM28,%YMM1,%YMM1 |
(160) 0x429781 VMINPD %YMM1,%YMM0,%YMM28 |
(160) 0x429787 VPADDQ 0x3c967(%RIP){1to4},%YMM9,%YMM9 |
(160) 0x429791 ADD $0x4,%R12 |
(160) 0x429795 CMP %RSI,%R12 |
(160) 0x429798 JB 429440 |
0x42979e VEXTRACTF32X4 $0x1,%YMM28,%XMM0 |
0x4297a5 VMINPD %XMM0,%XMM28,%XMM0 |
0x4297ab VSHUFPD $0x1,%XMM0,%XMM0,%XMM1 |
0x4297b0 VMINSD %XMM1,%XMM0,%XMM0 |
0x4297b4 CMP %RDX,0x88(%RSP) |
0x4297bc MOV (%RSP),%R9 |
0x4297c0 JNE 429863 |
0x4297c6 VMOVSD %XMM0,0x68(%RSP) |
0x4297cc MOV $0x682e90,%EDI |
0x4297d1 MOV 0x18(%RSP),%ESI |
0x4297d5 VZEROUPPER |
0x4297d8 CALL 402e90 <__kmpc_for_static_fini@plt> |
0x4297dd MOV 0x90(%RSP),%RBX |
0x4297e5 MOV (%RBX),%ESI |
0x4297e7 SUB $0x8,%RSP |
0x4297eb MOV $0x687950,%RAX |
0x4297f2 LEA 0x70(%RSP),%R8 |
0x4297f7 MOV $0x682eb0,%EDI |
0x4297fc MOV $0x429120,%R9D |
0x429802 MOV $0x1,%EDX |
0x429807 MOV $0x8,%ECX |
0x42980c PUSH %RAX |
0x42980d CALL 403230 <__kmpc_reduce@plt> |
0x429812 ADD $0x10,%RSP |
0x429816 CMP $0x1,%EAX |
0x429819 JNE 429843 |
0x42981b MOV 0x88(%RBP),%RAX |
0x429822 VMOVSD 0x68(%RSP),%XMM0 |
0x429828 VMINSD (%RAX),%XMM0,%XMM0 |
0x42982c VMOVSD %XMM0,(%RAX) |
0x429830 MOV (%RBX),%ESI |
0x429832 MOV $0x687950,%RDX |
0x429839 MOV $0x682ed0,%EDI |
0x42983e CALL 402f60 <__kmpc_end_reduce@plt> |
0x429843 LEA -0x28(%RBP),%RSP |
0x429847 POP %RBX |
0x429848 POP %R12 |
0x42984a POP %R13 |
0x42984c POP %R14 |
0x42984e POP %R15 |
0x429850 POP %RBP |
0x429851 RET |
0x429852 MOV %R8,%R13 |
0x429855 VMOVSD 0x3f3ab(%RIP),%XMM0 |
0x42985d MOV (%RSP),%R9 |
0x429861 JMP 429897 |
0x429863 ADD %RDX,%RDI |
0x429866 MOV 0x80(%RSP),%R14 |
0x42986e MOV 0x28(%RSP),%R11 |
0x429873 VMOVDQU 0xf0(%RSP),%XMM11 |
0x42987c VMOVUPD 0xe0(%RSP),%XMM12 |
0x429885 VMOVUPD 0xd0(%RSP),%XMM13 |
0x42988e VMOVDQU 0xc0(%RSP),%XMM14 |
0x429897 MOV 0x60(%RBP),%R12D |
0x42989b JMP 429930 |
(159) 0x4298a0 VDIVSD %XMM9,%XMM14,%XMM9 |
(159) 0x4298a5 VFMADD213SD %XMM1,%XMM3,%XMM3 |
(159) 0x4298aa VSQRTSD %XMM3,%XMM3,%XMM1 |
(159) 0x4298ae VMOVSD 0x3b7b2(%RIP),%XMM3 |
(159) 0x4298b6 VMAXSD %XMM3,%XMM1,%XMM1 |
(159) 0x4298ba VMULSD %XMM5,%XMM11,%XMM5 |
(159) 0x4298be VDIVSD %XMM1,%XMM5,%XMM1 |
(159) 0x4298c2 VMULSD %XMM7,%XMM12,%XMM5 |
(159) 0x4298c6 VMOVDDUP 0x3be1a(%RIP),%XMM10 |
(159) 0x4298ce VANDPD %XMM2,%XMM10,%XMM2 |
(159) 0x4298d2 VANDPD %XMM4,%XMM10,%XMM4 |
(159) 0x4298d6 VMAXSD %XMM4,%XMM2,%XMM2 |
(159) 0x4298da VMULSD %XMM3,%XMM7,%XMM3 |
(159) 0x4298de VMAXSD %XMM3,%XMM2,%XMM2 |
(159) 0x4298e2 VDIVSD %XMM2,%XMM5,%XMM2 |
(159) 0x4298e6 VMULSD %XMM7,%XMM13,%XMM4 |
(159) 0x4298ea VANDPD %XMM6,%XMM10,%XMM5 |
(159) 0x4298ee VANDPD %XMM10,%XMM8,%XMM6 |
(159) 0x4298f3 VMAXSD %XMM3,%XMM5,%XMM3 |
(159) 0x4298f7 VMAXSD %XMM6,%XMM3,%XMM3 |
(159) 0x4298fb VMINSD 0x3f2fd(%RIP),%XMM9,%XMM5 |
(159) 0x429903 VDIVSD %XMM3,%XMM4,%XMM3 |
(159) 0x429907 VMINSD %XMM5,%XMM3,%XMM3 |
(159) 0x42990b VMINSD %XMM3,%XMM2,%XMM2 |
(159) 0x42990f VMINSD %XMM0,%XMM2,%XMM0 |
(159) 0x429913 VMINSD %XMM0,%XMM1,%XMM0 |
(159) 0x429917 INC %RDI |
(159) 0x42991a CMP %R14,%RDI |
(159) 0x42991d MOV 0x28(%RSP),%R11 |
(159) 0x429922 MOV (%RSP),%R9 |
(159) 0x429926 MOV 0x60(%RBP),%R12D |
(159) 0x42992a JG 4297c6 |
(159) 0x429930 MOV %RDI,%R8 |
(159) 0x429933 SHR $0x20,%R8 |
(159) 0x429937 JE 429960 |
(159) 0x429939 MOV %RDI,%RAX |
(159) 0x42993c XOR %EDX,%EDX |
(159) 0x42993e DIV %R11 |
(159) 0x429941 MOV %RAX,%RCX |
(159) 0x429944 MOV 0x20(%RSP),%R10 |
(159) 0x429949 TEST %R8,%R8 |
(159) 0x42994c JE 429973 |
(159) 0x42994e MOV %RDI,%RAX |
(159) 0x429951 CQTO |
(159) 0x429953 IDIV %R11 |
(159) 0x429956 JMP 42997a |
0x429958 NOPL (%RAX,%RAX,1) |
(159) 0x429960 MOV %EDI,%EAX |
(159) 0x429962 XOR %EDX,%EDX |
(159) 0x429964 DIV %R11D |
(159) 0x429967 MOV %EAX,%ECX |
(159) 0x429969 MOV 0x20(%RSP),%R10 |
(159) 0x42996e TEST %R8,%R8 |
(159) 0x429971 JNE 42994e |
(159) 0x429973 MOV %EDI,%EAX |
(159) 0x429975 XOR %EDX,%EDX |
(159) 0x429977 DIV %R11D |
(159) 0x42997a MOV 0x68(%RBP),%RAX |
(159) 0x42997e MOV 0x10(%RSP),%RSI |
(159) 0x429983 MOV 0x8(%RSP),%R8 |
(159) 0x429988 ADD %R12D,%ECX |
(159) 0x42998b ADD %EAX,%EDX |
(159) 0x42998d MOVSXD %EDX,%RAX |
(159) 0x429990 MOVSXD %ECX,%RCX |
(159) 0x429993 MOV 0x38(%RSP),%RDX |
(159) 0x429998 IMUL %RCX,%RDX |
(159) 0x42999c ADD %RAX,%RDX |
(159) 0x42999f VMOVSD (%RSI,%RDX,8),%XMM1 |
(159) 0x4299a4 VADDSD %XMM1,%XMM1,%XMM1 |
(159) 0x4299a8 MOV %R8,%RDX |
(159) 0x4299ab IMUL %RCX,%RDX |
(159) 0x4299af ADD %RAX,%RDX |
(159) 0x4299b2 VDIVSD (%R9,%RDX,8),%XMM1,%XMM1 |
(159) 0x4299b8 MOV %R10,%R8 |
(159) 0x4299bb IMUL %RCX,%R8 |
(159) 0x4299bf LEA (%R8,%RAX,1),%R9 |
(159) 0x4299c3 LEA 0x1(%RCX),%EDX |
(159) 0x4299c6 MOVSXD %EDX,%RDX |
(159) 0x4299c9 IMUL %RDX,%R10 |
(159) 0x4299cd LEA (%R10,%RAX,1),%R11 |
(159) 0x4299d1 VMOVSD (%R15,%R11,8),%XMM2 |
(159) 0x4299d7 VADDSD (%R15,%R9,8),%XMM2,%XMM2 |
(159) 0x4299dd MOV 0xb0(%RSP),%R9 |
(159) 0x4299e5 IMUL %RCX,%R9 |
(159) 0x4299e9 LEA (%R9,%RAX,1),%R11 |
(159) 0x4299ed MOV 0x50(%RSP),%R12 |
(159) 0x4299f2 VMULSD (%R12,%R11,8),%XMM2,%XMM2 |
(159) 0x4299f8 MOV 0x40(%RSP),%R11 |
(159) 0x4299fd IMUL %RCX,%R11 |
(159) 0x429a01 ADD %RAX,%R11 |
(159) 0x429a04 MOV 0x58(%RSP),%RSI |
(159) 0x429a09 VMOVSD (%RSI,%R11,8),%XMM3 |
(159) 0x429a0f LEA 0x1(%R10,%RAX,1),%R10 |
(159) 0x429a14 VMOVSD (%R15,%R10,8),%XMM4 |
(159) 0x429a1a MOV 0x60(%RSP),%RSI |
(159) 0x429a1f VMOVSD (%RSI,%RAX,8),%XMM5 |
(159) 0x429a24 VMINSD (%R13,%RCX,8),%XMM5,%XMM5 |
(159) 0x429a2b LEA 0x1(%R8,%RAX,1),%R8 |
(159) 0x429a30 VADDSD (%R15,%R8,8),%XMM4,%XMM4 |
(159) 0x429a36 LEA 0x1(%R9,%RAX,1),%R8 |
(159) 0x429a3b VMULSD (%R12,%R8,8),%XMM4,%XMM4 |
(159) 0x429a41 MOV 0xa0(%RSP),%RSI |
(159) 0x429a49 MOV %RSI,%R8 |
(159) 0x429a4c IMUL %RCX,%R8 |
(159) 0x429a50 LEA 0x1(%R8,%RAX,1),%R9 |
(159) 0x429a55 VMOVSD (%RBX,%R9,8),%XMM6 |
(159) 0x429a5b MOV 0xa8(%RSP),%R9 |
(159) 0x429a63 ADD %RAX,%R8 |
(159) 0x429a66 VADDSD (%RBX,%R8,8),%XMM6,%XMM6 |
(159) 0x429a6c IMUL %RCX,%R9 |
(159) 0x429a70 MOV 0x98(%RSP),%R10 |
(159) 0x429a78 IMUL %R10,%RCX |
(159) 0x429a7c ADD %RAX,%RCX |
(159) 0x429a7f MOV 0x30(%RSP),%R11 |
(159) 0x429a84 VMULSD (%R11,%RCX,8),%XMM6,%XMM6 |
(159) 0x429a8a MOV %RSI,%RCX |
(159) 0x429a8d IMUL %RDX,%RCX |
(159) 0x429a91 LEA 0x1(%RCX,%RAX,1),%R8 |
(159) 0x429a96 VMOVSD (%RBX,%R8,8),%XMM7 |
(159) 0x429a9c ADD %RAX,%RCX |
(159) 0x429a9f VADDSD (%RBX,%RCX,8),%XMM7,%XMM8 |
(159) 0x429aa4 ADD %RAX,%R9 |
(159) 0x429aa7 MOV 0x48(%RSP),%RCX |
(159) 0x429aac VMOVSD (%RCX,%R9,8),%XMM7 |
(159) 0x429ab2 IMUL %R10,%RDX |
(159) 0x429ab6 ADD %RAX,%RDX |
(159) 0x429ab9 VMULSD (%R11,%RDX,8),%XMM8,%XMM8 |
(159) 0x429abf VADDSD %XMM6,%XMM2,%XMM9 |
(159) 0x429ac3 VADDSD %XMM4,%XMM8,%XMM10 |
(159) 0x429ac7 VSUBSD %XMM9,%XMM10,%XMM9 |
(159) 0x429acc VADDSD %XMM7,%XMM7,%XMM10 |
(159) 0x429ad0 VDIVSD %XMM10,%XMM9,%XMM9 |
(159) 0x429ad5 VUCOMISD 0x3f133(%RIP),%XMM9 |
(159) 0x429add JB 4298a0 |
(159) 0x429ae3 VMOVSD 0x3f115(%RIP),%XMM9 |
(159) 0x429aeb JMP 4298a5 |
Path / |
Source file and lines | calc_dt.cpp:49-76 |
Module | exec |
nb instructions | 206 |
nb uops | 211 |
loop length | 1050 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 8 |
used ymm registers | 12 |
used zmm registers | 0 |
nb stack references | 55 |
micro-operation queue | 35.17 cycles |
front end | 35.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 9.47 | 9.43 | 24.00 | 24.00 | 26.50 | 21.00 | 9.50 | 26.50 | 26.50 | 26.50 | 9.60 | 24.00 |
cycles | 9.47 | 9.43 | 24.00 | 24.00 | 26.50 | 21.00 | 9.50 | 26.50 | 26.50 | 26.50 | 9.60 | 24.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 34.60 |
Stall cycles | 0.00 |
Front-end | 35.17 |
Dispatch | 26.50 |
Overall L1 | 35.17 |
all | 20% |
load | 30% |
store | 29% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 50% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 9% |
all | 34% |
load | 20% |
store | 60% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 27% |
all | 23% |
load | 26% |
store | 33% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 25% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 13% |
all | 16% |
load | 17% |
store | 19% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 28% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 17% |
load | 15% |
store | 25% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 15% |
all | 16% |
load | 16% |
store | 20% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 20% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 13% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x20,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x220,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x80(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,0x1c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 429843 <_Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_S2_S2_S2_S2_RdRiS6_S6_S7_S7_S7_.extracted+0x713> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R9,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDI,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVQ $0,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0x1,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0xc0(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x24(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x80(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x78(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x682e70,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 403020 <__kmpc_for_static_init_8@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x78(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x70(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %R10,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 4291e6 <_Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_S2_S2_S2_S2_RdRiS6_S6_S7_S7_S7_.extracted+0xb6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVSD 0x3fa27(%RIP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4297c6 <_Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_S2_S2_S2_S2_RdRiS6_S6_S7_S7_S7_.extracted+0x696> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV 0x70(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x68(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVQ %R14,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VMOVQ %R13,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VMOVQ %R12,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VMOVQ %R15,%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
SUB %EBX,%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x8(%R9),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x8(%R8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RCX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RDX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RSI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RSI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x1(%RDI),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x1(%R10),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVG %RCX,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV (%RAX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VADDSD %XMM2,%XMM2,%XMM12 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOV 0x30(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VADDSD %XMM1,%XMM1,%XMM13 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPXORQ 0x3cff1(%RIP){1to2},%XMM0,%XMM14 | 1 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
SUB %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $-0x4,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
AND %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R10,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x8(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 429852 <_Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_S2_S2_S2_S2_RdRiS6_S6_S7_S7_S7_.extracted+0x722> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RAX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R14,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPBROADCASTQ %R11,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x60(%RBP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %EAX,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %XMM0,0x110(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x68(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %EAX,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %XMM0,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x40(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x1e0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x38(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x1c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %R10,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x1a0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVDQU %XMM11,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %XMM11,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x180(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %RCX,%YMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %RSI,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %R12,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVUPD %XMM12,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VBROADCASTSD %XMM12,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %YMM0,0x120(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %R9,%YMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %R13,%YMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %XMM13,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VBROADCASTSD %XMM13,%YMM26 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %XMM14,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %XMM14,%YMM27 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %RDI,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPADDQ 0x3ccff(%RIP),%YMM0,%YMM9 | 1 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
VBROADCASTSD 0x3f7fd(%RIP),%YMM28 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VBROADCASTSD 0x3bc50(%RIP),%YMM29 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VPCMPEQD %XMM13,%XMM13,%XMM13 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VBROADCASTSD 0x3c2c1(%RIP),%YMM31 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VBROADCASTSD 0x3f7cf(%RIP),%YMM30 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
MOV 0x30(%RSP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VEXTRACTF32X4 $0x1,%YMM28,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMINPD %XMM0,%XMM28,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VSHUFPD $0x1,%XMM0,%XMM0,%XMM1 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMINSD %XMM1,%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %RDX,0x88(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV (%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 429863 <_Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_S2_S2_S2_S2_RdRiS6_S6_S7_S7_S7_.extracted+0x733> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVSD %XMM0,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x682e90,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x18(%RSP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402e90 <__kmpc_for_static_fini@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x90(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x687950,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x70(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x682eb0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x429120,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x1,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x8,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 403230 <__kmpc_reduce@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x10,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 429843 <_Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_S2_S2_S2_S2_RdRiS6_S6_S7_S7_S7_.extracted+0x713> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x88(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x68(%RSP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMINSD (%RAX),%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVSD %XMM0,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RBX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x687950,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x682ed0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 402f60 <__kmpc_end_reduce@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
MOV %R8,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVSD 0x3f3ab(%RIP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 429897 <_Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_S2_S2_S2_S2_RdRiS6_S6_S7_S7_S7_.extracted+0x767> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RDX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x80(%RSP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDQU 0xf0(%RSP),%XMM11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0xe0(%RSP),%XMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0xd0(%RSP),%XMM13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVDQU 0xc0(%RSP),%XMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
MOV 0x60(%RBP),%R12D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 429930 <_Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_S2_S2_S2_S2_RdRiS6_S6_S7_S7_S7_.extracted+0x800> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | calc_dt.cpp:49-76 |
Module | exec |
nb instructions | 206 |
nb uops | 211 |
loop length | 1050 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 8 |
used ymm registers | 12 |
used zmm registers | 0 |
nb stack references | 55 |
micro-operation queue | 35.17 cycles |
front end | 35.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 9.47 | 9.43 | 24.00 | 24.00 | 26.50 | 21.00 | 9.50 | 26.50 | 26.50 | 26.50 | 9.60 | 24.00 |
cycles | 9.47 | 9.43 | 24.00 | 24.00 | 26.50 | 21.00 | 9.50 | 26.50 | 26.50 | 26.50 | 9.60 | 24.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 34.60 |
Stall cycles | 0.00 |
Front-end | 35.17 |
Dispatch | 26.50 |
Overall L1 | 35.17 |
all | 20% |
load | 30% |
store | 29% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 50% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 9% |
all | 34% |
load | 20% |
store | 60% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 27% |
all | 23% |
load | 26% |
store | 33% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 25% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 13% |
all | 16% |
load | 17% |
store | 19% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 28% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 17% |
load | 15% |
store | 25% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 15% |
all | 16% |
load | 16% |
store | 20% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 20% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 13% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x20,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x220,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x80(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,0x1c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 429843 <_Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_S2_S2_S2_S2_RdRiS6_S6_S7_S7_S7_.extracted+0x713> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R9,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDI,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVQ $0,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0x1,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0xc0(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x24(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x80(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x78(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x682e70,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 403020 <__kmpc_for_static_init_8@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x78(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x70(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %R10,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 4291e6 <_Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_S2_S2_S2_S2_RdRiS6_S6_S7_S7_S7_.extracted+0xb6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVSD 0x3fa27(%RIP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4297c6 <_Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_S2_S2_S2_S2_RdRiS6_S6_S7_S7_S7_.extracted+0x696> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV 0x70(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x68(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVQ %R14,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VMOVQ %R13,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VMOVQ %R12,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VMOVQ %R15,%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
SUB %EBX,%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x8(%R9),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x8(%R8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RCX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RDX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RSI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RSI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x1(%RDI),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x1(%R10),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVG %RCX,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV (%RAX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VADDSD %XMM2,%XMM2,%XMM12 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOV 0x30(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VADDSD %XMM1,%XMM1,%XMM13 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPXORQ 0x3cff1(%RIP){1to2},%XMM0,%XMM14 | 1 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
SUB %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $-0x4,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
AND %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R10,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x8(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 429852 <_Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_S2_S2_S2_S2_RdRiS6_S6_S7_S7_S7_.extracted+0x722> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RAX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R14,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPBROADCASTQ %R11,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x60(%RBP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %EAX,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %XMM0,0x110(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x68(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %EAX,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %XMM0,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x40(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x1e0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x38(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x1c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %R10,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x1a0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVDQU %XMM11,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %XMM11,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x180(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %RCX,%YMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %RSI,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %R12,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVUPD %XMM12,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VBROADCASTSD %XMM12,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %YMM0,0x120(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %R9,%YMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %R13,%YMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %XMM13,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VBROADCASTSD %XMM13,%YMM26 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %XMM14,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VPBROADCASTQ %XMM14,%YMM27 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %RDI,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPADDQ 0x3ccff(%RIP),%YMM0,%YMM9 | 1 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
VBROADCASTSD 0x3f7fd(%RIP),%YMM28 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VBROADCASTSD 0x3bc50(%RIP),%YMM29 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VPCMPEQD %XMM13,%XMM13,%XMM13 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VBROADCASTSD 0x3c2c1(%RIP),%YMM31 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VBROADCASTSD 0x3f7cf(%RIP),%YMM30 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
MOV 0x30(%RSP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VEXTRACTF32X4 $0x1,%YMM28,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMINPD %XMM0,%XMM28,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VSHUFPD $0x1,%XMM0,%XMM0,%XMM1 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMINSD %XMM1,%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %RDX,0x88(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV (%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 429863 <_Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_S2_S2_S2_S2_RdRiS6_S6_S7_S7_S7_.extracted+0x733> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVSD %XMM0,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x682e90,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x18(%RSP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402e90 <__kmpc_for_static_fini@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x90(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x687950,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x70(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x682eb0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x429120,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x1,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x8,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 403230 <__kmpc_reduce@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x10,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 429843 <_Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_S2_S2_S2_S2_RdRiS6_S6_S7_S7_S7_.extracted+0x713> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x88(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x68(%RSP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMINSD (%RAX),%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVSD %XMM0,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RBX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x687950,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x682ed0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 402f60 <__kmpc_end_reduce@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
MOV %R8,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVSD 0x3f3ab(%RIP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 429897 <_Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_S2_S2_S2_S2_RdRiS6_S6_S7_S7_S7_.extracted+0x767> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RDX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x80(%RSP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDQU 0xf0(%RSP),%XMM11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0xe0(%RSP),%XMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0xd0(%RSP),%XMM13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVDQU 0xc0(%RSP),%XMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
MOV 0x60(%RBP),%R12D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 429930 <_Z14calc_dt_kerneliiiidddddRN6clover8Buffer2DIdEES2_RNS_8Buffer1DIdEES5_S5_S5_S2_S2_S2_S2_S2_S2_S2_S2_RdRiS6_S6_S7_S7_S7_.extracted+0x800> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼calc_dt_kernel(int, int, int, int, double, double, double, double, double, clover::Buffer2D | 2.21 | 3.53 |
○Loop 160 - calc_dt.cpp:50-76 - exec | 2.21 | 3.52 |
○Loop 159 - calc_dt.cpp:50-76 - exec | 0 | 0 |