OV - exec - Loop 248

	Loop Id: 248	Module: exec	Source: generate_chunk.cpp:85-98 [...]	Coverage: 0.01%

0x424688 LDR	X9, [SP, #40]    [15]

0x42468c ADD	X25, X25, #2

0x424690 ADD	X30, X30, X14

0x424694 MOVZ	X13, #1

0x424698 CMP	X9, X25

0x42469c B.EQ	424e2c

0x4246a0 ADD	X19, X4, X25

0x4246a4 LDR	X9, [SP, #56]    [10]

0x4246a8 SDIV	X26, X19, X24

0x4246ac ADD	X20, X19, #1

0x4246b0 ADD	X9, X9, X8,LSL #3

0x4246b4 LD1R	{V2.2D}, [X9]    [25]

0x4246b8 ADD	X9, X30, X13

0x4246bc MADD	X11, X28, X26, X9

0x4246c0 SDIV	X22, X20, X24

0x4246c4 SBFM	X11, X11, #29, #63

0x4246c8 LDR	D3, [X5, X11]    [24]

0x4246cc MADD	X12, X28, X22, X30

0x4246d0 ADD	X12, X12, X14

0x4246d4 ADD	X12, X5, X12,ASR #29

0x4246d8 MADD	X10, X28, X26, X30

0x4246dc SBFM	X23, X10, #32, #63

0x4246e0 LD1	{V3.D[1]}, [X12]    [23]

0x4246e4 FCMGE	V2.2D, V3.2D, V2.2D

0x4246e8 XTN	V5.2S, V2.2D

0x4246ec FMOV	W10, S5

0x4246f0 TBZ	W10, #0, 424720

0x4246f4 LDR	D3, [X5, X23,LSL #3]    [24]

0x4246f8 LDR	D4, [X7, X8,LSL #3]    [27]

0x4246fc MADD	X9, X28, X22, X9

0x424700 SBFM	X21, X9, #32, #63

0x424704 MOV	W9, V5.S[1]

0x424708 TBZ	W9, #0, 424740

0x42470c B	424730

0x424720 MADD	X9, X28, X22, X9

0x424724 SBFM	X21, X9, #32, #63

0x424728 MOV	W9, V5.S[1]

0x42472c TBZ	W9, #0, 424740

0x424730 ADD	X9, X5, X21,LSL #3

0x424734 LD1	{V3.D[1]}, [X9]    [9]

0x424738 ADD	X9, X7, X8,LSL #3

0x42473c LD1	{V4.D[1]}, [X9]    [8]

0x424740 FCMGT	V3.2D, V4.2D, V3.2D

0x424744 UBFM	X10, X26, #32, #31

0x424748 AND	V2.16B, V2.16B, V3.16B

0x42474c XTN	V2.2S, V2.2D

0x424750 FMOV	W9, S2

0x424754 TBZ	W9, #0, 424780

0x424758 ADD	X9, X10, X13

0x42475c SBFM	X9, X9, #29, #63

0x424760 LDR	D3, [X6, X9]    [2]

0x424764 MOV	W11, V2.S[1]

0x424768 UBFM	X9, X22, #32, #31

0x42476c TBNZ	W11, #0, 42478c

0x424770 B	424798

0x424780 MOV	W11, V2.S[1]

0x424784 UBFM	X9, X22, #32, #31

0x424788 TBZ	W11, #0, 424798

0x42478c ADD	X11, X9, X13

0x424790 ADD	X11, X6, X11,ASR #29

0x424794 LD1	{V3.D[1]}, [X11]    [4]

0x424798 LDUR	X11, [X29, #464]    [34]

0x42479c ADD	X11, X11, X8,LSL #3

0x4247a0 LD1R	{V4.2D}, [X11]    [6]

0x4247a4 SBFM	X11, X10, #32, #63

0x4247a8 FCMGE	V3.2D, V3.2D, V4.2D

0x4247ac XTN	V3.2S, V3.2D

0x4247b0 AND	V2.8B, V2.8B, V3.8B

0x4247b4 FMOV	W10, S2

0x4247b8 TBZ	W10, #0, 424824

0x4247bc LDR	X10, [SP, #48]    [15]

0x4247c0 LDR	D3, [X6, X11,LSL #3]    [3]

0x4247c4 LDR	D4, [X10, X8,LSL #3]    [1]

0x4247c8 SBFM	X12, X9, #32, #63

0x4247cc MOV	W9, V2.S[1]

0x4247d0 TBNZ	W9, #0, 424830

0x4247d4 FCMGT	V3.2D, V4.2D, V3.2D

0x4247d8 XTN	V3.2S, V3.2D

0x4247dc AND	V2.8B, V2.8B, V3.8B

0x4247e0 FMOV	W9, S2

0x4247e4 TBZ	W9, #0, 424858

0x4247e8 LDP	X10, X9, [X29, #960]    [34]

0x4247ec LDR	D3, [X9, X8,LSL #3]    [29]

0x4247f0 LDUR	X9, [X29, #440]    [34]

0x4247f4 MADD	X9, X9, X11, XZR

0x4247f8 ADD	X9, X10, X9,LSL #3

0x4247fc STR	D3, [X9, X23,LSL #3]    [21]

0x424800 LDP	X10, X9, [SP, #72]    [15]

0x424804 LDR	D3, [X9, X8,LSL #3]    [20]

0x424808 LDR	X9, [SP, #64]    [15]

0x42480c MADD	X9, X9, X11, XZR

0x424810 ADD	X9, X10, X9,LSL #3

0x424814 STR	D3, [X9, X23,LSL #3]    [19]

0x424818 MOV	W9, V2.S[1]

0x42481c TBNZ	W9, #0, 424860

0x424820 B	424890

0x424824 SBFM	X12, X9, #32, #63

0x424828 MOV	W9, V2.S[1]

0x42482c TBZ	W9, #0, 4247d4

0x424830 ADD	X9, X6, X12,LSL #3

0x424834 LD1	{V3.D[1]}, [X9]    [18]

0x424838 LDR	X9, [SP, #48]    [15]

0x42483c ADD	X9, X9, X8,LSL #3

0x424840 LD1	{V4.D[1]}, [X9]    [11]

0x424844 FCMGT	V3.2D, V4.2D, V3.2D

0x424848 XTN	V3.2S, V3.2D

0x42484c AND	V2.8B, V2.8B, V3.8B

0x424850 FMOV	W9, S2

0x424854 TBNZ	W9, #0, 4247e8

0x424858 MOV	W9, V2.S[1]

0x42485c TBZ	W9, #0, 424890

0x424860 LDP	X10, X9, [X29, #960]    [34]

0x424864 LDR	D3, [X9, X8,LSL #3]    [33]

0x424868 LDUR	X9, [X29, #440]    [34]

0x42486c MADD	X9, X9, X12, XZR

0x424870 ADD	X9, X10, X9,LSL #3

0x424874 STR	D3, [X9, X21,LSL #3]    [32]

0x424878 LDP	X10, X9, [SP, #72]    [15]

0x42487c LDR	D3, [X9, X8,LSL #3]    [31]

0x424880 LDR	X9, [SP, #64]    [15]

0x424884 MADD	X9, X9, X12, XZR

0x424888 ADD	X9, X10, X9,LSL #3

0x42488c STR	D3, [X9, X21,LSL #3]    [30]

0x424890 FMOV	S3, W26

0x424894 SBFM	X11, X26, #0, #31

0x424898 MADD	X9, X0, X11, XZR

0x42489c FMOV	S4, W19

0x4248a0 ADD	X13, X18, X9,LSL #3

0x4248a4 MOV	V3.S[1], W22

0x4248a8 MOV	V4.S[1], W20

0x4248ac MADD	X9, X3, X11, XZR

0x4248b0 ADD	X14, X2, X9,LSL #3

0x4248b4 FMOV	W9, S2

0x4248b8 MLS	V4.2S, V0.2S, V3.2S

0x4248bc SSHLL	V3.2D, V4.2S, #32

0x4248c0 TBZ	W9, #0, 4248d8

0x4248c4 LDR	D4, [X17, X8,LSL #3]    [28]

0x4248c8 FMOV	X9, D3

0x4248cc STR	D4, [X13, X9,LSL #3]    [22]

0x4248d0 LDR	D4, [X1, X8,LSL #3]    [26]

0x4248d4 STR	D4, [X14, X9,LSL #3]    [12]

0x4248d8 SBFM	X12, X22, #0, #31

0x4248dc MOV	W15, V2.S[1]

0x4248e0 MADD	X9, X0, X12, XZR

0x4248e4 MADD	X10, X3, X12, XZR

0x4248e8 ADD	X9, X18, X9,LSL #3

0x4248ec ADD	X10, X2, X10,LSL #3

0x4248f0 TBZ	W15, #0, 424908

0x4248f4 LDR	D4, [X17, X8,LSL #3]    [28]

0x4248f8 MOV	X15, V3.D[1]

0x4248fc STR	D4, [X9, X15,LSL #3]    [14]

0x424900 LDR	D4, [X1, X8,LSL #3]    [26]

0x424904 STR	D4, [X10, X15,LSL #3]    [17]

0x424908 MADD	X15, X27, X26, X19

0x42490c MADD	X16, X27, X22, X20

0x424910 FMOV	D4, X15

0x424914 MOV	V4.D[1], X16

0x424918 SHL	V4.2D, V4.2D, #32

0x42491c SSHR	V5.2D, V4.2D, #32

0x424920 ADD	V4.2D, V3.2D, V1.2D

0x424924 CMGE	V5.2D, V5.2D, V3.2D

0x424928 XTN	V5.2S, V5.2D

0x42492c AND	V5.8B, V2.8B, V5.8B

0x424930 FMOV	W15, S5

0x424934 TBZ	W15, #0, 42494c

0x424938 LDR	D6, [X17, X8,LSL #3]    [28]

0x42493c FMOV	X15, D4

0x424940 STR	D6, [X13, X15,LSL #3]    [22]

0x424944 LDR	D6, [X1, X8,LSL #3]    [26]

0x424948 STR	D6, [X14, X15,LSL #3]    [12]

0x42494c MOV	W13, V5.S[1]

0x424950 TBZ	W13, #0, 424968

0x424954 LDR	D6, [X17, X8,LSL #3]    [28]

0x424958 MOV	X13, V4.D[1]

0x42495c STR	D6, [X9, X13,LSL #3]    [14]

0x424960 LDR	D6, [X1, X8,LSL #3]    [26]

0x424964 STR	D6, [X10, X13,LSL #3]    [17]

0x424968 ADD	X10, X11, #1

0x42496c FMOV	W11, S2

0x424970 MOVZ	X14, #2

0x424974 MADD	X9, X0, X10, XZR

0x424978 MADD	X10, X3, X10, XZR

0x42497c ADD	X9, X18, X9,LSL #3

0x424980 ADD	X10, X2, X10,LSL #3

0x424984 TBZ	W11, #0, 42499c

0x424988 LDR	D6, [X17, X8,LSL #3]    [28]

0x42498c FMOV	X11, D3

0x424990 STR	D6, [X9, X11,LSL #3]    [13]

0x424994 LDR	D6, [X1, X8,LSL #3]    [26]

0x424998 STR	D6, [X10, X11,LSL #3]    [16]

0x42499c ADD	X12, X12, #1

0x4249a0 MOV	W13, V2.S[1]

0x4249a4 MADD	X11, X0, X12, XZR

0x4249a8 MADD	X12, X3, X12, XZR

0x4249ac ADD	X11, X18, X11,LSL #3

0x4249b0 ADD	X12, X2, X12,LSL #3

0x4249b4 TBZ	W13, #0, 4249e0

0x4249b8 LDR	D2, [X17, X8,LSL #3]    [28]

0x4249bc MOV	X13, V3.D[1]

0x4249c0 STR	D2, [X11, X13,LSL #3]    [5]

0x4249c4 LDR	D2, [X1, X8,LSL #3]    [26]

0x4249c8 STR	D2, [X12, X13,LSL #3]    [7]

0x4249cc FMOV	W13, S5

0x4249d0 TBNZ	W13, #0, 4249e8

0x4249d4 MOV	W9, V5.S[1]

0x4249d8 TBZ	W9, #0, 424688

0x4249dc B	424a04

0x4249e0 FMOV	W13, S5

0x4249e4 TBZ	W13, #0, 4249d4

0x4249e8 LDR	D2, [X17, X8,LSL #3]    [28]

0x4249ec FMOV	X13, D4

0x4249f0 STR	D2, [X9, X13,LSL #3]    [13]

0x4249f4 LDR	D2, [X1, X8,LSL #3]    [26]

0x4249f8 STR	D2, [X10, X13,LSL #3]    [16]

0x4249fc MOV	W9, V5.S[1]

0x424a00 TBZ	W9, #0, 424688

0x424a04 LDR	D2, [X17, X8,LSL #3]    [28]

0x424a08 MOV	X9, V4.D[1]

0x424a0c STR	D2, [X11, X9,LSL #3]    [5]

0x424a10 LDR	D2, [X1, X8,LSL #3]    [26]

0x424a14 STR	D2, [X12, X9,LSL #3]    [7]

0x424a18 B	424688

/home/hbollore/qaas/qaas-runs/174-169-1878/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/generate_chunk.cpp: 85 - 98

--------------------------------------------------------------------------------

85: #pragma omp parallel for simd collapse(2)

86:     for (int j = (0); j < (yrange); j++) {

87:       for (int i = (0); i < (xrange); i++) {

88:         double x_cent = state_xmin[state];

89:         double y_cent = state_ymin[state];

90:         if (state_geometry[state] == g_rect) {

91:           if (field.vertexx[i + 1] >= state_xmin[state] && field.vertexx[i] < state_xmax[state]) {

92:             if (field.vertexy[j + 1] >= state_ymin[state] && field.vertexy[j] < state_ymax[state]) {

93:               field.energy0(i, j) = state_energy[state];

94:               field.density0(i, j) = state_density[state];

95:               for (int kt = j; kt <= j + 1; ++kt) {

96:                 for (int jt = i; jt <= i + 1; ++jt) {

97:                   field.xvel0(jt, kt) = state_xvel[state];

98:                   field.yvel0(jt, kt) = state_yvel[state];

/home/hbollore/qaas/qaas-runs/174-169-1878/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h: 46 - 69

--------------------------------------------------------------------------------

46:   T &operator[](size_t i) const { return data[i]; }

[...]

69:   T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; }

Coverage (%)	Name	Source Location	Module
○100.00	__kmp_invoke_microtask		libomp.so

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Metric	Value
CQA speedup if no scalar integer	1.54 - 2.22
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	1.18 - 1.70
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.16 - 1.44
Bottlenecks	P8, P10,
Function	generate_chunk(int, global_variables&) [clone .omp_outlined.2]
Source	generate_chunk.cpp:85-98,context.h:46-46,context.h:69-69
Source loop unroll info	not unrolled or unrolled with no peel/tail loop
Source loop unroll confidence level	max
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	27.75 - 40.00
CQA cycles if no scalar integer	18.00
CQA cycles if FP arith vectorized	27.75 - 40.00
CQA cycles if fully vectorized	23.50
Front-end cycles	27.75
P0 cycles	14.50
P1 cycles	14.50
P2 cycles	9.33
P3 cycles	9.17
P4 cycles	9.17
P5 cycles	9.17
P6 cycles	24.00
P7 cycles	9.17
P8 cycles	21.75
P9 cycles	21.75
P10 cycles	21.75
P11 cycles	21.75
P12 cycles	22.33
P13 cycles	22.33
P14 cycles	22.33
P15 cycles	0.00
P16 cycles	0.00
DIV/SQRT cycles	10.00 - 40.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	222.00
Nb uops	222.00
Nb loads	NA
Nb stores	20.00
Nb stack references	0.00
FLOP/cycle	0.00 - 0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	14.20 - 20.47
Bytes prefetched	0.00
Bytes loaded	408.00
Bytes stored	160.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	18.18
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	33.33
Vectorization ratio fma	0.00
Vectorization ratio div_sqrt	0.00
Vectorization ratio other	34.48
Vector-efficiency ratio all	51.03
Vector-efficiency ratio load	50.00
Vector-efficiency ratio store	50.00
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	58.33
Vector-efficiency ratio fma	50.00
Vector-efficiency ratio div_sqrt	50.00
Vector-efficiency ratio other	51.29

Metric	Value
CQA speedup if no scalar integer	1.54 - 2.22
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	1.18 - 1.70
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.16 - 1.44
Bottlenecks	P8, P10,
Function	generate_chunk(int, global_variables&) [clone .omp_outlined.2]
Source	generate_chunk.cpp:85-98,context.h:46-46,context.h:69-69
Source loop unroll info	not unrolled or unrolled with no peel/tail loop
Source loop unroll confidence level	max
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	27.75 - 40.00
CQA cycles if no scalar integer	18.00
CQA cycles if FP arith vectorized	27.75 - 40.00
CQA cycles if fully vectorized	23.50
Front-end cycles	27.75
P0 cycles	14.50
P1 cycles	14.50
P2 cycles	9.33
P3 cycles	9.17
P4 cycles	9.17
P5 cycles	9.17
P6 cycles	24.00
P7 cycles	9.17
P8 cycles	21.75
P9 cycles	21.75
P10 cycles	21.75
P11 cycles	21.75
P12 cycles	22.33
P13 cycles	22.33
P14 cycles	22.33
P15 cycles	0.00
P16 cycles	0.00
DIV/SQRT cycles	10.00 - 40.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	222.00
Nb uops	222.00
Nb loads	NA
Nb stores	20.00
Nb stack references	0.00
FLOP/cycle	0.00 - 0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	14.20 - 20.47
Bytes prefetched	0.00
Bytes loaded	408.00
Bytes stored	160.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	18.18
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	33.33
Vectorization ratio fma	0.00
Vectorization ratio div_sqrt	0.00
Vectorization ratio other	34.48
Vector-efficiency ratio all	51.03
Vector-efficiency ratio load	50.00
Vector-efficiency ratio store	50.00
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	58.33
Vector-efficiency ratio fma	50.00
Vector-efficiency ratio div_sqrt	50.00
Vector-efficiency ratio other	51.29

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	generate_chunk(int, global_variables&) [clone .omp_outlined.2]
Source file and lines	generate_chunk.cpp:85-98
Module	exec

The loop is defined in:

/home/hbollore/qaas/qaas-runs/174-169-1878/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/generate_chunk.cpp:85-98
/home/hbollore/qaas/qaas-runs/174-169-1878/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:46,69

The related source loop is not unrolled or unrolled with no peel/tail loop.
Warnings:

Ignoring paths for analysis
Failed to get the number of paths
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 40.00 to 18.00 cycles (2.22x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your loop is not vectorized. Only 51% of vector register length is used (average across all VPU instructions). By fully vectorizing your loop, you can lower the cost of an iteration from 40.00 to 23.50 cycles (1.70x speedup).

Details

18% of VPU instructions are used in vector version (process two or more data elements in vector registers):

0% of VPU loads are used in vector version.
0% of VPU stores are used in vector version.
33% of VPU addition or subtraction instructions are used in vector version.
0% of VPU fused multiply-add instructions are used in vector version.
0% of VPU divide and square root instructions are used in vector version.
34% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 408 bytes. The binary loop is storing 160 bytes.

General properties

nb instructions	222
loop length	888
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

27.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	14.50	14.50	9.33	9.17	9.17	9.17	24.00	9.17	21.75	21.75	21.75	21.75	22.33	22.33	22.33	0.00	0.00
cycles	14.50	14.50	9.33	9.17	9.17	9.17	24.00	9.17	21.75	21.75	21.75	21.75	22.33	22.33	22.33	0.00	0.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

10.00-40.00

Cycles summary

Front-end	27.75
Overall L1	27.75-40.00

Vectorization ratios

INT

all	17%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	33%
fma	0%
other	39%

all	22%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	22%

INT+FP

all	18%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	33%
fma	0%
div/sqrt	0%
other	34%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 40.00 cycles. At this rate:

10% of peak load performance is reached (10.20 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
8% of peak store performance is reached (4.00 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the loop is: 4246a0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput	Vectorization
LDR X9, [SP, #40]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
ADD X25, X25, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X30, X30, X14	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
MOVZ X13, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
CMP X9, X25	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 424e2c <_Z14generate_chunkiR16global_variables.omp_outlined.2+0xcac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X19, X4, X25	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDR X9, [SP, #56]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
SDIV X26, X19, X24	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	5-20	5-20	scal (50.0%)
ADD X20, X19, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X9, X9, X8,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
LD1R {V2.2D}, [X9]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.33	0.33	0.33	8	0.33	scal (50.0%)
ADD X9, X30, X13	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
MADD X11, X28, X26, X9	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
SDIV X22, X20, X24	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	5-20	5-20	scal (50.0%)
SBFM X11, X11, #29, #63	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
LDR D3, [X5, X11]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
MADD X12, X28, X22, X30	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
ADD X12, X12, X14	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
ADD X12, X5, X12,ASR #29	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50	N/A
MADD X10, X28, X26, X30	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
SBFM X23, X10, #32, #63	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
LD1 {V3.D[1]}, [X12]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.33	0.33	0.33	8	0.33	scal (50.0%)
FCMGE V2.2D, V3.2D, V2.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
XTN V5.2S, V2.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
FMOV W10, S5	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (25.0%)
TBZ W10, #0, 424720 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x5a0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D3, [X5, X23,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
LDR D4, [X7, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
MADD X9, X28, X22, X9	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
SBFM X21, X9, #32, #63	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
MOV W9, V5.S[1]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	1	scal (25.0%)
TBZ W9, #0, 424740 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x5c0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 424730 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x5b0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MADD X9, X28, X22, X9	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
SBFM X21, X9, #32, #63	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
MOV W9, V5.S[1]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	1	scal (25.0%)
TBZ W9, #0, 424740 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x5c0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X9, X5, X21,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
LD1 {V3.D[1]}, [X9]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.33	0.33	0.33	8	0.33	scal (50.0%)
ADD X9, X7, X8,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
LD1 {V4.D[1]}, [X9]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.33	0.33	0.33	8	0.33	scal (50.0%)
FCMGT V3.2D, V4.2D, V3.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
UBFM X10, X26, #32, #31	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
AND V2.16B, V2.16B, V3.16B	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
XTN V2.2S, V2.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
FMOV W9, S2	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (25.0%)
TBZ W9, #0, 424780 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x600>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X9, X10, X13	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
SBFM X9, X9, #29, #63	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
LDR D3, [X6, X9]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
MOV W11, V2.S[1]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	1	scal (25.0%)
UBFM X9, X22, #32, #31	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
TBNZ W11, #0, 42478c <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x60c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 424798 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x618>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV W11, V2.S[1]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	1	scal (25.0%)
UBFM X9, X22, #32, #31	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
TBZ W11, #0, 424798 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x618>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X11, X9, X13	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
ADD X11, X6, X11,ASR #29	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50	N/A
LD1 {V3.D[1]}, [X11]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.33	0.33	0.33	8	0.33	scal (50.0%)
LDUR X11, [X29, #464]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
ADD X11, X11, X8,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
LD1R {V4.2D}, [X11]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.33	0.33	0.33	8	0.33	scal (50.0%)
SBFM X11, X10, #32, #63	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
FCMGE V3.2D, V3.2D, V4.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
XTN V3.2S, V3.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
AND V2.8B, V2.8B, V3.8B	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (50.0%)
FMOV W10, S2	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (25.0%)
TBZ W10, #0, 424824 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x6a4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X10, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
LDR D3, [X6, X11,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
LDR D4, [X10, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
SBFM X12, X9, #32, #63	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
MOV W9, V2.S[1]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	1	scal (25.0%)
TBNZ W9, #0, 424830 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x6b0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
FCMGT V3.2D, V4.2D, V3.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
XTN V3.2S, V3.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
AND V2.8B, V2.8B, V3.8B	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (50.0%)
FMOV W9, S2	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (25.0%)
TBZ W9, #0, 424858 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x6d8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X10, X9, [X29, #960]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.50	N/A
LDR D3, [X9, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
LDUR X9, [X29, #440]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
MADD X9, X9, X11, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
ADD X9, X10, X9,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
STR D3, [X9, X23,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
LDP X10, X9, [SP, #72]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.50	N/A
LDR D3, [X9, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
LDR X9, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
MADD X9, X9, X11, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
ADD X9, X10, X9,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
STR D3, [X9, X23,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
MOV W9, V2.S[1]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	1	scal (25.0%)
TBNZ W9, #0, 424860 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x6e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 424890 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x710>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SBFM X12, X9, #32, #63	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
MOV W9, V2.S[1]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	1	scal (25.0%)
TBZ W9, #0, 4247d4 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x654>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X9, X6, X12,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
LD1 {V3.D[1]}, [X9]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.33	0.33	0.33	8	0.33	scal (50.0%)
LDR X9, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
ADD X9, X9, X8,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
LD1 {V4.D[1]}, [X9]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.33	0.33	0.33	8	0.33	scal (50.0%)
FCMGT V3.2D, V4.2D, V3.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
XTN V3.2S, V3.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
AND V2.8B, V2.8B, V3.8B	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (50.0%)
FMOV W9, S2	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (25.0%)
TBNZ W9, #0, 4247e8 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x668>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV W9, V2.S[1]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	1	scal (25.0%)
TBZ W9, #0, 424890 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x710>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X10, X9, [X29, #960]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.50	N/A
LDR D3, [X9, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
LDUR X9, [X29, #440]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
MADD X9, X9, X12, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
ADD X9, X10, X9,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
STR D3, [X9, X21,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
LDP X10, X9, [SP, #72]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.50	N/A
LDR D3, [X9, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
LDR X9, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
MADD X9, X9, X12, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
ADD X9, X10, X9,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
STR D3, [X9, X21,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
FMOV S3, W26	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	scal (25.0%)
SBFM X11, X26, #0, #31	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
MADD X9, X0, X11, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
FMOV S4, W19	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	scal (25.0%)
ADD X13, X18, X9,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
MOV V3.S[1], W22	1	0	0	0	0	0	0	1	0	0.25	0.25	0.25	0.25	0	0	0	5	1	scal (25.0%)
MOV V4.S[1], W20	1	0	0	0	0	0	0	1	0	0.25	0.25	0.25	0.25	0	0	0	5	1	scal (25.0%)
MADD X9, X3, X11, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
ADD X14, X2, X9,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
FMOV W9, S2	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (25.0%)
MLS V4.2S, V0.2S, V3.2S	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	4	0.50	vect (50.0%)
SSHLL V3.2D, V4.2S, #32	1	0	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	2	0.50	vect (50.0%)
TBZ W9, #0, 4248d8 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x758>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D4, [X17, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
FMOV X9, D3	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
STR D4, [X13, X9,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
LDR D4, [X1, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
STR D4, [X14, X9,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
SBFM X12, X22, #0, #31	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
MOV W15, V2.S[1]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	1	scal (25.0%)
MADD X9, X0, X12, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
MADD X10, X3, X12, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
ADD X9, X18, X9,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
ADD X10, X2, X10,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
TBZ W15, #0, 424908 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x788>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D4, [X17, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
MOV X15, V3.D[1]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	1	scal (50.0%)
STR D4, [X9, X15,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
LDR D4, [X1, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
STR D4, [X10, X15,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
MADD X15, X27, X26, X19	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
MADD X16, X27, X22, X20	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
FMOV D4, X15	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	scal (50.0%)
MOV V4.D[1], X16	1	0	0	0	0	0	0	1	0	0.25	0.25	0.25	0.25	0	0	0	5	1	scal (50.0%)
SHL V4.2D, V4.2D, #32	1	0	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	2	0.50	vect (100.0%)
SSHR V5.2D, V4.2D, #32	1	0	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	2	0.50	vect (100.0%)
ADD V4.2D, V3.2D, V1.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
CMGE V5.2D, V5.2D, V3.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
XTN V5.2S, V5.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
AND V5.8B, V2.8B, V5.8B	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (50.0%)
FMOV W15, S5	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (25.0%)
TBZ W15, #0, 42494c <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x7cc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D6, [X17, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
FMOV X15, D4	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
STR D6, [X13, X15,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
LDR D6, [X1, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
STR D6, [X14, X15,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
MOV W13, V5.S[1]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	1	scal (25.0%)
TBZ W13, #0, 424968 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x7e8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D6, [X17, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
MOV X13, V4.D[1]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	1	scal (50.0%)
STR D6, [X9, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
LDR D6, [X1, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
STR D6, [X10, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
ADD X10, X11, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
FMOV W11, S2	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (25.0%)
MOVZ X14, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
MADD X9, X0, X10, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
MADD X10, X3, X10, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
ADD X9, X18, X9,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
ADD X10, X2, X10,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
TBZ W11, #0, 42499c <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x81c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D6, [X17, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
FMOV X11, D3	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
STR D6, [X9, X11,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
LDR D6, [X1, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
STR D6, [X10, X11,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
ADD X12, X12, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
MOV W13, V2.S[1]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	1	scal (25.0%)
MADD X11, X0, X12, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
MADD X12, X3, X12, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
ADD X11, X18, X11,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
ADD X12, X2, X12,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
TBZ W13, #0, 4249e0 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x860>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D2, [X17, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
MOV X13, V3.D[1]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	1	scal (50.0%)
STR D2, [X11, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
LDR D2, [X1, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
STR D2, [X12, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
FMOV W13, S5	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (25.0%)
TBNZ W13, #0, 4249e8 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x868>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV W9, V5.S[1]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	1	scal (25.0%)
TBZ W9, #0, 424688 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x508>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 424a04 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x884>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
FMOV W13, S5	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (25.0%)
TBZ W13, #0, 4249d4 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x854>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D2, [X17, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
FMOV X13, D4	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
STR D2, [X9, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
LDR D2, [X1, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
STR D2, [X10, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
MOV W9, V5.S[1]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	1	scal (25.0%)
TBZ W9, #0, 424688 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x508>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D2, [X17, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
MOV X9, V4.D[1]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	1	scal (50.0%)
STR D2, [X11, X9,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
LDR D2, [X1, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
STR D2, [X12, X9,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
B 424688 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x508>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A

Function	generate_chunk(int, global_variables&) [clone .omp_outlined.2]
Source file and lines	generate_chunk.cpp:85-98
Module	exec

The loop is defined in:

/home/hbollore/qaas/qaas-runs/174-169-1878/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/generate_chunk.cpp:85-98
/home/hbollore/qaas/qaas-runs/174-169-1878/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:46,69

The related source loop is not unrolled or unrolled with no peel/tail loop.
Warnings:

Ignoring paths for analysis
Failed to get the number of paths
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

18% of VPU instructions are used in vector version (process two or more data elements in vector registers):

0% of VPU loads are used in vector version.
0% of VPU stores are used in vector version.
33% of VPU addition or subtraction instructions are used in vector version.
0% of VPU fused multiply-add instructions are used in vector version.
0% of VPU divide and square root instructions are used in vector version.
34% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 408 bytes. The binary loop is storing 160 bytes.

General properties

nb instructions	222
loop length	888
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

27.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	14.50	14.50	9.33	9.17	9.17	9.17	24.00	9.17	21.75	21.75	21.75	21.75	22.33	22.33	22.33	0.00	0.00
cycles	14.50	14.50	9.33	9.17	9.17	9.17	24.00	9.17	21.75	21.75	21.75	21.75	22.33	22.33	22.33	0.00	0.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

10.00-40.00

Cycles summary

Front-end	27.75
Overall L1	27.75-40.00

Vectorization ratios

INT

all	17%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	33%
fma	0%
other	39%

all	22%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	22%

INT+FP

all	18%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	33%
fma	0%
div/sqrt	0%
other	34%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 40.00 cycles. At this rate:

10% of peak load performance is reached (10.20 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
8% of peak store performance is reached (4.00 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the loop is: 4246a0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput	Vectorization
LDR X9, [SP, #40]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
ADD X25, X25, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X30, X30, X14	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
MOVZ X13, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
CMP X9, X25	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	1	0.33	scal (50.0%)
B.EQ 424e2c <_Z14generate_chunkiR16global_variables.omp_outlined.2+0xcac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X19, X4, X25	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
LDR X9, [SP, #56]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
SDIV X26, X19, X24	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	5-20	5-20	scal (50.0%)
ADD X20, X19, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADD X9, X9, X8,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
LD1R {V2.2D}, [X9]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.33	0.33	0.33	8	0.33	scal (50.0%)
ADD X9, X30, X13	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
MADD X11, X28, X26, X9	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
SDIV X22, X20, X24	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	5-20	5-20	scal (50.0%)
SBFM X11, X11, #29, #63	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
LDR D3, [X5, X11]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
MADD X12, X28, X22, X30	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
ADD X12, X12, X14	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
ADD X12, X5, X12,ASR #29	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50	N/A
MADD X10, X28, X26, X30	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
SBFM X23, X10, #32, #63	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
LD1 {V3.D[1]}, [X12]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.33	0.33	0.33	8	0.33	scal (50.0%)
FCMGE V2.2D, V3.2D, V2.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
XTN V5.2S, V2.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
FMOV W10, S5	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (25.0%)
TBZ W10, #0, 424720 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x5a0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D3, [X5, X23,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
LDR D4, [X7, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
MADD X9, X28, X22, X9	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
SBFM X21, X9, #32, #63	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
MOV W9, V5.S[1]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	1	scal (25.0%)
TBZ W9, #0, 424740 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x5c0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 424730 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x5b0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MADD X9, X28, X22, X9	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
SBFM X21, X9, #32, #63	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
MOV W9, V5.S[1]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	1	scal (25.0%)
TBZ W9, #0, 424740 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x5c0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X9, X5, X21,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
LD1 {V3.D[1]}, [X9]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.33	0.33	0.33	8	0.33	scal (50.0%)
ADD X9, X7, X8,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
LD1 {V4.D[1]}, [X9]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.33	0.33	0.33	8	0.33	scal (50.0%)
FCMGT V3.2D, V4.2D, V3.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
UBFM X10, X26, #32, #31	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
AND V2.16B, V2.16B, V3.16B	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
XTN V2.2S, V2.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
FMOV W9, S2	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (25.0%)
TBZ W9, #0, 424780 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x600>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X9, X10, X13	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
SBFM X9, X9, #29, #63	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
LDR D3, [X6, X9]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
MOV W11, V2.S[1]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	1	scal (25.0%)
UBFM X9, X22, #32, #31	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
TBNZ W11, #0, 42478c <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x60c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 424798 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x618>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV W11, V2.S[1]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	1	scal (25.0%)
UBFM X9, X22, #32, #31	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
TBZ W11, #0, 424798 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x618>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X11, X9, X13	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
ADD X11, X6, X11,ASR #29	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50	N/A
LD1 {V3.D[1]}, [X11]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.33	0.33	0.33	8	0.33	scal (50.0%)
LDUR X11, [X29, #464]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
ADD X11, X11, X8,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
LD1R {V4.2D}, [X11]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.33	0.33	0.33	8	0.33	scal (50.0%)
SBFM X11, X10, #32, #63	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
FCMGE V3.2D, V3.2D, V4.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
XTN V3.2S, V3.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
AND V2.8B, V2.8B, V3.8B	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (50.0%)
FMOV W10, S2	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (25.0%)
TBZ W10, #0, 424824 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x6a4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X10, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
LDR D3, [X6, X11,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
LDR D4, [X10, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
SBFM X12, X9, #32, #63	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
MOV W9, V2.S[1]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	1	scal (25.0%)
TBNZ W9, #0, 424830 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x6b0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
FCMGT V3.2D, V4.2D, V3.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
XTN V3.2S, V3.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
AND V2.8B, V2.8B, V3.8B	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (50.0%)
FMOV W9, S2	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (25.0%)
TBZ W9, #0, 424858 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x6d8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X10, X9, [X29, #960]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.50	N/A
LDR D3, [X9, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
LDUR X9, [X29, #440]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
MADD X9, X9, X11, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
ADD X9, X10, X9,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
STR D3, [X9, X23,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
LDP X10, X9, [SP, #72]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.50	N/A
LDR D3, [X9, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
LDR X9, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
MADD X9, X9, X11, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
ADD X9, X10, X9,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
STR D3, [X9, X23,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
MOV W9, V2.S[1]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	1	scal (25.0%)
TBNZ W9, #0, 424860 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x6e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 424890 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x710>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SBFM X12, X9, #32, #63	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
MOV W9, V2.S[1]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	1	scal (25.0%)
TBZ W9, #0, 4247d4 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x654>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X9, X6, X12,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
LD1 {V3.D[1]}, [X9]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.33	0.33	0.33	8	0.33	scal (50.0%)
LDR X9, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
ADD X9, X9, X8,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
LD1 {V4.D[1]}, [X9]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0.33	0.33	0.33	8	0.33	scal (50.0%)
FCMGT V3.2D, V4.2D, V3.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
XTN V3.2S, V3.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
AND V2.8B, V2.8B, V3.8B	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (50.0%)
FMOV W9, S2	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (25.0%)
TBNZ W9, #0, 4247e8 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x668>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV W9, V2.S[1]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	1	scal (25.0%)
TBZ W9, #0, 424890 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x710>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X10, X9, [X29, #960]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.50	N/A
LDR D3, [X9, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
LDUR X9, [X29, #440]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
MADD X9, X9, X12, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
ADD X9, X10, X9,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
STR D3, [X9, X21,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
LDP X10, X9, [SP, #72]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.50	N/A
LDR D3, [X9, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
LDR X9, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	4	0.33	N/A
MADD X9, X9, X12, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
ADD X9, X10, X9,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
STR D3, [X9, X21,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
FMOV S3, W26	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	scal (25.0%)
SBFM X11, X26, #0, #31	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
MADD X9, X0, X11, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
FMOV S4, W19	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	scal (25.0%)
ADD X13, X18, X9,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
MOV V3.S[1], W22	1	0	0	0	0	0	0	1	0	0.25	0.25	0.25	0.25	0	0	0	5	1	scal (25.0%)
MOV V4.S[1], W20	1	0	0	0	0	0	0	1	0	0.25	0.25	0.25	0.25	0	0	0	5	1	scal (25.0%)
MADD X9, X3, X11, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
ADD X14, X2, X9,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
FMOV W9, S2	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (25.0%)
MLS V4.2S, V0.2S, V3.2S	1	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	0	4	0.50	vect (50.0%)
SSHLL V3.2D, V4.2S, #32	1	0	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	2	0.50	vect (50.0%)
TBZ W9, #0, 4248d8 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x758>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D4, [X17, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
FMOV X9, D3	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
STR D4, [X13, X9,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
LDR D4, [X1, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
STR D4, [X14, X9,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
SBFM X12, X22, #0, #31	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
MOV W15, V2.S[1]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	1	scal (25.0%)
MADD X9, X0, X12, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
MADD X10, X3, X12, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
ADD X9, X18, X9,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
ADD X10, X2, X10,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
TBZ W15, #0, 424908 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x788>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D4, [X17, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
MOV X15, V3.D[1]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	1	scal (50.0%)
STR D4, [X9, X15,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
LDR D4, [X1, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
STR D4, [X10, X15,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
MADD X15, X27, X26, X19	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
MADD X16, X27, X22, X20	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (50.0%)
FMOV D4, X15	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	scal (50.0%)
MOV V4.D[1], X16	1	0	0	0	0	0	0	1	0	0.25	0.25	0.25	0.25	0	0	0	5	1	scal (50.0%)
SHL V4.2D, V4.2D, #32	1	0	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	2	0.50	vect (100.0%)
SSHR V5.2D, V4.2D, #32	1	0	0	0	0	0	0	0	0	0	0.50	0	0.50	0	0	0	2	0.50	vect (100.0%)
ADD V4.2D, V3.2D, V1.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
CMGE V5.2D, V5.2D, V3.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
XTN V5.2S, V5.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (100.0%)
AND V5.8B, V2.8B, V5.8B	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	0.25	vect (50.0%)
FMOV W15, S5	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (25.0%)
TBZ W15, #0, 42494c <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x7cc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D6, [X17, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
FMOV X15, D4	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
STR D6, [X13, X15,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
LDR D6, [X1, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
STR D6, [X14, X15,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
MOV W13, V5.S[1]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	1	scal (25.0%)
TBZ W13, #0, 424968 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x7e8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D6, [X17, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
MOV X13, V4.D[1]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	1	scal (50.0%)
STR D6, [X9, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
LDR D6, [X1, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
STR D6, [X10, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
ADD X10, X11, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
FMOV W11, S2	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (25.0%)
MOVZ X14, #2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
MADD X9, X0, X10, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
MADD X10, X3, X10, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
ADD X9, X18, X9,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
ADD X10, X2, X10,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
TBZ W11, #0, 42499c <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x81c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D6, [X17, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
FMOV X11, D3	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
STR D6, [X9, X11,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
LDR D6, [X1, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
STR D6, [X10, X11,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
ADD X12, X12, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
MOV W13, V2.S[1]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	1	scal (25.0%)
MADD X11, X0, X12, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
MADD X12, X3, X12, XZR	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	N/A
ADD X11, X18, X11,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
ADD X12, X2, X12,LSL #3	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	1	0.17	N/A
TBZ W13, #0, 4249e0 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x860>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D2, [X17, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
MOV X13, V3.D[1]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	1	scal (50.0%)
STR D2, [X11, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
LDR D2, [X1, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
STR D2, [X12, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
FMOV W13, S5	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (25.0%)
TBNZ W13, #0, 4249e8 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x868>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOV W9, V5.S[1]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	1	scal (25.0%)
TBZ W9, #0, 424688 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x508>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 424a04 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x884>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
FMOV W13, S5	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (25.0%)
TBZ W13, #0, 4249d4 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x854>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D2, [X17, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
FMOV X13, D4	1	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0	2	1	scal (50.0%)
STR D2, [X9, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
LDR D2, [X1, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
STR D2, [X10, X13,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
MOV W9, V5.S[1]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	1	scal (25.0%)
TBZ W9, #0, 424688 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x508>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D2, [X17, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
MOV X9, V4.D[1]	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	2	1	scal (50.0%)
STR D2, [X11, X9,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
LDR D2, [X1, X8,LSL #3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	6	0.33	scal (50.0%)
STR D2, [X12, X9,LSL #3]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	2	0.50	scal (50.0%)
B 424688 <_Z14generate_chunkiR16global_variables.omp_outlined.2+0x508>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code