OV - exec - Function field_summary(global_variables&, parallel_&) [clone .omp

	Function: field_summary(global_variables&, parallel_&) [clone .omp_outlined]	Module: exec	Source: field_summary.cpp:75-91 [...]	Coverage (incl. loops): 0.32% \| (excl. loops): 0.00%

/home/hbollore/qaas/qaas-runs/174-169-1878/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp: 75 - 91

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75: #pragma omp parallel for simd reduction(+ : press) reduction(+ : ke) reduction(+ : ie) reduction(+ : mass) reduction(+ : vol)

76:     for (int idx = (0); idx < ((ymax - ymin + 1) * (xmax - xmin + 1)); idx++) {

77:       const int j = xmin + 1 + idx % (xmax - xmin + 1);

78:       const int k = ymin + 1 + idx / (xmax - xmin + 1);

79:       double vsqrd = 0.0;

80:       for (int kv = k; kv <= k + 1; ++kv) {

81:         for (int jv = j; jv <= j + 1; ++jv) {

82:           vsqrd += 0.25 * (field.xvel0(jv, kv) * field.xvel0(jv, kv) + field.yvel0(jv, kv) * field.yvel0(jv, kv));

83:         }

84:       }

85:       double cell_vol = field.volume(j, k);

86:       double cell_mass = cell_vol * field.density0(j, k);

87:       vol += cell_vol;

88:       mass += cell_mass;

89:       ie += cell_mass * field.energy0(j, k);

90:       ke += cell_mass * 0.5 * vsqrd;

91:       press += cell_vol * field.pressure(j, k);

/home/hbollore/qaas/qaas-runs/174-169-1878/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h: 69 - 69

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69:   T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; }

0x422d30 STP	D15, D14, [SP, #864]!

0x422d34 STP	D13, D12, [SP, #16]

0x422d38 STP	D11, D10, [SP, #32]

0x422d3c STP	D9, D8, [SP, #48]

0x422d40 STP	X29, X30, [SP, #64]

0x422d44 STP	X28, X27, [SP, #80]

0x422d48 STP	X26, X25, [SP, #96]

0x422d4c STP	X24, X23, [SP, #112]

0x422d50 STP	X22, X21, [SP, #128]

0x422d54 STP	X20, X19, [SP, #144]

0x422d58 ADD	X29, SP, #64

0x422d5c SUB	SP, SP, #384

0x422d60 LDR	W9, [X4]

0x422d64 LDR	W20, [X5]

0x422d68 LDR	W8, [X2]

0x422d6c SUB	W9, W9, W20

0x422d70 LDR	W19, [X3]

0x422d74 SUB	W8, W8, W19

0x422d78 ADD	W26, W9, #1

0x422d7c MADD	W8, W26, W8, W26

0x422d80 SUBS	W22, W8, #1

0x422d84 B.LT	4235e0

0x422d88 LDR	W1, [X0]

0x422d8c LDP	X27, X28, [X29, #112]

0x422d90 LDP	X24, X25, [X29, #96]

0x422d94 ORR	X23, XZR, X7

0x422d98 ORR	X21, XZR, X6

0x422d9c MOVZ	W8, #1

0x422da0 ADRP	X0,

0x422da4 ADD	X0, X0, #1032

0x422da8 SUB	X3, X29, #88

0x422dac SUB	X4, X29, #76

0x422db0 SUB	X5, X29, #80

0x422db4 SUB	X6, X29, #84

0x422db8 STP	W22, WZR, [X29, #432]

0x422dbc MOVZ	W2, #34

0x422dc0 MOVZ	W7, #1

0x422dc4 STP	WZR, W8, [X29, #424]

0x422dc8 STP	XZR, XZR, [X29, #920]

0x422dcc STP	XZR, XZR, [X29, #904]

0x422dd0 STUR	XZR, [X29, #384]

0x422dd4 STR	W8, [SP]

0x422dd8 STR	W1, [SP, #76]

0x422ddc BL	403300

0x422de0 LDP	W8, W5, [X29, #432]

0x422de4 CMP	W8, W22

0x422de8 CSEL	W8, W8, W22, #11

0x422dec CMP	W5, W8

0x422df0 B.GT	42341c

0x422df4 ADD	W17, W20, #1

0x422df8 ADD	W18, W19, #1

0x422dfc LDR	X10, [X21, #184]

0x422e00 LDR	X11, [X21, #168]

0x422e04 LDR	X12, [X21, #232]

0x422e08 ADD	W22, W8, #1

0x422e0c MOVI	D1, #0

0x422e10 SUB	W8, W22, W5

0x422e14 LDR	X13, [X21, #216]

0x422e18 LDR	X2, [X21, #672]

0x422e1c LDR	X6, [X21, #656]

0x422e20 LDR	X4, [X21, #16]

0x422e24 LDR	X19, [X21]

0x422e28 LDR	X20, [X21, #64]

0x422e2c LDR	X0, [X21, #48]

0x422e30 LDR	X1, [X21, #112]

0x422e34 LDR	X3, [X21, #96]

0x422e38 CMP	W8, #4

0x422e3c B.CS	422e58

0x422e40 ORR	W7, WZR, W5

0x422e44 MOVI	D2, #0

0x422e48 MOVI	D4, #0

0x422e4c MOVI	D7, #0

0x422e50 MOVI	D0, #0

0x422e54 B	423328

0x422e58 STP	X0, X2, [SP, #200]

0x422e5c STP	X6, X1, [SP, #184]

0x422e60 FMOV	V0.2D, #0.1250000

0x422e64 MOVI	V1.2D, #0

0x422e68 MOVI	V16.2D, #0

0x422e6c MOVI	V17.2D, #0

0x422e70 MOVI	V4.2D, #0

0x422e74 MOVI	V6.2D, #0

0x422e78 MOVI	V2.2D, #0

0x422e7c MOVI	V5.2D, #0

0x422e80 MOVI	V20.2D, #0

0x422e84 MOVI	V3.2D, #0

0x422e88 ORR	X0, XZR, X2

0x422e8c LDR	X1, [SP, #200]

0x422e90 STP	X28, X27, [SP, #32]

0x422e94 AND	W27, W8, #1886

0x422e98 STP	W8, W22, [SP, #16]

0x422e9c ADD	W7, W5, W27

0x422ea0 SBFM	X8, X17, #0, #31

0x422ea4 STR	Q0, [SP, #80]

0x422ea8 STP	X25, X24, [SP, #48]

0x422eac MOVI	V0.2D, #0

0x422eb0 STR	X23, [SP, #64]

0x422eb4 STR	X17, [SP, #24]

0x422eb8 STR	X8, [SP, #104]

0x422ebc STR	W27, [SP, #12]

0x422ec0 STP	X19, X4, [SP, #160]

0x422ec4 ORR	X4, XZR, X13

0x422ec8 STP	X10, X20, [SP, #144]

0x422ecc STR	X3, [SP, #176]

0x422ed0 ORR	X3, XZR, X6

0x422ed4 STP	X12, X11, [SP, #128]

0x422ed8 STR	X13, [SP, #120]

0x422edc ORR	X13, XZR, X12

0x422ee0 ORR	X12, XZR, X11

0x422ee4 ORR	X11, XZR, X10

0x422ee8 STP	W26, W18, [SP, #112]

(237) 0x422eec SDIV	W15, W5, W26

(237) 0x422ef0 ADD	W8, W5, #1

(237) 0x422ef4 LDR	X10, [SP, #104]

(237) 0x422ef8 ADD	W14, W5, #3

(237) 0x422efc ADD	W9, W5, #2

(237) 0x422f00 STR	Q0, [SP, #224]

(237) 0x422f04 STUR	W27, [X29, #340]

(237) 0x422f08 MSUB	W2, W15, W26, W5

(237) 0x422f0c ADD	W5, W5, #4

(237) 0x422f10 ADD	X19, X10, W2,SXTW

(237) 0x422f14 SDIV	W6, W8, W26

(237) 0x422f18 UBFM	X23, X19, #61, #60

(237) 0x422f1c MSUB	W8, W6, W26, W8

(237) 0x422f20 ADD	X28, X10, W8,SXTW

(237) 0x422f24 SDIV	W2, W14, W26

(237) 0x422f28 MSUB	W14, W2, W26, W14

(237) 0x422f2c ADD	W2, W18, W2

(237) 0x422f30 ADD	X30, X10, W14,SXTW

(237) 0x422f34 ADD	W14, W18, W15

(237) 0x422f38 ADD	W15, W18, W6

(237) 0x422f3c SBFM	X6, X2, #0, #31

(237) 0x422f40 SBFM	X22, X14, #0, #31

(237) 0x422f44 MADD	X2, X4, X6, XZR

(237) 0x422f48 MADD	X25, X12, X6, XZR

(237) 0x422f4c ADD	X2, X13, X2,LSL #3

(237) 0x422f50 SDIV	W8, W9, W26

(237) 0x422f54 MSUB	W9, W8, W26, W9

(237) 0x422f58 ADD	W8, W18, W8

(237) 0x422f5c SBFM	X20, X8, #0, #31

(237) 0x422f60 MADD	X8, X4, X22, XZR

(237) 0x422f64 ADD	X9, X10, W9,SXTW

(237) 0x422f68 SBFM	X10, X15, #0, #31

(237) 0x422f6c MADD	X14, X4, X10, XZR

(237) 0x422f70 MADD	X15, X4, X20, XZR

(237) 0x422f74 UBFM	X19, X9, #61, #60

(237) 0x422f78 MADD	X24, X12, X20, XZR

(237) 0x422f7c ADD	X17, X11, X24,LSL #3

(237) 0x422f80 ADD	X18, X11, X25,LSL #3

(237) 0x422f84 LDP	X26, X27, [SP, #160]

(237) 0x422f88 STR	X10, [SP, #216]

(237) 0x422f8c ADD	X8, X13, X8,LSL #3

(237) 0x422f90 ADD	X21, X13, X14,LSL #3

(237) 0x422f94 ADD	X14, X13, X15,LSL #3

(237) 0x422f98 ADD	X9, X2, X30,LSL #3

(237) 0x422f9c LDR	D18, [X17, X19]

(237) 0x422fa0 ADD	X25, X19, #8

(237) 0x422fa4 LDR	D0, [X8, X23]

(237) 0x422fa8 ADD	X15, X21, X28,LSL #3

(237) 0x422fac LDR	D24, [X17, X25]

(237) 0x422fb0 LDR	D26, [X14, X25]

(237) 0x422fb4 LD1	{V0.D[1]}, [X15]

(237) 0x422fb8 MADD	X15, X12, X10, XZR

(237) 0x422fbc ADD	X15, X11, X15,LSL #3

(237) 0x422fc0 STUR	Q0, [X29, #320]

(237) 0x422fc4 LDR	D0, [X14, X19]

(237) 0x422fc8 LDUR	Q22, [X29, #320]

(237) 0x422fcc LD1	{V0.D[1]}, [X9]

(237) 0x422fd0 MADD	X9, X12, X22, XZR

(237) 0x422fd4 ADD	X16, X11, X9,LSL #3

(237) 0x422fd8 ADD	X9, X15, X28,LSL #3

(237) 0x422fdc LDR	D21, [X16, X23]

(237) 0x422fe0 STUR	Q0, [X29, #304]

(237) 0x422fe4 LD1	{V21.D[1]}, [X9]

(237) 0x422fe8 ADD	X9, X18, X30,LSL #3

(237) 0x422fec LD1	{V18.D[1]}, [X9]

(237) 0x422ff0 ADD	X9, X23, #8

(237) 0x422ff4 LDR	D23, [X16, X9]

(237) 0x422ff8 UBFM	X16, X28, #61, #60

(237) 0x422ffc LDR	D25, [X8, X9]

(237) 0x423000 UBFM	X8, X30, #61, #60

(237) 0x423004 ADD	X24, X16, #8

(237) 0x423008 ADD	X8, X8, #8

(237) 0x42300c ADD	X15, X15, X24

(237) 0x423010 ADD	X16, X21, X24

(237) 0x423014 ADD	X17, X2, X8

(237) 0x423018 ADD	X21, X22, #1

(237) 0x42301c LDR	X2, [SP, #176]

(237) 0x423020 MADD	X14, X4, X21, XZR

(237) 0x423024 LD1	{V26.D[1]}, [X17]

(237) 0x423028 ADD	X14, X13, X14,LSL #3

(237) 0x42302c LD1	{V23.D[1]}, [X15]

(237) 0x423030 ADD	X15, X18, X8

(237) 0x423034 LD1	{V25.D[1]}, [X16]

(237) 0x423038 MADD	X16, X12, X21, XZR

(237) 0x42303c LDR	D28, [X14, X9]

(237) 0x423040 LDR	D27, [X14, X23]

(237) 0x423044 ADD	X14, X10, #1

(237) 0x423048 LDR	X10, [SP, #152]

(237) 0x42304c ADD	X21, X6, #1

(237) 0x423050 FMUL	V21.2D, V21.2D, V21.2D

(237) 0x423054 LD1	{V24.D[1]}, [X15]

(237) 0x423058 MADD	X15, X3, X22, XZR

(237) 0x42305c MADD	X17, X4, X21, XZR

(237) 0x423060 FMLA	V21.2D, V22.2D, V22.2D

(237) 0x423064 FMUL	V22.2D, V18.2D, V18.2D

(237) 0x423068 ORR	V18.16B, V17.16B, V17.16B

(237) 0x42306c ORR	V17.16B, V16.16B, V16.16B

(237) 0x423070 ORR	V16.16B, V6.16B, V6.16B

(237) 0x423074 ORR	V6.16B, V5.16B, V5.16B

(237) 0x423078 ORR	V5.16B, V4.16B, V4.16B

(237) 0x42307c ORR	V4.16B, V3.16B, V3.16B

(237) 0x423080 ORR	V3.16B, V2.16B, V2.16B

(237) 0x423084 ORR	V2.16B, V20.16B, V20.16B

(237) 0x423088 LDUR	Q20, [X29, #304]

(237) 0x42308c ADD	X16, X11, X16,LSL #3

(237) 0x423090 ADD	X15, X0, X15,LSL #3

(237) 0x423094 LDR	D29, [X16, X9]

(237) 0x423098 LDR	D30, [X16, X23]

(237) 0x42309c MADD	X16, X2, X22, XZR

(237) 0x4230a0 ADD	X9, X20, #1

(237) 0x4230a4 ADD	X17, X13, X17,LSL #3

(237) 0x4230a8 LDR	D31, [X15, X23]

(237) 0x4230ac MADD	X15, X26, X22, XZR

(237) 0x4230b0 ADD	X15, X27, X15,LSL #3

(237) 0x4230b4 LDR	D8, [X15, X23]

(237) 0x4230b8 MADD	X15, X1, X22, XZR

(237) 0x4230bc LDR	X22, [SP, #192]

(237) 0x4230c0 FMLA	V22.2D, V20.2D, V20.2D

(237) 0x4230c4 ORR	V20.16B, V2.16B, V2.16B

(237) 0x4230c8 ORR	V2.16B, V3.16B, V3.16B

(237) 0x4230cc ORR	V3.16B, V4.16B, V4.16B

(237) 0x4230d0 ORR	V4.16B, V5.16B, V5.16B

(237) 0x4230d4 ORR	V5.16B, V6.16B, V6.16B

(237) 0x4230d8 ORR	V6.16B, V16.16B, V16.16B

(237) 0x4230dc ORR	V16.16B, V17.16B, V17.16B

(237) 0x4230e0 ORR	V17.16B, V18.16B, V18.16B

(237) 0x4230e4 FMUL	V23.2D, V23.2D, V23.2D

(237) 0x4230e8 ADD	X15, X10, X15,LSL #3

(237) 0x4230ec FMLA	V23.2D, V25.2D, V25.2D

(237) 0x4230f0 FMUL	V24.2D, V24.2D, V24.2D

(237) 0x4230f4 LDR	D9, [X15, X23]

(237) 0x4230f8 MADD	X15, X4, X14, XZR

(237) 0x4230fc MADD	X14, X12, X14, XZR

(237) 0x423100 FMLA	V24.2D, V26.2D, V26.2D

(237) 0x423104 ADD	X16, X22, X16,LSL #3

(237) 0x423108 LDR	D10, [X16, X23]

(237) 0x42310c MADD	X16, X4, X9, XZR

(237) 0x423110 MADD	X9, X12, X9, XZR

(237) 0x423114 ADD	X14, X11, X14,LSL #3

(237) 0x423118 ADD	X15, X13, X15,LSL #3

(237) 0x42311c ADD	X18, X15, X28,LSL #3

(237) 0x423120 FADD	V21.2D, V23.2D, V21.2D

(237) 0x423124 ADD	X9, X11, X9,LSL #3

(237) 0x423128 ADD	X16, X13, X16,LSL #3

(237) 0x42312c LD1	{V27.D[1]}, [X18]

(237) 0x423130 ADD	X18, X14, X28,LSL #3

(237) 0x423134 FADD	V22.2D, V24.2D, V22.2D

(237) 0x423138 LDR	D15, [X9, X19]

(237) 0x42313c LDR	D12, [X16, X19]

(237) 0x423140 LDR	D11, [X16, X25]

(237) 0x423144 LDR	D14, [X9, X25]

(237) 0x423148 MADD	X16, X12, X21, XZR

(237) 0x42314c LD1	{V30.D[1]}, [X18]

(237) 0x423150 ADD	X18, X17, X30,LSL #3

(237) 0x423154 ADD	X16, X11, X16,LSL #3

(237) 0x423158 ADD	X9, X16, X30,LSL #3

(237) 0x42315c LD1	{V15.D[1]}, [X9]

(237) 0x423160 ADD	X9, X14, X24

(237) 0x423164 FMUL	V23.2D, V30.2D, V30.2D

(237) 0x423168 LD1	{V29.D[1]}, [X9]

(237) 0x42316c ADD	X9, X16, X8

(237) 0x423170 LD1	{V14.D[1]}, [X9]

(237) 0x423174 ADD	X9, X15, X24

(237) 0x423178 ADD	X8, X17, X8

(237) 0x42317c LD1	{V11.D[1]}, [X8]

(237) 0x423180 LD1	{V12.D[1]}, [X18]

(237) 0x423184 LDR	W18, [SP, #116]

(237) 0x423188 LD1	{V28.D[1]}, [X9]

(237) 0x42318c LDR	X9, [SP, #216]

(237) 0x423190 FMLA	V23.2D, V27.2D, V27.2D

(237) 0x423194 MADD	X8, X3, X9, XZR

(237) 0x423198 FMUL	V24.2D, V15.2D, V15.2D

(237) 0x42319c ADD	X8, X0, X8,LSL #3

(237) 0x4231a0 FMUL	V25.2D, V29.2D, V29.2D

(237) 0x4231a4 FMLA	V24.2D, V12.2D, V12.2D

(237) 0x4231a8 ADD	X8, X8, X28,LSL #3

(237) 0x4231ac FMUL	V26.2D, V14.2D, V14.2D

(237) 0x4231b0 LD1	{V31.D[1]}, [X8]

(237) 0x4231b4 MADD	X8, X3, X20, XZR

(237) 0x4231b8 FMLA	V25.2D, V28.2D, V28.2D

(237) 0x4231bc FMLA	V26.2D, V11.2D, V11.2D

(237) 0x4231c0 ADD	X8, X0, X8,LSL #3

(237) 0x4231c4 LDR	D13, [X8, X19]

(237) 0x4231c8 MADD	X8, X3, X6, XZR

(237) 0x4231cc FADD	V23.2D, V25.2D, V23.2D

(237) 0x4231d0 ADD	X8, X0, X8,LSL #3

(237) 0x4231d4 ADD	X8, X8, X30,LSL #3

(237) 0x4231d8 FADD	V21.2D, V23.2D, V21.2D

(237) 0x4231dc FADD	V23.2D, V26.2D, V24.2D

(237) 0x4231e0 LDR	Q24, [SP, #80]

(237) 0x4231e4 FADD	V22.2D, V23.2D, V22.2D

(237) 0x4231e8 FADD	V20.2D, V20.2D, V31.2D

(237) 0x4231ec LD1	{V13.D[1]}, [X8]

(237) 0x4231f0 MADD	X8, X26, X9, XZR

(237) 0x4231f4 ADD	X8, X27, X8,LSL #3

(237) 0x4231f8 ADD	X8, X8, X28,LSL #3

(237) 0x4231fc LD1	{V8.D[1]}, [X8]

(237) 0x423200 MADD	X8, X26, X20, XZR

(237) 0x423204 ADD	X8, X27, X8,LSL #3

(237) 0x423208 LDR	D7, [X8, X19]

(237) 0x42320c MADD	X8, X1, X20, XZR

(237) 0x423210 FADD	V3.2D, V3.2D, V13.2D

(237) 0x423214 ADD	X8, X10, X8,LSL #3

(237) 0x423218 LDR	D0, [X8, X19]

(237) 0x42321c MADD	X8, X2, X20, XZR

(237) 0x423220 ADD	X8, X22, X8,LSL #3

(237) 0x423224 FMUL	V23.2D, V8.2D, V31.2D

(237) 0x423228 LDR	D19, [X8, X19]

(237) 0x42322c MADD	X8, X26, X6, XZR

(237) 0x423230 LDR	W26, [SP, #112]

(237) 0x423234 ADD	X8, X27, X8,LSL #3

(237) 0x423238 LDUR	W27, [X29, #340]

(237) 0x42323c FADD	V2.2D, V2.2D, V23.2D

(237) 0x423240 ADD	X8, X8, X30,LSL #3

(237) 0x423244 SUBS	W27, W27, #4

(237) 0x423248 LD1	{V7.D[1]}, [X8]

(237) 0x42324c MADD	X8, X1, X9, XZR

(237) 0x423250 ADD	X8, X10, X8,LSL #3

(237) 0x423254 ADD	X8, X8, X28,LSL #3

(237) 0x423258 LD1	{V9.D[1]}, [X8]

(237) 0x42325c MADD	X8, X1, X6, XZR

(237) 0x423260 ADD	X8, X10, X8,LSL #3

(237) 0x423264 ADD	X8, X8, X30,LSL #3

(237) 0x423268 LD1	{V0.D[1]}, [X8]

(237) 0x42326c MADD	X8, X2, X9, XZR

(237) 0x423270 MADD	X9, X2, X6, XZR

(237) 0x423274 FMUL	V7.2D, V7.2D, V13.2D

(237) 0x423278 ADD	X8, X22, X8,LSL #3

(237) 0x42327c ADD	X9, X22, X9,LSL #3

(237) 0x423280 ADD	X8, X8, X28,LSL #3

(237) 0x423284 ADD	X9, X9, X30,LSL #3

(237) 0x423288 FADD	V5.2D, V5.2D, V7.2D

(237) 0x42328c LD1	{V10.D[1]}, [X8]

(237) 0x423290 LD1	{V19.D[1]}, [X9]

(237) 0x423294 FMLA	V4.2D, V9.2D, V23.2D

(237) 0x423298 FMLA	V6.2D, V0.2D, V7.2D

(237) 0x42329c FMUL	V0.2D, V24.2D, V23.2D

(237) 0x4232a0 FMUL	V7.2D, V24.2D, V7.2D

(237) 0x4232a4 FMLA	V16.2D, V21.2D, V0.2D

(237) 0x4232a8 LDR	Q0, [SP, #224]

(237) 0x4232ac FMLA	V17.2D, V22.2D, V7.2D

(237) 0x4232b0 FMLA	V1.2D, V10.2D, V31.2D

(237) 0x4232b4 FMLA	V0.2D, V19.2D, V13.2D

(237) 0x4232b8 B.NE	422eec

0x4232bc FADD	V0.2D, V0.2D, V1.2D

0x4232c0 FADD	V7.2D, V17.2D, V16.2D

0x4232c4 FADD	V4.2D, V6.2D, V4.2D

0x4232c8 FADD	V2.2D, V5.2D, V2.2D

0x4232cc LDP	W9, W8, [SP, #12]

0x4232d0 LDP	X24, X23, [SP, #56]

0x4232d4 LDP	X27, X25, [SP, #40]

0x4232d8 LDP	X17, X28, [SP, #24]

0x4232dc FADD	V1.2D, V3.2D, V20.2D

0x4232e0 FADDP	D0, V0.2D

0x4232e4 LDP	X0, X2, [SP, #200]

0x4232e8 LDP	X6, X1, [SP, #184]

0x4232ec LDP	X19, X4, [SP, #160]

0x4232f0 LDP	X10, X20, [SP, #144]

0x4232f4 LDR	W22, [SP, #20]

0x4232f8 FADDP	D7, V7.2D

0x4232fc FADDP	D4, V4.2D

0x423300 FADDP	D2, V2.2D

0x423304 FADDP	D1, V1.2D

0x423308 LDR	X3, [SP, #176]

0x42330c LDP	X12, X11, [SP, #128]

0x423310 LDR	X13, [SP, #120]

0x423314 STP	D7, D0, [X29, #920]

0x423318 STP	D2, D4, [X29, #904]

0x42331c STUR	D1, [X29, #384]

0x423320 CMP	W8, W9

0x423324 B.EQ	42341c

0x423328 FMOV	D3, #0.1250000

(238) 0x42332c SDIV	W8, W7, W26

(238) 0x423330 ADD	W9, W17, W7

(238) 0x423334 ADD	W7, W7, #1

(238) 0x423338 MSUB	W9, W26, W8, W9

(238) 0x42333c ADD	W8, W18, W8

(238) 0x423340 SBFM	X8, X8, #0, #31

(238) 0x423344 MADD	X15, X11, X8, XZR

(238) 0x423348 MADD	X14, X13, X8, XZR

(238) 0x42334c SBFM	X9, X9, #61, #31

(238) 0x423350 ADD	X16, X9, #8

(238) 0x423354 ADD	X15, X10, X15,LSL #3

(238) 0x423358 ADD	X14, X12, X14,LSL #3

(238) 0x42335c LDR	D6, [X15, X9]

(238) 0x423360 LDR	D16, [X15, X16]

(238) 0x423364 LDR	D5, [X14, X9]

(238) 0x423368 LDR	D17, [X14, X16]

(238) 0x42336c ADD	X14, X8, #1

(238) 0x423370 MADD	X15, X13, X14, XZR

(238) 0x423374 MADD	X14, X11, X14, XZR

(238) 0x423378 ADD	X14, X10, X14,LSL #3

(238) 0x42337c ADD	X15, X12, X15,LSL #3

(238) 0x423380 FMUL	D6, D6, D6

(238) 0x423384 FMUL	D16, D16, D16

(238) 0x423388 FMADD	D5, D5, D5, D6

(238) 0x42338c FMADD	D6, D17, D17, D16

(238) 0x423390 LDR	D16, [X14, X9]

(238) 0x423394 LDR	D17, [X15, X16]

(238) 0x423398 FADD	D5, D6, D5

(238) 0x42339c LDR	D6, [X15, X9]

(238) 0x4233a0 FMUL	D16, D16, D16

(238) 0x4233a4 FMADD	D6, D6, D6, D16

(238) 0x4233a8 LDR	D16, [X14, X16]

(238) 0x4233ac MADD	X14, X6, X8, XZR

(238) 0x4233b0 ADD	X14, X2, X14,LSL #3

(238) 0x4233b4 FMUL	D16, D16, D16

(238) 0x4233b8 FMADD	D16, D17, D17, D16

(238) 0x4233bc FADD	D6, D16, D6

(238) 0x4233c0 LDR	D16, [X14, X9]

(238) 0x4233c4 MADD	X14, X19, X8, XZR

(238) 0x4233c8 ADD	X14, X4, X14,LSL #3

(238) 0x4233cc FADD	D5, D6, D5

(238) 0x4233d0 LDR	D17, [X14, X9]

(238) 0x4233d4 MADD	X14, X0, X8, XZR

(238) 0x4233d8 MADD	X8, X3, X8, XZR

(238) 0x4233dc ADD	X14, X20, X14,LSL #3

(238) 0x4233e0 ADD	X8, X1, X8,LSL #3

(238) 0x4233e4 FADD	D1, D1, D16

(238) 0x4233e8 FMUL	D17, D17, D16

(238) 0x4233ec FADD	D2, D2, D17

(238) 0x4233f0 STP	D1, D2, [X29, #896]

(238) 0x4233f4 LDR	D6, [X14, X9]

(238) 0x4233f8 FMADD	D4, D6, D17, D4

(238) 0x4233fc FMUL	D6, D3, D17

(238) 0x423400 FMADD	D7, D5, D6, D7

(238) 0x423404 STP	D4, D7, [X29, #912]

(238) 0x423408 LDR	D5, [X8, X9]

(238) 0x42340c FMADD	D0, D5, D16, D0

(238) 0x423410 STUR	D0, [X29, #416]

(238) 0x423414 CMP	W22, W7

(238) 0x423418 B.NE	42332c

0x42341c LDR	W19, [SP, #76]

0x423420 ADRP	X0,

0x423424 ADD	X0, X0, #1056

0x423428 ORR	W1, WZR, W19

0x42342c BL	403400

0x423430 SUB	X8, X29, #96

0x423434 SUB	X9, X29, #104

0x423438 ADRP	X6,

0x42343c ADRP	X0,

0x423440 ADD	X0, X0, #1080

0x423444 ADRP	X5,

0x423448 ADD	X5, X5, #3264

0x42344c ORR	W1, WZR, W19

0x423450 STP	X8, X9, [X29, #856]

0x423454 SUB	X8, X29, #112

0x423458 SUB	X9, X29, #120

0x42345c SUB	X4, X29, #168

0x423460 MOVZ	W2, #5

0x423464 MOVZ	W3, #40

0x423468 STP	X8, X9, [X29, #872]

0x42346c SUB	X8, X29, #128

0x423470 STUR	X8, [X29, #376]

0x423474 LDR	X6, [X6, #3944]

0x423478 BL	403370

0x42347c CMP	W0, #2

0x423480 B.EQ	4234f0

0x423484 CMP	W0, #1

0x423488 B.NE	4235e0

0x42348c LDR	D0, [X28]

0x423490 LDP	D1, D2, [X29, #920]

0x423494 ADRP	X2,

0x423498 ADRP	X0,

0x42349c ADD	X0, X0, #1080

0x4234a0 ORR	W1, WZR, W19

0x4234a4 FADD	D0, D2, D0

0x4234a8 STR	D0, [X28]

0x4234ac LDR	D0, [X27]

0x4234b0 FADD	D0, D1, D0

0x4234b4 LDP	D1, D2, [X29, #904]

0x4234b8 STR	D0, [X27]

0x4234bc LDR	D0, [X25]

0x4234c0 FADD	D0, D2, D0

0x4234c4 STR	D0, [X25]

0x4234c8 LDR	D0, [X24]

0x4234cc FADD	D0, D1, D0

0x4234d0 LDUR	D1, [X29, #384]

0x4234d4 STR	D0, [X24]

0x4234d8 LDR	D0, [X23]

0x4234dc FADD	D0, D1, D0

0x4234e0 STR	D0, [X23]

0x4234e4 LDR	X2, [X2, #3944]

0x4234e8 BL	4031c0

0x4234ec B	4235e0

0x4234f0 LDUR	D0, [X29, #416]

0x4234f4 LDR	D1, [X28]

0x4234f8 HINT	#0

0x4234fc HINT	#0

(232) 0x423500 FADD	D2, D1, D0

(232) 0x423504 FMOV	X9, D1

(232) 0x423508 ORR	X10, XZR, X9

(232) 0x42350c FMOV	X8, D2

(232) 0x423510 CAS	X10, X8, [X28]

(232) 0x423514 FMOV	D1, X10

(232) 0x423518 CMP	X10, X9

(232) 0x42351c B.NE	423500

0x423520 LDUR	D0, [X29, #408]

0x423524 LDR	D1, [X27]

(233) 0x423528 FADD	D2, D1, D0

(233) 0x42352c FMOV	X9, D1

(233) 0x423530 ORR	X10, XZR, X9

(233) 0x423534 FMOV	X8, D2

(233) 0x423538 CAS	X10, X8, [X27]

(233) 0x42353c FMOV	D1, X10

(233) 0x423540 CMP	X10, X9

(233) 0x423544 B.NE	423528

0x423548 LDUR	D0, [X29, #400]

0x42354c LDR	D1, [X25]

0x423550 HINT	#0

0x423554 HINT	#0

0x423558 HINT	#0

0x42355c HINT	#0

(234) 0x423560 FADD	D2, D1, D0

(234) 0x423564 FMOV	X9, D1

(234) 0x423568 ORR	X10, XZR, X9

(234) 0x42356c FMOV	X8, D2

(234) 0x423570 CAS	X10, X8, [X25]

(234) 0x423574 FMOV	D1, X10

(234) 0x423578 CMP	X10, X9

(234) 0x42357c B.NE	423560

0x423580 LDUR	D0, [X29, #392]

0x423584 LDR	D1, [X24]

(235) 0x423588 FADD	D2, D1, D0

(235) 0x42358c FMOV	X9, D1

(235) 0x423590 ORR	X10, XZR, X9

(235) 0x423594 FMOV	X8, D2

(235) 0x423598 CAS	X10, X8, [X24]

(235) 0x42359c FMOV	D1, X10

(235) 0x4235a0 CMP	X10, X9

(235) 0x4235a4 B.NE	423588

0x4235a8 LDUR	D0, [X29, #384]

0x4235ac LDR	D1, [X23]

0x4235b0 HINT	#0

0x4235b4 HINT	#0

0x4235b8 HINT	#0

0x4235bc HINT	#0

(236) 0x4235c0 FADD	D2, D1, D0

(236) 0x4235c4 FMOV	X9, D1

(236) 0x4235c8 ORR	X10, XZR, X9

(236) 0x4235cc FMOV	X8, D2

(236) 0x4235d0 CAS	X10, X8, [X23]

(236) 0x4235d4 FMOV	D1, X10

(236) 0x4235d8 CMP	X10, X9

(236) 0x4235dc B.NE	4235c0

0x4235e0 ADD	SP, SP, #384

0x4235e4 LDP	D9, D8, [SP, #48]

0x4235e8 LDP	D11, D10, [SP, #32]

0x4235ec LDP	D13, D12, [SP, #16]

0x4235f0 LDP	X20, X19, [SP, #144]

0x4235f4 LDP	X22, X21, [SP, #128]

0x4235f8 LDP	X24, X23, [SP, #112]

0x4235fc LDP	X26, X25, [SP, #96]

0x423600 LDP	X28, X27, [SP, #80]

0x423604 LDP	X29, X30, [SP, #64]

0x423608 LDP	D15, D14, [SP], #160

0x42360c RET

0x423610 HINT	#0

0x423614 HINT	#0

0x423618 HINT	#0

0x42361c HINT	#0

Coverage (%)	Name	Source Location	Module
○100.00	__kmp_invoke_microtask		libomp.so

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run armclang_3

Source file and lines	field_summary.cpp:75-91
Module	exec

The function is defined in:

/home/hbollore/qaas/qaas-runs/174-169-1878/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:75-91
/home/hbollore/qaas/qaas-runs/174-169-1878/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:69

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 36.00 to 11.83 cycles (3.04x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is not vectorized. Only 59% of vector register length is used (average across all VPU instructions). By fully vectorizing your function, you can lower the cost of an iteration from 36.00 to 26.37 cycles (1.36x speedup).

Details

12% of VPU instructions are used in vector version (process two or more data elements in vector registers):

14% of VPU loads are used in vector version.
15% of VPU stores are used in vector version.
17% of VPU addition or subtraction instructions are used in vector version.
0% of VPU fused multiply-add instructions are used in vector version.
2% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 36.00 to 2.00 cycles (18.00x speedup).

Matching between your function (in the source code) and the binary function

The binary function is composed of 20 FP arithmetical operations:

20: addition or subtraction

The binary function is loading 660 bytes. The binary function is storing 532 bytes.

Arithmetic intensity

Arithmetic intensity is 0.02 FP operations per loaded or stored byte.

General properties

nb instructions	228
loop length	912
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

26.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	6.50	6.50	11.25	11.25	11.17	11.17	11.08	11.08	11.25	11.25	11.25	11.25	36.00	36.00	36.00	15.50	15.50
cycles	6.50	6.50	11.25	11.25	11.17	11.17	11.08	11.08	11.25	11.25	11.25	11.25	36.00	36.00	36.00	15.50	15.50

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	26.75
Overall L1	36.00

Vectorization ratios

INT

all	9%
load	14%
store	15%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	0%
other	0%

all	35%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	33%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	50%

INT+FP

all	12%
load	14%
store	15%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	17%
fma	0%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	2%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 36.00 cycles. At this rate:

19% of peak load performance is reached (18.33 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
30% of peak store performance is reached (14.78 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 422d30

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16	Latency	Recip. throughput	Vectorization
STP D15, D14, [SP, #864]!	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
STP D13, D12, [SP, #16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
STP D11, D10, [SP, #32]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
STP D9, D8, [SP, #48]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
STP X29, X30, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X28, X27, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X26, X25, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X24, X23, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X22, X21, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X20, X19, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ADD X29, SP, #64	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB SP, SP, #384	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR W9, [X4]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR W20, [X5]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR W8, [X2]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
SUB W9, W9, W20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
LDR W19, [X3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
SUB W8, W8, W19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
ADD W26, W9, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
MADD W8, W26, W8, W26	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
SUBS W22, W8, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.LT 4235e0 <_Z13field_summaryR16global_variablesR9parallel_.omp_outlined+0x8b0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR W1, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDP X27, X28, [X29, #112]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X24, X25, [X29, #96]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
ORR X23, XZR, X7	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X21, XZR, X6	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W8, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
ADRP X0, <46dda0>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X0, X0, #1032	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB X3, X29, #88	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB X4, X29, #76	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB X5, X29, #80	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB X6, X29, #84	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP W22, WZR, [X29, #432]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
MOVZ W2, #34	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W7, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
STP WZR, W8, [X29, #424]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP XZR, XZR, [X29, #920]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP XZR, XZR, [X29, #904]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STUR XZR, [X29, #384]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR W8, [SP]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
STR W1, [SP, #76]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
BL 403300 <@plt_start@+0x490>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP W8, W5, [X29, #432]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP W8, W22	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
CSEL W8, W8, W22, #11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
CMP W5, W8	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.GT 42341c <_Z13field_summaryR16global_variablesR9parallel_.omp_outlined+0x6ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD W17, W20, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
ADD W18, W19, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
LDR X10, [X21, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X11, [X21, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X12, [X21, #232]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD W22, W8, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
MOVI D1, #0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
SUB W8, W22, W5	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
LDR X13, [X21, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X2, [X21, #672]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [X21, #656]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X21, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X19, [X21]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X20, [X21, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X0, [X21, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X1, [X21, #112]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X3, [X21, #96]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP W8, #4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.CS 422e58 <_Z13field_summaryR16global_variablesR9parallel_.omp_outlined+0x128>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR W7, WZR, W5	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
MOVI D2, #0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
MOVI D4, #0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
MOVI D7, #0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
MOVI D0, #0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
B 423328 <_Z13field_summaryR16global_variablesR9parallel_.omp_outlined+0x5f8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STP X0, X2, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X6, X1, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
FMOV V0.2D, #0.1250000	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
MOVI V1.2D, #0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
MOVI V16.2D, #0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
MOVI V17.2D, #0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
MOVI V4.2D, #0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
MOVI V6.2D, #0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
MOVI V2.2D, #0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
MOVI V5.2D, #0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
MOVI V20.2D, #0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
MOVI V3.2D, #0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
ORR X0, XZR, X2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X1, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
STP X28, X27, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
AND W27, W8, #1886	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP W8, W22, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD W7, W5, W27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
SBFM X8, X17, #0, #31	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (100.0%)
STR Q0, [SP, #80]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
STP X25, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
MOVI V0.2D, #0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
STR X23, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X17, [SP, #24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X8, [SP, #104]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR W27, [SP, #12]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
STP X19, X4, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X4, XZR, X13	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP X10, X20, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STR X3, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X3, XZR, X6	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP X12, X11, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STR X13, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X13, XZR, X12	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ORR X12, XZR, X11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ORR X11, XZR, X10	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP W26, W18, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
FADD V0.2D, V0.2D, V1.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FADD V7.2D, V17.2D, V16.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FADD V4.2D, V6.2D, V4.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FADD V2.2D, V5.2D, V2.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
LDP W9, W8, [SP, #12]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDP X24, X23, [SP, #56]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X27, X25, [SP, #40]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X17, X28, [SP, #24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
FADD V1.2D, V3.2D, V20.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FADDP D0, V0.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (100.0%)
LDP X0, X2, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X6, X1, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X19, X4, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X10, X20, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
LDR W22, [SP, #20]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
FADDP D7, V7.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (100.0%)
FADDP D4, V4.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (100.0%)
FADDP D2, V2.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (100.0%)
FADDP D1, V1.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (100.0%)
LDR X3, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDP X12, X11, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
LDR X13, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
STP D7, D0, [X29, #920]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
STP D2, D4, [X29, #904]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
STUR D1, [X29, #384]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
CMP W8, W9	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 42341c <_Z13field_summaryR16global_variablesR9parallel_.omp_outlined+0x6ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
FMOV D3, #0.1250000	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
LDR W19, [SP, #76]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADRP X0, <46d420>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X0, X0, #1056	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR W1, WZR, W19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
BL 403400 <@plt_start@+0x590>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB X8, X29, #96	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
SUB X9, X29, #104	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADRP X6, <46f438>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADRP X0, <46d43c>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X0, X0, #1080	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADRP X5, <200422444>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X5, X5, #3264	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR W1, WZR, W19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
STP X8, X9, [X29, #856]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
SUB X8, X29, #112	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
SUB X9, X29, #120	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
SUB X4, X29, #168	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W2, #5	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W3, #40	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP X8, X9, [X29, #872]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
SUB X8, X29, #128	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STUR X8, [X29, #376]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X6, [X6, #3944]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 403370 <@plt_start@+0x500>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP W0, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4234f0 <_Z13field_summaryR16global_variablesR9parallel_.omp_outlined+0x7c0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP W0, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4235e0 <_Z13field_summaryR16global_variablesR9parallel_.omp_outlined+0x8b0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D0, [X28]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
LDP D1, D2, [X29, #920]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
ADRP X2, <46f494>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADRP X0, <46d498>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X0, X0, #1080	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR W1, WZR, W19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
FADD D0, D2, D0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
STR D0, [X28]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
LDR D0, [X27]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FADD D0, D1, D0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
LDP D1, D2, [X29, #904]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
STR D0, [X27]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
LDR D0, [X25]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FADD D0, D2, D0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
STR D0, [X25]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
LDR D0, [X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FADD D0, D1, D0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
LDUR D1, [X29, #384]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
STR D0, [X24]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
LDR D0, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FADD D0, D1, D0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
STR D0, [X23]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
LDR X2, [X2, #3944]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 4031c0 <@plt_start@+0x350>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 4235e0 <_Z13field_summaryR16global_variablesR9parallel_.omp_outlined+0x8b0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR D0, [X29, #416]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
LDR D1, [X28]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
HINT #0																					N/A
HINT #0																					N/A
LDUR D0, [X29, #408]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
LDR D1, [X27]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
LDUR D0, [X29, #400]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
LDR D1, [X25]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
LDUR D0, [X29, #392]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
LDR D1, [X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
LDUR D0, [X29, #384]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
LDR D1, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
ADD SP, SP, #384	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDP D9, D8, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
LDP D11, D10, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
LDP D13, D12, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
LDP X20, X19, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
LDP X22, X21, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X24, X23, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X26, X25, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X28, X27, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X29, X30, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP D15, D14, [SP], #160	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run armclang_3

Source file and lines	field_summary.cpp:75-91
Module	exec

The function is defined in:

/home/hbollore/qaas/qaas-runs/174-169-1878/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/field_summary.cpp:75-91
/home/hbollore/qaas/qaas-runs/174-169-1878/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:69

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

12% of VPU instructions are used in vector version (process two or more data elements in vector registers):

14% of VPU loads are used in vector version.
15% of VPU stores are used in vector version.
17% of VPU addition or subtraction instructions are used in vector version.
0% of VPU fused multiply-add instructions are used in vector version.
2% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 36.00 to 2.00 cycles (18.00x speedup).

Matching between your function (in the source code) and the binary function

The binary function is composed of 20 FP arithmetical operations:

20: addition or subtraction

The binary function is loading 660 bytes. The binary function is storing 532 bytes.

Arithmetic intensity

Arithmetic intensity is 0.02 FP operations per loaded or stored byte.

General properties

nb instructions	228
loop length	912
nb stack references	0

Front-end

FIT IN UOP CACHE

front end

26.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16
uops	6.50	6.50	11.25	11.25	11.17	11.17	11.08	11.08	11.25	11.25	11.25	11.25	36.00	36.00	36.00	15.50	15.50
cycles	6.50	6.50	11.25	11.25	11.17	11.17	11.08	11.08	11.25	11.25	11.25	11.25	36.00	36.00	36.00	15.50	15.50

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6: ALU
P7: ALU
P8 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P9 (128 bits): VPU, ALU, FP store data
P10 (128 bits): VPU, ALU, DIV/SQRT
P11 (128 bits): ALU, VPU
P12 (256 bits): store address, load
P13 (256 bits): store address, load
P14 (256 bits): load
P15 (64 bits): store data
P16 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	26.75
Overall L1	36.00

Vectorization ratios

INT

all	9%
load	14%
store	15%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	0%
other	0%

all	35%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	33%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	50%

INT+FP

all	12%
load	14%
store	15%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	17%
fma	0%
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	2%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 36.00 cycles. At this rate:

19% of peak load performance is reached (18.33 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
30% of peak store performance is reached (14.78 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

ASM code

In the binary file, the address of the function is: 422d30

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15	P16	Latency	Recip. throughput	Vectorization
STP D15, D14, [SP, #864]!	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
STP D13, D12, [SP, #16]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
STP D11, D10, [SP, #32]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
STP D9, D8, [SP, #48]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
STP X29, X30, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X28, X27, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X26, X25, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X24, X23, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X22, X21, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X20, X19, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ADD X29, SP, #64	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB SP, SP, #384	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR W9, [X4]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR W20, [X5]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR W8, [X2]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
SUB W9, W9, W20	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
LDR W19, [X3]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
SUB W8, W8, W19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
ADD W26, W9, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
MADD W8, W26, W8, W26	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
SUBS W22, W8, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.LT 4235e0 <_Z13field_summaryR16global_variablesR9parallel_.omp_outlined+0x8b0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR W1, [X0]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDP X27, X28, [X29, #112]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X24, X25, [X29, #96]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
ORR X23, XZR, X7	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR X21, XZR, X6	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W8, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
ADRP X0, <46dda0>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X0, X0, #1032	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB X3, X29, #88	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB X4, X29, #76	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB X5, X29, #80	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB X6, X29, #84	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP W22, WZR, [X29, #432]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
MOVZ W2, #34	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W7, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
STP WZR, W8, [X29, #424]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP XZR, XZR, [X29, #920]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP XZR, XZR, [X29, #904]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STUR XZR, [X29, #384]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR W8, [SP]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
STR W1, [SP, #76]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
BL 403300 <@plt_start@+0x490>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP W8, W5, [X29, #432]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP W8, W22	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
CSEL W8, W8, W22, #11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
CMP W5, W8	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.GT 42341c <_Z13field_summaryR16global_variablesR9parallel_.omp_outlined+0x6ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD W17, W20, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
ADD W18, W19, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
LDR X10, [X21, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X11, [X21, #168]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X12, [X21, #232]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
ADD W22, W8, #1	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
MOVI D1, #0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
SUB W8, W22, W5	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
LDR X13, [X21, #216]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X2, [X21, #672]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [X21, #656]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X4, [X21, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X19, [X21]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X20, [X21, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X0, [X21, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X1, [X21, #112]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDR X3, [X21, #96]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP W8, #4	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.CS 422e58 <_Z13field_summaryR16global_variablesR9parallel_.omp_outlined+0x128>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR W7, WZR, W5	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
MOVI D2, #0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
MOVI D4, #0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
MOVI D7, #0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
MOVI D0, #0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
B 423328 <_Z13field_summaryR16global_variablesR9parallel_.omp_outlined+0x5f8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STP X0, X2, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STP X6, X1, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
FMOV V0.2D, #0.1250000	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
MOVI V1.2D, #0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
MOVI V16.2D, #0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
MOVI V17.2D, #0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
MOVI V4.2D, #0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
MOVI V6.2D, #0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
MOVI V2.2D, #0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
MOVI V5.2D, #0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
MOVI V20.2D, #0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
MOVI V3.2D, #0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
ORR X0, XZR, X2	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDR X1, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
STP X28, X27, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
AND W27, W8, #1886	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP W8, W22, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD W7, W5, W27	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
SBFM X8, X17, #0, #31	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (100.0%)
STR Q0, [SP, #80]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
STP X25, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
MOVI V0.2D, #0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
STR X23, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X17, [SP, #24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X8, [SP, #104]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR W27, [SP, #12]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
STP X19, X4, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
ORR X4, XZR, X13	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP X10, X20, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STR X3, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X3, XZR, X6	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP X12, X11, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
STR X13, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X13, XZR, X12	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ORR X12, XZR, X11	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ORR X11, XZR, X10	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STP W26, W18, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
FADD V0.2D, V0.2D, V1.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FADD V7.2D, V17.2D, V16.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FADD V4.2D, V6.2D, V4.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FADD V2.2D, V5.2D, V2.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
LDP W9, W8, [SP, #12]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
LDP X24, X23, [SP, #56]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X27, X25, [SP, #40]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X17, X28, [SP, #24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
FADD V1.2D, V3.2D, V20.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (100.0%)
FADDP D0, V0.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (100.0%)
LDP X0, X2, [SP, #200]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X6, X1, [SP, #184]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X19, X4, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X10, X20, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
LDR W22, [SP, #20]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
FADDP D7, V7.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (100.0%)
FADDP D4, V4.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (100.0%)
FADDP D2, V2.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (100.0%)
FADDP D1, V1.2D	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (100.0%)
LDR X3, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDP X12, X11, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
LDR X13, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (50.0%)
STP D7, D0, [X29, #920]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
STP D2, D4, [X29, #904]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (100.0%)
STUR D1, [X29, #384]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
CMP W8, W9	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 42341c <_Z13field_summaryR16global_variablesR9parallel_.omp_outlined+0x6ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
FMOV D3, #0.1250000	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
LDR W19, [SP, #76]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADRP X0, <46d420>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X0, X0, #1056	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR W1, WZR, W19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
BL 403400 <@plt_start@+0x590>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB X8, X29, #96	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
SUB X9, X29, #104	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
ADRP X6, <46f438>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADRP X0, <46d43c>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X0, X0, #1080	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ADRP X5, <200422444>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X5, X5, #3264	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR W1, WZR, W19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
STP X8, X9, [X29, #856]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
SUB X8, X29, #112	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
SUB X9, X29, #120	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
SUB X4, X29, #168	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W2, #5	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOVZ W3, #40	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
STP X8, X9, [X29, #872]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (100.0%)
SUB X8, X29, #128	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (50.0%)
STUR X8, [X29, #376]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X6, [X6, #3944]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 403370 <@plt_start@+0x500>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP W0, #2	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4234f0 <_Z13field_summaryR16global_variablesR9parallel_.omp_outlined+0x7c0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP W0, #1	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4235e0 <_Z13field_summaryR16global_variablesR9parallel_.omp_outlined+0x8b0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D0, [X28]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
LDP D1, D2, [X29, #920]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
ADRP X2, <46f494>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADRP X0, <46d498>	1	0	0	0.25	0.25	0	0	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X0, X0, #1080	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
ORR W1, WZR, W19	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	scal (25.0%)
FADD D0, D2, D0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
STR D0, [X28]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
LDR D0, [X27]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FADD D0, D1, D0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
LDP D1, D2, [X29, #904]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
STR D0, [X27]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
LDR D0, [X25]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FADD D0, D2, D0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
STR D0, [X25]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
LDR D0, [X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FADD D0, D1, D0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
LDUR D1, [X29, #384]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
STR D0, [X24]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
LDR D0, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
FADD D0, D1, D0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (50.0%)
STR D0, [X23]	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (50.0%)
LDR X2, [X2, #3944]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
BL 4031c0 <@plt_start@+0x350>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 4235e0 <_Z13field_summaryR16global_variablesR9parallel_.omp_outlined+0x8b0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDUR D0, [X29, #416]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
LDR D1, [X28]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
HINT #0																					N/A
HINT #0																					N/A
LDUR D0, [X29, #408]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
LDR D1, [X27]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
LDUR D0, [X29, #400]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
LDR D1, [X25]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
LDUR D0, [X29, #392]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
LDR D1, [X24]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
LDUR D0, [X29, #384]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
LDR D1, [X23]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (50.0%)
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
ADD SP, SP, #384	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0	0	0	0	0	1	0.17	N/A
LDP D9, D8, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
LDP D11, D10, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
LDP D13, D12, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
LDP X20, X19, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	scal (100.0%)
LDP X22, X21, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X24, X23, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X26, X25, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X28, X27, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP X29, X30, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.50	N/A
LDP D15, D14, [SP], #160	1	0	0	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (100.0%)
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A
HINT #0																					N/A

Name	Coverage (%)	Time (s)
▼field_summary(global_variables&, parallel_&) [clone .omp_outlined]–	0.32	0.25
○Loop 237 - field_summary.cpp:76-91 - exec	0.32	0.25
○Loop 238 - field_summary.cpp:76-91 - exec	0.00	0.00
○Loop 234 - field_summary.cpp:75-75 - exec	0.00	0.00
○Loop 232 - field_summary.cpp:75-75 - exec	0.00	0.00
○Loop 233 - field_summary.cpp:75-75 - exec	0.00	0.00
○Loop 235 - field_summary.cpp:75-75 - exec	0.00	0.00
○Loop 236 - field_summary.cpp:75-75 - exec	0.00	0.00

Report Configuration

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Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

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Cycles summary

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Cycles and memory resources usage

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

Matching between your function (in the source code) and the binary function

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Cycles and memory resources usage

ASM code