| Loop Id: 307 | Module: exec | Source: advec_mom.cpp:221-221 | Coverage: 4.78% |
|---|
| Loop Id: 307 | Module: exec | Source: advec_mom.cpp:221-221 | Coverage: 4.78% |
|---|
0x41fd50 LDR Q31, [X8, X0] [4] |
0x41fd54 LDR Q1, [X1, X0] [5] |
0x41fd58 LDR Q0, [X7, X0] [3] |
0x41fd5c LDR Q30, [X6, X0] [2] |
0x41fd60 LDR Q29, [X5, X0] [1] |
0x41fd64 FMLA V0.2D, V31.2D, V1.2D |
0x41fd68 FSUB V30.2D, V0.2D, V30.2D |
0x41fd6c FDIV V29.2D, V30.2D, V29.2D |
0x41fd70 STR Q29, [X1, X0] [5] |
0x41fd74 ADD X0, X0, #16 |
0x41fd78 CMP X0, X3 |
0x41fd7c B.NE 41fd50 |
/home/hbollore/qaas/qaas-runs/174-169-1878/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_mom.cpp: 221 - 221 |
-------------------------------------------------------------------------------- |
221: vel1(i, j) = (vel1(i, j) * node_mass_pre(i, j) + mom_flux(i + 0, j - 1) - mom_flux(i, j)) / node_mass_post(i, j); |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ►98.95+ | gomp_thread_start | team.c:130 | libgomp.so.1.0.0 |
| ○ | start_thread | libc.so.6 | |
| ○ | thread_start | libc.so.6 |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 1.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.61 - 3.23 |
| Bottlenecks | P8, P10, |
| Function | advec_mom_kernel(int, int, int, int, clover::Buffer2D |
| Source | advec_mom.cpp:221-221 |
| Source loop unroll info | multi-versionned |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 3.50 - 6.99 |
| CQA cycles if no scalar integer | 3.50 - 6.99 |
| CQA cycles if FP arith vectorized | 3.50 - 6.99 |
| CQA cycles if fully vectorized | 3.50 - 6.99 |
| Front-end cycles | 1.50 |
| P0 cycles | 0.50 |
| P1 cycles | 0.50 |
| P2 cycles | 0.42 |
| P3 cycles | 0.42 |
| P4 cycles | 0.33 |
| P5 cycles | 0.33 |
| P6 cycles | 0.25 |
| P7 cycles | 0.25 |
| P8 cycles | 1.00 |
| P9 cycles | 1.00 |
| P10 cycles | 1.00 |
| P11 cycles | 1.00 |
| P12 cycles | 2.17 |
| P13 cycles | 1.83 |
| P14 cycles | 2.00 |
| P15 cycles | 0.00 |
| P16 cycles | 0.00 |
| DIV/SQRT cycles | 3.50 - 6.99 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 12.00 |
| Nb uops | 12.00 |
| Nb loads | NA |
| Nb stores | 1.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 2.29 - 1.14 |
| Nb FLOP add-sub | 2.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 2.00 |
| Nb FLOP div | 2.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 13.73 - 27.46 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 80.00 |
| Bytes stored | 16.00 |
| Stride 0 | 0.00 |
| Stride 1 | 5.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 100.00 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | 100.00 |
| Vectorization ratio fma | 100.00 |
| Vectorization ratio div_sqrt | 100.00 |
| Vectorization ratio other | NA |
| Vector-efficiency ratio all | 100.00 |
| Vector-efficiency ratio load | 100.00 |
| Vector-efficiency ratio store | 100.00 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | 100.00 |
| Vector-efficiency ratio fma | 100.00 |
| Vector-efficiency ratio div_sqrt | 100.00 |
| Vector-efficiency ratio other | NA |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 1.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.61 - 3.23 |
| Bottlenecks | P8, P10, |
| Function | advec_mom_kernel(int, int, int, int, clover::Buffer2D |
| Source | advec_mom.cpp:221-221 |
| Source loop unroll info | multi-versionned |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 3.50 - 6.99 |
| CQA cycles if no scalar integer | 3.50 - 6.99 |
| CQA cycles if FP arith vectorized | 3.50 - 6.99 |
| CQA cycles if fully vectorized | 3.50 - 6.99 |
| Front-end cycles | 1.50 |
| P0 cycles | 0.50 |
| P1 cycles | 0.50 |
| P2 cycles | 0.42 |
| P3 cycles | 0.42 |
| P4 cycles | 0.33 |
| P5 cycles | 0.33 |
| P6 cycles | 0.25 |
| P7 cycles | 0.25 |
| P8 cycles | 1.00 |
| P9 cycles | 1.00 |
| P10 cycles | 1.00 |
| P11 cycles | 1.00 |
| P12 cycles | 2.17 |
| P13 cycles | 1.83 |
| P14 cycles | 2.00 |
| P15 cycles | 0.00 |
| P16 cycles | 0.00 |
| DIV/SQRT cycles | 3.50 - 6.99 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 12.00 |
| Nb uops | 12.00 |
| Nb loads | NA |
| Nb stores | 1.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 2.29 - 1.14 |
| Nb FLOP add-sub | 2.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 2.00 |
| Nb FLOP div | 2.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 13.73 - 27.46 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 80.00 |
| Bytes stored | 16.00 |
| Stride 0 | 0.00 |
| Stride 1 | 5.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 100.00 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | 100.00 |
| Vectorization ratio fma | 100.00 |
| Vectorization ratio div_sqrt | 100.00 |
| Vectorization ratio other | NA |
| Vector-efficiency ratio all | 100.00 |
| Vector-efficiency ratio load | 100.00 |
| Vector-efficiency ratio store | 100.00 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | 100.00 |
| Vector-efficiency ratio fma | 100.00 |
| Vector-efficiency ratio div_sqrt | 100.00 |
| Vector-efficiency ratio other | NA |
| Path / |
| nb instructions | 12 |
| loop length | 48 |
| nb stack references | 0 |
| front end | 1.50 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | P16 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 0.50 | 0.50 | 0.42 | 0.42 | 0.33 | 0.33 | 0.25 | 0.25 | 1.00 | 1.00 | 1.00 | 1.00 | 2.17 | 1.83 | 2.00 | 0.00 | 0.00 |
| cycles | 0.50 | 0.50 | 0.42 | 0.42 | 0.33 | 0.33 | 0.25 | 0.25 | 1.00 | 1.00 | 1.00 | 1.00 | 2.17 | 1.83 | 2.00 | 0.00 | 0.00 |
| Cycles executing div or sqrt instructions | 3.50-6.99 |
| Longest recurrence chain latency (RecMII) | 1.00 |
| Front-end | 1.50 |
| Data deps. | 1.00 |
| Overall L1 | 3.50-6.99 |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 100% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | NA (no other vectorizable/vectorized instructions) |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | P16 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| LDR Q31, [X8, X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 | vect (100.0%) |
| LDR Q1, [X1, X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 | vect (100.0%) |
| LDR Q0, [X7, X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 | vect (100.0%) |
| LDR Q30, [X6, X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 | vect (100.0%) |
| LDR Q29, [X5, X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 | vect (100.0%) |
| FMLA V0.2D, V31.2D, V1.2D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 4 | 0.25 | vect (100.0%) |
| FSUB V30.2D, V0.2D, V30.2D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 | vect (100.0%) |
| FDIV V29.2D, V30.2D, V29.2D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 7-15 | 3.50-6.99 | vect (100.0%) |
| STR Q29, [X1, X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| ADD X0, X0, #16 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| CMP X0, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
| B.NE 41fd50 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii._omp_fn.11+0x140> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| nb instructions | 12 |
| loop length | 48 |
| nb stack references | 0 |
| front end | 1.50 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | P16 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 0.50 | 0.50 | 0.42 | 0.42 | 0.33 | 0.33 | 0.25 | 0.25 | 1.00 | 1.00 | 1.00 | 1.00 | 2.17 | 1.83 | 2.00 | 0.00 | 0.00 |
| cycles | 0.50 | 0.50 | 0.42 | 0.42 | 0.33 | 0.33 | 0.25 | 0.25 | 1.00 | 1.00 | 1.00 | 1.00 | 2.17 | 1.83 | 2.00 | 0.00 | 0.00 |
| Cycles executing div or sqrt instructions | 3.50-6.99 |
| Longest recurrence chain latency (RecMII) | 1.00 |
| Front-end | 1.50 |
| Data deps. | 1.00 |
| Overall L1 | 3.50-6.99 |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 100% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | NA (no other vectorizable/vectorized instructions) |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | P15 | P16 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| LDR Q31, [X8, X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 | vect (100.0%) |
| LDR Q1, [X1, X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 | vect (100.0%) |
| LDR Q0, [X7, X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 | vect (100.0%) |
| LDR Q30, [X6, X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 | vect (100.0%) |
| LDR Q29, [X5, X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 | vect (100.0%) |
| FMLA V0.2D, V31.2D, V1.2D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 4 | 0.25 | vect (100.0%) |
| FSUB V30.2D, V0.2D, V30.2D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 | vect (100.0%) |
| FDIV V29.2D, V30.2D, V29.2D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 7-15 | 3.50-6.99 | vect (100.0%) |
| STR Q29, [X1, X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| ADD X0, X0, #16 | 1 | 0 | 0 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0.17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| CMP X0, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
| B.NE 41fd50 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii._omp_fn.11+0x140> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |