	*************************************************
	*                                               *
	*          ONE-View report generation           *
	*                                               *
	*************************************************

[MAQAO] Info: Experiment configuration summary is available adding -dbg=1 in command line

* [MAQAO] Warning: Experiment directory /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/run/oneview_runs/compilers/armclang_1/oneview_results_1782203850 already exists and is reused.
           It can be replaced using --replace in the command line.
[MAQAO] Info: 
[MAQAO] Info: START THE APPLICATION PROFILING
[MAQAO] Info: -> RUNNING THE PROFILER...
[MAQAO] Info:   LPROF has already been run
[MAQAO] Info: STOP THE APPLICATION PROFILING
[MAQAO] Info: 
[MAQAO] Info: START FUNCTIONS AND LOOPS ANALYSIS ...
[MAQAO] Info: STOP FUNCTIONS AND LOOPS ANALYSIS ...
[MAQAO] Info: 
[MAQAO] Info: START THE REPORT GENERATION
[MAQAO] Info: -> ONE-VIEW EXPERIMENT DIRECTORY: /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/run/oneview_runs/compilers/armclang_1/oneview_results_1782203850


+===================================================================================================================+
+                                                   1  -  GLOBAL                                                    +
+===================================================================================================================+


+-------------------------------------------------------------------------------------------------------------------+
+                                            1.1  -  Experiment Summary                                             +
+-------------------------------------------------------------------------------------------------------------------+

  Application:			/home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/run/binaries/armclang_1/exec
  Timestamp:			2026-06-23 08:37:30
  Universal Timestamp:		1782203850
  Experiment Type:		MPI; OpenMP; Throughput; 
  Machine:			ip-172-31-38-240.ec2.internal
  Architecture:			aarch64
  Micro Architecture:		ARM_NEOVERSE_V1
  OS Version:			Linux 6.1.170-213.321.amzn2023.aarch64 #1 SMP Thu May 14 12:18:13 UTC 2026
  Compilation Options:		
		exec: Arm Toolchain for Linux 22.1.0 clang version 22.1.0 (https://github.com/arm/arm-toolchain.git c95792353373404441df364b5a762338e5642230) /opt/arm/arm-toolchain-for-linux/bin/clang-22 -frtlib-add-rpath -fveclib=ArmPL -mllvm -gvn-add-phi-translation=1 -mllvm -store-to-load-forwarding-conflict-detection=0 --driver-mode=g++ -D USE_OMP -I /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/omp -I /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/build/armclang_1/generated -I /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/driver -I /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp -O3 -O3 -mcpu=neoverse-v1 -I /opt/arm/arm-performance-libraries/lib/pkgconfig/../../include -L/opt/arm/arm-performance-libraries/lib/pkgconfig/../../lib -larmpl -lastring -lamath -lm -ffast-math -g -fno-omit-frame-pointer -fcf-protection=none -no-pie -grecord-command-line -D NDEBUG -std=c++17 -Wall -Wno-unused-parameter -Wno-unused-function -Wno-unused-variable -O3 -fopenmp=libomp -MD -MT CMakeFiles/cloverleaf.dir/src/omp/advec_mom.cpp.o -MF CMakeFiles/cloverleaf.dir/src/omp/advec_mom.cpp.o.d -o CMakeFiles/cloverleaf.dir/src/omp/advec_mom.cpp.o -c /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_mom.cpp -I /home/eoseret/tools/mpi/openmpi-armclang-22.1/include 
  Number of processes observed:	1
  Number of threads observed:	64
  MAQAO version:		2026.0.0
  MAQAO build:			Build information not available




+-------------------------------------------------------------------------------------------------------------------+
+                                              1.2  -  Global Metrics                                               +
+-------------------------------------------------------------------------------------------------------------------+

  Total Time:				139.60 s
  Max (Thread Active Time):		139.25 s
  Average Active Time:			136.00 s
  Activity Ratio:			97.4 %
  Average number of active threads:	62.346
  Affinity Stability:			97.6 %
  Time spent in analyzed loops:		96.1 %
  Time spent in analyzed innermost loops: 96.1 %
  Time spent in user code:		96.2 %
  Compilation Options Score:		100
  Array Access Efficiency:		37.2 %

   Potential Speedups
  ----------------------------------------------------
  Perfect Flow Complexity:		1.00
  Perfect OpenMP/MPI/Pthread/TBB:	1.02
  Perfect OpenMP/MPI/Pthread/TBB + Load Distribution:	1.05
  If No Scalar Integer:
      Potential Speedup:		1.00
      Nb Loops to get 80%:		1
  If FP Vectorized:
      Potential Speedup:		1.00
      Nb Loops to get 80%:		1
  If Fully Vectorized:
      Potential Speedup:		1.06
      Nb Loops to get 80%:		4
  If Only FP Arithmetic:
      Potential Speedup:		2.22
      Nb Loops to get 80%:		23




+-------------------------------------------------------------------------------------------------------------------+
+                                            1.3  -  Potential Speedups                                             +
+-------------------------------------------------------------------------------------------------------------------+

  If No Scalar Integer:
      Number of loops   | 1      | 9      | 18     | 26     | 36     | 
      Cumulated Speedup | 1.0000 | 1.0000 | 1.0000 | 1.0000 | 1.0000 | 
  Top 5 loops:
    exec - 254:	1
    exec - 258:	1
    exec - 148:	1
    exec - 152:	1
    exec - 261:	1

  If FP Vectorized:
      Number of loops   | 1      | 9      | 18     | 26     | 36     | 
      Cumulated Speedup | 1.0000 | 1.0000 | 1.0000 | 1.0000 | 1.0000 | 
  Top 5 loops:
    exec - 254:	1
    exec - 258:	1
    exec - 148:	1
    exec - 152:	1
    exec - 261:	1

  If Fully Vectorized:
      Number of loops   | 1      | 9      | 18     | 26     | 36     | 
      Cumulated Speedup | 1.0217 | 1.0615 | 1.0615 | 1.0615 | 1.0615 | 
  Top 5 loops:
    exec - 146:	1.0217
    exec - 254:	1.0351
    exec - 201:	1.0477
    exec - 165:	1.0545
    exec - 161:	1.0605

  If Only FP Arithmetic:
      Number of loops   | 1      | 9      | 18     | 26     | 36     | 
      Cumulated Speedup | 1.0499 | 1.3773 | 1.7814 | 2.1034 | 2.2248 | 
  Top 5 loops:
    exec - 146:	1.0499
    exec - 254:	1.0958
    exec - 201:	1.1409
    exec - 167:	1.1777
    exec - 163:	1.2149



+===================================================================================================================+
+                                                   2  -  SUMMARY                                                   +
+===================================================================================================================+


+-------------------------------------------------------------------------------------------------------------------+
+                                            2.1  -  EXPERIMENT QUALITY                                             +
+-------------------------------------------------------------------------------------------------------------------+

  [4 / 4] Application profile is long enough (139.25 s)
To have good quality measurements, it is advised that the application profiling time is greater than 10 seconds.

  [3 / 3] Most of time spent in analyzed modules comes from functions with source/debug info
-g option gives access to debugging informations, such are source locations.

  [2.999783023472 / 3] Architecture specific option -mcpu is used


  [3 / 3] Most of time spent in analyzed modules comes from functions with compilation options informations and
-fno-omit-frame-pointer is present
-fno-omit-frame-pointer improves the accuracy of callchains found during the application profiling.

  [3 / 3] Optimization level option is correctly used


  [3 / 3] Host configuration allows retrieval of all necessary metrics.


  [2 / 2] Application is correctly profiled ("Others" category represents 0.00 % of the execution time)
To have a representative profiling, it is advised that the category "Others" represents less than 20% of the
execution time in order to analyze as much as possible of the user code

  [1 / 1] Lstopo present. The Topology lstopo report will be generated.



+-------------------------------------------------------------------------------------------------------------------+
+                                               2.2  -  CODE QUALITY                                                +
+-------------------------------------------------------------------------------------------------------------------+

  [4 / 4] Enough time of the experiment time spent in analyzed loops (96.11%)
If the time spent in analyzed loops is less than 30%, standard loop optimizations will have a limited impact on
application performances.

  [4 / 4] Threads activity is good
On average, more than 97.42% of observed threads are actually active 

  [4 / 4] CPU activity is good
CPU cores are active 97.45% of time

  [4 / 4] Loop profile is not flat
At least one loop coverage is greater than 4% (7.82%), representing an hotspot for the application

  [4 / 4] Enough time of the experiment time spent in analyzed innermost loops (96.11%)
If the time spent in analyzed innermost loops is less than 15%, standard innermost loop optimizations such as
vectorisation will have a limited impact on application performances.

  [4 / 4] Affinity is good (97.57%)
Threads are not migrating to CPU cores: probably successfully pinned

  [3 / 3] Less than 10% (0.00%) is spend in BLAS1 operations
It could be more efficient to inline by hand BLAS1 operations

  [3 / 3] Functions mostly use all threads
Functions running on a reduced number of threads (typically sequential code) cover less than 10% of application
walltime (3.76%)

  [3 / 3] Cumulative Outermost/In between loops coverage (0.00%) lower than cumulative innermost loop coverage (96.11%)
Having cumulative Outermost/In between loops coverage greater than cumulative innermost loop coverage will make loop
optimization more complex

  [2 / 2] Less than 10% (0.00%) is spend in BLAS2 operations
BLAS2 calls usually could make a poor cache usage and could benefit from inlining.

  [2 / 2] Less than 10% (0.00%) is spend in Libm/SVML (special functions)



+-------------------------------------------------------------------------------------------------------------------+
+                                              2.3  -  LOOPS OVERVIEW                                               +
+-------------------------------------------------------------------------------------------------------------------+

  Top 5 loops:
   + exec - 254 :
     analysis: Execution Time: 7 % - Vectorization Ratio: 58.90 % - Vector Length Use: 75.48 %
     Loop Computation Issues: 8
        [8] [SA] Presence of expensive FP instructions - Perform hoisting, change algorithm, use SVML or proper
            numerical library or perform value profiling (count the number of distinct input values). There are 2
            issues (= instructions) costing 4 points each.
     Data Access Issues: 144
        [92] [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange
            or use gather instructions to lower a bit the cost. There are 46 issues ( = data accesses) costing 2
            point each.
        [52] [SA] Presence of indirect accesses - Use array restructuring or gather instructions to lower the cost.
            There are 13 issues ( = indirect data accesses) costing 4 point each.
     Vectorization Roadblocks: 144
        [92] [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange
            or use gather instructions to lower a bit the cost. There are 46 issues ( = data accesses) costing 2
            point each.
        [52] [SA] Presence of indirect accesses - Use array restructuring or gather instructions to lower the cost.
            There are 13 issues ( = indirect data accesses) costing 4 point each.

   + exec - 146 :
     analysis: Execution Time: 7 % - Vectorization Ratio: 65.63 % - Vector Length Use: 79.57 %
     Loop Computation Issues: 4
        [4] [SA] Presence of expensive FP instructions - Perform hoisting, change algorithm, use SVML or proper
            numerical library or perform value profiling (count the number of distinct input values). There are 1
            issues (= instructions) costing 4 points each.
     Data Access Issues: 120
        [80] [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange
            or use gather instructions to lower a bit the cost. There are 40 issues ( = data accesses) costing 2
            point each.
        [40] [SA] Presence of indirect accesses - Use array restructuring or gather instructions to lower the cost.
            There are 10 issues ( = indirect data accesses) costing 4 point each.
     Vectorization Roadblocks: 120
        [80] [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange
            or use gather instructions to lower a bit the cost. There are 40 issues ( = data accesses) costing 2
            point each.
        [40] [SA] Presence of indirect accesses - Use array restructuring or gather instructions to lower the cost.
            There are 10 issues ( = indirect data accesses) costing 4 point each.

   + exec - 253 :
     analysis: Execution Time: 6 % - Vectorization Ratio: 61.34 % - Vector Length Use: 75.87 %
     Loop Computation Issues: 8
        [8] [SA] Presence of expensive FP instructions - Perform hoisting, change algorithm, use SVML or proper
            numerical library or perform value profiling (count the number of distinct input values). There are 2
            issues (= instructions) costing 4 points each.
     Data Access Issues: 112
        [68] [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange
            or use gather instructions to lower a bit the cost. There are 34 issues ( = data accesses) costing 2
            point each.
        [44] [SA] Presence of indirect accesses - Use array restructuring or gather instructions to lower the cost.
            There are 11 issues ( = indirect data accesses) costing 4 point each.
     Vectorization Roadblocks: 112
        [68] [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange
            or use gather instructions to lower a bit the cost. There are 34 issues ( = data accesses) costing 2
            point each.
        [44] [SA] Presence of indirect accesses - Use array restructuring or gather instructions to lower the cost.
            There are 11 issues ( = indirect data accesses) costing 4 point each.

   + exec - 167 :
     analysis: Execution Time: 4 % - Vectorization Ratio: 63.89 % - Vector Length Use: 81.25 %
     Loop Computation Issues: 4
        [4] [SA] Presence of expensive FP instructions - Perform hoisting, change algorithm, use SVML or proper
            numerical library or perform value profiling (count the number of distinct input values). There are 1
            issues (= instructions) costing 4 points each.
     Data Access Issues: 34
        [18] [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange
            or use gather instructions to lower a bit the cost. There are 9 issues ( = data accesses) costing 2
            point each.
        [16] [SA] Presence of indirect accesses - Use array restructuring or gather instructions to lower the cost.
            There are 4 issues ( = indirect data accesses) costing 4 point each.
     Vectorization Roadblocks: 34
        [18] [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange
            or use gather instructions to lower a bit the cost. There are 9 issues ( = data accesses) costing 2
            point each.
        [16] [SA] Presence of indirect accesses - Use array restructuring or gather instructions to lower the cost.
            There are 4 issues ( = indirect data accesses) costing 4 point each.

   + exec - 163 :
     analysis: Execution Time: 4 % - Vectorization Ratio: 61.76 % - Vector Length Use: 77.94 %
     Loop Computation Issues: 4
        [4] [SA] Presence of expensive FP instructions - Perform hoisting, change algorithm, use SVML or proper
            numerical library or perform value profiling (count the number of distinct input values). There are 1
            issues (= instructions) costing 4 points each.
     Data Access Issues: 36
        [20] [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange
            or use gather instructions to lower a bit the cost. There are 10 issues ( = data accesses) costing 2
            point each.
        [16] [SA] Presence of indirect accesses - Use array restructuring or gather instructions to lower the cost.
            There are 4 issues ( = indirect data accesses) costing 4 point each.
     Vectorization Roadblocks: 36
        [20] [SA] Presence of constant non unit stride data access - Use array restructuring, perform loop interchange
            or use gather instructions to lower a bit the cost. There are 10 issues ( = data accesses) costing 2
            point each.
        [16] [SA] Presence of indirect accesses - Use array restructuring or gather instructions to lower the cost.
            There are 4 issues ( = indirect data accesses) costing 4 point each.



+===================================================================================================================+
+                                                 3  -  APPLICATION                                                 +
+===================================================================================================================+


+-------------------------------------------------------------------------------------------------------------------+
+                                              3.1  -  Categorization                                               +
+-------------------------------------------------------------------------------------------------------------------+

   Category | IO     | Exe    | Others  | TBB   | String | Pthread | MPI   | OMP   | System | Memory | Math  |
  ----------+--------+--------+---------+-------+--------+---------+-------+-------+--------+--------+-------+
   Time (%) | 0.00   | 96.15  | 0.00    | 0.00  | 0.00   | 0.00    | 0.00  | 2.26  | 1.58   | 0.00   | 0.00  |




+-------------------------------------------------------------------------------------------------------------------+
+                                         3.2  -  Function Based Profiling                                          +
+-------------------------------------------------------------------------------------------------------------------+

   Buckets                   | Nb Functions              | Coverage                  | Cumulated Coverage        |
  ---------------------------+---------------------------+---------------------------+---------------------------+
   > 8%                      | 0                         | 0.00                      | 0.00                      |
   4% to 8%                  | 8                         | 42.93                     | 42.93                     |
   2% to 4%                  | 14                        | 42.07                     | 85.00                     |
   1% to 2%                  | 9                         | 12.20                     | 97.19                     |
   0.5% to 1%                | 1                         | 0.85                      | 98.04                     |
   0.25% to 0.5%             | 2                         | 0.67                      | 98.71                     |
   0.125% to 0.25%           | 4                         | 0.82                      | 99.53                     |
   < 0.125%                  | 69                        | 0.34                      | 99.87                     |




+-------------------------------------------------------------------------------------------------------------------+
+                                           3.3  -  Loop Based Profiling                                            +
+-------------------------------------------------------------------------------------------------------------------+

   Buckets                   | Nb Loops                  | Coverage                  | Cumulated Coverage        |
  ---------------------------+---------------------------+---------------------------+---------------------------+
   > 8%                      | 0                         | 0.00                      | 0.00                      |
   4% to 8%                  | 8                         | 42.93                     | 42.93                     |
   2% to 4%                  | 14                        | 42.07                     | 85.00                     |
   1% to 2%                  | 8                         | 10.64                     | 95.63                     |
   0.5% to 1%                | 0                         | 0.00                      | 95.63                     |
   0.25% to 0.5%             | 1                         | 0.33                      | 95.97                     |
   0.125% to 0.25%           | 0                         | 0.00                      | 95.97                     |
   < 0.125%                  | 12                        | 0.14                      | 96.11                     |


+===================================================================================================================+
+                                                  4  -  FUNCTIONS                                                  +
+===================================================================================================================+


+-------------------------------------------------------------------------------------------------------------------+
+                                             4.1  -  Top 10 Functions                                              +
+-------------------------------------------------------------------------------------------------------------------+

   Function                                               | Module               | Coverage (%)  | Time (s)      |
  --------------------------------------------------------+----------------------+---------------+---------------+
   PdV_kernel(bool, int, int, int, int, double, clover... | exec                 | 7.82          | 10.63         |
   accelerate_kernel(int, int, int, int, double, clove... | exec                 | 7.14          | 9.70          |
   PdV_kernel(bool, int, int, int, int, double, clover... | exec                 | 6.07          | 8.25          |
   advec_mom_kernel(int, int, int, int, clover::Buffer... | exec                 | 4.66          | 6.34          |
   advec_mom_kernel(int, int, int, int, clover::Buffer... | exec                 | 4.44          | 6.03          |
   flux_calc_kernel(int, int, int, int, double, clover... | exec                 | 4.34          | 5.91          |
   calc_dt_kernel(int, int, int, int, double, double, ... | exec                 | 4.33          | 5.88          |
   ideal_gas_kernel(int, int, int, int, clover::Buffer... | exec                 | 4.14          | 5.63          |
   advec_cell_kernel(int, int, int, int, int, int, clo... | exec                 | 4.00          | 5.44          |
   advec_mom_kernel(int, int, int, int, clover::Buffer... | exec                 | 3.87          | 5.26          |


+===================================================================================================================+
+                                                    5  -  LOOPS                                                    +
+===================================================================================================================+


+-------------------------------------------------------------------------------------------------------------------+
+                                               5.1  -  Top 10 Loops                                                +
+-------------------------------------------------------------------------------------------------------------------+

   Loop Id        | Module               | Source Location                                       | Coverage (%)  |
  ----------------+----------------------+-------------------------------------------------------+---------------+
   254            | exec                 | PdV.cpp:70-83,context.h:69-69                         | 7.82          |
   146            | exec                 | context.h:69-69,accelerate.cpp:41-53                  | 7.14          |
   253            | exec                 | PdV.cpp:49-63,context.h:69-69                         | 6.07          |
   167            | exec                 | context.h:69-69,advec_mom.cpp:219-221                 | 4.66          |
   163            | exec                 | context.h:69-69,advec_mom.cpp:147-149                 | 4.44          |
   201            | exec                 | flux_calc.cpp:37-40,context.h:69-69                   | 4.34          |
   183            | exec                 | calc_dt.cpp:50-75,context.h:69-69                     | 4.33          |
   209            | exec                 | ideal_gas.cpp:38-45,context.h:69-69                   | 4.14          |
   155            | exec                 | advec_cell.cpp:209-216,context.h:69-69                | 4.00          |
   166            | exec                 | context.h:69-69,advec_mom.cpp:181-211                 | 3.87          |





+===================================================================================================================+
+                                                     6  -  CQA                                                     +
+===================================================================================================================+


+-------------------------------------------------------------------------------------------------------------------+
+                                                   6.1  -  Loops                                                   +
+-------------------------------------------------------------------------------------------------------------------+





      6.1.1  -  Loop 254 from exec
  =========================================================================================================

The loop is defined in:
 - /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/PdV.cpp:70-83
 - /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:69


The related source loop is not unrolled or unrolled with no peel/tail loop.

      6.1.1.1  -  Path 1
  ---------------------------------------------------------------------------------------------------------

6% of peak computational performance is used (1.97 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.1.1.1  -  Vectorization
  ---------------------------------------------------------------------------------------------------------

Your loop is partially vectorized.
Only 75% of vector register length is used (average across all VPU instructions).
By fully vectorizing your loop, you can lower the cost of an iteration from 57.50 to 48.17 cycles (1.19x speedup).

Details
58% of VPU instructions are used in vector version (process two or more data elements in vector registers):
 - 45% of VPU loads are used in vector version.
 - 32% of VPU addition or subtraction instructions are used in vector version.
 - 96% of VPU multiply instructions are used in vector version.
 - 16% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.
Since your execution units are vector units, only a fully vectorized loop can use their full power.


Workaround
 - Try another compiler or update/tune your current one
 - Remove inter-iterations dependences from your loop and make it unit-stride:
  * If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly:
C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)<<image_row_maj>>
  * If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA):
for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)





      6.1.1.1.2  -  FMA
  ---------------------------------------------------------------------------------------------------------

Detected 8 FMA (fused multiply-add) operations.
Presence of both ADD/SUB and MUL operations.

Workaround
Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible.
For instance a + b*c is a valid FMA (MUL then ADD).
However (a+b)* c cannot be translated into an FMA (ADD then MUL).




      6.1.1.1.3  -  Slow data structures access
  ---------------------------------------------------------------------------------------------------------

Detected data structures (typically arrays) that cannot be efficiently read/written

Details
 - Constant unknown stride: 46 occurrence(s)
 - Irregular (variable stride) or indirect: 13 occurrence(s)
Non-unit stride (uncontiguous) accesses are not efficiently using data caches


Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)
 - Try to remove indirect accesses. If applicable, precompute elements out of the innermost loop.



      6.1.1.1.4  -  Matching between your loop (in the source code) and the binary loop
  ---------------------------------------------------------------------------------------------------------

The binary loop is composed of 113 FP arithmetical operations:
 - 72: addition or subtraction (8 inside FMA instructions)
 - 33: multiply (8 inside FMA instructions)
 - 8: divide
The binary loop is loading 1253 bytes.
The binary loop is storing 64 bytes.


      6.1.1.1.5  -  Arithmetic intensity
  ---------------------------------------------------------------------------------------------------------

Arithmetic intensity is 0.09 FP operations per loaded or stored byte.







      6.1.2  -  Loop 146 from exec
  =========================================================================================================

The loop is defined in:
 - /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:69
 - /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/accelerate.cpp:41-53


The related source loop is not unrolled or unrolled with no peel/tail loop.

      6.1.2.1  -  Path 1
  ---------------------------------------------------------------------------------------------------------

8% of peak computational performance is used (2.82 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.2.1.1  -  Vectorization
  ---------------------------------------------------------------------------------------------------------

Your loop is partially vectorized.
Only 79% of vector register length is used (average across all VPU instructions).
By fully vectorizing your loop, you can lower the cost of an iteration from 52.50 to 36.91 cycles (1.42x speedup).

Details
65% of VPU instructions are used in vector version (process two or more data elements in vector registers):
 - 55% of VPU loads are used in vector version.
 - 25% of VPU addition or subtraction instructions are used in vector version.
 - 22% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.
Since your execution units are vector units, only a fully vectorized loop can use their full power.


Workaround
 - Try another compiler or update/tune your current one
 - Remove inter-iterations dependences from your loop and make it unit-stride:
  * If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly:
C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)<<image_row_maj>>
  * If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA):
for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)





      6.1.2.1.2  -  FMA
  ---------------------------------------------------------------------------------------------------------

Detected 44 FMA (fused multiply-add) operations.
Presence of both ADD/SUB and MUL operations.

Workaround
Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible.
For instance a + b*c is a valid FMA (MUL then ADD).
However (a+b)* c cannot be translated into an FMA (ADD then MUL).




      6.1.2.1.3  -  Slow data structures access
  ---------------------------------------------------------------------------------------------------------

Detected data structures (typically arrays) that cannot be efficiently read/written

Details
 - Constant unknown stride: 40 occurrence(s)
 - Irregular (variable stride) or indirect: 10 occurrence(s)
Non-unit stride (uncontiguous) accesses are not efficiently using data caches


Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)
 - Try to remove indirect accesses. If applicable, precompute elements out of the innermost loop.



      6.1.2.1.4  -  Matching between your loop (in the source code) and the binary loop
  ---------------------------------------------------------------------------------------------------------

The binary loop is composed of 148 FP arithmetical operations:
 - 76: addition or subtraction (44 inside FMA instructions)
 - 68: multiply (44 inside FMA instructions)
 - 4: divide
The binary loop is loading 1572 bytes.
The binary loop is storing 128 bytes.


      6.1.2.1.5  -  Arithmetic intensity
  ---------------------------------------------------------------------------------------------------------

Arithmetic intensity is 0.09 FP operations per loaded or stored byte.







      6.1.3  -  Loop 253 from exec
  =========================================================================================================

The loop is defined in:
 - /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/PdV.cpp:49-63
 - /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:69


The related source loop is not unrolled or unrolled with no peel/tail loop.

      6.1.3.1  -  Path 1
  ---------------------------------------------------------------------------------------------------------

5% of peak computational performance is used (1.68 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.3.1.1  -  Vectorization
  ---------------------------------------------------------------------------------------------------------

Your loop is partially vectorized.
Only 75% of vector register length is used (average across all VPU instructions).


Details
61% of VPU instructions are used in vector version (process two or more data elements in vector registers):
 - 46% of VPU loads are used in vector version.
 - 27% of VPU addition or subtraction instructions are used in vector version.
 - 95% of VPU multiply instructions are used in vector version.
 - 28% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.





      6.1.3.1.2  -  Expensive FP math instructions/calls
  ---------------------------------------------------------------------------------------------------------

Detected performance impact from expensive FP math instructions/calls.
By removing/reexpressing them, you can lower the cost of an iteration from 48.17 to 40.50 cycles (1.19x speedup).


      6.1.3.1.3  -  FMA
  ---------------------------------------------------------------------------------------------------------

Detected 12 FMA (fused multiply-add) operations.
Presence of both ADD/SUB and MUL operations.

Workaround
Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible.
For instance a + b*c is a valid FMA (MUL then ADD).
However (a+b)* c cannot be translated into an FMA (ADD then MUL).




      6.1.3.1.4  -  Slow data structures access
  ---------------------------------------------------------------------------------------------------------

Detected data structures (typically arrays) that cannot be efficiently read/written

Details
 - Constant unknown stride: 34 occurrence(s)
 - Irregular (variable stride) or indirect: 11 occurrence(s)
Non-unit stride (uncontiguous) accesses are not efficiently using data caches


Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)
 - Try to remove indirect accesses. If applicable, precompute elements out of the innermost loop.



      6.1.3.1.5  -  Matching between your loop (in the source code) and the binary loop
  ---------------------------------------------------------------------------------------------------------

The binary loop is composed of 81 FP arithmetical operations:
 - 40: addition or subtraction (12 inside FMA instructions)
 - 33: multiply (12 inside FMA instructions)
 - 8: divide
The binary loop is loading 932 bytes.
The binary loop is storing 64 bytes.


      6.1.3.1.6  -  Arithmetic intensity
  ---------------------------------------------------------------------------------------------------------

Arithmetic intensity is 0.08 FP operations per loaded or stored byte.







      6.1.4  -  Loop 167 from exec
  =========================================================================================================

The loop is defined in:
 - /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:69
 - /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_mom.cpp:219-221


The related source loop is not unrolled or unrolled with no peel/tail loop.

      6.1.4.1  -  Path 1
  ---------------------------------------------------------------------------------------------------------

1% of peak computational performance is used (0.47 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.4.1.1  -  Vectorization
  ---------------------------------------------------------------------------------------------------------

Your loop is partially vectorized.
81% of vector register length is used (average across all VPU instructions).


Details
63% of VPU instructions are used in vector version (process two or more data elements in vector registers):
 - 35% of VPU loads are used in vector version.
 - 40% of VPU addition or subtraction instructions are used in vector version.
 - 42% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.





      6.1.4.1.2  -  Expensive FP math instructions/calls
  ---------------------------------------------------------------------------------------------------------

Detected performance impact from expensive FP math instructions/calls.
By removing/reexpressing them, you can lower the cost of an iteration from 34.08 to 14.00 cycles (2.43x speedup).


      6.1.4.1.3  -  FMA
  ---------------------------------------------------------------------------------------------------------

Detected 4 FMA (fused multiply-add) operations.




      6.1.4.1.4  -  Slow data structures access
  ---------------------------------------------------------------------------------------------------------

Detected data structures (typically arrays) that cannot be efficiently read/written

Details
 - Constant unknown stride: 9 occurrence(s)
 - Irregular (variable stride) or indirect: 4 occurrence(s)
Non-unit stride (uncontiguous) accesses are not efficiently using data caches


Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)
 - Try to remove indirect accesses. If applicable, precompute elements out of the innermost loop.



      6.1.4.1.5  -  Matching between your loop (in the source code) and the binary loop
  ---------------------------------------------------------------------------------------------------------

The binary loop is composed of 16 FP arithmetical operations:
 - 8: addition or subtraction (4 inside FMA instructions)
 - 4: multiply (all inside FMA instructions)
 - 4: divide
The binary loop is loading 161 bytes.
The binary loop is storing 32 bytes.


      6.1.4.1.6  -  Arithmetic intensity
  ---------------------------------------------------------------------------------------------------------

Arithmetic intensity is 0.08 FP operations per loaded or stored byte.







      6.1.5  -  Loop 163 from exec
  =========================================================================================================

The loop is defined in:
 - /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:69
 - /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_mom.cpp:147-149


The related source loop is not unrolled or unrolled with no peel/tail loop.

      6.1.5.1  -  Path 1
  ---------------------------------------------------------------------------------------------------------

1% of peak computational performance is used (0.47 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.5.1.1  -  Vectorization
  ---------------------------------------------------------------------------------------------------------

Your loop is partially vectorized.
Only 77% of vector register length is used (average across all VPU instructions).


Details
61% of VPU instructions are used in vector version (process two or more data elements in vector registers):
 - 33% of VPU loads are used in vector version.
 - 33% of VPU addition or subtraction instructions are used in vector version.
 - 40% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.





      6.1.5.1.2  -  Expensive FP math instructions/calls
  ---------------------------------------------------------------------------------------------------------

Detected performance impact from expensive FP math instructions/calls.
By removing/reexpressing them, you can lower the cost of an iteration from 34.08 to 13.00 cycles (2.62x speedup).


      6.1.5.1.3  -  FMA
  ---------------------------------------------------------------------------------------------------------

Detected 4 FMA (fused multiply-add) operations.




      6.1.5.1.4  -  Slow data structures access
  ---------------------------------------------------------------------------------------------------------

Detected data structures (typically arrays) that cannot be efficiently read/written

Details
 - Constant unknown stride: 10 occurrence(s)
 - Irregular (variable stride) or indirect: 4 occurrence(s)
Non-unit stride (uncontiguous) accesses are not efficiently using data caches


Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)
 - Try to remove indirect accesses. If applicable, precompute elements out of the innermost loop.



      6.1.5.1.5  -  Matching between your loop (in the source code) and the binary loop
  ---------------------------------------------------------------------------------------------------------

The binary loop is composed of 16 FP arithmetical operations:
 - 8: addition or subtraction (4 inside FMA instructions)
 - 4: multiply (all inside FMA instructions)
 - 4: divide
The binary loop is loading 161 bytes.
The binary loop is storing 32 bytes.


      6.1.5.1.6  -  Arithmetic intensity
  ---------------------------------------------------------------------------------------------------------

Arithmetic intensity is 0.08 FP operations per loaded or stored byte.







      6.1.6  -  Loop 201 from exec
  =========================================================================================================

The loop is defined in:
 - /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/flux_calc.cpp:37-40
 - /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:69


The related source loop is not unrolled or unrolled with no peel/tail loop.

      6.1.6.1  -  Path 1
  ---------------------------------------------------------------------------------------------------------

4% of peak computational performance is used (1.29 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.6.1.1  -  Vectorization
  ---------------------------------------------------------------------------------------------------------

Your loop is partially vectorized.
Only 74% of vector register length is used (average across all VPU instructions).
By fully vectorizing your loop, you can lower the cost of an iteration from 32.50 to 23.78 cycles (1.37x speedup).

Details
54% of VPU instructions are used in vector version (process two or more data elements in vector registers):
 - 29% of VPU loads are used in vector version.
 - 35% of VPU addition or subtraction instructions are used in vector version.
 - 87% of VPU multiply instructions are used in vector version.
 - 31% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.
Since your execution units are vector units, only a fully vectorized loop can use their full power.


Workaround
 - Try another compiler or update/tune your current one
 - Remove inter-iterations dependences from your loop and make it unit-stride:
  * If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly:
C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)<<image_row_maj>>
  * If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA):
for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)





      6.1.6.1.2  -  FMA
  ---------------------------------------------------------------------------------------------------------

Presence of both ADD/SUB and MUL operations.

Workaround
Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible.
For instance a + b*c is a valid FMA (MUL then ADD).
However (a+b)* c cannot be translated into an FMA (ADD then MUL).




      6.1.6.1.3  -  Slow data structures access
  ---------------------------------------------------------------------------------------------------------

Detected data structures (typically arrays) that cannot be efficiently read/written

Details
 - Constant unknown stride: 22 occurrence(s)
 - Irregular (variable stride) or indirect: 8 occurrence(s)
Non-unit stride (uncontiguous) accesses are not efficiently using data caches


Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)
 - Try to remove indirect accesses. If applicable, precompute elements out of the innermost loop.



      6.1.6.1.4  -  Matching between your loop (in the source code) and the binary loop
  ---------------------------------------------------------------------------------------------------------

The binary loop is composed of 42 FP arithmetical operations:
 - 24: addition or subtraction
 - 18: multiply
The binary loop is loading 322 bytes.
The binary loop is storing 64 bytes.


      6.1.6.1.5  -  Arithmetic intensity
  ---------------------------------------------------------------------------------------------------------

Arithmetic intensity is 0.11 FP operations per loaded or stored byte.







      6.1.7  -  Loop 183 from exec
  =========================================================================================================

The loop is defined in:
 - /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/calc_dt.cpp:50-75
 - /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:69


The related source loop is unrolled by 4 (including vectorization).

      6.1.7.1  -  Path 1
  ---------------------------------------------------------------------------------------------------------

2% of peak computational performance is used (0.88 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.7.1.1  -  Vectorization
  ---------------------------------------------------------------------------------------------------------

Your loop is partially vectorized.
82% of vector register length is used (average across all VPU instructions).


Details
69% of VPU instructions are used in vector version (process two or more data elements in vector registers):
 - 53% of VPU loads are used in vector version.
 - 34% of VPU addition or subtraction instructions are used in vector version.
 - 59% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.





      6.1.7.1.2  -  Expensive FP math instructions/calls
  ---------------------------------------------------------------------------------------------------------

Detected performance impact from expensive FP math instructions/calls.
By removing/reexpressing them, you can lower the cost of an iteration from 118.59 to 45.00 cycles (2.64x speedup).


      6.1.7.1.3  -  FMA
  ---------------------------------------------------------------------------------------------------------

Detected 4 FMA (fused multiply-add) operations.
Presence of both ADD/SUB and MUL operations.

Workaround
Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible.
For instance a + b*c is a valid FMA (MUL then ADD).
However (a+b)* c cannot be translated into an FMA (ADD then MUL).




      6.1.7.1.4  -  Slow data structures access
  ---------------------------------------------------------------------------------------------------------

Detected data structures (typically arrays) that cannot be efficiently read/written

Details
 - Constant unknown stride: 28 occurrence(s)
 - Irregular (variable stride) or indirect: 10 occurrence(s)
Non-unit stride (uncontiguous) accesses are not efficiently using data caches


Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)
 - Try to remove indirect accesses. If applicable, precompute elements out of the innermost loop.



      6.1.7.1.5  -  Matching between your loop (in the source code) and the binary loop
  ---------------------------------------------------------------------------------------------------------

The binary loop is composed of 104 FP arithmetical operations:
 - 40: addition or subtraction (4 inside FMA instructions)
 - 36: multiply (4 inside FMA instructions)
 - 24: divide
 - 4: square root
The binary loop is loading 995 bytes.


      6.1.7.1.6  -  Arithmetic intensity
  ---------------------------------------------------------------------------------------------------------

Arithmetic intensity is 0.10 FP operations per loaded or stored byte.







      6.1.8  -  Loop 209 from exec
  =========================================================================================================

The loop is defined in:
 - /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/ideal_gas.cpp:38-45
 - /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:69


The related source loop is not unrolled or unrolled with no peel/tail loop.

      6.1.8.1  -  Path 1
  ---------------------------------------------------------------------------------------------------------

1% of peak computational performance is used (0.58 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.8.1.1  -  Vectorization
  ---------------------------------------------------------------------------------------------------------

Your loop is partially vectorized.
82% of vector register length is used (average across all VPU instructions).


Details
68% of VPU instructions are used in vector version (process two or more data elements in vector registers):
 - 27% of VPU loads are used in vector version.
 - 27% of VPU addition or subtraction instructions are used in vector version.
 - 50% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.





      6.1.8.1.2  -  Expensive FP math instructions/calls
  ---------------------------------------------------------------------------------------------------------

Detected performance impact from expensive FP math instructions/calls.
By removing/reexpressing them, you can lower the cost of an iteration from 48.17 to 13.50 cycles (3.57x speedup).




      6.1.8.1.3  -  Slow data structures access
  ---------------------------------------------------------------------------------------------------------

Detected data structures (typically arrays) that cannot be efficiently read/written

Details
 - Constant unknown stride: 8 occurrence(s)
 - Irregular (variable stride) or indirect: 4 occurrence(s)
Non-unit stride (uncontiguous) accesses are not efficiently using data caches


Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)
 - Try to remove indirect accesses. If applicable, precompute elements out of the innermost loop.



      6.1.8.1.4  -  Matching between your loop (in the source code) and the binary loop
  ---------------------------------------------------------------------------------------------------------

The binary loop is composed of 28 FP arithmetical operations:
 - 20: multiply
 - 4: divide
 - 4: square root
The binary loop is loading 97 bytes.
The binary loop is storing 64 bytes.


      6.1.8.1.5  -  Arithmetic intensity
  ---------------------------------------------------------------------------------------------------------

Arithmetic intensity is 0.17 FP operations per loaded or stored byte.







      6.1.9  -  Loop 155 from exec
  =========================================================================================================

The loop is defined in:
 - /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_cell.cpp:209-216
 - /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:69


The related source loop is not unrolled or unrolled with no peel/tail loop.

      6.1.9.1  -  Path 1
  ---------------------------------------------------------------------------------------------------------

2% of peak computational performance is used (0.83 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.9.1.1  -  Vectorization
  ---------------------------------------------------------------------------------------------------------

Your loop is partially vectorized.
81% of vector register length is used (average across all VPU instructions).


Details
62% of VPU instructions are used in vector version (process two or more data elements in vector registers):
 - 37% of VPU loads are used in vector version.
 - 40% of VPU addition or subtraction instructions are used in vector version.
 - 27% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.





      6.1.9.1.2  -  Expensive FP math instructions/calls
  ---------------------------------------------------------------------------------------------------------

Detected performance impact from expensive FP math instructions/calls.
By removing/reexpressing them, you can lower the cost of an iteration from 48.17 to 23.50 cycles (2.05x speedup).


      6.1.9.1.3  -  FMA
  ---------------------------------------------------------------------------------------------------------

Detected 4 FMA (fused multiply-add) operations.
Presence of both ADD/SUB and MUL operations.

Workaround
Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible.
For instance a + b*c is a valid FMA (MUL then ADD).
However (a+b)* c cannot be translated into an FMA (ADD then MUL).




      6.1.9.1.4  -  Slow data structures access
  ---------------------------------------------------------------------------------------------------------

Detected data structures (typically arrays) that cannot be efficiently read/written

Details
 - Constant unknown stride: 15 occurrence(s)
 - Irregular (variable stride) or indirect: 6 occurrence(s)
Non-unit stride (uncontiguous) accesses are not efficiently using data caches


Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)
 - Try to remove indirect accesses. If applicable, precompute elements out of the innermost loop.



      6.1.9.1.5  -  Matching between your loop (in the source code) and the binary loop
  ---------------------------------------------------------------------------------------------------------

The binary loop is composed of 40 FP arithmetical operations:
 - 24: addition or subtraction (4 inside FMA instructions)
 - 8: multiply (4 inside FMA instructions)
 - 8: divide
The binary loop is loading 289 bytes.
The binary loop is storing 64 bytes.


      6.1.9.1.6  -  Arithmetic intensity
  ---------------------------------------------------------------------------------------------------------

Arithmetic intensity is 0.11 FP operations per loaded or stored byte.







      6.1.10  -  Loop 166 from exec
  =========================================================================================================

The loop is defined in:
 - /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:69
 - /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_mom.cpp:181-211


The related source loop is not unrolled or unrolled with no peel/tail loop.

      6.1.10.1  -  Path 1
  ---------------------------------------------------------------------------------------------------------

3% of peak computational performance is used (1.09 out of 32.00 FLOP per cycle (GFLOPS @ 1GHz))

      6.1.10.1.1  -  Vectorization
  ---------------------------------------------------------------------------------------------------------

Your loop is partially vectorized.
88% of vector register length is used (average across all VPU instructions).


Details
77% of VPU instructions are used in vector version (process two or more data elements in vector registers):
 - 41% of VPU loads are used in vector version.
 - 52% of VPU addition or subtraction instructions are used in vector version.
 - 75% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.





      6.1.10.1.2  -  Expensive FP math instructions/calls
  ---------------------------------------------------------------------------------------------------------

Detected performance impact from expensive FP math instructions/calls.
By removing/reexpressing them, you can lower the cost of an iteration from 62.25 to 31.50 cycles (1.98x speedup).


      6.1.10.1.3  -  FMA
  ---------------------------------------------------------------------------------------------------------

Detected 8 FMA (fused multiply-add) operations.
Presence of both ADD/SUB and MUL operations.

Workaround
Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible.
For instance a + b*c is a valid FMA (MUL then ADD).
However (a+b)* c cannot be translated into an FMA (ADD then MUL).




      6.1.10.1.4  -  Slow data structures access
  ---------------------------------------------------------------------------------------------------------

Detected data structures (typically arrays) that cannot be efficiently read/written

Details
 - Constant unknown stride: 11 occurrence(s)
 - Irregular (variable stride) or indirect: 4 occurrence(s)
Non-unit stride (uncontiguous) accesses are not efficiently using data caches


Workaround
 - Try to reorganize arrays of structures to structures of arrays
 - Consider to permute loops (see vectorization gain report)
 - Try to remove indirect accesses. If applicable, precompute elements out of the innermost loop.



      6.1.10.1.5  -  Matching between your loop (in the source code) and the binary loop
  ---------------------------------------------------------------------------------------------------------

The binary loop is composed of 68 FP arithmetical operations:
 - 28: addition or subtraction (8 inside FMA instructions)
 - 28: multiply (8 inside FMA instructions)
 - 12: divide
The binary loop is loading 225 bytes.
The binary loop is storing 32 bytes.


      6.1.10.1.6  -  Arithmetic intensity
  ---------------------------------------------------------------------------------------------------------

Arithmetic intensity is 0.26 FP operations per loaded or stored byte.





[MAQAO] Info: STOP THE REPORT GENERATION
[MAQAO] Info: 
[MAQAO] Info: If your application produces files, they can be found in directory "/home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/run/oneview_runs/compilers/armclang_1/oneview_run_1782203850"
[MAQAO] Info: 
