| Loop Id: 392 | Module: exec | Source: PdV.cpp:51-63 | Coverage: 4.09% |
|---|
| Loop Id: 392 | Module: exec | Source: PdV.cpp:51-63 | Coverage: 4.09% |
|---|
0x42c5ec LD1D {Z2.D}, P1/Z, [X13, X25,LSL #3] [10] |
0x42c5f0 LD1D {Z3.D}, P1/Z, [X10, X25,LSL #3] [5] |
0x42c5f4 LD1D {Z7.D}, P1/Z, [X18, X25,LSL #3] [9] |
0x42c5f8 LD1D {Z17.D}, P1/Z, [X9, X25,LSL #3] [12] |
0x42c5fc LD1D {Z21.D}, P1/Z, [X19, X25,LSL #3] [16] |
0x42c600 LD1D {Z22.D}, P1/Z, [X21, X25,LSL #3] [15] |
0x42c604 LD1D {Z23.D}, P1/Z, [X8, X25,LSL #3] [1] |
0x42c608 FADD Z18.D, Z7.D, Z3.D |
0x42c60c FADD Z24.D, Z22.D, Z21.D |
0x42c610 FADD Z4.D, Z2.D, Z2.D |
0x42c614 FADD Z19.D, Z17.D, Z17.D |
0x42c618 FMUL Z20.D, Z4.D, Z18.D |
0x42c61c FADD Z25.D, Z23.D, Z23.D |
0x42c620 FMLA Z20.D, P0/M, Z19.D, Z24.D |
0x42c624 LD1D {Z26.D}, P1/Z, [X20, X25,LSL #3] [6] |
0x42c628 LD1D {Z19.D}, P1/Z, [X17, X25,LSL #3] [4] |
0x42c62c LD1D {Z27.D}, P1/Z, [X6, X25,LSL #3] [14] |
0x42c630 LD1D {Z28.D}, P1/Z, [X12, X25,LSL #3] [19] |
0x42c634 LD1D {Z0.D}, P1/Z, [X11, X25,LSL #3] [2] |
0x42c638 LD1D {Z5.D}, P1/Z, [X7, X25,LSL #3] [13] |
0x42c63c LD1D {Z2.D}, P1/Z, [X16, X25,LSL #3] [8] |
0x42c640 LD1D {Z1.D}, P1/Z, [X15, X25,LSL #3] [7] |
0x42c644 LD1D {Z7.D}, P1/Z, [X5, X25,LSL #3] [17] |
0x42c648 MOVPRFX Z21, Z6 |
0x42c64c FDIV Z21.D, P0/M, Z21.D, Z19.D |
0x42c650 FADD Z29.D, Z27.D, Z26.D |
0x42c654 FADD Z30.D, Z28.D, Z28.D |
0x42c658 FMUL Z31.D, Z25.D, Z29.D |
0x42c65c FADD Z3.D, Z5.D, Z0.D |
0x42c660 FADD Z17.D, Z1.D, Z2.D |
0x42c664 FMAD Z30.D, P0/M, Z3.D, Z31.D |
0x42c668 FDIV Z17.D, P0/M, Z17.D, Z7.D |
0x42c66c FSUB Z4.D, Z30.D, Z20.D |
0x42c670 FMUL Z23.D, Z17.D, Z21.D |
0x42c674 LD1D {Z20.D}, P1/Z, [X14, X25,LSL #3] [11] |
0x42c678 FMUL Z18.D, Z4.D, Z16.D |
0x42c67c FADD Z22.D, Z19.D, Z18.D |
0x42c680 FMSB Z18.D, P0/M, Z23.D, Z20.D |
0x42c684 FDIV Z19.D, P0/M, Z19.D, Z22.D |
0x42c688 ST1D {Z18.D}, P1, [X4, X25,LSL #3] [18] |
0x42c68c LD1D {Z24.D}, P1/Z, [X5, X25,LSL #3] [17] |
0x42c690 FMUL Z25.D, Z24.D, Z19.D |
0x42c694 ST1D {Z25.D}, P1, [X1, X25,LSL #3] [3] |
0x42c698 ADD X25, X25, X22 |
0x42c69c WHILELO P1.D, X25, X2 |
0x42c6a0 B.NE 42c5ec |
/home/hbollore/qaas-runs/170-300-2310/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/PdV.cpp: 51 - 63 |
-------------------------------------------------------------------------------- |
51: double left_flux = (xarea(i, j) * (xvel0(i, j) + xvel0(i + 0, j + 1) + xvel0(i, j) + xvel0(i + 0, j + 1))) * 0.25 * dt * 0.5; |
52: double right_flux = |
53: (xarea(i + 1, j + 0) * (xvel0(i + 1, j + 0) + xvel0(i + 1, j + 1) + xvel0(i + 1, j + 0) + xvel0(i + 1, j + 1))) * 0.25 * dt * |
54: 0.5; |
55: double bottom_flux = (yarea(i, j) * (yvel0(i, j) + yvel0(i + 1, j + 0) + yvel0(i, j) + yvel0(i + 1, j + 0))) * 0.25 * dt * 0.5; |
56: double top_flux = (yarea(i + 0, j + 1) * (yvel0(i + 0, j + 1) + yvel0(i + 1, j + 1) + yvel0(i + 0, j + 1) + yvel0(i + 1, j + 1))) * |
57: 0.25 * dt * 0.5; |
58: double total_flux = right_flux - left_flux + top_flux - bottom_flux; |
59: double volume_change_s = volume(i, j) / (volume(i, j) + total_flux); |
60: double recip_volume = 1.0 / volume(i, j); |
61: double energy_change = (pressure(i, j) / density0(i, j) + viscosity(i, j) / density0(i, j)) * total_flux * recip_volume; |
62: energy1(i, j) = energy0(i, j) - energy_change; |
63: density1(i, j) = density0(i, j) * volume_change_s; |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 1.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.15 |
| Bottlenecks | P6, P7, |
| Function | PdV_kernel(bool, int, int, int, int, double, clover::Buffer2D |
| Source | PdV.cpp:51-63 |
| Source loop unroll info | unrolled by 144 |
| Source loop unroll confidence level | max |
| Unroll/vectorization loop type | NA |
| Unroll factor | 144 |
| CQA cycles | 11.50 |
| CQA cycles if no scalar integer | 11.50 |
| CQA cycles if FP arith vectorized | 11.50 |
| CQA cycles if fully vectorized | 11.50 |
| Front-end cycles | 5.75 |
| DIV/SQRT cycles | 0.50 |
| P0 cycles | 0.50 |
| P1 cycles | 0.50 |
| P2 cycles | 0.25 |
| P3 cycles | 1.00 |
| P4 cycles | 0.25 |
| P5 cycles | 11.50 |
| P6 cycles | 11.50 |
| P7 cycles | 9.50 |
| P8 cycles | 9.50 |
| P9 cycles | 10.00 |
| P10 cycles | 10.00 |
| P11 cycles | 0.00 |
| P12 cycles | 0.00 |
| P13 cycles | 0.00 |
| P14 cycles | 3.00 - 1.50 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 46.00 |
| Nb uops | 46.00 |
| Nb loads | NA |
| Nb stores | 2.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 8.70 |
| Nb FLOP add-sub | 44.00 |
| Nb FLOP mul | 20.00 |
| Nb FLOP fma | 12.00 |
| Nb FLOP div | 12.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 55.65 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 576.00 |
| Bytes stored | 64.00 |
| Stride 0 | NA |
| Stride 1 | NA |
| Stride n | NA |
| Stride unknown | NA |
| Stride indirect | NA |
| Vectorization ratio all | 97.67 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | 100.00 |
| Vectorization ratio add_sub | 100.00 |
| Vectorization ratio fma | 100.00 |
| Vectorization ratio div_sqrt | 100.00 |
| Vectorization ratio other | 0.00 |
| Vector-efficiency ratio all | 100.00 |
| Vector-efficiency ratio load | 100.00 |
| Vector-efficiency ratio store | 100.00 |
| Vector-efficiency ratio mul | 100.00 |
| Vector-efficiency ratio add_sub | 100.00 |
| Vector-efficiency ratio fma | 100.00 |
| Vector-efficiency ratio div_sqrt | 100.00 |
| Vector-efficiency ratio other | 100.00 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 1.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.15 |
| Bottlenecks | P6, P7, |
| Function | PdV_kernel(bool, int, int, int, int, double, clover::Buffer2D |
| Source | PdV.cpp:51-63 |
| Source loop unroll info | unrolled by 144 |
| Source loop unroll confidence level | max |
| Unroll/vectorization loop type | NA |
| Unroll factor | 144 |
| CQA cycles | 11.50 |
| CQA cycles if no scalar integer | 11.50 |
| CQA cycles if FP arith vectorized | 11.50 |
| CQA cycles if fully vectorized | 11.50 |
| Front-end cycles | 5.75 |
| DIV/SQRT cycles | 0.50 |
| P0 cycles | 0.50 |
| P1 cycles | 0.50 |
| P2 cycles | 0.25 |
| P3 cycles | 1.00 |
| P4 cycles | 0.25 |
| P5 cycles | 11.50 |
| P6 cycles | 11.50 |
| P7 cycles | 9.50 |
| P8 cycles | 9.50 |
| P9 cycles | 10.00 |
| P10 cycles | 10.00 |
| P11 cycles | 0.00 |
| P12 cycles | 0.00 |
| P13 cycles | 0.00 |
| P14 cycles | 3.00 - 1.50 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 46.00 |
| Nb uops | 46.00 |
| Nb loads | NA |
| Nb stores | 2.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 8.70 |
| Nb FLOP add-sub | 44.00 |
| Nb FLOP mul | 20.00 |
| Nb FLOP fma | 12.00 |
| Nb FLOP div | 12.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 55.65 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 576.00 |
| Bytes stored | 64.00 |
| Stride 0 | NA |
| Stride 1 | NA |
| Stride n | NA |
| Stride unknown | NA |
| Stride indirect | NA |
| Vectorization ratio all | 97.67 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | 100.00 |
| Vectorization ratio add_sub | 100.00 |
| Vectorization ratio fma | 100.00 |
| Vectorization ratio div_sqrt | 100.00 |
| Vectorization ratio other | 0.00 |
| Vector-efficiency ratio all | 100.00 |
| Vector-efficiency ratio load | 100.00 |
| Vector-efficiency ratio store | 100.00 |
| Vector-efficiency ratio mul | 100.00 |
| Vector-efficiency ratio add_sub | 100.00 |
| Vector-efficiency ratio fma | 100.00 |
| Vector-efficiency ratio div_sqrt | 100.00 |
| Vector-efficiency ratio other | 100.00 |
| Path / |
| nb instructions | 46 |
| loop length | 184 |
| nb stack references | 0 |
| front end | 5.75 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 0.50 | 0.50 | 0.50 | 0.25 | 1.00 | 0.25 | 11.50 | 11.50 | 1.00 | 1.00 | 10.00 | 10.00 | 0.00 | 0.00 | 0.00 |
| cycles | 0.50 | 0.50 | 0.50 | 0.25 | 1.00 | 0.25 | 11.50 | 11.50 | 9.50 | 9.50 | 10.00 | 10.00 | 0.00 | 0.00 | 0.00 |
| Cycles executing div or sqrt instructions | 3.00-1.50 |
| Longest recurrence chain latency (RecMII) | 1.00 |
| Front-end | 5.75 |
| Data deps. | 1.00 |
| Overall L1 | 11.50 |
| all | 95% |
| load | 100% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 0% |
| all | 100% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 100% |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 97% |
| load | 100% |
| store | 100% |
| mul | 100% |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | 0% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| LD1D {Z2.D}, P1/Z, [X13, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
| LD1D {Z3.D}, P1/Z, [X10, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
| LD1D {Z7.D}, P1/Z, [X18, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
| LD1D {Z17.D}, P1/Z, [X9, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
| LD1D {Z21.D}, P1/Z, [X19, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
| LD1D {Z22.D}, P1/Z, [X21, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
| LD1D {Z23.D}, P1/Z, [X8, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
| FADD Z18.D, Z7.D, Z3.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
| FADD Z24.D, Z22.D, Z21.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
| FADD Z4.D, Z2.D, Z2.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
| FADD Z19.D, Z17.D, Z17.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
| FMUL Z20.D, Z4.D, Z18.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
| FADD Z25.D, Z23.D, Z23.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
| FMLA Z20.D, P0/M, Z19.D, Z24.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| LD1D {Z26.D}, P1/Z, [X20, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
| LD1D {Z19.D}, P1/Z, [X17, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
| LD1D {Z27.D}, P1/Z, [X6, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
| LD1D {Z28.D}, P1/Z, [X12, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
| LD1D {Z0.D}, P1/Z, [X11, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
| LD1D {Z5.D}, P1/Z, [X7, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
| LD1D {Z2.D}, P1/Z, [X16, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
| LD1D {Z1.D}, P1/Z, [X15, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
| LD1D {Z7.D}, P1/Z, [X5, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
| MOVPRFX Z21, Z6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
| FDIV Z21.D, P0/M, Z21.D, Z19.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 7-15 | 1-0.50 |
| FADD Z29.D, Z27.D, Z26.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
| FADD Z30.D, Z28.D, Z28.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
| FMUL Z31.D, Z25.D, Z29.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
| FADD Z3.D, Z5.D, Z0.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
| FADD Z17.D, Z1.D, Z2.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
| FMAD Z30.D, P0/M, Z3.D, Z31.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| FDIV Z17.D, P0/M, Z17.D, Z7.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 7-15 | 1-0.50 |
| FSUB Z4.D, Z30.D, Z20.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
| FMUL Z23.D, Z17.D, Z21.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
| LD1D {Z20.D}, P1/Z, [X14, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
| FMUL Z18.D, Z4.D, Z16.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
| FADD Z22.D, Z19.D, Z18.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
| FMSB Z18.D, P0/M, Z23.D, Z20.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| FDIV Z19.D, P0/M, Z19.D, Z22.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 7-15 | 1-0.50 |
| ST1D {Z18.D}, P1, [X4, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
| LD1D {Z24.D}, P1/Z, [X5, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
| FMUL Z25.D, Z24.D, Z19.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
| ST1D {Z25.D}, P1, [X1, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
| ADD X25, X25, X22 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| WHILELO P1.D, X25, X2 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 2 |
| B.NE 42c5ec <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_._omp_fn.0+0x28c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
| nb instructions | 46 |
| loop length | 184 |
| nb stack references | 0 |
| front end | 5.75 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 0.50 | 0.50 | 0.50 | 0.25 | 1.00 | 0.25 | 11.50 | 11.50 | 1.00 | 1.00 | 10.00 | 10.00 | 0.00 | 0.00 | 0.00 |
| cycles | 0.50 | 0.50 | 0.50 | 0.25 | 1.00 | 0.25 | 11.50 | 11.50 | 9.50 | 9.50 | 10.00 | 10.00 | 0.00 | 0.00 | 0.00 |
| Cycles executing div or sqrt instructions | 3.00-1.50 |
| Longest recurrence chain latency (RecMII) | 1.00 |
| Front-end | 5.75 |
| Data deps. | 1.00 |
| Overall L1 | 11.50 |
| all | 95% |
| load | 100% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 0% |
| all | 100% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 100% |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 97% |
| load | 100% |
| store | 100% |
| mul | 100% |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | 0% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| LD1D {Z2.D}, P1/Z, [X13, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
| LD1D {Z3.D}, P1/Z, [X10, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
| LD1D {Z7.D}, P1/Z, [X18, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
| LD1D {Z17.D}, P1/Z, [X9, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
| LD1D {Z21.D}, P1/Z, [X19, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
| LD1D {Z22.D}, P1/Z, [X21, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
| LD1D {Z23.D}, P1/Z, [X8, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
| FADD Z18.D, Z7.D, Z3.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
| FADD Z24.D, Z22.D, Z21.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
| FADD Z4.D, Z2.D, Z2.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
| FADD Z19.D, Z17.D, Z17.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
| FMUL Z20.D, Z4.D, Z18.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
| FADD Z25.D, Z23.D, Z23.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
| FMLA Z20.D, P0/M, Z19.D, Z24.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| LD1D {Z26.D}, P1/Z, [X20, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
| LD1D {Z19.D}, P1/Z, [X17, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
| LD1D {Z27.D}, P1/Z, [X6, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
| LD1D {Z28.D}, P1/Z, [X12, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
| LD1D {Z0.D}, P1/Z, [X11, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
| LD1D {Z5.D}, P1/Z, [X7, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
| LD1D {Z2.D}, P1/Z, [X16, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
| LD1D {Z1.D}, P1/Z, [X15, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
| LD1D {Z7.D}, P1/Z, [X5, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
| MOVPRFX Z21, Z6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
| FDIV Z21.D, P0/M, Z21.D, Z19.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 7-15 | 1-0.50 |
| FADD Z29.D, Z27.D, Z26.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
| FADD Z30.D, Z28.D, Z28.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
| FMUL Z31.D, Z25.D, Z29.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
| FADD Z3.D, Z5.D, Z0.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
| FADD Z17.D, Z1.D, Z2.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
| FMAD Z30.D, P0/M, Z3.D, Z31.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| FDIV Z17.D, P0/M, Z17.D, Z7.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 7-15 | 1-0.50 |
| FSUB Z4.D, Z30.D, Z20.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
| FMUL Z23.D, Z17.D, Z21.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
| LD1D {Z20.D}, P1/Z, [X14, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
| FMUL Z18.D, Z4.D, Z16.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
| FADD Z22.D, Z19.D, Z18.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
| FMSB Z18.D, P0/M, Z23.D, Z20.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| FDIV Z19.D, P0/M, Z19.D, Z22.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 7-15 | 1-0.50 |
| ST1D {Z18.D}, P1, [X4, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
| LD1D {Z24.D}, P1/Z, [X5, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
| FMUL Z25.D, Z24.D, Z19.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
| ST1D {Z25.D}, P1, [X1, X25,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
| ADD X25, X25, X22 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
| WHILELO P1.D, X25, X2 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 2 |
| B.NE 42c5ec <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_._omp_fn.0+0x28c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
