OV - exec - Function accelerate_kernel(int, int, int, int, double, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&) [clone .extracted]

	Function: accelerate_kernel(int, int, int, int, double, clover::Buffer2D<double>&, clover::Buffer2D< ...	Module: exec	Source: accelerate.cpp:40-54 [...]	Coverage (incl. loops): 5.06% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_GNR/173-814-2343/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/accelerate.cpp: 40 - 54

--------------------------------------------------------------------------------

40: #pragma omp parallel for simd collapse(2)

41:   for (int j = (y_min + 1); j < (y_max + 1 + 2); j++) {

42:     for (int i = (x_min + 1); i < (x_max + 1 + 2); i++) {

43:       double stepbymass_s = halfdt / ((density0(i - 1, j - 1) * volume(i - 1, j - 1) + density0(i - 1, j + 0) * volume(i - 1, j + 0) +

44:                                        density0(i, j) * volume(i, j) + density0(i + 0, j - 1) * volume(i + 0, j - 1)) *

45:                                       0.25);

46:       xvel1(i, j) = xvel0(i, j) - stepbymass_s * (xarea(i, j) * (pressure(i, j) - pressure(i - 1, j + 0)) +

47:                                                   xarea(i + 0, j - 1) * (pressure(i + 0, j - 1) - pressure(i - 1, j - 1)));

48:       yvel1(i, j) = yvel0(i, j) - stepbymass_s * (yarea(i, j) * (pressure(i, j) - pressure(i + 0, j - 1)) +

49:                                                   yarea(i - 1, j + 0) * (pressure(i - 1, j + 0) - pressure(i - 1, j - 1)));

50:       xvel1(i, j) = xvel1(i, j) - stepbymass_s * (xarea(i, j) * (viscosity(i, j) - viscosity(i - 1, j + 0)) +

51:                                                   xarea(i + 0, j - 1) * (viscosity(i + 0, j - 1) - viscosity(i - 1, j - 1)));

52:       yvel1(i, j) = yvel1(i, j) - stepbymass_s * (yarea(i, j) * (viscosity(i, j) - viscosity(i + 0, j - 1)) +

53:                                                   yarea(i - 1, j + 0) * (viscosity(i - 1, j + 0) - viscosity(i - 1, j - 1)));

54:     }

/home/eoseret/qaas_runs_GNR/173-814-2343/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h: 69 - 69

--------------------------------------------------------------------------------

69:   T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; }

0x41c450 PUSH	%RBP

0x41c451 MOV	%RSP,%RBP

0x41c454 PUSH	%R15

0x41c456 PUSH	%R14

0x41c458 PUSH	%R13

0x41c45a PUSH	%R12

0x41c45c PUSH	%RBX

0x41c45d SUB	$0x258,%RSP

0x41c464 MOV	%R9,%R13

0x41c467 MOV	%R8,%R14

0x41c46a MOV	%RCX,-0x60(%RBP)

0x41c46e MOV	0x68(%RBP),%RAX

0x41c472 MOV	0x58(%RBP),%RCX

0x41c476 MOV	0x50(%RBP),%R10

0x41c47a MOV	0x38(%RBP),%R8

0x41c47e MOV	0x30(%RBP),%R12

0x41c482 MOV	0x28(%RBP),%R11

0x41c486 MOV	0x20(%RBP),%R15

0x41c48a MOV	0x18(%RBP),%R9

0x41c48e MOVQ	0x40(%RBP),%XMM0

0x41c493 MOV	0x10(%RBP),%RBX

0x41c497 MOV	0x48(%RBP),%ESI

0x41c49a MOV	%RSI,-0x80(%RBP)

0x41c49e MOVL	$0,-0x50(%RBP)

0x41c4a5 TEST	%RAX,%RAX

0x41c4a8 JS	41d1bd

0x41c4ae MOV	%R11,-0x48(%RBP)

0x41c4b2 MOV	%RDX,-0x38(%RBP)

0x41c4b6 MOV	%R9,-0x30(%RBP)

0x41c4ba MOV	%R8,-0xe0(%RBP)

0x41c4c1 MOV	%R10,-0x78(%RBP)

0x41c4c5 MOV	%RCX,-0x40(%RBP)

0x41c4c9 MOV	(%RDI),%ESI

0x41c4cb MOVQ	$0,-0xd0(%RBP)

0x41c4d6 MOV	%RAX,-0xc8(%RBP)

0x41c4dd MOVQ	$0x1,-0x168(%RBP)

0x41c4e8 SUB	$0x8,%RSP

0x41c4ec LEA	-0x168(%RBP),%RAX

0x41c4f3 LEA	-0x50(%RBP),%RCX

0x41c4f7 LEA	-0xd0(%RBP),%R8

0x41c4fe LEA	-0xc8(%RBP),%R9

0x41c505 MOV	$0x4b73d0,%EDI

0x41c50a MOV	%ESI,-0x4c(%RBP)

0x41c50d MOV	$0x22,%EDX

0x41c512 PUSH	$0x1

0x41c514 PUSH	$0x1

0x41c516 PUSH	%RAX

0x41c517 MOVDQA	%XMM0,-0x180(%RBP)

0x41c51f CALL	4031f0 <__kmpc_for_static_init_8@plt>

0x41c524 MOVAPD	-0x180(%RBP),%XMM4

0x41c52c ADD	$0x20,%RSP

0x41c530 MOV	-0xd0(%RBP),%RAX

0x41c537 MOV	-0xc8(%RBP),%RCX

0x41c53e CMP	%RCX,%RAX

0x41c541 JA	41d19f

0x41c547 MOV	%RCX,%RSI

0x41c54a MOV	-0x40(%RBP),%RDX

0x41c54e MOV	-0x78(%RBP),%RCX

0x41c552 SUB	%ECX,%EDX

0x41c554 MOV	(%R13),%RDI

0x41c558 MOV	%RDI,-0x70(%RBP)

0x41c55c MOV	0x10(%R13),%R8

0x41c560 MOV	%R8,-0xa0(%RBP)

0x41c567 MOV	(%R14),%R8

0x41c56a MOV	0x10(%R14),%RDI

0x41c56e MOV	%RDI,-0xc0(%RBP)

0x41c575 MOV	(%R15),%R10

0x41c578 MOV	0x10(%R15),%RDI

0x41c57c MOV	%RDI,-0xb8(%RBP)

0x41c583 MOV	-0x38(%RBP),%RDI

0x41c587 MOV	(%RDI),%R15

0x41c58a MOV	0x10(%RDI),%RDI

0x41c58e MOV	%RDI,-0xb0(%RBP)

0x41c595 MOV	(%RBX),%R13

0x41c598 MOV	0x10(%RBX),%RDI

0x41c59c MOV	%RDI,-0xa8(%RBP)

0x41c5a3 MOV	-0x60(%RBP),%RDI

0x41c5a7 MOV	%R12,%R9

0x41c5aa MOV	(%R12),%R12

0x41c5ae MOV	0x10(%R9),%R11

0x41c5b2 MOV	%R11,-0x38(%RBP)

0x41c5b6 MOV	-0x48(%RBP),%R9

0x41c5ba MOV	(%R9),%R11

0x41c5bd MOV	0x10(%R9),%R9

0x41c5c1 MOV	%R9,-0x48(%RBP)

0x41c5c5 MOV	(%RDI),%R9

0x41c5c8 MOV	0x10(%RDI),%R14

0x41c5cc MOV	%R14,-0x98(%RBP)

0x41c5d3 MOV	-0xe0(%RBP),%RDI

0x41c5da MOV	(%RDI),%R14

0x41c5dd MOV	0x10(%RDI),%RBX

0x41c5e1 MOV	%RBX,-0x90(%RBP)

0x41c5e8 MOV	-0x30(%RBP),%RDI

0x41c5ec MOV	(%RDI),%RBX

0x41c5ef MOV	0x10(%RDI),%RDI

0x41c5f3 MOV	%RDI,-0x88(%RBP)

0x41c5fa INC	%RSI

0x41c5fd MOV	%RSI,-0x138(%RBP)

0x41c604 MOV	%RSI,%RDI

0x41c607 SUB	%RAX,%RDI

0x41c60a MOV	$-0x2,%ESI

0x41c60f AND	%RDI,%RSI

0x41c612 MOV	%R8,-0x130(%RBP)

0x41c619 MOV	%R15,-0x120(%RBP)

0x41c620 MOV	%R13,-0x68(%RBP)

0x41c624 MOV	%RBX,-0xf8(%RBP)

0x41c62b MOV	%RDX,-0x40(%RBP)

0x41c62f MOV	%R10,-0x128(%RBP)

0x41c636 MOV	%R12,-0x118(%RBP)

0x41c63d MOV	%R11,-0x110(%RBP)

0x41c644 MOV	%R9,-0x108(%RBP)

0x41c64b MOV	%R14,-0x100(%RBP)

0x41c652 JE	41d486

0x41c658 MOV	%RDI,-0xe8(%RBP)

0x41c65f MOVD	%EDX,%XMM0

0x41c663 PSHUFD	$0x44,%XMM0,%XMM0

0x41c668 MOVDQA	%XMM0,-0x260(%RBP)

0x41c670 MOVD	-0x80(%RBP),%XMM0

0x41c675 PSHUFD	$0x50,%XMM0,%XMM0

0x41c67a MOVDQA	%XMM0,-0x250(%RBP)

0x41c682 MOVD	%ECX,%XMM0

0x41c686 PSHUFD	$0x50,%XMM0,%XMM0

0x41c68b MOVDQA	%XMM0,-0x240(%RBP)

0x41c693 MOVQ	-0x70(%RBP),%XMM0

0x41c698 PSHUFD	$0x44,%XMM0,%XMM0

0x41c69d MOVDQA	%XMM0,-0x230(%RBP)

0x41c6a5 MOVQ	%R8,%XMM0

0x41c6aa PSHUFD	$0x44,%XMM0,%XMM0

0x41c6af MOVDQA	%XMM0,-0x220(%RBP)

0x41c6b7 UNPCKLPD	%XMM4,%XMM4

0x41c6bb MOVAPD	%XMM4,-0x210(%RBP)

0x41c6c3 MOVQ	%R10,%XMM0

0x41c6c8 PSHUFD	$0x44,%XMM0,%XMM0

0x41c6cd MOVDQA	%XMM0,-0x200(%RBP)

0x41c6d5 MOVQ	%R15,%XMM0

0x41c6da PSHUFD	$0x44,%XMM0,%XMM0

0x41c6df MOVDQA	%XMM0,-0x1f0(%RBP)

0x41c6e7 MOVQ	%R13,%XMM0

0x41c6ec PSHUFD	$0x44,%XMM0,%XMM0

0x41c6f1 MOVDQA	%XMM0,-0x1e0(%RBP)

0x41c6f9 MOVQ	%R12,%XMM0

0x41c6fe PSHUFD	$0x44,%XMM0,%XMM0

0x41c703 MOVDQA	%XMM0,-0x1d0(%RBP)

0x41c70b MOVQ	%R11,%XMM0

0x41c710 PSHUFD	$0x44,%XMM0,%XMM0

0x41c715 MOVDQA	%XMM0,-0x1c0(%RBP)

0x41c71d MOVQ	%R9,%XMM0

0x41c722 PSHUFD	$0x44,%XMM0,%XMM0

0x41c727 MOVDQA	%XMM0,-0x1b0(%RBP)

0x41c72f MOVQ	%R14,%XMM0

0x41c734 PSHUFD	$0x44,%XMM0,%XMM0

0x41c739 MOVDQA	%XMM0,-0x1a0(%RBP)

0x41c741 MOVQ	%RBX,%XMM0

0x41c746 PSHUFD	$0x44,%XMM0,%XMM0

0x41c74b MOVDQA	%XMM0,-0x190(%RBP)

0x41c753 MOV	%RAX,-0x30(%RBP)

0x41c757 MOVQ	%RAX,%XMM0

0x41c75c PSHUFD	$0x44,%XMM0,%XMM1

0x41c761 PADDQ	0x7ecc7(%RIP),%XMM1

0x41c769 XOR	%EAX,%EAX

0x41c76b MOV	%RSI,-0xf0(%RBP)

0x41c772 NOPW	%CS:(%RAX,%RAX,1)

(144) 0x41c780 MOV	%RAX,-0x160(%RBP)

(144) 0x41c787 MOVDQA	%XMM1,-0x60(%RBP)

(144) 0x41c78c MOVQ	%XMM1,%RAX

(144) 0x41c791 MOVDQA	-0x260(%RBP),%XMM2

(144) 0x41c799 MOVQ	%XMM2,%RCX

(144) 0x41c79e XOR	%EDX,%EDX

(144) 0x41c7a0 DIV	%RCX

(144) 0x41c7a3 PSHUFD	$-0x12,%XMM1,%XMM0

(144) 0x41c7a8 MOVQ	%XMM0,%RDX

(144) 0x41c7ad PSHUFD	$-0x12,%XMM2,%XMM0

(144) 0x41c7b2 MOVQ	%XMM0,%RCX

(144) 0x41c7b7 MOVQ	%RAX,%XMM0

(144) 0x41c7bc MOV	%RDX,%RAX

(144) 0x41c7bf XOR	%EDX,%EDX

(144) 0x41c7c1 DIV	%RCX

(144) 0x41c7c4 MOVQ	%RAX,%XMM1

(144) 0x41c7c9 PUNPCKLQDQ	%XMM1,%XMM0

(144) 0x41c7cd PSHUFD	$-0x18,%XMM0,%XMM5

(144) 0x41c7d2 PADDD	-0x250(%RBP),%XMM5

(144) 0x41c7da PMULUDQ	%XMM2,%XMM0

(144) 0x41c7de MOVDQA	-0x60(%RBP),%XMM1

(144) 0x41c7e3 PSUBQ	%XMM0,%XMM1

(144) 0x41c7e7 PSHUFD	$-0x18,%XMM1,%XMM12

(144) 0x41c7ed PXOR	%XMM0,%XMM0

(144) 0x41c7f1 MOVDQA	%XMM5,%XMM7

(144) 0x41c7f5 PCMPEQD	%XMM1,%XMM1

(144) 0x41c7f9 PADDD	%XMM1,%XMM7

(144) 0x41c7fd PADDD	-0x240(%RBP),%XMM12

(144) 0x41c806 PXOR	%XMM8,%XMM8

(144) 0x41c80b PCMPGTD	%XMM7,%XMM8

(144) 0x41c810 PUNPCKLDQ	%XMM8,%XMM7

(144) 0x41c815 MOVDQA	%XMM12,%XMM2

(144) 0x41c81a MOVDQA	-0x230(%RBP),%XMM9

(144) 0x41c823 MOVDQA	%XMM9,%XMM6

(144) 0x41c828 PMULUDQ	%XMM7,%XMM6

(144) 0x41c82c MOVDQA	%XMM9,%XMM3

(144) 0x41c831 PADDD	%XMM1,%XMM2

(144) 0x41c835 PSRLQ	$0x20,%XMM3

(144) 0x41c83a MOVDQA	%XMM3,%XMM4

(144) 0x41c83e PMULUDQ	%XMM7,%XMM4

(144) 0x41c842 PCMPGTD	%XMM2,%XMM0

(144) 0x41c846 PXOR	%XMM14,%XMM14

(144) 0x41c84b PUNPCKLDQ	%XMM14,%XMM8

(144) 0x41c850 MOVDQA	%XMM9,%XMM10

(144) 0x41c855 PMULUDQ	%XMM8,%XMM10

(144) 0x41c85a MOVDQA	%XMM8,%XMM11

(144) 0x41c85f MOVDQA	%XMM8,-0x270(%RBP)

(144) 0x41c868 PUNPCKLDQ	%XMM0,%XMM2

(144) 0x41c86c MOVDQA	%XMM2,%XMM15

(144) 0x41c871 MOV	-0xa0(%RBP),%RAX

(144) 0x41c878 MOVQ	%RAX,%XMM0

(144) 0x41c87d PSHUFD	$0x44,%XMM0,%XMM2

(144) 0x41c882 MOVDQA	-0x220(%RBP),%XMM1

(144) 0x41c88a MOVDQA	%XMM1,%XMM0

(144) 0x41c88e PADDQ	%XMM4,%XMM10

(144) 0x41c893 MOVDQA	%XMM7,%XMM4

(144) 0x41c897 MOVDQA	%XMM7,-0x280(%RBP)

(144) 0x41c89f PMULUDQ	%XMM7,%XMM0

(144) 0x41c8a3 MOVDQA	%XMM1,%XMM7

(144) 0x41c8a7 PSRLQ	$0x20,%XMM7

(144) 0x41c8ac PSLLQ	$0x20,%XMM10

(144) 0x41c8b2 MOVDQA	%XMM7,%XMM8

(144) 0x41c8b7 PMULUDQ	%XMM4,%XMM8

(144) 0x41c8bc MOVDQA	%XMM1,%XMM4

(144) 0x41c8c0 PADDQ	%XMM6,%XMM10

(144) 0x41c8c5 PMULUDQ	%XMM11,%XMM4

(144) 0x41c8ca PADDQ	%XMM8,%XMM4

(144) 0x41c8cf PSLLQ	$0x20,%XMM4

(144) 0x41c8d4 PADDQ	%XMM0,%XMM4

(144) 0x41c8d8 MOVQ	-0xc0(%RBP),%XMM0

(144) 0x41c8e0 PSHUFD	$0x44,%XMM0,%XMM11

(144) 0x41c8e6 PXOR	%XMM6,%XMM6

(144) 0x41c8ea MOVDQA	%XMM10,%XMM13

(144) 0x41c8ef PCMPGTD	%XMM5,%XMM6

(144) 0x41c8f3 PUNPCKLDQ	%XMM6,%XMM5

(144) 0x41c8f7 MOVDQA	%XMM9,%XMM0

(144) 0x41c8fc MOVDQA	%XMM4,%XMM8

(144) 0x41c901 PMULUDQ	%XMM5,%XMM0

(144) 0x41c905 PMULUDQ	%XMM5,%XMM3

(144) 0x41c909 PUNPCKLDQ	%XMM14,%XMM6

(144) 0x41c90e PADDQ	%XMM15,%XMM13

(144) 0x41c913 PMULUDQ	%XMM6,%XMM9

(144) 0x41c918 PADDQ	%XMM3,%XMM9

(144) 0x41c91d PADDQ	%XMM15,%XMM8

(144) 0x41c922 PSLLQ	$0x20,%XMM9

(144) 0x41c928 PADDQ	%XMM0,%XMM9

(144) 0x41c92d MOVDQA	%XMM9,%XMM0

(144) 0x41c932 PSLLQ	$0x3,%XMM13

(144) 0x41c938 PADDQ	%XMM15,%XMM0

(144) 0x41c93d MOVDQA	%XMM15,-0xe0(%RBP)

(144) 0x41c946 PSLLQ	$0x3,%XMM0

(144) 0x41c94b PADDQ	%XMM2,%XMM0

(144) 0x41c94f PSLLQ	$0x3,%XMM8

(144) 0x41c955 MOVQ	%XMM0,%RDX

(144) 0x41c95a PSHUFD	$-0x12,%XMM0,%XMM0

(144) 0x41c95f PMULUDQ	%XMM5,%XMM7

(144) 0x41c963 PADDQ	%XMM2,%XMM13

(144) 0x41c968 MOVDQA	%XMM1,%XMM14

(144) 0x41c96d PMULUDQ	%XMM6,%XMM14

(144) 0x41c972 PADDQ	%XMM7,%XMM14

(144) 0x41c977 PADDQ	%XMM11,%XMM8

(144) 0x41c97c PMULUDQ	%XMM5,%XMM1

(144) 0x41c980 PSLLQ	$0x20,%XMM14

(144) 0x41c986 MOVQ	%XMM0,%RSI

(144) 0x41c98b PADDQ	%XMM1,%XMM14

(144) 0x41c990 MOVDQA	%XMM14,%XMM3

(144) 0x41c995 PADDQ	%XMM15,%XMM3

(144) 0x41c99a MOVQ	%XMM13,%RAX

(144) 0x41c99f PSLLQ	$0x3,%XMM3

(144) 0x41c9a4 PADDQ	%XMM11,%XMM3

(144) 0x41c9a9 MOVQ	%XMM3,%R8

(144) 0x41c9ae PSHUFD	$-0x12,%XMM13,%XMM0

(144) 0x41c9b4 PSHUFD	$-0x12,%XMM3,%XMM3

(144) 0x41c9b9 MOVQ	%XMM3,%RCX

(144) 0x41c9be PXOR	%XMM3,%XMM3

(144) 0x41c9c2 MOVQ	%XMM8,%RDI

(144) 0x41c9c7 PCMPGTD	%XMM12,%XMM3

(144) 0x41c9cc PUNPCKLDQ	%XMM3,%XMM12

(144) 0x41c9d1 PADDQ	%XMM12,%XMM9

(144) 0x41c9d6 PSHUFD	$-0x12,%XMM8,%XMM13

(144) 0x41c9dc PSLLQ	$0x3,%XMM9

(144) 0x41c9e2 PADDQ	%XMM2,%XMM9

(144) 0x41c9e7 MOVQ	%XMM9,%R9

(144) 0x41c9ec MOVSD	(%RDX),%XMM7

(144) 0x41c9f0 PSHUFD	$-0x12,%XMM9,%XMM3

(144) 0x41c9f6 MOVQ	%XMM3,%RDX

(144) 0x41c9fb MOVSD	(%R9),%XMM8

(144) 0x41ca00 MOVSD	(%R8),%XMM3

(144) 0x41ca05 PADDQ	%XMM12,%XMM14

(144) 0x41ca0a PSLLQ	$0x3,%XMM14

(144) 0x41ca10 MOVHPD	(%RDX),%XMM8

(144) 0x41ca15 PADDQ	%XMM11,%XMM14

(144) 0x41ca1a MOVQ	%XMM14,%RDX

(144) 0x41ca1f PSHUFD	$-0x12,%XMM14,%XMM9

(144) 0x41ca25 MOVQ	%XMM0,%R8

(144) 0x41ca2a MOVQ	%XMM9,%R9

(144) 0x41ca2f MOVSD	(%RDX),%XMM9

(144) 0x41ca34 MOVHPD	(%RSI),%XMM7

(144) 0x41ca38 MOVHPD	(%R9),%XMM9

(144) 0x41ca3d MOVHPD	(%RCX),%XMM3

(144) 0x41ca41 MOVQ	%XMM13,%RCX

(144) 0x41ca46 PADDQ	%XMM12,%XMM10

(144) 0x41ca4b PSLLQ	$0x3,%XMM10

(144) 0x41ca51 MOVSD	(%RAX),%XMM0

(144) 0x41ca55 PADDQ	%XMM2,%XMM10

(144) 0x41ca5a MOVQ	%XMM10,%RAX

(144) 0x41ca5f PSHUFD	$-0x12,%XMM10,%XMM10

(144) 0x41ca65 MOVSD	(%RDI),%XMM15

(144) 0x41ca6a MOVQ	%XMM10,%RDX

(144) 0x41ca6f MOVSD	(%RAX),%XMM13

(144) 0x41ca74 MOVHPD	(%R8),%XMM0

(144) 0x41ca79 MOVHPD	(%RDX),%XMM13

(144) 0x41ca7e MOVHPD	(%RCX),%XMM15

(144) 0x41ca83 PADDQ	%XMM12,%XMM4

(144) 0x41ca88 PSLLQ	$0x3,%XMM4

(144) 0x41ca8d PADDQ	%XMM11,%XMM4

(144) 0x41ca92 MULPD	%XMM8,%XMM9

(144) 0x41ca97 MOVQ	%XMM4,%RAX

(144) 0x41ca9c PSHUFD	$-0x12,%XMM4,%XMM4

(144) 0x41caa1 MOVQ	%XMM4,%RCX

(144) 0x41caa6 MULPD	%XMM7,%XMM3

(144) 0x41caaa MOVSD	(%RAX),%XMM10

(144) 0x41caaf MOVHPD	(%RCX),%XMM10

(144) 0x41cab4 MULPD	%XMM0,%XMM15

(144) 0x41cab9 MULPD	%XMM13,%XMM10

(144) 0x41cabe MOVDQA	-0x200(%RBP),%XMM0

(144) 0x41cac6 MOVDQA	%XMM0,%XMM11

(144) 0x41cacb MOVDQA	%XMM0,%XMM8

(144) 0x41cad0 PMULUDQ	%XMM5,%XMM11

(144) 0x41cad5 PSRLQ	$0x20,%XMM8

(144) 0x41cadb PMULUDQ	%XMM5,%XMM8

(144) 0x41cae0 PMULUDQ	%XMM6,%XMM0

(144) 0x41cae4 MOVQ	-0xb8(%RBP),%XMM4

(144) 0x41caec PSHUFD	$0x44,%XMM4,%XMM4

(144) 0x41caf1 MOVDQA	-0x1f0(%RBP),%XMM2

(144) 0x41caf9 MOVDQA	%XMM2,%XMM7

(144) 0x41cafd PADDQ	%XMM8,%XMM0

(144) 0x41cb02 PSRLQ	$0x20,%XMM7

(144) 0x41cb07 MOVDQA	%XMM7,%XMM8

(144) 0x41cb0c PMULUDQ	%XMM5,%XMM8

(144) 0x41cb11 PSLLQ	$0x20,%XMM0

(144) 0x41cb16 MOVDQA	%XMM2,%XMM14

(144) 0x41cb1b PMULUDQ	%XMM6,%XMM14

(144) 0x41cb20 PADDQ	%XMM8,%XMM14

(144) 0x41cb25 PADDQ	%XMM12,%XMM11

(144) 0x41cb2a MOVDQA	%XMM2,%XMM13

(144) 0x41cb2f PMULUDQ	%XMM5,%XMM13

(144) 0x41cb34 PSLLQ	$0x20,%XMM14

(144) 0x41cb3a PADDQ	%XMM0,%XMM11

(144) 0x41cb3f PADDQ	%XMM12,%XMM13

(144) 0x41cb44 PADDQ	%XMM14,%XMM13

(144) 0x41cb49 MOVDQA	-0x1e0(%RBP),%XMM1

(144) 0x41cb51 MOVDQA	%XMM1,%XMM8

(144) 0x41cb56 PSLLQ	$0x3,%XMM11

(144) 0x41cb5c PSRLQ	$0x20,%XMM8

(144) 0x41cb62 MOVDQA	%XMM8,%XMM14

(144) 0x41cb67 PMULUDQ	%XMM5,%XMM14

(144) 0x41cb6c PADDQ	%XMM11,%XMM4

(144) 0x41cb71 MOVDQA	%XMM1,%XMM0

(144) 0x41cb75 PMULUDQ	%XMM6,%XMM0

(144) 0x41cb79 PADDQ	%XMM14,%XMM0

(144) 0x41cb7e MOVDQA	%XMM1,%XMM11

(144) 0x41cb83 PMULUDQ	%XMM5,%XMM11

(144) 0x41cb88 PSLLQ	$0x20,%XMM0

(144) 0x41cb8d PADDQ	%XMM11,%XMM0

(144) 0x41cb92 ADDPD	%XMM3,%XMM9

(144) 0x41cb97 MOVDQA	%XMM0,%XMM3

(144) 0x41cb9b PADDQ	%XMM12,%XMM3

(144) 0x41cba0 MOVQ	-0xa8(%RBP),%XMM11

(144) 0x41cba9 PSLLQ	$0x3,%XMM3

(144) 0x41cbae PSHUFD	$0x44,%XMM11,%XMM11

(144) 0x41cbb4 PADDQ	%XMM11,%XMM3

(144) 0x41cbb9 MOVQ	%XMM3,%RAX

(144) 0x41cbbe PSHUFD	$-0x12,%XMM3,%XMM3

(144) 0x41cbc3 MOVQ	%XMM3,%RCX

(144) 0x41cbc8 MOVQ	-0xb0(%RBP),%XMM3

(144) 0x41cbd0 PSHUFD	$0x44,%XMM3,%XMM14

(144) 0x41cbd6 PSLLQ	$0x3,%XMM13

(144) 0x41cbdc PADDQ	%XMM14,%XMM13

(144) 0x41cbe1 MOVQ	%XMM13,%R13

(144) 0x41cbe6 PADDQ	-0xe0(%RBP),%XMM0

(144) 0x41cbee PSHUFD	$-0x12,%XMM13,%XMM13

(144) 0x41cbf4 PSLLQ	$0x3,%XMM0

(144) 0x41cbf9 PADDQ	%XMM11,%XMM0

(144) 0x41cbfe MOVQ	%XMM0,%R15

(144) 0x41cc03 ADDPD	%XMM15,%XMM10

(144) 0x41cc08 PSHUFD	$-0x12,%XMM0,%XMM0

(144) 0x41cc0d MOVQ	%XMM0,%R10

(144) 0x41cc12 MOVSD	(%R15),%XMM3

(144) 0x41cc17 MOVSD	(%RAX),%XMM0

(144) 0x41cc1b MOVHPD	(%R10),%XMM3

(144) 0x41cc20 MOVHPD	(%RCX),%XMM0

(144) 0x41cc24 MOVQ	%XMM13,%RDX

(144) 0x41cc29 SUBPD	%XMM0,%XMM3

(144) 0x41cc2d MOVDQA	%XMM2,%XMM0

(144) 0x41cc31 MOVDQA	-0x280(%RBP),%XMM13

(144) 0x41cc3a PMULUDQ	%XMM13,%XMM7

(144) 0x41cc3f MOVDQA	-0x270(%RBP),%XMM15

(144) 0x41cc48 PMULUDQ	%XMM15,%XMM0

(144) 0x41cc4d PADDQ	%XMM7,%XMM0

(144) 0x41cc51 PMULUDQ	%XMM13,%XMM2

(144) 0x41cc56 PSLLQ	$0x20,%XMM0

(144) 0x41cc5b PADDQ	%XMM12,%XMM2

(144) 0x41cc60 PADDQ	%XMM0,%XMM2

(144) 0x41cc64 ADDPD	%XMM9,%XMM10

(144) 0x41cc69 PSLLQ	$0x3,%XMM2

(144) 0x41cc6e PADDQ	%XMM14,%XMM2

(144) 0x41cc73 MOVQ	%XMM2,%R11

(144) 0x41cc78 PSHUFD	$-0x12,%XMM2,%XMM0

(144) 0x41cc7d MOVQ	%XMM0,%R8

(144) 0x41cc82 MOV	%R8,-0x158(%RBP)

(144) 0x41cc89 PMULUDQ	%XMM13,%XMM8

(144) 0x41cc8e MOVDQA	%XMM1,%XMM0

(144) 0x41cc92 MULPD	0x7e7a5(%RIP),%XMM10

(144) 0x41cc9b PMULUDQ	%XMM15,%XMM0

(144) 0x41cca0 MOVDQA	%XMM15,%XMM14

(144) 0x41cca5 PADDQ	%XMM8,%XMM0

(144) 0x41ccaa MOVAPD	-0x210(%RBP),%XMM9

(144) 0x41ccb3 DIVPD	%XMM10,%XMM9

(144) 0x41ccb8 PMULUDQ	%XMM13,%XMM1

(144) 0x41ccbd PSLLQ	$0x20,%XMM0

(144) 0x41ccc2 MOVQ	%XMM4,%RDI

(144) 0x41ccc7 PADDQ	%XMM1,%XMM0

(144) 0x41cccb MOVDQA	%XMM0,%XMM8

(144) 0x41ccd0 PADDQ	%XMM12,%XMM8

(144) 0x41ccd5 PSHUFD	$-0x12,%XMM4,%XMM7

(144) 0x41ccda PSLLQ	$0x3,%XMM8

(144) 0x41cce0 PADDQ	%XMM11,%XMM8

(144) 0x41cce5 MOVQ	%XMM8,%R9

(144) 0x41ccea PSHUFD	$-0x12,%XMM8,%XMM4

(144) 0x41ccf0 MOVQ	%XMM4,%R14

(144) 0x41ccf5 MOVSD	(%R13),%XMM4

(144) 0x41ccfb MOVHPD	(%RDX),%XMM4

(144) 0x41ccff MOVDQA	-0xe0(%RBP),%XMM15

(144) 0x41cd08 PADDQ	%XMM15,%XMM0

(144) 0x41cd0d PSLLQ	$0x3,%XMM0

(144) 0x41cd12 PADDQ	%XMM11,%XMM0

(144) 0x41cd17 MOVSD	(%R9),%XMM8

(144) 0x41cd1c MOVHPD	(%R14),%XMM8

(144) 0x41cd21 MOVQ	%XMM0,%RSI

(144) 0x41cd26 MULPD	%XMM4,%XMM3

(144) 0x41cd2a PSHUFD	$-0x12,%XMM0,%XMM0

(144) 0x41cd2f MOVQ	%XMM0,%RBX

(144) 0x41cd34 MOVSD	(%RSI),%XMM4

(144) 0x41cd38 MOVSD	(%R11),%XMM10

(144) 0x41cd3d MOVHPD	(%RBX),%XMM4

(144) 0x41cd41 SUBPD	%XMM8,%XMM4

(144) 0x41cd46 MOVSD	(%RDI),%XMM0

(144) 0x41cd4a MOVHPD	(%R8),%XMM10

(144) 0x41cd4f MULPD	%XMM10,%XMM4

(144) 0x41cd54 MOVQ	%XMM7,%RDI

(144) 0x41cd59 MOVDQA	-0x1d0(%RBP),%XMM1

(144) 0x41cd61 MOVDQA	%XMM1,%XMM7

(144) 0x41cd65 PSRLQ	$0x20,%XMM7

(144) 0x41cd6a MOVDQA	%XMM1,%XMM8

(144) 0x41cd6f PMULUDQ	%XMM5,%XMM7

(144) 0x41cd73 PMULUDQ	%XMM6,%XMM8

(144) 0x41cd78 PADDQ	%XMM7,%XMM8

(144) 0x41cd7d MOVHPD	(%RDI),%XMM0

(144) 0x41cd81 MOVDQA	%XMM1,%XMM7

(144) 0x41cd85 PMULUDQ	%XMM5,%XMM7

(144) 0x41cd89 PSLLQ	$0x20,%XMM8

(144) 0x41cd8f ADDPD	%XMM3,%XMM4

(144) 0x41cd93 PADDQ	%XMM12,%XMM7

(144) 0x41cd98 PADDQ	%XMM8,%XMM7

(144) 0x41cd9d PSLLQ	$0x3,%XMM7

(144) 0x41cda2 MULPD	%XMM9,%XMM4

(144) 0x41cda7 MOVQ	-0x38(%RBP),%XMM3

(144) 0x41cdac PSHUFD	$0x44,%XMM3,%XMM3

(144) 0x41cdb1 PADDQ	%XMM7,%XMM3

(144) 0x41cdb5 ADDPD	%XMM0,%XMM4

(144) 0x41cdb9 MOVQ	%XMM3,%RDI

(144) 0x41cdbe MOV	%RDI,-0x150(%RBP)

(144) 0x41cdc5 MOVLPD	%XMM4,(%RDI)

(144) 0x41cdc9 PSHUFD	$-0x12,%XMM3,%XMM0

(144) 0x41cdce MOVQ	%XMM0,%R12

(144) 0x41cdd3 MOVHPD	%XMM4,(%R12)

(144) 0x41cdd9 MOVSD	(%RAX),%XMM3

(144) 0x41cddd MOVDQA	-0x1c0(%RBP),%XMM1

(144) 0x41cde5 MOVDQA	%XMM1,%XMM4

(144) 0x41cde9 PSRLQ	$0x20,%XMM4

(144) 0x41cdee MOVDQA	%XMM1,%XMM0

(144) 0x41cdf2 MOVDQA	-0x1b0(%RBP),%XMM2

(144) 0x41cdfa MOVDQA	%XMM2,%XMM7

(144) 0x41cdfe PSRLQ	$0x20,%XMM7

(144) 0x41ce03 PMULUDQ	%XMM5,%XMM4

(144) 0x41ce07 PMULUDQ	%XMM5,%XMM7

(144) 0x41ce0b MOVDQA	%XMM2,%XMM8

(144) 0x41ce10 PMULUDQ	%XMM6,%XMM8

(144) 0x41ce15 PADDQ	%XMM7,%XMM8

(144) 0x41ce1a MOVDQA	%XMM2,%XMM7

(144) 0x41ce1e PMULUDQ	%XMM5,%XMM7

(144) 0x41ce22 PSLLQ	$0x20,%XMM8

(144) 0x41ce28 PMULUDQ	%XMM6,%XMM0

(144) 0x41ce2c PADDQ	%XMM7,%XMM8

(144) 0x41ce31 MOVDQA	%XMM8,%XMM10

(144) 0x41ce36 PADDQ	%XMM12,%XMM10

(144) 0x41ce3b PADDQ	%XMM4,%XMM0

(144) 0x41ce3f PSLLQ	$0x3,%XMM10

(144) 0x41ce45 MOVQ	-0x98(%RBP),%XMM4

(144) 0x41ce4d PSHUFD	$0x44,%XMM4,%XMM4

(144) 0x41ce52 PADDQ	%XMM4,%XMM10

(144) 0x41ce57 PADDQ	%XMM15,%XMM8

(144) 0x41ce5c PSLLQ	$0x3,%XMM8

(144) 0x41ce62 PADDQ	%XMM4,%XMM8

(144) 0x41ce67 MOVDQA	%XMM1,%XMM7

(144) 0x41ce6b PMULUDQ	%XMM5,%XMM7

(144) 0x41ce6f PSLLQ	$0x20,%XMM0

(144) 0x41ce74 PADDQ	%XMM12,%XMM7

(144) 0x41ce79 PADDQ	%XMM0,%XMM7

(144) 0x41ce7d PSHUFD	$-0x12,%XMM10,%XMM0

(144) 0x41ce83 MOVHPD	(%RCX),%XMM3

(144) 0x41ce87 MOVQ	%XMM10,%RCX

(144) 0x41ce8c MOV	%RCX,-0x140(%RBP)

(144) 0x41ce93 MOVSD	(%R9),%XMM4

(144) 0x41ce98 MOVHPD	(%R14),%XMM4

(144) 0x41ce9d MOVQ	%XMM8,%RAX

(144) 0x41cea2 MOV	%RAX,-0x148(%RBP)

(144) 0x41cea9 PSHUFD	$-0x12,%XMM8,%XMM8

(144) 0x41ceaf MOVQ	%XMM8,%R14

(144) 0x41ceb4 MOVSD	(%R15),%XMM8

(144) 0x41ceb9 MOVQ	%XMM0,%R15

(144) 0x41cebe MOVQ	-0x48(%RBP),%XMM0

(144) 0x41cec3 MOVHPD	(%R10),%XMM8

(144) 0x41cec8 SUBPD	%XMM3,%XMM4

(144) 0x41cecc MOVSD	(%RSI),%XMM3

(144) 0x41ced0 MOVHPD	(%RBX),%XMM3

(144) 0x41ced4 SUBPD	%XMM8,%XMM3

(144) 0x41ced9 MOVSD	(%RCX),%XMM8

(144) 0x41cede MOVHPD	(%R15),%XMM8

(144) 0x41cee3 MULPD	%XMM8,%XMM4

(144) 0x41cee8 MOVSD	(%RAX),%XMM8

(144) 0x41ceed MOVHPD	(%R14),%XMM8

(144) 0x41cef2 PSLLQ	$0x3,%XMM7

(144) 0x41cef7 PSHUFD	$0x44,%XMM0,%XMM0

(144) 0x41cefc MULPD	%XMM8,%XMM3

(144) 0x41cf01 MOVDQA	-0x1a0(%RBP),%XMM1

(144) 0x41cf09 MOVDQA	%XMM1,%XMM8

(144) 0x41cf0e PADDQ	%XMM7,%XMM0

(144) 0x41cf12 PSRLQ	$0x20,%XMM8

(144) 0x41cf18 PMULUDQ	%XMM5,%XMM8

(144) 0x41cf1d MOVDQA	%XMM1,%XMM7

(144) 0x41cf21 PMULUDQ	%XMM6,%XMM7

(144) 0x41cf25 PADDQ	%XMM8,%XMM7

(144) 0x41cf2a MOVQ	%XMM0,%RCX

(144) 0x41cf2f PSHUFD	$-0x12,%XMM0,%XMM0

(144) 0x41cf34 MOVQ	%XMM0,%RAX

(144) 0x41cf39 MOVDQA	%XMM1,%XMM0

(144) 0x41cf3d PMULUDQ	%XMM5,%XMM0

(144) 0x41cf41 PSLLQ	$0x20,%XMM7

(144) 0x41cf46 PADDQ	%XMM12,%XMM0

(144) 0x41cf4b PADDQ	%XMM7,%XMM0

(144) 0x41cf4f MOVQ	-0x90(%RBP),%XMM7

(144) 0x41cf57 PSHUFD	$0x44,%XMM7,%XMM7

(144) 0x41cf5c PSLLQ	$0x3,%XMM0

(144) 0x41cf61 PADDQ	%XMM0,%XMM7

(144) 0x41cf65 MOVQ	%XMM7,%R10

(144) 0x41cf6a PSHUFD	$-0x12,%XMM7,%XMM0

(144) 0x41cf6f MOVSD	(%RCX),%XMM8

(144) 0x41cf74 MOVQ	%XMM0,%R9

(144) 0x41cf79 MOVDQA	-0x190(%RBP),%XMM1

(144) 0x41cf81 MOVDQA	%XMM1,%XMM0

(144) 0x41cf85 PMULUDQ	%XMM5,%XMM0

(144) 0x41cf89 ADDPD	%XMM4,%XMM3

(144) 0x41cf8d MOVDQA	%XMM1,%XMM7

(144) 0x41cf91 PSRLQ	$0x20,%XMM7

(144) 0x41cf96 PMULUDQ	%XMM7,%XMM5

(144) 0x41cf9a PMULUDQ	%XMM1,%XMM6

(144) 0x41cf9e PADDQ	%XMM5,%XMM6

(144) 0x41cfa2 MOVHPD	(%RAX),%XMM8

(144) 0x41cfa7 MULPD	%XMM9,%XMM3

(144) 0x41cfac PSLLQ	$0x20,%XMM6

(144) 0x41cfb1 PADDQ	%XMM0,%XMM6

(144) 0x41cfb5 MOVDQA	%XMM6,%XMM0

(144) 0x41cfb9 ADDPD	%XMM8,%XMM3

(144) 0x41cfbe PADDQ	%XMM12,%XMM0

(144) 0x41cfc3 PSLLQ	$0x3,%XMM0

(144) 0x41cfc8 MOVQ	-0x88(%RBP),%XMM4

(144) 0x41cfd0 MOVLPD	%XMM3,(%R10)

(144) 0x41cfd5 PSHUFD	$0x44,%XMM4,%XMM4

(144) 0x41cfda PADDQ	%XMM4,%XMM0

(144) 0x41cfde MOVQ	%XMM0,%R8

(144) 0x41cfe3 MOVHPD	%XMM3,(%R9)

(144) 0x41cfe8 PSHUFD	$-0x12,%XMM0,%XMM0

(144) 0x41cfed PADDQ	%XMM15,%XMM6

(144) 0x41cff2 PSLLQ	$0x3,%XMM6

(144) 0x41cff7 MOVSD	(%R13),%XMM3

(144) 0x41cffd PADDQ	%XMM4,%XMM6

(144) 0x41d001 MOVQ	%XMM6,%RBX

(144) 0x41d006 MOVHPD	(%RDX),%XMM3

(144) 0x41d00a PSHUFD	$-0x12,%XMM6,%XMM5

(144) 0x41d00f MOVQ	%XMM5,%RDI

(144) 0x41d014 MOVSD	(%R11),%XMM5

(144) 0x41d019 MOVQ	%XMM0,%R11

(144) 0x41d01e MOVDQA	%XMM1,%XMM0

(144) 0x41d022 PMULUDQ	%XMM13,%XMM0

(144) 0x41d027 PMULUDQ	%XMM13,%XMM7

(144) 0x41d02c MOVDQA	%XMM14,%XMM2

(144) 0x41d031 PMULUDQ	%XMM1,%XMM2

(144) 0x41d035 PADDQ	%XMM7,%XMM2

(144) 0x41d039 PSLLQ	$0x20,%XMM2

(144) 0x41d03e PADDQ	%XMM0,%XMM2

(144) 0x41d042 MOVSD	(%R8),%XMM0

(144) 0x41d047 PADDQ	%XMM2,%XMM12

(144) 0x41d04c MOVDQA	%XMM2,%XMM6

(144) 0x41d050 PADDQ	%XMM15,%XMM6

(144) 0x41d055 MOVHPD	(%R11),%XMM0

(144) 0x41d05a MOVSD	(%RBX),%XMM1

(144) 0x41d05e PSLLQ	$0x3,%XMM12

(144) 0x41d064 MOV	-0x158(%RBP),%RAX

(144) 0x41d06b MOVHPD	(%RAX),%XMM5

(144) 0x41d06f PADDQ	%XMM4,%XMM12

(144) 0x41d074 MOVQ	%XMM12,%RCX

(144) 0x41d079 MOVHPD	(%RDI),%XMM1

(144) 0x41d07d PSHUFD	$-0x12,%XMM12,%XMM2

(144) 0x41d083 PSLLQ	$0x3,%XMM6

(144) 0x41d088 PADDQ	%XMM4,%XMM6

(144) 0x41d08c MOVSD	(%RCX),%XMM4

(144) 0x41d090 MOVQ	%XMM2,%RAX

(144) 0x41d095 MOVHPD	(%RAX),%XMM4

(144) 0x41d099 SUBPD	%XMM0,%XMM1

(144) 0x41d09d PSHUFD	$-0x12,%XMM6,%XMM0

(144) 0x41d0a2 MOVQ	%XMM6,%R13

(144) 0x41d0a7 MOVSD	(%R13),%XMM2

(144) 0x41d0ad MOVQ	%XMM0,%RDX

(144) 0x41d0b2 MOVHPD	(%RDX),%XMM2

(144) 0x41d0b6 SUBPD	%XMM4,%XMM2

(144) 0x41d0ba MULPD	%XMM3,%XMM1

(144) 0x41d0be MULPD	%XMM5,%XMM2

(144) 0x41d0c2 MOV	-0x150(%RBP),%RSI

(144) 0x41d0c9 MOVSD	(%RSI),%XMM0

(144) 0x41d0cd MOVHPD	(%R12),%XMM0

(144) 0x41d0d3 ADDPD	%XMM1,%XMM2

(144) 0x41d0d7 MULPD	%XMM9,%XMM2

(144) 0x41d0dc ADDPD	%XMM0,%XMM2

(144) 0x41d0e0 MOVLPD	%XMM2,(%RSI)

(144) 0x41d0e4 MOVHPD	%XMM2,(%R12)

(144) 0x41d0ea MOVSD	(%R8),%XMM0

(144) 0x41d0ef MOVHPD	(%R11),%XMM0

(144) 0x41d0f4 MOVSD	(%RCX),%XMM1

(144) 0x41d0f8 MOVHPD	(%RAX),%XMM1

(144) 0x41d0fc MOV	-0x160(%RBP),%RAX

(144) 0x41d103 MOVSD	(%RBX),%XMM2

(144) 0x41d107 SUBPD	%XMM0,%XMM1

(144) 0x41d10b MOV	-0x140(%RBP),%RCX

(144) 0x41d112 MOVSD	(%RCX),%XMM0

(144) 0x41d116 MOVHPD	(%RDI),%XMM2

(144) 0x41d11a MOVHPD	(%R15),%XMM0

(144) 0x41d11f MULPD	%XMM0,%XMM1

(144) 0x41d123 MOVSD	(%R13),%XMM0

(144) 0x41d129 MOVHPD	(%RDX),%XMM0

(144) 0x41d12d SUBPD	%XMM2,%XMM0

(144) 0x41d131 MOV	-0x148(%RBP),%RCX

(144) 0x41d138 MOVSD	(%RCX),%XMM2

(144) 0x41d13c MOVHPD	(%R14),%XMM2

(144) 0x41d141 MULPD	%XMM2,%XMM0

(144) 0x41d145 ADDPD	%XMM1,%XMM0

(144) 0x41d149 MULPD	%XMM9,%XMM0

(144) 0x41d14e MOVSD	(%R10),%XMM1

(144) 0x41d153 MOVHPD	(%R9),%XMM1

(144) 0x41d158 ADDPD	%XMM1,%XMM0

(144) 0x41d15c MOVDQA	-0x60(%RBP),%XMM1

(144) 0x41d161 MOVLPD	%XMM0,(%R10)

(144) 0x41d166 MOVHPD	%XMM0,(%R9)

(144) 0x41d16b PADDQ	0x7e2dd(%RIP),%XMM1

(144) 0x41d173 ADD	$0x2,%RAX

(144) 0x41d177 MOV	-0xf0(%RBP),%RCX

(144) 0x41d17e CMP	%RCX,%RAX

(144) 0x41d181 JB	41c780

0x41d187 MOV	%RCX,%RSI

0x41d18a CMP	%RCX,-0xe8(%RBP)

0x41d191 MOVAPD	-0x180(%RBP),%XMM4

0x41d199 MOV	-0x30(%RBP),%RAX

0x41d19d JNE	41d1cf

0x41d19f MOV	$0x4b73f0,%EDI

0x41d1a4 MOV	-0x4c(%RBP),%ESI

0x41d1a7 ADD	$0x258,%RSP

0x41d1ae POP	%RBX

0x41d1af POP	%R12

0x41d1b1 POP	%R13

0x41d1b3 POP	%R14

0x41d1b5 POP	%R15

0x41d1b7 POP	%RBP

0x41d1b8 JMP	403050

0x41d1bd ADD	$0x258,%RSP

0x41d1c4 POP	%RBX

0x41d1c5 POP	%R12

0x41d1c7 POP	%R13

0x41d1c9 POP	%R14

0x41d1cb POP	%R15

0x41d1cd POP	%RBP

0x41d1ce RET

0x41d1cf ADD	%RSI,%RAX

0x41d1d2 JMP	41d486

0x41d1d7 NOPW	(%RAX,%RAX,1)

(143) 0x41d1e0 XOR	%EDX,%EDX

(143) 0x41d1e2 DIVQ	-0x40(%RBP)

(143) 0x41d1e6 MOV	-0x68(%RBP),%R13

(143) 0x41d1ea ADD	-0x78(%RBP),%EDX

(143) 0x41d1ed MOV	%EAX,%R8D

(143) 0x41d1f0 MOV	-0x80(%RBP),%R10

(143) 0x41d1f4 ADD	%R10D,%EAX

(143) 0x41d1f7 DEC	%EAX

(143) 0x41d1f9 MOVSXD	%EAX,%R15

(143) 0x41d1fc MOV	-0x70(%RBP),%R12

(143) 0x41d200 MOV	%R12,%RCX

(143) 0x41d203 IMUL	%R15,%RCX

(143) 0x41d207 MOVSXD	%EDX,%RDX

(143) 0x41d20a LEA	(%RCX,%RDX,1),%RAX

(143) 0x41d20e DEC	%RAX

(143) 0x41d211 MOV	-0x130(%RBP),%R11

(143) 0x41d218 MOV	%R11,%RDI

(143) 0x41d21b IMUL	%R15,%RDI

(143) 0x41d21f LEA	(%RDI,%RDX,1),%R9

(143) 0x41d223 DEC	%R9

(143) 0x41d226 MOV	-0xc0(%RBP),%RBX

(143) 0x41d22d MOVSD	(%RBX,%R9,8),%XMM0

(143) 0x41d233 MOV	-0xa0(%RBP),%R14

(143) 0x41d23a MULSD	(%R14,%RAX,8),%XMM0

(143) 0x41d240 ADD	%R10D,%R8D

(143) 0x41d243 MOVSXD	%R8D,%RSI

(143) 0x41d246 MOV	%R12,%R8

(143) 0x41d249 IMUL	%RSI,%R8

(143) 0x41d24d LEA	(%R8,%RDX,1),%R9

(143) 0x41d251 DEC	%R9

(143) 0x41d254 MOV	%R11,%R10

(143) 0x41d257 IMUL	%RSI,%R10

(143) 0x41d25b LEA	(%R10,%RDX,1),%R11

(143) 0x41d25f DEC	%R11

(143) 0x41d262 MOVSD	(%RBX,%R11,8),%XMM1

(143) 0x41d268 MULSD	(%R14,%R9,8),%XMM1

(143) 0x41d26e ADD	%RDX,%R8

(143) 0x41d271 ADD	%RDX,%R10

(143) 0x41d274 MOVSD	(%RBX,%R10,8),%XMM2

(143) 0x41d27a MULSD	(%R14,%R8,8),%XMM2

(143) 0x41d280 ADDSD	%XMM0,%XMM1

(143) 0x41d284 ADD	%RDX,%RCX

(143) 0x41d287 ADD	%RDX,%RDI

(143) 0x41d28a MOVSD	(%RBX,%RDI,8),%XMM3

(143) 0x41d28f MULSD	(%R14,%RCX,8),%XMM3

(143) 0x41d295 ADDSD	%XMM2,%XMM3

(143) 0x41d299 ADDSD	%XMM1,%XMM3

(143) 0x41d29d MULSD	0x7e17b(%RIP),%XMM3

(143) 0x41d2a5 MOVAPD	%XMM4,%XMM0

(143) 0x41d2a9 DIVSD	%XMM3,%XMM0

(143) 0x41d2ad MOV	-0x128(%RBP),%RCX

(143) 0x41d2b4 IMUL	%RSI,%RCX

(143) 0x41d2b8 ADD	%RDX,%RCX

(143) 0x41d2bb MOV	-0x120(%RBP),%R8

(143) 0x41d2c2 MOV	%R8,%RDI

(143) 0x41d2c5 IMUL	%RSI,%RDI

(143) 0x41d2c9 MOV	%R13,%R11

(143) 0x41d2cc IMUL	%RSI,%R11

(143) 0x41d2d0 LEA	(%R11,%RDX,1),%R10

(143) 0x41d2d4 DEC	%R10

(143) 0x41d2d7 ADD	%RDX,%R11

(143) 0x41d2da MOV	-0xa8(%RBP),%R12

(143) 0x41d2e1 MOVSD	(%R12,%R10,8),%XMM1

(143) 0x41d2e7 SUBSD	(%R12,%R11,8),%XMM1

(143) 0x41d2ed ADD	%RDX,%RDI

(143) 0x41d2f0 MOV	%R13,%R14

(143) 0x41d2f3 MOV	-0xb0(%RBP),%R13

(143) 0x41d2fa MULSD	(%R13,%RDI,8),%XMM1

(143) 0x41d301 IMUL	%R15,%R8

(143) 0x41d305 IMUL	%R15,%R14

(143) 0x41d309 LEA	(%R14,%RDX,1),%RBX

(143) 0x41d30d DEC	%RBX

(143) 0x41d310 ADD	%RDX,%R14

(143) 0x41d313 MOVSD	(%R12,%RBX,8),%XMM2

(143) 0x41d319 SUBSD	(%R12,%R14,8),%XMM2

(143) 0x41d31f ADD	%RDX,%R8

(143) 0x41d322 MULSD	(%R13,%R8,8),%XMM2

(143) 0x41d329 ADDSD	%XMM1,%XMM2

(143) 0x41d32d MULSD	%XMM0,%XMM2

(143) 0x41d331 MOV	-0xb8(%RBP),%R9

(143) 0x41d338 ADDSD	(%R9,%RCX,8),%XMM2

(143) 0x41d33e MOV	-0x118(%RBP),%R9

(143) 0x41d345 IMUL	%RSI,%R9

(143) 0x41d349 ADD	%RDX,%R9

(143) 0x41d34c MOV	-0x38(%RBP),%RAX

(143) 0x41d350 MOVSD	%XMM2,(%RAX,%R9,8)

(143) 0x41d356 MOVSD	(%R12,%R14,8),%XMM1

(143) 0x41d35c MOV	-0x110(%RBP),%RCX

(143) 0x41d363 IMUL	%RSI,%RCX

(143) 0x41d367 SUBSD	(%R12,%R11,8),%XMM1

(143) 0x41d36d ADD	%RDX,%RCX

(143) 0x41d370 MOV	-0x108(%RBP),%R11

(143) 0x41d377 IMUL	%RSI,%R11

(143) 0x41d37b MOVSD	(%R12,%RBX,8),%XMM2

(143) 0x41d381 LEA	(%R11,%RDX,1),%RBX

(143) 0x41d385 MOV	-0x98(%RBP),%R14

(143) 0x41d38c MULSD	(%R14,%RBX,8),%XMM1

(143) 0x41d392 LEA	-0x1(%R11,%RDX,1),%RAX

(143) 0x41d397 MOV	%RAX,-0x60(%RBP)

(143) 0x41d39b SUBSD	(%R12,%R10,8),%XMM2

(143) 0x41d3a1 MULSD	(%R14,%RAX,8),%XMM2

(143) 0x41d3a7 ADDSD	%XMM1,%XMM2

(143) 0x41d3ab MULSD	%XMM0,%XMM2

(143) 0x41d3af MOV	-0x48(%RBP),%R10

(143) 0x41d3b3 ADDSD	(%R10,%RCX,8),%XMM2

(143) 0x41d3b9 MOV	-0x100(%RBP),%R10

(143) 0x41d3c0 IMUL	%RSI,%R10

(143) 0x41d3c4 ADD	%RDX,%R10

(143) 0x41d3c7 MOV	-0x90(%RBP),%R12

(143) 0x41d3ce MOVSD	%XMM2,(%R12,%R10,8)

(143) 0x41d3d4 MOV	-0xf8(%RBP),%RCX

(143) 0x41d3db IMUL	%RCX,%RSI

(143) 0x41d3df LEA	(%RSI,%RDX,1),%R11

(143) 0x41d3e3 DEC	%R11

(143) 0x41d3e6 ADD	%RDX,%RSI

(143) 0x41d3e9 MOV	-0x88(%RBP),%RAX

(143) 0x41d3f0 MOVSD	(%RAX,%R11,8),%XMM1

(143) 0x41d3f6 SUBSD	(%RAX,%RSI,8),%XMM1

(143) 0x41d3fb MULSD	(%R13,%RDI,8),%XMM1

(143) 0x41d402 IMUL	%RCX,%R15

(143) 0x41d406 LEA	(%R15,%RDX,1),%RDI

(143) 0x41d40a ADD	%R15,%RDX

(143) 0x41d40d DEC	%RDX

(143) 0x41d410 MOV	-0x38(%RBP),%R15

(143) 0x41d414 MOVSD	(%RAX,%RDX,8),%XMM2

(143) 0x41d419 SUBSD	(%RAX,%RDI,8),%XMM2

(143) 0x41d41e MULSD	(%R13,%R8,8),%XMM2

(143) 0x41d425 ADDSD	%XMM1,%XMM2

(143) 0x41d429 MULSD	%XMM0,%XMM2

(143) 0x41d42d ADDSD	(%R15,%R9,8),%XMM2

(143) 0x41d433 MOVSD	%XMM2,(%R15,%R9,8)

(143) 0x41d439 MOVSD	(%RAX,%RDI,8),%XMM1

(143) 0x41d43e SUBSD	(%RAX,%RSI,8),%XMM1

(143) 0x41d443 MULSD	(%R14,%RBX,8),%XMM1

(143) 0x41d449 MOVSD	(%RAX,%RDX,8),%XMM2

(143) 0x41d44e SUBSD	(%RAX,%R11,8),%XMM2

(143) 0x41d454 MOV	-0x60(%RBP),%RAX

(143) 0x41d458 MULSD	(%R14,%RAX,8),%XMM2

(143) 0x41d45e ADDSD	%XMM1,%XMM2

(143) 0x41d462 MULSD	%XMM0,%XMM2

(143) 0x41d466 ADDSD	(%R12,%R10,8),%XMM2

(143) 0x41d46c MOVSD	%XMM2,(%R12,%R10,8)

(143) 0x41d472 MOV	-0x30(%RBP),%RAX

(143) 0x41d476 INC	%RAX

(143) 0x41d479 CMP	%RAX,-0x138(%RBP)

(143) 0x41d480 JE	41d19f

(143) 0x41d486 MOV	%RAX,%RCX

(143) 0x41d489 SHR	$0x20,%RCX

(143) 0x41d48d MOV	%RAX,-0x30(%RBP)

(143) 0x41d491 JNE	41d1e0

(143) 0x41d497 XOR	%EDX,%EDX

(143) 0x41d499 DIVL	-0x40(%RBP)

(143) 0x41d49c JMP	41d1e6

0x41d4a1 NOPW	%CS:(%RAX,%RAX,1)

0x41d4ab NOPL	(%RAX,%RAX,1)

Coverage (%)	Name	Source Location	Module
►100.00+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run orig_0

Source file and lines	accelerate.cpp:40-54
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_GNR/173-814-2343/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/accelerate.cpp:40-54
/home/eoseret/qaas_runs_GNR/173-814-2343/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:69

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 31.83 to 13.50 cycles (2.36x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is poorly vectorized. Only 15% of vector register length is used (average across all SSE/AVX instructions). By fully vectorizing your function, you can lower the cost of an iteration from 31.83 to 4.44 cycles (7.17x speedup).

Details

29% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

15% of SSE/AVX loads are used in vector version.
28% of SSE/AVX stores are used in vector version.
14% of SSE/AVX addition or subtraction instructions are used in vector version.
45% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

__kmpc_for_static_init_8@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-814-2343/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/accelerate.cpp:40

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 400 bytes. The binary function is storing 536 bytes.

General properties

nb instructions	190
nb uops	191
loop length	920
used x86 registers	16
used mmx registers	0
used xmm registers	3
used ymm registers	0
used zmm registers	0
nb stack references	60

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	31.83 cycles
front end	31.83 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	6.70	13.50	20.67	20.67	31.50	13.50	6.70	31.50	31.50	31.50	6.60	20.67
cycles	6.70	13.50	20.67	20.67	31.50	13.50	6.70	31.50	31.50	31.50	6.60	20.67

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	31.83
Dispatch	31.50
Overall L1	31.83

Vectorization ratios

INT

all	27%
load	5%
store	26%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	14%
fma	NA (no fma vectorizable/vectorized instructions)
other	46%

all	75%
load	100%
store	100%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	29%
load	15%
store	28%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	14%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	45%

Vector efficiency ratios

INT

all	15%
load	12%
store	15%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	13%
fma	NA (no fma vectorizable/vectorized instructions)
other	17%

all	21%
load	25%
store	25%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

INT+FP

all	15%
load	14%
store	15%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	13%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	17%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 31.83 cycles. At this rate:

6% of peak load performance is reached (12.57 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
13% of peak store performance is reached (16.84 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck).

ASM code

In the binary file, the address of the function is: 41c450

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
SUB $0x258,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %R9,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R8,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RCX,-0x60(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x68(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x58(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x50(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x38(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x30(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x28(%RBP),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x20(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x18(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOVQ 0x40(%RBP),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x10(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x48(%RBP),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RSI,-0x80(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVL $0,-0x50(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
TEST %RAX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JS 41d1bd <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0xd6d>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R11,-0x48(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDX,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R9,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R8,-0xe0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R10,-0x78(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RCX,-0x40(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV (%RDI),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOVQ $0,-0xd0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %RAX,-0xc8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVQ $0x1,-0x168(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
LEA -0x168(%RBP),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x50(%RBP),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0xd0(%RBP),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0xc8(%RBP),%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV $0x4b73d0,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %ESI,-0x4c(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
PUSH $0x1	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH $0x1	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RAX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOVDQA %XMM0,-0x180(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
CALL 4031f0 <__kmpc_for_static_init_8@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOVAPD -0x180(%RBP),%XMM4	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (25.0%)
ADD $0x20,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0xd0(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0xc8(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
CMP %RCX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JA 41d19f <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0xd4f>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RCX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x40(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV -0x78(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
SUB %ECX,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV (%R13),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RDI,-0x70(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x10(%R13),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV %R8,-0xa0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV (%R14),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x10(%R14),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RDI,-0xc0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV (%R15),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x10(%R15),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RDI,-0xb8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x38(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RDI),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x10(%RDI),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RDI,-0xb0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV (%RBX),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x10(%RBX),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RDI,-0xa8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x60(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R12,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%R12),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x10(%R9),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV %R11,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x48(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R9),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x10(%R9),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R9,-0x48(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV (%RDI),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x10(%RDI),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R14,-0x98(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0xe0(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RDI),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x10(%RDI),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RBX,-0x90(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x30(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RDI),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x10(%RDI),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RDI,-0x88(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
INC %RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RSI,-0x138(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RSI,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RAX,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV $-0x2,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
AND %RDI,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
MOV %R8,-0x130(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R15,-0x120(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R13,-0x68(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RBX,-0xf8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDX,-0x40(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R10,-0x128(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R12,-0x118(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R11,-0x110(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R9,-0x108(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R14,-0x100(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JE 41d486 <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0x1036>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RDI,-0xe8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVD %EDX,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	scal (6.3%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x260(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVD -0x80(%RBP),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	0.33	scal (6.3%)
PSHUFD $0x50,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x250(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVD %ECX,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	scal (6.3%)
PSHUFD $0x50,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x240(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVQ -0x70(%RBP),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x230(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVQ %R8,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x220(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
UNPCKLPD %XMM4,%XMM4	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
MOVAPD %XMM4,-0x210(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVQ %R10,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x200(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVQ %R15,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x1f0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVQ %R13,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x1e0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVQ %R12,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x1d0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVQ %R11,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x1c0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVQ %R9,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x1b0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVQ %R14,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x1a0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVQ %RBX,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x190(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOV %RAX,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVQ %RAX,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM1	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
PADDQ 0x7ecc7(%RIP),%XMM1	1	0.33	0.33	0.33	0.33	0	0.33	0	0	0	0	0	0.33	1	0.33	vect (25.0%)
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RSI,-0xf0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RCX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %RCX,-0xe8(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
MOVAPD -0x180(%RBP),%XMM4	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (25.0%)
MOV -0x30(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JNE 41d1cf <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0xd7f>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV $0x4b73f0,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0x4c(%RBP),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD $0x258,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
JMP 403050 <__kmpc_for_static_fini@plt>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
ADD $0x258,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
ADD %RSI,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
JMP 41d486 <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0x1036>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run orig_0

Source file and lines	accelerate.cpp:40-54
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_GNR/173-814-2343/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/accelerate.cpp:40-54
/home/eoseret/qaas_runs_GNR/173-814-2343/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:69

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

29% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

15% of SSE/AVX loads are used in vector version.
28% of SSE/AVX stores are used in vector version.
14% of SSE/AVX addition or subtraction instructions are used in vector version.
45% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

__kmpc_for_static_init_8@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-814-2343/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/accelerate.cpp:40

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 400 bytes. The binary function is storing 536 bytes.

General properties

nb instructions	190
nb uops	191
loop length	920
used x86 registers	16
used mmx registers	0
used xmm registers	3
used ymm registers	0
used zmm registers	0
nb stack references	60

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	31.83 cycles
front end	31.83 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	6.70	13.50	20.67	20.67	31.50	13.50	6.70	31.50	31.50	31.50	6.60	20.67
cycles	6.70	13.50	20.67	20.67	31.50	13.50	6.70	31.50	31.50	31.50	6.60	20.67

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	31.83
Dispatch	31.50
Overall L1	31.83

Vectorization ratios

INT

all	27%
load	5%
store	26%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	14%
fma	NA (no fma vectorizable/vectorized instructions)
other	46%

all	75%
load	100%
store	100%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	29%
load	15%
store	28%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	14%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	45%

Vector efficiency ratios

INT

all	15%
load	12%
store	15%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	13%
fma	NA (no fma vectorizable/vectorized instructions)
other	17%

all	21%
load	25%
store	25%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

INT+FP

all	15%
load	14%
store	15%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	13%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	17%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 31.83 cycles. At this rate:

6% of peak load performance is reached (12.57 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
13% of peak store performance is reached (16.84 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck).

ASM code

In the binary file, the address of the function is: 41c450

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
SUB $0x258,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %R9,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R8,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RCX,-0x60(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x68(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x58(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x50(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x38(%RBP),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x30(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x28(%RBP),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x20(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x18(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOVQ 0x40(%RBP),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x10(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x48(%RBP),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RSI,-0x80(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVL $0,-0x50(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
TEST %RAX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JS 41d1bd <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0xd6d>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R11,-0x48(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDX,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R9,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R8,-0xe0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R10,-0x78(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RCX,-0x40(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV (%RDI),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOVQ $0,-0xd0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %RAX,-0xc8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVQ $0x1,-0x168(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
LEA -0x168(%RBP),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x50(%RBP),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0xd0(%RBP),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0xc8(%RBP),%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV $0x4b73d0,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %ESI,-0x4c(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
PUSH $0x1	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH $0x1	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RAX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOVDQA %XMM0,-0x180(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
CALL 4031f0 <__kmpc_for_static_init_8@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOVAPD -0x180(%RBP),%XMM4	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (25.0%)
ADD $0x20,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0xd0(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0xc8(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
CMP %RCX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JA 41d19f <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0xd4f>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RCX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x40(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV -0x78(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
SUB %ECX,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV (%R13),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RDI,-0x70(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV 0x10(%R13),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV %R8,-0xa0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV (%R14),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x10(%R14),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RDI,-0xc0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV (%R15),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x10(%R15),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RDI,-0xb8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x38(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RDI),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x10(%RDI),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RDI,-0xb0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV (%RBX),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x10(%RBX),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RDI,-0xa8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x60(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R12,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%R12),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x10(%R9),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV %R11,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x48(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R9),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x10(%R9),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R9,-0x48(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV (%RDI),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x10(%RDI),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R14,-0x98(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0xe0(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RDI),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x10(%RDI),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RBX,-0x90(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV -0x30(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RDI),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x10(%RDI),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RDI,-0x88(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
INC %RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RSI,-0x138(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RSI,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RAX,%RDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV $-0x2,%ESI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
AND %RDI,%RSI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
MOV %R8,-0x130(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R15,-0x120(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R13,-0x68(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RBX,-0xf8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDX,-0x40(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R10,-0x128(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R12,-0x118(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R11,-0x110(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R9,-0x108(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R14,-0x100(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JE 41d486 <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0x1036>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RDI,-0xe8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVD %EDX,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	scal (6.3%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x260(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVD -0x80(%RBP),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	0.33	scal (6.3%)
PSHUFD $0x50,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x250(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVD %ECX,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	scal (6.3%)
PSHUFD $0x50,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x240(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVQ -0x70(%RBP),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x230(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVQ %R8,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x220(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
UNPCKLPD %XMM4,%XMM4	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
MOVAPD %XMM4,-0x210(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVQ %R10,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x200(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVQ %R15,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x1f0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVQ %R13,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x1e0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVQ %R12,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x1d0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVQ %R11,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x1c0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVQ %R9,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x1b0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVQ %R14,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x1a0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVQ %RBX,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x190(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOV %RAX,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVQ %RAX,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM1	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
PADDQ 0x7ecc7(%RIP),%XMM1	1	0.33	0.33	0.33	0.33	0	0.33	0	0	0	0	0	0.33	1	0.33	vect (25.0%)
XOR %EAX,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RSI,-0xf0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RCX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
CMP %RCX,-0xe8(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
MOVAPD -0x180(%RBP),%XMM4	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	0-1	0.33	vect (25.0%)
MOV -0x30(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JNE 41d1cf <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0xd7f>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV $0x4b73f0,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0x4c(%RBP),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
ADD $0x258,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
JMP 403050 <__kmpc_for_static_fini@plt>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
ADD $0x258,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
ADD %RSI,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
JMP 41d486 <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0x1036>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPL (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

Name	Coverage (%)	Time (s)
▼accelerate_kernel(int, int, int, int, double, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D–	5.06	2.00
○Loop 144 - accelerate.cpp:40-54 - exec	5.06	1.99
○Loop 143 - accelerate.cpp:41-54 - exec	0.00	0.00

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Execution units bottlenecks

CALL instructions

Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code