OV - exec - Function reset_field_kernel(int, int, int, int, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&) [clone .extracted.7]

	Function: reset_field_kernel(int, int, int, int, clover::Buffer2D<double>&, clover::Buffer2D<double> ...	Module: exec	Source: reset_field.cpp:34-39 [...]	Coverage (incl. loops): 2.00% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_GNR/173-814-2343/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/reset_field.cpp: 34 - 39

--------------------------------------------------------------------------------

34: #pragma omp parallel for simd collapse(2)

35:   for (int j = (y_min + 1); j < (y_max + 2); j++) {

36:     for (int i = (x_min + 1); i < (x_max + 2); i++) {

37:       density0(i, j) = density1(i, j);

38:       energy0(i, j) = energy1(i, j);

39:     }

/home/eoseret/qaas_runs_GNR/173-814-2343/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h: 69 - 69

--------------------------------------------------------------------------------

69:   T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; }

0x443c40 PUSH	%RBP

0x443c41 MOV	%RSP,%RBP

0x443c44 PUSH	%R15

0x443c46 PUSH	%R14

0x443c48 PUSH	%R13

0x443c4a PUSH	%R12

0x443c4c PUSH	%RBX

0x443c4d SUB	$0xb8,%RSP

0x443c54 MOV	%RCX,%R13

0x443c57 MOV	%RDX,%R12

0x443c5a MOV	0x30(%RBP),%RAX

0x443c5e MOV	0x20(%RBP),%RBX

0x443c62 MOV	0x18(%RBP),%RCX

0x443c66 MOV	0x10(%RBP),%RDX

0x443c6a MOVL	$0,-0x38(%RBP)

0x443c71 TEST	%RAX,%RAX

0x443c74 JS	444047

0x443c7a MOV	%R9,%R15

0x443c7d MOV	%R8,%R14

0x443c80 MOV	%RCX,-0x50(%RBP)

0x443c84 MOV	(%RDI),%ESI

0x443c86 MOVQ	$0,-0x60(%RBP)

0x443c8e MOV	%RAX,-0x58(%RBP)

0x443c92 MOVQ	$0x1,-0x88(%RBP)

0x443c9d SUB	$0x8,%RSP

0x443ca1 LEA	-0x88(%RBP),%RAX

0x443ca8 LEA	-0x38(%RBP),%RCX

0x443cac LEA	-0x60(%RBP),%R8

0x443cb0 MOV	%RDX,-0x40(%RBP)

0x443cb4 LEA	-0x58(%RBP),%R9

0x443cb8 MOV	$0x4b8830,%EDI

0x443cbd MOV	%ESI,-0x34(%RBP)

0x443cc0 MOV	$0x22,%EDX

0x443cc5 PUSH	$0x1

0x443cc7 PUSH	$0x1

0x443cc9 PUSH	%RAX

0x443cca CALL	4031f0 <__kmpc_for_static_init_8@plt>

0x443ccf MOV	-0x40(%RBP),%R9

0x443cd3 ADD	$0x20,%RSP

0x443cd7 MOV	-0x60(%RBP),%RCX

0x443cdb MOV	-0x58(%RBP),%RSI

0x443cdf CMP	%RSI,%RCX

0x443ce2 JA	444029

0x443ce8 MOV	-0x50(%RBP),%RDI

0x443cec SUB	%EDI,%EBX

0x443cee MOV	(%R13),%R10

0x443cf2 MOV	0x10(%R13),%RAX

0x443cf6 MOV	(%R12),%RDX

0x443cfa MOV	0x10(%R12),%R12

0x443cff MOV	%R14,%R8

0x443d02 MOV	(%R15),%R14

0x443d05 MOV	0x10(%R15),%R11

0x443d09 MOV	%R11,-0x30(%RBP)

0x443d0d MOV	(%R8),%R15

0x443d10 MOV	0x10(%R8),%R13

0x443d14 INC	%RSI

0x443d17 MOV	%RSI,%R11

0x443d1a SUB	%RCX,%R11

0x443d1d MOV	$-0x2,%R8D

0x443d23 AND	%R11,%R8

0x443d26 MOV	%RBX,-0x48(%RBP)

0x443d2a JE	444059

0x443d30 MOV	%R11,-0x68(%RBP)

0x443d34 MOVD	%EBX,%XMM0

0x443d38 PSHUFD	$0x44,%XMM0,%XMM2

0x443d3d MOVQ	%R9,%XMM0

0x443d42 PSHUFD	$0x44,%XMM0,%XMM0

0x443d47 MOVDQA	%XMM0,-0xd0(%RBP)

0x443d4f MOVQ	%RDI,%XMM0

0x443d54 PSHUFD	$0x44,%XMM0,%XMM0

0x443d59 MOVDQA	%XMM0,-0xc0(%RBP)

0x443d61 MOV	%R10,-0x80(%RBP)

0x443d65 MOVQ	%R10,%XMM0

0x443d6a PSHUFD	$0x44,%XMM0,%XMM8

0x443d70 MOV	%RDX,-0x70(%RBP)

0x443d74 MOVQ	%RDX,%XMM0

0x443d79 PSHUFD	$0x44,%XMM0,%XMM4

0x443d7e MOV	%R14,%R11

0x443d81 MOVQ	%R14,%XMM0

0x443d86 PSHUFD	$0x44,%XMM0,%XMM5

0x443d8b MOV	%R15,%RBX

0x443d8e MOVQ	%R15,%XMM0

0x443d93 MOVQ	%RCX,%XMM1

0x443d98 PSHUFD	$0x44,%XMM1,%XMM6

0x443d9d PADDQ	0x5768b(%RIP),%XMM6

0x443da5 PSHUFD	$0x44,%XMM0,%XMM7

0x443daa XOR	%R10D,%R10D

0x443dad MOVQ	%XMM2,%RDI

0x443db2 MOVDQA	%XMM2,-0xe0(%RBP)

0x443dba PSHUFD	$-0x12,%XMM2,%XMM0

0x443dbf MOVQ	%XMM0,%R15

0x443dc4 MOVDQA	%XMM8,%XMM11

0x443dc9 PSRLQ	$0x20,%XMM11

0x443dcf MOV	%RAX,-0x78(%RBP)

0x443dd3 MOVQ	%RAX,%XMM1

0x443dd8 PSHUFD	$0x44,%XMM1,%XMM0

0x443ddd MOVDQA	%XMM0,-0xb0(%RBP)

0x443de5 MOVDQA	%XMM4,%XMM10

0x443dea PSRLQ	$0x20,%XMM10

0x443df0 MOV	%R12,%R14

0x443df3 MOVQ	%R12,%XMM1

0x443df8 PSHUFD	$0x44,%XMM1,%XMM0

0x443dfd MOVDQA	%XMM0,-0xa0(%RBP)

0x443e05 MOVDQA	%XMM5,%XMM12

0x443e0a PSRLQ	$0x20,%XMM12

0x443e10 MOVQ	-0x30(%RBP),%XMM1

0x443e15 PSHUFD	$0x44,%XMM1,%XMM13

0x443e1b MOVDQA	%XMM7,%XMM14

0x443e20 PSRLQ	$0x20,%XMM14

0x443e26 NOPW	%CS:(%RAX,%RAX,1)

(301) 0x443e30 MOVQ	%XMM6,%RAX

(301) 0x443e35 XOR	%EDX,%EDX

(301) 0x443e37 DIV	%RDI

(301) 0x443e3a MOVQ	%RAX,%XMM1

(301) 0x443e3f PSHUFD	$-0x12,%XMM6,%XMM2

(301) 0x443e44 MOVQ	%XMM2,%RAX

(301) 0x443e49 XOR	%EDX,%EDX

(301) 0x443e4b DIV	%R15

(301) 0x443e4e MOVQ	%RAX,%XMM2

(301) 0x443e53 PUNPCKLQDQ	%XMM2,%XMM1

(301) 0x443e57 MOVDQA	%XMM1,%XMM15

(301) 0x443e5c PADDQ	-0xd0(%RBP),%XMM15

(301) 0x443e65 PMULUDQ	-0xe0(%RBP),%XMM1

(301) 0x443e6d MOVDQA	%XMM6,%XMM2

(301) 0x443e71 PSUBQ	%XMM1,%XMM2

(301) 0x443e75 PADDQ	-0xc0(%RBP),%XMM2

(301) 0x443e7d PSLLQ	$0x20,%XMM2

(301) 0x443e82 PSHUFD	$-0x13,%XMM2,%XMM9

(301) 0x443e88 PSHUFD	$-0x18,%XMM15,%XMM2

(301) 0x443e8e PSLLQ	$0x20,%XMM15

(301) 0x443e94 PSRAD	$0x1f,%XMM15

(301) 0x443e9a MOVDQA	%XMM9,%XMM1

(301) 0x443e9f PSHUFD	$-0x13,%XMM15,%XMM3

(301) 0x443ea5 PUNPCKLDQ	%XMM3,%XMM2

(301) 0x443ea9 MOVDQA	%XMM8,%XMM3

(301) 0x443eae PSRAD	$0x1f,%XMM1

(301) 0x443eb3 PMULUDQ	%XMM2,%XMM3

(301) 0x443eb7 MOVDQA	%XMM11,%XMM0

(301) 0x443ebc PMULUDQ	%XMM2,%XMM0

(301) 0x443ec0 PUNPCKLDQ	%XMM1,%XMM9

(301) 0x443ec5 PSRLQ	$0x20,%XMM15

(301) 0x443ecb MOVDQA	%XMM8,%XMM1

(301) 0x443ed0 PMULUDQ	%XMM15,%XMM1

(301) 0x443ed5 PADDQ	%XMM0,%XMM1

(301) 0x443ed9 PSLLQ	$0x20,%XMM1

(301) 0x443ede PADDQ	%XMM9,%XMM3

(301) 0x443ee3 PADDQ	%XMM1,%XMM3

(301) 0x443ee7 PSLLQ	$0x3,%XMM3

(301) 0x443eec MOVDQA	%XMM10,%XMM0

(301) 0x443ef1 PMULUDQ	%XMM2,%XMM0

(301) 0x443ef5 MOVDQA	%XMM4,%XMM1

(301) 0x443ef9 PADDQ	-0xb0(%RBP),%XMM3

(301) 0x443f01 PMULUDQ	%XMM15,%XMM1

(301) 0x443f06 PADDQ	%XMM0,%XMM1

(301) 0x443f0a MOVDQA	%XMM4,%XMM0

(301) 0x443f0e MOVQ	%XMM3,%RDX

(301) 0x443f13 PMULUDQ	%XMM2,%XMM0

(301) 0x443f17 PSLLQ	$0x20,%XMM1

(301) 0x443f1c PADDQ	%XMM9,%XMM0

(301) 0x443f21 PSHUFD	$-0x12,%XMM3,%XMM3

(301) 0x443f26 PADDQ	%XMM1,%XMM0

(301) 0x443f2a PSLLQ	$0x3,%XMM0

(301) 0x443f2f PADDQ	-0xa0(%RBP),%XMM0

(301) 0x443f37 MOVQ	%XMM3,%R9

(301) 0x443f3c MOVQ	%XMM0,%R12

(301) 0x443f41 PSHUFD	$-0x12,%XMM0,%XMM0

(301) 0x443f46 MOVDQA	%XMM5,%XMM1

(301) 0x443f4a MOVQ	%XMM0,%RAX

(301) 0x443f4f MOVDQA	%XMM12,%XMM0

(301) 0x443f54 PMULUDQ	%XMM2,%XMM0

(301) 0x443f58 MOVDQA	%XMM5,%XMM3

(301) 0x443f5c PMULUDQ	%XMM2,%XMM1

(301) 0x443f60 PMULUDQ	%XMM15,%XMM3

(301) 0x443f65 PADDQ	%XMM0,%XMM3

(301) 0x443f69 PSLLQ	$0x20,%XMM3

(301) 0x443f6e MOVSD	(%RDX),%XMM0

(301) 0x443f72 PADDQ	%XMM9,%XMM1

(301) 0x443f77 PADDQ	%XMM3,%XMM1

(301) 0x443f7b MOVSD	(%R9),%XMM3

(301) 0x443f80 MOVSD	%XMM0,(%R12)

(301) 0x443f86 PSLLQ	$0x3,%XMM1

(301) 0x443f8b PADDQ	%XMM13,%XMM1

(301) 0x443f90 MOVQ	%XMM1,%R9

(301) 0x443f95 PSHUFD	$-0x12,%XMM1,%XMM0

(301) 0x443f9a MOVQ	%XMM0,%RDX

(301) 0x443f9f MOVDQA	%XMM7,%XMM0

(301) 0x443fa3 PMULUDQ	%XMM2,%XMM0

(301) 0x443fa7 PMULUDQ	%XMM14,%XMM2

(301) 0x443fac PMULUDQ	%XMM7,%XMM15

(301) 0x443fb1 PADDQ	%XMM2,%XMM15

(301) 0x443fb6 PADDQ	%XMM9,%XMM0

(301) 0x443fbb MOVSD	%XMM3,(%RAX)

(301) 0x443fbf PSLLQ	$0x20,%XMM15

(301) 0x443fc5 PADDQ	%XMM15,%XMM0

(301) 0x443fca MOVQ	%R13,%XMM1

(301) 0x443fcf PSLLQ	$0x3,%XMM0

(301) 0x443fd4 PSHUFD	$0x44,%XMM1,%XMM1

(301) 0x443fd9 PADDQ	%XMM0,%XMM1

(301) 0x443fdd MOVQ	(%R9),%XMM0

(301) 0x443fe2 MOVQ	%XMM1,%RAX

(301) 0x443fe7 PSHUFD	$-0x12,%XMM1,%XMM1

(301) 0x443fec MOVQ	%XMM1,%R9

(301) 0x443ff1 MOVQ	(%RDX),%XMM1

(301) 0x443ff5 MOVQ	%XMM0,(%RAX)

(301) 0x443ff9 MOVQ	%XMM1,(%R9)

(301) 0x443ffe PADDQ	0x5744a(%RIP),%XMM6

(301) 0x444006 ADD	$0x2,%R10

(301) 0x44400a CMP	%R8,%R10

(301) 0x44400d JB	443e30

0x444013 CMP	%R8,-0x68(%RBP)

0x444017 MOV	-0x40(%RBP),%R9

0x44401b MOV	-0x80(%RBP),%R10

0x44401f MOV	-0x78(%RBP),%R15

0x444023 MOV	-0x70(%RBP),%R12

0x444027 JNE	44406a

0x444029 MOV	$0x4b8850,%EDI

0x44402e MOV	-0x34(%RBP),%ESI

0x444031 ADD	$0xb8,%RSP

0x444038 POP	%RBX

0x444039 POP	%R12

0x44403b POP	%R13

0x44403d POP	%R14

0x44403f POP	%R15

0x444041 POP	%RBP

0x444042 JMP	403050

0x444047 ADD	$0xb8,%RSP

0x44404e POP	%RBX

0x44404f POP	%R12

0x444051 POP	%R13

0x444053 POP	%R14

0x444055 POP	%R15

0x444057 POP	%RBP

0x444058 RET

0x444059 MOV	%R15,%RBX

0x44405c MOV	%R14,%R11

0x44405f MOV	%R12,%R14

0x444062 MOV	%RAX,%R15

0x444065 MOV	%RDX,%R12

0x444068 JMP	4440d2

0x44406a ADD	%R8,%RCX

0x44406d JMP	4440d2

0x44406f NOP

(300) 0x444070 MOV	%RCX,%RAX

(300) 0x444073 XOR	%EDX,%EDX

(300) 0x444075 DIVQ	-0x48(%RBP)

(300) 0x444079 MOV	-0x30(%RBP),%R8

(300) 0x44407d ADD	%R9D,%EAX

(300) 0x444080 ADD	-0x50(%RBP),%EDX

(300) 0x444083 MOVSXD	%EDX,%RDX

(300) 0x444086 CLTQ

(300) 0x444088 MOV	%R10,%RDI

(300) 0x44408b IMUL	%RAX,%RDI

(300) 0x44408f ADD	%RDX,%RDI

(300) 0x444092 MOVSD	(%R15,%RDI,8),%XMM0

(300) 0x444098 MOV	%R12,%RDI

(300) 0x44409b IMUL	%RAX,%RDI

(300) 0x44409f ADD	%RDX,%RDI

(300) 0x4440a2 MOVSD	%XMM0,(%R14,%RDI,8)

(300) 0x4440a8 MOV	%R11,%RDI

(300) 0x4440ab IMUL	%RAX,%RDI

(300) 0x4440af ADD	%RDX,%RDI

(300) 0x4440b2 MOVQ	(%R8,%RDI,8),%XMM0

(300) 0x4440b8 IMUL	%RBX,%RAX

(300) 0x4440bc ADD	%RDX,%RAX

(300) 0x4440bf MOVQ	%XMM0,(%R13,%RAX,8)

(300) 0x4440c6 INC	%RCX

(300) 0x4440c9 CMP	%RCX,%RSI

(300) 0x4440cc JE	444029

(300) 0x4440d2 MOV	%RCX,%RAX

(300) 0x4440d5 SHR	$0x20,%RAX

(300) 0x4440d9 JNE	444070

(300) 0x4440db MOV	%ECX,%EAX

(300) 0x4440dd XOR	%EDX,%EDX

(300) 0x4440df DIVL	-0x48(%RBP)

(300) 0x4440e2 JMP	444079

0x4440e4 NOPW	%CS:(%RAX,%RAX,1)

0x4440ee XCHG	%AX,%AX

Coverage (%)	Name	Source Location	Module
►100.00+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run orig_0

Source file and lines	reset_field.cpp:34-39
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_GNR/173-814-2343/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/reset_field.cpp:34-39
/home/eoseret/qaas_runs_GNR/173-814-2343/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:69

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 24.33 to 11.00 cycles (2.21x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is poorly vectorized. Only 15% of vector register length is used (average across all SSE/AVX instructions). By fully vectorizing your function, you can lower the cost of an iteration from 24.33 to 2.53 cycles (9.63x speedup).

Details

30% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

6% of SSE/AVX loads are used in vector version.
27% of SSE/AVX stores are used in vector version.
11% of SSE/AVX addition or subtraction instructions are used in vector version.
44% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

__kmpc_for_static_init_8@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-814-2343/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/reset_field.cpp:34

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 200 bytes. The binary function is storing 176 bytes.

General properties

nb instructions	145
nb uops	146
loop length	601
used x86 registers	16
used mmx registers	0
used xmm registers	13
used ymm registers	0
used zmm registers	0
nb stack references	22

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	24.33 cycles
front end	24.33 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	8.70	11.00	12.67	12.67	14.00	11.00	8.70	14.00	14.00	14.00	8.60	12.67
cycles	8.70	11.00	12.67	12.67	14.00	11.00	8.70	14.00	14.00	14.00	8.60	12.67

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	24.33
Dispatch	14.00
Overall L1	24.33

Vectorization ratios

all	30%
load	6%
store	27%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	11%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	44%

Vector efficiency ratios

all	15%
load	12%
store	14%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	13%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	17%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 24.33 cycles. At this rate:

4% of peak load performance is reached (8.22 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
5% of peak store performance is reached (7.23 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 24.33 to 14.00 cycles (1.74x speedup).

ASM code

In the binary file, the address of the function is: 443c40

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
SUB $0xb8,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RCX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x30(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x20(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x18(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x10(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOVL $0,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
TEST %RAX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JS 444047 <_Z18reset_field_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_.extracted.7+0x407>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R9,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R8,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RCX,-0x50(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV (%RDI),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (6.3%)
MOVQ $0,-0x60(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %RAX,-0x58(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVQ $0x1,-0x88(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
LEA -0x88(%RBP),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x38(%RBP),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x60(%RBP),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDX,-0x40(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
LEA -0x58(%RBP),%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV $0x4b8830,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %ESI,-0x34(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
PUSH $0x1	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH $0x1	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RAX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
CALL 4031f0 <__kmpc_for_static_init_8@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0x40(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
ADD $0x20,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x60(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x58(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
CMP %RSI,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JA 444029 <_Z18reset_field_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_.extracted.7+0x3e9>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x50(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
SUB %EDI,%EBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV (%R13),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x10(%R13),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R12),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x10(%R12),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R14,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%R15),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x10(%R15),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV %R11,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV (%R8),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x10(%R8),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RSI,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
SUB %RCX,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV $-0x2,%R8D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
AND %R11,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
MOV %RBX,-0x48(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JE 444059 <_Z18reset_field_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_.extracted.7+0x419>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R11,-0x68(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVD %EBX,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	scal (6.3%)
PSHUFD $0x44,%XMM0,%XMM2	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVQ %R9,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0xd0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVQ %RDI,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0xc0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOV %R10,-0x80(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVQ %R10,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM8	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOV %RDX,-0x70(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVQ %RDX,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM4	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOV %R14,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOVQ %R14,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM5	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOV %R15,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOVQ %R15,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
MOVQ %RCX,%XMM1	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM1,%XMM6	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
PADDQ 0x5768b(%RIP),%XMM6	1	0.33	0.33	0.33	0.33	0	0.33	0	0	0	0	0	0.33	1	0.33	vect (25.0%)
PSHUFD $0x44,%XMM0,%XMM7	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
XOR %R10D,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOVQ %XMM2,%RDI	1	1	0	0	0	0	0	0	0	0	0	0	0	1	1	scal (12.5%)
MOVDQA %XMM2,-0xe0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
PSHUFD $-0x12,%XMM2,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVQ %XMM0,%R15	1	1	0	0	0	0	0	0	0	0	0	0	0	1	1	scal (12.5%)
MOVDQA %XMM8,%XMM11	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
PSRLQ $0x20,%XMM11	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1-2	0.50	vect (25.0%)
MOV %RAX,-0x78(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVQ %RAX,%XMM1	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM1,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0xb0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVDQA %XMM4,%XMM10	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
PSRLQ $0x20,%XMM10	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1-2	0.50	vect (25.0%)
MOV %R12,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOVQ %R12,%XMM1	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM1,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0xa0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVDQA %XMM5,%XMM12	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
PSRLQ $0x20,%XMM12	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1-2	0.50	vect (25.0%)
MOVQ -0x30(%RBP),%XMM1	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
PSHUFD $0x44,%XMM1,%XMM13	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM7,%XMM14	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
PSRLQ $0x20,%XMM14	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1-2	0.50	vect (25.0%)
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %R8,-0x68(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
MOV -0x40(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV -0x80(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV -0x78(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x70(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JNE 44406a <_Z18reset_field_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_.extracted.7+0x42a>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV $0x4b8850,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0x34(%RBP),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (6.3%)
ADD $0xb8,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
JMP 403050 <__kmpc_for_static_fini@plt>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
ADD $0xb8,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
MOV %R15,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %R14,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %R12,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RAX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 4440d2 <_Z18reset_field_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_.extracted.7+0x492>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
ADD %R8,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
JMP 4440d2 <_Z18reset_field_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_.extracted.7+0x492>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run orig_0

Source file and lines	reset_field.cpp:34-39
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_GNR/173-814-2343/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/reset_field.cpp:34-39
/home/eoseret/qaas_runs_GNR/173-814-2343/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:69

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

30% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

6% of SSE/AVX loads are used in vector version.
27% of SSE/AVX stores are used in vector version.
11% of SSE/AVX addition or subtraction instructions are used in vector version.
44% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

__kmpc_for_static_init_8@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-814-2343/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/reset_field.cpp:34

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 200 bytes. The binary function is storing 176 bytes.

General properties

nb instructions	145
nb uops	146
loop length	601
used x86 registers	16
used mmx registers	0
used xmm registers	13
used ymm registers	0
used zmm registers	0
nb stack references	22

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	24.33 cycles
front end	24.33 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	8.70	11.00	12.67	12.67	14.00	11.00	8.70	14.00	14.00	14.00	8.60	12.67
cycles	8.70	11.00	12.67	12.67	14.00	11.00	8.70	14.00	14.00	14.00	8.60	12.67

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	24.33
Dispatch	14.00
Overall L1	24.33

Vectorization ratios

all	30%
load	6%
store	27%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	11%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	44%

Vector efficiency ratios

all	15%
load	12%
store	14%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	13%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	17%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 24.33 cycles. At this rate:

4% of peak load performance is reached (8.22 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
5% of peak store performance is reached (7.23 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 443c40

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
SUB $0xb8,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RCX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x30(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x20(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x18(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x10(%RBP),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOVL $0,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
TEST %RAX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JS 444047 <_Z18reset_field_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_.extracted.7+0x407>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R9,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R8,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RCX,-0x50(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV (%RDI),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (6.3%)
MOVQ $0,-0x60(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %RAX,-0x58(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVQ $0x1,-0x88(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
LEA -0x88(%RBP),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x38(%RBP),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x60(%RBP),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %RDX,-0x40(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
LEA -0x58(%RBP),%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV $0x4b8830,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %ESI,-0x34(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
PUSH $0x1	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH $0x1	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RAX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
CALL 4031f0 <__kmpc_for_static_init_8@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0x40(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
ADD $0x20,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x60(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x58(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
CMP %RSI,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JA 444029 <_Z18reset_field_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_.extracted.7+0x3e9>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV -0x50(%RBP),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
SUB %EDI,%EBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV (%R13),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x10(%R13),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R12),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x10(%R12),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R14,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV (%R15),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x10(%R15),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV %R11,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV (%R8),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x10(%R8),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RSI,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
SUB %RCX,%R11	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV $-0x2,%R8D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
AND %R11,%R8	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
MOV %RBX,-0x48(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JE 444059 <_Z18reset_field_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_.extracted.7+0x419>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R11,-0x68(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVD %EBX,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	scal (6.3%)
PSHUFD $0x44,%XMM0,%XMM2	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVQ %R9,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0xd0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVQ %RDI,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0xc0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOV %R10,-0x80(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVQ %R10,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM8	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOV %RDX,-0x70(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVQ %RDX,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM4	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOV %R14,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOVQ %R14,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM5	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOV %R15,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOVQ %R15,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
MOVQ %RCX,%XMM1	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM1,%XMM6	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
PADDQ 0x5768b(%RIP),%XMM6	1	0.33	0.33	0.33	0.33	0	0.33	0	0	0	0	0	0.33	1	0.33	vect (25.0%)
PSHUFD $0x44,%XMM0,%XMM7	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
XOR %R10D,%R10D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOVQ %XMM2,%RDI	1	1	0	0	0	0	0	0	0	0	0	0	0	1	1	scal (12.5%)
MOVDQA %XMM2,-0xe0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
PSHUFD $-0x12,%XMM2,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVQ %XMM0,%R15	1	1	0	0	0	0	0	0	0	0	0	0	0	1	1	scal (12.5%)
MOVDQA %XMM8,%XMM11	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
PSRLQ $0x20,%XMM11	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1-2	0.50	vect (25.0%)
MOV %RAX,-0x78(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVQ %RAX,%XMM1	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM1,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0xb0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVDQA %XMM4,%XMM10	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
PSRLQ $0x20,%XMM10	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1-2	0.50	vect (25.0%)
MOV %R12,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOVQ %R12,%XMM1	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM1,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0xa0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVDQA %XMM5,%XMM12	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
PSRLQ $0x20,%XMM12	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1-2	0.50	vect (25.0%)
MOVQ -0x30(%RBP),%XMM1	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
PSHUFD $0x44,%XMM1,%XMM13	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM7,%XMM14	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
PSRLQ $0x20,%XMM14	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1-2	0.50	vect (25.0%)
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %R8,-0x68(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
MOV -0x40(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV -0x80(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV -0x78(%RBP),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x70(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JNE 44406a <_Z18reset_field_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_.extracted.7+0x42a>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV $0x4b8850,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0x34(%RBP),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (6.3%)
ADD $0xb8,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
JMP 403050 <__kmpc_for_static_fini@plt>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
ADD $0xb8,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
MOV %R15,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %R14,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %R12,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RAX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 4440d2 <_Z18reset_field_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_.extracted.7+0x492>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
ADD %R8,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
JMP 4440d2 <_Z18reset_field_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_.extracted.7+0x492>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	5.84	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
XCHG %AX,%AX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

Name	Coverage (%)	Time (s)
▼reset_field_kernel(int, int, int, int, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&) [...–	2.00	0.79
○Loop 301 - reset_field.cpp:35-39 - exec	2.00	0.79
○Loop 300 - reset_field.cpp:35-39 - exec	0.00	0.00

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