OV - exec - Function advec_mom_kernel(int, int, int, int, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer1D<double>&, clover::Buffer1D<double>&, int, int, int) [clone .extracted.12]

	Function: advec_mom_kernel(int, int, int, int, clover::Buffer2D<double>&, clover::Buffer2D<double>&, ...	Module: exec	Source: advec_mom.cpp:167-173 [...]	Coverage (incl. loops): 2.85% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_GNR/173-814-2343/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_mom.cpp: 167 - 173

--------------------------------------------------------------------------------

167: #pragma omp parallel for simd collapse(2)

168:       for (int j = (y_min - 1 + 1); j < (y_max + 2 + 2); j++) {

169:         for (int i = (x_min + 1); i < (x_max + 1 + 2); i++) {

170:           node_mass_post(i, j) = 0.25 * (density1(i + 0, j - 1) * post_vol(i + 0, j - 1) + density1(i, j) * post_vol(i, j) +

171:                                          density1(i - 1, j - 1) * post_vol(i - 1, j - 1) + density1(i - 1, j + 0) * post_vol(i - 1, j + 0));

172:           node_mass_pre(i, j) = node_mass_post(i, j) - node_flux(i + 0, j - 1) + node_flux(i, j);

173:         }

/home/eoseret/qaas_runs_GNR/173-814-2343/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h: 69 - 69

--------------------------------------------------------------------------------

69:   T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; }

0x423160 PUSH	%RBP

0x423161 MOV	%RSP,%RBP

0x423164 PUSH	%R15

0x423166 PUSH	%R14

0x423168 PUSH	%R13

0x42316a PUSH	%R12

0x42316c PUSH	%RBX

0x42316d SUB	$0x158,%RSP

0x423174 MOV	%RCX,%R15

0x423177 MOV	%RDX,%R13

0x42317a MOV	0x38(%RBP),%RAX

0x42317e MOV	0x28(%RBP),%RBX

0x423182 MOV	0x20(%RBP),%RCX

0x423186 MOV	0x10(%RBP),%R14

0x42318a MOV	0x18(%RBP),%EDX

0x42318d MOV	%RDX,-0x50(%RBP)

0x423191 MOVL	$0,-0x38(%RBP)

0x423198 TEST	%RAX,%RAX

0x42319b JS	423864

0x4231a1 MOV	%R8,%R12

0x4231a4 MOV	%R9,-0x30(%RBP)

0x4231a8 MOV	%RCX,-0x48(%RBP)

0x4231ac MOV	(%RDI),%ESI

0x4231ae MOVQ	$0,-0x68(%RBP)

0x4231b6 MOV	%RAX,-0x60(%RBP)

0x4231ba MOVQ	$0x1,-0xb8(%RBP)

0x4231c5 SUB	$0x8,%RSP

0x4231c9 LEA	-0xb8(%RBP),%RAX

0x4231d0 LEA	-0x38(%RBP),%RCX

0x4231d4 LEA	-0x68(%RBP),%R8

0x4231d8 LEA	-0x60(%RBP),%R9

0x4231dc MOV	$0x4b77f0,%EDI

0x4231e1 MOV	%ESI,-0x34(%RBP)

0x4231e4 MOV	$0x22,%EDX

0x4231e9 PUSH	$0x1

0x4231eb PUSH	$0x1

0x4231ed PUSH	%RAX

0x4231ee CALL	4031f0 <__kmpc_for_static_init_8@plt>

0x4231f3 ADD	$0x20,%RSP

0x4231f7 MOV	-0x68(%RBP),%RCX

0x4231fb MOV	-0x60(%RBP),%RAX

0x4231ff CMP	%RAX,%RCX

0x423202 JA	423846

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0x42320b MOV	-0x48(%RBP),%RAX

0x42320f SUB	%EAX,%EBX

0x423211 MOV	(%R13),%RSI

0x423215 MOV	0x10(%R13),%R8

0x423219 MOV	(%R14),%RDI

0x42321c MOV	0x10(%R14),%R10

0x423220 MOV	(%R12),%R9

0x423224 MOV	0x10(%R12),%R11

0x423229 MOV	%R11,-0x58(%RBP)

0x42322d MOV	(%R15),%R14

0x423230 MOV	0x10(%R15),%R15

0x423234 MOV	-0x30(%RBP),%R12

0x423238 MOV	(%R12),%R11

0x42323c MOV	0x10(%R12),%R13

0x423241 INC	%RDX

0x423244 MOV	%RDX,-0x30(%RBP)

0x423248 MOV	%RDX,%R12

0x42324b SUB	%RCX,%R12

0x42324e MOV	$-0x2,%EDX

0x423253 AND	%R12,%RDX

0x423256 MOV	%R14,-0xa0(%RBP)

0x42325d MOV	%R9,-0xb0(%RBP)

0x423264 MOV	%R11,-0xa8(%RBP)

0x42326b JE	423876

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0x423275 MOV	%RBX,-0x88(%RBP)

0x42327c MOVD	%EBX,%XMM0

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0x423285 MOVD	-0x50(%RBP),%XMM0

0x42328a PSHUFD	$0x50,%XMM0,%XMM0

0x42328f MOVDQA	%XMM0,-0x170(%RBP)

0x423297 MOVD	%EAX,%XMM0

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0x4232a0 MOVDQA	%XMM0,-0x160(%RBP)

0x4232a8 MOV	%RSI,-0x80(%RBP)

0x4232ac MOVQ	%RSI,%XMM0

0x4232b1 PSHUFD	$0x44,%XMM0,%XMM2

0x4232b6 MOV	%RDI,-0x78(%RBP)

0x4232ba MOVQ	%RDI,%XMM0

0x4232bf PSHUFD	$0x44,%XMM0,%XMM3

0x4232c4 MOVQ	%R9,%XMM0

0x4232c9 PSHUFD	$0x44,%XMM0,%XMM0

0x4232ce MOVDQA	%XMM0,-0x130(%RBP)

0x4232d6 MOVQ	%R14,%XMM0

0x4232db PSHUFD	$0x44,%XMM0,%XMM0

0x4232e0 MOVDQA	%XMM0,-0xe0(%RBP)

0x4232e8 MOVQ	%R11,%XMM0

0x4232ed PSHUFD	$0x44,%XMM0,%XMM0

0x4232f2 MOVDQA	%XMM0,-0x120(%RBP)

0x4232fa MOVQ	%RCX,%XMM0

0x4232ff PSHUFD	$0x44,%XMM0,%XMM8

0x423305 PADDQ	0x78122(%RIP),%XMM8

0x42330e XOR	%ESI,%ESI

0x423310 MOVQ	%XMM1,-0x98(%RBP)

0x423318 MOVDQA	%XMM1,-0x180(%RBP)

0x423320 PSHUFD	$-0x12,%XMM1,%XMM0

0x423325 MOVQ	%XMM0,-0x90(%RBP)

0x42332d MOVDQA	%XMM2,-0x150(%RBP)

0x423335 PSRLQ	$0x20,%XMM2

0x42333a MOVDQA	%XMM2,-0x110(%RBP)

0x423342 MOVQ	%R8,%XMM0

0x423347 PSHUFD	$0x44,%XMM0,%XMM0

0x42334c MOVDQA	%XMM0,-0x100(%RBP)

0x423354 MOVDQA	%XMM3,-0x140(%RBP)

0x42335c PSRLQ	$0x20,%XMM3

0x423361 MOVDQA	%XMM3,-0xf0(%RBP)

0x423369 MOVQ	%R10,%XMM0

0x42336e PSHUFD	$0x44,%XMM0,%XMM0

0x423373 MOVDQA	%XMM0,-0xd0(%RBP)

0x42337b MOV	%R13,-0x40(%RBP)

0x42337f MOV	%RDX,%R13

0x423382 NOPW	%CS:(%RAX,%RAX,1)

(166) 0x423390 MOVQ	%XMM8,%RAX

(166) 0x423395 XOR	%EDX,%EDX

(166) 0x423397 DIVQ	-0x98(%RBP)

(166) 0x42339e PSHUFD	$-0x12,%XMM8,%XMM0

(166) 0x4233a4 MOVQ	%XMM0,%RDX

(166) 0x4233a9 MOVQ	%RAX,%XMM0

(166) 0x4233ae MOV	%RDX,%RAX

(166) 0x4233b1 XOR	%EDX,%EDX

(166) 0x4233b3 DIVQ	-0x90(%RBP)

(166) 0x4233ba MOVQ	%RAX,%XMM1

(166) 0x4233bf PUNPCKLQDQ	%XMM1,%XMM0

(166) 0x4233c3 PSHUFD	$-0x18,%XMM0,%XMM10

(166) 0x4233c9 PADDD	-0x170(%RBP),%XMM10

(166) 0x4233d2 PMULUDQ	-0x180(%RBP),%XMM0

(166) 0x4233da MOVDQA	%XMM8,%XMM1

(166) 0x4233df PSUBQ	%XMM0,%XMM1

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(166) 0x4233ec MOVDQA	%XMM10,%XMM15

(166) 0x4233f1 PCMPEQD	%XMM0,%XMM0

(166) 0x4233f5 PADDD	%XMM0,%XMM15

(166) 0x4233fa PADDD	-0x160(%RBP),%XMM1

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(166) 0x423407 PCMPGTD	%XMM15,%XMM9

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(166) 0x423411 PCMPGTD	%XMM1,%XMM4

(166) 0x423415 MOVDQA	-0x150(%RBP),%XMM7

(166) 0x42341d MOVDQA	%XMM7,%XMM2

(166) 0x423421 PMULUDQ	%XMM15,%XMM2

(166) 0x423426 MOVDQA	-0x110(%RBP),%XMM13

(166) 0x42342f MOVDQA	%XMM13,%XMM5

(166) 0x423434 MOVDQA	%XMM1,%XMM0

(166) 0x423438 PMULUDQ	%XMM15,%XMM5

(166) 0x42343d PXOR	%XMM14,%XMM14

(166) 0x423442 PUNPCKLDQ	%XMM14,%XMM9

(166) 0x423447 MOVDQA	%XMM7,%XMM3

(166) 0x42344b PUNPCKLDQ	%XMM4,%XMM0

(166) 0x42344f PMULUDQ	%XMM9,%XMM3

(166) 0x423454 MOVDQA	-0x140(%RBP),%XMM12

(166) 0x42345d MOVDQA	%XMM12,%XMM11

(166) 0x423462 PMULUDQ	%XMM15,%XMM11

(166) 0x423467 PADDQ	%XMM5,%XMM3

(166) 0x42346b MOVDQA	-0xf0(%RBP),%XMM6

(166) 0x423473 MOVDQA	%XMM6,%XMM5

(166) 0x423477 PMULUDQ	%XMM15,%XMM5

(166) 0x42347c MOVDQA	%XMM12,%XMM4

(166) 0x423481 PSLLQ	$0x20,%XMM3

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(166) 0x42348b PADDQ	%XMM5,%XMM4

(166) 0x42348f PSLLQ	$0x20,%XMM4

(166) 0x423494 PADDQ	%XMM2,%XMM3

(166) 0x423498 PADDQ	%XMM11,%XMM4

(166) 0x42349d PXOR	%XMM2,%XMM2

(166) 0x4234a1 PCMPGTD	%XMM10,%XMM2

(166) 0x4234a6 MOVDQA	%XMM3,%XMM5

(166) 0x4234aa PUNPCKLDQ	%XMM2,%XMM10

(166) 0x4234af PMULUDQ	%XMM10,%XMM13

(166) 0x4234b4 PADDQ	%XMM0,%XMM5

(166) 0x4234b8 PUNPCKLDQ	%XMM14,%XMM2

(166) 0x4234bd MOVDQA	%XMM7,%XMM11

(166) 0x4234c2 PMULUDQ	%XMM2,%XMM11

(166) 0x4234c7 PSLLQ	$0x3,%XMM5

(166) 0x4234cc PADDQ	%XMM13,%XMM11

(166) 0x4234d1 MOVDQA	%XMM7,%XMM13

(166) 0x4234d6 PMULUDQ	%XMM10,%XMM13

(166) 0x4234db MOVDQA	-0x100(%RBP),%XMM14

(166) 0x4234e4 PADDQ	%XMM14,%XMM5

(166) 0x4234e9 PSLLQ	$0x20,%XMM11

(166) 0x4234ef PADDQ	%XMM13,%XMM11

(166) 0x4234f4 MOVDQA	%XMM11,%XMM13

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(166) 0x423523 MOVQ	%XMM5,%RDX

(166) 0x423528 PMULUDQ	%XMM10,%XMM6

(166) 0x42352d MOVDQA	%XMM12,%XMM13

(166) 0x423532 PMULUDQ	%XMM2,%XMM13

(166) 0x423537 PADDQ	%XMM6,%XMM13

(166) 0x42353c PMULUDQ	%XMM10,%XMM12

(166) 0x423541 PSLLQ	$0x20,%XMM13

(166) 0x423547 PADDQ	%XMM12,%XMM13

(166) 0x42354c PADDD	0x7806c(%RIP),%XMM1

(166) 0x423554 PXOR	%XMM5,%XMM5

(166) 0x423558 PCMPGTD	%XMM1,%XMM5

(166) 0x42355c PUNPCKLDQ	%XMM5,%XMM1

(166) 0x423560 MOVDQA	%XMM4,%XMM5

(166) 0x423564 PADDQ	%XMM0,%XMM5

(166) 0x423568 PSLLQ	$0x3,%XMM5

(166) 0x42356d MOVDQA	-0xd0(%RBP),%XMM6

(166) 0x423575 PADDQ	%XMM6,%XMM5

(166) 0x423579 MOVQ	%XMM5,%R14

(166) 0x42357e PADDQ	%XMM1,%XMM3

(166) 0x423582 PSHUFD	$-0x12,%XMM5,%XMM5

(166) 0x423587 PADDQ	%XMM1,%XMM4

(166) 0x42358b PADDQ	%XMM1,%XMM11

(166) 0x423590 PADDQ	%XMM13,%XMM1

(166) 0x423595 MOVQ	%XMM5,%RBX

(166) 0x42359a PADDQ	%XMM0,%XMM13

(166) 0x42359f PSLLQ	$0x3,%XMM13

(166) 0x4235a5 MOVSD	(%R12),%XMM5

(166) 0x4235ab PADDQ	%XMM6,%XMM13

(166) 0x4235b0 MOVQ	%XMM13,%R12

(166) 0x4235b5 MOVHPD	(%R11),%XMM5

(166) 0x4235ba PSHUFD	$-0x12,%XMM13,%XMM13

(166) 0x4235c0 PSLLQ	$0x3,%XMM3

(166) 0x4235c5 PADDQ	%XMM14,%XMM3

(166) 0x4235ca MOVQ	%XMM13,%R11

(166) 0x4235cf MOVQ	%XMM3,%RDI

(166) 0x4235d4 PSHUFD	$-0x12,%XMM3,%XMM3

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(166) 0x4235de MOVSD	(%RDI),%XMM3

(166) 0x4235e2 PSLLQ	$0x3,%XMM4

(166) 0x4235e7 PADDQ	%XMM6,%XMM4

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(166) 0x4235f9 MOVQ	%XMM4,%RAX

(166) 0x4235fe MOVHPD	(%R9),%XMM3

(166) 0x423603 MOVSD	(%RDI),%XMM13

(166) 0x423608 MOVHPD	(%RAX),%XMM13

(166) 0x42360d MULPD	%XMM3,%XMM13

(166) 0x423612 MOVSD	(%R14),%XMM3

(166) 0x423617 PSLLQ	$0x3,%XMM11

(166) 0x42361d MOVHPD	(%RDX),%XMM7

(166) 0x423621 PADDQ	%XMM14,%XMM11

(166) 0x423626 MOVQ	%XMM11,%RAX

(166) 0x42362b MOVHPD	(%RBX),%XMM3

(166) 0x42362f PSHUFD	$-0x12,%XMM11,%XMM4

(166) 0x423635 MOVQ	%XMM4,%RDX

(166) 0x42363a MOVSD	(%RAX),%XMM11

(166) 0x42363f MULPD	%XMM7,%XMM3

(166) 0x423643 MOVHPD	(%RDX),%XMM11

(166) 0x423648 PSLLQ	$0x3,%XMM1

(166) 0x42364d MOVSD	(%R12),%XMM4

(166) 0x423653 PADDQ	%XMM6,%XMM1

(166) 0x423657 MOVQ	%XMM1,%RAX

(166) 0x42365c MOVHPD	(%R11),%XMM4

(166) 0x423661 PSHUFD	$-0x12,%XMM1,%XMM1

(166) 0x423666 MOVQ	%XMM1,%RDX

(166) 0x42366b MOVSD	(%RAX),%XMM1

(166) 0x42366f MULPD	%XMM5,%XMM4

(166) 0x423673 MOVHPD	(%RDX),%XMM1

(166) 0x423677 MULPD	%XMM11,%XMM1

(166) 0x42367c MOVDQA	-0x130(%RBP),%XMM11

(166) 0x423685 MOVDQA	%XMM11,%XMM5

(166) 0x42368a PSRLQ	$0x20,%XMM5

(166) 0x42368f PMULUDQ	%XMM10,%XMM5

(166) 0x423694 MOVDQA	%XMM11,%XMM7

(166) 0x423699 PMULUDQ	%XMM2,%XMM7

(166) 0x42369d PADDQ	%XMM5,%XMM7

(166) 0x4236a1 MOVDQA	%XMM11,%XMM5

(166) 0x4236a6 PMULUDQ	%XMM10,%XMM5

(166) 0x4236ab PSLLQ	$0x20,%XMM7

(166) 0x4236b0 PADDQ	%XMM0,%XMM5

(166) 0x4236b4 PADDQ	%XMM7,%XMM5

(166) 0x4236b8 PSLLQ	$0x3,%XMM5

(166) 0x4236bd ADDPD	%XMM13,%XMM1

(166) 0x4236c2 MOVQ	-0x58(%RBP),%XMM7

(166) 0x4236c7 PSHUFD	$0x44,%XMM7,%XMM11

(166) 0x4236cd PADDQ	%XMM5,%XMM11

(166) 0x4236d2 ADDPD	%XMM3,%XMM4

(166) 0x4236d6 MOVDQA	-0xe0(%RBP),%XMM6

(166) 0x4236de MOVDQA	%XMM6,%XMM3

(166) 0x4236e2 MOVDQA	%XMM6,%XMM5

(166) 0x4236e6 PSRLQ	$0x20,%XMM5

(166) 0x4236eb PMULUDQ	%XMM15,%XMM3

(166) 0x4236f0 PMULUDQ	%XMM5,%XMM15

(166) 0x4236f5 PMULUDQ	%XMM6,%XMM9

(166) 0x4236fa PADDQ	%XMM15,%XMM9

(166) 0x4236ff PSLLQ	$0x20,%XMM9

(166) 0x423705 PADDQ	%XMM0,%XMM3

(166) 0x423709 PADDQ	%XMM9,%XMM3

(166) 0x42370e MOVDQA	%XMM6,%XMM9

(166) 0x423713 ADDPD	%XMM4,%XMM1

(166) 0x423717 PMULUDQ	%XMM10,%XMM5

(166) 0x42371c MOVDQA	%XMM6,%XMM4

(166) 0x423720 PMULUDQ	%XMM2,%XMM4

(166) 0x423724 PMULUDQ	%XMM10,%XMM9

(166) 0x423729 PADDQ	%XMM5,%XMM4

(166) 0x42372d PSLLQ	$0x20,%XMM4

(166) 0x423732 PADDQ	%XMM0,%XMM9

(166) 0x423737 PADDQ	%XMM4,%XMM9

(166) 0x42373c MOVDQA	-0x120(%RBP),%XMM12

(166) 0x423745 MOVDQA	%XMM12,%XMM4

(166) 0x42374a MOVDQA	%XMM12,%XMM5

(166) 0x42374f PSRLQ	$0x20,%XMM5

(166) 0x423754 PMULUDQ	%XMM10,%XMM4

(166) 0x423759 PMULUDQ	%XMM10,%XMM5

(166) 0x42375e MOVQ	%XMM11,%RAX

(166) 0x423763 PSHUFD	$-0x12,%XMM11,%XMM7

(166) 0x423769 MOVQ	%XMM7,%RDX

(166) 0x42376e PMULUDQ	%XMM12,%XMM2

(166) 0x423773 PADDQ	%XMM5,%XMM2

(166) 0x423777 MOVQ	%R15,%XMM5

(166) 0x42377c PSLLQ	$0x3,%XMM3

(166) 0x423781 PSHUFD	$0x44,%XMM5,%XMM5

(166) 0x423786 PADDQ	%XMM5,%XMM3

(166) 0x42378a PSLLQ	$0x3,%XMM9

(166) 0x423790 PADDQ	%XMM5,%XMM9

(166) 0x423795 PADDQ	%XMM0,%XMM4

(166) 0x423799 MOVQ	%XMM3,%RDI

(166) 0x42379e PSHUFD	$-0x12,%XMM3,%XMM0

(166) 0x4237a3 MOVQ	%XMM0,%R9

(166) 0x4237a8 PSLLQ	$0x20,%XMM2

(166) 0x4237ad PADDQ	%XMM2,%XMM4

(166) 0x4237b1 MOVQ	-0x40(%RBP),%XMM0

(166) 0x4237b6 PSLLQ	$0x3,%XMM4

(166) 0x4237bb PSHUFD	$0x44,%XMM0,%XMM0

(166) 0x4237c0 PADDQ	%XMM4,%XMM0

(166) 0x4237c4 MULPD	0x77c74(%RIP),%XMM1

(166) 0x4237cc MOVLPD	%XMM1,(%RAX)

(166) 0x4237d0 MOVHPD	%XMM1,(%RDX)

(166) 0x4237d4 MOVQ	%XMM9,%RAX

(166) 0x4237d9 PSHUFD	$-0x12,%XMM9,%XMM2

(166) 0x4237df MOVQ	%XMM2,%RDX

(166) 0x4237e4 MOVSD	(%RDI),%XMM2

(166) 0x4237e8 MOVHPD	(%R9),%XMM2

(166) 0x4237ed SUBPD	%XMM2,%XMM1

(166) 0x4237f1 MOVSD	(%RAX),%XMM2

(166) 0x4237f5 MOVHPD	(%RDX),%XMM2

(166) 0x4237f9 ADDPD	%XMM1,%XMM2

(166) 0x4237fd MOVQ	%XMM0,%RAX

(166) 0x423802 PSHUFD	$-0x12,%XMM0,%XMM0

(166) 0x423807 MOVQ	%XMM0,%RDX

(166) 0x42380c MOVLPD	%XMM2,(%RAX)

(166) 0x423810 MOVHPD	%XMM2,(%RDX)

(166) 0x423814 PADDQ	0x77c33(%RIP),%XMM8

(166) 0x42381d ADD	$0x2,%RSI

(166) 0x423821 CMP	%R13,%RSI

(166) 0x423824 JB	423390

0x42382a MOV	%R13,%RAX

0x42382d MOV	-0x40(%RBP),%R13

0x423831 CMP	%RAX,-0x70(%RBP)

0x423835 MOV	-0x88(%RBP),%RBX

0x42383c MOV	-0x80(%RBP),%R14

0x423840 MOV	-0x78(%RBP),%R12

0x423844 JNE	423881

0x423846 MOV	$0x4b7810,%EDI

0x42384b MOV	-0x34(%RBP),%ESI

0x42384e ADD	$0x158,%RSP

0x423855 POP	%RBX

0x423856 POP	%R12

0x423858 POP	%R13

0x42385a POP	%R14

0x42385c POP	%R15

0x42385e POP	%RBP

0x42385f JMP	403050

0x423864 ADD	$0x158,%RSP

0x42386b POP	%RBX

0x42386c POP	%R12

0x42386e POP	%R13

0x423870 POP	%R14

0x423872 POP	%R15

0x423874 POP	%RBP

0x423875 RET

0x423876 MOV	%RSI,%R14

0x423879 MOV	%RDI,%R12

0x42387c JMP	42399f

0x423881 ADD	%RAX,%RCX

0x423884 JMP	42399f

0x423889 NOPL	(%RAX)

(165) 0x423890 MOV	%RCX,%RAX

(165) 0x423893 XOR	%EDX,%EDX

(165) 0x423895 DIV	%RBX

(165) 0x423898 ADD	-0x48(%RBP),%EDX

(165) 0x42389b MOVSXD	%EDX,%RDX

(165) 0x42389e MOV	%EAX,%EDI

(165) 0x4238a0 MOV	-0x50(%RBP),%RSI

(165) 0x4238a4 ADD	%ESI,%EDI

(165) 0x4238a6 ADD	%ESI,%EAX

(165) 0x4238a8 DEC	%EAX

(165) 0x4238aa MOVSXD	%EAX,%RSI

(165) 0x4238ad MOV	%R12,%R11

(165) 0x4238b0 IMUL	%RSI,%R11

(165) 0x4238b4 MOVSXD	%EDI,%RAX

(165) 0x4238b7 MOV	%R12,%RDI

(165) 0x4238ba IMUL	%RAX,%RDI

(165) 0x4238be LEA	(%R11,%RDX,1),%R9

(165) 0x4238c2 DEC	%R9

(165) 0x4238c5 MOVSD	(%R10,%R9,8),%XMM0

(165) 0x4238cb LEA	(%RDI,%RDX,1),%R9

(165) 0x4238cf DEC	%R9

(165) 0x4238d2 MOVHPD	(%R10,%R9,8),%XMM0

(165) 0x4238d8 MOV	%R14,%R9

(165) 0x4238db IMUL	%RSI,%R9

(165) 0x4238df ADD	%RDX,%RDI

(165) 0x4238e2 MOVSD	(%R10,%RDI,8),%XMM1

(165) 0x4238e8 MOV	%R14,%RDI

(165) 0x4238eb IMUL	%RAX,%RDI

(165) 0x4238ef ADD	%RDX,%R11

(165) 0x4238f2 MOVHPD	(%R10,%R11,8),%XMM1

(165) 0x4238f8 LEA	(%R9,%RDX,1),%R11

(165) 0x4238fc DEC	%R11

(165) 0x4238ff MOVSD	(%R8,%R11,8),%XMM2

(165) 0x423905 LEA	(%RDI,%RDX,1),%R11

(165) 0x423909 DEC	%R11

(165) 0x42390c MOVHPD	(%R8,%R11,8),%XMM2

(165) 0x423912 ADD	%RDX,%RDI

(165) 0x423915 MOVSD	(%R8,%RDI,8),%XMM3

(165) 0x42391b MULPD	%XMM0,%XMM2

(165) 0x42391f ADD	%RDX,%R9

(165) 0x423922 MOVHPD	(%R8,%R9,8),%XMM3

(165) 0x423928 MULPD	%XMM1,%XMM3

(165) 0x42392c ADDPD	%XMM2,%XMM3

(165) 0x423930 MOVAPD	%XMM3,%XMM0

(165) 0x423934 UNPCKHPD	%XMM3,%XMM0

(165) 0x423938 ADDSD	%XMM3,%XMM0

(165) 0x42393c MULSD	0x77adc(%RIP),%XMM0

(165) 0x423944 MOV	-0xb0(%RBP),%RDI

(165) 0x42394b IMUL	%RAX,%RDI

(165) 0x42394f ADD	%RDX,%RDI

(165) 0x423952 MOV	-0x58(%RBP),%R9

(165) 0x423956 MOVSD	%XMM0,(%R9,%RDI,8)

(165) 0x42395c MOV	-0xa0(%RBP),%RDI

(165) 0x423963 IMUL	%RDI,%RSI

(165) 0x423967 ADD	%RDX,%RSI

(165) 0x42396a SUBSD	(%R15,%RSI,8),%XMM0

(165) 0x423970 MOV	%RDI,%RSI

(165) 0x423973 IMUL	%RAX,%RSI

(165) 0x423977 ADD	%RDX,%RSI

(165) 0x42397a ADDSD	(%R15,%RSI,8),%XMM0

(165) 0x423980 IMUL	-0xa8(%RBP),%RAX

(165) 0x423988 ADD	%RDX,%RAX

(165) 0x42398b MOVSD	%XMM0,(%R13,%RAX,8)

(165) 0x423992 INC	%RCX

(165) 0x423995 CMP	%RCX,-0x30(%RBP)

(165) 0x423999 JE	423846

(165) 0x42399f MOV	%RCX,%RAX

(165) 0x4239a2 SHR	$0x20,%RAX

(165) 0x4239a6 JNE	423890

(165) 0x4239ac MOV	%ECX,%EAX

(165) 0x4239ae XOR	%EDX,%EDX

(165) 0x4239b0 DIV	%EBX

(165) 0x4239b2 JMP	423898

0x4239b7 NOPW	(%RAX,%RAX,1)

Coverage (%)	Name	Source Location	Module
►100.00+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run orig_0

Source file and lines	advec_mom.cpp:167-173
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_GNR/173-814-2343/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_mom.cpp:167-173
/home/eoseret/qaas_runs_GNR/173-814-2343/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:69

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 24.83 to 11.00 cycles (2.26x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is poorly vectorized. Only 15% of vector register length is used (average across all SSE/AVX instructions). By fully vectorizing your function, you can lower the cost of an iteration from 24.83 to 2.94 cycles (8.45x speedup).

Details

32% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

7% of SSE/AVX loads are used in vector version.
37% of SSE/AVX stores are used in vector version.
12% of SSE/AVX addition or subtraction instructions are used in vector version.
43% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

__kmpc_for_static_init_8@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-814-2343/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_mom.cpp:167

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 216 bytes. The binary function is storing 344 bytes.

General properties

nb instructions	148
nb uops	149
loop length	671
used x86 registers	16
used mmx registers	0
used xmm registers	5
used ymm registers	0
used zmm registers	0
nb stack references	36

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	24.83 cycles
front end	24.83 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	7.30	11.00	13.67	13.67	21.00	11.00	7.30	21.00	21.00	21.00	7.40	13.67
cycles	7.30	11.00	13.67	13.67	21.00	11.00	7.30	21.00	21.00	21.00	7.40	13.67

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	24.83
Dispatch	21.00
Overall L1	24.83

Vectorization ratios

all	32%
load	7%
store	37%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	43%

Vector efficiency ratios

all	15%
load	11%
store	16%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	13%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	16%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 24.83 cycles. At this rate:

4% of peak load performance is reached (8.70 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
10% of peak store performance is reached (13.85 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 24.83 to 21.00 cycles (1.18x speedup).

ASM code

In the binary file, the address of the function is: 423160

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
SUB $0x158,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RCX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x38(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x28(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x20(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x10(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x18(%RBP),%EDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (6.3%)
MOV %RDX,-0x50(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVL $0,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
TEST %RAX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JS 423864 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.12+0x704>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R8,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R9,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RCX,-0x48(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV (%RDI),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (6.3%)
MOVQ $0,-0x68(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %RAX,-0x60(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVQ $0x1,-0xb8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
LEA -0xb8(%RBP),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x38(%RBP),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x68(%RBP),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x60(%RBP),%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV $0x4b77f0,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %ESI,-0x34(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
PUSH $0x1	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH $0x1	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RAX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
CALL 4031f0 <__kmpc_for_static_init_8@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
ADD $0x20,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x68(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %RAX,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JA 423846 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.12+0x6e6>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x48(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
SUB %EAX,%EBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV (%R13),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x10(%R13),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV (%R14),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x10(%R14),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV (%R12),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x10(%R12),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV %R11,-0x58(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV (%R15),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x10(%R15),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x30(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R12),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x10(%R12),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RDX,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDX,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RCX,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV $-0x2,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
AND %R12,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	scal (12.5%)
MOV %R14,-0xa0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R9,-0xb0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R11,-0xa8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JE 423876 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.12+0x716>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R12,-0x70(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RBX,-0x88(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVD %EBX,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	scal (6.3%)
PSHUFD $0x44,%XMM0,%XMM1	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVD -0x50(%RBP),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	0.33	scal (6.3%)
PSHUFD $0x50,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x170(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVD %EAX,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	scal (6.3%)
PSHUFD $0x50,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x160(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOV %RSI,-0x80(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVQ %RSI,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM2	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOV %RDI,-0x78(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVQ %RDI,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM3	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVQ %R9,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x130(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVQ %R14,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0xe0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVQ %R11,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x120(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVQ %RCX,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM8	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
PADDQ 0x78122(%RIP),%XMM8	1	0.33	0.33	0.33	0.33	0	0.33	0	0	0	0	0	0.33	1	0.33	vect (25.0%)
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOVQ %XMM1,-0x98(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVDQA %XMM1,-0x180(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
PSHUFD $-0x12,%XMM1,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVQ %XMM0,-0x90(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVDQA %XMM2,-0x150(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
PSRLQ $0x20,%XMM2	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1-2	0.50	vect (25.0%)
MOVDQA %XMM2,-0x110(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVQ %R8,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x100(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVDQA %XMM3,-0x140(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
PSRLQ $0x20,%XMM3	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1-2	0.50	vect (25.0%)
MOVDQA %XMM3,-0xf0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVQ %R10,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0xd0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOV %R13,-0x40(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R13,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x40(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %RAX,-0x70(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
MOV -0x88(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV -0x80(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x78(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JNE 423881 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.12+0x721>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV $0x4b7810,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0x34(%RBP),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (6.3%)
ADD $0x158,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
JMP 403050 <__kmpc_for_static_fini@plt>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
ADD $0x158,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
MOV %RSI,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDI,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 42399f <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.12+0x83f>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
ADD %RAX,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
JMP 42399f <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.12+0x83f>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run orig_0

Source file and lines	advec_mom.cpp:167-173
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_GNR/173-814-2343/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_mom.cpp:167-173
/home/eoseret/qaas_runs_GNR/173-814-2343/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:69

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

32% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

7% of SSE/AVX loads are used in vector version.
37% of SSE/AVX stores are used in vector version.
12% of SSE/AVX addition or subtraction instructions are used in vector version.
43% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

__kmpc_for_static_init_8@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-814-2343/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_mom.cpp:167

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 216 bytes. The binary function is storing 344 bytes.

General properties

nb instructions	148
nb uops	149
loop length	671
used x86 registers	16
used mmx registers	0
used xmm registers	5
used ymm registers	0
used zmm registers	0
nb stack references	36

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	24.83 cycles
front end	24.83 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	7.30	11.00	13.67	13.67	21.00	11.00	7.30	21.00	21.00	21.00	7.40	13.67
cycles	7.30	11.00	13.67	13.67	21.00	11.00	7.30	21.00	21.00	21.00	7.40	13.67

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	24.83
Dispatch	21.00
Overall L1	24.83

Vectorization ratios

all	32%
load	7%
store	37%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	43%

Vector efficiency ratios

all	15%
load	11%
store	16%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	13%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	16%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 24.83 cycles. At this rate:

4% of peak load performance is reached (8.70 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
10% of peak store performance is reached (13.85 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 423160

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
SUB $0x158,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RCX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x38(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x28(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x20(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x10(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x18(%RBP),%EDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (6.3%)
MOV %RDX,-0x50(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVL $0,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
TEST %RAX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JS 423864 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.12+0x704>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R8,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R9,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RCX,-0x48(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV (%RDI),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (6.3%)
MOVQ $0,-0x68(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %RAX,-0x60(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVQ $0x1,-0xb8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
LEA -0xb8(%RBP),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x38(%RBP),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x68(%RBP),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x60(%RBP),%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV $0x4b77f0,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %ESI,-0x34(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
PUSH $0x1	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH $0x1	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RAX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
CALL 4031f0 <__kmpc_for_static_init_8@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
ADD $0x20,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x68(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %RAX,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JA 423846 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.12+0x6e6>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %RAX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x48(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
SUB %EAX,%EBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV (%R13),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x10(%R13),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV (%R14),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x10(%R14),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV (%R12),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x10(%R12),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV %R11,-0x58(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV (%R15),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x10(%R15),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x30(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%R12),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x10(%R12),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
INC %RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %RDX,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDX,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RCX,%R12	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV $-0x2,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
AND %R12,%RDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	scal (12.5%)
MOV %R14,-0xa0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R9,-0xb0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R11,-0xa8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JE 423876 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.12+0x716>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R12,-0x70(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RBX,-0x88(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVD %EBX,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	scal (6.3%)
PSHUFD $0x44,%XMM0,%XMM1	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVD -0x50(%RBP),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	0.33	scal (6.3%)
PSHUFD $0x50,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x170(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVD %EAX,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	scal (6.3%)
PSHUFD $0x50,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x160(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOV %RSI,-0x80(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVQ %RSI,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM2	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOV %RDI,-0x78(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVQ %RDI,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM3	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVQ %R9,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x130(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVQ %R14,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0xe0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVQ %R11,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x120(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVQ %RCX,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM8	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
PADDQ 0x78122(%RIP),%XMM8	1	0.33	0.33	0.33	0.33	0	0.33	0	0	0	0	0	0.33	1	0.33	vect (25.0%)
XOR %ESI,%ESI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOVQ %XMM1,-0x98(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVDQA %XMM1,-0x180(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
PSHUFD $-0x12,%XMM1,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVQ %XMM0,-0x90(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVDQA %XMM2,-0x150(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
PSRLQ $0x20,%XMM2	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1-2	0.50	vect (25.0%)
MOVDQA %XMM2,-0x110(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVQ %R8,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x100(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVDQA %XMM3,-0x140(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
PSRLQ $0x20,%XMM3	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1-2	0.50	vect (25.0%)
MOVDQA %XMM3,-0xf0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVQ %R10,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0xd0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOV %R13,-0x40(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV %R13,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x40(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
CMP %RAX,-0x70(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
MOV -0x88(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV -0x80(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x78(%RBP),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JNE 423881 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.12+0x721>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV $0x4b7810,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0x34(%RBP),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (6.3%)
ADD $0x158,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
JMP 403050 <__kmpc_for_static_fini@plt>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
ADD $0x158,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
MOV %RSI,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDI,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 42399f <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.12+0x83f>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
ADD %RAX,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
JMP 42399f <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii.extracted.12+0x83f>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

Name	Coverage (%)	Time (s)
▼advec_mom_kernel(int, int, int, int, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clo...–	2.85	1.12
○Loop 166 - advec_mom.cpp:168-173 - exec	2.85	1.12
○Loop 165 - advec_mom.cpp:168-173 - exec	0.00	0.00

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Matching between your function (in the source code) and the binary function

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ASM code