OV - exec - Function advec_cell_kernel(int, int, int, int, int, int, clover::Buffer1D<double>&, clover::Buffer1D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&) [clone .extracted.37]

	Function: advec_cell_kernel(int, int, int, int, int, int, clover::Buffer1D<double>&, clover::Buffer1 ...	Module: exec	Source: advec_cell.cpp:44-49 [...]	Coverage (incl. loops): 1.18% \| (excl. loops): 0.00%

/home/eoseret/qaas_runs_GNR/173-814-2343/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_cell.cpp: 44 - 49

--------------------------------------------------------------------------------

44: #pragma omp parallel for simd collapse(2)

45:       for (int j = (y_min - 2 + 1); j < (y_max + 2 + 2); j++) {

46:         for (int i = (x_min - 2 + 1); i < (x_max + 2 + 2); i++) {

47:           pre_vol(i, j) = volume(i, j) + (vol_flux_x(i + 1, j + 0) - vol_flux_x(i, j) + vol_flux_y(i + 0, j + 1) - vol_flux_y(i, j));

48:           post_vol(i, j) = pre_vol(i, j) - (vol_flux_x(i + 1, j + 0) - vol_flux_x(i, j));

49:         }

/home/eoseret/qaas_runs_GNR/173-814-2343/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h: 69 - 69

--------------------------------------------------------------------------------

69:   T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; }

0x421570 PUSH	%RBP

0x421571 MOV	%RSP,%RBP

0x421574 PUSH	%R15

0x421576 PUSH	%R14

0x421578 PUSH	%R13

0x42157a PUSH	%R12

0x42157c PUSH	%RBX

0x42157d SUB	$0x108,%RSP

0x421584 MOV	%RCX,%R12

0x421587 MOV	0x38(%RBP),%RAX

0x42158b MOV	0x28(%RBP),%R14

0x42158f MOV	0x20(%RBP),%R10

0x421593 MOV	0x10(%RBP),%RSI

0x421597 MOV	0x18(%RBP),%ECX

0x42159a MOV	%RCX,-0x58(%RBP)

0x42159e MOVL	$0,-0x38(%RBP)

0x4215a5 TEST	%RAX,%RAX

0x4215a8 JS	421afb

0x4215ae MOV	%R9,%RBX

0x4215b1 MOV	%R8,%R15

0x4215b4 MOV	%RDX,%R13

0x4215b7 MOV	%RSI,-0x30(%RBP)

0x4215bb MOV	(%RDI),%ESI

0x4215bd MOVQ	$0,-0x68(%RBP)

0x4215c5 MOV	%RAX,-0x60(%RBP)

0x4215c9 MOVQ	$0x1,-0xc0(%RBP)

0x4215d4 SUB	$0x8,%RSP

0x4215d8 LEA	-0xc0(%RBP),%RAX

0x4215df LEA	-0x38(%RBP),%RCX

0x4215e3 LEA	-0x68(%RBP),%R8

0x4215e7 LEA	-0x60(%RBP),%R9

0x4215eb MOV	$0x4b76d0,%EDI

0x4215f0 MOV	%ESI,-0x34(%RBP)

0x4215f3 MOV	$0x22,%EDX

0x4215f8 PUSH	$0x1

0x4215fa PUSH	$0x1

0x4215fc PUSH	%RAX

0x4215fd MOV	%R10,-0x40(%RBP)

0x421601 CALL	4031f0 <__kmpc_for_static_init_8@plt>

0x421606 MOV	-0x40(%RBP),%R10

0x42160a MOV	%R14,%R9

0x42160d ADD	$0x20,%RSP

0x421611 MOV	-0x68(%RBP),%RCX

0x421615 MOV	-0x60(%RBP),%R14

0x421619 CMP	%R14,%RCX

0x42161c JA	421add

0x421622 SUB	%R10D,%R9D

0x421625 MOV	(%R13),%RAX

0x421629 MOV	0x10(%R13),%RDX

0x42162d MOV	%RDX,-0x50(%RBP)

0x421631 MOV	(%R12),%RSI

0x421635 MOV	0x10(%R12),%R11

0x42163a MOV	(%R15),%RDI

0x42163d MOV	0x10(%R15),%R15

0x421641 MOV	(%RBX),%R8

0x421644 MOV	0x10(%RBX),%RDX

0x421648 MOV	-0x30(%RBP),%RBX

0x42164c MOV	(%RBX),%R12

0x42164f MOV	0x10(%RBX),%R13

0x421653 MOV	%R13,-0x30(%RBP)

0x421657 INC	%R14

0x42165a MOV	%R14,%RBX

0x42165d SUB	%RCX,%RBX

0x421660 MOV	$-0x2,%R13D

0x421666 MOV	%RBX,-0x88(%RBP)

0x42166d AND	%RBX,%R13

0x421670 MOV	%RSI,-0x48(%RBP)

0x421674 MOV	%RDI,-0xb8(%RBP)

0x42167b MOV	%R8,-0xb0(%RBP)

0x421682 MOV	%RDX,-0xa8(%RBP)

0x421689 MOV	%R12,-0xa0(%RBP)

0x421690 JE	421b0d

0x421696 MOV	%R14,-0x78(%RBP)

0x42169a MOV	%R9,-0x80(%RBP)

0x42169e MOVD	%R9D,%XMM0

0x4216a3 PSHUFD	$0x44,%XMM0,%XMM2

0x4216a8 MOVD	-0x58(%RBP),%XMM0

0x4216ad PSHUFD	$0x50,%XMM0,%XMM0

0x4216b2 MOVDQA	%XMM0,-0x120(%RBP)

0x4216ba MOVD	%R10D,%XMM0

0x4216bf PSHUFD	$0x50,%XMM0,%XMM0

0x4216c4 MOVDQA	%XMM0,-0x110(%RBP)

0x4216cc MOV	%RAX,-0x70(%RBP)

0x4216d0 MOVQ	%RAX,%XMM0

0x4216d5 PSHUFD	$0x44,%XMM0,%XMM3

0x4216da MOVQ	%RSI,%XMM0

0x4216df PSHUFD	$0x44,%XMM0,%XMM13

0x4216e5 MOVQ	%RDI,%XMM0

0x4216ea PSHUFD	$0x44,%XMM0,%XMM12

0x4216f0 MOVQ	%R8,%XMM0

0x4216f5 PSHUFD	$0x44,%XMM0,%XMM6

0x4216fa MOVQ	%R12,%XMM0

0x4216ff MOVQ	%RCX,%XMM1

0x421704 PSHUFD	$0x44,%XMM1,%XMM7

0x421709 PADDQ	0x79d1f(%RIP),%XMM7

0x421711 PSHUFD	$0x44,%XMM0,%XMM8

0x421717 XOR	%R9D,%R9D

0x42171a MOVQ	%XMM2,-0x98(%RBP)

0x421722 MOVDQA	%XMM2,-0x130(%RBP)

0x42172a PSHUFD	$-0x12,%XMM2,%XMM0

0x42172f MOVQ	%XMM0,-0x90(%RBP)

0x421737 MOVDQA	%XMM3,-0xe0(%RBP)

0x42173f MOVDQA	%XMM3,%XMM0

0x421743 PSRLQ	$0x20,%XMM0

0x421748 MOVDQA	%XMM0,-0x100(%RBP)

0x421750 MOVQ	-0x50(%RBP),%XMM0

0x421755 PSHUFD	$0x44,%XMM0,%XMM0

0x42175a MOVDQA	%XMM0,-0xf0(%RBP)

0x421762 MOVDQA	%XMM13,%XMM0

0x421767 PSRLQ	$0x20,%XMM0

0x42176c MOVDQA	%XMM0,-0xd0(%RBP)

0x421774 MOVQ	%R11,%XMM0

0x421779 PSHUFD	$0x44,%XMM0,%XMM14

0x42177f MOV	%RDX,%R12

0x421782 PCMPEQD	%XMM11,%XMM11

0x421787 NOPW	(%RAX,%RAX,1)

(160) 0x421790 MOVQ	%XMM7,%RAX

(160) 0x421795 XOR	%EDX,%EDX

(160) 0x421797 DIVQ	-0x98(%RBP)

(160) 0x42179e MOV	%RAX,%RSI

(160) 0x4217a1 PSHUFD	$-0x12,%XMM7,%XMM0

(160) 0x4217a6 MOVQ	%XMM0,%RAX

(160) 0x4217ab XOR	%EDX,%EDX

(160) 0x4217ad DIVQ	-0x90(%RBP)

(160) 0x4217b4 MOVQ	%RSI,%XMM0

(160) 0x4217b9 MOVQ	%RAX,%XMM1

(160) 0x4217be PUNPCKLQDQ	%XMM1,%XMM0

(160) 0x4217c2 PSHUFD	$-0x18,%XMM0,%XMM1

(160) 0x4217c7 PADDD	-0x120(%RBP),%XMM1

(160) 0x4217cf PMULUDQ	-0x130(%RBP),%XMM0

(160) 0x4217d7 MOVDQA	%XMM7,%XMM2

(160) 0x4217db PSUBQ	%XMM0,%XMM2

(160) 0x4217df PSHUFD	$-0x18,%XMM2,%XMM15

(160) 0x4217e5 PXOR	%XMM4,%XMM4

(160) 0x4217e9 PXOR	%XMM9,%XMM9

(160) 0x4217ee PADDD	-0x110(%RBP),%XMM15

(160) 0x4217f7 PCMPGTD	%XMM1,%XMM9

(160) 0x4217fc MOVDQA	%XMM1,%XMM0

(160) 0x421800 PUNPCKLDQ	%XMM9,%XMM0

(160) 0x421805 PCMPGTD	%XMM15,%XMM4

(160) 0x42180a MOVDQA	-0xe0(%RBP),%XMM10

(160) 0x421813 MOVDQA	%XMM10,%XMM3

(160) 0x421818 PMULUDQ	%XMM0,%XMM3

(160) 0x42181c MOVDQA	-0x100(%RBP),%XMM5

(160) 0x421824 MOVDQA	%XMM15,%XMM2

(160) 0x421829 PMULUDQ	%XMM0,%XMM5

(160) 0x42182d PUNPCKLDQ	0x78f6a(%RIP),%XMM9

(160) 0x421836 PUNPCKLDQ	%XMM4,%XMM2

(160) 0x42183a PMULUDQ	%XMM9,%XMM10

(160) 0x42183f PADDQ	%XMM5,%XMM10

(160) 0x421844 PSLLQ	$0x20,%XMM10

(160) 0x42184a PADDQ	%XMM2,%XMM3

(160) 0x42184e PSUBD	%XMM11,%XMM15

(160) 0x421853 PXOR	%XMM4,%XMM4

(160) 0x421857 PCMPGTD	%XMM15,%XMM4

(160) 0x42185c PADDQ	%XMM10,%XMM3

(160) 0x421861 PUNPCKLDQ	%XMM4,%XMM15

(160) 0x421866 MOVDQA	%XMM13,%XMM5

(160) 0x42186b PMULUDQ	%XMM0,%XMM5

(160) 0x42186f PSLLQ	$0x3,%XMM3

(160) 0x421874 MOVDQA	-0xd0(%RBP),%XMM10

(160) 0x42187d PMULUDQ	%XMM0,%XMM10

(160) 0x421882 MOVDQA	%XMM13,%XMM4

(160) 0x421887 PADDQ	-0xf0(%RBP),%XMM3

(160) 0x42188f PMULUDQ	%XMM9,%XMM4

(160) 0x421894 PADDQ	%XMM10,%XMM4

(160) 0x421899 PSLLQ	$0x20,%XMM4

(160) 0x42189e MOVQ	%XMM3,%RDI

(160) 0x4218a3 PADDQ	%XMM5,%XMM4

(160) 0x4218a7 PSUBD	%XMM11,%XMM1

(160) 0x4218ac PXOR	%XMM10,%XMM10

(160) 0x4218b1 PSHUFD	$-0x12,%XMM3,%XMM3

(160) 0x4218b6 PCMPGTD	%XMM1,%XMM10

(160) 0x4218bb PUNPCKLDQ	%XMM10,%XMM1

(160) 0x4218c0 MOVDQA	%XMM12,%XMM5

(160) 0x4218c5 MOVQ	%XMM3,%R10

(160) 0x4218ca PMULUDQ	%XMM1,%XMM5

(160) 0x4218ce MOVDQA	%XMM12,%XMM3

(160) 0x4218d3 PSRLQ	$0x20,%XMM3

(160) 0x4218d8 PMULUDQ	%XMM3,%XMM1

(160) 0x4218dc PSHUFD	$-0x2c,%XMM10,%XMM10

(160) 0x4218e2 PMULUDQ	%XMM12,%XMM10

(160) 0x4218e7 PADDQ	%XMM1,%XMM10

(160) 0x4218ec PSLLQ	$0x20,%XMM10

(160) 0x4218f2 PADDQ	%XMM2,%XMM5

(160) 0x4218f6 PADDQ	%XMM10,%XMM5

(160) 0x4218fb PADDQ	%XMM4,%XMM15

(160) 0x421900 PSLLQ	$0x3,%XMM15

(160) 0x421906 PADDQ	%XMM14,%XMM15

(160) 0x42190b MOVQ	%XMM15,%RAX

(160) 0x421910 PADDQ	%XMM2,%XMM4

(160) 0x421914 PSHUFD	$-0x12,%XMM15,%XMM1

(160) 0x42191a PSLLQ	$0x3,%XMM4

(160) 0x42191f PADDQ	%XMM14,%XMM4

(160) 0x421924 MOVQ	%XMM4,%RDX

(160) 0x421929 MOVQ	%XMM1,%RSI

(160) 0x42192e PSLLQ	$0x3,%XMM5

(160) 0x421933 MOVQ	%R15,%XMM1

(160) 0x421938 PSHUFD	$0x44,%XMM1,%XMM1

(160) 0x42193d PSHUFD	$-0x12,%XMM4,%XMM4

(160) 0x421942 PADDQ	%XMM1,%XMM5

(160) 0x421946 MOVQ	%XMM5,%R14

(160) 0x42194b PSHUFD	$-0x12,%XMM5,%XMM5

(160) 0x421950 MOV	%R13,%RBX

(160) 0x421953 MOVQ	%XMM4,%R13

(160) 0x421958 MOVDQA	%XMM12,%XMM4

(160) 0x42195d PMULUDQ	%XMM0,%XMM4

(160) 0x421961 PMULUDQ	%XMM0,%XMM3

(160) 0x421965 MOVQ	%XMM5,%R8

(160) 0x42196a MOVDQA	%XMM12,%XMM5

(160) 0x42196f PMULUDQ	%XMM9,%XMM5

(160) 0x421974 PADDQ	%XMM3,%XMM5

(160) 0x421978 MOVSD	(%RDI),%XMM3

(160) 0x42197c PSLLQ	$0x20,%XMM5

(160) 0x421981 PADDQ	%XMM2,%XMM4

(160) 0x421985 MOVHPD	(%R10),%XMM3

(160) 0x42198a PADDQ	%XMM5,%XMM4

(160) 0x42198e MOVSD	(%RAX),%XMM5

(160) 0x421992 MOVHPD	(%RSI),%XMM5

(160) 0x421996 PSLLQ	$0x3,%XMM4

(160) 0x42199b PADDQ	%XMM1,%XMM4

(160) 0x42199f MOVQ	%XMM4,%RDI

(160) 0x4219a4 MOVSD	(%R14),%XMM1

(160) 0x4219a9 PSHUFD	$-0x12,%XMM4,%XMM4

(160) 0x4219ae MOVQ	%XMM4,%R10

(160) 0x4219b3 MOVHPD	(%R8),%XMM1

(160) 0x4219b8 MOVSD	(%RDX),%XMM4

(160) 0x4219bc MOVHPD	(%R13),%XMM4

(160) 0x4219c2 ADDPD	%XMM3,%XMM5

(160) 0x4219c6 MOVSD	(%RDI),%XMM3

(160) 0x4219ca MOVHPD	(%R10),%XMM3

(160) 0x4219cf ADDPD	%XMM4,%XMM3

(160) 0x4219d3 MOVDQA	%XMM6,%XMM4

(160) 0x4219d7 PSRLQ	$0x20,%XMM4

(160) 0x4219dc PMULUDQ	%XMM0,%XMM4

(160) 0x4219e0 ADDPD	%XMM5,%XMM1

(160) 0x4219e4 MOVDQA	%XMM6,%XMM5

(160) 0x4219e8 PMULUDQ	%XMM9,%XMM5

(160) 0x4219ed PADDQ	%XMM4,%XMM5

(160) 0x4219f1 SUBPD	%XMM3,%XMM1

(160) 0x4219f5 MOVDQA	%XMM6,%XMM3

(160) 0x4219f9 PMULUDQ	%XMM0,%XMM3

(160) 0x4219fd PSLLQ	$0x20,%XMM5

(160) 0x421a02 PADDQ	%XMM2,%XMM3

(160) 0x421a06 PADDQ	%XMM5,%XMM3

(160) 0x421a0a MOVQ	%R12,%XMM4

(160) 0x421a0f PSHUFD	$0x44,%XMM4,%XMM4

(160) 0x421a14 PSLLQ	$0x3,%XMM3

(160) 0x421a19 PADDQ	%XMM3,%XMM4

(160) 0x421a1d MOVQ	%XMM4,%RDI

(160) 0x421a22 PSHUFD	$-0x12,%XMM4,%XMM3

(160) 0x421a27 MOVQ	%XMM3,%R8

(160) 0x421a2c MOVDQA	%XMM8,%XMM3

(160) 0x421a31 MOVDQA	%XMM8,%XMM4

(160) 0x421a36 PSRLQ	$0x20,%XMM4

(160) 0x421a3b PMULUDQ	%XMM0,%XMM3

(160) 0x421a3f PMULUDQ	%XMM0,%XMM4

(160) 0x421a43 PMULUDQ	%XMM8,%XMM9

(160) 0x421a48 PADDQ	%XMM4,%XMM9

(160) 0x421a4d PADDQ	%XMM2,%XMM3

(160) 0x421a51 MOVLPD	%XMM1,(%RDI)

(160) 0x421a55 MOVHPD	%XMM1,(%R8)

(160) 0x421a5a PSLLQ	$0x20,%XMM9

(160) 0x421a60 PADDQ	%XMM9,%XMM3

(160) 0x421a65 PSLLQ	$0x3,%XMM3

(160) 0x421a6a MOVQ	-0x30(%RBP),%XMM0

(160) 0x421a6f PSHUFD	$0x44,%XMM0,%XMM0

(160) 0x421a74 PADDQ	%XMM3,%XMM0

(160) 0x421a78 MOVSD	(%RAX),%XMM2

(160) 0x421a7c MOVHPD	(%RSI),%XMM2

(160) 0x421a80 SUBPD	%XMM2,%XMM1

(160) 0x421a84 MOVSD	(%RDX),%XMM2

(160) 0x421a88 MOVHPD	(%R13),%XMM2

(160) 0x421a8e MOV	%RBX,%R13

(160) 0x421a91 ADDPD	%XMM2,%XMM1

(160) 0x421a95 MOVQ	%XMM0,%RAX

(160) 0x421a9a PSHUFD	$-0x12,%XMM0,%XMM0

(160) 0x421a9f MOVQ	%XMM0,%RDX

(160) 0x421aa4 MOVLPD	%XMM1,(%RAX)

(160) 0x421aa8 MOVHPD	%XMM1,(%RDX)

(160) 0x421aac PADDQ	0x7999c(%RIP),%XMM7

(160) 0x421ab4 ADD	$0x2,%R9

(160) 0x421ab8 CMP	%RBX,%R9

(160) 0x421abb JB	421790

0x421ac1 CMP	%R13,-0x88(%RBP)

0x421ac8 MOV	-0x80(%RBP),%R9

0x421acc MOV	-0x40(%RBP),%R10

0x421ad0 MOV	-0x78(%RBP),%R14

0x421ad4 MOV	%R13,%RAX

0x421ad7 MOV	-0x70(%RBP),%R13

0x421adb JNE	421b15

0x421add MOV	$0x4b76f0,%EDI

0x421ae2 MOV	-0x34(%RBP),%ESI

0x421ae5 ADD	$0x108,%RSP

0x421aec POP	%RBX

0x421aed POP	%R12

0x421aef POP	%R13

0x421af1 POP	%R14

0x421af3 POP	%R15

0x421af5 POP	%RBP

0x421af6 JMP	403050

0x421afb ADD	$0x108,%RSP

0x421b02 POP	%RBX

0x421b03 POP	%R12

0x421b05 POP	%R13

0x421b07 POP	%R14

0x421b09 POP	%R15

0x421b0b POP	%RBP

0x421b0c RET

0x421b0d MOV	%RAX,%R13

0x421b10 JMP	421bdc

0x421b15 ADD	%RAX,%RCX

0x421b18 JMP	421bdc

0x421b1d NOPL	(%RAX)

(159) 0x421b20 MOV	%RCX,%RAX

(159) 0x421b23 XOR	%EDX,%EDX

(159) 0x421b25 DIV	%R9

(159) 0x421b28 MOV	-0x48(%RBP),%RDI

(159) 0x421b2c MOV	-0x58(%RBP),%R12

(159) 0x421b30 LEA	(%RAX,%R12,1),%ESI

(159) 0x421b34 ADD	%R10D,%EDX

(159) 0x421b37 MOVSXD	%EDX,%RDX

(159) 0x421b3a MOVSXD	%ESI,%RSI

(159) 0x421b3d MOV	%R13,%R8

(159) 0x421b40 IMUL	%RSI,%R8

(159) 0x421b44 ADD	%RDX,%R8

(159) 0x421b47 IMUL	%RSI,%RDI

(159) 0x421b4b ADD	%RDX,%RDI

(159) 0x421b4e MOVSD	0x8(%R11,%RDI,8),%XMM0

(159) 0x421b55 MOV	-0x50(%RBP),%RBX

(159) 0x421b59 ADDSD	(%RBX,%R8,8),%XMM0

(159) 0x421b5f MOVSD	(%R11,%RDI,8),%XMM1

(159) 0x421b65 ADD	%R12D,%EAX

(159) 0x421b68 INC	%EAX

(159) 0x421b6a CLTQ

(159) 0x421b6c MOV	-0xb8(%RBP),%R8

(159) 0x421b73 IMUL	%R8,%RAX

(159) 0x421b77 ADD	%RDX,%RAX

(159) 0x421b7a ADDSD	(%R15,%RAX,8),%XMM0

(159) 0x421b80 MOV	%R8,%RAX

(159) 0x421b83 IMUL	%RSI,%RAX

(159) 0x421b87 ADD	%RDX,%RAX

(159) 0x421b8a ADDSD	(%R15,%RAX,8),%XMM1

(159) 0x421b90 SUBSD	%XMM1,%XMM0

(159) 0x421b94 MOV	-0xb0(%RBP),%RAX

(159) 0x421b9b IMUL	%RSI,%RAX

(159) 0x421b9f ADD	%RDX,%RAX

(159) 0x421ba2 MOV	-0xa8(%RBP),%R8

(159) 0x421ba9 MOVSD	%XMM0,(%R8,%RAX,8)

(159) 0x421baf SUBSD	0x8(%R11,%RDI,8),%XMM0

(159) 0x421bb6 ADDSD	(%R11,%RDI,8),%XMM0

(159) 0x421bbc IMUL	-0xa0(%RBP),%RSI

(159) 0x421bc4 ADD	%RDX,%RSI

(159) 0x421bc7 MOV	-0x30(%RBP),%RAX

(159) 0x421bcb MOVSD	%XMM0,(%RAX,%RSI,8)

(159) 0x421bd0 INC	%RCX

(159) 0x421bd3 CMP	%RCX,%R14

(159) 0x421bd6 JE	421add

(159) 0x421bdc MOV	%RCX,%RAX

(159) 0x421bdf SHR	$0x20,%RAX

(159) 0x421be3 JNE	421b20

(159) 0x421be9 MOV	%ECX,%EAX

(159) 0x421beb XOR	%EDX,%EDX

(159) 0x421bed DIV	%R9D

(159) 0x421bf0 JMP	421b28

0x421bf5 NOPW	%CS:(%RAX,%RAX,1)

0x421bff NOP

Coverage (%)	Name	Source Location	Module
►100.00+	__kmp_invoke_microtask		libiomp5.so
○	__kmp_invoke_task_func		libiomp5.so

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run orig_0

Source file and lines	advec_cell.cpp:44-49
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_GNR/173-814-2343/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_cell.cpp:44-49
/home/eoseret/qaas_runs_GNR/173-814-2343/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:69

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 24.83 to 10.50 cycles (2.37x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is poorly vectorized. Only 15% of vector register length is used (average across all SSE/AVX instructions). By fully vectorizing your function, you can lower the cost of an iteration from 24.83 to 2.70 cycles (9.21x speedup).

Details

29% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

5% of SSE/AVX loads are used in vector version.
25% of SSE/AVX stores are used in vector version.
12% of SSE/AVX addition or subtraction instructions are used in vector version.
53% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

__kmpc_for_static_init_8@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-814-2343/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_cell.cpp:44

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 224 bytes. The binary function is storing 272 bytes.

General properties

nb instructions	148
nb uops	149
loop length	650
used x86 registers	16
used mmx registers	0
used xmm registers	11
used ymm registers	0
used zmm registers	0
nb stack references	32

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	24.83 cycles
front end	24.83 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	7.70	10.50	14.00	14.00	19.00	10.50	7.70	19.00	19.00	19.00	7.60	14.00
cycles	7.70	10.50	14.00	14.00	19.00	10.50	7.70	19.00	19.00	19.00	7.60	14.00

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	24.83
Dispatch	19.00
Overall L1	24.83

Vectorization ratios

all	29%
load	5%
store	25%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	53%

Vector efficiency ratios

all	15%
load	12%
store	14%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	13%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	18%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 24.83 cycles. At this rate:

4% of peak load performance is reached (9.02 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
8% of peak store performance is reached (10.95 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 24.83 to 19.00 cycles (1.31x speedup).

ASM code

In the binary file, the address of the function is: 421570

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
SUB $0x108,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RCX,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x38(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x28(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x20(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x10(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x18(%RBP),%ECX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RCX,-0x58(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVL $0,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
TEST %RAX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JS 421afb <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.37+0x58b>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R9,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R8,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RSI,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV (%RDI),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (6.3%)
MOVQ $0,-0x68(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %RAX,-0x60(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVQ $0x1,-0xc0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
LEA -0xc0(%RBP),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x38(%RBP),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x68(%RBP),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x60(%RBP),%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV $0x4b76d0,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %ESI,-0x34(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
PUSH $0x1	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH $0x1	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RAX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %R10,-0x40(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CALL 4031f0 <__kmpc_for_static_init_8@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0x40(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV %R14,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
ADD $0x20,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x68(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
CMP %R14,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JA 421add <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.37+0x56d>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
SUB %R10D,%R9D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV (%R13),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x10(%R13),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV %RDX,-0x50(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV (%R12),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x10(%R12),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV (%R15),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x10(%R15),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RBX),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x10(%RBX),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV -0x30(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RBX),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x10(%RBX),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R13,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
INC %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %R14,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RCX,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV $-0x2,%R13D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RBX,-0x88(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
AND %RBX,%R13	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
MOV %RSI,-0x48(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDI,-0xb8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R8,-0xb0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDX,-0xa8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R12,-0xa0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JE 421b0d <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.37+0x59d>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R14,-0x78(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R9,-0x80(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVD %R9D,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	scal (6.3%)
PSHUFD $0x44,%XMM0,%XMM2	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVD -0x58(%RBP),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	0.33	scal (6.3%)
PSHUFD $0x50,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x120(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVD %R10D,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	scal (6.3%)
PSHUFD $0x50,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x110(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOV %RAX,-0x70(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVQ %RAX,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM3	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVQ %RSI,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM13	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVQ %RDI,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM12	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVQ %R8,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM6	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVQ %R12,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
MOVQ %RCX,%XMM1	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM1,%XMM7	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
PADDQ 0x79d1f(%RIP),%XMM7	1	0.33	0.33	0.33	0.33	0	0.33	0	0	0	0	0	0.33	1	0.33	vect (25.0%)
PSHUFD $0x44,%XMM0,%XMM8	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
XOR %R9D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOVQ %XMM2,-0x98(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVDQA %XMM2,-0x130(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
PSHUFD $-0x12,%XMM2,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVQ %XMM0,-0x90(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVDQA %XMM3,-0xe0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVDQA %XMM3,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
PSRLQ $0x20,%XMM0	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1-2	0.50	vect (25.0%)
MOVDQA %XMM0,-0x100(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVQ -0x50(%RBP),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0xf0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVDQA %XMM13,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
PSRLQ $0x20,%XMM0	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1-2	0.50	vect (25.0%)
MOVDQA %XMM0,-0xd0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVQ %R11,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM14	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOV %RDX,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PCMPEQD %XMM11,%XMM11	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0-1	0.50	vect (25.0%)
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %R13,-0x88(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
MOV -0x80(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV -0x40(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV -0x78(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV %R13,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x70(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JNE 421b15 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.37+0x5a5>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV $0x4b76f0,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0x34(%RBP),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (6.3%)
ADD $0x108,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
JMP 403050 <__kmpc_for_static_fini@plt>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
ADD $0x108,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
MOV %RAX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 421bdc <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.37+0x66c>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
ADD %RAX,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
JMP 421bdc <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.37+0x66c>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run orig_0

Source file and lines	advec_cell.cpp:44-49
Module	exec

The function is defined in:

/home/eoseret/qaas_runs_GNR/173-814-2343/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_cell.cpp:44-49
/home/eoseret/qaas_runs_GNR/173-814-2343/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:69

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

29% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

5% of SSE/AVX loads are used in vector version.
25% of SSE/AVX stores are used in vector version.
12% of SSE/AVX addition or subtraction instructions are used in vector version.
53% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

__kmpc_for_static_init_8@plt: 1 occurrences►
- /home/eoseret/qaas_runs_GNR/173-814-2343/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_cell.cpp:44

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 224 bytes. The binary function is storing 272 bytes.

General properties

nb instructions	148
nb uops	149
loop length	650
used x86 registers	16
used mmx registers	0
used xmm registers	11
used ymm registers	0
used zmm registers	0
nb stack references	32

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	24.83 cycles
front end	24.83 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11
uops	7.70	10.50	14.00	14.00	19.00	10.50	7.70	19.00	19.00	19.00	7.60	14.00
cycles	7.70	10.50	14.00	14.00	19.00	10.50	7.70	19.00	19.00	19.00	7.60	14.00

Execution ports to units layout:

P0 (256 bits): VPU, BRU, ALU, DIV/SQRT
P1 (256 bits): ALU, VPU
P2 (512 bits): load
P3 (512 bits): load
P4 (512 bits): store data
P5 (512 bits): ALU, VPU
P6: ALU, BRU
P7: store address
P8: store address
P9 (512 bits): store data
P10: ALU
P11 (512 bits): load

Cycles executing div or sqrt instructions

Cycles summary

Front-end	24.83
Dispatch	19.00
Overall L1	24.83

Vectorization ratios

all	29%
load	5%
store	25%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	12%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	53%

Vector efficiency ratios

all	15%
load	12%
store	14%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	13%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	18%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 24.83 cycles. At this rate:

4% of peak load performance is reached (9.02 out of 192.00 bytes loaded per cycle (GB/s @ 1GHz))
8% of peak store performance is reached (10.95 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 421570

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	Latency	Recip. throughput	Vectorization
PUSH %RBP	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PUSH %R15	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R14	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R13	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %R12	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RBX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
SUB $0x108,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
MOV %RCX,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV 0x38(%RBP),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x28(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x20(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x10(%RBP),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x18(%RBP),%ECX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %RCX,-0x58(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVL $0,-0x38(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
TEST %RAX,%RAX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	2	0.20	scal (12.5%)
JS 421afb <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.37+0x58b>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R9,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %R8,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RDX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV %RSI,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV (%RDI),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (6.3%)
MOVQ $0,-0x68(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV %RAX,-0x60(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVQ $0x1,-0xc0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
SUB $0x8,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
LEA -0xc0(%RBP),%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x38(%RBP),%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x68(%RBP),%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
LEA -0x60(%RBP),%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
MOV $0x4b76d0,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %ESI,-0x34(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (6.3%)
MOV $0x22,%EDX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
PUSH $0x1	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH $0x1	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
PUSH %RAX	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	5-12	0.50	N/A
MOV %R10,-0x40(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
CALL 4031f0 <__kmpc_for_static_init_8@plt>	2	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0	1	N/A
MOV -0x40(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV %R14,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
ADD $0x20,%RSP	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV -0x68(%RBP),%RCX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV -0x60(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
CMP %R14,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
JA 421add <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.37+0x56d>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
SUB %R10D,%R9D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (6.3%)
MOV (%R13),%RAX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x10(%R13),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV %RDX,-0x50(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV (%R12),%RSI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x10(%R12),%R11	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV (%R15),%RDI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x10(%R15),%R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RBX),%R8	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV 0x10(%RBX),%RDX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV -0x30(%RBP),%RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV (%RBX),%R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV 0x10(%RBX),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
MOV %R13,-0x30(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
INC %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	scal (12.5%)
MOV %R14,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
SUB %RCX,%RBX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV $-0x2,%R13D	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV %RBX,-0x88(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
AND %RBX,%R13	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1-2	0.20	N/A
MOV %RSI,-0x48(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDI,-0xb8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R8,-0xb0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %RDX,-0xa8(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R12,-0xa0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
JE 421b0d <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.37+0x59d>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV %R14,-0x78(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOV %R9,-0x80(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVD %R9D,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	scal (6.3%)
PSHUFD $0x44,%XMM0,%XMM2	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVD -0x58(%RBP),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	3	0.33	scal (6.3%)
PSHUFD $0x50,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x120(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVD %R10D,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	3	1	scal (6.3%)
PSHUFD $0x50,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0x110(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOV %RAX,-0x70(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVQ %RAX,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM3	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVQ %RSI,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM13	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVQ %RDI,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM12	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVQ %R8,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM6	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVQ %R12,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
MOVQ %RCX,%XMM1	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM1,%XMM7	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
PADDQ 0x79d1f(%RIP),%XMM7	1	0.33	0.33	0.33	0.33	0	0.33	0	0	0	0	0	0.33	1	0.33	vect (25.0%)
PSHUFD $0x44,%XMM0,%XMM8	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
XOR %R9D,%R9D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	scal (6.3%)
MOVQ %XMM2,-0x98(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVDQA %XMM2,-0x130(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
PSHUFD $-0x12,%XMM2,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVQ %XMM0,-0x90(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	1	0.50	scal (12.5%)
MOVDQA %XMM3,-0xe0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVDQA %XMM3,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
PSRLQ $0x20,%XMM0	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1-2	0.50	vect (25.0%)
MOVDQA %XMM0,-0x100(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVQ -0x50(%RBP),%XMM0	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM0	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOVDQA %XMM0,-0xf0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVDQA %XMM13,%XMM0	1	0	0	0	0	0	0	0	0	0	0	0	0	0-1	0.17	vect (25.0%)
PSRLQ $0x20,%XMM0	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	1-2	0.50	vect (25.0%)
MOVDQA %XMM0,-0xd0(%RBP)	1	0	0	0	0	0.50	0	0	0.50	0.50	0.50	0	0	0-1	0.50	vect (25.0%)
MOVQ %R11,%XMM0	1	0	0	0	0	0	1	0	0	0	0	0	0	1	1	scal (12.5%)
PSHUFD $0x44,%XMM0,%XMM14	1	0	0.50	0	0	0	0.50	0	0	0	0	0	0	1	0.50	vect (25.0%)
MOV %RDX,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
PCMPEQD %XMM11,%XMM11	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0-1	0.50	vect (25.0%)
NOPW (%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
CMP %R13,-0x88(%RBP)	1	0.20	0.20	0.33	0.33	0	0.20	0.20	0	0	0	0.20	0.33	1	0.33	scal (12.5%)
MOV -0x80(%RBP),%R9	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV -0x40(%RBP),%R10	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV -0x78(%RBP),%R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (12.5%)
MOV %R13,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
MOV -0x70(%RBP),%R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	N/A
JNE 421b15 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.37+0x5a5>	1	0.50	0	0	0	0	0	0.50	0	0	0	0	0	0	0.50	N/A
MOV $0x4b76f0,%EDI	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
MOV -0x34(%RBP),%ESI	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1	0.33	scal (6.3%)
ADD $0x108,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
JMP 403050 <__kmpc_for_static_fini@plt>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
ADD $0x108,%RSP	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	scal (12.5%)
POP %RBX	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R12	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R13	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R14	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %R15	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
POP %RBP	1	0	0	0.33	0.33	0	0	0	0	0	0	0	0.33	1-6	0.33	N/A
RET	1	0.50	0	0.33	0.33	0	0	0.50	0	0	0	0	0.33	0	2.13	N/A
MOV %RAX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	1	0.17	N/A
JMP 421bdc <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.37+0x66c>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
ADD %RAX,%RCX	1	0.20	0.20	0	0	0	0.20	0.20	0	0	0	0.20	0	1	0.20	N/A
JMP 421bdc <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.37+0x66c>	1	0	0	0	0	0	0	0	0	0	0	0	0	0	2.08	N/A
NOPL (%RAX)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOPW %CS:(%RAX,%RAX,1)	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
NOP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A

Name	Coverage (%)	Time (s)
▼advec_cell_kernel(int, int, int, int, int, int, clover::Buffer1D&, clover::Buffer1D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D–	1.18	0.47
○Loop 160 - advec_cell.cpp:45-49 - exec	1.18	0.47
○Loop 159 - advec_cell.cpp:45-49 - exec	0.00	0.00

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Type of elements and instruction set

Matching between your function (in the source code) and the binary function

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Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code