| Loop Id: 239 | Module: exec | Source: advec_mom.cpp:114-139 [...] | Coverage: 4.23% |
|---|
| Loop Id: 239 | Module: exec | Source: advec_mom.cpp:114-139 [...] | Coverage: 4.23% |
|---|
0x435080 VMOVUPD (%R11,%RAX,1),%ZMM19 [2] |
0x435087 VMOVUPD 0x40(%R11,%RAX,1),%ZMM10 [2] |
0x43508f VMOVDQA32 %ZMM11,%ZMM0 |
0x435095 VCMPPD $0x1,%ZMM6,%ZMM10,%K3 |
0x43509c VCMPPD $0x1,%ZMM6,%ZMM19,%K4 |
0x4350a3 VPADDD %ZMM17,%ZMM0,%ZMM1 |
0x4350a9 VPMOVSXDQ %YMM0,%ZMM4 |
0x4350af VEXTRACTI32X8 $0x1,%ZMM0,%YMM3 |
0x4350b6 VPMOVSXDQ %YMM3,%ZMM3 |
0x4350bc VMOVDQA %YMM1,%YMM5 |
0x4350c0 VPADDD %ZMM12,%ZMM0,%ZMM2 |
0x4350c6 VMOVDQA64 %ZMM4,%ZMM7 |
0x4350cc VPMOVSXDQ %YMM5,%ZMM7{%K4} |
0x4350d2 KUNPCKBW %K4,%K3,%K2 |
0x4350d6 VEXTRACTI32X8 $0x1,%ZMM1,%YMM20 |
0x4350dd VPADDD %ZMM16,%ZMM0,%ZMM2{%K2} |
0x4350e3 VPMOVSXDQ %YMM1,%ZMM23 |
0x4350e9 VMOVDQA64 %ZMM3,%ZMM5 |
0x4350ef VPMOVSXDQ %YMM20,%ZMM5{%K3} |
0x4350f5 VMOVDQA64 %ZMM4,%ZMM23{%K4} |
0x4350fb KNOTW %K2,%K5 |
0x4350ff VPMOVSXDQ %YMM20,%ZMM21 |
0x435105 KMOVB %K1,%K2 |
0x435109 VGATHERDPD (%RDX,%YMM2,8),%ZMM4{%K2} [3] |
0x435110 VSHUFI32X4 $-0x12,%ZMM2,%ZMM2,%ZMM2 |
0x435117 VPADDD %ZMM12,%ZMM0,%ZMM1{%K5} |
0x43511d VMOVDQA64 %ZMM3,%ZMM21{%K3} |
0x435123 KMOVB %K1,%K6 |
0x435127 KMOVB %K1,%K7 |
0x43512b VGATHERQPD (%R10,%ZMM7,8),%ZMM24{%K6} [1] |
0x435132 VGATHERQPD (%R10,%ZMM5,8),%ZMM0{%K7} [1] |
0x435139 KMOVB %K1,%K4 |
0x43513d KMOVB %K1,%K3 |
0x435141 VGATHERQPD (%RDX,%ZMM7,8),%ZMM20{%K4} [3] |
0x435148 KMOVB %K1,%K5 |
0x43514c VGATHERQPD (%RDX,%ZMM5,8),%ZMM7{%K3} [3] |
0x435153 KMOVB %K1,%K6 |
0x435157 VGATHERDPD (%RDX,%YMM2,8),%ZMM5{%K5} [3] |
0x43515e VGATHERQPD (%RDX,%ZMM23,8),%ZMM2{%K6} [3] |
0x435165 VSUBPD %ZMM20,%ZMM2,%ZMM2 |
0x43516b VSUBPD %ZMM4,%ZMM20,%ZMM4 |
0x435171 KMOVB %K1,%K7 |
0x435175 VGATHERQPD (%RDX,%ZMM21,8),%ZMM3{%K7} [3] |
0x43517c VSUBPD %ZMM7,%ZMM3,%ZMM3 |
0x435182 VSUBPD %ZMM5,%ZMM7,%ZMM5 |
0x435188 VMULPD %ZMM2,%ZMM4,%ZMM27 |
0x43518e VANDPD %ZMM9,%ZMM2,%ZMM23 |
0x435194 VMULPD %ZMM3,%ZMM5,%ZMM28 |
0x43519a VMOVAPD %ZMM6,%ZMM29 |
0x4351a0 VMOVUPD 0x40(%R9,%RAX,1),%ZMM25 [5] |
0x4351a8 VCMPPD $0xe,%ZMM6,%ZMM27,%K3 |
0x4351af VANDPD %ZMM9,%ZMM5,%ZMM5 |
0x4351b5 VCMPPD $0xe,%ZMM6,%ZMM28,%K2 |
0x4351bc VCMPPD $0xe,%ZMM6,%ZMM2,%K5{%K3} |
0x4351c3 VANDPD %ZMM9,%ZMM19,%ZMM2 |
0x4351c9 VANDPD %ZMM9,%ZMM3,%ZMM28 |
0x4351cf VCMPPD $0xe,%ZMM6,%ZMM3,%K4{%K2} |
0x4351d6 VDIVPD %ZMM24,%ZMM2,%ZMM3 |
0x4351dc VANDPD %ZMM9,%ZMM10,%ZMM2 |
0x4351e2 VDIVPD %ZMM0,%ZMM2,%ZMM2 |
0x4351e8 VSUBPD %ZMM2,%ZMM14,%ZMM0 |
0x4351ee VMOVAPD %ZMM6,%ZMM24 |
0x4351f4 KMOVB %K3,%K6 |
0x4351f8 VGATHERDPD (%RCX,%YMM1,8),%ZMM24{%K6} [6] |
0x4351ff VSHUFI32X4 $-0x12,%ZMM1,%ZMM1,%ZMM1 |
0x435206 KMOVB %K2,%K7 |
0x43520a VGATHERDPD (%RCX,%YMM1,8),%ZMM29{%K7} [6] |
0x435211 VMULPD %ZMM28,%ZMM0,%ZMM1 |
0x435217 VMOVUPD (%R9,%RAX,1),%ZMM22 [5] |
0x43521e VANDPD %ZMM9,%ZMM4,%ZMM4 |
0x435224 VBLENDMPD %ZMM8,%ZMM15,%ZMM21{%K5} |
0x43522a VBLENDMPD %ZMM8,%ZMM15,%ZMM27{%K4} |
0x435230 VDIVPD %ZMM25,%ZMM1,%ZMM0 |
0x435236 VADDPD %ZMM8,%ZMM2,%ZMM1 |
0x43523c VMULPD %ZMM13,%ZMM25,%ZMM25 |
0x435242 VSUBPD %ZMM2,%ZMM8,%ZMM2 |
0x435248 VMULPD %ZMM5,%ZMM1,%ZMM1 |
0x43524e VMINPD %ZMM28,%ZMM5,%ZMM5 |
0x435254 VMULPD %ZMM27,%ZMM2,%ZMM2 |
0x43525a VPADDD %ZMM18,%ZMM11,%ZMM11 |
0x435260 VDIVPD %ZMM29,%ZMM1,%ZMM1 |
0x435266 VADDPD %ZMM1,%ZMM0,%ZMM0 |
0x43526c VMULPD %ZMM25,%ZMM0,%ZMM1 |
0x435272 VMINPD %ZMM5,%ZMM1,%ZMM0 |
0x435278 VSUBPD %ZMM3,%ZMM14,%ZMM1 |
0x43527e VFMADD231PD %ZMM2,%ZMM0,%ZMM7{%K2} |
0x435284 VMULPD %ZMM23,%ZMM1,%ZMM5 |
0x43528a VMULPD %ZMM7,%ZMM10,%ZMM10 |
0x435290 VDIVPD %ZMM22,%ZMM5,%ZMM1 |
0x435296 VADDPD %ZMM8,%ZMM3,%ZMM5 |
0x43529c VMULPD %ZMM13,%ZMM22,%ZMM22 |
0x4352a2 VSUBPD %ZMM3,%ZMM8,%ZMM3 |
0x4352a8 VMULPD %ZMM4,%ZMM5,%ZMM5 |
0x4352ae VMINPD %ZMM23,%ZMM4,%ZMM4 |
0x4352b4 VMOVUPD %ZMM10,0x40(%R8,%RAX,1) [4] |
0x4352bc VDIVPD %ZMM24,%ZMM5,%ZMM5 |
0x4352c2 VADDPD %ZMM5,%ZMM1,%ZMM1 |
0x4352c8 VMULPD %ZMM22,%ZMM1,%ZMM5 |
0x4352ce VMINPD %ZMM4,%ZMM5,%ZMM1 |
0x4352d4 VMULPD %ZMM21,%ZMM3,%ZMM5 |
0x4352da VMOVAPD %ZMM20,%ZMM4 |
0x4352e0 VFMADD231PD %ZMM5,%ZMM1,%ZMM4{%K3} |
0x4352e6 VMULPD %ZMM19,%ZMM4,%ZMM0 |
0x4352ec VMOVUPD %ZMM0,(%R8,%RAX,1) [4] |
0x4352f3 SUB $-0x80,%RAX |
0x4352f7 CMP %RAX,%R13 |
0x4352fa JNE 435080 |
/home/eoseret/qaas_runs_GNR/173-814-2343/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_mom.cpp: 114 - 139 |
-------------------------------------------------------------------------------- |
114: if (node_flux(i, j) < 0.0) { |
[...] |
120: upwind = i - 1; |
121: donor = i; |
122: downwind = i + 1; |
123: dif = upwind; |
124: } |
125: sigma = std::fabs(node_flux(i, j)) / (node_mass_pre(donor, j)); |
126: width = celldx[i]; |
127: vdiffuw = vel1(donor, j) - vel1(upwind, j); |
128: vdiffdw = vel1(downwind, j) - vel1(donor, j); |
129: limiter = 0.0; |
130: if (vdiffuw * vdiffdw > 0.0) { |
131: auw = std::fabs(vdiffuw); |
132: adw = std::fabs(vdiffdw); |
133: wind = 1.0; |
134: if (vdiffdw <= 0.0) wind = -1.0; |
135: limiter = |
136: wind * std::fmin(std::fmin(width * ((2.0 - sigma) * adw / width + (1.0 + sigma) * auw / celldx[dif]) / 6.0, auw), adw); |
137: } |
138: advec_vel_s = vel1(donor, j) + (1.0 - sigma) * limiter; |
139: mom_flux(i, j) = advec_vel_s * node_flux(i, j); |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ○97.67 | gomp_thread_start | team.c:130 | libgomp.so.1.0.0 |
| ○2.33 | GOMP_parallel | libgomp.h:982 | libgomp.so.1.0.0 |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 1.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.59 |
| Bottlenecks | P0, |
| Function | advec_mom_kernel(int, int, int, int, clover::Buffer2D |
| Source | advec_mom.cpp:114-114,advec_mom.cpp:120-139 |
| Source loop unroll info | unrolled by 16 |
| Source loop unroll confidence level | high |
| Unroll/vectorization loop type | main |
| Unroll factor | 16 |
| CQA cycles | 96.00 |
| CQA cycles if no scalar integer | 96.00 |
| CQA cycles if FP arith vectorized | 96.00 |
| CQA cycles if fully vectorized | 96.00 |
| Front-end cycles | 26.33 |
| P0 cycles | 60.50 |
| P1 cycles | 14.00 |
| P2 cycles | 28.00 |
| P3 cycles | 28.00 |
| P4 cycles | 1.00 |
| P5 cycles | 60.50 |
| P6 cycles | 1.00 |
| P7 cycles | 1.00 |
| P8 cycles | 1.00 |
| P9 cycles | 1.00 |
| P10 cycles | 0.00 |
| P11 cycles | 28.00 |
| DIV/SQRT cycles | 96.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 107.00 |
| Nb uops | 158.00 |
| Nb loads | 14.00 |
| Nb stores | 2.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 3.00 |
| Nb FLOP add-sub | 96.00 |
| Nb FLOP mul | 112.00 |
| Nb FLOP fma | 16.00 |
| Nb FLOP div | 48.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 10.67 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 896.00 |
| Bytes stored | 128.00 |
| Stride 0 | 0.00 |
| Stride 1 | 3.00 |
| Stride n | 0.00 |
| Stride unknown | 2.00 |
| Stride indirect | 1.00 |
| Vectorization ratio all | 100.00 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | 100.00 |
| Vectorization ratio add_sub | 100.00 |
| Vectorization ratio fma | 100.00 |
| Vectorization ratio div_sqrt | 100.00 |
| Vectorization ratio other | 100.00 |
| Vector-efficiency ratio all | 94.02 |
| Vector-efficiency ratio load | 100.00 |
| Vector-efficiency ratio store | 100.00 |
| Vector-efficiency ratio mul | 100.00 |
| Vector-efficiency ratio add_sub | 100.00 |
| Vector-efficiency ratio fma | 100.00 |
| Vector-efficiency ratio div_sqrt | 100.00 |
| Vector-efficiency ratio other | 88.30 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 1.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.59 |
| Bottlenecks | P0, |
| Function | advec_mom_kernel(int, int, int, int, clover::Buffer2D |
| Source | advec_mom.cpp:114-114,advec_mom.cpp:120-139 |
| Source loop unroll info | unrolled by 16 |
| Source loop unroll confidence level | high |
| Unroll/vectorization loop type | main |
| Unroll factor | 16 |
| CQA cycles | 96.00 |
| CQA cycles if no scalar integer | 96.00 |
| CQA cycles if FP arith vectorized | 96.00 |
| CQA cycles if fully vectorized | 96.00 |
| Front-end cycles | 26.33 |
| P0 cycles | 60.50 |
| P1 cycles | 14.00 |
| P2 cycles | 28.00 |
| P3 cycles | 28.00 |
| P4 cycles | 1.00 |
| P5 cycles | 60.50 |
| P6 cycles | 1.00 |
| P7 cycles | 1.00 |
| P8 cycles | 1.00 |
| P9 cycles | 1.00 |
| P10 cycles | 0.00 |
| P11 cycles | 28.00 |
| DIV/SQRT cycles | 96.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 107.00 |
| Nb uops | 158.00 |
| Nb loads | 14.00 |
| Nb stores | 2.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 3.00 |
| Nb FLOP add-sub | 96.00 |
| Nb FLOP mul | 112.00 |
| Nb FLOP fma | 16.00 |
| Nb FLOP div | 48.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 10.67 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 896.00 |
| Bytes stored | 128.00 |
| Stride 0 | 0.00 |
| Stride 1 | 3.00 |
| Stride n | 0.00 |
| Stride unknown | 2.00 |
| Stride indirect | 1.00 |
| Vectorization ratio all | 100.00 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | 100.00 |
| Vectorization ratio add_sub | 100.00 |
| Vectorization ratio fma | 100.00 |
| Vectorization ratio div_sqrt | 100.00 |
| Vectorization ratio other | 100.00 |
| Vector-efficiency ratio all | 94.02 |
| Vector-efficiency ratio load | 100.00 |
| Vector-efficiency ratio store | 100.00 |
| Vector-efficiency ratio mul | 100.00 |
| Vector-efficiency ratio add_sub | 100.00 |
| Vector-efficiency ratio fma | 100.00 |
| Vector-efficiency ratio div_sqrt | 100.00 |
| Vector-efficiency ratio other | 88.30 |
| Path / |
| nb instructions | 107 |
| nb uops | 158 |
| loop length | 640 |
| used x86 registers | 8 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 6 |
| used zmm registers | 29 |
| nb stack references | 0 |
| ADD-SUB / MUL ratio | 0.86 |
| micro-operation queue | 26.33 cycles |
| front end | 26.33 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 60.50 | 0.00 | 28.00 | 28.00 | 1.00 | 60.50 | 1.00 | 1.00 | 1.00 | 1.00 | 0.00 | 28.00 |
| cycles | 60.50 | 14.00 | 28.00 | 28.00 | 1.00 | 60.50 | 1.00 | 1.00 | 1.00 | 1.00 | 0.00 | 28.00 |
| Cycles executing div or sqrt instructions | 96.00 |
| Longest recurrence chain latency (RecMII) | 1.00 |
| Front-end | 26.33 |
| Dispatch | 60.50 |
| DIV/SQRT | 96.00 |
| Data deps. | 1.00 |
| Overall L1 | 96.00 |
| all | 100% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 100% |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | 100% |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | 100% |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | 100% |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | 100% |
| all | 73% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 65% |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | 100% |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | 100% |
| all | 94% |
| load | 100% |
| store | 100% |
| mul | 100% |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | 88% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VMOVUPD (%R11,%RAX,1),%ZMM19 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VMOVUPD 0x40(%R11,%RAX,1),%ZMM10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VMOVDQA32 %ZMM11,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (100.0%) |
| VCMPPD $0x1,%ZMM6,%ZMM10,%K3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
| VCMPPD $0x1,%ZMM6,%ZMM19,%K4 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
| VPADDD %ZMM17,%ZMM0,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
| VPMOVSXDQ %YMM0,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VEXTRACTI32X8 $0x1,%ZMM0,%YMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VPMOVSXDQ %YMM3,%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VMOVDQA %YMM1,%YMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (50.0%) |
| VPADDD %ZMM12,%ZMM0,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
| VMOVDQA64 %ZMM4,%ZMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (100.0%) |
| VPMOVSXDQ %YMM5,%ZMM7{%K4} | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| KUNPCKBW %K4,%K3,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 1 | N/A |
| VEXTRACTI32X8 $0x1,%ZMM1,%YMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VPADDD %ZMM16,%ZMM0,%ZMM2{%K2} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
| VPMOVSXDQ %YMM1,%ZMM23 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VMOVDQA64 %ZMM3,%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (100.0%) |
| VPMOVSXDQ %YMM20,%ZMM5{%K3} | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VMOVDQA64 %ZMM4,%ZMM23{%K4} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (100.0%) |
| KNOTW %K2,%K5 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | N/A |
| VPMOVSXDQ %YMM20,%ZMM21 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| KMOVB %K1,%K2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VGATHERDPD (%RDX,%YMM2,8),%ZMM4{%K2} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 28 | 3 | vect (100.0%) |
| VSHUFI32X4 $-0x12,%ZMM2,%ZMM2,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VPADDD %ZMM12,%ZMM0,%ZMM1{%K5} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
| VMOVDQA64 %ZMM3,%ZMM21{%K3} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (100.0%) |
| KMOVB %K1,%K6 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| KMOVB %K1,%K7 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VGATHERQPD (%R10,%ZMM7,8),%ZMM24{%K6} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 28 | 3 | vect (100.0%) |
| VGATHERQPD (%R10,%ZMM5,8),%ZMM0{%K7} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 28 | 3 | vect (100.0%) |
| KMOVB %K1,%K4 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| KMOVB %K1,%K3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VGATHERQPD (%RDX,%ZMM7,8),%ZMM20{%K4} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 28 | 3 | vect (100.0%) |
| KMOVB %K1,%K5 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VGATHERQPD (%RDX,%ZMM5,8),%ZMM7{%K3} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 28 | 3 | vect (100.0%) |
| KMOVB %K1,%K6 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VGATHERDPD (%RDX,%YMM2,8),%ZMM5{%K5} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 28 | 3 | vect (100.0%) |
| VGATHERQPD (%RDX,%ZMM23,8),%ZMM2{%K6} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 28 | 3 | vect (100.0%) |
| VSUBPD %ZMM20,%ZMM2,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM4,%ZMM20,%ZMM4 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| KMOVB %K1,%K7 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VGATHERQPD (%RDX,%ZMM21,8),%ZMM3{%K7} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 28 | 3 | vect (100.0%) |
| VSUBPD %ZMM7,%ZMM3,%ZMM3 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM5,%ZMM7,%ZMM5 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD %ZMM2,%ZMM4,%ZMM27 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VANDPD %ZMM9,%ZMM2,%ZMM23 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
| VMULPD %ZMM3,%ZMM5,%ZMM28 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VMOVAPD %ZMM6,%ZMM29 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (100.0%) |
| VMOVUPD 0x40(%R9,%RAX,1),%ZMM25 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VCMPPD $0xe,%ZMM6,%ZMM27,%K3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
| VANDPD %ZMM9,%ZMM5,%ZMM5 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
| VCMPPD $0xe,%ZMM6,%ZMM28,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
| VCMPPD $0xe,%ZMM6,%ZMM2,%K5{%K3} | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
| VANDPD %ZMM9,%ZMM19,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
| VANDPD %ZMM9,%ZMM3,%ZMM28 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
| VCMPPD $0xe,%ZMM6,%ZMM3,%K4{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
| VDIVPD %ZMM24,%ZMM2,%ZMM3 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 | vect (100.0%) |
| VANDPD %ZMM9,%ZMM10,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
| VDIVPD %ZMM0,%ZMM2,%ZMM2 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 | vect (100.0%) |
| VSUBPD %ZMM2,%ZMM14,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVAPD %ZMM6,%ZMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (100.0%) |
| KMOVB %K3,%K6 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VGATHERDPD (%RCX,%YMM1,8),%ZMM24{%K6} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 28 | 3 | vect (100.0%) |
| VSHUFI32X4 $-0x12,%ZMM1,%ZMM1,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| KMOVB %K2,%K7 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VGATHERDPD (%RCX,%YMM1,8),%ZMM29{%K7} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 28 | 3 | vect (100.0%) |
| VMULPD %ZMM28,%ZMM0,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VMOVUPD (%R9,%RAX,1),%ZMM22 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VANDPD %ZMM9,%ZMM4,%ZMM4 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
| VBLENDMPD %ZMM8,%ZMM15,%ZMM21{%K5} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
| VBLENDMPD %ZMM8,%ZMM15,%ZMM27{%K4} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
| VDIVPD %ZMM25,%ZMM1,%ZMM0 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 | vect (100.0%) |
| VADDPD %ZMM8,%ZMM2,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD %ZMM13,%ZMM25,%ZMM25 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM2,%ZMM8,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD %ZMM5,%ZMM1,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VMINPD %ZMM28,%ZMM5,%ZMM5 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VMULPD %ZMM27,%ZMM2,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VPADDD %ZMM18,%ZMM11,%ZMM11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
| VDIVPD %ZMM29,%ZMM1,%ZMM1 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 | vect (100.0%) |
| VADDPD %ZMM1,%ZMM0,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD %ZMM25,%ZMM0,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VMINPD %ZMM5,%ZMM1,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM3,%ZMM14,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VFMADD231PD %ZMM2,%ZMM0,%ZMM7{%K2} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VMULPD %ZMM23,%ZMM1,%ZMM5 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VMULPD %ZMM7,%ZMM10,%ZMM10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VDIVPD %ZMM22,%ZMM5,%ZMM1 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 | vect (100.0%) |
| VADDPD %ZMM8,%ZMM3,%ZMM5 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD %ZMM13,%ZMM22,%ZMM22 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM3,%ZMM8,%ZMM3 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD %ZMM4,%ZMM5,%ZMM5 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VMINPD %ZMM23,%ZMM4,%ZMM4 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VMOVUPD %ZMM10,0x40(%R8,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 | vect (100.0%) |
| VDIVPD %ZMM24,%ZMM5,%ZMM5 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 | vect (100.0%) |
| VADDPD %ZMM5,%ZMM1,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD %ZMM22,%ZMM1,%ZMM5 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VMINPD %ZMM4,%ZMM5,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VMULPD %ZMM21,%ZMM3,%ZMM5 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VMOVAPD %ZMM20,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (100.0%) |
| VFMADD231PD %ZMM5,%ZMM1,%ZMM4{%K3} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VMULPD %ZMM19,%ZMM4,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VMOVUPD %ZMM0,(%R8,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 | vect (100.0%) |
| SUB $-0x80,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| CMP %RAX,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| JNE 435080 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii._omp_fn.6+0x230> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| nb instructions | 107 |
| nb uops | 158 |
| loop length | 640 |
| used x86 registers | 8 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 6 |
| used zmm registers | 29 |
| nb stack references | 0 |
| ADD-SUB / MUL ratio | 0.86 |
| micro-operation queue | 26.33 cycles |
| front end | 26.33 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 60.50 | 0.00 | 28.00 | 28.00 | 1.00 | 60.50 | 1.00 | 1.00 | 1.00 | 1.00 | 0.00 | 28.00 |
| cycles | 60.50 | 14.00 | 28.00 | 28.00 | 1.00 | 60.50 | 1.00 | 1.00 | 1.00 | 1.00 | 0.00 | 28.00 |
| Cycles executing div or sqrt instructions | 96.00 |
| Longest recurrence chain latency (RecMII) | 1.00 |
| Front-end | 26.33 |
| Dispatch | 60.50 |
| DIV/SQRT | 96.00 |
| Data deps. | 1.00 |
| Overall L1 | 96.00 |
| all | 100% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 100% |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | 100% |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | 100% |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | 100% |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | 100% |
| all | 73% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 65% |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | 100% |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | 100% |
| all | 94% |
| load | 100% |
| store | 100% |
| mul | 100% |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | 88% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VMOVUPD (%R11,%RAX,1),%ZMM19 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VMOVUPD 0x40(%R11,%RAX,1),%ZMM10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VMOVDQA32 %ZMM11,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (100.0%) |
| VCMPPD $0x1,%ZMM6,%ZMM10,%K3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
| VCMPPD $0x1,%ZMM6,%ZMM19,%K4 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
| VPADDD %ZMM17,%ZMM0,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
| VPMOVSXDQ %YMM0,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VEXTRACTI32X8 $0x1,%ZMM0,%YMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VPMOVSXDQ %YMM3,%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VMOVDQA %YMM1,%YMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (50.0%) |
| VPADDD %ZMM12,%ZMM0,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
| VMOVDQA64 %ZMM4,%ZMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (100.0%) |
| VPMOVSXDQ %YMM5,%ZMM7{%K4} | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| KUNPCKBW %K4,%K3,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 1 | N/A |
| VEXTRACTI32X8 $0x1,%ZMM1,%YMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VPADDD %ZMM16,%ZMM0,%ZMM2{%K2} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
| VPMOVSXDQ %YMM1,%ZMM23 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VMOVDQA64 %ZMM3,%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (100.0%) |
| VPMOVSXDQ %YMM20,%ZMM5{%K3} | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VMOVDQA64 %ZMM4,%ZMM23{%K4} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (100.0%) |
| KNOTW %K2,%K5 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | N/A |
| VPMOVSXDQ %YMM20,%ZMM21 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| KMOVB %K1,%K2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VGATHERDPD (%RDX,%YMM2,8),%ZMM4{%K2} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 28 | 3 | vect (100.0%) |
| VSHUFI32X4 $-0x12,%ZMM2,%ZMM2,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| VPADDD %ZMM12,%ZMM0,%ZMM1{%K5} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
| VMOVDQA64 %ZMM3,%ZMM21{%K3} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (100.0%) |
| KMOVB %K1,%K6 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| KMOVB %K1,%K7 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VGATHERQPD (%R10,%ZMM7,8),%ZMM24{%K6} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 28 | 3 | vect (100.0%) |
| VGATHERQPD (%R10,%ZMM5,8),%ZMM0{%K7} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 28 | 3 | vect (100.0%) |
| KMOVB %K1,%K4 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| KMOVB %K1,%K3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VGATHERQPD (%RDX,%ZMM7,8),%ZMM20{%K4} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 28 | 3 | vect (100.0%) |
| KMOVB %K1,%K5 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VGATHERQPD (%RDX,%ZMM5,8),%ZMM7{%K3} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 28 | 3 | vect (100.0%) |
| KMOVB %K1,%K6 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VGATHERDPD (%RDX,%YMM2,8),%ZMM5{%K5} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 28 | 3 | vect (100.0%) |
| VGATHERQPD (%RDX,%ZMM23,8),%ZMM2{%K6} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 28 | 3 | vect (100.0%) |
| VSUBPD %ZMM20,%ZMM2,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM4,%ZMM20,%ZMM4 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| KMOVB %K1,%K7 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VGATHERQPD (%RDX,%ZMM21,8),%ZMM3{%K7} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 28 | 3 | vect (100.0%) |
| VSUBPD %ZMM7,%ZMM3,%ZMM3 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM5,%ZMM7,%ZMM5 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD %ZMM2,%ZMM4,%ZMM27 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VANDPD %ZMM9,%ZMM2,%ZMM23 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
| VMULPD %ZMM3,%ZMM5,%ZMM28 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VMOVAPD %ZMM6,%ZMM29 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (100.0%) |
| VMOVUPD 0x40(%R9,%RAX,1),%ZMM25 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VCMPPD $0xe,%ZMM6,%ZMM27,%K3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
| VANDPD %ZMM9,%ZMM5,%ZMM5 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
| VCMPPD $0xe,%ZMM6,%ZMM28,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
| VCMPPD $0xe,%ZMM6,%ZMM2,%K5{%K3} | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
| VANDPD %ZMM9,%ZMM19,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
| VANDPD %ZMM9,%ZMM3,%ZMM28 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
| VCMPPD $0xe,%ZMM6,%ZMM3,%K4{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
| VDIVPD %ZMM24,%ZMM2,%ZMM3 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 | vect (100.0%) |
| VANDPD %ZMM9,%ZMM10,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
| VDIVPD %ZMM0,%ZMM2,%ZMM2 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 | vect (100.0%) |
| VSUBPD %ZMM2,%ZMM14,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMOVAPD %ZMM6,%ZMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (100.0%) |
| KMOVB %K3,%K6 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VGATHERDPD (%RCX,%YMM1,8),%ZMM24{%K6} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 28 | 3 | vect (100.0%) |
| VSHUFI32X4 $-0x12,%ZMM1,%ZMM1,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (50.0%) |
| KMOVB %K2,%K7 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
| VGATHERDPD (%RCX,%YMM1,8),%ZMM29{%K7} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 28 | 3 | vect (100.0%) |
| VMULPD %ZMM28,%ZMM0,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VMOVUPD (%R9,%RAX,1),%ZMM22 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VANDPD %ZMM9,%ZMM4,%ZMM4 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
| VBLENDMPD %ZMM8,%ZMM15,%ZMM21{%K5} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
| VBLENDMPD %ZMM8,%ZMM15,%ZMM27{%K4} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
| VDIVPD %ZMM25,%ZMM1,%ZMM0 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 | vect (100.0%) |
| VADDPD %ZMM8,%ZMM2,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD %ZMM13,%ZMM25,%ZMM25 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM2,%ZMM8,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD %ZMM5,%ZMM1,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VMINPD %ZMM28,%ZMM5,%ZMM5 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VMULPD %ZMM27,%ZMM2,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VPADDD %ZMM18,%ZMM11,%ZMM11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
| VDIVPD %ZMM29,%ZMM1,%ZMM1 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 | vect (100.0%) |
| VADDPD %ZMM1,%ZMM0,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD %ZMM25,%ZMM0,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VMINPD %ZMM5,%ZMM1,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM3,%ZMM14,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VFMADD231PD %ZMM2,%ZMM0,%ZMM7{%K2} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VMULPD %ZMM23,%ZMM1,%ZMM5 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VMULPD %ZMM7,%ZMM10,%ZMM10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VDIVPD %ZMM22,%ZMM5,%ZMM1 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 | vect (100.0%) |
| VADDPD %ZMM8,%ZMM3,%ZMM5 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD %ZMM13,%ZMM22,%ZMM22 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VSUBPD %ZMM3,%ZMM8,%ZMM3 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD %ZMM4,%ZMM5,%ZMM5 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VMINPD %ZMM23,%ZMM4,%ZMM4 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VMOVUPD %ZMM10,0x40(%R8,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 | vect (100.0%) |
| VDIVPD %ZMM24,%ZMM5,%ZMM5 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 | vect (100.0%) |
| VADDPD %ZMM5,%ZMM1,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VMULPD %ZMM22,%ZMM1,%ZMM5 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VMINPD %ZMM4,%ZMM5,%ZMM1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VMULPD %ZMM21,%ZMM3,%ZMM5 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VMOVAPD %ZMM20,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 | vect (100.0%) |
| VFMADD231PD %ZMM5,%ZMM1,%ZMM4{%K3} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VMULPD %ZMM19,%ZMM4,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (100.0%) |
| VMOVUPD %ZMM0,(%R8,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 | vect (100.0%) |
| SUB $-0x80,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| CMP %RAX,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| JNE 435080 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii._omp_fn.6+0x230> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |