| Loop Id: 236 | Module: exec | Source: advec_mom.cpp:221-221 [...] | Coverage: 4.35% |
|---|
| Loop Id: 236 | Module: exec | Source: advec_mom.cpp:221-221 [...] | Coverage: 4.35% |
|---|
0x434b66 VMOVUPD (%R10,%RAX,1),%ZMM12 [2] |
0x434b6d VMOVUPD (%R9,%RAX,1),%ZMM13 [4] |
0x434b74 VFMSUB132PD (%RDX,%RAX,1),%ZMM13,%ZMM12 [5] |
0x434b7b VADDPD (%R8,%RAX,1),%ZMM12,%ZMM14 [3] |
0x434b82 VDIVPD (%RSI,%RAX,1),%ZMM14,%ZMM15 [1] |
0x434b89 VMOVUPD %ZMM15,(%RDX,%RAX,1) [5] |
0x434b90 VMOVUPD 0x40(%R10,%RAX,1),%ZMM0 [2] |
0x434b98 VMOVUPD 0x40(%R9,%RAX,1),%ZMM5 [4] |
0x434ba0 VFMSUB132PD 0x40(%RDX,%RAX,1),%ZMM5,%ZMM0 [5] |
0x434ba8 VADDPD 0x40(%R8,%RAX,1),%ZMM0,%ZMM1 [3] |
0x434bb0 VDIVPD 0x40(%RSI,%RAX,1),%ZMM1,%ZMM2 [1] |
0x434bb8 VMOVUPD %ZMM2,0x40(%RDX,%RAX,1) [5] |
0x434bc0 VMOVUPD 0x80(%R10,%RAX,1),%ZMM6 [2] |
0x434bc8 VMOVUPD 0x80(%R9,%RAX,1),%ZMM3 [4] |
0x434bd0 VFMSUB132PD 0x80(%RDX,%RAX,1),%ZMM3,%ZMM6 [5] |
0x434bd8 VADDPD 0x80(%R8,%RAX,1),%ZMM6,%ZMM4 [3] |
0x434be0 VDIVPD 0x80(%RSI,%RAX,1),%ZMM4,%ZMM7 [1] |
0x434be8 VMOVUPD %ZMM7,0x80(%RDX,%RAX,1) [5] |
0x434bf0 VMOVUPD 0xc0(%R10,%RAX,1),%ZMM8 [2] |
0x434bf8 VMOVUPD 0xc0(%R9,%RAX,1),%ZMM9 [4] |
0x434c00 VFMSUB132PD 0xc0(%RDX,%RAX,1),%ZMM9,%ZMM8 [5] |
0x434c08 VADDPD 0xc0(%R8,%RAX,1),%ZMM8,%ZMM10 [3] |
0x434c10 VDIVPD 0xc0(%RSI,%RAX,1),%ZMM10,%ZMM11 [1] |
0x434c18 VMOVUPD %ZMM11,0xc0(%RDX,%RAX,1) [5] |
0x434c20 ADD $0x100,%RAX |
0x434c26 CMP %RAX,%R13 |
0x434c29 JNE 434b66 |
/home/eoseret/qaas_runs_GNR/173-814-2343/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_mom.cpp: 221 - 221 |
-------------------------------------------------------------------------------- |
221: vel1(i, j) = (vel1(i, j) * node_mass_pre(i, j) + mom_flux(i + 0, j - 1) - mom_flux(i, j)) / node_mass_post(i, j); |
/home/eoseret/qaas_runs_GNR/173-814-2343/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h: 69 - 69 |
-------------------------------------------------------------------------------- |
69: T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; } |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ○97.62 | gomp_thread_start | team.c:130 | libgomp.so.1.0.0 |
| ○2.38 | GOMP_parallel | libgomp.h:982 | libgomp.so.1.0.0 |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 1.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 6.40 |
| Bottlenecks | P0, |
| Function | advec_mom_kernel(int, int, int, int, clover::Buffer2D |
| Source | advec_mom.cpp:221-221,context.h:69-69 |
| Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
| Source loop unroll confidence level | max |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 64.00 |
| CQA cycles if no scalar integer | 64.00 |
| CQA cycles if FP arith vectorized | 64.00 |
| CQA cycles if fully vectorized | 64.00 |
| Front-end cycles | 7.67 |
| P0 cycles | 10.00 |
| P1 cycles | 4.00 |
| P2 cycles | 6.67 |
| P3 cycles | 6.67 |
| P4 cycles | 2.00 |
| P5 cycles | 10.00 |
| P6 cycles | 1.00 |
| P7 cycles | 2.00 |
| P8 cycles | 2.00 |
| P9 cycles | 2.00 |
| P10 cycles | 0.40 |
| P11 cycles | 6.67 |
| DIV/SQRT cycles | 64.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 27.00 |
| Nb uops | 38.00 |
| Nb loads | 20.00 |
| Nb stores | 4.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 2.00 |
| Nb FLOP add-sub | 32.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 32.00 |
| Nb FLOP div | 32.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 24.00 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 1280.00 |
| Bytes stored | 256.00 |
| Stride 0 | 0.00 |
| Stride 1 | 5.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 100.00 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | 100.00 |
| Vectorization ratio fma | 100.00 |
| Vectorization ratio div_sqrt | 100.00 |
| Vectorization ratio other | NA |
| Vector-efficiency ratio all | 100.00 |
| Vector-efficiency ratio load | 100.00 |
| Vector-efficiency ratio store | 100.00 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | 100.00 |
| Vector-efficiency ratio fma | 100.00 |
| Vector-efficiency ratio div_sqrt | 100.00 |
| Vector-efficiency ratio other | NA |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 1.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 6.40 |
| Bottlenecks | P0, |
| Function | advec_mom_kernel(int, int, int, int, clover::Buffer2D |
| Source | advec_mom.cpp:221-221,context.h:69-69 |
| Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
| Source loop unroll confidence level | max |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 64.00 |
| CQA cycles if no scalar integer | 64.00 |
| CQA cycles if FP arith vectorized | 64.00 |
| CQA cycles if fully vectorized | 64.00 |
| Front-end cycles | 7.67 |
| P0 cycles | 10.00 |
| P1 cycles | 4.00 |
| P2 cycles | 6.67 |
| P3 cycles | 6.67 |
| P4 cycles | 2.00 |
| P5 cycles | 10.00 |
| P6 cycles | 1.00 |
| P7 cycles | 2.00 |
| P8 cycles | 2.00 |
| P9 cycles | 2.00 |
| P10 cycles | 0.40 |
| P11 cycles | 6.67 |
| DIV/SQRT cycles | 64.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 27.00 |
| Nb uops | 38.00 |
| Nb loads | 20.00 |
| Nb stores | 4.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 2.00 |
| Nb FLOP add-sub | 32.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 32.00 |
| Nb FLOP div | 32.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 24.00 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 1280.00 |
| Bytes stored | 256.00 |
| Stride 0 | 0.00 |
| Stride 1 | 5.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 100.00 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | 100.00 |
| Vectorization ratio fma | 100.00 |
| Vectorization ratio div_sqrt | 100.00 |
| Vectorization ratio other | NA |
| Vector-efficiency ratio all | 100.00 |
| Vector-efficiency ratio load | 100.00 |
| Vector-efficiency ratio store | 100.00 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | 100.00 |
| Vector-efficiency ratio fma | 100.00 |
| Vector-efficiency ratio div_sqrt | 100.00 |
| Vector-efficiency ratio other | NA |
| Path / |
| nb instructions | 27 |
| nb uops | 38 |
| loop length | 201 |
| used x86 registers | 7 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 0 |
| used zmm registers | 16 |
| nb stack references | 0 |
| micro-operation queue | 7.67 cycles |
| front end | 7.67 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 10.00 | 0.60 | 6.67 | 6.67 | 2.00 | 10.00 | 1.00 | 2.00 | 2.00 | 2.00 | 0.40 | 6.67 |
| cycles | 10.00 | 4.00 | 6.67 | 6.67 | 2.00 | 10.00 | 1.00 | 2.00 | 2.00 | 2.00 | 0.40 | 6.67 |
| Cycles executing div or sqrt instructions | 64.00 |
| Longest recurrence chain latency (RecMII) | 1.00 |
| Front-end | 7.67 |
| Dispatch | 10.00 |
| DIV/SQRT | 64.00 |
| Data deps. | 1.00 |
| Overall L1 | 64.00 |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | NA (no other vectorizable/vectorized instructions) |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VMOVUPD (%R10,%RAX,1),%ZMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VMOVUPD (%R9,%RAX,1),%ZMM13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VFMSUB132PD (%RDX,%RAX,1),%ZMM13,%ZMM12 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| VADDPD (%R8,%RAX,1),%ZMM12,%ZMM14 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 | vect (100.0%) |
| VDIVPD (%RSI,%RAX,1),%ZMM14,%ZMM15 | 4 | 2.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 22-24 | 16 | vect (100.0%) |
| VMOVUPD %ZMM15,(%RDX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 | vect (100.0%) |
| VMOVUPD 0x40(%R10,%RAX,1),%ZMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VMOVUPD 0x40(%R9,%RAX,1),%ZMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VFMSUB132PD 0x40(%RDX,%RAX,1),%ZMM5,%ZMM0 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| VADDPD 0x40(%R8,%RAX,1),%ZMM0,%ZMM1 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 | vect (100.0%) |
| VDIVPD 0x40(%RSI,%RAX,1),%ZMM1,%ZMM2 | 4 | 2.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 22-24 | 16 | vect (100.0%) |
| VMOVUPD %ZMM2,0x40(%RDX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 | vect (100.0%) |
| VMOVUPD 0x80(%R10,%RAX,1),%ZMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VMOVUPD 0x80(%R9,%RAX,1),%ZMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VFMSUB132PD 0x80(%RDX,%RAX,1),%ZMM3,%ZMM6 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| VADDPD 0x80(%R8,%RAX,1),%ZMM6,%ZMM4 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 | vect (100.0%) |
| VDIVPD 0x80(%RSI,%RAX,1),%ZMM4,%ZMM7 | 4 | 2.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 22-24 | 16 | vect (100.0%) |
| VMOVUPD %ZMM7,0x80(%RDX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 | vect (100.0%) |
| VMOVUPD 0xc0(%R10,%RAX,1),%ZMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VMOVUPD 0xc0(%R9,%RAX,1),%ZMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VFMSUB132PD 0xc0(%RDX,%RAX,1),%ZMM9,%ZMM8 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| VADDPD 0xc0(%R8,%RAX,1),%ZMM8,%ZMM10 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 | vect (100.0%) |
| VDIVPD 0xc0(%RSI,%RAX,1),%ZMM10,%ZMM11 | 4 | 2.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 22-24 | 16 | vect (100.0%) |
| VMOVUPD %ZMM11,0xc0(%RDX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 | vect (100.0%) |
| ADD $0x100,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CMP %RAX,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| JNE 434b66 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii._omp_fn.11+0x266> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| nb instructions | 27 |
| nb uops | 38 |
| loop length | 201 |
| used x86 registers | 7 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 0 |
| used zmm registers | 16 |
| nb stack references | 0 |
| micro-operation queue | 7.67 cycles |
| front end | 7.67 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 10.00 | 0.60 | 6.67 | 6.67 | 2.00 | 10.00 | 1.00 | 2.00 | 2.00 | 2.00 | 0.40 | 6.67 |
| cycles | 10.00 | 4.00 | 6.67 | 6.67 | 2.00 | 10.00 | 1.00 | 2.00 | 2.00 | 2.00 | 0.40 | 6.67 |
| Cycles executing div or sqrt instructions | 64.00 |
| Longest recurrence chain latency (RecMII) | 1.00 |
| Front-end | 7.67 |
| Dispatch | 10.00 |
| DIV/SQRT | 64.00 |
| Data deps. | 1.00 |
| Overall L1 | 64.00 |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | NA (no other vectorizable/vectorized instructions) |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VMOVUPD (%R10,%RAX,1),%ZMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VMOVUPD (%R9,%RAX,1),%ZMM13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VFMSUB132PD (%RDX,%RAX,1),%ZMM13,%ZMM12 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| VADDPD (%R8,%RAX,1),%ZMM12,%ZMM14 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 | vect (100.0%) |
| VDIVPD (%RSI,%RAX,1),%ZMM14,%ZMM15 | 4 | 2.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 22-24 | 16 | vect (100.0%) |
| VMOVUPD %ZMM15,(%RDX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 | vect (100.0%) |
| VMOVUPD 0x40(%R10,%RAX,1),%ZMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VMOVUPD 0x40(%R9,%RAX,1),%ZMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VFMSUB132PD 0x40(%RDX,%RAX,1),%ZMM5,%ZMM0 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| VADDPD 0x40(%R8,%RAX,1),%ZMM0,%ZMM1 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 | vect (100.0%) |
| VDIVPD 0x40(%RSI,%RAX,1),%ZMM1,%ZMM2 | 4 | 2.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 22-24 | 16 | vect (100.0%) |
| VMOVUPD %ZMM2,0x40(%RDX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 | vect (100.0%) |
| VMOVUPD 0x80(%R10,%RAX,1),%ZMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VMOVUPD 0x80(%R9,%RAX,1),%ZMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VFMSUB132PD 0x80(%RDX,%RAX,1),%ZMM3,%ZMM6 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| VADDPD 0x80(%R8,%RAX,1),%ZMM6,%ZMM4 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 | vect (100.0%) |
| VDIVPD 0x80(%RSI,%RAX,1),%ZMM4,%ZMM7 | 4 | 2.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 22-24 | 16 | vect (100.0%) |
| VMOVUPD %ZMM7,0x80(%RDX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 | vect (100.0%) |
| VMOVUPD 0xc0(%R10,%RAX,1),%ZMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VMOVUPD 0xc0(%R9,%RAX,1),%ZMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VFMSUB132PD 0xc0(%RDX,%RAX,1),%ZMM9,%ZMM8 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| VADDPD 0xc0(%R8,%RAX,1),%ZMM8,%ZMM10 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 | vect (100.0%) |
| VDIVPD 0xc0(%RSI,%RAX,1),%ZMM10,%ZMM11 | 4 | 2.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 22-24 | 16 | vect (100.0%) |
| VMOVUPD %ZMM11,0xc0(%RDX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 | vect (100.0%) |
| ADD $0x100,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| CMP %RAX,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| JNE 434b66 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii._omp_fn.11+0x266> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |