| Loop Id: 195 | Module: exec | Source: accelerate.cpp:43-53 | Coverage: 5.38% |
|---|
| Loop Id: 195 | Module: exec | Source: accelerate.cpp:43-53 | Coverage: 5.38% |
|---|
0x42b6b8 MOV 0x168(%RSP),%RDX [20] |
0x42b6c0 MOV 0x170(%RSP),%RDI [20] |
0x42b6c8 VMOVUPD (%RDX,%RAX,1),%ZMM0 [12] |
0x42b6cf MOV 0x160(%RSP),%RDX [20] |
0x42b6d7 VMULPD (%RDI,%RAX,1),%ZMM0,%ZMM5 [6] |
0x42b6de VMOVUPD (%RDX,%RAX,1),%ZMM7 [11] |
0x42b6e5 MOV 0x158(%RSP),%RDI [20] |
0x42b6ed MOV 0x188(%RSP),%RDX [20] |
0x42b6f5 VMOVUPD (%R13,%RAX,1),%ZMM14 [18] |
0x42b6fd VFMADD231PD (%RDI,%RAX,1),%ZMM7,%ZMM5 [5] |
0x42b704 VMOVUPD (%RDX,%RAX,1),%ZMM2 [10] |
0x42b70b MOV 0x190(%RSP),%RDI [20] |
0x42b713 VSUBPD (%R9,%RAX,1),%ZMM14,%ZMM15 [19] |
0x42b71a VMULPD (%RDI,%RAX,1),%ZMM2,%ZMM8 [4] |
0x42b721 MOV 0x180(%RSP),%RDI [20] |
0x42b729 VMULPD (%R14,%RAX,1),%ZMM15,%ZMM1 [1] |
0x42b730 VMOVUPD (%RDI,%RAX,1),%ZMM9 [26] |
0x42b737 VMOVUPD (%R15,%RAX,1),%ZMM12 [2] |
0x42b73e MOV 0x178(%RSP),%RDX [20] |
0x42b746 VSUBPD (%R10,%RAX,1),%ZMM12,%ZMM13 [13] |
0x42b74d VFMADD231PD (%RDX,%RAX,1),%ZMM9,%ZMM8 [9] |
0x42b754 MOV 0x1a0(%RSP),%RDX [20] |
0x42b75c MOV 0x198(%RSP),%RDI [20] |
0x42b764 VFMADD132PD (%RDX,%RAX,1),%ZMM1,%ZMM13 [8] |
0x42b76b VADDPD %ZMM8,%ZMM5,%ZMM10 |
0x42b771 VDIVPD %ZMM10,%ZMM3,%ZMM11 |
0x42b777 VFMADD213PD (%RDI,%RAX,1),%ZMM11,%ZMM13 [25] |
0x42b77e VMOVUPD %ZMM13,(%RSI,%RAX,1) [21] |
0x42b785 VMOVUPD (%R10,%RAX,1),%ZMM7 [13] |
0x42b78c VMOVUPD (%R15,%RAX,1),%ZMM0 [2] |
0x42b793 VSUBPD (%R9,%RAX,1),%ZMM7,%ZMM2 [19] |
0x42b79a VSUBPD (%R13,%RAX,1),%ZMM0,%ZMM5 [18] |
0x42b7a2 VMULPD (%R8,%RAX,1),%ZMM2,%ZMM8 [16] |
0x42b7a9 VFMADD132PD (%R12,%RAX,1),%ZMM8,%ZMM5 [17] |
0x42b7b0 MOV 0x1a8(%RSP),%RDI [20] |
0x42b7b8 VFMADD213PD (%RDI,%RAX,1),%ZMM11,%ZMM5 [24] |
0x42b7bf MOV 0x1b8(%RSP),%RDI [20] |
0x42b7c7 VMOVUPD %ZMM5,(%RCX,%RAX,1) [14] |
0x42b7ce VMOVUPD (%RBX,%RAX,1),%ZMM9 [3] |
0x42b7d5 VMOVUPD (%R11,%RAX,1),%ZMM12 [15] |
0x42b7dc VSUBPD (%RDI,%RAX,1),%ZMM9,%ZMM10 [23] |
0x42b7e3 MOV 0x150(%RSP),%RDI [20] |
0x42b7eb VSUBPD (%RDI,%RAX,1),%ZMM12,%ZMM13 [22] |
0x42b7f2 VMULPD (%R14,%RAX,1),%ZMM13,%ZMM14 [1] |
0x42b7f9 VFMADD132PD (%RDX,%RAX,1),%ZMM14,%ZMM10 [8] |
0x42b800 MOV 0x1b8(%RSP),%RDX [20] |
0x42b808 VFMADD213PD (%RSI,%RAX,1),%ZMM11,%ZMM10 [21] |
0x42b80f VMOVUPD %ZMM10,(%RSI,%RAX,1) [21] |
0x42b816 VMOVUPD (%RDX,%RAX,1),%ZMM0 [7] |
0x42b81d VMOVUPD (%RBX,%RAX,1),%ZMM15 [3] |
0x42b824 VSUBPD (%RDI,%RAX,1),%ZMM0,%ZMM5 [22] |
0x42b82b VSUBPD (%R11,%RAX,1),%ZMM15,%ZMM1 [15] |
0x42b832 MOV 0x1b0(%RSP),%RDI [20] |
0x42b83a VMULPD (%R8,%RAX,1),%ZMM5,%ZMM7 [16] |
0x42b841 VFMADD132PD (%R12,%RAX,1),%ZMM7,%ZMM1 [17] |
0x42b848 VFMADD213PD (%RCX,%RAX,1),%ZMM1,%ZMM11 [14] |
0x42b84f VMOVUPD %ZMM11,(%RCX,%RAX,1) [14] |
0x42b856 ADD $0x40,%RAX |
0x42b85a CMP %RDI,%RAX |
0x42b85d JNE 42b6b8 |
/home/eoseret/qaas_runs_GNR/173-814-2343/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/accelerate.cpp: 43 - 53 |
-------------------------------------------------------------------------------- |
43: double stepbymass_s = halfdt / ((density0(i - 1, j - 1) * volume(i - 1, j - 1) + density0(i - 1, j + 0) * volume(i - 1, j + 0) + |
44: density0(i, j) * volume(i, j) + density0(i + 0, j - 1) * volume(i + 0, j - 1)) * |
45: 0.25); |
46: xvel1(i, j) = xvel0(i, j) - stepbymass_s * (xarea(i, j) * (pressure(i, j) - pressure(i - 1, j + 0)) + |
47: xarea(i + 0, j - 1) * (pressure(i + 0, j - 1) - pressure(i - 1, j - 1))); |
48: yvel1(i, j) = yvel0(i, j) - stepbymass_s * (yarea(i, j) * (pressure(i, j) - pressure(i + 0, j - 1)) + |
49: yarea(i - 1, j + 0) * (pressure(i - 1, j + 0) - pressure(i - 1, j - 1))); |
50: xvel1(i, j) = xvel1(i, j) - stepbymass_s * (xarea(i, j) * (viscosity(i, j) - viscosity(i - 1, j + 0)) + |
51: xarea(i + 0, j - 1) * (viscosity(i + 0, j - 1) - viscosity(i - 1, j - 1))); |
52: yvel1(i, j) = yvel1(i, j) - stepbymass_s * (yarea(i, j) * (viscosity(i, j) - viscosity(i + 0, j - 1)) + |
53: yarea(i - 1, j + 0) * (viscosity(i - 1, j + 0) - viscosity(i - 1, j - 1))); |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ○97.59 | gomp_thread_start | team.c:130 | libgomp.so.1.0.0 |
| ○2.41 | GOMP_parallel | libgomp.h:982 | libgomp.so.1.0.0 |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.06 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 1.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | NA |
| Bottlenecks | P2, P3, P11, |
| Function | accelerate_kernel(int, int, int, int, double, clover::Buffer2D |
| Source | accelerate.cpp:43-53 |
| Source loop unroll info | unrolled by 8 |
| Source loop unroll confidence level | high |
| Unroll/vectorization loop type | main |
| Unroll factor | 8 |
| CQA cycles | 17.00 |
| CQA cycles if no scalar integer | 16.00 |
| CQA cycles if FP arith vectorized | 17.00 |
| CQA cycles if fully vectorized | 17.00 |
| Front-end cycles | 14.17 |
| P0 cycles | 14.00 |
| P1 cycles | 12.50 |
| P2 cycles | 17.00 |
| P3 cycles | 17.00 |
| P4 cycles | 2.00 |
| P5 cycles | 14.00 |
| P6 cycles | 1.00 |
| P7 cycles | 2.00 |
| P8 cycles | 2.00 |
| P9 cycles | 2.00 |
| P10 cycles | 0.00 |
| P11 cycles | 17.00 |
| DIV/SQRT cycles | 16.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 60.00 |
| Nb uops | 61.00 |
| Nb loads | 51.00 |
| Nb stores | 4.00 |
| Nb stack references | 14.00 |
| FLOP/cycle | 16.94 |
| Nb FLOP add-sub | 72.00 |
| Nb FLOP mul | 48.00 |
| Nb FLOP fma | 80.00 |
| Nb FLOP div | 8.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 157.65 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 2424.00 |
| Bytes stored | 256.00 |
| Stride 0 | 1.00 |
| Stride 1 | 25.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 100.00 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | 100.00 |
| Vectorization ratio add_sub | 100.00 |
| Vectorization ratio fma | 100.00 |
| Vectorization ratio div_sqrt | 100.00 |
| Vectorization ratio other | NA |
| Vector-efficiency ratio all | 100.00 |
| Vector-efficiency ratio load | 100.00 |
| Vector-efficiency ratio store | 100.00 |
| Vector-efficiency ratio mul | 100.00 |
| Vector-efficiency ratio add_sub | 100.00 |
| Vector-efficiency ratio fma | 100.00 |
| Vector-efficiency ratio div_sqrt | 100.00 |
| Vector-efficiency ratio other | NA |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.06 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 1.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | NA |
| Bottlenecks | P2, P3, P11, |
| Function | accelerate_kernel(int, int, int, int, double, clover::Buffer2D |
| Source | accelerate.cpp:43-53 |
| Source loop unroll info | unrolled by 8 |
| Source loop unroll confidence level | high |
| Unroll/vectorization loop type | main |
| Unroll factor | 8 |
| CQA cycles | 17.00 |
| CQA cycles if no scalar integer | 16.00 |
| CQA cycles if FP arith vectorized | 17.00 |
| CQA cycles if fully vectorized | 17.00 |
| Front-end cycles | 14.17 |
| P0 cycles | 14.00 |
| P1 cycles | 12.50 |
| P2 cycles | 17.00 |
| P3 cycles | 17.00 |
| P4 cycles | 2.00 |
| P5 cycles | 14.00 |
| P6 cycles | 1.00 |
| P7 cycles | 2.00 |
| P8 cycles | 2.00 |
| P9 cycles | 2.00 |
| P10 cycles | 0.00 |
| P11 cycles | 17.00 |
| DIV/SQRT cycles | 16.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 60.00 |
| Nb uops | 61.00 |
| Nb loads | 51.00 |
| Nb stores | 4.00 |
| Nb stack references | 14.00 |
| FLOP/cycle | 16.94 |
| Nb FLOP add-sub | 72.00 |
| Nb FLOP mul | 48.00 |
| Nb FLOP fma | 80.00 |
| Nb FLOP div | 8.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 157.65 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 2424.00 |
| Bytes stored | 256.00 |
| Stride 0 | 1.00 |
| Stride 1 | 25.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 100.00 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | 100.00 |
| Vectorization ratio add_sub | 100.00 |
| Vectorization ratio fma | 100.00 |
| Vectorization ratio div_sqrt | 100.00 |
| Vectorization ratio other | NA |
| Vector-efficiency ratio all | 100.00 |
| Vector-efficiency ratio load | 100.00 |
| Vector-efficiency ratio store | 100.00 |
| Vector-efficiency ratio mul | 100.00 |
| Vector-efficiency ratio add_sub | 100.00 |
| Vector-efficiency ratio fma | 100.00 |
| Vector-efficiency ratio div_sqrt | 100.00 |
| Vector-efficiency ratio other | NA |
| Path / |
| nb instructions | 60 |
| nb uops | 61 |
| loop length | 427 |
| used x86 registers | 15 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 0 |
| used zmm registers | 14 |
| nb stack references | 14 |
| ADD-SUB / MUL ratio | 1.50 |
| micro-operation queue | 14.17 cycles |
| front end | 14.17 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 14.00 | 0.00 | 17.00 | 17.00 | 2.00 | 14.00 | 1.00 | 2.00 | 2.00 | 2.00 | 0.00 | 17.00 |
| cycles | 14.00 | 12.50 | 17.00 | 17.00 | 2.00 | 14.00 | 1.00 | 2.00 | 2.00 | 2.00 | 0.00 | 17.00 |
| Cycles executing div or sqrt instructions | 16.00 |
| Longest recurrence chain latency (RecMII) | 1.00 |
| Front-end | 14.17 |
| Dispatch | 17.00 |
| DIV/SQRT | 16.00 |
| Data deps. | 1.00 |
| Overall L1 | 17.00 |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | 100% |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | 100% |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | NA (no other vectorizable/vectorized instructions) |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MOV 0x168(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x170(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VMOVUPD (%RDX,%RAX,1),%ZMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| MOV 0x160(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VMULPD (%RDI,%RAX,1),%ZMM0,%ZMM5 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| VMOVUPD (%RDX,%RAX,1),%ZMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| MOV 0x158(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x188(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VMOVUPD (%R13,%RAX,1),%ZMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VFMADD231PD (%RDI,%RAX,1),%ZMM7,%ZMM5 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| VMOVUPD (%RDX,%RAX,1),%ZMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| MOV 0x190(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VSUBPD (%R9,%RAX,1),%ZMM14,%ZMM15 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 | vect (100.0%) |
| VMULPD (%RDI,%RAX,1),%ZMM2,%ZMM8 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| MOV 0x180(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VMULPD (%R14,%RAX,1),%ZMM15,%ZMM1 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| VMOVUPD (%RDI,%RAX,1),%ZMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VMOVUPD (%R15,%RAX,1),%ZMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| MOV 0x178(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VSUBPD (%R10,%RAX,1),%ZMM12,%ZMM13 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 | vect (100.0%) |
| VFMADD231PD (%RDX,%RAX,1),%ZMM9,%ZMM8 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| MOV 0x1a0(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x198(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VFMADD132PD (%RDX,%RAX,1),%ZMM1,%ZMM13 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| VADDPD %ZMM8,%ZMM5,%ZMM10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VDIVPD %ZMM10,%ZMM3,%ZMM11 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 | vect (100.0%) |
| VFMADD213PD (%RDI,%RAX,1),%ZMM11,%ZMM13 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| VMOVUPD %ZMM13,(%RSI,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 | vect (100.0%) |
| VMOVUPD (%R10,%RAX,1),%ZMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VMOVUPD (%R15,%RAX,1),%ZMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VSUBPD (%R9,%RAX,1),%ZMM7,%ZMM2 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 | vect (100.0%) |
| VSUBPD (%R13,%RAX,1),%ZMM0,%ZMM5 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 | vect (100.0%) |
| VMULPD (%R8,%RAX,1),%ZMM2,%ZMM8 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| VFMADD132PD (%R12,%RAX,1),%ZMM8,%ZMM5 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| MOV 0x1a8(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VFMADD213PD (%RDI,%RAX,1),%ZMM11,%ZMM5 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| MOV 0x1b8(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VMOVUPD %ZMM5,(%RCX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 | vect (100.0%) |
| VMOVUPD (%RBX,%RAX,1),%ZMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VMOVUPD (%R11,%RAX,1),%ZMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VSUBPD (%RDI,%RAX,1),%ZMM9,%ZMM10 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 | vect (100.0%) |
| MOV 0x150(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VSUBPD (%RDI,%RAX,1),%ZMM12,%ZMM13 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 | vect (100.0%) |
| VMULPD (%R14,%RAX,1),%ZMM13,%ZMM14 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| VFMADD132PD (%RDX,%RAX,1),%ZMM14,%ZMM10 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| MOV 0x1b8(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VFMADD213PD (%RSI,%RAX,1),%ZMM11,%ZMM10 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| VMOVUPD %ZMM10,(%RSI,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 | vect (100.0%) |
| VMOVUPD (%RDX,%RAX,1),%ZMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VMOVUPD (%RBX,%RAX,1),%ZMM15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VSUBPD (%RDI,%RAX,1),%ZMM0,%ZMM5 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 | vect (100.0%) |
| VSUBPD (%R11,%RAX,1),%ZMM15,%ZMM1 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 | vect (100.0%) |
| MOV 0x1b0(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VMULPD (%R8,%RAX,1),%ZMM5,%ZMM7 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| VFMADD132PD (%R12,%RAX,1),%ZMM7,%ZMM1 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| VFMADD213PD (%RCX,%RAX,1),%ZMM1,%ZMM11 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| VMOVUPD %ZMM11,(%RCX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 | vect (100.0%) |
| ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| CMP %RDI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| JNE 42b6b8 <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_._omp_fn.0+0x4d8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
| nb instructions | 60 |
| nb uops | 61 |
| loop length | 427 |
| used x86 registers | 15 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 0 |
| used zmm registers | 14 |
| nb stack references | 14 |
| ADD-SUB / MUL ratio | 1.50 |
| micro-operation queue | 14.17 cycles |
| front end | 14.17 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 14.00 | 0.00 | 17.00 | 17.00 | 2.00 | 14.00 | 1.00 | 2.00 | 2.00 | 2.00 | 0.00 | 17.00 |
| cycles | 14.00 | 12.50 | 17.00 | 17.00 | 2.00 | 14.00 | 1.00 | 2.00 | 2.00 | 2.00 | 0.00 | 17.00 |
| Cycles executing div or sqrt instructions | 16.00 |
| Longest recurrence chain latency (RecMII) | 1.00 |
| Front-end | 14.17 |
| Dispatch | 17.00 |
| DIV/SQRT | 16.00 |
| Data deps. | 1.00 |
| Overall L1 | 17.00 |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | 100% |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | 100% |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | NA (no other vectorizable/vectorized instructions) |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MOV 0x168(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x170(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VMOVUPD (%RDX,%RAX,1),%ZMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| MOV 0x160(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VMULPD (%RDI,%RAX,1),%ZMM0,%ZMM5 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| VMOVUPD (%RDX,%RAX,1),%ZMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| MOV 0x158(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x188(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VMOVUPD (%R13,%RAX,1),%ZMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VFMADD231PD (%RDI,%RAX,1),%ZMM7,%ZMM5 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| VMOVUPD (%RDX,%RAX,1),%ZMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| MOV 0x190(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VSUBPD (%R9,%RAX,1),%ZMM14,%ZMM15 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 | vect (100.0%) |
| VMULPD (%RDI,%RAX,1),%ZMM2,%ZMM8 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| MOV 0x180(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VMULPD (%R14,%RAX,1),%ZMM15,%ZMM1 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| VMOVUPD (%RDI,%RAX,1),%ZMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VMOVUPD (%R15,%RAX,1),%ZMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| MOV 0x178(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VSUBPD (%R10,%RAX,1),%ZMM12,%ZMM13 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 | vect (100.0%) |
| VFMADD231PD (%RDX,%RAX,1),%ZMM9,%ZMM8 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| MOV 0x1a0(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| MOV 0x198(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VFMADD132PD (%RDX,%RAX,1),%ZMM1,%ZMM13 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| VADDPD %ZMM8,%ZMM5,%ZMM10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| VDIVPD %ZMM10,%ZMM3,%ZMM11 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 | vect (100.0%) |
| VFMADD213PD (%RDI,%RAX,1),%ZMM11,%ZMM13 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| VMOVUPD %ZMM13,(%RSI,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 | vect (100.0%) |
| VMOVUPD (%R10,%RAX,1),%ZMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VMOVUPD (%R15,%RAX,1),%ZMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VSUBPD (%R9,%RAX,1),%ZMM7,%ZMM2 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 | vect (100.0%) |
| VSUBPD (%R13,%RAX,1),%ZMM0,%ZMM5 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 | vect (100.0%) |
| VMULPD (%R8,%RAX,1),%ZMM2,%ZMM8 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| VFMADD132PD (%R12,%RAX,1),%ZMM8,%ZMM5 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| MOV 0x1a8(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VFMADD213PD (%RDI,%RAX,1),%ZMM11,%ZMM5 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| MOV 0x1b8(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VMOVUPD %ZMM5,(%RCX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 | vect (100.0%) |
| VMOVUPD (%RBX,%RAX,1),%ZMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VMOVUPD (%R11,%RAX,1),%ZMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VSUBPD (%RDI,%RAX,1),%ZMM9,%ZMM10 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 | vect (100.0%) |
| MOV 0x150(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VSUBPD (%RDI,%RAX,1),%ZMM12,%ZMM13 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 | vect (100.0%) |
| VMULPD (%R14,%RAX,1),%ZMM13,%ZMM14 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| VFMADD132PD (%RDX,%RAX,1),%ZMM14,%ZMM10 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| MOV 0x1b8(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VFMADD213PD (%RSI,%RAX,1),%ZMM11,%ZMM10 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| VMOVUPD %ZMM10,(%RSI,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 | vect (100.0%) |
| VMOVUPD (%RDX,%RAX,1),%ZMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VMOVUPD (%RBX,%RAX,1),%ZMM15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 | vect (100.0%) |
| VSUBPD (%RDI,%RAX,1),%ZMM0,%ZMM5 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 | vect (100.0%) |
| VSUBPD (%R11,%RAX,1),%ZMM15,%ZMM1 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 | vect (100.0%) |
| MOV 0x1b0(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
| VMULPD (%R8,%RAX,1),%ZMM5,%ZMM7 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| VFMADD132PD (%R12,%RAX,1),%ZMM7,%ZMM1 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| VFMADD213PD (%RCX,%RAX,1),%ZMM1,%ZMM11 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 | vect (100.0%) |
| VMOVUPD %ZMM11,(%RCX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 | vect (100.0%) |
| ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
| CMP %RDI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
| JNE 42b6b8 <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_._omp_fn.0+0x4d8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |