OV - exec - Loop 715

	Loop Id: 715	Module: exec	Source: par_multi_interp.c:550-576 [...]	Coverage: 0.07%

0x478248 MOV	-0x258(%RBP),%RBX

0x47824f MOV	-0x1e0(%RBP),%RDX

0x478256 LEA	(%RBX,%RDI,8),%RBX

0x47825a MOV	(%RBX),%R8

0x47825d LEA	(,%R8,8),%R9

0x478265 LEA	0x8(%R9),%RSI

0x478269 MOV	(%RDX,%R9,1),%RAX

0x47826d MOV	(%RDX,%RSI,1),%R10

0x478271 CMP	%R10,%RAX

0x478274 JGE	4783c4

0x47827a MOV	%R10,%RDX

0x47827d SUB	%RAX,%RDX

0x478280 AND	$0x7,%EDX

0x478283 JE	478338

0x478289 CMP	$0x1,%RDX

0x47828d JE	47831d

0x478293 CMP	$0x2,%RDX

0x478297 JE	47830b

0x478299 CMP	$0x3,%RDX

0x47829d JE	4782f9

0x47829f CMP	$0x4,%RDX

0x4782a3 JE	4782e7

0x4782a5 CMP	$0x5,%RDX

0x4782a9 JE	4782d5

0x4782ab CMP	$0x6,%RDX

0x4782af JE	4782c3

0x4782b1 MOV	(%R12,%RAX,8),%RDX

0x4782b5 INC	%RAX

0x4782b8 CMP	%R15,(%R13,%RDX,8)

0x4782bd JE	47869f

0x4782c3 MOV	(%R12,%RAX,8),%RDX

0x4782c7 INC	%RAX

0x4782ca CMP	%R15,(%R13,%RDX,8)

0x4782cf JE	47869f

0x4782d5 MOV	(%R12,%RAX,8),%RDX

0x4782d9 INC	%RAX

0x4782dc CMP	%R15,(%R13,%RDX,8)

0x4782e1 JE	47869f

0x4782e7 MOV	(%R12,%RAX,8),%RDX

0x4782eb INC	%RAX

0x4782ee CMP	%R15,(%R13,%RDX,8)

0x4782f3 JE	47869f

0x4782f9 MOV	(%R12,%RAX,8),%RDX

0x4782fd INC	%RAX

0x478300 CMP	%R15,(%R13,%RDX,8)

0x478305 JE	47869f

0x47830b MOV	(%R12,%RAX,8),%RDX

0x47830f INC	%RAX

0x478312 CMP	%R15,(%R13,%RDX,8)

0x478317 JE	47869f

0x47831d MOV	(%R12,%RAX,8),%RDX

0x478321 CMP	%R15,(%R13,%RDX,8)

0x478326 JE	47869f

0x47832c INC	%RAX

0x47832f CMP	%R10,%RAX

0x478332 JE	4783c4

  (717) 0x478338 MOV	(%R12,%RAX,8),%RDX

  (717) 0x47833c CMP	%R15,(%R13,%RDX,8)

  (717) 0x478341 JE	47869f

  (717) 0x478347 MOV	0x8(%R12,%RAX,8),%RDX

  (717) 0x47834c CMP	%R15,(%R13,%RDX,8)

  (717) 0x478351 JE	47869f

  (717) 0x478357 MOV	0x10(%R12,%RAX,8),%RDX

  (717) 0x47835c CMP	%R15,(%R13,%RDX,8)

  (717) 0x478361 JE	47869f

  (717) 0x478367 MOV	0x18(%R12,%RAX,8),%RDX

  (717) 0x47836c CMP	%R15,(%R13,%RDX,8)

  (717) 0x478371 JE	47869f

  (717) 0x478377 MOV	0x20(%R12,%RAX,8),%RDX

  (717) 0x47837c CMP	%R15,(%R13,%RDX,8)

  (717) 0x478381 JE	47869f

  (717) 0x478387 MOV	0x28(%R12,%RAX,8),%RDX

  (717) 0x47838c CMP	%R15,(%R13,%RDX,8)

  (717) 0x478391 JE	47869f

  (717) 0x478397 MOV	0x30(%R12,%RAX,8),%RDX

  (717) 0x47839c CMP	%R15,(%R13,%RDX,8)

  (717) 0x4783a1 JE	47869f

  (717) 0x4783a7 MOV	0x38(%R12,%RAX,8),%RDX

  (717) 0x4783ac CMP	%R15,(%R13,%RDX,8)

  (717) 0x4783b1 JE	47869f

  (717) 0x4783b7 ADD	$0x8,%RAX

  (717) 0x4783bb CMP	%R10,%RAX

  (717) 0x4783be JNE	478338

0x4783c4 MOV	-0x250(%RBP),%R10

0x4783cb MOV	(%R10,%R9,1),%RAX

0x4783cf MOV	(%R10,%RSI,1),%RSI

0x4783d3 CMP	%RSI,%RAX

0x4783d6 JGE	478513

0x4783dc MOV	%RSI,%RDX

0x4783df SUB	%RAX,%RDX

0x4783e2 AND	$0x7,%EDX

0x4783e5 JE	478493

0x4783eb CMP	$0x1,%RDX

0x4783ef JE	478479

0x4783f5 CMP	$0x2,%RDX

0x4783f9 JE	478468

0x4783fb CMP	$0x3,%RDX

0x4783ff JE	478457

0x478401 CMP	$0x4,%RDX

0x478405 JE	478446

0x478407 CMP	$0x5,%RDX

0x47840b JE	478435

0x47840d CMP	$0x6,%RDX

0x478411 JE	478424

0x478413 MOV	(%R14,%RAX,8),%R10

0x478417 INC	%RAX

0x47841a CMP	%R15,(%RCX,%R10,8)

0x47841e JE	47869f

0x478424 MOV	(%R14,%RAX,8),%RDX

0x478428 INC	%RAX

0x47842b CMP	%R15,(%RCX,%RDX,8)

0x47842f JE	47869f

0x478435 MOV	(%R14,%RAX,8),%R10

0x478439 INC	%RAX

0x47843c CMP	%R15,(%RCX,%R10,8)

0x478440 JE	47869f

0x478446 MOV	(%R14,%RAX,8),%RDX

0x47844a INC	%RAX

0x47844d CMP	%R15,(%RCX,%RDX,8)

0x478451 JE	47869f

0x478457 MOV	(%R14,%RAX,8),%R10

0x47845b INC	%RAX

0x47845e CMP	%R15,(%RCX,%R10,8)

0x478462 JE	47869f

0x478468 MOV	(%R14,%RAX,8),%RDX

0x47846c INC	%RAX

0x47846f CMP	%R15,(%RCX,%RDX,8)

0x478473 JE	47869f

0x478479 MOV	(%R14,%RAX,8),%R10

0x47847d CMP	%R15,(%RCX,%R10,8)

0x478481 JE	47869f

0x478487 INC	%RAX

0x47848a CMP	%RSI,%RAX

0x47848d JE	478513

  (716) 0x478493 MOV	(%R14,%RAX,8),%RDX

  (716) 0x478497 CMP	%R15,(%RCX,%RDX,8)

  (716) 0x47849b JE	47869f

  (716) 0x4784a1 MOV	0x8(%R14,%RAX,8),%R10

  (716) 0x4784a6 CMP	%R15,(%RCX,%R10,8)

  (716) 0x4784aa JE	47869f

  (716) 0x4784b0 MOV	0x10(%R14,%RAX,8),%RDX

  (716) 0x4784b5 CMP	%R15,(%RCX,%RDX,8)

  (716) 0x4784b9 JE	47869f

  (716) 0x4784bf MOV	0x18(%R14,%RAX,8),%R10

  (716) 0x4784c4 CMP	%R15,(%RCX,%R10,8)

  (716) 0x4784c8 JE	47869f

  (716) 0x4784ce MOV	0x20(%R14,%RAX,8),%RDX

  (716) 0x4784d3 CMP	%R15,(%RCX,%RDX,8)

  (716) 0x4784d7 JE	47869f

  (716) 0x4784dd MOV	0x28(%R14,%RAX,8),%R10

  (716) 0x4784e2 CMP	%R15,(%RCX,%R10,8)

  (716) 0x4784e6 JE	47869f

  (716) 0x4784ec MOV	0x30(%R14,%RAX,8),%RDX

  (716) 0x4784f1 CMP	%R15,(%RCX,%RDX,8)

  (716) 0x4784f5 JE	47869f

  (716) 0x4784fb MOV	0x38(%R14,%RAX,8),%R10

  (716) 0x478500 CMP	%R15,(%RCX,%R10,8)

  (716) 0x478504 JE	47869f

  (716) 0x47850a ADD	$0x8,%RAX

  (716) 0x47850e CMP	%RSI,%RAX

  (716) 0x478511 JNE	478493

0x478513 DEC	%RDI

0x478516 CMP	%RDI,%R11

0x478519 JLE	478248

0x47869f MOV	-0x258(%RBP),%RAX

0x4786a6 LEA	(%RAX,%R11,8),%RSI

0x4786aa INC	%R11

0x4786ad MOV	(%RSI),%RDX

0x4786b0 MOV	%RDX,(%RBX)

0x4786b3 MOV	-0x2b0(%RBP),%RBX

0x4786ba MOV	%R8,(%RSI)

0x4786bd MOV	%RBX,(%R13,%R9,1)

0x4786c2 JMP	478516

/home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 550 - 576

--------------------------------------------------------------------------------

550:       for (i = pass_array_size-1; i > cnt-1; i--)

551:       {

552:          i1 = pass_array[i];

553:          no_break = 1;

554:          for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++)

555:          {

556:             j1 = S_diag_j[j];

557:             if (assigned[j1] == pass-1)

[...]

568:             for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++)

569:             {

570:                j1 = S_offd_j[j];

571:                if (assigned_offd[j1] == pass-1)

572:                {

573:                   pass_array[i++] = pass_array[cnt];

574:                   pass_array[cnt++] = i1;

575:                   assigned[i1] = pass;

576:                   break;

Coverage (%)	Name	Source Location	Module
►99.56+	hypre_BoomerAMGSetup	par_amg_setup.c:737	exec
○	hypre_PCGSetup	pcg.c:234	exec
○	main	amg.c:398	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	amg.c:253	exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Metric	Value
CQA speedup if no scalar integer	1.00
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	8.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.00
Bottlenecks	micro-operation queue,
Function	hypre_BoomerAMGBuildMultipass
Source	par_multi_interp.c:550-554,par_multi_interp.c:557-557,par_multi_interp.c:568-568,par_multi_interp.c:571-576
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	14.88
CQA cycles if no scalar integer	14.88
CQA cycles if FP arith vectorized	14.88
CQA cycles if fully vectorized	1.86
Front-end cycles	14.88
P0 cycles	14.83
P1 cycles	14.83
P2 cycles	14.83
P3 cycles	14.83
P4 cycles	14.83
P5 cycles	14.83
P6 cycles	10.50
P7 cycles	10.50
P8 cycles	10.50
P9 cycles	10.50
P10 cycles	0.00
P11 cycles	0.00
P12 cycles	0.00
P13 cycles	0.00
P14 cycles	0.00
P15 cycles	0.00
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	119.00
Nb uops	119.00
Nb loads	39.00
Nb stores	3.00
Nb stack references	4.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	22.59
Bytes prefetched	0.00
Bytes loaded	312.00
Bytes stored	24.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	NA
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	12.50
Vector-efficiency ratio load	12.50
Vector-efficiency ratio store	12.50
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	NA
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	12.50

Metric	Value
CQA speedup if no scalar integer	1.00
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	8.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.00
Bottlenecks	micro-operation queue,
Function	hypre_BoomerAMGBuildMultipass
Source	par_multi_interp.c:550-554,par_multi_interp.c:557-557,par_multi_interp.c:568-568,par_multi_interp.c:571-576
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	14.88
CQA cycles if no scalar integer	14.88
CQA cycles if FP arith vectorized	14.88
CQA cycles if fully vectorized	1.86
Front-end cycles	14.88
P0 cycles	14.83
P1 cycles	14.83
P2 cycles	14.83
P3 cycles	14.83
P4 cycles	14.83
P5 cycles	14.83
P6 cycles	10.50
P7 cycles	10.50
P8 cycles	10.50
P9 cycles	10.50
P10 cycles	0.00
P11 cycles	0.00
P12 cycles	0.00
P13 cycles	0.00
P14 cycles	0.00
P15 cycles	0.00
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	119.00
Nb uops	119.00
Nb loads	39.00
Nb stores	3.00
Nb stack references	4.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	22.59
Bytes prefetched	0.00
Bytes loaded	312.00
Bytes stored	24.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	NA
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	12.50
Vector-efficiency ratio load	12.50
Vector-efficiency ratio store	12.50
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	NA
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	12.50

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	hypre_BoomerAMGBuildMultipass
Source file and lines	par_multi_interp.c:550-576
Module	exec

The loop is defined in /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:550-557,568-576.

Analyzed code is defined in /home/eoseret/qaas_runs_ZEN5/173-989-6379/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:550-554,557,568,571-576.

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Too many paths. If you really need to analyze all of the 1820 paths individually, rerun with max-paths=1820
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

Try to simplify control and/or increase the maximum number of paths per function/loop through the 'max-paths-nb' option.

This loop has 1820 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Vectorization

Your loop is not vectorized. 8 data elements could be processed at once in vector registers. By vectorizing your loop, you can lower the cost of an iteration from 14.88 to 1.86 cycles (8.00x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This loop is probably writing/copying data or processing integer elements.

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 312 bytes. The binary loop is storing 24 bytes.

General properties

nb instructions	119
nb uops	119
loop length	499
used x86 registers	15
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	4

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	14.88 cycles
front end	14.88 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	14.83	14.83	14.83	14.83	14.83	14.83	10.50	10.50	10.50	10.50	0.00	0.00	0.00	0.00	0.00	0.00
cycles	14.83	14.83	14.83	14.83	14.83	14.83	10.50	10.50	10.50	10.50	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	14.88
Dispatch	14.83
Overall L1	14.88

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 14.88 cycles. At this rate:

8% of peak load performance is reached (20.97 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
1% of peak store performance is reached (1.61 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck).

ASM code

In the binary file, the address of the loop is: 478248

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	Latency	Recip. throughput	Vectorization
MOV -0x258(%RBP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV -0x1e0(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
LEA (%RBX,%RDI,8),%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV (%RBX),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
LEA (,%R8,8),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA 0x8(%R9),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV (%RDX,%R9,1),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RDX,%RSI,1),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP %R10,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JGE 4783c4 <hypre_BoomerAMGBuildMultipass+0x1274>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV %R10,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %RAX,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
AND $0x7,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
JE 478338 <hypre_BoomerAMGBuildMultipass+0x11e8>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
CMP $0x1,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JE 47831d <hypre_BoomerAMGBuildMultipass+0x11cd>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
CMP $0x2,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JE 47830b <hypre_BoomerAMGBuildMultipass+0x11bb>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
CMP $0x3,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JE 4782f9 <hypre_BoomerAMGBuildMultipass+0x11a9>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
CMP $0x4,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JE 4782e7 <hypre_BoomerAMGBuildMultipass+0x1197>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
CMP $0x5,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JE 4782d5 <hypre_BoomerAMGBuildMultipass+0x1185>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
CMP $0x6,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JE 4782c3 <hypre_BoomerAMGBuildMultipass+0x1173>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R12,%RAX,8),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %R15,(%R13,%RDX,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JE 47869f <hypre_BoomerAMGBuildMultipass+0x154f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R12,%RAX,8),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %R15,(%R13,%RDX,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JE 47869f <hypre_BoomerAMGBuildMultipass+0x154f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R12,%RAX,8),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %R15,(%R13,%RDX,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JE 47869f <hypre_BoomerAMGBuildMultipass+0x154f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R12,%RAX,8),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %R15,(%R13,%RDX,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JE 47869f <hypre_BoomerAMGBuildMultipass+0x154f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R12,%RAX,8),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %R15,(%R13,%RDX,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JE 47869f <hypre_BoomerAMGBuildMultipass+0x154f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R12,%RAX,8),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %R15,(%R13,%RDX,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JE 47869f <hypre_BoomerAMGBuildMultipass+0x154f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R12,%RAX,8),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP %R15,(%R13,%RDX,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JE 47869f <hypre_BoomerAMGBuildMultipass+0x154f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %R10,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JE 4783c4 <hypre_BoomerAMGBuildMultipass+0x1274>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV -0x250(%RBP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%R10,%R9,1),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%R10,%RSI,1),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP %RSI,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JGE 478513 <hypre_BoomerAMGBuildMultipass+0x13c3>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV %RSI,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %RAX,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
AND $0x7,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
JE 478493 <hypre_BoomerAMGBuildMultipass+0x1343>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
CMP $0x1,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JE 478479 <hypre_BoomerAMGBuildMultipass+0x1329>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
CMP $0x2,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JE 478468 <hypre_BoomerAMGBuildMultipass+0x1318>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
CMP $0x3,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JE 478457 <hypre_BoomerAMGBuildMultipass+0x1307>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
CMP $0x4,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JE 478446 <hypre_BoomerAMGBuildMultipass+0x12f6>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
CMP $0x5,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JE 478435 <hypre_BoomerAMGBuildMultipass+0x12e5>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
CMP $0x6,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JE 478424 <hypre_BoomerAMGBuildMultipass+0x12d4>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R14,%RAX,8),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %R15,(%RCX,%R10,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JE 47869f <hypre_BoomerAMGBuildMultipass+0x154f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R14,%RAX,8),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %R15,(%RCX,%RDX,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JE 47869f <hypre_BoomerAMGBuildMultipass+0x154f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R14,%RAX,8),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %R15,(%RCX,%R10,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JE 47869f <hypre_BoomerAMGBuildMultipass+0x154f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R14,%RAX,8),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %R15,(%RCX,%RDX,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JE 47869f <hypre_BoomerAMGBuildMultipass+0x154f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R14,%RAX,8),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %R15,(%RCX,%R10,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JE 47869f <hypre_BoomerAMGBuildMultipass+0x154f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R14,%RAX,8),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %R15,(%RCX,%RDX,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JE 47869f <hypre_BoomerAMGBuildMultipass+0x154f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R14,%RAX,8),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP %R15,(%RCX,%R10,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JE 47869f <hypre_BoomerAMGBuildMultipass+0x154f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %RSI,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JE 478513 <hypre_BoomerAMGBuildMultipass+0x13c3>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
DEC %RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %RDI,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JLE 478248 <hypre_BoomerAMGBuildMultipass+0x10f8>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV -0x258(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
LEA (%RAX,%R11,8),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
INC %R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV (%RSI),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RDX,(%RBX)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV -0x2b0(%RBP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %R8,(%RSI)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RBX,(%R13,%R9,1)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
JMP 478516 <hypre_BoomerAMGBuildMultipass+0x13c6>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A

Function	hypre_BoomerAMGBuildMultipass
Source file and lines	par_multi_interp.c:550-576
Module	exec

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Too many paths. If you really need to analyze all of the 1820 paths individually, rerun with max-paths=1820
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Vectorization

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This loop is probably writing/copying data or processing integer elements.

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 312 bytes. The binary loop is storing 24 bytes.

General properties

nb instructions	119
nb uops	119
loop length	499
used x86 registers	15
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	4

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	14.88 cycles
front end	14.88 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	P15
uops	14.83	14.83	14.83	14.83	14.83	14.83	10.50	10.50	10.50	10.50	0.00	0.00	0.00	0.00	0.00	0.00
cycles	14.83	14.83	14.83	14.83	14.83	14.83	10.50	10.50	10.50	10.50	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: ALU
P1: ALU
P2: ALU
P3: ALU, BRU
P4: ALU, BRU
P5: ALU, BRU
P6 (512 bits): store address, load
P7 (512 bits): store address, load
P8 (512 bits): store address, load
P9 (512 bits): store address, load
P10 (512 bits): VPU, DIV/SQRT
P11 (512 bits): VPU, DIV/SQRT
P12 (512 bits): VPU
P13 (512 bits): VPU
P14 (512 bits): FP store data
P15 (512 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	14.88
Dispatch	14.83
Overall L1	14.88

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	12%
load	12%
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 14.88 cycles. At this rate:

8% of peak load performance is reached (20.97 out of 256.00 bytes loaded per cycle (GB/s @ 1GHz))
1% of peak store performance is reached (1.61 out of 128.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck).

ASM code

In the binary file, the address of the loop is: 478248

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	Latency	Recip. throughput	Vectorization
MOV -0x258(%RBP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV -0x1e0(%RBP),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
LEA (%RBX,%RDI,8),%RBX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV (%RBX),%R8	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
LEA (,%R8,8),%R9	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
LEA 0x8(%R9),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
MOV (%RDX,%R9,1),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%RDX,%RSI,1),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP %R10,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JGE 4783c4 <hypre_BoomerAMGBuildMultipass+0x1274>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV %R10,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %RAX,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
AND $0x7,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
JE 478338 <hypre_BoomerAMGBuildMultipass+0x11e8>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
CMP $0x1,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JE 47831d <hypre_BoomerAMGBuildMultipass+0x11cd>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
CMP $0x2,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JE 47830b <hypre_BoomerAMGBuildMultipass+0x11bb>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
CMP $0x3,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JE 4782f9 <hypre_BoomerAMGBuildMultipass+0x11a9>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
CMP $0x4,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JE 4782e7 <hypre_BoomerAMGBuildMultipass+0x1197>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
CMP $0x5,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JE 4782d5 <hypre_BoomerAMGBuildMultipass+0x1185>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
CMP $0x6,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JE 4782c3 <hypre_BoomerAMGBuildMultipass+0x1173>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R12,%RAX,8),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %R15,(%R13,%RDX,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JE 47869f <hypre_BoomerAMGBuildMultipass+0x154f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R12,%RAX,8),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %R15,(%R13,%RDX,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JE 47869f <hypre_BoomerAMGBuildMultipass+0x154f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R12,%RAX,8),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %R15,(%R13,%RDX,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JE 47869f <hypre_BoomerAMGBuildMultipass+0x154f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R12,%RAX,8),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %R15,(%R13,%RDX,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JE 47869f <hypre_BoomerAMGBuildMultipass+0x154f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R12,%RAX,8),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %R15,(%R13,%RDX,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JE 47869f <hypre_BoomerAMGBuildMultipass+0x154f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R12,%RAX,8),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %R15,(%R13,%RDX,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JE 47869f <hypre_BoomerAMGBuildMultipass+0x154f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R12,%RAX,8),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP %R15,(%R13,%RDX,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JE 47869f <hypre_BoomerAMGBuildMultipass+0x154f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %R10,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JE 4783c4 <hypre_BoomerAMGBuildMultipass+0x1274>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV -0x250(%RBP),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%R10,%R9,1),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV (%R10,%RSI,1),%RSI	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP %RSI,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JGE 478513 <hypre_BoomerAMGBuildMultipass+0x13c3>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV %RSI,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0.17	N/A
SUB %RAX,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
AND $0x7,%EDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
JE 478493 <hypre_BoomerAMGBuildMultipass+0x1343>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
CMP $0x1,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JE 478479 <hypre_BoomerAMGBuildMultipass+0x1329>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
CMP $0x2,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JE 478468 <hypre_BoomerAMGBuildMultipass+0x1318>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
CMP $0x3,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JE 478457 <hypre_BoomerAMGBuildMultipass+0x1307>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
CMP $0x4,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JE 478446 <hypre_BoomerAMGBuildMultipass+0x12f6>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
CMP $0x5,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JE 478435 <hypre_BoomerAMGBuildMultipass+0x12e5>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
CMP $0x6,%RDX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JE 478424 <hypre_BoomerAMGBuildMultipass+0x12d4>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R14,%RAX,8),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %R15,(%RCX,%R10,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JE 47869f <hypre_BoomerAMGBuildMultipass+0x154f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R14,%RAX,8),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %R15,(%RCX,%RDX,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JE 47869f <hypre_BoomerAMGBuildMultipass+0x154f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R14,%RAX,8),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %R15,(%RCX,%R10,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JE 47869f <hypre_BoomerAMGBuildMultipass+0x154f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R14,%RAX,8),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %R15,(%RCX,%RDX,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JE 47869f <hypre_BoomerAMGBuildMultipass+0x154f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R14,%RAX,8),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %R15,(%RCX,%R10,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JE 47869f <hypre_BoomerAMGBuildMultipass+0x154f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R14,%RAX,8),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %R15,(%RCX,%RDX,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JE 47869f <hypre_BoomerAMGBuildMultipass+0x154f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV (%R14,%RAX,8),%R10	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
CMP %R15,(%RCX,%R10,8)	1	0.17	0.17	0.17	0.17	0.17	0.17	0.25	0.25	0.25	0.25	1	0.25	scal (12.5%)
JE 47869f <hypre_BoomerAMGBuildMultipass+0x154f>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
INC %RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %RSI,%RAX	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JE 478513 <hypre_BoomerAMGBuildMultipass+0x13c3>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
DEC %RDI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
CMP %RDI,%R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	scal (12.5%)
JLE 478248 <hypre_BoomerAMGBuildMultipass+0x10f8>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	1	0.50-1	N/A
MOV -0x258(%RBP),%RAX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
LEA (%RAX,%R11,8),%RSI	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.25	N/A
INC %R11	1	0.17	0.17	0.17	0.17	0.17	0.17	0	0	0	0	1	0.17	N/A
MOV (%RSI),%RDX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %RDX,(%RBX)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV -0x2b0(%RBP),%RBX	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	3	0.25	N/A
MOV %R8,(%RSI)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
MOV %RBX,(%R13,%R9,1)	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	4	0.50	scal (12.5%)
JMP 478516 <hypre_BoomerAMGBuildMultipass+0x13c6>	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	1	N/A

Report Configuration

Vectorization

Details

Workaround

Execution units bottlenecks

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Vectorization

Details

Workaround

Execution units bottlenecks

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code